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yosys-experimental
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Author
Age
Files
Lines
*
Improvements and tuning of CBA.
Alan Mishchenko
2015-02-01
6
-60
/
+61
*
Improvements and tuning of CBA.
Alan Mishchenko
2015-02-01
3
-12
/
+31
*
Compiler warnings.
Alan Mishchenko
2015-01-31
3
-3
/
+4
*
Compiler warnings.
Alan Mishchenko
2015-01-31
3
-2
/
+2
*
Compiler warnings.
Alan Mishchenko
2015-01-31
4
-66
/
+66
*
Major rehash of the CBA code.
Alan Mishchenko
2015-01-31
17
-2777
/
+3371
*
Preprocessing for multi-output PLA tables.
Alan Mishchenko
2015-01-31
1
-17
/
+17
*
Preprocessing for multi-output PLA tables.
Alan Mishchenko
2015-01-31
1
-3
/
+1
*
Preprocessing for multi-output PLA tables.
Alan Mishchenko
2015-01-31
1
-19
/
+93
*
Preprocessing for multi-output PLA tables.
Alan Mishchenko
2015-01-31
1
-22
/
+93
*
Preprocessing for multi-output PLA tables.
Alan Mishchenko
2015-01-31
1
-45
/
+61
*
Preprocessing for multi-output PLA tables.
Alan Mishchenko
2015-01-31
1
-0
/
+124
*
Several ongoing changes.
Alan Mishchenko
2015-01-26
1
-1
/
+1
*
Several ongoing changes.
Alan Mishchenko
2015-01-26
4
-18
/
+155
*
Outputting initial state in Wlc_Ntk_t.
Alan Mishchenko
2015-01-26
1
-28
/
+25
*
Outputting initial state in Wlc_Ntk_t.
Alan Mishchenko
2015-01-25
4
-20
/
+71
*
Fix in deriving the init values for Wlc_Ntk_t.
Alan Mishchenko
2015-01-22
1
-0
/
+2
*
Bug fix in &cone (not able to extract the last PO).
Alan Mishchenko
2015-01-22
1
-1
/
+1
*
Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t.
Alan Mishchenko
2015-01-21
2
-2
/
+2
*
Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t.
Alan Mishchenko
2015-01-21
4
-7
/
+72
*
Organizing commands for barbuf-aware flow.
Alan Mishchenko
2015-01-20
4
-17
/
+52
*
Word-level extension of Cba_Ntk_t.
Alan Mishchenko
2015-01-18
7
-36
/
+91
*
Several small bug fixes.
Alan Mishchenko
2015-01-17
2
-2
/
+8
*
Organizing commands for barbuf-aware flow.
Alan Mishchenko
2015-01-17
11
-144
/
+395
*
Compiler warnings.
Alan Mishchenko
2015-01-16
2
-3
/
+2
*
Organizing commands for barbuf-aware flow.
Alan Mishchenko
2015-01-16
11
-163
/
+606
*
Various transformations of Cba_Ntk_t.
Alan Mishchenko
2015-01-15
5
-32
/
+59
*
Various transformations of Cba_Ntk_t.
Alan Mishchenko
2015-01-15
3
-4
/
+1
*
Various transformations of Cba_Ntk_t.
Alan Mishchenko
2015-01-15
7
-442
/
+467
*
Various transformations of Cba_Ntk_t.
Alan Mishchenko
2015-01-13
9
-111
/
+178
*
Various transformations of Cba_Ntk_t.
Alan Mishchenko
2015-01-13
6
-111
/
+577
*
Various transformations of Cba_Ntk_t.
Alan Mishchenko
2015-01-11
8
-371
/
+692
*
Changing memory model of Cba_Ntk_t.
Alan Mishchenko
2015-01-10
6
-65
/
+53
*
Implementation of CE extraction for multiple MUXes driving D-inputs of FFs.
Alan Mishchenko
2015-01-08
1
-50
/
+50
*
Returning multiple counter-examples.
Alan Mishchenko
2015-01-03
1
-2
/
+4
*
Gate sizing with barrier buffers.
Alan Mishchenko
2014-12-21
3
-0
/
+71
*
Exprimental features in tech-mapping.
Alan Mishchenko
2014-12-21
1
-6
/
+12
*
Simplifying AIG with barrier buffers.
Alan Mishchenko
2014-12-19
4
-6
/
+151
*
Bug fix in 'testcex' when flop count in the CEX is different from the network...
Alan Mishchenko
2014-12-19
1
-1
/
+1
*
Bug fix in 'testcex' when flop count in the CEX is different from the network...
Alan Mishchenko
2014-12-19
1
-2
/
+3
*
Induced bug with in DFS computation.
Alan Mishchenko
2014-12-16
1
-1
/
+1
*
Integrating barrier buffers.
Alan Mishchenko
2014-12-13
4
-17
/
+185
*
Adding relax ratio to &synch2.
Alan Mishchenko
2014-12-13
1
-4
/
+17
*
Integrating barrier buffers.
Alan Mishchenko
2014-12-13
1
-21
/
+124
*
Integrating barrier buffers.
Alan Mishchenko
2014-12-13
2
-1
/
+14
*
Integrating barrier buffers.
Alan Mishchenko
2014-12-11
2
-5
/
+24
*
Converting AIG with MUXes into a logic network.
Alan Mishchenko
2014-12-10
2
-16
/
+53
*
New flavor of DSD-friendly 'eliminate'.
Alan Mishchenko
2014-12-09
3
-4
/
+154
*
Integrating barrier buffers.
Alan Mishchenko
2014-12-08
13
-20
/
+118
*
Changes to the parser.
Alan Mishchenko
2014-12-04
6
-283
/
+560
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