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yosys-experimental
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Age
Files
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*
Created new abstraction package from the code that was all over the place.
Alan Mishchenko
2012-09-15
2
-470
/
+13
*
Prepared &gla to try abstracting and proving concurrently.
Alan Mishchenko
2012-09-14
3
-15
/
+4
*
Prepared &gla to try abstracting and proving concurrently.
Alan Mishchenko
2012-09-14
1
-9
/
+12
*
Prepared &gla to try abstracting and proving concurrently.
Alan Mishchenko
2012-09-14
1
-2
/
+18
*
Scalable gate-level abstraction.
Alan Mishchenko
2012-09-11
1
-9
/
+30
*
Added -C to command line for running commands, then staying in interactive mode
Niklas Een
2012-09-11
1
-28
/
+39
*
Fixing Verilog writer's way of writing module names.
Alan Mishchenko
2012-09-11
1
-1
/
+1
*
Unified print-out of property failures produced by all engines.
Alan Mishchenko
2012-09-09
1
-5
/
+5
*
Added switch '-p' to '&gla -n' to use full proof for UNSAT core computation (...
Alan Mishchenko
2012-09-09
1
-2
/
+6
*
Started CEX minimization procedure.
Alan Mishchenko
2012-09-08
1
-0
/
+96
*
Updating &gla_refine to perform suffic refinement.
Alan Mishchenko
2012-09-07
1
-4
/
+17
*
Updating &gla_refine to perform suffic refinement.
Alan Mishchenko
2012-09-07
1
-5
/
+18
*
Integrated new fast semi-canonical form for Boolean functions up to 16 inputs.
Alan Mishchenko
2012-09-06
1
-2
/
+2
*
Integrated new fast semi-canonical form for Boolean functions up to 16 inputs.
Alan Mishchenko
2012-09-06
4
-28
/
+70
*
Added switch 'dch -r' to skip choices with structural support redundancy.
Alan Mishchenko
2012-09-05
1
-2
/
+6
*
Added error message when the user is trying 'dsat' for multi-output comb miters.
Alan Mishchenko
2012-09-05
1
-2
/
+2
*
Added new command &gla_shrink.
Alan Mishchenko
2012-09-04
2
-2
/
+95
*
Better batch mode printout.
Alan Mishchenko
2012-09-04
1
-1
/
+1
*
Enabled recording the name of the file GIA is coming from.
Alan Mishchenko
2012-09-04
2
-0
/
+3
*
Added switch &srm -A <file> for dumping SRM into a user-specified file.
Alan Mishchenko
2012-09-02
1
-10
/
+21
*
Fixing the way constants are written into mapped Verilog files.
Alan Mishchenko
2012-08-31
1
-0
/
+5
*
Handling constant nodes in gate sizing.
Alan Mishchenko
2012-08-30
1
-0
/
+3
*
New package to read/write a subset of Liberty for STA.
Alan Mishchenko
2012-08-29
1
-0
/
+3
*
Added an API to convert a multi-output PLA into a shared AIG.
Alan Mishchenko
2012-08-29
3
-25
/
+107
*
Ensured that SC mapped network is always in a topo order.
Alan Mishchenko
2012-08-28
1
-1
/
+14
*
Added buffering based on combinational merging.
Alan Mishchenko
2012-08-28
3
-5
/
+42
*
Bug fix: abstraction commands not properly updating status when dumping inter...
Alan Mishchenko
2012-08-28
3
-3
/
+3
*
Added precomputation of TFO ordering for incremental network updates.
Alan Mishchenko
2012-08-27
3
-0
/
+118
*
Improved printout of command history.
Alan Mishchenko
2012-08-27
4
-2
/
+31
*
Added features 'map -M <float>' to control the use of large gates.
Alan Mishchenko
2012-08-27
2
-9
/
+32
*
Compiler warnings.
Alan Mishchenko
2012-08-26
1
-1
/
+1
*
Added switch '&gla -m' to dump original miter with the abstraction map.
Alan Mishchenko
2012-08-26
1
-2
/
+6
*
Added recording history of used commands into file 'abc.history' (Windows only).
Alan Mishchenko
2012-08-25
1
-1
/
+6
*
Added recording history of used commands into file 'abc.history' (Windows only).
Alan Mishchenko
2012-08-25
2
-12
/
+9
*
Added recording history of used commands into file 'abc.history' (Windows only).
Alan Mishchenko
2012-08-25
3
-5
/
+12
*
Several improvements to command 'testnpn'.
Alan Mishchenko
2012-08-25
3
-44
/
+58
*
Compiler warnings.
Alan Mishchenko
2012-08-24
1
-1
/
+1
*
New package to read/write a subset of Liberty for STA.
Alan Mishchenko
2012-08-24
2
-0
/
+5
*
Added recording history of used commands into file 'abc.history' (Windows only).
Alan Mishchenko
2012-08-24
4
-28
/
+61
*
Added recording history of used commands into file 'abc.history' (Windows only).
Alan Mishchenko
2012-08-24
6
-28
/
+80
*
Changed command 'sim' to work with a miter by default (replace 'sim -m' by 's...
Alan Mishchenko
2012-08-24
1
-1
/
+1
*
Added simulation of comb circuits with user-specified patterns in command 'sim'.
Alan Mishchenko
2012-08-24
2
-128
/
+46
*
Added new algorithm for NPN semi-canonical form computation.
Alan Mishchenko
2012-08-23
2
-3
/
+23
*
Compiler warnings.
Alan Mishchenko
2012-08-09
2
-13
/
+13
*
Compiler warnings.
Alan Mishchenko
2012-08-09
1
-1
/
+1
*
New command 'testnpn' to compare semi-canonical forms.
Alan Mishchenko
2012-08-08
4
-12
/
+335
*
Changing the default value '&gla -n' to the opposite.
Alan Mishchenko
2012-08-06
1
-1
/
+1
*
Scalable gate-level abstraction.
Alan Mishchenko
2012-08-03
1
-13
/
+14
*
Scalable gate-level abstraction.
Alan Mishchenko
2012-08-02
1
-2
/
+2
*
Scalable gate-level abstraction.
Alan Mishchenko
2012-08-02
1
-2
/
+6
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