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* Bug with in signed MUX.Alan Mishchenko2015-06-141-8/+11
* Bug with in signed MUX.Alan Mishchenko2015-06-121-2/+4
* Sequential word-level simulator for Wlc_Ntk_t.Alan Mishchenko2015-06-046-4/+266
* Bug fix in %read_smt and prevent crash of &cec if there is no current AIG.Alan Mishchenko2015-04-271-4/+14
* Fix inconsistency between operators and symbols in Wlc_Ntk_t.Alan Mishchenko2015-04-252-37/+38
* Suggested fixes to compile with 'gcc -x c++'.Alan Mishchenko2015-04-241-2/+2
* Scalable SOP manipulation package.Alan Mishchenko2015-03-181-0/+1
* Several bug fixes and silencing requests.Alan Mishchenko2015-03-161-3/+3
* Support for representing programmable cell configuration data.Alan Mishchenko2015-03-081-1/+1
* Bug fix WLC package (reusing name buffer, resulting in wrong print-outs).Alan Mishchenko2015-03-031-3/+2
* Improvements to the SMTLIB parser.Alan Mishchenko2015-02-282-533/+687
* Adding fflush() to make sure stdout responses appear on time.Alan Mishchenko2015-02-201-0/+2
* Modifications to read SMTLIB file from stdin.Alan Mishchenko2015-02-181-1/+0
* Modifications to read SMTLIB file from stdin.Alan Mishchenko2015-02-182-27/+18
* Modifications to read SMTLIB file from stdin.Alan Mishchenko2015-02-181-1/+1
* Modifications to read SMTLIB file from stdin.Alan Mishchenko2015-02-186-101/+264
* Modifications to read SMTLIB file from stdin.Alan Mishchenko2015-02-155-70/+214
* Several improvements to CBA data-structure.Alan Mishchenko2015-02-131-1/+0
* Modifications to read SMTLIB file from stdin.Alan Mishchenko2015-02-114-11/+75
* Fixed a typo in variable names.Alan Mishchenko2015-02-071-9/+9
* Added SMT parser for Wlc_Ntk_t.Alan Mishchenko2015-02-076-28/+725
* Several ongoing changes.Alan Mishchenko2015-01-261-1/+1
* Outputting initial state in Wlc_Ntk_t.Alan Mishchenko2015-01-261-28/+25
* Outputting initial state in Wlc_Ntk_t.Alan Mishchenko2015-01-254-20/+71
* Fix in deriving the init values for Wlc_Ntk_t.Alan Mishchenko2015-01-221-0/+2
* Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t.Alan Mishchenko2015-01-212-2/+2
* Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t.Alan Mishchenko2015-01-214-7/+72
* Integrating barrier buffers.Alan Mishchenko2014-12-081-1/+1
* Added and verified bit-blasting of power operator.Alan Mishchenko2014-11-301-0/+32
* Induced bug fix in bitblasting of rotation operator.Alan Mishchenko2014-11-291-1/+2
* Merging two branches.Alan Mishchenko2014-11-172-1/+3
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| * Bug fix in abstracting boxes.Alan Mishchenko2014-11-172-1/+3
* | AND/OR bug in the UIF computation.Alan Mishchenko2014-11-171-1/+1
|/
* Improvements to word-level network package.Alan Mishchenko2014-11-141-2/+2
* Improvements to word-level network package.Alan Mishchenko2014-11-141-2/+2
* Improvements to word-level network package.Alan Mishchenko2014-11-148-128/+472
* Enabling AIGs with boxes for word-level and sequential designs.Alan Mishchenko2014-11-141-4/+5
* Enabling AIGs with boxes for word-level and sequential designs.Alan Mishchenko2014-11-135-16/+151
* Bug fix in blasting MUX with different ranges of inputs and the output.Alan Mishchenko2014-11-101-2/+2
* Improvements to the parser.Alan Mishchenko2014-10-101-7/+86
* Bug fix in the bit-blaster.Alan Mishchenko2014-10-101-3/+3
* Bug fix in Verilog writer.Alan Mishchenko2014-10-021-8/+8
* Improvements to bit-blaster.Alan Mishchenko2014-10-012-23/+88
* Improvements to bit-blaster.Alan Mishchenko2014-09-301-1/+1
* Improvements to bit-blaster.Alan Mishchenko2014-09-302-73/+117
* Renaming DSD commands (dsd_tune -> dsd_match; dsd_clean -> dsd_filter).Alan Mishchenko2014-09-281-1/+1
* Support for sequential designs in word-level Verilog.Alan Mishchenko2014-09-265-79/+196
* Enabling print-out, for each operator, of the percetage of AND nodes after bi...Alan Mishchenko2014-09-254-14/+35
* Printing node type statistics.Alan Mishchenko2014-09-241-33/+57
* Printing node type statistics.Alan Mishchenko2014-09-241-10/+10
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