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Author
Age
Files
Lines
*
add an option to write_cex to write the CEX in AIGER 1.9 format.
Baruch Sterin
2014-05-12
1
-1
/
+11
*
Added dumping original object names into a file.
Alan Mishchenko
2014-04-26
1
-2
/
+12
*
Renamed Abc_Lib_t into Abc_Des_t and removed some dead code.
Alan Mishchenko
2014-04-09
3
-249
/
+17
*
Better CEX minimization and renaming of write_counter into write_cex.
Alan Mishchenko
2014-04-04
1
-12
/
+27
*
Adding functionally observable fault testing.
Alan Mishchenko
2014-03-31
1
-2
/
+5
*
Improving network visualization in show/&show.
Alan Mishchenko
2014-03-28
1
-2
/
+26
*
Adding barrier buffers.
Alan Mishchenko
2014-03-18
3
-11
/
+33
*
Adding barrier buffers.
Alan Mishchenko
2014-03-16
3
-21
/
+51
*
Changes to LUT mappers.
Alan Mishchenko
2014-03-09
1
-0
/
+4
*
Adding check for the presence of precomputed data.
Alan Mishchenko
2013-12-29
1
-0
/
+5
*
New command &write_cnf.
Alan Mishchenko
2013-12-18
1
-0
/
+66
*
Bug fixes in the above patches.
Alan Mishchenko
2013-12-03
1
-4
/
+4
*
Suggested patch of AIG writers.
Alan Mishchenko
2013-12-03
1
-30
/
+106
*
Bug fix in writing constants in write_verilog.
Alan Mishchenko
2013-11-21
1
-1
/
+1
*
Compiler warnings.
Alan Mishchenko
2013-10-17
1
-4
/
+8
*
Debugging and finetuning the flow.
Alan Mishchenko
2013-09-17
2
-1
/
+3
*
Unifying standard cell library representations.
Alan Mishchenko
2013-09-17
1
-1
/
+1
*
Adding switch 'ps -s' to skip counting buffers/inverters as nodes.
Alan Mishchenko
2013-09-02
1
-2
/
+0
*
Removing some old useless code.
Alan Mishchenko
2013-09-02
1
-4
/
+0
*
Removing some old useless code.
Alan Mishchenko
2013-09-02
2
-257
/
+2
*
Adding support for input slew and output capacitance to timer and gate-sizer ...
Alan Mishchenko
2013-07-24
1
-2
/
+20
*
Tuning standard-cell mapping flow.
Alan Mishchenko
2013-07-23
1
-1
/
+1
*
Improvements to post-mapping re-sizing.
Alan Mishchenko
2013-07-21
1
-14
/
+16
*
Memory leaks.
Alan Mishchenko
2013-07-21
1
-1
/
+1
*
Adding support for input slew (.input_drive) and output capacitance (.output_...
Alan Mishchenko
2013-07-21
2
-0
/
+211
*
Adding a wrapper around clock() for more accurate time counting in ABC.
Alan Mishchenko
2013-05-27
1
-18
/
+18
*
New MFS package.
Alan Mishchenko
2013-05-24
1
-4
/
+4
*
Commenting assertion that does not hold in AIGER 1.9, accoring to Baruch Sterin.
Alan Mishchenko
2013-05-13
1
-1
/
+1
*
Enabled 'cec' to be applied to networks derived from BLIF with EXDCs.
Alan Mishchenko
2013-04-18
1
-3
/
+4
*
Enabled reading the EXDC network by the default BLIF reader.
Alan Mishchenko
2013-04-18
2
-5
/
+29
*
Fixing both AIGER readers (read_aiger and &r) to work with AIGER 1.9 (except ...
Alan Mishchenko
2013-04-18
1
-2
/
+8
*
Fixing both AIGER readers (read_aiger and &r) to work with AIGER 1.9 (except ...
Alan Mishchenko
2013-04-17
1
-4
/
+4
*
Bug fix in 'write_pla'.
Alan Mishchenko
2013-04-15
1
-1
/
+1
*
Improvements to the hierarchy/timing manager.
Alan Mishchenko
2013-03-05
1
-0
/
+2
*
Fixing compilation problems on Linux-32 related to constants of type unsigned...
Alan Mishchenko
2013-01-30
1
-12
/
+12
*
Fixing C++ compilation issues.
Alan Mishchenko
2013-01-08
1
-0
/
+3
*
Improvements to LMS code.
Alan Mishchenko
2012-11-06
1
-2
/
+2
*
Adding binary file dumping for truth tables.
Alan Mishchenko
2012-10-25
1
-1
/
+1
*
Adding binary file dumping for truth tables.
Alan Mishchenko
2012-10-25
1
-4
/
+18
*
Added hierarchical BLIF output for mapping with LUT structures (write_blif -a...
Alan Mishchenko
2012-10-24
3
-15
/
+296
*
Bug fix in hierarchical BLIF reader.
Alan Mishchenko
2012-10-11
1
-3
/
+2
*
Added command to transform GIA into the file with truth tables for each output.
Alan Mishchenko
2012-10-10
1
-0
/
+77
*
Making explicit cast to 64-bit unsigned in a few places.
Alan Mishchenko
2012-10-09
1
-1
/
+1
*
C++ portability changes.
Alan Mishchenko
2012-10-03
1
-1
/
+1
*
Replacing 'st_table' by 'st__table' to resolve linker problems.
Alan Mishchenko
2012-09-29
1
-1
/
+1
*
Cleaned up interfaces of genlib/liberty/supergate reading/writing.
Alan Mishchenko
2012-09-25
1
-5
/
+18
*
Changed printouts in a few places in supergate computation.
Alan Mishchenko
2012-09-24
1
-0
/
+2
*
Added simplification before the concurrent call to PDR.
Alan Mishchenko
2012-09-20
1
-2
/
+2
*
Modified 'read' to read all types of libraries (genlib, liberty, scl).
Alan Mishchenko
2012-09-20
1
-0
/
+2
*
Modified 'read' to read all types of libraries (genlib, liberty, scl).
Alan Mishchenko
2012-09-20
2
-2
/
+17
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