summaryrefslogtreecommitdiffstats
path: root/src/aig
Commit message (Expand)AuthorAgeFilesLines
* Adding MAJ gate to GIA package.Alan Mishchenko2014-10-262-0/+20
* New command &satenum to enumerate SAT assignments of a miter in a naive way.Alan Mishchenko2014-10-251-0/+59
* Bug fix in seq synthesis due to resent code restructuring.Alan Mishchenko2014-10-212-4/+4
* Adding switch &qbf -q to quantify functional variables.Alan Mishchenko2014-10-201-2/+1
* Adding switch &qbf -q to quantify functional variables.Alan Mishchenko2014-10-201-1/+41
* Improved QBF solver.Alan Mishchenko2014-10-181-19/+94
* Improved QBF solver.Alan Mishchenko2014-10-181-10/+25
* Improved QBF solver.Alan Mishchenko2014-10-182-0/+305
* MUX decomposition during mapping.Alan Mishchenko2014-10-131-5/+19
* MUX decomposition during mapping.Alan Mishchenko2014-10-122-9/+17
* MUX decomposition during mapping.Alan Mishchenko2014-10-121-7/+10
* Recommended changes for portability.Alan Mishchenko2014-10-122-4/+39
* MUX decomposition during mapping.Alan Mishchenko2014-10-111-25/+121
* Deriving network in terms of programmable cells.Alan Mishchenko2014-10-111-5/+12
* Correction to the patch to compile with Visual Studio.Alan Mishchenko2014-10-101-1/+1
* Suggested patch for type-punned warningsAlan Mishchenko2014-10-102-6/+16
* Small changes.Alan Mishchenko2014-10-081-8/+8
* Compiler warnings.Alan Mishchenko2014-10-081-1/+1
* Detection of threshold functions.Alan Mishchenko2014-10-081-9/+11
* Updates to &flow and &flow2.Alan Mishchenko2014-10-051-9/+9
* Deriving cell mapping with &if -kz.Alan Mishchenko2014-10-044-18/+73
* Deriving AIG after cell mapping.Alan Mishchenko2014-10-031-0/+29
* Adding options to &flow.Alan Mishchenko2014-09-291-8/+10
* Adding options to &flow2.Alan Mishchenko2014-09-291-4/+4
* Adding options to &flow2.Alan Mishchenko2014-09-291-5/+5
* Adding options to &flow.Alan Mishchenko2014-09-291-17/+17
* Adding out-of-bounds checks to AIGER readers.Alan Mishchenko2014-09-281-1/+1
* Adding features to CNF generation.Alan Mishchenko2014-09-281-2/+2
* Added switch -t to &flow2.Alan Mishchenko2014-09-241-5/+5
* Extending &cec to take a single-output miter (usage of switch -d has changed!).Alan Mishchenko2014-09-232-0/+26
* Adding switch to enable SOP balancing in '&flow2'.Alan Mishchenko2014-09-211-10/+21
* Tuning the flow scripts.Alan Mishchenko2014-09-201-1/+1
* Tuning the flow scripts.Alan Mishchenko2014-09-201-5/+69
* Tuning the flow scripts.Alan Mishchenko2014-09-201-124/+173
* Concurrency for Boolean matching.Alan Mishchenko2014-09-181-2/+10
* Spurious assertion.Alan Mishchenko2014-09-171-1/+1
* New choice computation.Alan Mishchenko2014-09-161-3/+123
* Code restructuring.Alan Mishchenko2014-09-165-316/+373
* Updating timing info during normalization.Alan Mishchenko2014-09-101-1/+1
* Updating timing info during normalization.Alan Mishchenko2014-09-101-1/+3
* Bug fix in transferring timing info.Alan Mishchenko2014-09-091-1/+1
* Tuning LUT mapping flow.Alan Mishchenko2014-08-281-1/+4
* Tuning LUT mapping flow.Alan Mishchenko2014-08-271-3/+5
* Tuning LUT mapping flow.Alan Mishchenko2014-08-271-0/+119
* Improvements to DSD balancing.Alan Mishchenko2014-08-272-6/+6
* Adding commands to save/load best network.Alan Mishchenko2014-08-264-2/+176
* Improvements to the timing manager.Alan Mishchenko2014-08-252-7/+5
* Improving GIA interfaces for some procedures.Alan Mishchenko2014-08-257-53/+69
* Correcting incorrect handling of timing in several &-commands.Alan Mishchenko2014-08-255-43/+55
* Improving print-out of 'dsd -p'.Alan Mishchenko2014-08-221-0/+35