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* Supporting edges in delay-optimization in &satlut.Alan Mishchenko2016-04-071-17/+44
* Supporting edges in delay-optimization in &satlut.Alan Mishchenko2016-04-074-20/+231
* Supporting edges in delay-optimization in &satlut.Alan Mishchenko2016-04-076-145/+501
* Supporting edge information during mapping.Alan Mishchenko2016-04-065-0/+295
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-043-110/+207
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-041-150/+249
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-043-18/+97
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-032-79/+303
* Enabling native Gia visualization in &show.Alan Mishchenko2016-04-033-2/+376
* Windowing for technology mapping.Alan Mishchenko2016-03-307-183/+450
* Windowing for technology mapping.Alan Mishchenko2016-03-295-13/+432
* Procedure to check inductive invariant for Gia package.Alan Mishchenko2016-03-211-0/+61
* Adding support for a different bit-blasting of a multiplier and squarer.Alan Mishchenko2016-02-133-1/+572
* Experiments with SAT-based mapping.Alan Mishchenko2016-02-082-94/+175
* Experiments with SAT-based mapping.Alan Mishchenko2016-02-073-0/+631
* New command to dump LUT network.Alan Mishchenko2016-01-163-0/+135
* Experiments with SAT-based mapping.Alan Mishchenko2016-01-141-50/+83
* Experiments with SAT-based mapping.Alan Mishchenko2016-01-101-0/+155
* Consolidating timing manager Scl_Con_t and propagating changes.Alan Mishchenko2016-01-071-10/+8
* Adding switch &miter -x for XORs outputs of two word-level POs.Alan Mishchenko2016-01-062-0/+32
* Fixing last-minute bug fix in &nf.Alan Mishchenko2016-01-051-2/+2
* Buf fix in floating time reporting.Alan Mishchenko2016-01-051-20/+21
* Fix in &nf for the case when PO can be driven by an inverter.Alan Mishchenko2016-01-051-0/+5
* Fix in &nf for the case when PO can be driven by an inverter.Alan Mishchenko2016-01-051-0/+30
* Migrating to using 32-bit timing representation in &nf.Alan Mishchenko2016-01-051-151/+148
* Migrating back to using 'float' in area-flow computation in &nf.Alan Mishchenko2016-01-052-69/+76
* g++ compiler warnings.Alan Mishchenko2015-11-082-3/+2
* Improvements to 'satclp' (unfinished).Alan Mishchenko2015-11-061-0/+2
* silence clang errors when compiling as C++Baruch Sterin2015-11-051-1/+1
* Adding procedure Abc_NtkSetAndGateDelay().Alan Mishchenko2015-11-041-0/+3
* Improvements to 'satclp'.Alan Mishchenko2015-10-282-0/+42
* Better logic cone proprocessor for 'satclp' to reduce runtime.Alan Mishchenko2015-10-251-0/+255
* Added several knobs to control QoR in &nf.Alan Mishchenko2015-10-201-4/+2
* Added several knobs to control QoR in &nf.Alan Mishchenko2015-10-202-27/+76
* Code simplification and improvements in &nf.Alan Mishchenko2015-10-191-129/+85
* Fix C++ compilation errorsBaruch Sterin2015-10-161-0/+4
* Adding support for black boxes in extended AIG.Alan Mishchenko2015-10-045-36/+95
* Adding support for flop init-states in extended AIG.Alan Mishchenko2015-10-048-2/+66
* Bug fix in propagating required times in &nf (another issue).Alan Mishchenko2015-10-011-10/+4
* Bug fix in propagating required times in &nf.Alan Mishchenko2015-10-011-2/+2
* Naive LUT packing algorithm (command &pack).Alan Mishchenko2015-09-302-0/+208
* Experiments with LUT structure mapping.Alan Mishchenko2015-09-302-104/+290
* Experiments with LUT structure mapping.Alan Mishchenko2015-09-291-36/+17
* Experiments with LUT structure mapping.Alan Mishchenko2015-09-291-84/+358
* Experiments with LUT structure mapping.Alan Mishchenko2015-09-281-17/+43
* Experiments with LUT structure mapping.Alan Mishchenko2015-09-281-57/+271
* Experiments with LUT structure mapping.Alan Mishchenko2015-09-271-3/+3
* Experiments with LUT structure mapping.Alan Mishchenko2015-09-273-0/+1003
* Bug fix in &nf and in propagating timing info.Alan Mishchenko2015-09-271-7/+12
* New command &rexwalk.Alan Mishchenko2015-09-261-0/+2
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