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path: root/src/aig/miniaig
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* Experiments with word-level data structures.Alan Mishchenko2022-01-211-0/+4
* Compiler warnings.Alan Mishchenko2021-11-052-22/+37
* Procedure to printout MiniLUT.Alan Mishchenko2021-09-111-1/+31
* Compiler warnings.Alan Mishchenko2021-08-231-2/+2
* Supporting simple operators in NDR.Alan Mishchenko2021-08-052-9/+49
* Adding new API to MiniAIG.Alan Mishchenko2020-04-291-2/+2
* Adding new API to MiniAIG.Alan Mishchenko2020-04-291-0/+58
* Enable blasting LUTs in NDR.Alan Mishchenko2019-11-181-7/+44
* Assering valid fanins during MiniLUT construction.Alan Mishchenko2019-06-281-0/+2
* Supporting LUT in NDR and WLC.Alan Mishchenko2019-04-051-0/+1
* Making 'ndr.h' fully independent of other ABC data-structures.Alan Mishchenko2019-03-231-12/+18
* Fixing some warnings by adding cast from 'int' to 'size_t' in memset, memcpy,...Alan Mishchenko2019-03-051-2/+2
* Compiler warning.Alan Mishchenko2019-01-301-1/+1
* Experiments with retiming (adding new APIs).Alan Mishchenko2018-12-091-0/+2
* Experiments with word-level retiming.Alan Mishchenko2018-09-301-2/+5
* Extending NDR to support adder/subtractor.Alan Mishchenko2018-06-141-0/+36
* Bug fix (accessing unassigned memory).Alan Mishchenko2018-06-121-1/+7
* Compiler warnings.Alan Mishchenko2018-06-081-2/+2
* Supporting the decoder primitive in NDR and bit-blasting.Alan Mishchenko2018-06-051-0/+32
* Supporting NMUX and SEL in NDR.Alan Mishchenko2018-05-241-0/+55
* Updates to NDR format (bug fixes).Alan Mishchenko2018-05-032-21/+29
* Updates to NDR format (flops, memories, signed mult, etc).Alan Mishchenko2018-04-292-61/+244
* Adding adder-subtractor primitive.Alan Mishchenko2018-04-111-1/+3
* Adding support for adders with carry-in in WLC and NDR.Alan Mishchenko2018-02-241-0/+98
* Improvements to NDR to represent hierarchical designs.Alan Mishchenko2018-02-051-2/+2
* Improvements to NDR to represent hierarchical designs.Alan Mishchenko2018-02-051-1/+1
* Improvements to NDR to represent hierarchical designs.Alan Mishchenko2018-02-051-47/+198
* Adding support of reading and writing designs using a new internal format.Alan Mishchenko2018-01-281-1/+2
* Adding API to dump MiniAIG into a Verilog file and other small changes.Alan Mishchenko2017-10-221-7/+72
* Merged in boschmitt/abc (pull request #77)Alan Mishchenko2017-07-041-8/+8
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| * Small fixes for C++ compilersBruno Schmitt2017-07-041-8/+8
* | Synchronizing various data-structures.Alan Mishchenko2017-07-041-3/+3
|/
* Compiler warnings.Alan Mishchenko2017-04-282-16/+16
* Compiler warnings.Alan Mishchenko2017-04-281-5/+5
* Experiments with new network data-structure.Alan Mishchenko2017-03-191-3/+3
* Experiments with new network data-structure.Alan Mishchenko2017-03-192-134/+268
* Small changes.Alan Mishchenko2017-03-161-2/+24
* Moving global declarations into 'abcapi.h' and moving it into 'main' package.Alan Mishchenko2017-03-021-84/+0
* Network interface exploration.Alan Mishchenko2017-03-021-0/+614
* Adding two external APIs.Alan Mishchenko2017-01-051-0/+2
* Correcting API names for inputing/outputing MiniLut.Alan Mishchenko2016-12-231-3/+3
* Adding support for minimalistic representation of LUT mapping.Alan Mishchenko2016-12-051-0/+4
* Compiler warnings.Alan Mishchenko2016-12-051-2/+2
* Adding support for minimalistic representation of LUT mapping.Alan Mishchenko2016-12-052-0/+289
* Adding procedure Abc_NtkSetAndGateDelay().Alan Mishchenko2015-11-041-0/+3
* Fix C++ compilation errorsBaruch Sterin2015-10-161-0/+4
* Adding API to set the number of flops after reading MiniAIG.Alan Mishchenko2015-09-241-0/+1
* Adding APIs to specified input/output arrival/required times.Alan Mishchenko2014-02-121-0/+4
* Compiler warnings.Alan Mishchenko2013-10-301-1/+1
* Adding API to return the mapped network.Alan Mishchenko2013-09-221-0/+4
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