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* Fixes and adjustments for the edge computation flow.Alan Mishchenko2016-07-151-1/+2
* Small fixes and improvements in reporting node counts.Alan Mishchenko2016-07-151-2/+2
* Adding a debug way to print cuts used in the CNF-generator.Alan Mishchenko2016-07-131-0/+9
* Removing verbose output in &cec and &syn4.Alan Mishchenko2016-07-132-3/+3
* Experiments with edge-based mapping (bug fix).Alan Mishchenko2016-07-021-6/+18
* Experiments with edge-based mapping.Alan Mishchenko2016-06-292-26/+173
* Experiments with edge-based mapping.Alan Mishchenko2016-06-171-71/+74
* Experiments with edge-based mapping.Alan Mishchenko2016-06-153-3/+882
* Improvement to CNF encoding of cardinality constraints proposed by Mathias So...Alan Mishchenko2016-06-071-0/+6
* Small changes for today's experiments.Alan Mishchenko2016-06-033-7/+16
* Enabling AIGs without structural hashing (&get -c to import logic network).Alan Mishchenko2016-05-202-10/+13
* Enabling AIGs without structural hashing.Alan Mishchenko2016-05-202-2/+2
* Enabling AIGs without structural hashing.Alan Mishchenko2016-05-206-18/+29
* Switch &miter -y to convert a two-word miter into a dual-output miter.Alan Mishchenko2016-05-202-0/+32
* Enabling AIGs without structural hashing.Alan Mishchenko2016-05-205-19/+25
* Bug fix in &demiter.Alan Mishchenko2016-05-161-16/+9
* Factoring out library preprocessing code in &nf and putting it elsewhere.Alan Mishchenko2016-05-161-34/+25
* Experiments with CEC for arithmetic circuits.Alan Mishchenko2016-05-114-2/+9
* Invalidate packing after mapping is updated.Alan Mishchenko2016-05-091-0/+1
* Experiments with CEC for arithmetic circuits.Alan Mishchenko2016-05-082-12/+225
* Experiments with CEC for arithmetic circuits.Alan Mishchenko2016-05-0710-1692/+444
* Update to &show to show AIGs with XORs and MUXes (derived by &st -m).Alan Mishchenko2016-05-041-0/+1
* Update to &show to show AIGs with XORs and MUXes (derived by &st -m).Alan Mishchenko2016-05-041-2/+28
* Updating GIG parser.Alan Mishchenko2016-05-011-180/+384
* Fanout restriction in &edge.Alan Mishchenko2016-04-301-11/+33
* Experiments with arithmetic circuits.Alan Mishchenko2016-04-282-0/+290
* Adding option to rehash AIG after mapping.Alan Mishchenko2016-04-2710-18/+16
* Extending &satlut to work for 6-LUTs.Alan Mishchenko2016-04-271-4/+11
* Using seed assignment of edges in &edge.Alan Mishchenko2016-04-273-2/+17
* Improved algo for edge computation.Alan Mishchenko2016-04-241-1/+1
* Improved algo for edge computation.Alan Mishchenko2016-04-242-7/+90
* Improved algo for edge computation.Alan Mishchenko2016-04-231-48/+58
* Improved algo for edge computation.Alan Mishchenko2016-04-226-7/+430
* Experimental algorithm for edge optimization.Alan Mishchenko2016-04-134-1/+360
* Added Exorcism package, reading ESOP (read_pla -x file.esop) and deriving AIG...Alan Mishchenko2016-04-111-10/+45
* Supporting edge information during mapping.Alan Mishchenko2016-04-117-43/+57
* Command &esop to convert AIG into ESOP.Alan Mishchenko2016-04-092-0/+507
* Adding hashing of windows in &satlut.Alan Mishchenko2016-04-071-3/+19
* Adding AIG rehashing after LUT mapping in Gia.Alan Mishchenko2016-04-074-6/+69
* Supporting edges in delay-optimization in &satlut.Alan Mishchenko2016-04-071-17/+44
* Supporting edges in delay-optimization in &satlut.Alan Mishchenko2016-04-074-20/+231
* Supporting edges in delay-optimization in &satlut.Alan Mishchenko2016-04-076-145/+501
* Supporting edge information during mapping.Alan Mishchenko2016-04-065-0/+295
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-043-110/+207
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-041-150/+249
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-043-18/+97
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-032-79/+303
* Enabling native Gia visualization in &show.Alan Mishchenko2016-04-033-2/+376
* Windowing for technology mapping.Alan Mishchenko2016-03-307-183/+450
* Windowing for technology mapping.Alan Mishchenko2016-03-295-13/+432
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