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iCE40/abc
yosys-experimental
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aig
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gia
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giaSatLut.c
Commit message (
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Author
Age
Files
Lines
*
Invalidate packing after mapping is updated.
Alan Mishchenko
2016-05-09
1
-0
/
+1
*
Extending &satlut to work for 6-LUTs.
Alan Mishchenko
2016-04-27
1
-4
/
+11
*
Supporting edge information during mapping.
Alan Mishchenko
2016-04-11
1
-1
/
+1
*
Adding hashing of windows in &satlut.
Alan Mishchenko
2016-04-07
1
-3
/
+19
*
Adding AIG rehashing after LUT mapping in Gia.
Alan Mishchenko
2016-04-07
1
-4
/
+6
*
Supporting edges in delay-optimization in &satlut.
Alan Mishchenko
2016-04-07
1
-17
/
+44
*
Supporting edges in delay-optimization in &satlut.
Alan Mishchenko
2016-04-07
1
-11
/
+86
*
Supporting edges in delay-optimization in &satlut.
Alan Mishchenko
2016-04-07
1
-83
/
+92
*
Improvements to delay-optimization in &satlut.
Alan Mishchenko
2016-04-04
1
-106
/
+203
*
Improvements to delay-optimization in &satlut.
Alan Mishchenko
2016-04-04
1
-150
/
+249
*
Improvements to delay-optimization in &satlut.
Alan Mishchenko
2016-04-04
1
-18
/
+68
*
Improvements to delay-optimization in &satlut.
Alan Mishchenko
2016-04-03
1
-31
/
+230
*
Windowing for technology mapping.
Alan Mishchenko
2016-03-30
1
-79
/
+152
*
Adding support for a different bit-blasting of a multiplier and squarer.
Alan Mishchenko
2016-02-13
1
-0
/
+570