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* Improvements to word-level Verilog parser.Alan Mishchenko2014-09-175-230/+488
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* Spurious assertion.Alan Mishchenko2014-09-171-1/+1
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* Improvements to word-level Verilog parser.Alan Mishchenko2014-09-165-78/+277
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* Support for leakage power in Liberty parser and sizer.Alan Mishchenko2014-09-165-5/+122
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* New choice computation.Alan Mishchenko2014-09-163-22/+197
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* Code restructuring.Alan Mishchenko2014-09-167-322/+432
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* Improvements to Boolean matching.Alan Mishchenko2014-09-162-201/+568
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* Compiler error (duplicate typedef).Alan Mishchenko2014-09-151-1/+0
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* Compiler warnings.Alan Mishchenko2014-09-124-47/+47
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* Replacing tabs with spaces.Alan Mishchenko2014-09-121-1/+1
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* New word-level representation package.Alan Mishchenko2014-09-1215-66/+2276
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* Resetting the random seed in 'sparsify'.Alan Mishchenko2014-09-111-0/+1
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* Updating timing info during normalization.Alan Mishchenko2014-09-101-1/+1
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* Updating timing info during normalization.Alan Mishchenko2014-09-101-1/+3
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* Bug fix in transferring timing info.Alan Mishchenko2014-09-094-6/+67
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* Corner-case bug fix in balancing.Alan Mishchenko2014-09-081-0/+2
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* Added command 'move_names'.Alan Mishchenko2014-08-281-1/+1
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* Added command 'move_names'.Alan Mishchenko2014-08-282-0/+106
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* Tuning LUT mapping flow.Alan Mishchenko2014-08-282-1/+5
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* Tuning LUT mapping flow.Alan Mishchenko2014-08-272-4/+6
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* Compiler warning.Alan Mishchenko2014-08-271-2/+2
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* Tuning LUT mapping flow.Alan Mishchenko2014-08-272-0/+254
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* Improvements BLIF parser.Alan Mishchenko2014-08-273-4/+130
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* Improvements to DSD balancing.Alan Mishchenko2014-08-276-43/+109
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* Adding commands to save/load best network.Alan Mishchenko2014-08-266-9/+342
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* Improvements to the timing manager.Alan Mishchenko2014-08-255-12/+15
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* Improving GIA interfaces for some procedures.Alan Mishchenko2014-08-258-54/+70
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* Correcting incorrect handling of timing in several &-commands.Alan Mishchenko2014-08-257-44/+172
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* Improving print-out of 'dsd -p'.Alan Mishchenko2014-08-224-1/+154
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* Propagating timing support to the new synthesis/mapping commands.Alan Mishchenko2014-08-209-41/+34
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* Extended command &cone to extract timing critical cones.Alan Mishchenko2014-08-193-39/+141
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* Added command 'sparsify' to derive ISF from CSF.Alan Mishchenko2014-08-182-0/+212
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* Changing default CNF generation in &bmc.Alan Mishchenko2014-08-183-1/+9
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* Added DSD-based collapsing &dsd.Alan Mishchenko2014-08-162-2/+2
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* Added DSD-based collapsing &dsd.Alan Mishchenko2014-08-161-2/+3
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* Adding specialized matching to 'if'.Alan Mishchenko2014-08-161-1/+1
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* Added DSD-based collapsing &dsd.Alan Mishchenko2014-08-161-0/+1
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* Adding specialized matching to 'if'.Alan Mishchenko2014-08-166-0/+140
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* Added DSD-based collapsing &dsd.Alan Mishchenko2014-08-165-5/+440
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* Suggested fix to allow .constr files to have empty lines.Alan Mishchenko2014-08-131-0/+2
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* Enabling circuit solver in &fraig.Alan Mishchenko2014-08-126-13/+100
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* Bug fix in &fraig -L <num>.Alan Mishchenko2014-08-123-86/+5
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* Bug fix in &fraig -L <num>.Alan Mishchenko2014-08-125-8/+107
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* Increasing the size of pre-allocated memory in &syn2.Alan Mishchenko2014-08-111-1/+1
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* Adding delay optimization to synthesis script &syn2.Alan Mishchenko2014-08-088-22/+123
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* Enabling cofactoring in the mapper.Alan Mishchenko2014-08-062-2/+23
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* Profiling code for SOP/DSD/LMS balancing.Alan Mishchenko2014-08-041-0/+69
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* Compiler warnings.Alan Mishchenko2014-08-045-11/+67
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* Enabling ISOP-based minimization in 'collapse' if EXDC is available.Alan Mishchenko2014-08-042-2/+35
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* Compiler warnings.Alan Mishchenko2014-08-022-1/+2
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