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iCE40/abc
yosys-experimental
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Age
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*
Improvements to the timing manager.
Alan Mishchenko
2014-08-25
5
-12
/
+15
*
Improving GIA interfaces for some procedures.
Alan Mishchenko
2014-08-25
8
-54
/
+70
*
Correcting incorrect handling of timing in several &-commands.
Alan Mishchenko
2014-08-25
7
-44
/
+172
*
Improving print-out of 'dsd -p'.
Alan Mishchenko
2014-08-22
4
-1
/
+154
*
Propagating timing support to the new synthesis/mapping commands.
Alan Mishchenko
2014-08-20
9
-41
/
+34
*
Extended command &cone to extract timing critical cones.
Alan Mishchenko
2014-08-19
3
-39
/
+141
*
Added command 'sparsify' to derive ISF from CSF.
Alan Mishchenko
2014-08-18
2
-0
/
+212
*
Changing default CNF generation in &bmc.
Alan Mishchenko
2014-08-18
3
-1
/
+9
*
Added DSD-based collapsing &dsd.
Alan Mishchenko
2014-08-16
2
-2
/
+2
*
Added DSD-based collapsing &dsd.
Alan Mishchenko
2014-08-16
1
-2
/
+3
*
Adding specialized matching to 'if'.
Alan Mishchenko
2014-08-16
1
-1
/
+1
*
Added DSD-based collapsing &dsd.
Alan Mishchenko
2014-08-16
1
-0
/
+1
*
Adding specialized matching to 'if'.
Alan Mishchenko
2014-08-16
6
-0
/
+140
*
Added DSD-based collapsing &dsd.
Alan Mishchenko
2014-08-16
5
-5
/
+440
*
Suggested fix to allow .constr files to have empty lines.
Alan Mishchenko
2014-08-13
1
-0
/
+2
*
Enabling circuit solver in &fraig.
Alan Mishchenko
2014-08-12
6
-13
/
+100
*
Bug fix in &fraig -L <num>.
Alan Mishchenko
2014-08-12
3
-86
/
+5
*
Bug fix in &fraig -L <num>.
Alan Mishchenko
2014-08-12
5
-8
/
+107
*
Increasing the size of pre-allocated memory in &syn2.
Alan Mishchenko
2014-08-11
1
-1
/
+1
*
Adding delay optimization to synthesis script &syn2.
Alan Mishchenko
2014-08-08
8
-22
/
+123
*
Enabling cofactoring in the mapper.
Alan Mishchenko
2014-08-06
2
-2
/
+23
*
Profiling code for SOP/DSD/LMS balancing.
Alan Mishchenko
2014-08-04
1
-0
/
+69
*
Compiler warnings.
Alan Mishchenko
2014-08-04
5
-11
/
+67
*
Enabling ISOP-based minimization in 'collapse' if EXDC is available.
Alan Mishchenko
2014-08-04
2
-2
/
+35
*
Compiler warnings.
Alan Mishchenko
2014-08-02
2
-1
/
+2
*
Profiling code for SOP/DSD/LMS balancing.
Alan Mishchenko
2014-08-02
5
-0
/
+465
*
Changes to the hopelessly limited Verilog parser to skip one-bit bit-ranges, ...
Alan Mishchenko
2014-08-02
1
-4
/
+26
*
Small changes.
Alan Mishchenko
2014-07-29
2
-3
/
+4
*
Adding support for standard-cell mapping.
Alan Mishchenko
2014-07-28
5
-10
/
+147
*
Generating abstraction of standard cell library.
Alan Mishchenko
2014-07-26
1
-1
/
+1
*
Generating abstraction of standard cell library.
Alan Mishchenko
2014-07-26
5
-0
/
+397
*
Generating abstraction of standard cell library.
Alan Mishchenko
2014-07-25
8
-19
/
+181
*
Fixing option 'if -G <num>' after changes.
Alan Mishchenko
2014-07-25
3
-10
/
+10
*
Adding message prefix.
Alan Mishchenko
2014-07-24
1
-8
/
+9
*
Bug fix in 'print_gates' due to the mix-up of the inverter.
Alan Mishchenko
2014-07-22
1
-1
/
+1
*
Undoing previous change to SOP balancing.
Alan Mishchenko
2014-07-22
1
-6
/
+6
*
Small improvement to SOP balancing.
Alan Mishchenko
2014-07-22
1
-4
/
+16
*
Small changes.
Alan Mishchenko
2014-07-21
2
-36
/
+43
*
Adding new command &sopb for resource-aware SOP balancing.
Alan Mishchenko
2014-07-21
8
-35
/
+408
*
Updates and changes to several packages.
Alan Mishchenko
2014-07-20
12
-40
/
+162
*
Small changes in several packages.
Alan Mishchenko
2014-07-18
2
-2
/
+3
*
Small changes in several packages.
Alan Mishchenko
2014-07-17
2
-2
/
+11
*
Small changes in several packages.
Alan Mishchenko
2014-07-17
4
-4
/
+55
*
Improvements to profiling and printing statistics.
Alan Mishchenko
2014-07-09
3
-23
/
+114
*
Improvements to false path detection.
Alan Mishchenko
2014-07-09
1
-25
/
+21
*
Improvements to false path detection.
Alan Mishchenko
2014-07-08
4
-28
/
+352
*
Experiment with SOP balancing.
Alan Mishchenko
2014-07-02
1
-1
/
+20
*
Compiler warning.
Alan Mishchenko
2014-07-01
1
-1
/
+1
*
Improvements to representation of choices.
Alan Mishchenko
2014-07-01
1
-144
/
+0
*
Improvements to representation of choices.
Alan Mishchenko
2014-07-01
15
-66
/
+259
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