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* Integration of timing manager.Alan Mishchenko2013-01-231-2/+4
* Reintroduced the old abstraction procedure Saig_ManCexAbstractionFlops() form...Alan Mishchenko2013-01-082-31/+162
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-0/+3
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-0/+3
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-0/+3
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-0/+3
* Fixing C++ compilation issues.Alan Mishchenko2013-01-087-11/+13
* Fixing C++ compilation issues.Alan Mishchenko2013-01-086-6/+3
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-3/+3
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-1/+1
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-1/+1
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-9/+9
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-2/+2
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-1/+1
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-3/+3
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-1/+1
* Technology mapper.Alan Mishchenko2013-01-081-0/+1
* Adding support of flops to the conversion of MiniAIG into ABC network.Alan Mishchenko2013-01-082-0/+127
* Technology mapper.Alan Mishchenko2013-01-082-0/+1621
* Technology mapper.Alan Mishchenko2013-01-083-9/+117
* New unrolling manager.Alan Mishchenko2012-12-244-3/+467
* Improvements to DSD manager.Alan Mishchenko2012-12-152-48/+175
* Assembling timing/hierarchy manager from input data.Alan Mishchenko2012-12-154-25/+133
* Assembling timing/hierarchy manager from input data.Alan Mishchenko2012-12-138-129/+170
* Unifification of custom extensions.Alan Mishchenko2012-12-131-1/+1
* Unifification of custom extensions.Alan Mishchenko2012-12-131-2/+2
* Unifification of custom extensions.Alan Mishchenko2012-12-131-3/+3
* Unifification of custom extensions.Alan Mishchenko2012-12-131-14/+14
* Improvements to DSD manager.Alan Mishchenko2012-12-113-44/+79
* Improvements to DSD manager.Alan Mishchenko2012-12-101-19/+21
* Improvements to DSD manager.Alan Mishchenko2012-12-101-185/+93
* Improvements to DSD manager.Alan Mishchenko2012-12-101-134/+46
* Assembling timing/hierarchy manager from input data.Alan Mishchenko2012-12-102-0/+62
* Unifification of custom extensions.Alan Mishchenko2012-12-1027-1147/+813
* Retiring old 'fpga' command and package.Alan Mishchenko2012-12-102-10/+0
* Retiring old 'fpga' command and package.Alan Mishchenko2012-12-102-65/+1
* Renaming If_Lut_t into If_LibLut_t.Alan Mishchenko2012-12-1014-77/+76
* Adding box library.Alan Mishchenko2012-12-1011-16/+678
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-091-2/+2
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-095-9/+18
* Renaming multi-output mode enable switch 'bmc3 -s' to be 'bmc3 -a'.Alan Mishchenko2012-12-091-4/+4
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-092-24/+43
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-0911-85/+91
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-091-1/+9
* Corner-case bug fix in &rpm.Alan Mishchenko2012-12-092-9/+29
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-098-133/+183
* Deriving CEX after phase/tempor/reparam.Alan Mishchenko2012-12-091-1/+1
* Deriving CEX after phase/tempor/reparam.Alan Mishchenko2012-12-096-11/+300
* Deriving CEX after phase/tempor/reparam.Alan Mishchenko2012-12-081-9/+8
* Deriving CEX after phase/tempor/reparam.Alan Mishchenko2012-12-085-32/+227
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