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iCE40/abc
yosys-experimental
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Age
Files
Lines
*
Extending Liberty parser to handle multi-output cells.
Alan Mishchenko
2012-09-19
10
-48
/
+104
*
Extending BLIF parser/write to hangle multi-output cells.
Alan Mishchenko
2012-09-19
15
-136
/
+289
*
Extending Genlib to hangle multi-output cells.
Alan Mishchenko
2012-09-19
3
-57
/
+105
*
Changes to command 'upsize'.
Alan Mishchenko
2012-09-18
3
-66
/
+138
*
Changes to command 'upsize'.
Alan Mishchenko
2012-09-18
8
-47
/
+352
*
Fixing mismatch between declaration of the output value of Extra_CpuTime.
Alan Mishchenko
2012-09-18
3
-5
/
+9
*
Bug fix in bmc3.
Alan Mishchenko
2012-09-17
1
-1
/
+6
*
Bug fix: no need to normalize const0 node.
Alan Mishchenko
2012-09-17
1
-2
/
+2
*
Fixed timeout problem in bmc3 -s.
Alan Mishchenko
2012-09-17
1
-12
/
+7
*
Moving binary IO streams to the vector package.
Alan Mishchenko
2012-09-17
3
-116
/
+116
*
Added delay multipliers to 'map'.
Alan Mishchenko
2012-09-16
2
-8
/
+14
*
Added delay multipliers to 'map'.
Alan Mishchenko
2012-09-16
4
-22
/
+63
*
Improving printouts in 'stime'.
Alan Mishchenko
2012-09-16
5
-10
/
+17
*
Improving printouts in &gla.
Alan Mishchenko
2012-09-16
1
-17
/
+8
*
Improving printouts in &gla.
Alan Mishchenko
2012-09-16
1
-1
/
+1
*
Improving printouts in &gla.
Alan Mishchenko
2012-09-16
3
-11
/
+15
*
Changed a few things in the refinement package of &gla.
Alan Mishchenko
2012-09-16
4
-24
/
+118
*
Forgot to add one file into Windows project.
Alan Mishchenko
2012-09-16
1
-0
/
+4
*
Restructured the code to post-process object used during refinement in &gla.
Alan Mishchenko
2012-09-16
12
-330
/
+351
*
Made abstraction and PDR communicate in-memory rather than through a file.
Alan Mishchenko
2012-09-16
3
-65
/
+59
*
Cleaned 'abc.c' by removing useless procedures.
Alan Mishchenko
2012-09-15
1
-1689
/
+939
*
Created new abstraction package from the code that was all over the place.
Alan Mishchenko
2012-09-15
36
-3582
/
+2270
*
Corrected &gla -a to work as expected.
Alan Mishchenko
2012-09-15
1
-33
/
+52
*
Prepared &gla to try abstracting and proving concurrently.
Alan Mishchenko
2012-09-14
3
-3
/
+7
*
Prepared &gla to try abstracting and proving concurrently.
Alan Mishchenko
2012-09-14
1
-1
/
+1
*
Prepared &gla to try abstracting and proving concurrently.
Alan Mishchenko
2012-09-14
12
-141
/
+147
*
Prepared &gla to try abstracting and proving concurrently.
Alan Mishchenko
2012-09-14
1
-1
/
+1
*
Prepared &gla to try abstracting and proving concurrently.
Alan Mishchenko
2012-09-14
5
-46
/
+166
*
Prepared &gla to try abstracting and proving concurrently.
Alan Mishchenko
2012-09-14
7
-57
/
+213
*
Added new command 'upsize'.
Alan Mishchenko
2012-09-12
7
-44
/
+241
*
Reversed to a buggy version of reduceDB in complete proof-logging, because it...
Alan Mishchenko
2012-09-12
1
-2
/
+2
*
Added code to collect experimental results.
Alan Mishchenko
2012-09-11
2
-2
/
+2
*
Added code to collect experimental results.
Alan Mishchenko
2012-09-11
2
-2
/
+2
*
Added code to collect experimental results.
Alan Mishchenko
2012-09-11
2
-2
/
+2
*
Added code to collect experimental results.
Alan Mishchenko
2012-09-11
2
-4
/
+4
*
Improved topo print-out.
Alan Mishchenko
2012-09-11
1
-0
/
+2
*
Scalable gate-level abstraction.
Alan Mishchenko
2012-09-11
1
-9
/
+30
*
Added -C to command line for running commands, then staying in interactive mode
Niklas Een
2012-09-11
1
-28
/
+39
*
Fixing Verilog writer's way of writing module names.
Alan Mishchenko
2012-09-11
1
-1
/
+1
*
Added code to collect experimental results.
Alan Mishchenko
2012-09-11
2
-2
/
+2
*
Added code to collect experimental results.
Alan Mishchenko
2012-09-11
5
-16
/
+71
*
Commenting out some assertions in the 'map' mapper.
Alan Mishchenko
2012-09-10
1
-4
/
+4
*
Unified print-out of property failures produced by all engines.
Alan Mishchenko
2012-09-09
14
-29
/
+28
*
Disable printing refinement statistics by default.
Alan Mishchenko
2012-09-09
2
-2
/
+2
*
Added switch '-p' to '&gla -n' to use full proof for UNSAT core computation (...
Alan Mishchenko
2012-09-09
3
-4
/
+11
*
Started CEX minimization procedure.
Alan Mishchenko
2012-09-08
2
-26
/
+306
*
Updating &gla_refine to perform suffix refinement.
Alan Mishchenko
2012-09-08
1
-1
/
+1
*
Updating &gla_refine to perform suffix refinement.
Alan Mishchenko
2012-09-08
2
-9
/
+15
*
Started CEX minimization procedure.
Alan Mishchenko
2012-09-08
3
-0
/
+183
*
Updating &gla_refine to perform suffix refinement.
Alan Mishchenko
2012-09-08
1
-6
/
+6
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