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* Adding command &reshape.Alan Mishchenko2021-09-215-23/+73
* Removing unused command.Alan Mishchenko2021-09-214-167/+0
* Various changes.Alan Mishchenko2021-09-218-17/+175
* Improving MiniAIG and name manager.Alan Mishchenko2021-09-165-13/+58
* Further debugging of MiniLUT APIs.Alan Mishchenko2021-09-162-1/+73
* Various changes.Alan Mishchenko2021-09-145-10/+180
* Enable command 'pipe' for pipelining.Alan Mishchenko2021-09-133-15/+15
* Bug fix in MiniLUT code.Alan Mishchenko2021-09-131-1/+1
* Procedure to printout MiniLUT.Alan Mishchenko2021-09-111-1/+31
* Disabling command print_mint when CUDD is not used.Alan Mishchenko2021-09-071-0/+7
* Bug fix in logic optimization.Alan Mishchenko2021-09-061-1/+18
* Bug fix in the timing manager.Alan Mishchenko2021-09-061-28/+30
* Various changes.Alan Mishchenko2021-09-044-9/+12
* Additional MiniLUT API.Alan Mishchenko2021-09-032-0/+18
* Various changes.Alan Mishchenko2021-09-0216-35/+539
* Allow &mfs to work on sequential AIGs.Alan Mishchenko2021-08-241-1/+10
* Compiler warnings.Alan Mishchenko2021-08-239-11/+12
* Adding input/output/flop name reading in command &r.Alan Mishchenko2021-08-224-2/+153
* Support of pair-wise miter and other changes.Alan Mishchenko2021-08-226-4/+582
* Merge pull request #132 from jamesjer/aliasingalanminko2021-08-191-1/+3
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| * Fix violation of C strict aliasing rules.Jerry James2021-08-091-1/+3
* | Merge pull request #133 from twier/inv_get_name_mangling_fixalanminko2021-08-192-9/+43
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| * | Add comment to Wlc_NtkGetInv about vNamesIn's roleTobias Wiersema2021-08-191-0/+2
| * | Fix typo inifity -> infinity in inv_get helpTobias Wiersema2021-08-191-1/+1
| * | Add inv_get -f to read flop names from GIATobias Wiersema2021-08-192-8/+40
* | | Extending &trim to trim structurally equivalent primary outputs.Alan Mishchenko2021-08-193-3/+141
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* | Improving AIG to Verilog converter.Alan Mishchenko2021-08-174-28/+76
* | Suggested changes to collect and pass timing information (unused variable).Alan Mishchenko2021-08-121-1/+1
* | Suggested changes to collect and pass timing information (compiler issues).Alan Mishchenko2021-08-122-8/+6
* | Suggested changes to collect and pass timing information.Alan Mishchenko2021-08-122-13/+64
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* Making &cec support the miter circuit.Alan Mishchenko2021-08-051-0/+14
* Supporting simple operators in NDR.Alan Mishchenko2021-08-054-13/+53
* Adding node ordering options to command &dfs.Alan Mishchenko2021-08-053-29/+45
* Bug fix.Alan Mishchenko2021-08-031-1/+1
* Experiments with LUT mapping for small functions.Alan Mishchenko2021-08-021-1/+0
* Experiments with LUT mapping for small functions.Alan Mishchenko2021-08-024-12/+275
* Experiments with LUT mapping for small functions.Alan Mishchenko2021-08-011-1/+1
* Experiments with LUT mapping for small functions.Alan Mishchenko2021-08-014-32/+255
* Allow retiming to skip some logic.Alan Mishchenko2021-07-314-9/+69
* Upgrading choice computation.Alan Mishchenko2021-07-315-27/+38
* Experiments with cofactoring.Alan Mishchenko2021-07-312-6/+288
* Experimental simulation commands.Alan Mishchenko2021-07-256-67/+575
* Command to move CI/CO names.Alan Mishchenko2021-07-161-2/+3
* Command to move CI/CO names.Alan Mishchenko2021-07-163-7/+237
* Several unrelated changes.Alan Mishchenko2021-07-154-9/+186
* Experiments with LUT mapping for small functions.Alan Mishchenko2021-07-135-4/+479
* Experiments with MUX decomposition.Alan Mishchenko2021-07-111-1/+1
* Experiments with CEC.Alan Mishchenko2021-07-104-9/+171
* Simple AIGER reader/writer.Alan Mishchenko2021-07-091-0/+141
* Experiments with MUX decomposition.Alan Mishchenko2021-07-082-2/+1
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