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-rw-r--r--src/base/io/io.c67
-rw-r--r--src/base/io/io.h2
-rw-r--r--src/base/io/ioReadBaf.c2
-rw-r--r--src/base/io/ioWriteDot.c6
-rw-r--r--src/base/io/ioWriteList.c212
-rw-r--r--src/base/io/module.make1
6 files changed, 286 insertions, 4 deletions
diff --git a/src/base/io/io.c b/src/base/io/io.c
index 1022c882..e5f8b9a1 100644
--- a/src/base/io/io.c
+++ b/src/base/io/io.c
@@ -42,6 +42,7 @@ static int IoCommandWriteCnf ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandWriteDot ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandWriteEqn ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandWriteGml ( Abc_Frame_t * pAbc, int argc, char **argv );
+static int IoCommandWriteList ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandWritePla ( Abc_Frame_t * pAbc, int argc, char **argv );
////////////////////////////////////////////////////////////////////////
@@ -78,6 +79,7 @@ void Io_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "I/O", "write_dot", IoCommandWriteDot, 0 );
Cmd_CommandAdd( pAbc, "I/O", "write_eqn", IoCommandWriteEqn, 0 );
Cmd_CommandAdd( pAbc, "I/O", "write_gml", IoCommandWriteGml, 0 );
+ Cmd_CommandAdd( pAbc, "I/O", "write_list", IoCommandWriteList, 0 );
Cmd_CommandAdd( pAbc, "I/O", "write_pla", IoCommandWritePla, 0 );
}
@@ -1253,6 +1255,71 @@ usage:
SeeAlso []
***********************************************************************/
+int IoCommandWriteList( Abc_Frame_t * pAbc, int argc, char **argv )
+{
+ char * FileName;
+ int fUseHost;
+ int c;
+
+ fUseHost = 1;
+ util_getopt_reset();
+ while ( ( c = util_getopt( argc, argv, "nh" ) ) != EOF )
+ {
+ switch ( c )
+ {
+ case 'n':
+ fUseHost ^= 1;
+ break;
+ case 'h':
+ goto usage;
+ default:
+ goto usage;
+ }
+ }
+
+ if ( pAbc->pNtkCur == NULL )
+ {
+ fprintf( pAbc->Out, "Empty network.\n" );
+ return 0;
+ }
+
+ if ( !Abc_NtkIsSeq(pAbc->pNtkCur) )
+ {
+ fprintf( stdout, "IoCommandWriteList(): Can write adjacency list for sequential AIGs only.\n" );
+ return 0;
+ }
+
+ if ( argc != util_optind + 1 )
+ {
+ goto usage;
+ }
+
+ // get the input file name
+ FileName = argv[util_optind];
+ // write the file
+ Io_WriteList( pAbc->pNtkCur, FileName, fUseHost );
+ return 0;
+
+usage:
+ fprintf( pAbc->Err, "usage: write_list [-nh] <file>\n" );
+ fprintf( pAbc->Err, "\t write network using graph representation formal GML\n" );
+ fprintf( pAbc->Err, "\t-n : toggle writing host node [default = %s]\n", fUseHost? "yes":"no" );
+ fprintf( pAbc->Err, "\t-h : print the help massage\n" );
+ fprintf( pAbc->Err, "\tfile : the name of the file to write\n" );
+ return 1;
+}
+
+/**Function*************************************************************
+
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
int IoCommandWritePla( Abc_Frame_t * pAbc, int argc, char **argv )
{
Abc_Ntk_t * pNtk, * pNtkTemp;
diff --git a/src/base/io/io.h b/src/base/io/io.h
index 6505a57d..21bb9214 100644
--- a/src/base/io/io.h
+++ b/src/base/io/io.h
@@ -85,6 +85,8 @@ extern void Io_WriteDot( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes, Vec
extern void Io_WriteEqn( Abc_Ntk_t * pNtk, char * pFileName );
/*=== abcWriteGml.c ==========================================================*/
extern void Io_WriteGml( Abc_Ntk_t * pNtk, char * pFileName );
+/*=== abcWriteList.c ==========================================================*/
+extern void Io_WriteList( Abc_Ntk_t * pNtk, char * pFileName, int fUseHost );
/*=== abcWritePla.c ==========================================================*/
extern int Io_WritePla( Abc_Ntk_t * pNtk, char * FileName );
diff --git a/src/base/io/ioReadBaf.c b/src/base/io/ioReadBaf.c
index 4a62f397..2d6c3ca6 100644
--- a/src/base/io/ioReadBaf.c
+++ b/src/base/io/ioReadBaf.c
@@ -79,7 +79,7 @@ Abc_Ntk_t * Io_ReadBaf( char * pFileName, int fCheck )
// prepare the array of nodes
vNodes = Vec_PtrAlloc( 1 + nInputs + nLatches + nAnds );
- Vec_PtrPush( vNodes, Abc_AigConst1(pNtkNew->pManFunc) );
+ Vec_PtrPush( vNodes, Abc_NtkConst1(pNtkNew) );
// create the PIs
for ( i = 0; i < nInputs; i++ )
diff --git a/src/base/io/ioWriteDot.c b/src/base/io/ioWriteDot.c
index b2132f28..06f32f38 100644
--- a/src/base/io/ioWriteDot.c
+++ b/src/base/io/ioWriteDot.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "io.h"
-#include "abcs.h"
+#include "seq.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
@@ -316,7 +316,7 @@ void Io_WriteDot( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes, Vec_Ptr_t * vNodesShow,
fprintf( pFile, " [" );
fprintf( pFile, "style = %s", Abc_ObjFaninC0(pNode)? "dotted" : "bold" );
if ( Abc_ObjFaninL0(pNode) > 0 )
- fprintf( pFile, ", label = \"%s\"", Abc_ObjFaninGetInitPrintable(pNode,0) );
+ fprintf( pFile, ", label = \"%s\"", Seq_ObjFaninGetInitPrintable(pNode,0) );
fprintf( pFile, "]" );
fprintf( pFile, ";\n" );
}
@@ -331,7 +331,7 @@ void Io_WriteDot( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes, Vec_Ptr_t * vNodesShow,
fprintf( pFile, " [" );
fprintf( pFile, "style = %s", Abc_ObjFaninC1(pNode)? "dotted" : "bold" );
if ( Abc_ObjFaninL1(pNode) > 0 )
- fprintf( pFile, ", label = \"%s\"", Abc_ObjFaninGetInitPrintable(pNode,1) );
+ fprintf( pFile, ", label = \"%s\"", Seq_ObjFaninGetInitPrintable(pNode,1) );
fprintf( pFile, "]" );
fprintf( pFile, ";\n" );
}
diff --git a/src/base/io/ioWriteList.c b/src/base/io/ioWriteList.c
new file mode 100644
index 00000000..fefe9b0e
--- /dev/null
+++ b/src/base/io/ioWriteList.c
@@ -0,0 +1,212 @@
+/**CFile****************************************************************
+
+ FileName [ioWriteList.c]
+
+ SystemName [ABC: Logic synthesis and verification system.]
+
+ PackageName [Command processing package.]
+
+ Synopsis [Procedures to write the graph structure of sequential AIG.]
+
+ Author [Alan Mishchenko]
+
+ Affiliation [UC Berkeley]
+
+ Date [Ver. 1.0. Started - June 20, 2005.]
+
+ Revision [$Id: ioWriteList.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
+
+***********************************************************************/
+
+#include "io.h"
+
+/*
+-------- Original Message --------
+Subject: Re: abc release and retiming
+Date: Sun, 13 Nov 2005 20:31:18 -0500 (EST)
+From: Luca Carloni <luca@cs.columbia.edu>
+To: Alan Mishchenko <alanmi@eecs.berkeley.edu>
+
+Alan,
+
+My graph-representation file format is based on an adjacency list
+representation and is indeed quite simple, in fact maybe too simple... I
+used it in order to reason on relatively small weighed direct graphs. I
+simply list all vertices, one per line and for each vertex "V_source" I
+list all vertices that are "sinks" with respect to it, i.e. such that
+there is a distinct arc between "V_source" and each of them (in
+paranthesis I list the name of the edge and its weight (number of latency
+on that path). For instance, if you look at the following graph, you have
+that vertex "v_5" is connected to vertex "v_6" through a directed arc
+called "v_5_to_v_6" whose latency is equal to 3, i.e. there are three
+flip-flops on this arc. Still, notice that I sometime interpret the graph
+also as the representation of a LIS where each node corresponds to a
+shell encapsulating a sequential core module (i.e. a module which does not
+contain any combinational path between its inputs and its outputs). With
+this representation an arc of latency 3 is interpreted as a wire where two
+relay stations have been inserted in addition to the flip-flop terminating
+the output of the core module.
+
+Finally, notice that the name of the arc does not necessarily have to be
+"v_5_to_v_6", but it could have been something like "arc_222" or "xyz" as
+long as it is a unique name in the graph.
+
+Thanks,
+Luca
+
+Example of graph representation
+-----------------------------------------------------------------------------
+v_5 > v_6 ([v_5_to_v_6] = 3), v_12 ([v_5_to_v_12] = 2).
+v_2 > v_4 ([v_2_to_v_4] = 1), v_10_s0 ([v_2_to_v_10_s0] = 6), v_12 ([v_2_to_v_12] = 3).
+v_9 > v_10_s0 ([v_9_to_v_10_s0] = 5), v_12 ([v_9_to_v_12] = 2).
+v_12 > v_13 ([v_12_to_v_13] = 5).
+v_13 > v_14 ([v_13_to_v_14] = 1).
+v_6 > v_7 ([v_6_to_v_7] = 2).
+v_4 > v_5 ([v_4_to_v_5] = 2).
+v_1 > v_2 ([v_1_to_v_2] = 1).
+v_7 > v_8 ([v_7_to_v_8] = 2).
+t > .
+v_14 > t ([v_14_to_t] = 1), v_5 ([v_14_to_v_5] = 1).
+v_8 > v_9 ([v_8_to_v_9] = 2).
+s > v_1 ([s_to_v_1] = 1).
+v_10_s0 > v_10_s1 ([v_10_s0_to_v_10_s1] = 1).
+v_10_s1 > v_4 ([v_10_s1__v_4] = 1), v_8 ([v_10_s1__v_8] = 1).
+-----------------------------------------------------------------------------
+*/
+
+////////////////////////////////////////////////////////////////////////
+/// DECLARATIONS ///
+////////////////////////////////////////////////////////////////////////
+
+static void Io_WriteListEdge( FILE * pFile, Abc_Obj_t * pObj );
+static void Io_WriteListHost( FILE * pFile, Abc_Ntk_t * pNtk );
+
+////////////////////////////////////////////////////////////////////////
+/// FUNCTION DEFINITIONS ///
+////////////////////////////////////////////////////////////////////////
+
+/**Function*************************************************************
+
+ Synopsis [Writes the adjacency list for a sequential AIG.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Io_WriteList( Abc_Ntk_t * pNtk, char * pFileName, int fUseHost )
+{
+ FILE * pFile;
+ Abc_Obj_t * pObj;
+ int i;
+
+ assert( Abc_NtkIsSeq(pNtk) );
+
+ // start the output stream
+ pFile = fopen( pFileName, "w" );
+ if ( pFile == NULL )
+ {
+ fprintf( stdout, "Io_WriteList(): Cannot open the output file \"%s\".\n", pFileName );
+ return;
+ }
+
+ fprintf( pFile, "# Adjacency list for sequential AIG \"%s\"\n", pNtk->pName );
+ fprintf( pFile, "# written by ABC on %s\n", Extra_TimeStamp() );
+
+ // write the constant node
+ if ( Abc_ObjFanoutNum( Abc_NtkConst1(pNtk) ) > 0 )
+ Io_WriteListEdge( pFile, Abc_NtkConst1(pNtk) );
+
+ // write the PO edges
+ Abc_NtkForEachCi( pNtk, pObj, i )
+ Io_WriteListEdge( pFile, pObj );
+
+ // write the internal nodes
+ Abc_AigForEachAnd( pNtk, pObj, i )
+ Io_WriteListEdge( pFile, pObj );
+
+ // write the host node
+ if ( fUseHost )
+ Io_WriteListHost( pFile, pNtk );
+ else
+ Abc_NtkForEachCo( pNtk, pObj, i )
+ Io_WriteListEdge( pFile, pObj );
+
+ fprintf( pFile, "\n" );
+ fclose( pFile );
+}
+
+/**Function*************************************************************
+
+ Synopsis [Writes the adjacency list for one edge in a sequential AIG.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Io_WriteListEdge( FILE * pFile, Abc_Obj_t * pObj )
+{
+ Abc_Obj_t * pFanout;
+ int i;
+ fprintf( pFile, "%-10s > ", Abc_ObjName(pObj) );
+ Abc_ObjForEachFanout( pObj, pFanout, i )
+ {
+ fprintf( pFile, " %s ([%s_to_%s] = %d)", Abc_ObjName(pFanout), Abc_ObjName(pObj), Abc_ObjName(pFanout), Abc_ObjFanoutL(pObj, pFanout) );
+ if ( i == Abc_ObjFanoutNum(pObj) - 1 )
+ fprintf( pFile, "." );
+ else
+ fprintf( pFile, "," );
+ }
+ fprintf( pFile, "\n" );
+}
+
+/**Function*************************************************************
+
+ Synopsis [Writes the adjacency list for one edge in a sequential AIG.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Io_WriteListHost( FILE * pFile, Abc_Ntk_t * pNtk )
+{
+ Abc_Obj_t * pObj;
+ int i;
+
+ Abc_NtkForEachPo( pNtk, pObj, i )
+ {
+ fprintf( pFile, "%-10s > ", Abc_ObjName(pObj) );
+ fprintf( pFile, " %s ([%s_to_%s] = %d)", "HOST", Abc_ObjName(pObj), "HOST", 0 );
+ if ( i == Abc_NtkPoNum(pNtk) - 1 )
+ fprintf( pFile, "." );
+ else
+ fprintf( pFile, "," );
+ }
+ fprintf( pFile, "\n" );
+
+ fprintf( pFile, "%-10s > ", "HOST" );
+ Abc_NtkForEachPi( pNtk, pObj, i )
+ {
+ fprintf( pFile, " %s ([%s_to_%s] = %d)", Abc_ObjName(pObj), "HOST", Abc_ObjName(pObj), 0 );
+ if ( i == Abc_NtkPiNum(pNtk) - 1 )
+ fprintf( pFile, "." );
+ else
+ fprintf( pFile, "," );
+ }
+ fprintf( pFile, "\n" );
+}
+
+
+////////////////////////////////////////////////////////////////////////
+/// END OF FILE ///
+////////////////////////////////////////////////////////////////////////
+
+
diff --git a/src/base/io/module.make b/src/base/io/module.make
index 9938af12..21579266 100644
--- a/src/base/io/module.make
+++ b/src/base/io/module.make
@@ -15,4 +15,5 @@ SRC += src/base/io/io.c \
src/base/io/ioWriteDot.c \
src/base/io/ioWriteEqn.c \
src/base/io/ioWriteGml.c \
+ src/base/io/ioWriteList.c \
src/base/io/ioWritePla.c
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-24 15:39:13 +0000