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-rw-r--r--src/base/abci/abc.c148
-rw-r--r--src/base/abci/abcAttach.c2
-rw-r--r--src/base/abci/abcCut.c1
-rw-r--r--src/base/abci/abcFraig.c2
-rw-r--r--src/base/abci/abcMap.c18
-rw-r--r--src/base/abci/abcPga.c155
-rw-r--r--src/base/abci/abcRewrite.c22
-rw-r--r--src/base/abci/abcTiming.c4
-rw-r--r--src/base/abci/module.make1
9 files changed, 312 insertions, 41 deletions
diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c
index dfe3ccc8..c4feb7a2 100644
--- a/src/base/abci/abc.c
+++ b/src/base/abci/abc.c
@@ -22,6 +22,8 @@
#include "mainInt.h"
#include "fraig.h"
#include "fxu.h"
+#include "fpga.h"
+#include "pga.h"
#include "cut.h"
////////////////////////////////////////////////////////////////////////
@@ -80,6 +82,7 @@ static int Abc_CommandAttach ( Abc_Frame_t * pAbc, int argc, char ** argv
static int Abc_CommandSuperChoice ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandFpga ( Abc_Frame_t * pAbc, int argc, char ** argv );
+static int Abc_CommandPga ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandSeq ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandRetime ( Abc_Frame_t * pAbc, int argc, char ** argv );
@@ -156,6 +159,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "SC mapping", "sc", Abc_CommandSuperChoice, 1 );
Cmd_CommandAdd( pAbc, "FPGA mapping", "fpga", Abc_CommandFpga, 1 );
+ Cmd_CommandAdd( pAbc, "FPGA mapping", "pga", Abc_CommandPga, 1 );
Cmd_CommandAdd( pAbc, "Sequential", "seq", Abc_CommandSeq, 1 );
Cmd_CommandAdd( pAbc, "Sequential", "retime", Abc_CommandRetime, 1 );
@@ -2720,14 +2724,13 @@ int Abc_CommandCut( Abc_Frame_t * pAbc, int argc, char ** argv )
// set defaults
pParams->nVarsMax = 5; // the max cut size ("k" of the k-feasible cuts)
pParams->nKeepMax = 250; // the max number of cuts kept at a node
- pParams->fTruth = 1; // compute truth tables
- pParams->fHash = 0; // hash cuts to detect unique
- pParams->fFilter = 0; // filter dominated cuts
+ pParams->fTruth = 0; // compute truth tables
+ pParams->fFilter = 1; // filter dominated cuts
pParams->fSeq = 0; // compute sequential cuts
pParams->fDrop = 0; // drop cuts on the fly
pParams->fVerbose = 0; // the verbosiness flag
util_getopt_reset();
- while ( ( c = util_getopt( argc, argv, "KMtrfsdvh" ) ) != EOF )
+ while ( ( c = util_getopt( argc, argv, "KMtfsdvh" ) ) != EOF )
{
switch ( c )
{
@@ -2756,9 +2759,6 @@ int Abc_CommandCut( Abc_Frame_t * pAbc, int argc, char ** argv )
case 't':
pParams->fTruth ^= 1;
break;
- case 'r':
- pParams->fHash ^= 1;
- break;
case 'f':
pParams->fFilter ^= 1;
break;
@@ -2794,16 +2794,15 @@ int Abc_CommandCut( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0;
usage:
- fprintf( pErr, "usage: cut [-K num] [-M num] [-trfsdvh]\n" );
+ fprintf( pErr, "usage: cut [-K num] [-M num] [-tfsdvh]\n" );
fprintf( pErr, "\t computes k-feasible cuts for the AIG\n" );
- fprintf( pErr, "\t-K num : max number of leaves (4 <= num <= 6) [default = %d]\n", pParams->nVarsMax );
- fprintf( pErr, "\t-M num : max number of cuts stored at a node [default = %d]\n", pParams->nKeepMax );
- fprintf( pErr, "\t-t : toggle truth table computation [default = %s]\n", pParams->fTruth? "yes": "no" );
- fprintf( pErr, "\t-r : toggle reduction by hashing [default = %s]\n", pParams->fHash? "yes": "no" );
- fprintf( pErr, "\t-f : toggle filtering by dominance [default = %s]\n", pParams->fFilter? "yes": "no" );
- fprintf( pErr, "\t-s : toggle sequential cut computation [default = %s]\n", pParams->fSeq? "yes": "no" );
- fprintf( pErr, "\t-d : toggle dropping when fanouts are done [default = %s]\n", pParams->fDrop? "yes": "no" );
- fprintf( pErr, "\t-v : toggle printing verbose information [default = %s]\n", pParams->fVerbose? "yes": "no" );
+ fprintf( pErr, "\t-K num : max number of leaves (4 <= num <= 6) [default = %d]\n", pParams->nVarsMax );
+ fprintf( pErr, "\t-M num : max number of cuts stored at a node [default = %d]\n", pParams->nKeepMax );
+ fprintf( pErr, "\t-t : toggle truth table computation [default = %s]\n", pParams->fTruth? "yes": "no" );
+ fprintf( pErr, "\t-f : toggle filtering of duplicated/dominated [default = %s]\n", pParams->fFilter? "yes": "no" );
+ fprintf( pErr, "\t-s : toggle sequential cut computation [default = %s]\n", pParams->fSeq? "yes": "no" );
+ fprintf( pErr, "\t-d : toggle dropping when fanouts are done [default = %s]\n", pParams->fDrop? "yes": "no" );
+ fprintf( pErr, "\t-v : toggle printing verbose information [default = %s]\n", pParams->fVerbose? "yes": "no" );
fprintf( pErr, "\t-h : print the command usage\n");
return 1;
}
@@ -3771,6 +3770,123 @@ usage:
return 1;
}
+/**Function*************************************************************
+
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_CommandPga( Abc_Frame_t * pAbc, int argc, char ** argv )
+{
+ FILE * pOut, * pErr;
+ Abc_Ntk_t * pNtk, * pNtkRes;
+ Pga_Params_t Params, * pParams = &Params;
+ int c;
+ extern Abc_Ntk_t * Abc_NtkPga( Pga_Params_t * pParams );
+
+ pNtk = Abc_FrameReadNet(pAbc);
+ pOut = Abc_FrameReadOut(pAbc);
+ pErr = Abc_FrameReadErr(pAbc);
+
+ // set defaults
+ memset( pParams, 0, sizeof(Pga_Params_t) );
+ pParams->pNtk = pNtk;
+ pParams->pLutLib = Abc_FrameReadLibLut();
+ pParams->fAreaFlow = 1;
+ pParams->fArea = 1;
+ pParams->fSwitching = 0;
+ pParams->fDropCuts = 0;
+ pParams->fVerbose = 0;
+ util_getopt_reset();
+ while ( ( c = util_getopt( argc, argv, "fapdvh" ) ) != EOF )
+ {
+ switch ( c )
+ {
+ case 'f':
+ pParams->fAreaFlow ^= 1;
+ break;
+ case 'a':
+ pParams->fArea ^= 1;
+ break;
+ case 'p':
+ pParams->fSwitching ^= 1;
+ break;
+ case 'd':
+ pParams->fDropCuts ^= 1;
+ break;
+ case 'v':
+ pParams->fVerbose ^= 1;
+ break;
+ case 'h':
+ default:
+ goto usage;
+ }
+ }
+
+ if ( pNtk == NULL )
+ {
+ fprintf( pErr, "Empty network.\n" );
+ return 1;
+ }
+
+ if ( !Abc_NtkIsStrash(pNtk) )
+ {
+ // strash and balance the network
+ pNtk = Abc_NtkStrash( pNtk, 0, 0 );
+ if ( pNtk == NULL )
+ {
+ fprintf( pErr, "Strashing before FPGA mapping has failed.\n" );
+ return 1;
+ }
+ pNtk = Abc_NtkBalance( pNtkRes = pNtk, 0 );
+ Abc_NtkDelete( pNtkRes );
+ if ( pNtk == NULL )
+ {
+ fprintf( pErr, "Balancing before FPGA mapping has failed.\n" );
+ return 1;
+ }
+ fprintf( pOut, "The network was strashed and balanced before FPGA mapping.\n" );
+ // get the new network
+ pNtkRes = Abc_NtkPga( pParams );
+ if ( pNtkRes == NULL )
+ {
+ Abc_NtkDelete( pNtk );
+ fprintf( pErr, "FPGA mapping has failed.\n" );
+ return 1;
+ }
+ Abc_NtkDelete( pNtk );
+ }
+ else
+ {
+ // get the new network
+ pNtkRes = Abc_NtkPga( pParams );
+ if ( pNtkRes == NULL )
+ {
+ fprintf( pErr, "FPGA mapping has failed.\n" );
+ return 1;
+ }
+ }
+ // replace the current network
+ Abc_FrameReplaceCurrentNetwork( pAbc, pNtkRes );
+ return 0;
+
+usage:
+ fprintf( pErr, "usage: pga [-fapdvh]\n" );
+ fprintf( pErr, "\t performs FPGA mapping of the current network\n" );
+ fprintf( pErr, "\t-f : toggles area flow recovery [default = %s]\n", pParams->fAreaFlow? "yes": "no" );
+ fprintf( pErr, "\t-a : toggles area recovery [default = %s]\n", pParams->fArea? "yes": "no" );
+ fprintf( pErr, "\t-p : optimizes power by minimizing switching activity [default = %s]\n", pParams->fSwitching? "yes": "no" );
+ fprintf( pErr, "\t-d : toggles dropping cuts to save memory [default = %s]\n", pParams->fDropCuts? "yes": "no" );
+ fprintf( pErr, "\t-v : toggles verbose output [default = %s]\n", pParams->fVerbose? "yes": "no" );
+ fprintf( pErr, "\t-h : prints the command usage\n");
+ return 1;
+}
+
/**Function*************************************************************
diff --git a/src/base/abci/abcAttach.c b/src/base/abci/abcAttach.c
index 6ee1fb90..02fe7284 100644
--- a/src/base/abci/abcAttach.c
+++ b/src/base/abci/abcAttach.c
@@ -66,7 +66,7 @@ int Abc_NtkAttach( Abc_Ntk_t * pNtk )
assert( Abc_NtkIsSopLogic(pNtk) );
// check that the library is available
- pGenlib = Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame());
+ pGenlib = Abc_FrameReadLibGen();
if ( pGenlib == NULL )
{
printf( "The current library is not available.\n" );
diff --git a/src/base/abci/abcCut.c b/src/base/abci/abcCut.c
index f487bd1b..e7309a59 100644
--- a/src/base/abci/abcCut.c
+++ b/src/base/abci/abcCut.c
@@ -105,7 +105,6 @@ PRT( "Total", clock() - clk );
if ( Abc_NodeIsTravIdCurrent(pDriver) )
continue;
Abc_NodeSetTravIdCurrent(pDriver);
- Cut_NodeSetComputedAsNew( p, pDriver->Id );
}
// compute as long as new cuts appear
diff --git a/src/base/abci/abcFraig.c b/src/base/abci/abcFraig.c
index 3f860585..7a8eed5d 100644
--- a/src/base/abci/abcFraig.c
+++ b/src/base/abci/abcFraig.c
@@ -556,7 +556,7 @@ void Abc_NtkFraigStoreCheck( Abc_Ntk_t * pFraig )
int i, k;
// check that the PO functions are correct
nPoFinal = Abc_NtkPoNum(pFraig);
- nStored = Abc_FrameReadNtkStoreSize(Abc_FrameGetGlobalFrame());
+ nStored = Abc_FrameReadNtkStoreSize();
assert( nPoFinal % nStored == 0 );
nPoOrig = nPoFinal / nStored;
for ( i = 0; i < nPoOrig; i++ )
diff --git a/src/base/abci/abcMap.c b/src/base/abci/abcMap.c
index ec5352cb..44f5aa94 100644
--- a/src/base/abci/abcMap.c
+++ b/src/base/abci/abcMap.c
@@ -66,18 +66,18 @@ Abc_Ntk_t * Abc_NtkMap( Abc_Ntk_t * pNtk, double DelayTarget, int fRecovery, int
assert( Abc_NtkIsStrash(pNtk) );
// check that the library is available
- if ( Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame()) == NULL )
+ if ( Abc_FrameReadLibGen() == NULL )
{
printf( "The current library is not available.\n" );
return 0;
}
// derive the supergate library
- if ( Abc_FrameReadLibSuper(Abc_FrameGetGlobalFrame()) == NULL && Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame()) )
+ if ( Abc_FrameReadLibSuper() == NULL && Abc_FrameReadLibGen() )
{
printf( "A simple supergate library is derived from gate library \"%s\".\n",
- Mio_LibraryReadName(Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame())) );
- Map_SuperLibDeriveFromGenlib( Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame()) );
+ Mio_LibraryReadName(Abc_FrameReadLibGen()) );
+ Map_SuperLibDeriveFromGenlib( Abc_FrameReadLibGen() );
}
// print a warning about choice nodes
@@ -410,7 +410,7 @@ int Abc_NtkUnmap( Abc_Ntk_t * pNtk )
assert( Abc_NtkIsMappedLogic(pNtk) );
// update the functionality manager
- assert( pNtk->pManFunc == Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame()) );
+ assert( pNtk->pManFunc == Abc_FrameReadLibGen() );
pNtk->pManFunc = Extra_MmFlexStart();
pNtk->ntkFunc = ABC_FUNC_SOP;
// update the nodes
@@ -446,18 +446,18 @@ Abc_Ntk_t * Abc_NtkSuperChoice( Abc_Ntk_t * pNtk )
assert( Abc_NtkIsStrash(pNtk) );
// check that the library is available
- if ( Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame()) == NULL )
+ if ( Abc_FrameReadLibGen() == NULL )
{
printf( "The current library is not available.\n" );
return 0;
}
// derive the supergate library
- if ( Abc_FrameReadLibSuper(Abc_FrameGetGlobalFrame()) == NULL && Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame()) )
+ if ( Abc_FrameReadLibSuper() == NULL && Abc_FrameReadLibGen() )
{
printf( "A simple supergate library is derived from gate library \"%s\".\n",
- Mio_LibraryReadName(Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame())) );
- Map_SuperLibDeriveFromGenlib( Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame()) );
+ Mio_LibraryReadName(Abc_FrameReadLibGen()) );
+ Map_SuperLibDeriveFromGenlib( Abc_FrameReadLibGen() );
}
// print a warning about choice nodes
diff --git a/src/base/abci/abcPga.c b/src/base/abci/abcPga.c
new file mode 100644
index 00000000..0562ddb2
--- /dev/null
+++ b/src/base/abci/abcPga.c
@@ -0,0 +1,155 @@
+/**CFile****************************************************************
+
+ FileName [abcPga.c]
+
+ SystemName [ABC: Logic synthesis and verification system.]
+
+ PackageName [Network and node package.]
+
+ Synopsis [Interface with the FPGA mapping package.]
+
+ Author [Alan Mishchenko]
+
+ Affiliation [UC Berkeley]
+
+ Date [Ver. 1.0. Started - June 20, 2005.]
+
+ Revision [$Id: abcPga.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
+
+***********************************************************************/
+
+#include "abc.h"
+#include "fraig.h"
+#include "fpga.h"
+#include "pga.h"
+#include "cut.h"
+
+////////////////////////////////////////////////////////////////////////
+/// DECLARATIONS ///
+////////////////////////////////////////////////////////////////////////
+
+static Abc_Ntk_t * Abc_NtkFromPga( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodeCuts );
+
+////////////////////////////////////////////////////////////////////////
+/// FUNCTION DEFITIONS ///
+////////////////////////////////////////////////////////////////////////
+
+/**Function*************************************************************
+
+ Synopsis [Interface with the FPGA mapping package.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Abc_Ntk_t * Abc_NtkPga( Pga_Params_t * pParams )
+{
+ Abc_Ntk_t * pNtkNew, * pNtk = pParams->pNtk;
+ Pga_Man_t * pMan;
+ Vec_Ptr_t * vNodeCuts;
+
+ assert( Abc_NtkIsStrash(pNtk) );
+
+ // print a warning about choice nodes
+ if ( Abc_NtkGetChoiceNum( pNtk ) )
+ printf( "Performing FPGA mapping with choices.\n" );
+
+ // start the mapping manager
+ pMan = Pga_ManStart( pParams );
+ if ( pMan == NULL )
+ return NULL;
+
+ // perform mapping
+ vNodeCuts = Pga_DoMapping( pMan );
+
+ // transform the result of mapping into a BDD logic network
+ pNtkNew = Abc_NtkFromPga( pNtk, vNodeCuts );
+ if ( pNtkNew == NULL )
+ return NULL;
+ Pga_ManStop( pMan );
+ Vec_PtrFree( vNodeCuts );
+
+ // make the network minimum base
+ Abc_NtkMinimumBase( pNtkNew );
+
+ // make sure that everything is okay
+ if ( !Abc_NtkCheck( pNtkNew ) )
+ {
+ printf( "Abc_NtkPga: The network check has failed.\n" );
+ Abc_NtkDelete( pNtkNew );
+ return NULL;
+ }
+ return pNtkNew;
+}
+
+
+/**Function*************************************************************
+
+ Synopsis [Creates the mapped network.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Abc_Ntk_t * Abc_NtkFromPga( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodeCuts )
+{
+ ProgressBar * pProgress;
+ DdManager * dd;
+ Abc_Ntk_t * pNtkNew;
+ Abc_Obj_t * pNode, * pFanin, * pNodeNew;
+ Cut_Cut_t * pCut;
+ Vec_Ptr_t * vLeaves, * vVisited;
+ int i, k, nDupGates;
+ // create the new network
+ pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_BDD );
+ dd = pNtkNew->pManFunc;
+ // set the constant node
+ pNode = Abc_AigConst1(pNtk->pManFunc);
+ if ( Abc_ObjFanoutNum(pNode) > 0 )
+ pNode->pCopy = Abc_NodeCreateConst1(pNtkNew);
+ // add new nodes in topologic order
+ vLeaves = Vec_PtrAlloc( 6 );
+ vVisited = Vec_PtrAlloc( 100 );
+ pProgress = Extra_ProgressBarStart( stdout, Vec_PtrSize(vNodeCuts) );
+ Vec_PtrForEachEntry( vNodeCuts, pCut, i )
+ {
+ Extra_ProgressBarUpdate( pProgress, i, NULL );
+ // create the new node
+ pNodeNew = Abc_NtkCreateNode( pNtkNew );
+ Vec_PtrClear( vLeaves );
+ for ( k = 0; k < (int)pCut->nLeaves; k++ )
+ {
+ // add the node representing the old fanin in the new network
+ pFanin = Abc_NtkObj( pNtk, pCut->pLeaves[k] );
+ Vec_PtrPush( vLeaves, pFanin );
+ Abc_ObjAddFanin( pNodeNew, pFanin->pCopy );
+ }
+ // set the new node at the old node
+ pNode = Abc_NtkObj( pNtk, pCut->uSign ); // pCut->uSign contains the ID of the root node
+ pNode->pCopy = pNodeNew;
+ // create the function of the new node
+ pNodeNew->pData = Abc_NodeConeBdd( dd, dd->vars, pNode, vLeaves, vVisited ); Cudd_Ref( pNodeNew->pData );
+ }
+ Extra_ProgressBarStop( pProgress );
+ Vec_PtrFree( vVisited );
+ Vec_PtrFree( vLeaves );
+ // finalize the new network
+ Abc_NtkFinalize( pNtk, pNtkNew );
+ // decouple the PO driver nodes to reduce the number of levels
+ nDupGates = Abc_NtkLogicMakeSimpleCos( pNtkNew, 1 );
+// if ( nDupGates && Fpga_ManReadVerbose(pMan) )
+// printf( "Duplicated %d gates to decouple the CO drivers.\n", nDupGates );
+ return pNtkNew;
+}
+
+////////////////////////////////////////////////////////////////////////
+/// END OF FILE ///
+////////////////////////////////////////////////////////////////////////
+
+
diff --git a/src/base/abci/abcRewrite.c b/src/base/abci/abcRewrite.c
index 81d97028..91a99a57 100644
--- a/src/base/abci/abcRewrite.c
+++ b/src/base/abci/abcRewrite.c
@@ -32,7 +32,7 @@
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
-static Cut_Man_t * Abc_NtkStartCutManForRewrite( Abc_Ntk_t * pNtk, int fDrop );
+static Cut_Man_t * Abc_NtkStartCutManForRewrite( Abc_Ntk_t * pNtk );
static void Abc_NodePrintCuts( Abc_Obj_t * pNode );
////////////////////////////////////////////////////////////////////////
@@ -52,7 +52,6 @@ static void Abc_NodePrintCuts( Abc_Obj_t * pNode );
***********************************************************************/
int Abc_NtkRewrite( Abc_Ntk_t * pNtk, int fUpdateLevel, int fUseZeros, int fVerbose )
{
- int fDrop = 0;
ProgressBar * pProgress;
Cut_Man_t * pManCut;
Rwr_Man_t * pManRwr;
@@ -72,7 +71,7 @@ int Abc_NtkRewrite( Abc_Ntk_t * pNtk, int fUpdateLevel, int fUseZeros, int fVerb
Abc_NtkStartReverseLevels( pNtk );
// start the cut manager
clk = clock();
- pManCut = Abc_NtkStartCutManForRewrite( pNtk, fDrop );
+ pManCut = Abc_NtkStartCutManForRewrite( pNtk );
Rwr_ManAddTimeCuts( pManRwr, clock() - clk );
pNtk->pManCut = pManCut;
@@ -142,7 +141,7 @@ Rwr_ManAddTimeTotal( pManRwr, clock() - clkStart );
SeeAlso []
***********************************************************************/
-Cut_Man_t * Abc_NtkStartCutManForRewrite( Abc_Ntk_t * pNtk, int fDrop )
+Cut_Man_t * Abc_NtkStartCutManForRewrite( Abc_Ntk_t * pNtk )
{
static Cut_Params_t Params, * pParams = &Params;
Cut_Man_t * pManCut;
@@ -153,10 +152,9 @@ Cut_Man_t * Abc_NtkStartCutManForRewrite( Abc_Ntk_t * pNtk, int fDrop )
pParams->nVarsMax = 4; // the max cut size ("k" of the k-feasible cuts)
pParams->nKeepMax = 250; // the max number of cuts kept at a node
pParams->fTruth = 1; // compute truth tables
- pParams->fHash = 1; // hash cuts to detect unique
- pParams->fFilter = 0; // filter dominated cuts
+ pParams->fFilter = 1; // filter dominated cuts
pParams->fSeq = 0; // compute sequential cuts
- pParams->fDrop = fDrop; // drop cuts on the fly
+ pParams->fDrop = 0; // drop cuts on the fly
pParams->fVerbose = 0; // the verbosiness flag
pParams->nIdsMax = Abc_NtkObjNumMax( pNtk );
pManCut = Cut_ManStart( pParams );
@@ -182,13 +180,15 @@ Cut_Man_t * Abc_NtkStartCutManForRewrite( Abc_Ntk_t * pNtk, int fDrop )
***********************************************************************/
void Abc_NodePrintCuts( Abc_Obj_t * pNode )
{
+ Vec_Ptr_t * vCuts;
Cut_Cut_t * pCut;
- unsigned uTruth;
+ int k;
+
printf( "\nNode %s\n", Abc_ObjName(pNode) );
- for ( pCut = (Cut_Cut_t *)pNode->pCopy; pCut; pCut = pCut->pNext )
+ vCuts = (Vec_Ptr_t *)pNode->pCopy;
+ Vec_PtrForEachEntry( vCuts, pCut, k )
{
- uTruth = pCut->uTruth;
- Extra_PrintBinary( stdout, &uTruth, 16 );
+ Extra_PrintBinary( stdout, (unsigned *)&pCut->uSign, 16 );
printf( " " );
Cut_CutPrint( pCut );
printf( "\n" );
diff --git a/src/base/abci/abcTiming.c b/src/base/abci/abcTiming.c
index b8524bd5..445978b3 100644
--- a/src/base/abci/abcTiming.c
+++ b/src/base/abci/abcTiming.c
@@ -470,9 +470,9 @@ void Abc_NtkSetNodeLevelsArrival( Abc_Ntk_t * pNtkOld )
int i;
if ( pNtkOld->pManTime == NULL )
return;
- if ( Mio_LibraryReadNand2(Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame())) == NULL )
+ if ( Mio_LibraryReadNand2(Abc_FrameReadLibGen()) == NULL )
return;
- tAndDelay = Mio_LibraryReadDelayNand2Max(Abc_FrameReadLibGen(Abc_FrameGetGlobalFrame()));
+ tAndDelay = Mio_LibraryReadDelayNand2Max(Abc_FrameReadLibGen());
Abc_NtkForEachPi( pNtkOld, pNodeOld, i )
{
pNodeNew = pNodeOld->pCopy;
diff --git a/src/base/abci/module.make b/src/base/abci/module.make
index d7c0add2..0123e213 100644
--- a/src/base/abci/module.make
+++ b/src/base/abci/module.make
@@ -10,6 +10,7 @@ SRC += src/base/abci/abc.c \
src/base/abci/abcMap.c \
src/base/abci/abcMiter.c \
src/base/abci/abcNtbdd.c \
+ src/base/abci/abcPga.c \
src/base/abci/abcPrint.c \
src/base/abci/abcReconv.c \
src/base/abci/abcRefactor.c \
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-17 05:47:46 +0000