diff options
Diffstat (limited to 'src/base/abci')
32 files changed, 201 insertions, 201 deletions
diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index d3372c9a..ae1c110f 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -506,7 +506,7 @@ void Abc_Init( Abc_Frame_t * pAbc ) Dar_LibStart(); } { - extern Bdc_ManDecomposeTest( unsigned uTruth, int nVars ); + extern void Bdc_ManDecomposeTest( unsigned uTruth, int nVars ); // Bdc_ManDecomposeTest( 0x0f0f0f0f, 3 ); } @@ -3710,7 +3710,6 @@ int Abc_CommandTrace( Abc_Frame_t * pAbc, int argc, char ** argv ) { FILE * pOut, * pErr; Abc_Ntk_t * pNtk; - Mfs_Par_t Pars, * pPars = &Pars; int c; int fUseLutLib; int fVerbose; @@ -3780,7 +3779,6 @@ int Abc_CommandSpeedup( Abc_Frame_t * pAbc, int argc, char ** argv ) { FILE * pOut, * pErr; Abc_Ntk_t * pNtk, * pNtkRes; - Mfs_Par_t Pars, * pPars = &Pars; int c; int fUseLutLib; int Percentage; @@ -6568,7 +6566,7 @@ int Abc_CommandExdcSet( Abc_Frame_t * pAbc, int argc, char ** argv ) if ( (pFile = fopen( FileName, "r" )) == NULL ) { fprintf( pAbc->Err, "Cannot open input file \"%s\". ", FileName ); - if ( FileName = Extra_FileGetSimilarName( FileName, ".mv", ".blif", ".pla", ".eqn", ".bench" ) ) + if ( (FileName = Extra_FileGetSimilarName( FileName, ".mv", ".blif", ".pla", ".eqn", ".bench" )) ) fprintf( pAbc->Err, "Did you mean \"%s\"?", FileName ); fprintf( pAbc->Err, "\n" ); return 1; @@ -6655,7 +6653,7 @@ int Abc_CommandCareSet( Abc_Frame_t * pAbc, int argc, char ** argv ) if ( (pFile = fopen( FileName, "r" )) == NULL ) { fprintf( pAbc->Err, "Cannot open input file \"%s\". ", FileName ); - if ( FileName = Extra_FileGetSimilarName( FileName, ".mv", ".blif", ".pla", ".eqn", ".bench" ) ) + if ( (FileName = Extra_FileGetSimilarName( FileName, ".mv", ".blif", ".pla", ".eqn", ".bench" )) ) fprintf( pAbc->Err, "Did you mean \"%s\"?", FileName ); fprintf( pAbc->Err, "\n" ); return 1; @@ -6706,7 +6704,7 @@ int Abc_CommandCut( Abc_Frame_t * pAbc, int argc, char ** argv ) { Cut_Params_t Params, * pParams = &Params; Cut_Man_t * pCutMan; - Cut_Oracle_t * pCutOracle; + Cut_Oracle_t * pCutOracle = NULL; FILE * pOut, * pErr; Abc_Ntk_t * pNtk; int c; @@ -6829,6 +6827,7 @@ int Abc_CommandCut( Abc_Frame_t * pAbc, int argc, char ** argv ) Cut_ManStop( pCutMan ); if ( fOracle ) { + assert(pCutOracle); Abc_NtkCutsOracle( pNtk, pCutOracle ); Cut_OracleStop( pCutOracle ); } @@ -15673,7 +15672,7 @@ int Abc_CommandAbc8Read( Abc_Frame_t * pAbc, int argc, char ** argv ) if ( (pFile = fopen( pFileName, "r" )) == NULL ) { fprintf( stdout, "Cannot open input file \"%s\". ", pFileName ); - if ( pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL ) ) + if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL )) ) fprintf( stdout, "Did you mean \"%s\"?", pFileName ); fprintf( stdout, "\n" ); return 1; @@ -15763,7 +15762,7 @@ int Abc_CommandAbc8ReadLogic( Abc_Frame_t * pAbc, int argc, char ** argv ) if ( (pFile = fopen( pFileName, "r" )) == NULL ) { fprintf( stdout, "Cannot open input file \"%s\". ", pFileName ); - if ( pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL ) ) + if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL )) ) fprintf( stdout, "Did you mean \"%s\"?", pFileName ); fprintf( stdout, "\n" ); return 1; @@ -16032,7 +16031,7 @@ int Abc_CommandAbc8ReadLut( Abc_Frame_t * pAbc, int argc, char **argv ) if ( (pFile = fopen( FileName, "r" )) == NULL ) { fprintf( stdout, "Cannot open input file \"%s\". ", FileName ); - if ( FileName = Extra_FileGetSimilarName( FileName, ".lut", NULL, NULL, NULL, NULL ) ) + if ( (FileName = Extra_FileGetSimilarName( FileName, ".lut", NULL, NULL, NULL, NULL )) ) fprintf( stdout, "Did you mean \"%s\"?", FileName ); fprintf( stdout, "\n" ); return 1; @@ -17041,11 +17040,11 @@ int Abc_CommandAbc8Speedup( Abc_Frame_t * pAbc, int argc, char ** argv ) { Aig_Man_t * pAigNew; int c; - int fUseLutLib; - int Percentage; - int Degree; - int fVerbose; - int fVeryVerbose; + int fUseLutLib = 0; + int Percentage = 100; + int Degree = 5; + int fVerbose = 0; + int fVeryVerbose = 0; extern Aig_Man_t * Nwk_ManSpeedup( void * pNtk, int fUseLutLib, int Percentage, int Degree, int fVerbose, int fVeryVerbose ); // set defaults diff --git a/src/base/abci/abcAbc8.c b/src/base/abci/abcAbc8.c index d58f6b7e..be25d9c2 100644 --- a/src/base/abci/abcAbc8.c +++ b/src/base/abci/abcAbc8.c @@ -253,7 +253,6 @@ Abc_Ntk_t * Abc_NtkNtkTest( Abc_Ntk_t * pNtk, If_Lib_t * pLutLib ) extern Vec_Ptr_t * Nwk_ManRetimeCutForward( Nwk_Man_t * pMan, int nLatches, int fVerbose ); extern Vec_Ptr_t * Nwk_ManRetimeCutBackward( Nwk_Man_t * pMan, int nLatches, int fVerbose ); - Mfx_Par_t Pars, * pPars = &Pars; Abc_Ntk_t * pNtkNew; Nwk_Man_t * pMan; pMan = Abc_NtkToNtkNew( pNtk ); diff --git a/src/base/abci/abcBalance.c b/src/base/abci/abcBalance.c index f04837c5..26b6db99 100644 --- a/src/base/abci/abcBalance.c +++ b/src/base/abci/abcBalance.c @@ -96,7 +96,6 @@ Abc_Ntk_t * Abc_NtkBalance( Abc_Ntk_t * pNtk, bool fDuplicate, bool fSelective, ***********************************************************************/ void Abc_NtkBalancePerform( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkAig, bool fDuplicate, bool fSelective, bool fUpdateLevel ) { - int fCheck = 1; ProgressBar * pProgress; Vec_Vec_t * vStorage; Abc_Obj_t * pNode, * pDriver; diff --git a/src/base/abci/abcBmc.c b/src/base/abci/abcBmc.c index af6d237b..1512c76f 100644 --- a/src/base/abci/abcBmc.c +++ b/src/base/abci/abcBmc.c @@ -84,7 +84,7 @@ printf( "Fraig has %6d nodes.\n", Ivy_ManNodeNum(pFraig) ); ***********************************************************************/ void Abc_NtkBmcReport( Ivy_Man_t * pMan, Ivy_Man_t * pFrames, Ivy_Man_t * pFraig, Vec_Ptr_t * vMapping, int nFrames ) { - Ivy_Obj_t * pFirst1, * pFirst2, * pFirst3; + Ivy_Obj_t * pFirst1, * pFirst2 = NULL, * pFirst3 = NULL; int i, f, nIdMax, Prev2, Prev3; nIdMax = Ivy_ManObjIdMax(pMan); // check what is the number of nodes in each frame @@ -101,6 +101,8 @@ void Abc_NtkBmcReport( Ivy_Man_t * pMan, Ivy_Man_t * pFrames, Ivy_Man_t * pFraig continue; break; } + assert(pFirst2); + assert(pFirst3); if ( f ) printf( "Frame %3d : Strash = %5d Fraig = %5d\n", f, pFirst2->Id - Prev2, pFirst3->Id - Prev3 ); Prev2 = pFirst2->Id; diff --git a/src/base/abci/abcCut.c b/src/base/abci/abcCut.c index d399ce5f..d38f62d0 100644 --- a/src/base/abci/abcCut.c +++ b/src/base/abci/abcCut.c @@ -144,7 +144,7 @@ void Abc_NtkCutsOracle( Abc_Ntk_t * pNtk, Cut_Oracle_t * p ) { Abc_Obj_t * pObj; Vec_Ptr_t * vNodes; - int i, clk = clock(); + int i; //, clk = clock(); int fDrop = Cut_OracleReadDrop(p); assert( Abc_NtkIsStrash(pNtk) ); @@ -327,7 +327,7 @@ int Abc_NtkComputeArea( Abc_Ntk_t * pNtk, Cut_Man_t * p ) void * Abc_NodeGetCutsRecursive( void * p, Abc_Obj_t * pObj, int fDag, int fTree ) { void * pList; - if ( pList = Abc_NodeReadCuts( p, pObj ) ) + if ( (pList = Abc_NodeReadCuts( p, pObj )) ) return pList; Abc_NodeGetCutsRecursive( p, Abc_ObjFanin0(pObj), fDag, fTree ); Abc_NodeGetCutsRecursive( p, Abc_ObjFanin1(pObj), fDag, fTree ); @@ -459,7 +459,6 @@ void Abc_NodeFreeCuts( void * p, Abc_Obj_t * pObj ) ***********************************************************************/ void Abc_NtkPrintCuts( void * p, Abc_Ntk_t * pNtk, int fSeq ) { - Cut_Man_t * pMan = p; Cut_Cut_t * pList; Abc_Obj_t * pObj; int i; @@ -485,7 +484,6 @@ void Abc_NtkPrintCuts( void * p, Abc_Ntk_t * pNtk, int fSeq ) ***********************************************************************/ void Abc_NtkPrintCuts_( void * p, Abc_Ntk_t * pNtk, int fSeq ) { - Cut_Man_t * pMan = p; Cut_Cut_t * pList; Abc_Obj_t * pObj; pObj = Abc_NtkObj( pNtk, 2 * Abc_NtkObjNum(pNtk) / 3 ); diff --git a/src/base/abci/abcDar.c b/src/base/abci/abcDar.c index d746e315..d89ee618 100644 --- a/src/base/abci/abcDar.c +++ b/src/base/abci/abcDar.c @@ -99,10 +99,11 @@ Aig_Man_t * Abc_NtkToDar( Abc_Ntk_t * pNtk, int fExors, int fRegisters ) Abc_NtkForEachCi( pNtk, pObj, i ) pObj->pCopy = (Abc_Obj_t *)Aig_ObjCreatePi(pMan); // complement the 1-values registers - if ( fRegisters ) + if ( fRegisters ) { Abc_NtkForEachLatch( pNtk, pObj, i ) if ( Abc_LatchIsInit1(pObj) ) Abc_ObjFanout0(pObj)->pCopy = Abc_ObjNot(Abc_ObjFanout0(pObj)->pCopy); + } // perform the conversion of the internal nodes (assumes DFS ordering) // pMan->fAddStrash = 1; Abc_NtkForEachNode( pNtk, pObj, i ) @@ -1894,7 +1895,7 @@ Abc_Ntk_t * Abc_NtkInter( Abc_Ntk_t * pNtkOn, Abc_Ntk_t * pNtkOff, int fRelation { Abc_Ntk_t * pNtkOn1, * pNtkOff1, * pNtkInter1, * pNtkInter; Abc_Obj_t * pObj; - int i, clk = clock(); + int i; //, clk = clock(); if ( Abc_NtkCoNum(pNtkOn) != Abc_NtkCoNum(pNtkOff) ) { printf( "Currently works only for networks with equal number of POs.\n" ); diff --git a/src/base/abci/abcDelay.c b/src/base/abci/abcDelay.c index 3c28e6a6..91f175fa 100644 --- a/src/base/abci/abcDelay.c +++ b/src/base/abci/abcDelay.c @@ -526,8 +526,8 @@ Abc_Ntk_t * Abc_NtkSpeedup( Abc_Ntk_t * pNtk, int fUseLutLib, int Percentage, in printf( "\n" ); } // mark the timing critical nodes and edges - puTCEdges = ALLOC( int, Abc_NtkObjNumMax(pNtk) ); - memset( puTCEdges, 0, sizeof(int) * Abc_NtkObjNumMax(pNtk) ); + puTCEdges = ALLOC( unsigned, Abc_NtkObjNumMax(pNtk) ); + memset( puTCEdges, 0, sizeof(unsigned) * Abc_NtkObjNumMax(pNtk) ); Abc_NtkForEachNode( pNtk, pNode, i ) { if ( Abc_ObjSlack(pNode) >= tDelta ) diff --git a/src/base/abci/abcDsd.c b/src/base/abci/abcDsd.c index c00a7d7c..ab6279b6 100644 --- a/src/base/abci/abcDsd.c +++ b/src/base/abci/abcDsd.c @@ -161,11 +161,11 @@ void Abc_NtkDsdConstruct( Dsd_Manager_t * pManDsd, Abc_Ntk_t * pNtk, Abc_Ntk_t * int i, nNodesDsd; // save the CI nodes in the DSD nodes - Dsd_NodeSetMark( Dsd_ManagerReadConst1(pManDsd), (int)Abc_NtkCreateNodeConst1(pNtkNew) ); + Dsd_NodeSetMark( Dsd_ManagerReadConst1(pManDsd), (int)(PORT_PTRINT_T)Abc_NtkCreateNodeConst1(pNtkNew) ); Abc_NtkForEachCi( pNtk, pNode, i ) { pNodeDsd = Dsd_ManagerReadInput( pManDsd, i ); - Dsd_NodeSetMark( pNodeDsd, (int)pNode->pCopy ); + Dsd_NodeSetMark( pNodeDsd, (int)(PORT_PTRINT_T)pNode->pCopy ); } // collect DSD nodes in DFS order (leaves and const1 are not collected) @@ -183,7 +183,7 @@ void Abc_NtkDsdConstruct( Dsd_Manager_t * pManDsd, Abc_Ntk_t * pNtk, Abc_Ntk_t * if ( !Abc_AigNodeIsAnd(pDriver) ) continue; pNodeDsd = Dsd_ManagerReadRoot( pManDsd, i ); - pNodeNew = (Abc_Obj_t *)Dsd_NodeReadMark( Dsd_Regular(pNodeDsd) ); + pNodeNew = (Abc_Obj_t *)(PORT_PTRINT_T)Dsd_NodeReadMark( Dsd_Regular(pNodeDsd) ); assert( !Abc_ObjIsComplement(pNodeNew) ); pDriver->pCopy = Abc_ObjNotCond( pNodeNew, Dsd_IsComplement(pNodeDsd) ); } @@ -219,7 +219,7 @@ Abc_Obj_t * Abc_NtkDsdConstructNode( Dsd_Manager_t * pManDsd, Dsd_Node_t * pNode for ( i = 0; i < nDecs; i++ ) { pFaninDsd = Dsd_NodeReadDec( pNodeDsd, i ); - pFanin = (Abc_Obj_t *)Dsd_NodeReadMark(Dsd_Regular(pFaninDsd)); + pFanin = (Abc_Obj_t *)(PORT_PTRINT_T)Dsd_NodeReadMark(Dsd_Regular(pFaninDsd)); Abc_ObjAddFanin( pNodeNew, pFanin ); assert( Type == DSD_NODE_OR || !Dsd_IsComplement(pFaninDsd) ); } @@ -284,7 +284,7 @@ printf( "\n" ); } } pNodeNew->pData = bLocal; - Dsd_NodeSetMark( pNodeDsd, (int)pNodeNew ); + Dsd_NodeSetMark( pNodeDsd, (int)(PORT_PTRINT_T)pNodeNew ); return pNodeNew; } @@ -383,7 +383,7 @@ Vec_Ptr_t * Abc_NtkCollectNodesForDsd( Abc_Ntk_t * pNtk ) void Abc_NodeDecompDsdAndMux( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Dsd_Manager_t * pManDsd, bool fRecursive, int * pCounters ) { DdManager * dd = pNode->pNtk->pManFunc; - Abc_Obj_t * pRoot, * pFanin, * pNode1, * pNode2, * pNodeC; + Abc_Obj_t * pRoot = NULL, * pFanin, * pNode1, * pNode2, * pNodeC; Dsd_Node_t ** ppNodesDsd, * pNodeDsd, * pFaninDsd; int i, nNodesDsd, iVar, fCompl; @@ -400,7 +400,7 @@ void Abc_NodeDecompDsdAndMux( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Dsd_Manager Abc_ObjForEachFanin( pNode, pFanin, i ) { pFaninDsd = Dsd_ManagerReadInput( pManDsd, i ); - Dsd_NodeSetMark( pFaninDsd, (int)pFanin ); + Dsd_NodeSetMark( pFaninDsd, (int)(PORT_PTRINT_T)pFanin ); } // construct the intermediate nodes @@ -412,6 +412,7 @@ void Abc_NodeDecompDsdAndMux( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Dsd_Manager Vec_PtrPush( vNodes, pRoot ); } free( ppNodesDsd ); + assert(pRoot); // remove the current fanins Abc_ObjRemoveFanins( pNode ); @@ -466,7 +467,7 @@ void Abc_NodeDecompDsdAndMux( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Dsd_Manager ***********************************************************************/ bool Abc_NodeIsForDsd( Abc_Obj_t * pNode ) { - DdManager * dd = pNode->pNtk->pManFunc; +// DdManager * dd = pNode->pNtk->pManFunc; // DdNode * bFunc, * bFunc0, * bFunc1; assert( Abc_ObjIsNode(pNode) ); // if ( Cudd_DagSize(pNode->pData)-1 > Abc_ObjFaninNum(pNode) ) diff --git a/src/base/abci/abcFpga.c b/src/base/abci/abcFpga.c index 78e7cf6b..b87edb6b 100644 --- a/src/base/abci/abcFpga.c +++ b/src/base/abci/abcFpga.c @@ -49,7 +49,7 @@ Abc_Ntk_t * Abc_NtkFpga( Abc_Ntk_t * pNtk, float DelayTarget, int fRecovery, int int fShowSwitching = 1; Abc_Ntk_t * pNtkNew; Fpga_Man_t * pMan; - Vec_Int_t * vSwitching; + Vec_Int_t * vSwitching = NULL; float * pSwitching = NULL; int Num; @@ -70,7 +70,7 @@ Abc_Ntk_t * Abc_NtkFpga( Abc_Ntk_t * pNtk, float DelayTarget, int fRecovery, int // perform FPGA mapping pMan = Abc_NtkToFpga( pNtk, fRecovery, pSwitching, fLatchPaths, fVerbose ); - if ( pSwitching ) Vec_IntFree( vSwitching ); + if ( pSwitching ) { assert(vSwitching); Vec_IntFree( vSwitching ); } if ( pMan == NULL ) return NULL; Fpga_ManSetSwitching( pMan, fSwitching ); diff --git a/src/base/abci/abcFraig.c b/src/base/abci/abcFraig.c index be8a25f1..d3cbaccb 100644 --- a/src/base/abci/abcFraig.c +++ b/src/base/abci/abcFraig.c @@ -101,7 +101,7 @@ void * Abc_NtkToFraig( Abc_Ntk_t * pNtk, void * pParams, int fAllNodes, int fExd { int fInternal = ((Fraig_Params_t *)pParams)->fInternal; Fraig_Man_t * pMan; - ProgressBar * pProgress; + ProgressBar * pProgress = NULL; Vec_Ptr_t * vNodes; Abc_Obj_t * pNode; int i; @@ -126,14 +126,18 @@ void * Abc_NtkToFraig( Abc_Ntk_t * pNtk, void * pParams, int fAllNodes, int fExd { if ( Abc_ObjFaninNum(pNode) == 0 ) continue; - if ( !fInternal ) + if ( !fInternal ) { + assert(pProgress); Extra_ProgressBarUpdate( pProgress, i, NULL ); + } pNode->pCopy = (Abc_Obj_t *)Fraig_NodeAnd( pMan, Fraig_NotCond( Abc_ObjFanin0(pNode)->pCopy, Abc_ObjFaninC0(pNode) ), Fraig_NotCond( Abc_ObjFanin1(pNode)->pCopy, Abc_ObjFaninC1(pNode) ) ); } - if ( !fInternal ) + if ( !fInternal ) { + assert(pProgress); Extra_ProgressBarStop( pProgress ); + } Vec_PtrFree( vNodes ); // use EXDC to change the mapping of nodes into FRAIG nodes @@ -316,7 +320,7 @@ Abc_Obj_t * Abc_NodeFromFraig_rec( Abc_Ntk_t * pNtkNew, Fraig_Node_t * pNodeFrai Fraig_Node_t * pNodeTemp, * pNodeFraigR = Fraig_Regular(pNodeFraig); void ** ppTail; // check if the node was already considered - if ( pRes = (Abc_Obj_t *)Fraig_NodeReadData1(pNodeFraigR) ) + if ( (pRes = (Abc_Obj_t *)Fraig_NodeReadData1(pNodeFraigR)) ) return Abc_ObjNotCond( pRes, Fraig_IsComplement(pNodeFraig) ); // solve the children pRes0 = Abc_NodeFromFraig_rec( pNtkNew, Fraig_NodeReadOne(pNodeFraigR) ); @@ -455,7 +459,7 @@ void Abc_NtkFromFraig2_rec( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, Vec_Ptr_t * Abc_NodeSetTravIdCurrent( pNode ); assert( Abc_ObjIsNode( pNode ) ); // get the node's representative - if ( pRepr = Vec_PtrEntry(vNodeReprs, pNode->Id) ) + if ( (pRepr = Vec_PtrEntry(vNodeReprs, pNode->Id)) ) { Abc_NtkFromFraig2_rec( pNtkNew, pRepr, vNodeReprs ); pNode->pCopy = Abc_ObjNotCond( pRepr->pCopy, pRepr->fPhase ^ pNode->fPhase ); @@ -695,7 +699,7 @@ Abc_Ntk_t * Abc_NtkFraigRestore() Vec_Ptr_t * vStore; Abc_Ntk_t * pNtk, * pFraig; int nWords1, nWords2, nWordsMin; - int clk = clock(); +// int clk = clock(); // get the stored network vStore = Abc_FrameReadStore(); @@ -732,6 +736,7 @@ Abc_Ntk_t * Abc_NtkFraigRestore() Params.fDoSparse = 1; // performs equiv tests for sparse functions Params.fChoicing = 1; // enables recording structural choices Params.fTryProve = 0; // tries to solve the final miter + Params.fInternal = 1; // does not show progress bar Params.fVerbose = 0; // the verbosiness flag // perform partitioned computation of structural choices diff --git a/src/base/abci/abcIf.c b/src/base/abci/abcIf.c index 94c7dda8..751e2b2f 100644 --- a/src/base/abci/abcIf.c +++ b/src/base/abci/abcIf.c @@ -453,8 +453,8 @@ Hop_Obj_t * Abc_NodeIfToHop( Hop_Man_t * pHopMan, If_Man_t * pIfMan, If_Obj_t * ***********************************************************************/ int Abc_ObjCompareFlow( Abc_Obj_t ** ppNode0, Abc_Obj_t ** ppNode1 ) { - float Flow0 = Abc_Int2Float((int)(*ppNode0)->pCopy); - float Flow1 = Abc_Int2Float((int)(*ppNode1)->pCopy); + float Flow0 = Abc_Int2Float((int)(PORT_PTRINT_T)(*ppNode0)->pCopy); + float Flow1 = Abc_Int2Float((int)(PORT_PTRINT_T)(*ppNode1)->pCopy); if ( Flow0 > Flow1 ) return -1; if ( Flow0 < Flow1 ) @@ -517,9 +517,9 @@ Vec_Ptr_t * Abc_NtkFindGoodOrder( Abc_Ntk_t * pNtk ) { pFanin0 = Abc_ObjFanin0(pNode); pFanin1 = Abc_ObjFanin1(pNode); - Flow0 = Abc_Int2Float((int)pFanin0->pCopy)/Abc_ObjFanoutNum(pFanin0); - Flow1 = Abc_Int2Float((int)pFanin1->pCopy)/Abc_ObjFanoutNum(pFanin1); - pNode->pCopy = (Abc_Obj_t *)Abc_Float2Int(Flow0 + Flow1+(float)1.0); + Flow0 = Abc_Int2Float((int)(PORT_PTRINT_T)pFanin0->pCopy)/Abc_ObjFanoutNum(pFanin0); + Flow1 = Abc_Int2Float((int)(PORT_PTRINT_T)pFanin1->pCopy)/Abc_ObjFanoutNum(pFanin1); + pNode->pCopy = (Abc_Obj_t *)(PORT_PTRINT_T)Abc_Float2Int(Flow0 + Flow1+(float)1.0); } // find the flow of the COs vCos = Vec_PtrAlloc( Abc_NtkCoNum(pNtk) ); @@ -536,7 +536,7 @@ Vec_Ptr_t * Abc_NtkFindGoodOrder( Abc_Ntk_t * pNtk ) // verify sorting pFanin0 = Vec_PtrEntry(vCos, 0); pFanin1 = Vec_PtrEntryLast(vCos); - assert( Abc_Int2Float((int)pFanin0->pCopy) >= Abc_Int2Float((int)pFanin1->pCopy) ); + assert( Abc_Int2Float((int)(PORT_PTRINT_T)pFanin0->pCopy) >= Abc_Int2Float((int)(PORT_PTRINT_T)pFanin1->pCopy) ); // collect the nodes in the topological order from the new array Abc_NtkIncrementTravId( pNtk ); diff --git a/src/base/abci/abcIvy.c b/src/base/abci/abcIvy.c index a470448e..96d8196e 100644 --- a/src/base/abci/abcIvy.c +++ b/src/base/abci/abcIvy.c @@ -73,7 +73,6 @@ extern int timeRetime; Ivy_Man_t * Abc_NtkIvyBefore( Abc_Ntk_t * pNtk, int fSeq, int fUseDc ) { Ivy_Man_t * pMan; - int fCleanup = 1; //timeRetime = clock(); assert( !Abc_NtkIsNetlist(pNtk) ); if ( Abc_NtkIsBddLogic(pNtk) ) @@ -588,9 +587,9 @@ Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk ) { // Abc_Ntk_t * pNtkAig; Ivy_Man_t * pMan;//, * pTemp; - int fCleanup = 1; +// int fCleanup = 1; // int nNodes; - int nLatches = Abc_NtkLatchNum(pNtk); +// int nLatches = Abc_NtkLatchNum(pNtk); Vec_Int_t * vInit = Abc_NtkCollectLatchValuesIvy( pNtk, 0 ); assert( !Abc_NtkIsNetlist(pNtk) ); diff --git a/src/base/abci/abcLut.c b/src/base/abci/abcLut.c index afa76cc8..4203a425 100644 --- a/src/base/abci/abcLut.c +++ b/src/base/abci/abcLut.c @@ -21,6 +21,8 @@ #include "abc.h" #include "cut.h" +#define LARGE_LEVEL 1000000 + //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// @@ -212,7 +214,7 @@ void Abc_NodeLutMap( Cut_Man_t * pManCuts, Abc_Obj_t * pObj ) assert( pCut != NULL ); assert( pObj->Level == 0 ); // go through the cuts - pObj->Level = ABC_INFINITY; + pObj->Level = LARGE_LEVEL; for ( pCut = pCut->pNext; pCut; pCut = pCut->pNext ) { DelayMax = 0; @@ -226,7 +228,7 @@ void Abc_NodeLutMap( Cut_Man_t * pManCuts, Abc_Obj_t * pObj ) if ( (int)pObj->Level > DelayMax ) pObj->Level = DelayMax; } - assert( pObj->Level < ABC_INFINITY ); + assert( pObj->Level < LARGE_LEVEL ); pObj->Level++; // printf( "%d(%d) ", pObj->Id, pObj->Level ); } @@ -340,7 +342,7 @@ void Abc_ManSclStop( Abc_ManScl_t * p ) unsigned * Abc_NodeSuperChoiceTruth( Abc_ManScl_t * pManScl ) { Abc_Obj_t * pObj; - unsigned * puData0, * puData1, * puData; + unsigned * puData0, * puData1, * puData = NULL; char * pSop; int i, k; // set elementary truth tables @@ -635,7 +637,7 @@ void Abc_NodeDecomposeSort( Abc_Obj_t ** pLeaves, int nVars, int * pBSet, int nL for ( i = 0; i < nLutSize; i++ ) { kBest = -1; - LevelMin = ABC_INFINITY; + LevelMin = LARGE_LEVEL; for ( k = 0; k < nVars; k++ ) if ( pTemp[k] && LevelMin > (int)pTemp[k]->Level ) { @@ -704,7 +706,7 @@ int Abc_NodeDecomposeStep( Abc_ManScl_t * p ) pTruthClass = p->uCofs[ nCofs + pCofClasses[k][0] ]; if ( Extra_TruthIsEqual( pTruthCof, pTruthClass, nVars ) ) { - pCofClasses[k][ nCofClasses[k]++ ] = i; + pCofClasses[k][(int)nCofClasses[k]++ ] = i; break; } } diff --git a/src/base/abci/abcMap.c b/src/base/abci/abcMap.c index d4d50923..f6a1bb4e 100644 --- a/src/base/abci/abcMap.c +++ b/src/base/abci/abcMap.c @@ -59,7 +59,7 @@ Abc_Ntk_t * Abc_NtkMap( Abc_Ntk_t * pNtk, double DelayTarget, int fRecovery, int int fShowSwitching = 1; Abc_Ntk_t * pNtkNew; Map_Man_t * pMan; - Vec_Int_t * vSwitching; + Vec_Int_t * vSwitching = NULL; float * pSwitching = NULL; int clk; diff --git a/src/base/abci/abcNtbdd.c b/src/base/abci/abcNtbdd.c index 3de3eefa..ed02f589 100644 --- a/src/base/abci/abcNtbdd.c +++ b/src/base/abci/abcNtbdd.c @@ -258,7 +258,7 @@ DdManager * Abc_NtkBuildGlobalBdds( Abc_Ntk_t * pNtk, int nBddSizeMax, int fDrop // start the manager assert( Abc_NtkGlobalBdd(pNtk) == NULL ); dd = Cudd_Init( Abc_NtkCiNum(pNtk), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 ); - pAttMan = Vec_AttAlloc( 0, Abc_NtkObjNumMax(pNtk) + 1, dd, Extra_StopManager, NULL, Cudd_RecursiveDeref ); + pAttMan = Vec_AttAlloc( Abc_NtkObjNumMax(pNtk) + 1, dd, (void (*)(void*))Extra_StopManager, NULL, (void (*)(void*,void*))Cudd_RecursiveDeref ); Vec_PtrWriteEntry( pNtk->vAttrs, VEC_ATTR_GLOBAL_BDD, pAttMan ); // set reordering diff --git a/src/base/abci/abcOdc.c b/src/base/abci/abcOdc.c index d6e59328..989d551f 100644 --- a/src/base/abci/abcOdc.c +++ b/src/base/abci/abcOdc.c @@ -662,10 +662,10 @@ void * Abc_NtkDontCareTransfer_rec( Odc_Man_t * p, Abc_Obj_t * pNode, Abc_Obj_t assert( Abc_ObjIsNode(pNode) ); // consider the case when the node is the pivot if ( pNode == pPivot ) - return pNode->pCopy = (void *)((Odc_Const1() << 16) | Odc_Const0()); + return pNode->pCopy = (void *)(PORT_PTRUINT_T)((Odc_Const1() << 16) | Odc_Const0()); // compute the cofactors - uData0 = (unsigned)Abc_NtkDontCareTransfer_rec( p, Abc_ObjFanin0(pNode), pPivot ); - uData1 = (unsigned)Abc_NtkDontCareTransfer_rec( p, Abc_ObjFanin1(pNode), pPivot ); + uData0 = (unsigned)(PORT_PTRUINT_T)Abc_NtkDontCareTransfer_rec( p, Abc_ObjFanin0(pNode), pPivot ); + uData1 = (unsigned)(PORT_PTRUINT_T)Abc_NtkDontCareTransfer_rec( p, Abc_ObjFanin1(pNode), pPivot ); // find the 0-cofactor uLit0 = Odc_NotCond( (Odc_Lit_t)(uData0 & 0xffff), Abc_ObjFaninC0(pNode) ); uLit1 = Odc_NotCond( (Odc_Lit_t)(uData1 & 0xffff), Abc_ObjFaninC1(pNode) ); @@ -675,7 +675,7 @@ void * Abc_NtkDontCareTransfer_rec( Odc_Man_t * p, Abc_Obj_t * pNode, Abc_Obj_t uLit1 = Odc_NotCond( (Odc_Lit_t)(uData1 >> 16), Abc_ObjFaninC1(pNode) ); uRes1 = Odc_And( p, uLit0, uLit1 ); // find the result - return pNode->pCopy = (void *)((uRes1 << 16) | uRes0); + return pNode->pCopy = (void *)(PORT_PTRUINT_T)((uRes1 << 16) | uRes0); } /**Function************************************************************* @@ -701,21 +701,21 @@ int Abc_NtkDontCareTransfer( Odc_Man_t * p ) Vec_PtrForEachEntry( p->vLeaves, pObj, i ) { uLit = Odc_Var( p, i ); - pObj->pCopy = (void *)((uLit << 16) | uLit); + pObj->pCopy = (void *)(PORT_PTRUINT_T)((uLit << 16) | uLit); Abc_NodeSetTravIdCurrent(pObj); } // set elementary variables at the branched Vec_PtrForEachEntry( p->vBranches, pObj, i ) { uLit = Odc_Var( p, i+p->nVarsMax ); - pObj->pCopy = (void *)((uLit << 16) | uLit); + pObj->pCopy = (void *)(PORT_PTRUINT_T)((uLit << 16) | uLit); Abc_NodeSetTravIdCurrent(pObj); } // compute the AIG for the window p->iRoot = Odc_Const0(); Vec_PtrForEachEntry( p->vRoots, pObj, i ) { - uData = (unsigned)Abc_NtkDontCareTransfer_rec( p, pObj, p->pNode ); + uData = (unsigned)(PORT_PTRUINT_T)Abc_NtkDontCareTransfer_rec( p, pObj, p->pNode ); // get the cofactors uRes0 = uData & 0xffff; uRes1 = uData >> 16; diff --git a/src/base/abci/abcPart.c b/src/base/abci/abcPart.c index 85c4e918..a482e5c9 100644 --- a/src/base/abci/abcPart.c +++ b/src/base/abci/abcPart.c @@ -115,7 +115,7 @@ char * Supp_ManFetch( Supp_Man_t * p, int nSize ) assert( nSize > 0 ); Type = Supp_SizeType( nSize, p->nStepSize ); Vec_PtrFillExtra( p->vFree, Type + 1, NULL ); - if ( pMemory = Vec_PtrEntry( p->vFree, Type ) ) + if ( (pMemory = Vec_PtrEntry( p->vFree, Type )) ) { Vec_PtrWriteEntry( p->vFree, Type, Supp_OneNext(pMemory) ); return pMemory; @@ -321,9 +321,9 @@ Vec_Ptr_t * Abc_NtkComputeSupportsSmart( Abc_Ntk_t * pNtk ) int i; // set the number of PIs/POs Abc_NtkForEachCi( pNtk, pObj, i ) - pObj->pNext = (Abc_Obj_t *)i; + pObj->pNext = (Abc_Obj_t *)(PORT_PTRINT_T)i; Abc_NtkForEachCo( pNtk, pObj, i ) - pObj->pNext = (Abc_Obj_t *)i; + pObj->pNext = (Abc_Obj_t *)(PORT_PTRINT_T)i; // start the support computation manager p = Supp_ManStart( 1 << 20, 1 << 6 ); // consider objects in the topological order @@ -353,7 +353,7 @@ Vec_Ptr_t * Abc_NtkComputeSupportsSmart( Abc_Ntk_t * pNtk ) if ( Abc_ObjIsNode(Abc_ObjFanin0(pObj)) ) { vSupp = Supp_ManTransferEntry(pPart0); - Vec_IntPush( vSupp, (int)pObj->pNext ); + Vec_IntPush( vSupp, (int)(PORT_PTRINT_T)pObj->pNext ); Vec_PtrPush( vSupports, vSupp ); } assert( pPart0->nRefs > 0 ); @@ -366,7 +366,7 @@ Vec_Ptr_t * Abc_NtkComputeSupportsSmart( Abc_Ntk_t * pNtk ) if ( Abc_ObjFanoutNum(pObj) ) { pPart0 = (Supp_One_t *)Supp_ManFetchEntry( p, 1, Abc_ObjFanoutNum(pObj) ); - pPart0->pOuts[ pPart0->nOuts++ ] = (int)pObj->pNext; + pPart0->pOuts[ pPart0->nOuts++ ] = (int)(PORT_PTRINT_T)pObj->pNext; pObj->pCopy = (Abc_Obj_t *)pPart0; } continue; @@ -417,7 +417,7 @@ Vec_Ptr_t * Abc_NtkComputeSupportsNaive( Abc_Ntk_t * pNtk ) int i, k; // set the PI numbers Abc_NtkForEachCi( pNtk, pObj, i ) - pObj->pNext = (void *)i; + pObj->pNext = (void *)(PORT_PTRINT_T)i; // save the CI numbers vSupports = Vec_PtrAlloc( Abc_NtkCoNum(pNtk) ); Abc_NtkForEachCo( pNtk, pObj, i ) @@ -427,7 +427,7 @@ Vec_Ptr_t * Abc_NtkComputeSupportsNaive( Abc_Ntk_t * pNtk ) vSupp = Abc_NtkNodeSupport( pNtk, &pObj, 1 ); vSuppI = (Vec_Int_t *)vSupp; Vec_PtrForEachEntry( vSupp, pTemp, k ) - Vec_IntWriteEntry( vSuppI, k, (int)pTemp->pNext ); + Vec_IntWriteEntry( vSuppI, k, (int)(PORT_PTRINT_T)pTemp->pNext ); Vec_IntSort( vSuppI, 0 ); // append the number of this output Vec_IntPush( vSuppI, i ); diff --git a/src/base/abci/abcPrint.c b/src/base/abci/abcPrint.c index 271f94df..b753700e 100644 --- a/src/base/abci/abcPrint.c +++ b/src/base/abci/abcPrint.c @@ -80,11 +80,11 @@ int Abc_NtkCompareAndSaveBest( Abc_Ntk_t * pNtk ) ParsNew.nPis = Abc_NtkPiNum( pNtk ); ParsNew.nPos = Abc_NtkPoNum( pNtk ); // reset the parameters if the network has the same name - if ( ParsBest.pName == NULL || - strcmp(ParsBest.pName, pNtk->pName) || - ParsBest.Depth > ParsNew.Depth || - ParsBest.Depth == ParsNew.Depth && ParsBest.Flops > ParsNew.Flops || - ParsBest.Depth == ParsNew.Depth && ParsBest.Flops == ParsNew.Flops && ParsBest.Nodes > ParsNew.Nodes ) + if ( ParsBest.pName == NULL || + strcmp(ParsBest.pName, pNtk->pName) || + ParsBest.Depth > ParsNew.Depth || + (ParsBest.Depth == ParsNew.Depth && ParsBest.Flops > ParsNew.Flops) || + (ParsBest.Depth == ParsNew.Depth && ParsBest.Flops == ParsNew.Flops && ParsBest.Nodes > ParsNew.Nodes) ) { FREE( ParsBest.pName ); ParsBest.pName = Extra_UtilStrsav( pNtk->pName ); @@ -145,9 +145,9 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored, int fSave else if ( Abc_NtkIsStrash(pNtk) ) { fprintf( pFile, " and = %5d", Abc_NtkNodeNum(pNtk) ); - if ( Num = Abc_NtkGetChoiceNum(pNtk) ) + if ( (Num = Abc_NtkGetChoiceNum(pNtk)) ) fprintf( pFile, " (choice = %d)", Num ); - if ( Num = Abc_NtkGetExorNum(pNtk) ) + if ( (Num = Abc_NtkGetExorNum(pNtk)) ) fprintf( pFile, " (exor = %d)", Num ); // if ( Num2 = Abc_NtkGetMuxNum(pNtk) ) // fprintf( pFile, " (mux = %d)", Num2-Num ); @@ -930,7 +930,7 @@ void Abc_NtkPrintGates( Abc_Ntk_t * pNtk, int fUseLibrary ) return; // transform logic functions from BDD to SOP - if ( fHasBdds = Abc_NtkIsBddLogic(pNtk) ) + if ( (fHasBdds = Abc_NtkIsBddLogic(pNtk)) ) { if ( !Abc_NtkBddToSop(pNtk, 0) ) { @@ -955,9 +955,11 @@ void Abc_NtkPrintGates( Abc_Ntk_t * pNtk, int fUseLibrary ) CountBuf++; else if ( Abc_SopIsInv(pSop) ) CountInv++; - else if ( !Abc_SopIsComplement(pSop) && Abc_SopIsAndType(pSop) || Abc_SopIsComplement(pSop) && Abc_SopIsOrType(pSop) ) + else if ( (!Abc_SopIsComplement(pSop) && Abc_SopIsAndType(pSop)) || + ( Abc_SopIsComplement(pSop) && Abc_SopIsOrType(pSop)) ) CountAnd++; - else if ( Abc_SopIsComplement(pSop) && Abc_SopIsAndType(pSop) || !Abc_SopIsComplement(pSop) && Abc_SopIsOrType(pSop) ) + else if ( ( Abc_SopIsComplement(pSop) && Abc_SopIsAndType(pSop)) || + (!Abc_SopIsComplement(pSop) && Abc_SopIsOrType(pSop)) ) CountOr++; else CountOther++; @@ -1127,7 +1129,7 @@ void Abc_ObjPrint( FILE * pFile, Abc_Obj_t * pObj ) */ // print the logic function if ( Abc_ObjIsNode(pObj) && Abc_NtkIsSopLogic(pObj->pNtk) ) - fprintf( pFile, " %s", pObj->pData ); + fprintf( pFile, " %s", (char*)pObj->pData ); else fprintf( pFile, "\n" ); } diff --git a/src/base/abci/abcProve.c b/src/base/abci/abcProve.c index 618b6a0f..6a695fc4 100644 --- a/src/base/abci/abcProve.c +++ b/src/base/abci/abcProve.c @@ -55,7 +55,7 @@ int Abc_NtkMiterProve( Abc_Ntk_t ** ppNtk, void * pPars ) { Prove_Params_t * pParams = pPars; Abc_Ntk_t * pNtk, * pNtkTemp; - int RetValue, nIter, nSatFails, Counter, clk, timeStart = clock(); + int RetValue = -1, nIter, nSatFails, Counter, clk; //, timeStart = clock(); sint64 nSatConfs, nSatInspects, nInspectLimit; // get the starting network diff --git a/src/base/abci/abcReach.c b/src/base/abci/abcReach.c index 42494b5c..815e452a 100644 --- a/src/base/abci/abcReach.c +++ b/src/base/abci/abcReach.c @@ -132,10 +132,10 @@ DdNode ** Abc_NtkCreatePartitions( DdManager * dd, Abc_Ntk_t * pNtk, int fReorde DdNode * Abc_NtkComputeReachable( DdManager * dd, Abc_Ntk_t * pNtk, DdNode ** pbParts, DdNode * bInitial, DdNode * bOutput, int nBddMax, int nIterMax, int fPartition, int fReorder, int fVerbose ) { int fInternalReorder = 0; - Extra_ImageTree_t * pTree; - Extra_ImageTree2_t * pTree2; + Extra_ImageTree_t * pTree = NULL; + Extra_ImageTree2_t * pTree2 = NULL; DdNode * bReached, * bCubeCs; - DdNode * bCurrent, * bNext, * bTemp; + DdNode * bCurrent, * bNext = NULL, * bTemp; DdNode ** pbVarsY; Abc_Obj_t * pLatch; int i, nIters, nBddSize; @@ -159,6 +159,7 @@ DdNode * Abc_NtkComputeReachable( DdManager * dd, Abc_Ntk_t * pNtk, DdNode ** pb // perform reachability analisys bCurrent = bInitial; Cudd_Ref( bCurrent ); bReached = bInitial; Cudd_Ref( bReached ); + assert( nIterMax > 1 ); // required to not deref uninitialized bNext for ( nIters = 1; nIters <= nIterMax; nIters++ ) { // compute the next states diff --git a/src/base/abci/abcRec.c b/src/base/abci/abcRec.c index f74cbee8..2983efc2 100644 --- a/src/base/abci/abcRec.c +++ b/src/base/abci/abcRec.c @@ -232,11 +232,6 @@ p->timeTruth += clock() - clk; pObj = Abc_ObjFanin0(pObj); pTruth = Vec_PtrEntry( p->vTtNodes, pObj->Id ); - if ( pTruth[0] == 1128481603 ) - { - int x = 0; - } - // add the resulting truth table to the hash table ppSpot = Abc_NtkRecTableLookup( p, pTruth, p->nVars ); assert( pObj->pEquiv == NULL ); @@ -777,7 +772,7 @@ int Abc_NtkRecAddCut( If_Man_t * pIfMan, If_Obj_t * pRoot, If_Cut_t * pCut ) static int s_MaxSize[16] = { 0 }; char Buffer[40], Name[20], Truth[20]; char pCanonPerm[16]; - Abc_Obj_t * pObj, * pFanin0, * pFanin1, ** ppSpot, * pObjPo; + Abc_Obj_t * pObj = NULL, * pFanin0, * pFanin1, ** ppSpot, * pObjPo; Abc_Ntk_t * pAig = s_pMan->pNtk; If_Obj_t * pIfObj; Vec_Ptr_t * vNodes = s_pMan->vNodes; @@ -788,11 +783,6 @@ int Abc_NtkRecAddCut( If_Man_t * pIfMan, If_Obj_t * pRoot, If_Cut_t * pCut ) unsigned uCanonPhase; int clk; - if ( pRoot->Id == 2639 ) - { - int y = 0; - } - assert( nInputs <= 16 ); assert( nInputs == (int)pCut->nLimit ); s_pMan->nTried++; @@ -848,7 +838,7 @@ s_pMan->timeCanon += clock() - clk; for ( i = 0; i < nLeaves; i++ ) { // get hold of the corresponding leaf - pIfObj = If_ManObj( pIfMan, pCut->pLeaves[pCanonPerm[i]] ); + pIfObj = If_ManObj( pIfMan, pCut->pLeaves[(int)pCanonPerm[i]] ); // get hold of the corresponding new node pObj = Abc_NtkPi( pAig, i ); pObj = Abc_ObjNotCond( pObj, (uCanonPhase & (1 << i)) ); @@ -897,6 +887,7 @@ s_pMan->timeCanon += clock() - clk; } } + assert(pObj); pTruth = Vec_PtrEntry( s_pMan->vTtNodes, pObj->Id ); if ( Kit_TruthSupport(pTruth, nInputs) != Kit_BitMask(nLeaves) ) { diff --git a/src/base/abci/abcReconv.c b/src/base/abci/abcReconv.c index e77f055a..078aee9d 100644 --- a/src/base/abci/abcReconv.c +++ b/src/base/abci/abcReconv.c @@ -384,8 +384,8 @@ int Abc_NodeBuildCutLevelOne_int( Vec_Ptr_t * vVisited, Vec_Ptr_t * vLeaves, int ***********************************************************************/ int Abc_NodeBuildCutLevelTwo_int( Vec_Ptr_t * vVisited, Vec_Ptr_t * vLeaves, int nFaninLimit ) { - Abc_Obj_t * pNode, * pLeafToAdd, * pNodeToMark1, * pNodeToMark2; - int CostCur, i; + Abc_Obj_t * pNode = NULL, * pLeafToAdd, * pNodeToMark1, * pNodeToMark2; + int CostCur = 0, i; // find the best fanin Vec_PtrForEachEntry( vLeaves, pNode, i ) { @@ -494,7 +494,7 @@ void Abc_NodeConeMarkCollect_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vVisited ) DdNode * Abc_NodeConeBdd( DdManager * dd, DdNode ** pbVars, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vVisited ) { Abc_Obj_t * pNode; - DdNode * bFunc0, * bFunc1, * bFunc; + DdNode * bFunc0, * bFunc1, * bFunc = NULL; int i; // get the nodes in the cut without fanins in the DFS order Abc_NodeConeCollect( &pRoot, 1, vLeaves, vVisited, 0 ); @@ -510,6 +510,7 @@ DdNode * Abc_NodeConeBdd( DdManager * dd, DdNode ** pbVars, Abc_Obj_t * pRoot, V bFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 ); Cudd_Ref( bFunc ); pNode->pCopy = (Abc_Obj_t *)bFunc; } + assert(bFunc); Cudd_Ref( bFunc ); // dereference the intermediate ones Vec_PtrForEachEntry( vVisited, pNode, i ) diff --git a/src/base/abci/abcRefactor.c b/src/base/abci/abcRefactor.c index b925f1b9..821bd66b 100644 --- a/src/base/abci/abcRefactor.c +++ b/src/base/abci/abcRefactor.c @@ -267,7 +267,7 @@ clk = clock(); nNodesAdded = Dec_GraphToNetworkCount( pNode, pFForm, nNodesSaved, Required ); p->timeEval += clock() - clk; // quit if there is no improvement - if ( nNodesAdded == -1 || nNodesAdded == nNodesSaved && !fUseZeros ) + if ( nNodesAdded == -1 || (nNodesAdded == nNodesSaved && !fUseZeros) ) { Cudd_RecursiveDeref( p->dd, bNodeFunc ); Dec_GraphFree( pFForm ); diff --git a/src/base/abci/abcRestruct.c b/src/base/abci/abcRestruct.c index aa9a2998..2550e02c 100644 --- a/src/base/abci/abcRestruct.c +++ b/src/base/abci/abcRestruct.c @@ -295,7 +295,7 @@ Dec_Graph_t * Abc_NodeRestructure( Abc_ManRst_t * p, Abc_Obj_t * pNode, Cut_Cut_ { if ( pCut->nLeaves < 4 ) continue; - if ( pGraph = Abc_NodeRestructureCut( p, pNode, pCut ) ) + if ( (pGraph = Abc_NodeRestructureCut( p, pNode, pCut )) ) return pGraph; } return NULL; @@ -337,11 +337,6 @@ Dec_Graph_t * Abc_NodeRestructureCut( Abc_ManRst_t * p, Abc_Obj_t * pRoot, Cut_C Vec_PtrPush( p->vLeaves, pLeaf ); } - if ( pRoot->Id == 29 ) - { - int x = 0; - } - clk = clock(); // collect the internal nodes of the cut // Abc_NodeConeCollect( &pRoot, 1, p->vLeaves, p->vVisited, 0 ); @@ -430,7 +425,7 @@ clk = clock(); p->timeEval += clock() - clk; // quit if there is no improvement - if ( pGraph == NULL || nNodesAdded == -1 || nNodesAdded == nNodesSaved && !p->fUseZeros ) + if ( pGraph == NULL || nNodesAdded == -1 || (nNodesAdded == nNodesSaved && !p->fUseZeros) ) { Cudd_RecursiveDeref( p->dd, bFunc ); if ( pGraph ) Dec_GraphFree( pGraph ); @@ -1206,16 +1201,16 @@ void Abc_NodeMffcSimulate( Vec_Ptr_t * vDecs, int nLeaves, Vec_Int_t * vRands, V Vec_PtrForEachEntryStop( vDecs, pObj, i, nLeaves ) { uData = (unsigned)Vec_IntEntry( vRands, i ); - pObj->pData = (void *)uData; + pObj->pData = (void *)(PORT_PTRUINT_T)uData; Vec_IntPush( vSims, uData ); } // simulate Vec_PtrForEachEntryStart( vDecs, pObj, i, nLeaves ) { - uData0 = (unsigned)Abc_ObjFanin0(pObj)->pData; - uData1 = (unsigned)Abc_ObjFanin1(pObj)->pData; + uData0 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin0(pObj)->pData; + uData1 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin1(pObj)->pData; uData = (Abc_ObjFaninC0(pObj)? ~uData0 : uData0) & (Abc_ObjFaninC1(pObj)? ~uData1 : uData1); - pObj->pData = (void *)uData; + pObj->pData = (void *)(PORT_PTRUINT_T)uData; Vec_IntPush( vSims, uData ); } } @@ -1248,7 +1243,7 @@ int Abc_NodeCheckFull( Abc_ManRst_t * p, Dec_Graph_t * pGraph ) ***********************************************************************/ Dec_Graph_t * Abc_NodeMffcConstants( Abc_ManRst_t * p, Vec_Int_t * vSims ) { - Dec_Graph_t * pGraph; + Dec_Graph_t * pGraph = NULL; unsigned uRoot; // get the root node uRoot = (unsigned)Vec_IntEntryLast( vSims ); @@ -1258,6 +1253,7 @@ Dec_Graph_t * Abc_NodeMffcConstants( Abc_ManRst_t * p, Vec_Int_t * vSims ) else if ( uRoot == ~(unsigned)0 ) pGraph = Dec_GraphCreateConst1(); // check the graph + assert(pGraph); if ( Abc_NodeCheckFull( p, pGraph ) ) return pGraph; Dec_GraphFree( pGraph ); diff --git a/src/base/abci/abcResub.c b/src/base/abci/abcResub.c index a2b23c0c..80532b14 100644 --- a/src/base/abci/abcResub.c +++ b/src/base/abci/abcResub.c @@ -164,9 +164,10 @@ int Abc_NtkResubstitute( Abc_Ntk_t * pNtk, int nCutMax, int nStepsMax, int nLeve if ( fUpdateLevel ) Abc_NtkStartReverseLevels( pNtk, 0 ); - if ( Abc_NtkLatchNum(pNtk) ) + if ( Abc_NtkLatchNum(pNtk) ) { Abc_NtkForEachLatch(pNtk, pNode, i) pNode->pNext = pNode->pData; + } // resynthesize each node once pManRes->nNodesBeg = Abc_NtkNodeNum(pNtk); @@ -249,9 +250,10 @@ pManRes->timeTotal = clock() - clkStart; Abc_NtkForEachObj( pNtk, pNode, i ) pNode->pData = NULL; - if ( Abc_NtkLatchNum(pNtk) ) + if ( Abc_NtkLatchNum(pNtk) ) { Abc_NtkForEachLatch(pNtk, pNode, i) pNode->pData = pNode->pNext, pNode->pNext = NULL; + } // put the nodes into the DFS order and reassign their IDs Abc_NtkReassignIds( pNtk ); @@ -1131,7 +1133,7 @@ Dec_Graph_t * Abc_ManResubDivs1( Abc_ManRes_t * p, int Required ) ***********************************************************************/ Dec_Graph_t * Abc_ManResubDivs12( Abc_ManRes_t * p, int Required ) { - Abc_Obj_t * pObj0, * pObj1, * pObj2, * pObjMax, * pObjMin0, * pObjMin1; + Abc_Obj_t * pObj0, * pObj1, * pObj2, * pObjMax, * pObjMin0 = NULL, * pObjMin1 = NULL; unsigned * puData0, * puData1, * puData2, * puDataR; int i, k, j, w, LevelMax; puDataR = p->pRoot->pData; @@ -1169,6 +1171,8 @@ Dec_Graph_t * Abc_ManResubDivs12( Abc_ManRes_t * p, int Required ) } p->nUsedNode2Or++; + assert(pObjMin0); + assert(pObjMin1); return Abc_ManResubQuit21( p->pRoot, pObjMin0, pObjMin1, pObjMax, 1 ); } } @@ -1208,6 +1212,8 @@ Dec_Graph_t * Abc_ManResubDivs12( Abc_ManRes_t * p, int Required ) } p->nUsedNode2And++; + assert(pObjMin0); + assert(pObjMin1); return Abc_ManResubQuit21( p->pRoot, pObjMin0, pObjMin1, pObjMax, 0 ); } } @@ -1341,7 +1347,7 @@ Dec_Graph_t * Abc_ManResubDivs3( Abc_ManRes_t * p, int Required ) { Abc_Obj_t * pObj0, * pObj1, * pObj2, * pObj3; unsigned * puData0, * puData1, * puData2, * puData3, * puDataR; - int i, k, w, Flag; + int i, k, w = 0, Flag; puDataR = p->pRoot->pData; // check positive unate divisors Vec_PtrForEachEntry( p->vDivs2UP0, pObj0, i ) @@ -1653,7 +1659,7 @@ p->timeSim += clock() - clk; clk = clock(); // consider constants - if ( pGraph = Abc_ManResubQuit( p ) ) + if ( (pGraph = Abc_ManResubQuit( p )) ) { p->nUsedNodeC++; p->nLastGain = p->nMffc; @@ -1661,7 +1667,7 @@ clk = clock(); } // consider equal nodes - if ( pGraph = Abc_ManResubDivs0( p ) ) + if ( (pGraph = Abc_ManResubDivs0( p )) ) { p->timeRes1 += clock() - clk; p->nUsedNode0++; @@ -1678,7 +1684,7 @@ p->timeRes1 += clock() - clk; Abc_ManResubDivsS( p, Required ); // consider one node - if ( pGraph = Abc_ManResubDivs1( p, Required ) ) + if ( (pGraph = Abc_ManResubDivs1( p, Required )) ) { p->timeRes1 += clock() - clk; p->nLastGain = p->nMffc - 1; @@ -1690,7 +1696,7 @@ p->timeRes1 += clock() - clk; clk = clock(); // consider triples - if ( pGraph = Abc_ManResubDivs12( p, Required ) ) + if ( (pGraph = Abc_ManResubDivs12( p, Required )) ) { p->timeRes2 += clock() - clk; p->nLastGain = p->nMffc - 2; @@ -1705,7 +1711,7 @@ p->timeResD += clock() - clk; // consider two nodes clk = clock(); - if ( pGraph = Abc_ManResubDivs2( p, Required ) ) + if ( (pGraph = Abc_ManResubDivs2( p, Required )) ) { p->timeRes2 += clock() - clk; p->nLastGain = p->nMffc - 2; @@ -1717,7 +1723,7 @@ p->timeRes2 += clock() - clk; // consider two nodes clk = clock(); - if ( pGraph = Abc_ManResubDivs3( p, Required ) ) + if ( (pGraph = Abc_ManResubDivs3( p, Required )) ) { p->timeRes3 += clock() - clk; p->nLastGain = p->nMffc - 3; @@ -1880,7 +1886,7 @@ Vec_Ptr_t * Abc_CutFactorLarge( Abc_Obj_t * pNode, int nLeavesMax ) vFeasible = Vec_IntAlloc( nLeavesMax ); while ( 1 ) { - BestCut = -1; + BestCut = -1, BestShare = -1; // find the next feasible cut to add Vec_IntClear( vFeasible ); Vec_PtrForEachEntry( vFactors, vFact, i ) diff --git a/src/base/abci/abcRewrite.c b/src/base/abci/abcRewrite.c index 3b50107b..ff1e1f8b 100644 --- a/src/base/abci/abcRewrite.c +++ b/src/base/abci/abcRewrite.c @@ -62,7 +62,7 @@ int Abc_NtkRewrite( Abc_Ntk_t * pNtk, int fUpdateLevel, int fUseZeros, int fVerb Cut_Man_t * pManCut; Rwr_Man_t * pManRwr; Abc_Obj_t * pNode; - Vec_Ptr_t * vAddedCells = NULL, * vUpdatedNets = NULL; +// Vec_Ptr_t * vAddedCells = NULL, * vUpdatedNets = NULL; Dec_Graph_t * pGraph; int i, nNodes, nGain, fCompl; int clk, clkStart = clock(); @@ -120,7 +120,7 @@ Rwr_ManAddTimeCuts( pManRwr, clock() - clk ); // for each cut, try to resynthesize it nGain = Rwr_NodeRewrite( pManRwr, pManCut, pNode, fUpdateLevel, fUseZeros, fPlaceEnable ); - if ( !(nGain > 0 || nGain == 0 && fUseZeros) ) + if ( !(nGain > 0 || (nGain == 0 && fUseZeros)) ) continue; // if we end up here, a rewriting step is accepted diff --git a/src/base/abci/abcRr.c b/src/base/abci/abcRr.c index c33444df..888850e1 100644 --- a/src/base/abci/abcRr.c +++ b/src/base/abci/abcRr.c @@ -729,16 +729,16 @@ void Abc_NtkRRSimulateStart( Abc_Ntk_t * pNtk ) int i; Abc_AigConst1(pNtk)->pData = (void *)~((unsigned)0); Abc_NtkForEachCi( pNtk, pObj, i ) - pObj->pData = (void *)SIM_RANDOM_UNSIGNED; + pObj->pData = (void *)(PORT_PTRUINT_T)SIM_RANDOM_UNSIGNED; Abc_NtkForEachNode( pNtk, pObj, i ) { if ( i == 0 ) continue; - uData0 = (unsigned)Abc_ObjFanin0(pObj)->pData; - uData1 = (unsigned)Abc_ObjFanin1(pObj)->pData; + uData0 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin0(pObj)->pData; + uData1 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin1(pObj)->pData; uData = Abc_ObjFaninC0(pObj)? ~uData0 : uData0; uData &= Abc_ObjFaninC1(pObj)? ~uData1 : uData1; assert( pObj->pData == NULL ); - pObj->pData = (void *)uData; + pObj->pData = (void *)(PORT_PTRUINT_T)uData; } } @@ -802,24 +802,24 @@ Vec_Str_t * Abc_NtkRRSimulate( Abc_Ntk_t * pNtk ) // simulate patters and store them in copy Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)~((unsigned)0); Abc_NtkForEachCi( pNtk, pObj, i ) - pObj->pCopy = (Abc_Obj_t *)SIM_RANDOM_UNSIGNED; + pObj->pCopy = (Abc_Obj_t *)(PORT_PTRUINT_T)SIM_RANDOM_UNSIGNED; Abc_NtkForEachNode( pNtk, pObj, i ) { if ( i == 0 ) continue; - uData0 = (unsigned)Abc_ObjFanin0(pObj)->pData; - uData1 = (unsigned)Abc_ObjFanin1(pObj)->pData; + uData0 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin0(pObj)->pData; + uData1 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin1(pObj)->pData; uData = Abc_ObjFaninC0(pObj)? ~uData0 : uData0; uData &= Abc_ObjFaninC1(pObj)? ~uData1 : uData1; - pObj->pCopy = (Abc_Obj_t *)uData; + pObj->pCopy = (Abc_Obj_t *)(PORT_PTRUINT_T)uData; } // store the result in data Abc_NtkForEachCo( pNtk, pObj, i ) { - uData0 = (unsigned)Abc_ObjFanin0(pObj)->pData; + uData0 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin0(pObj)->pData; if ( Abc_ObjFaninC0(pObj) ) - pObj->pData = (void *)~uData0; + pObj->pData = (void *)(PORT_PTRUINT_T)~uData0; else - pObj->pData = (void *)uData0; + pObj->pData = (void *)(PORT_PTRUINT_T)uData0; } // refine the candidates @@ -904,7 +904,7 @@ void Sim_CollectNodes_rec( Abc_Obj_t * pRoot, Vec_Ptr_t * vField ) Abc_ObjForEachFanin( pRoot, pFanin, i ) Sim_CollectNodes_rec( pFanin, vField ); if ( !Abc_ObjIsCo(pRoot) ) - pRoot->pData = (void *)Vec_PtrSize(vField); + pRoot->pData = (void *)(PORT_PTRUINT_T)Vec_PtrSize(vField); Vec_PtrPush( vField, pRoot ); } @@ -934,13 +934,13 @@ void Sim_SimulateCollected( Vec_Str_t * vTargets, Vec_Ptr_t * vNodes, Vec_Ptr_t { pUnsigned = Vec_PtrEntry( vSims, i ); for ( k = 0; k < Vec_PtrSize(vNodes); k++ ) - pUnsigned[k] = (unsigned)pObj->pCopy; + pUnsigned[k] = (unsigned)(PORT_PTRUINT_T)pObj->pCopy; continue; } if ( Abc_ObjIsCo(pObj) ) { pUnsigned = Vec_PtrEntry( vSims, i ); - pUnsignedF = Vec_PtrEntry( vSims, (int)Abc_ObjFanin0(pObj)->pData ); + pUnsignedF = Vec_PtrEntry( vSims, (int)(PORT_PTRUINT_T)Abc_ObjFanin0(pObj)->pData ); if ( Abc_ObjFaninC0(pObj) ) for ( k = 0; k < Vec_PtrSize(vNodes); k++ ) pUnsigned[k] = ~pUnsignedF[k]; @@ -950,7 +950,7 @@ void Sim_SimulateCollected( Vec_Str_t * vTargets, Vec_Ptr_t * vNodes, Vec_Ptr_t // update targets for ( k = 0; k < Vec_PtrSize(vNodes); k++ ) { - if ( pUnsigned[k] == (unsigned)pObj->pData ) + if ( pUnsigned[k] == (unsigned)(PORT_PTRUINT_T)pObj->pData ) continue; pDisproved = Vec_PtrEntry( vNodes, k ); fCompl = Abc_ObjIsComplement(pDisproved); diff --git a/src/base/abci/abcSat.c b/src/base/abci/abcSat.c index afdfbdeb..025652fe 100644 --- a/src/base/abci/abcSat.c +++ b/src/base/abci/abcSat.c @@ -27,7 +27,7 @@ static sat_solver * Abc_NtkMiterSatCreateLogic( Abc_Ntk_t * pNtk, int fAllPrimes ); extern Vec_Int_t * Abc_NtkGetCiSatVarNums( Abc_Ntk_t * pNtk ); -static nMuxes; +static int nMuxes; //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// @@ -151,7 +151,7 @@ Vec_Int_t * Abc_NtkGetCiSatVarNums( Abc_Ntk_t * pNtk ) int i; vCiIds = Vec_IntAlloc( Abc_NtkCiNum(pNtk) ); Abc_NtkForEachCi( pNtk, pObj, i ) - Vec_IntPush( vCiIds, (int)pObj->pCopy ); + Vec_IntPush( vCiIds, (int)(PORT_PTRINT_T)pObj->pCopy ); return vCiIds; } @@ -172,7 +172,7 @@ int Abc_NtkClauseTriv( sat_solver * pSat, Abc_Obj_t * pNode, Vec_Int_t * vVars ) { //printf( "Adding triv %d. %d\n", Abc_ObjRegular(pNode)->Id, (int)pSat->sat_solver_stats.clauses ); vVars->nSize = 0; - Vec_IntPush( vVars, toLitCond( (int)Abc_ObjRegular(pNode)->pCopy, Abc_ObjIsComplement(pNode) ) ); + Vec_IntPush( vVars, toLitCond( (int)(PORT_PTRINT_T)Abc_ObjRegular(pNode)->pCopy, Abc_ObjIsComplement(pNode) ) ); // Vec_IntPush( vVars, toLitCond( (int)Abc_ObjRegular(pNode)->Id, Abc_ObjIsComplement(pNode) ) ); return sat_solver_addclause( pSat, vVars->pArray, vVars->pArray + vVars->nSize ); } @@ -195,7 +195,7 @@ int Abc_NtkClauseTop( sat_solver * pSat, Vec_Ptr_t * vNodes, Vec_Int_t * vVars ) //printf( "Adding triv %d. %d\n", Abc_ObjRegular(pNode)->Id, (int)pSat->sat_solver_stats.clauses ); vVars->nSize = 0; Vec_PtrForEachEntry( vNodes, pNode, i ) - Vec_IntPush( vVars, toLitCond( (int)Abc_ObjRegular(pNode)->pCopy, Abc_ObjIsComplement(pNode) ) ); + Vec_IntPush( vVars, toLitCond( (int)(PORT_PTRINT_T)Abc_ObjRegular(pNode)->pCopy, Abc_ObjIsComplement(pNode) ) ); // Vec_IntPush( vVars, toLitCond( (int)Abc_ObjRegular(pNode)->Id, Abc_ObjIsComplement(pNode) ) ); return sat_solver_addclause( pSat, vVars->pArray, vVars->pArray + vVars->nSize ); } @@ -220,7 +220,7 @@ int Abc_NtkClauseAnd( sat_solver * pSat, Abc_Obj_t * pNode, Vec_Ptr_t * vSuper, assert( Abc_ObjIsNode( pNode ) ); // nVars = sat_solver_nvars(pSat); - Var = (int)pNode->pCopy; + Var = (int)(PORT_PTRINT_T)pNode->pCopy; // Var = pNode->Id; // assert( Var < nVars ); @@ -230,7 +230,7 @@ int Abc_NtkClauseAnd( sat_solver * pSat, Abc_Obj_t * pNode, Vec_Ptr_t * vSuper, // get the complemented attributes of the nodes fComp1 = Abc_ObjIsComplement(vSuper->pArray[i]); // determine the variable numbers - Var1 = (int)Abc_ObjRegular(vSuper->pArray[i])->pCopy; + Var1 = (int)(PORT_PTRINT_T)Abc_ObjRegular(vSuper->pArray[i])->pCopy; // Var1 = (int)Abc_ObjRegular(vSuper->pArray[i])->Id; // check that the variables are in the SAT manager @@ -255,7 +255,7 @@ int Abc_NtkClauseAnd( sat_solver * pSat, Abc_Obj_t * pNode, Vec_Ptr_t * vSuper, // get the complemented attributes of the nodes fComp1 = Abc_ObjIsComplement(vSuper->pArray[i]); // determine the variable numbers - Var1 = (int)Abc_ObjRegular(vSuper->pArray[i])->pCopy; + Var1 = (int)(PORT_PTRINT_T)Abc_ObjRegular(vSuper->pArray[i])->pCopy; // Var1 = (int)Abc_ObjRegular(vSuper->pArray[i])->Id; // add this variable to the array Vec_IntPush( vVars, toLitCond(Var1, !fComp1) ); @@ -283,10 +283,10 @@ int Abc_NtkClauseMux( sat_solver * pSat, Abc_Obj_t * pNode, Abc_Obj_t * pNodeC, assert( !Abc_ObjIsComplement( pNode ) ); assert( Abc_NodeIsMuxType( pNode ) ); // get the variable numbers - VarF = (int)pNode->pCopy; - VarI = (int)pNodeC->pCopy; - VarT = (int)Abc_ObjRegular(pNodeT)->pCopy; - VarE = (int)Abc_ObjRegular(pNodeE)->pCopy; + VarF = (int)(PORT_PTRINT_T)pNode->pCopy; + VarI = (int)(PORT_PTRINT_T)pNodeC->pCopy; + VarT = (int)(PORT_PTRINT_T)Abc_ObjRegular(pNodeT)->pCopy; + VarE = (int)(PORT_PTRINT_T)Abc_ObjRegular(pNodeE)->pCopy; // VarF = (int)pNode->Id; // VarI = (int)pNodeC->Id; // VarT = (int)Abc_ObjRegular(pNodeT)->Id; @@ -379,12 +379,12 @@ int Abc_NtkCollectSupergate_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vSuper, int fFir } // if the new node is complemented or a PI, another gate begins if ( !fFirst ) - if ( Abc_ObjIsComplement(pNode) || !Abc_ObjIsNode(pNode) || Abc_ObjFanoutNum(pNode) > 1 || fStopAtMux && Abc_NodeIsMuxType(pNode) ) - { - Vec_PtrPush( vSuper, pNode ); - Abc_ObjRegular(pNode)->fMarkB = 1; - return 0; - } + if ( Abc_ObjIsComplement(pNode) || !Abc_ObjIsNode(pNode) || Abc_ObjFanoutNum(pNode) > 1 || (fStopAtMux && Abc_NodeIsMuxType(pNode)) ) + { + Vec_PtrPush( vSuper, pNode ); + Abc_ObjRegular(pNode)->fMarkB = 1; + return 0; + } assert( !Abc_ObjIsComplement(pNode) ); assert( Abc_ObjIsNode(pNode) ); // go through the branches @@ -462,9 +462,7 @@ int Abc_NtkMiterSatCreateInt( sat_solver * pSat, Abc_Ntk_t * pNtk ) Vec_Ptr_t * vNodes, * vSuper; Vec_Int_t * vVars; int i, k, fUseMuxes = 1; - int clk1 = clock(); // int fOrderCiVarsFirst = 0; - int nLevelsMax = Abc_AigLevel(pNtk); int RetValue = 0; assert( Abc_NtkIsStrash(pNtk) ); @@ -481,7 +479,7 @@ int Abc_NtkMiterSatCreateInt( sat_solver * pSat, Abc_Ntk_t * pNtk ) // add the clause for the constant node pNode = Abc_AigConst1(pNtk); pNode->fMarkA = 1; - pNode->pCopy = (Abc_Obj_t *)vNodes->nSize; + pNode->pCopy = (Abc_Obj_t *)(PORT_PTRINT_T)vNodes->nSize; Vec_PtrPush( vNodes, pNode ); Abc_NtkClauseTriv( pSat, pNode, vVars ); /* @@ -503,7 +501,7 @@ int Abc_NtkMiterSatCreateInt( sat_solver * pSat, Abc_Ntk_t * pNtk ) if ( pFanin->fMarkA == 0 ) { pFanin->fMarkA = 1; - pFanin->pCopy = (Abc_Obj_t *)vNodes->nSize; + pFanin->pCopy = (Abc_Obj_t *)(PORT_PTRINT_T)vNodes->nSize; Vec_PtrPush( vNodes, pFanin ); } // add the trivial clause @@ -538,7 +536,7 @@ int Abc_NtkMiterSatCreateInt( sat_solver * pSat, Abc_Ntk_t * pNtk ) if ( pFanin->fMarkA == 0 ) { pFanin->fMarkA = 1; - pFanin->pCopy = (Abc_Obj_t *)vNodes->nSize; + pFanin->pCopy = (Abc_Obj_t *)(PORT_PTRINT_T)vNodes->nSize; Vec_PtrPush( vNodes, pFanin ); } } @@ -557,7 +555,7 @@ int Abc_NtkMiterSatCreateInt( sat_solver * pSat, Abc_Ntk_t * pNtk ) if ( pFanin->fMarkA == 0 ) { pFanin->fMarkA = 1; - pFanin->pCopy = (Abc_Obj_t *)vNodes->nSize; + pFanin->pCopy = (Abc_Obj_t *)(PORT_PTRINT_T)vNodes->nSize; Vec_PtrPush( vNodes, pFanin ); } } @@ -625,7 +623,7 @@ void * Abc_NtkMiterSatCreate( Abc_Ntk_t * pNtk, int fAllPrimes ) { sat_solver * pSat; Abc_Obj_t * pNode; - int RetValue, i, clk = clock(); + int RetValue, i; //, clk = clock(); assert( Abc_NtkIsStrash(pNtk) || Abc_NtkIsBddLogic(pNtk) ); if ( Abc_NtkIsBddLogic(pNtk) ) @@ -842,7 +840,7 @@ sat_solver * Abc_NtkMiterSatCreateLogic( Abc_Ntk_t * pNtk, int fAllPrimes ) // transfer the IDs to the copy field Abc_NtkForEachPi( pNtk, pNode, i ) - pNode->pCopy = (void *)pNode->Id; + pNode->pCopy = (void *)(PORT_PTRINT_T)pNode->Id; // start the data structures pSat = sat_solver_new(); @@ -913,7 +911,7 @@ void Abc_NtkWriteSorterCnf( char * pFileName, int nVars, int nQueens ) if ( nQueens <= 0 && nQueens >= nVars ) { - printf( "The number of queens (Q = %d) should belong to the interval: 0 < Q < %d.\n", nQueens, nQueens, nVars ); + printf( "The number of queens (Q = %d) should belong to the interval: 0 < Q < %d.\n", nQueens, nQueens); return; } assert( nQueens > 0 && nQueens < nVars ); @@ -947,9 +945,9 @@ void Abc_NtkWriteSorterCnf( char * pFileName, int nVars, int nQueens ) Abc_NtkForEachObj( pNtk, pObj, i ) pObj->pCopy = (void *)~0; Abc_NtkForEachPi( pNtk, pObj, i ) - pObj->pCopy = (void *)Counter++; + pObj->pCopy = (void *)(PORT_PTRINT_T)Counter++; Vec_PtrForEachEntry( vNodes, pObj, i ) - pObj->pCopy = (void *)Counter++; + pObj->pCopy = (void *)(PORT_PTRINT_T)Counter++; /* OutVar = pCnf->pVarNums[ pObj->Id ]; @@ -977,14 +975,14 @@ void Abc_NtkWriteSorterCnf( char * pFileName, int nVars, int nQueens ) Vec_PtrForEachEntry( vNodes, pObj, i ) { // positive phase - fprintf( pFile, "%d %s%d %s%d 0\n", 1+(int)pObj->pCopy, - Abc_ObjFaninC0(pObj)? "" : "-", 1+(int)Abc_ObjFanin0(pObj)->pCopy, - Abc_ObjFaninC1(pObj)? "" : "-", 1+(int)Abc_ObjFanin1(pObj)->pCopy ); + fprintf( pFile, "%d %s%d %s%d 0\n", 1+(int)(PORT_PTRINT_T)pObj->pCopy, + Abc_ObjFaninC0(pObj)? "" : "-", 1+(int)(PORT_PTRINT_T)Abc_ObjFanin0(pObj)->pCopy, + Abc_ObjFaninC1(pObj)? "" : "-", 1+(int)(PORT_PTRINT_T)Abc_ObjFanin1(pObj)->pCopy ); // negative phase - fprintf( pFile, "-%d %s%d 0\n", 1+(int)pObj->pCopy, - Abc_ObjFaninC0(pObj)? "-" : "", 1+(int)Abc_ObjFanin0(pObj)->pCopy ); - fprintf( pFile, "-%d %s%d 0\n", 1+(int)pObj->pCopy, - Abc_ObjFaninC1(pObj)? "-" : "", 1+(int)Abc_ObjFanin1(pObj)->pCopy ); + fprintf( pFile, "-%d %s%d 0\n", 1+(int)(PORT_PTRINT_T)pObj->pCopy, + Abc_ObjFaninC0(pObj)? "-" : "", 1+(int)(PORT_PTRINT_T)Abc_ObjFanin0(pObj)->pCopy ); + fprintf( pFile, "-%d %s%d 0\n", 1+(int)(PORT_PTRINT_T)pObj->pCopy, + Abc_ObjFaninC1(pObj)? "-" : "", 1+(int)(PORT_PTRINT_T)Abc_ObjFanin1(pObj)->pCopy ); } Vec_PtrFree( vNodes ); @@ -994,10 +992,10 @@ void Abc_NtkWriteSorterCnf( char * pFileName, int nVars, int nQueens ) */ // assert the first literal to zero fprintf( pFile, "%s%d 0\n", - Abc_ObjFaninC0(ppNodes[0])? "" : "-", 1+(int)Abc_ObjFanin0(ppNodes[0])->pCopy ); + Abc_ObjFaninC0(ppNodes[0])? "" : "-", 1+(int)(PORT_PTRINT_T)Abc_ObjFanin0(ppNodes[0])->pCopy ); // assert the second literal to one fprintf( pFile, "%s%d 0\n", - Abc_ObjFaninC0(ppNodes[1])? "-" : "", 1+(int)Abc_ObjFanin0(ppNodes[1])->pCopy ); + Abc_ObjFaninC0(ppNodes[1])? "-" : "", 1+(int)(PORT_PTRINT_T)Abc_ObjFanin0(ppNodes[1])->pCopy ); fclose( pFile ); } diff --git a/src/base/abci/abcStrash.c b/src/base/abci/abcStrash.c index c1e0faf0..084f6a6c 100644 --- a/src/base/abci/abcStrash.c +++ b/src/base/abci/abcStrash.c @@ -46,7 +46,7 @@ static void Abc_NtkStrashPerform( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkNew, int fAl ***********************************************************************/ Abc_Ntk_t * Abc_NtkRestrash( Abc_Ntk_t * pNtk, bool fCleanup ) { - extern int timeRetime; +// extern int timeRetime; Abc_Ntk_t * pNtkAig; Abc_Obj_t * pObj; int i, nNodes;//, RetValue; @@ -99,7 +99,7 @@ Abc_Ntk_t * Abc_NtkRestrash( Abc_Ntk_t * pNtk, bool fCleanup ) ***********************************************************************/ Abc_Ntk_t * Abc_NtkRestrashZero( Abc_Ntk_t * pNtk, bool fCleanup ) { - extern int timeRetime; +// extern int timeRetime; Abc_Ntk_t * pNtkAig; Abc_Obj_t * pObj; int i, nNodes;//, RetValue; @@ -311,7 +311,7 @@ void Abc_NtkStrashPerform( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtkNew, int fAllNod ProgressBar * pProgress; Vec_Ptr_t * vNodes; Abc_Obj_t * pNodeOld; - int i, clk = clock(); + int i; //, clk = clock(); assert( Abc_NtkIsLogic(pNtkOld) ); assert( Abc_NtkIsStrash(pNtkNew) ); // vNodes = Abc_NtkDfs( pNtkOld, fAllNodes ); diff --git a/src/base/abci/abcSweep.c b/src/base/abci/abcSweep.c index 1ae8745b..c5f4bb1e 100644 --- a/src/base/abci/abcSweep.c +++ b/src/base/abci/abcSweep.c @@ -338,9 +338,9 @@ void Abc_NtkFraigMergeClassMapped( Abc_Ntk_t * pNtk, Abc_Obj_t * pChain, int fUs // assert( Abc_ObjIsCi(pNodeMin) || Arrival1 > 0 ); // assert( Abc_ObjIsCi(pNode) || Arrival2 > 0 ); if ( Arrival1 > Arrival2 || - Arrival1 == Arrival2 && pNodeMin->Level > pNode->Level || - Arrival1 == Arrival2 && pNodeMin->Level == pNode->Level && - Abc_NodeDroppingCost(pNodeMin) < Abc_NodeDroppingCost(pNode) ) + (Arrival1 == Arrival2 && pNodeMin->Level > pNode->Level) || + (Arrival1 == Arrival2 && pNodeMin->Level == pNode->Level && + Abc_NodeDroppingCost(pNodeMin) < Abc_NodeDroppingCost(pNode)) ) pNodeMin = pNode; } @@ -358,9 +358,9 @@ void Abc_NtkFraigMergeClassMapped( Abc_Ntk_t * pNtk, Abc_Obj_t * pChain, int fUs // assert( Abc_ObjIsCi(pNodeMin) || Arrival1 > 0 ); // assert( Abc_ObjIsCi(pNode) || Arrival2 > 0 ); if ( Arrival1 > Arrival2 || - Arrival1 == Arrival2 && pNodeMin->Level > pNode->Level || - Arrival1 == Arrival2 && pNodeMin->Level == pNode->Level && - Abc_NodeDroppingCost(pNodeMin) < Abc_NodeDroppingCost(pNode) ) + (Arrival1 == Arrival2 && pNodeMin->Level > pNode->Level) || + (Arrival1 == Arrival2 && pNodeMin->Level == pNode->Level && + Abc_NodeDroppingCost(pNodeMin) < Abc_NodeDroppingCost(pNode)) ) pNodeMin = pNode; } diff --git a/src/base/abci/abcVerify.c b/src/base/abci/abcVerify.c index 96a4566d..1131f119 100644 --- a/src/base/abci/abcVerify.c +++ b/src/base/abci/abcVerify.c @@ -669,18 +669,18 @@ int * Abc_NtkVerifySimulatePattern( Abc_Ntk_t * pNtk, int * pModel ) // set the CI values Abc_AigConst1(pNtk)->pCopy = (void *)1; Abc_NtkForEachCi( pNtk, pNode, i ) - pNode->pCopy = (void *)pModel[i]; + pNode->pCopy = (void *)(PORT_PTRINT_T)pModel[i]; // simulate in the topological order Abc_NtkForEachNode( pNtk, pNode, i ) { - Value0 = ((int)Abc_ObjFanin0(pNode)->pCopy) ^ Abc_ObjFaninC0(pNode); - Value1 = ((int)Abc_ObjFanin1(pNode)->pCopy) ^ Abc_ObjFaninC1(pNode); - pNode->pCopy = (void *)(Value0 & Value1); + Value0 = ((int)(PORT_PTRINT_T)Abc_ObjFanin0(pNode)->pCopy) ^ Abc_ObjFaninC0(pNode); + Value1 = ((int)(PORT_PTRINT_T)Abc_ObjFanin1(pNode)->pCopy) ^ Abc_ObjFaninC1(pNode); + pNode->pCopy = (void *)(PORT_PTRINT_T)(Value0 & Value1); } // fill the output values pValues = ALLOC( int, Abc_NtkCoNum(pNtk) ); Abc_NtkForEachCo( pNtk, pNode, i ) - pValues[i] = ((int)Abc_ObjFanin0(pNode)->pCopy) ^ Abc_ObjFaninC0(pNode); + pValues[i] = ((int)(PORT_PTRINT_T)Abc_ObjFanin0(pNode)->pCopy) ^ Abc_ObjFaninC0(pNode); if ( fStrashed ) Abc_NtkDelete( pNtk ); return pValues; @@ -740,7 +740,7 @@ void Abc_NtkVerifyReportError( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int * pMode vNodes = Abc_NtkNodeSupport( pNtk1, &pNode, 1 ); // set the PI numbers Abc_NtkForEachCi( pNtk1, pNode, i ) - pNode->pCopy = (void*)i; + pNode->pCopy = (void*)(PORT_PTRINT_T)i; // print the model pNode = Vec_PtrEntry( vNodes, 0 ); if ( Abc_ObjIsCi(pNode) ) @@ -748,7 +748,7 @@ void Abc_NtkVerifyReportError( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int * pMode Vec_PtrForEachEntry( vNodes, pNode, i ) { assert( Abc_ObjIsCi(pNode) ); - printf( " %s=%d", Abc_ObjName(pNode), pModel[(int)pNode->pCopy] ); + printf( " %s=%d", Abc_ObjName(pNode), pModel[(int)(PORT_PTRINT_T)pNode->pCopy] ); } } printf( "\n" ); @@ -819,9 +819,9 @@ void Abc_NtkVerifyReportErrorSeq( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int * pM { Vec_Ptr_t * vInfo1, * vInfo2; Abc_Obj_t * pObj, * pObjError, * pObj1, * pObj2; - int ValueError1, ValueError2; + int ValueError1 = -1, ValueError2 = -1; unsigned * pPats1, * pPats2; - int i, o, k, nErrors, iFrameError, iNodePo, nPrinted; + int i, o, k, nErrors, iFrameError = -1, iNodePo = -1, nPrinted; int fRemove1 = 0, fRemove2 = 0; if ( !Abc_NtkIsStrash(pNtk1) ) @@ -991,7 +991,7 @@ void Abc_NtkSimulteBuggyMiter( Abc_Ntk_t * pNtk ) Abc_NtkForEachPi( pNtk, pObj, i ) pModel1[i] = vPiValues1[i] - '0'; Abc_NtkForEachLatch( pNtk, pObj, i ) - pModel1[Abc_NtkPiNum(pNtk)+i] = ((int)pObj->pData) - 1; + pModel1[Abc_NtkPiNum(pNtk)+i] = ((int)(PORT_PTRINT_T)pObj->pData) - 1; pResult1 = Abc_NtkVerifySimulatePattern( pNtk, pModel1 ); printf( "Value = %d\n", pResult1[0] ); diff --git a/src/base/abci/abcXsim.c b/src/base/abci/abcXsim.c index e5656170..87739572 100644 --- a/src/base/abci/abcXsim.c +++ b/src/base/abci/abcXsim.c @@ -28,8 +28,8 @@ #define XVS1 ABC_INIT_ONE #define XVSX ABC_INIT_DC -static inline void Abc_ObjSetXsim( Abc_Obj_t * pObj, int Value ) { pObj->pCopy = (void *)Value; } -static inline int Abc_ObjGetXsim( Abc_Obj_t * pObj ) { return (int)pObj->pCopy; } +static inline void Abc_ObjSetXsim( Abc_Obj_t * pObj, int Value ) { pObj->pCopy = (void *)(PORT_PTRINT_T)Value; } +static inline int Abc_ObjGetXsim( Abc_Obj_t * pObj ) { return (int)(PORT_PTRINT_T)pObj->pCopy; } static inline int Abc_XsimInv( int Value ) { if ( Value == XVS0 ) @@ -214,7 +214,7 @@ void Abc_NtkCycleInitState( Abc_Ntk_t * pNtk, int nFrames, int fVerbose ) } // set the final values Abc_NtkForEachLatch( pNtk, pObj, i ) - pObj->pData = (void *)Abc_ObjGetXsim(Abc_ObjFanout0(pObj)); + pObj->pData = (void *)(PORT_PTRINT_T)Abc_ObjGetXsim(Abc_ObjFanout0(pObj)); } /////////////////////////////////////////////////////////////////////// |