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-rw-r--r--abc.dsp10
1 files changed, 5 insertions, 5 deletions
diff --git a/abc.dsp b/abc.dsp
index 8e57a53a..7a4c2d42 100644
--- a/abc.dsp
+++ b/abc.dsp
@@ -454,6 +454,10 @@ SOURCE=.\src\base\io\ioReadPla.c
# End Source File
# Begin Source File
+SOURCE=.\src\base\io\ioReadVerilog.c
+# End Source File
+# Begin Source File
+
SOURCE=.\src\base\io\ioUtil.c
# End Source File
# Begin Source File
@@ -502,11 +506,7 @@ SOURCE=.\src\base\io\ioWritePla.c
# End Source File
# Begin Source File
-SOURCE=.\src\base\io\ioWriteVer.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\base\io\ioWriteVerAux.c
+SOURCE=.\src\base\io\ioWriteVerilog.c
# End Source File
# End Group
# Begin Group "main"