Enabling AIGs without structural hashing (&get -c to import logic network).

5 files changed, 36 insertions, 26 deletions

diff --git a/src/aig/gia/gia.h b/src/aig/gia/gia.h
index 58b00db2..f2baf7e0 100644
--- a/src/aig/gia/gia.h
+++ b/src/aig/gia/gia.h
@@ -538,7 +538,7 @@ static inline void         Gia_ObjSetBufLevel( Gia_Man_t * p, Gia_Obj_t * pObj )
 static inline void         Gia_ObjSetAndLevel( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert( Gia_ObjIsAnd(pObj) ); Gia_ObjSetLevel( p, pObj, 1+Abc_MaxInt(Gia_ObjLevel(p,Gia_ObjFanin0(pObj)),Gia_ObjLevel(p,Gia_ObjFanin1(pObj))) ); }
 static inline void         Gia_ObjSetXorLevel( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert( Gia_ObjIsXor(pObj) ); Gia_ObjSetLevel( p, pObj, 2+Abc_MaxInt(Gia_ObjLevel(p,Gia_ObjFanin0(pObj)),Gia_ObjLevel(p,Gia_ObjFanin1(pObj))) ); }
 static inline void         Gia_ObjSetMuxLevel( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert( Gia_ObjIsMux(p,pObj) ); Gia_ObjSetLevel( p, pObj, 2+Abc_MaxInt( Abc_MaxInt(Gia_ObjLevel(p,Gia_ObjFanin0(pObj)),Gia_ObjLevel(p,Gia_ObjFanin1(pObj))), Gia_ObjLevel(p,Gia_ObjFanin2(p,pObj))) ); }
-static inline void         Gia_ObjSetGateLevel( Gia_Man_t * p, Gia_Obj_t * pObj ){ if ( Gia_ObjIsBuf(pObj) ) Gia_ObjSetBufLevel(p, pObj); else if ( Gia_ObjIsMux(p,pObj) ) Gia_ObjSetMuxLevel(p, pObj); else if ( Gia_ObjIsXor(pObj) ) Gia_ObjSetXorLevel(p, pObj); else if ( Gia_ObjIsAnd(pObj) ) Gia_ObjSetAndLevel(p, pObj); }
+static inline void         Gia_ObjSetGateLevel( Gia_Man_t * p, Gia_Obj_t * pObj ){ if ( !p->fGiaSimple && Gia_ObjIsBuf(pObj) ) Gia_ObjSetBufLevel(p, pObj); else if ( Gia_ObjIsMux(p,pObj) ) Gia_ObjSetMuxLevel(p, pObj); else if ( Gia_ObjIsXor(pObj) ) Gia_ObjSetXorLevel(p, pObj); else if ( Gia_ObjIsAnd(pObj) ) Gia_ObjSetAndLevel(p, pObj); }
 
 static inline int          Gia_ObjHasNumId( Gia_Man_t * p, int Id )                { return Vec_IntEntry(p->vTtNums, Id) > -ABC_INFINITY;     }
 static inline int          Gia_ObjNumId( Gia_Man_t * p, int Id )                   { return Vec_IntEntry(p->vTtNums, Id);                     }
@@ -665,14 +665,17 @@ static inline int Gia_ManAppendAnd( Gia_Man_t * p, int iLit0, int iLit1 )
 }
 static inline int Gia_ManAppendAnd2( Gia_Man_t * p, int iLit0, int iLit1 )  
 { 
-    if ( iLit0 < 2 )
-        return iLit0 ? iLit1 : 0;
-    if ( iLit1 < 2 )
-        return iLit1 ? iLit0 : 0;
-    if ( iLit0 == iLit1 )
-        return iLit1;
-    if ( iLit0 == Abc_LitNot(iLit1) )
-        return 0;
+    if ( !p->fGiaSimple )
+    {
+        if ( iLit0 < 2 )
+            return iLit0 ? iLit1 : 0;
+        if ( iLit1 < 2 )
+            return iLit1 ? iLit0 : 0;
+        if ( iLit0 == iLit1 )
+            return iLit1;
+        if ( iLit0 == Abc_LitNot(iLit1) )
+            return 0;
+    }
     return Gia_ManAppendAnd( p, iLit0, iLit1 );
 }
 static inline int Gia_ManAppendXorReal( Gia_Man_t * p, int iLit0, int iLit1 )  
diff --git a/src/aig/gia/giaUtil.c b/src/aig/gia/giaUtil.c
index 11a8b5b0..eccdbc73 100644
--- a/src/aig/gia/giaUtil.c
+++ b/src/aig/gia/giaUtil.c
@@ -510,7 +510,7 @@ int Gia_ManLevelNum( Gia_Man_t * p )
     p->nLevels = 0;
     Gia_ManForEachObj( p, pObj, i )
     {
-        if ( Gia_ObjIsBuf(pObj) )
+        if ( !p->fGiaSimple && Gia_ObjIsBuf(pObj) )
             Gia_ObjSetBufLevel( p, pObj );
         else if ( Gia_ObjIsAnd(pObj) )
             Gia_ObjSetGateLevel( p, pObj );
diff --git a/src/base/abc/abc.h b/src/base/abc/abc.h
index 3098f1d1..79eaf3e0 100644
--- a/src/base/abc/abc.h
+++ b/src/base/abc/abc.h
@@ -668,7 +668,7 @@ extern ABC_DLL void               Abc_NodeBddToCnf( Abc_Obj_t * pNode, Mem_Flex_
 extern ABC_DLL void               Abc_NtkLogicMakeDirectSops( Abc_Ntk_t * pNtk );
 extern ABC_DLL int                Abc_NtkSopToAig( Abc_Ntk_t * pNtk );
 extern ABC_DLL int                Abc_NtkAigToBdd( Abc_Ntk_t * pNtk );
-extern ABC_DLL Gia_Man_t *        Abc_NtkAigToGia( Abc_Ntk_t * p );
+extern ABC_DLL Gia_Man_t *        Abc_NtkAigToGia( Abc_Ntk_t * p, int fGiaSimple );
 extern ABC_DLL int                Abc_NtkMapToSop( Abc_Ntk_t * pNtk );
 extern ABC_DLL int                Abc_NtkToSop( Abc_Ntk_t * pNtk, int fMode, int nCubeLimit );
 extern ABC_DLL int                Abc_NtkToBdd( Abc_Ntk_t * pNtk );
diff --git a/src/base/abc/abcFunc.c b/src/base/abc/abcFunc.c
index c1fcfce2..94706504 100644
--- a/src/base/abc/abcFunc.c
+++ b/src/base/abc/abcFunc.c
@@ -971,12 +971,12 @@ int Abc_ConvertAigToGia( Gia_Man_t * p, Hop_Obj_t * pRoot )
   SeeAlso     []
 
 ***********************************************************************/
-Gia_Man_t * Abc_NtkAigToGia( Abc_Ntk_t * p )
+Gia_Man_t * Abc_NtkAigToGia( Abc_Ntk_t * p, int fGiaSimple )
 {
     Gia_Man_t * pNew;
     Hop_Man_t * pHopMan;
     Hop_Obj_t * pHopObj;
-    Vec_Int_t * vMapping;
+    Vec_Int_t * vMapping = NULL;
     Vec_Ptr_t * vNodes;
     Abc_Obj_t * pNode, * pFanin;
     int i, k, nObjs;
@@ -986,6 +986,7 @@ Gia_Man_t * Abc_NtkAigToGia( Abc_Ntk_t * p )
     pNew = Gia_ManStart( 10000 );
     pNew->pName = Abc_UtilStrsav( Abc_NtkName(p) );
     pNew->pSpec = Abc_UtilStrsav( Abc_NtkSpec(p) );
+    pNew->fGiaSimple = fGiaSimple;
     Abc_NtkCleanCopy( p );
     Hop_ManConst1(pHopMan)->iData = 1;
     // create primary inputs
@@ -995,7 +996,8 @@ Gia_Man_t * Abc_NtkAigToGia( Abc_Ntk_t * p )
     nObjs = 1 + Abc_NtkCiNum(p) + Abc_NtkCoNum(p);
     Abc_NtkForEachNode( p, pNode, i )
         nObjs += Abc_ObjIsBarBuf(pNode) ? 1 : Hop_DagSize( (Hop_Obj_t *)pNode->pData );
-    vMapping = Vec_IntStart( nObjs );
+    if ( !fGiaSimple )
+        vMapping = Vec_IntStart( nObjs );
     // iterate through nodes used in the mapping
     vNodes = Abc_NtkDfs( p, 0 );
     Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pNode, i )
@@ -1015,13 +1017,14 @@ Gia_Man_t * Abc_NtkAigToGia( Abc_Ntk_t * p )
             Abc_ConvertAigToGia( pNew, pHopObj );
             if ( !Gia_ObjIsAnd(Gia_ManObj(pNew, Abc_Lit2Var(pHopObj->iData))) )
                 continue;
-            if ( Vec_IntEntry(vMapping, Abc_Lit2Var(pHopObj->iData)) )
-                continue;
-            Vec_IntWriteEntry( vMapping, Abc_Lit2Var(pHopObj->iData), Vec_IntSize(vMapping) );
-            Vec_IntPush( vMapping, Abc_ObjFaninNum(pNode) );
-            Abc_ObjForEachFanin( pNode, pFanin, k )
-                Vec_IntPush( vMapping, Abc_Lit2Var(pFanin->iTemp)  );
-            Vec_IntPush( vMapping, Abc_Lit2Var(pHopObj->iData) );
+            if ( vMapping && !Vec_IntEntry(vMapping, Abc_Lit2Var(pHopObj->iData)) )
+            {
+                Vec_IntWriteEntry( vMapping, Abc_Lit2Var(pHopObj->iData), Vec_IntSize(vMapping) );
+                Vec_IntPush( vMapping, Abc_ObjFaninNum(pNode) );
+                Abc_ObjForEachFanin( pNode, pFanin, k )
+                    Vec_IntPush( vMapping, Abc_Lit2Var(pFanin->iTemp)  );
+                Vec_IntPush( vMapping, Abc_Lit2Var(pHopObj->iData) );
+            }
         }
         pNode->iTemp = Abc_LitNotCond( pHopObj->iData, Hop_IsComplement( (Hop_Obj_t *)pNode->pData ) );
     }
diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c
index e1d69bf1..c17f5599 100644
--- a/src/base/abci/abc.c
+++ b/src/base/abci/abc.c
@@ -26719,12 +26719,15 @@ int Abc_CommandAbc9Get( Abc_Frame_t * pAbc, int argc, char ** argv )
     Aig_Man_t * pAig;
     Gia_Man_t * pGia, * pTemp;
     char * pInits;
-    int c, fMapped = 0, fNames = 0, fVerbose = 0;
+    int c, fGiaSimple = 0, fMapped = 0, fNames = 0, fVerbose = 0;
     Extra_UtilGetoptReset();
-    while ( ( c = Extra_UtilGetopt( argc, argv, "mnvh" ) ) != EOF )
+    while ( ( c = Extra_UtilGetopt( argc, argv, "cmnvh" ) ) != EOF )
     {
         switch ( c )
         {
+        case 'c':
+            fGiaSimple ^= 1;
+            break;
         case 'm':
             fMapped ^= 1;
             break;
@@ -26745,11 +26748,11 @@ int Abc_CommandAbc9Get( Abc_Frame_t * pAbc, int argc, char ** argv )
     }
     if ( !Abc_NtkIsStrash( pAbc->pNtkCur ) )
     {
-        if ( fMapped )
+        if ( fGiaSimple || fMapped )
         {
             assert( Abc_NtkIsLogic(pAbc->pNtkCur) );
             Abc_NtkToAig( pAbc->pNtkCur );
-            pGia = Abc_NtkAigToGia( pAbc->pNtkCur );
+            pGia = Abc_NtkAigToGia( pAbc->pNtkCur, fGiaSimple );
         }
         else
         {
@@ -26796,10 +26799,11 @@ int Abc_CommandAbc9Get( Abc_Frame_t * pAbc, int argc, char ** argv )
     return 0;
 
 usage:
-    Abc_Print( -2, "usage: &get [-mnvh] <file>\n" );
+    Abc_Print( -2, "usage: &get [-cmnvh] <file>\n" );
     Abc_Print( -2, "\t         converts the current network into GIA and moves it to the &-space\n" );
     Abc_Print( -2, "\t         (if the network is a sequential logic network, normalizes the flops\n" );
     Abc_Print( -2, "\t         to have const-0 initial values, equivalent to \"undc; st; zero\")\n" );
+    Abc_Print( -2, "\t-c     : toggles allowing simple GIA to be improved [default = %s]\n", fGiaSimple? "yes": "no" );
     Abc_Print( -2, "\t-m     : toggles preserving the current mapping [default = %s]\n", fMapped? "yes": "no" );
     Abc_Print( -2, "\t-n     : toggles saving CI/CO names of the AIG [default = %s]\n", fNames? "yes": "no" );
     Abc_Print( -2, "\t-v     : toggles additional verbose output [default = %s]\n", fVerbose? "yes": "no" );