Adding a wrapper around clock() for more accurate time counting in ABC.

8 files changed, 83 insertions, 83 deletions

diff --git a/src/proof/fraig/fraigChoice.c b/src/proof/fraig/fraigChoice.c
index e1d6e8a7..4e6a225b 100644
--- a/src/proof/fraig/fraigChoice.c
+++ b/src/proof/fraig/fraigChoice.c
@@ -45,7 +45,7 @@ void Fraig_ManAddChoices( Fraig_Man_t * pMan, int fVerbose, int nLimit )
 {
 //    ProgressBar * pProgress;
     char Buffer[100];
-    clock_t clkTotal = clock();
+    abctime clkTotal = Abc_Clock();
     int i, nNodesBefore, nNodesAfter, nInputs, nMaxNodes;
     int /*nMaxLevel,*/ nDistributive;
     Fraig_Node_t *pNode, *pRepr;
diff --git a/src/proof/fraig/fraigFeed.c b/src/proof/fraig/fraigFeed.c
index 4cb1276b..020caefa 100644
--- a/src/proof/fraig/fraigFeed.c
+++ b/src/proof/fraig/fraigFeed.c
@@ -81,7 +81,7 @@ void Fraig_FeedBack( Fraig_Man_t * p, int * pModel, Msat_IntVec_t * vVars, Fraig
 {
     int nVarsPi, nWords;
     int i;
-    clock_t clk = clock();
+    abctime clk = Abc_Clock();
 
     // get the number of PI vars in the feedback (also sets the PI values)
     nVarsPi = Fraig_FeedBackPrepare( p, pModel, vVars );
@@ -107,7 +107,7 @@ void Fraig_FeedBack( Fraig_Man_t * p, int * pModel, Msat_IntVec_t * vVars, Fraig
     else  // otherwise, update the starting word
         p->iWordStart += nWords;
 
-p->timeFeed += clock() - clk;
+p->timeFeed += Abc_Clock() - clk;
 }
 
 /**Function*************************************************************
diff --git a/src/proof/fraig/fraigInt.h b/src/proof/fraig/fraigInt.h
index 0decf6ff..37f00720 100644
--- a/src/proof/fraig/fraigInt.h
+++ b/src/proof/fraig/fraigInt.h
@@ -189,18 +189,18 @@ struct Fraig_ManStruct_t_
     int                   nImplies1;
 
     // runtime statistics
-    clock_t               timeToAig;     // time to transfer to the mapping structure
-    clock_t               timeSims;      // time to compute k-feasible cuts
-    clock_t               timeTrav;      // time to traverse the network
-    clock_t               timeFeed;      // time for solver feedback (recording and resimulating)
-    clock_t               timeImply;     // time to analyze implications
-    clock_t               timeSat;       // time to compute the truth table for each cut
-    clock_t               timeToNet;     // time to transfer back to the network
-    clock_t               timeTotal;     // the total mapping time
-    clock_t               time1;         // time to perform one task
-    clock_t               time2;         // time to perform another task
-    clock_t               time3;         // time to perform another task
-    clock_t               time4;         // time to perform another task
+    abctime               timeToAig;     // time to transfer to the mapping structure
+    abctime               timeSims;      // time to compute k-feasible cuts
+    abctime               timeTrav;      // time to traverse the network
+    abctime               timeFeed;      // time for solver feedback (recording and resimulating)
+    abctime               timeImply;     // time to analyze implications
+    abctime               timeSat;       // time to compute the truth table for each cut
+    abctime               timeToNet;     // time to transfer back to the network
+    abctime               timeTotal;     // the total mapping time
+    abctime               time1;         // time to perform one task
+    abctime               time2;         // time to perform another task
+    abctime               time3;         // time to perform another task
+    abctime               time4;         // time to perform another task
 };
 
 // the mapping node
diff --git a/src/proof/fraig/fraigMan.c b/src/proof/fraig/fraigMan.c
index dab3b08d..90c009ef 100644
--- a/src/proof/fraig/fraigMan.c
+++ b/src/proof/fraig/fraigMan.c
@@ -25,8 +25,8 @@ ABC_NAMESPACE_IMPL_START
 ///                        DECLARATIONS                              ///
 ////////////////////////////////////////////////////////////////////////
 
-clock_t timeSelect;
-clock_t timeAssign;
+abctime timeSelect;
+abctime timeAssign;
 
 ////////////////////////////////////////////////////////////////////////
 ///                     FUNCTION DEFINITIONS                         ///
@@ -324,8 +324,8 @@ void Fraig_ManFree( Fraig_Man_t * p )
 ***********************************************************************/
 void Fraig_ManCreateSolver( Fraig_Man_t * p )
 {
-    extern clock_t timeSelect;
-    extern clock_t timeAssign;
+    extern abctime timeSelect;
+    extern abctime timeAssign;
     assert( p->pSat == NULL );
     // allocate data for SAT solving
     p->pSat       = Msat_SolverAlloc( 500, 1, 1, 1, 1, 0 );
diff --git a/src/proof/fraig/fraigNode.c b/src/proof/fraig/fraigNode.c
index 5310534b..9bf64bd2 100644
--- a/src/proof/fraig/fraigNode.c
+++ b/src/proof/fraig/fraigNode.c
@@ -88,7 +88,7 @@ Fraig_Node_t * Fraig_NodeCreatePi( Fraig_Man_t * p )
 {
     Fraig_Node_t * pNode, * pNodeRes;
     int i;
-    clock_t clk;
+    abctime clk;
 
     // create the node
     pNode = (Fraig_Node_t *)Fraig_MemFixedEntryFetch( p->mmNodes );
@@ -110,7 +110,7 @@ Fraig_Node_t * Fraig_NodeCreatePi( Fraig_Man_t * p )
     pNode->fInv  =  0;  // the simulation info of the PI is not complemented
 
     // derive the simulation info for the new node
-clk = clock();
+clk = Abc_Clock();
     // set the random simulation info for the primary input
     pNode->uHashR = 0;
     for ( i = 0; i < p->nWordsRand; i++ )
@@ -136,7 +136,7 @@ clk = clock();
         // compute the hash key
         pNode->uHashD ^= pNode->puSimD[i] * s_FraigPrimes[i];
     }
-p->timeSims += clock() - clk;
+p->timeSims += Abc_Clock() - clk;
 
     // insert it into the hash table
     pNodeRes = Fraig_HashTableLookupF( p, pNode );
@@ -160,7 +160,7 @@ p->timeSims += clock() - clk;
 Fraig_Node_t * Fraig_NodeCreate( Fraig_Man_t * p, Fraig_Node_t * p1, Fraig_Node_t * p2 )
 {
     Fraig_Node_t * pNode;
-    clock_t clk;
+    abctime clk;
 
     // create the node
     pNode = (Fraig_Node_t *)Fraig_MemFixedEntryFetch( p->mmNodes );
@@ -183,7 +183,7 @@ Fraig_Node_t * Fraig_NodeCreate( Fraig_Man_t * p, Fraig_Node_t * p1, Fraig_Node_
     pNode->fFailTfo = Fraig_Regular(p1)->fFailTfo | Fraig_Regular(p2)->fFailTfo;
 
     // derive the simulation info 
-clk = clock();
+clk = Abc_Clock();
     // allocate memory for the simulation info
     pNode->puSimR = (unsigned *)Fraig_MemFixedEntryFetch( p->mmSims );
     pNode->puSimD = pNode->puSimR + p->nWordsRand;
@@ -198,7 +198,7 @@ clk = clock();
     if ( pNode->fInv )
         pNode->nOnes = p->nWordsRand * 32 - pNode->nOnes;
     // add to the runtime of simulation
-p->timeSims += clock() - clk;
+p->timeSims += Abc_Clock() - clk;
 
 #ifdef FRAIG_ENABLE_FANOUTS
     // create the fanout info
diff --git a/src/proof/fraig/fraigSat.c b/src/proof/fraig/fraigSat.c
index fb3f1fec..3c1b2a1b 100644
--- a/src/proof/fraig/fraigSat.c
+++ b/src/proof/fraig/fraigSat.c
@@ -86,12 +86,12 @@ void Fraig_ManProveMiter( Fraig_Man_t * p )
 {
     Fraig_Node_t * pNode;
     int i;
-    clock_t clk;
+    abctime clk;
 
     if ( !p->fTryProve )
         return;
  
-    clk = clock();
+    clk = Abc_Clock();
     // consider all outputs of the multi-output miter
     for ( i = 0; i < p->vOutputs->nSize; i++ )
     {
@@ -112,7 +112,7 @@ void Fraig_ManProveMiter( Fraig_Man_t * p )
     }
     if ( p->fVerboseP ) 
     {
-//        ABC_PRT( "Final miter proof time", clock() - clk );
+//        ABC_PRT( "Final miter proof time", Abc_Clock() - clk );
     }
 }
 
@@ -302,7 +302,7 @@ void Fraig_VarsStudy( Fraig_Man_t * p, Fraig_Node_t * pOld, Fraig_Node_t * pNew
 int Fraig_NodeIsEquivalent( Fraig_Man_t * p, Fraig_Node_t * pOld, Fraig_Node_t * pNew, int nBTLimit, int nTimeLimit )
 {
     int RetValue, RetValue1, i, fComp;
-    clock_t clk;
+    abctime clk;
     int fVerbose = 0;
     int fSwitch = 0;
 
@@ -349,14 +349,14 @@ int Fraig_NodeIsEquivalent( Fraig_Man_t * p, Fraig_Node_t * pOld, Fraig_Node_t *
 
 
     // get the logic cone
-clk = clock();
+clk = Abc_Clock();
 //    Fraig_VarsStudy( p, pOld, pNew );
     Fraig_OrderVariables( p, pOld, pNew );
 //    Fraig_PrepareCones( p, pOld, pNew );
-p->timeTrav += clock() - clk;
+p->timeTrav += Abc_Clock() - clk;
 
 //    printf( "The number of MUXes detected = %d (%5.2f %% of logic).  ", nMuxes, 300.0*nMuxes/(p->vNodes->nSize - p->vInputs->nSize) );
-//    ABC_PRT( "Time", clock() - clk );
+//    ABC_PRT( "Time", Abc_Clock() - clk );
 
 if ( fVerbose )
     printf( "%d(%d) - ", Fraig_CountPis(p,p->vVarsInt), Msat_IntVecReadSize(p->vVarsInt) );
@@ -371,9 +371,9 @@ if ( fVerbose )
 
     ////////////////////////////////////////////
     // prepare the solver to run incrementally on these variables
-//clk = clock();
+//clk = Abc_Clock();
     Msat_SolverPrepare( p->pSat, p->vVarsInt );
-//p->time3 += clock() - clk;
+//p->time3 += Abc_Clock() - clk;
 
 
     // solve under assumptions
@@ -385,18 +385,18 @@ if ( fVerbose )
 //Msat_SolverWriteDimacs( p->pSat, "temp_fraig.cnf" );
 
     // run the solver
-clk = clock();
+clk = Abc_Clock();
     RetValue1 = Msat_SolverSolve( p->pSat, p->vProj, nBTLimit, nTimeLimit );
-p->timeSat += clock() - clk;
+p->timeSat += Abc_Clock() - clk;
 
     if ( RetValue1 == MSAT_FALSE )
     {
-//p->time1 += clock() - clk;
+//p->time1 += Abc_Clock() - clk;
 
 if ( fVerbose )
 {
 //    printf( "unsat  %d  ", Msat_SolverReadBackTracks(p->pSat) );
-//ABC_PRT( "time", clock() - clk );
+//ABC_PRT( "time", Abc_Clock() - clk );
 }
 
         // add the clause
@@ -409,12 +409,12 @@ if ( fVerbose )
     }
     else if ( RetValue1 == MSAT_TRUE )
     {
-//p->time2 += clock() - clk;
+//p->time2 += Abc_Clock() - clk;
 
 if ( fVerbose )
 {
 //    printf( "sat  %d  ", Msat_SolverReadBackTracks(p->pSat) );
-//ABC_PRT( "time", clock() - clk );
+//ABC_PRT( "time", Abc_Clock() - clk );
 }
 
         // record the counter example
@@ -430,7 +430,7 @@ if ( fVerbose )
     }
     else // if ( RetValue1 == MSAT_UNKNOWN )
     {
-p->time3 += clock() - clk;
+p->time3 += Abc_Clock() - clk;
 
 //        if ( pOld->fFailTfo || pNew->fFailTfo )
 //            printf( "*" );
@@ -453,27 +453,27 @@ p->time3 += clock() - clk;
 
     ////////////////////////////////////////////
     // prepare the solver to run incrementally 
-//clk = clock();
+//clk = Abc_Clock();
     Msat_SolverPrepare( p->pSat, p->vVarsInt );
-//p->time3 += clock() - clk;
+//p->time3 += Abc_Clock() - clk;
     // solve under assumptions
     // A = 0; B = 1     OR     A = 0; B = 0 
     Msat_IntVecClear( p->vProj );
     Msat_IntVecPush( p->vProj, MSAT_VAR2LIT(pOld->Num, 1) );
     Msat_IntVecPush( p->vProj, MSAT_VAR2LIT(pNew->Num, fComp) );
     // run the solver
-clk = clock();
+clk = Abc_Clock();
     RetValue1 = Msat_SolverSolve( p->pSat, p->vProj, nBTLimit, nTimeLimit );
-p->timeSat += clock() - clk;
+p->timeSat += Abc_Clock() - clk;
 
     if ( RetValue1 == MSAT_FALSE )
     {
-//p->time1 += clock() - clk;
+//p->time1 += Abc_Clock() - clk;
 
 if ( fVerbose )
 {
 //    printf( "unsat  %d  ", Msat_SolverReadBackTracks(p->pSat) );
-//ABC_PRT( "time", clock() - clk );
+//ABC_PRT( "time", Abc_Clock() - clk );
 }
 
         // add the clause
@@ -486,12 +486,12 @@ if ( fVerbose )
     }
     else if ( RetValue1 == MSAT_TRUE )
     {
-//p->time2 += clock() - clk;
+//p->time2 += Abc_Clock() - clk;
 
 if ( fVerbose )
 {
 //    printf( "sat  %d  ", Msat_SolverReadBackTracks(p->pSat) );
-//ABC_PRT( "time", clock() - clk );
+//ABC_PRT( "time", Abc_Clock() - clk );
 }
 
         // record the counter example
@@ -507,7 +507,7 @@ if ( fVerbose )
     }
     else // if ( RetValue1 == MSAT_UNKNOWN )
     {
-p->time3 += clock() - clk;
+p->time3 += Abc_Clock() - clk;
 
 //        if ( pOld->fFailTfo || pNew->fFailTfo )
 //            printf( "*" );
@@ -551,7 +551,7 @@ p->time3 += clock() - clk;
 int Fraig_NodeIsImplication( Fraig_Man_t * p, Fraig_Node_t * pOld, Fraig_Node_t * pNew, int nBTLimit )
 {
     int RetValue, RetValue1, i, fComp;
-    clock_t clk;
+    abctime clk;
     int fVerbose = 0;
 
     // make sure the nodes are not complemented
@@ -569,10 +569,10 @@ int Fraig_NodeIsImplication( Fraig_Man_t * p, Fraig_Node_t * pOld, Fraig_Node_t
         Msat_SolverAddVar( p->pSat, p->vNodes->pArray[i]->Level );
 
    // get the logic cone
-clk = clock();
+clk = Abc_Clock();
     Fraig_OrderVariables( p, pOld, pNew );
 //    Fraig_PrepareCones( p, pOld, pNew );
-p->timeTrav += clock() - clk;
+p->timeTrav += Abc_Clock() - clk;
 
 if ( fVerbose )
     printf( "%d(%d) - ", Fraig_CountPis(p,p->vVarsInt), Msat_IntVecReadSize(p->vVarsInt) );
@@ -584,9 +584,9 @@ if ( fVerbose )
 
     ////////////////////////////////////////////
     // prepare the solver to run incrementally on these variables
-//clk = clock();
+//clk = Abc_Clock();
     Msat_SolverPrepare( p->pSat, p->vVarsInt );
-//p->time3 += clock() - clk;
+//p->time3 += Abc_Clock() - clk;
 
     // solve under assumptions
     // A = 1; B = 0     OR     A = 1; B = 1 
@@ -594,18 +594,18 @@ if ( fVerbose )
     Msat_IntVecPush( p->vProj, MSAT_VAR2LIT(pOld->Num, 0) );
     Msat_IntVecPush( p->vProj, MSAT_VAR2LIT(pNew->Num, !fComp) );
     // run the solver
-clk = clock();
+clk = Abc_Clock();
     RetValue1 = Msat_SolverSolve( p->pSat, p->vProj, nBTLimit, 1000000 );
-p->timeSat += clock() - clk;
+p->timeSat += Abc_Clock() - clk;
 
     if ( RetValue1 == MSAT_FALSE )
     {
-//p->time1 += clock() - clk;
+//p->time1 += Abc_Clock() - clk;
 
 if ( fVerbose )
 {
 //    printf( "unsat  %d  ", Msat_SolverReadBackTracks(p->pSat) );
-//ABC_PRT( "time", clock() - clk );
+//ABC_PRT( "time", Abc_Clock() - clk );
 }
 
         // add the clause
@@ -619,12 +619,12 @@ if ( fVerbose )
     }
     else if ( RetValue1 == MSAT_TRUE )
     {
-//p->time2 += clock() - clk;
+//p->time2 += Abc_Clock() - clk;
 
 if ( fVerbose )
 {
 //    printf( "sat  %d  ", Msat_SolverReadBackTracks(p->pSat) );
-//ABC_PRT( "time", clock() - clk );
+//ABC_PRT( "time", Abc_Clock() - clk );
 }
         // record the counter example
         Fraig_FeedBack( p, Msat_SolverReadModelArray(p->pSat), p->vVarsInt, pOld, pNew );
@@ -633,7 +633,7 @@ if ( fVerbose )
     }
     else // if ( RetValue1 == MSAT_UNKNOWN )
     {
-p->time3 += clock() - clk;
+p->time3 += Abc_Clock() - clk;
         p->nSatFailsImp++;
         return 0;
     }
@@ -654,7 +654,7 @@ int Fraig_ManCheckClauseUsingSat( Fraig_Man_t * p, Fraig_Node_t * pNode1, Fraig_
 {
     Fraig_Node_t * pNode1R, * pNode2R;
     int RetValue, RetValue1, i;
-    clock_t clk;
+    abctime clk;
     int fVerbose = 0;
 
     pNode1R = Fraig_Regular(pNode1);
@@ -669,16 +669,16 @@ int Fraig_ManCheckClauseUsingSat( Fraig_Man_t * p, Fraig_Node_t * pNode1, Fraig_
         Msat_SolverAddVar( p->pSat, p->vNodes->pArray[i]->Level );
 
    // get the logic cone
-clk = clock();
+clk = Abc_Clock();
     Fraig_OrderVariables( p, pNode1R, pNode2R );
 //    Fraig_PrepareCones( p, pNode1R, pNode2R );
-p->timeTrav += clock() - clk;
+p->timeTrav += Abc_Clock() - clk;
 
     ////////////////////////////////////////////
     // prepare the solver to run incrementally on these variables
-//clk = clock();
+//clk = Abc_Clock();
     Msat_SolverPrepare( p->pSat, p->vVarsInt );
-//p->time3 += clock() - clk;
+//p->time3 += Abc_Clock() - clk;
 
     // solve under assumptions
     // A = 1; B = 0     OR     A = 1; B = 1 
@@ -686,18 +686,18 @@ p->timeTrav += clock() - clk;
     Msat_IntVecPush( p->vProj, MSAT_VAR2LIT(pNode1R->Num, !Fraig_IsComplement(pNode1)) );
     Msat_IntVecPush( p->vProj, MSAT_VAR2LIT(pNode2R->Num, !Fraig_IsComplement(pNode2)) );
     // run the solver
-clk = clock();
+clk = Abc_Clock();
     RetValue1 = Msat_SolverSolve( p->pSat, p->vProj, nBTLimit, 1000000 );
-p->timeSat += clock() - clk;
+p->timeSat += Abc_Clock() - clk;
 
     if ( RetValue1 == MSAT_FALSE )
     {
-//p->time1 += clock() - clk;
+//p->time1 += Abc_Clock() - clk;
 
 if ( fVerbose )
 {
 //    printf( "unsat  %d  ", Msat_SolverReadBackTracks(p->pSat) );
-//ABC_PRT( "time", clock() - clk );
+//ABC_PRT( "time", Abc_Clock() - clk );
 }
 
         // add the clause
@@ -711,12 +711,12 @@ if ( fVerbose )
     }
     else if ( RetValue1 == MSAT_TRUE )
     {
-//p->time2 += clock() - clk;
+//p->time2 += Abc_Clock() - clk;
 
 if ( fVerbose )
 {
 //    printf( "sat  %d  ", Msat_SolverReadBackTracks(p->pSat) );
-//ABC_PRT( "time", clock() - clk );
+//ABC_PRT( "time", Abc_Clock() - clk );
 }
         // record the counter example
 //        Fraig_FeedBack( p, Msat_SolverReadModelArray(p->pSat), p->vVarsInt, pNode1R, pNode2R );
@@ -725,7 +725,7 @@ if ( fVerbose )
     }
     else // if ( RetValue1 == MSAT_UNKNOWN )
     {
-p->time3 += clock() - clk;
+p->time3 += Abc_Clock() - clk;
         p->nSatFailsImp++;
         return 0;
     }
diff --git a/src/proof/fraig/fraigTable.c b/src/proof/fraig/fraigTable.c
index d184ab7f..03a2ac10 100644
--- a/src/proof/fraig/fraigTable.c
+++ b/src/proof/fraig/fraigTable.c
@@ -261,10 +261,10 @@ void Fraig_TableResizeS( Fraig_HashTable_t * p )
     Fraig_Node_t ** pBinsNew;
     Fraig_Node_t * pEnt, * pEnt2;
     int nBinsNew, Counter, i;
-    clock_t clk;
+    abctime clk;
     unsigned Key;
 
-clk = clock();
+clk = Abc_Clock();
     // get the new table size
     nBinsNew = Abc_PrimeCudd(2 * p->nBins); 
     // allocate a new array
@@ -282,7 +282,7 @@ clk = clock();
         }
     assert( Counter == p->nEntries );
 //    printf( "Increasing the structural table size from %6d to %6d. ", p->nBins, nBinsNew );
-//    ABC_PRT( "Time", clock() - clk );
+//    ABC_PRT( "Time", Abc_Clock() - clk );
     // replace the table and the parameters
     ABC_FREE( p->pBins );
     p->pBins = pBinsNew;
@@ -305,10 +305,10 @@ void Fraig_TableResizeF( Fraig_HashTable_t * p, int fUseSimR )
     Fraig_Node_t ** pBinsNew;
     Fraig_Node_t * pEnt, * pEnt2;
     int nBinsNew, Counter, i;
-    clock_t clk;
+    abctime clk;
     unsigned Key;
 
-clk = clock();
+clk = Abc_Clock();
     // get the new table size
     nBinsNew = Abc_PrimeCudd(2 * p->nBins); 
     // allocate a new array
@@ -329,7 +329,7 @@ clk = clock();
         }
     assert( Counter == p->nEntries );
 //    printf( "Increasing the functional table size from %6d to %6d. ", p->nBins, nBinsNew );
-//    ABC_PRT( "Time", clock() - clk );
+//    ABC_PRT( "Time", Abc_Clock() - clk );
     // replace the table and the parameters
     ABC_FREE( p->pBins );
     p->pBins = pBinsNew;
diff --git a/src/proof/fraig/fraigUtil.c b/src/proof/fraig/fraigUtil.c
index 316b492e..7869c6d6 100644
--- a/src/proof/fraig/fraigUtil.c
+++ b/src/proof/fraig/fraigUtil.c
@@ -844,7 +844,7 @@ int Fraig_ManPrintRefs( Fraig_Man_t * pMan )
     Fraig_NodeVec_t * vPivots;
     Fraig_Node_t * pNode, * pNode2;
     int i, k, Counter, nProved;
-    clock_t clk;
+    abctime clk;
 
     vPivots = Fraig_NodeVecAlloc( 1000 );
     for ( i = 0; i < pMan->vNodes->nSize; i++ )
@@ -862,7 +862,7 @@ int Fraig_ManPrintRefs( Fraig_Man_t * pMan )
     }
     printf( "Total nodes = %d. Referenced nodes = %d.\n", pMan->vNodes->nSize, vPivots->nSize );
 
-clk = clock();
+clk = Abc_Clock();
     // count implications
     Counter = nProved = 0;
     for ( i = 0; i < vPivots->nSize; i++ )
@@ -884,7 +884,7 @@ clk = clock();
             }
         }
     printf( "Number of candidate pairs = %d.  Proved = %d.\n", Counter, nProved );
-//ABC_PRT( "Time", clock() - clk );
+//ABC_PRT( "Time", Abc_Clock() - clk );
     return 0;
 }