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author | Alan Mishchenko <alanmi@berkeley.edu> | 2009-02-15 08:01:00 -0800 |
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committer | Alan Mishchenko <alanmi@berkeley.edu> | 2009-02-15 08:01:00 -0800 |
commit | 0871bffae307e0553e0c5186336189e8b55cf6a6 (patch) | |
tree | 4571d1563fe33a53a57fea1c35fb668b9d33265f /src/map/fpga/fpgaInt.h | |
parent | f936cc0680c98ffe51b3a1716c996072d5dbf76c (diff) | |
download | abc-0871bffae307e0553e0c5186336189e8b55cf6a6.tar.gz abc-0871bffae307e0553e0c5186336189e8b55cf6a6.tar.bz2 abc-0871bffae307e0553e0c5186336189e8b55cf6a6.zip |
Version abc90215
Diffstat (limited to 'src/map/fpga/fpgaInt.h')
-rw-r--r-- | src/map/fpga/fpgaInt.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/map/fpga/fpgaInt.h b/src/map/fpga/fpgaInt.h index f4145e7f..ba9538c2 100644 --- a/src/map/fpga/fpgaInt.h +++ b/src/map/fpga/fpgaInt.h @@ -63,19 +63,19 @@ #define FPGA_INT_LARGE (10000000) // the macro to compute the signature -#define FPGA_SEQ_SIGN(p) (1 << (((PORT_PTRUINT_T)p)%31)); +#define FPGA_SEQ_SIGN(p) (1 << (((ABC_PTRUINT_T)p)%31)); // internal macros to work with cuts -#define Fpga_CutIsComplement(p) (((int)((PORT_PTRUINT_T)(p) & 01))) -#define Fpga_CutRegular(p) ((Fpga_Cut_t *)((PORT_PTRUINT_T)(p) & ~01)) -#define Fpga_CutNot(p) ((Fpga_Cut_t *)((PORT_PTRUINT_T)(p) ^ 01)) -#define Fpga_CutNotCond(p,c) ((Fpga_Cut_t *)((PORT_PTRUINT_T)(p) ^ (c))) +#define Fpga_CutIsComplement(p) (((int)((ABC_PTRUINT_T)(p) & 01))) +#define Fpga_CutRegular(p) ((Fpga_Cut_t *)((ABC_PTRUINT_T)(p) & ~01)) +#define Fpga_CutNot(p) ((Fpga_Cut_t *)((ABC_PTRUINT_T)(p) ^ 01)) +#define Fpga_CutNotCond(p,c) ((Fpga_Cut_t *)((ABC_PTRUINT_T)(p) ^ (c))) // the cut nodes -#define Fpga_SeqIsComplement( p ) (((int)((PORT_PTRUINT_T) (p) & 01))) -#define Fpga_SeqRegular( p ) ((Fpga_Node_t *)((PORT_PTRUINT_T)(p) & ~015)) -#define Fpga_SeqIndex( p ) ((((PORT_PTRUINT_T)(p)) >> 1) & 07) -#define Fpga_SeqIndexCreate( p, Ind ) (((PORT_PTRUINT_T)(p)) | (1 << (((PORT_PTRUINT_T)(Ind)) & 07))) +#define Fpga_SeqIsComplement( p ) (((int)((ABC_PTRUINT_T) (p) & 01))) +#define Fpga_SeqRegular( p ) ((Fpga_Node_t *)((ABC_PTRUINT_T)(p) & ~015)) +#define Fpga_SeqIndex( p ) ((((ABC_PTRUINT_T)(p)) >> 1) & 07) +#define Fpga_SeqIndexCreate( p, Ind ) (((ABC_PTRUINT_T)(p)) | (1 << (((ABC_PTRUINT_T)(Ind)) & 07))) // internal macros for referencing of nodes #define Fpga_NodeReadRef(p) ((Fpga_Regular(p))->nRefs) |