Enable command 'pipe' for pipelining.

3 files changed, 15 insertions, 15 deletions

diff --git a/src/base/abc/abcLatch.c b/src/base/abc/abcLatch.c
index fcace105..d8432382 100644
--- a/src/base/abc/abcLatch.c
+++ b/src/base/abc/abcLatch.c
@@ -148,7 +148,7 @@ int Abc_NtkRemoveSelfFeedLatches( Abc_Ntk_t * pNtk )
 void Abc_NtkLatchPipe( Abc_Ntk_t * pNtk, int nLatches )
 {
     Vec_Ptr_t * vNodes;
-    Abc_Obj_t * pObj, * pLatch, * pFanin, * pFanout;
+    Abc_Obj_t * pObj, * pFanin, * pFanout;
     int i, k, nTotal, nDigits;
     if ( nLatches < 1 )
         return;
@@ -157,18 +157,9 @@ void Abc_NtkLatchPipe( Abc_Ntk_t * pNtk, int nLatches )
     vNodes = Vec_PtrAlloc( 100 );
     Abc_NtkForEachPi( pNtk, pObj, i )
     {
-        // remember current fanins of the PI
         Abc_NodeCollectFanouts( pObj, vNodes );
-        // create the latches
-        for ( pFanin = pObj, k = 0; k < nLatches; k++, pFanin = pLatch )
-        {
-            pLatch = Abc_NtkCreateLatch( pNtk );
-            Abc_ObjAddFanin( pLatch, pFanin );
-            Abc_LatchSetInitDc( pLatch );
-            // create the name of the new latch
-            Abc_ObjAssignName( pLatch, Abc_ObjNameDummy("LL", i*nLatches + k, nDigits), NULL );
-        }
-        // patch the PI fanouts
+        for ( pFanin = pObj, k = 0; k < nLatches; k++ )
+            pFanin = Abc_NtkAddLatch( pNtk, pFanin, ABC_INIT_ZERO );
         Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pFanout, k )
             Abc_ObjPatchFanin( pFanout, pObj, pFanin );
     }
diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c
index 0fb6fc65..9853dced 100644
--- a/src/base/abci/abc.c
+++ b/src/base/abci/abc.c
@@ -1039,7 +1039,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
     Cmd_CommandAdd( pAbc, "Sequential",   "zero",          Abc_CommandZero,             1 );
     Cmd_CommandAdd( pAbc, "Sequential",   "undc",          Abc_CommandUndc,             1 );
     Cmd_CommandAdd( pAbc, "Sequential",   "onehot",        Abc_CommandOneHot,           1 );
-//    Cmd_CommandAdd( pAbc, "Sequential",   "pipe",          Abc_CommandPipe,             1 );
+    Cmd_CommandAdd( pAbc, "Sequential",   "pipe",          Abc_CommandPipe,             1 );
     Cmd_CommandAdd( pAbc, "Sequential",   "retime",        Abc_CommandRetime,           1 );
     Cmd_CommandAdd( pAbc, "Sequential",   "dretime",       Abc_CommandDRetime,          1 );
     Cmd_CommandAdd( pAbc, "Sequential",   "fretime",       Abc_CommandFlowRetime,       1 );
@@ -20530,9 +20530,15 @@ int Abc_CommandPipe( Abc_Frame_t * pAbc, int argc, char ** argv )
         return 1;
     }
 
-    if ( Abc_NtkIsComb(pNtk) )
+    if ( !Abc_NtkIsLogic(pNtk) )
     {
-        Abc_Print( 0, "The current network is combinational.\n" );
+        Abc_Print( 0, "Abc_CommandPipe(): Expecting a logic network (run command \"logic\").\n" );
+        return 0;
+    }
+
+    if ( !Abc_NtkIsComb(pNtk) )
+    {
+        Abc_Print( 0, "Abc_CommandPipe(): Expecting a combinational network.\n" );
         return 0;
     }
 
diff --git a/src/base/abci/abcVerify.c b/src/base/abci/abcVerify.c
index 7199c529..f3e86746 100644
--- a/src/base/abci/abcVerify.c
+++ b/src/base/abci/abcVerify.c
@@ -781,6 +781,8 @@ void Abc_NtkVerifyReportError( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int * pMode
         Abc_NtkForEachCi( pNtk1, pNode, i )
             pNode->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)i;
         // print the model
+        if ( Vec_PtrSize(vNodes) )
+        {
         pNode = (Abc_Obj_t *)Vec_PtrEntry( vNodes, 0 );
         if ( Abc_ObjIsCi(pNode) )
         {
@@ -790,6 +792,7 @@ void Abc_NtkVerifyReportError( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int * pMode
                 printf( " %s=%d", Abc_ObjName(pNode), pModel[(int)(ABC_PTRINT_T)pNode->pCopy] );
             }
         }
+        }
         printf( "\n" );
         Vec_PtrFree( vNodes );
     }