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authorAlan Mishchenko <alanmi@berkeley.edu>2021-08-05 15:05:59 -0700
committerAlan Mishchenko <alanmi@berkeley.edu>2021-08-05 15:05:59 -0700
commit99ab99bfa6d1c2cc11d59af16aa26b273f611674 (patch)
treea96ca016eba0342056d3ee7553619d3e990b132d /src/base
parentddc574a95406d2f86b82d4fcdfd2e66b216eaf0a (diff)
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Making &cec support the miter circuit.
Diffstat (limited to 'src/base')
-rw-r--r--src/base/abci/abc.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c
index b59bdf4c..d6871a3c 100644
--- a/src/base/abci/abc.c
+++ b/src/base/abci/abc.c
@@ -37753,6 +37753,20 @@ int Abc_CommandAbc9Cec( Abc_Frame_t * pAbc, int argc, char ** argv )
Gia_Obj_t * pObj; int i;
if ( !pPars->fSilent )
Abc_Print( 1, "Assuming the current network is a single-output miter.\n" );
+ if ( fUseSim )
+ {
+ abctime clk = Abc_Clock();
+ extern int Gia_ManCheckSimEquiv( Gia_Man_t * p, int fVerbose );
+ int Status = Gia_ManCheckSimEquiv( pAbc->pGia, pPars->fVerbose );
+ if ( Status == 1 )
+ Abc_Print( 1, "Networks are equivalent. " );
+ else if ( Status == 0 )
+ Abc_Print( 1, "Networks are NOT equivalent. " );
+ else
+ Abc_Print( 1, "Networks are UNDECIDED. " );
+ Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
+ return 0;
+ }
// handle the case when the output is disproved by an all-0 primary input pattern
ABC_FREE( pAbc->pGia->pCexComb );
Gia_ManSetPhase( pAbc->pGia );