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authorYen-Sheng Ho <ysho@berkeley.edu>2017-03-31 07:42:06 -0700
committerYen-Sheng Ho <ysho@berkeley.edu>2017-03-31 07:42:06 -0700
commit04bd8631e095eb391cd44370b0c6a3c9c56ce60f (patch)
tree0436ac1539b027c440f9ab3771b7639dd1e2dcdd /src/base/wlc
parent16ef095f9cc4410ce50fbf3ddc5bc6ae360d5766 (diff)
parent96056c377cd0b3cc834f139ef90aaecf9c94d629 (diff)
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-rw-r--r--src/base/wlc/wlcGraft.c212
1 files changed, 171 insertions, 41 deletions
diff --git a/src/base/wlc/wlcGraft.c b/src/base/wlc/wlcGraft.c
index f7e59cf9..33de00c5 100644
--- a/src/base/wlc/wlcGraft.c
+++ b/src/base/wlc/wlcGraft.c
@@ -302,33 +302,37 @@ Wlc_Ntk_t * Wlc_NtkGraftMulti( Wlc_Ntk_t * p, int fVerbose )
***********************************************************************/
void Sbc_Mult( word a, word b, word r[2] )
{
- word pL = (a & 0xFFFFFFFF) * (b & 0xFFFFFFFF);
- word pM1 = (a & 0xFFFFFFFF) * (b >> 32);
- word pM2 = (a >> 32) * (b & 0xFFFFFFFF);
+ word Msk = 0xFFFFFFFF;
+ word pL = (a & Msk) * (b & Msk);
+ word pM1 = (a & Msk) * (b >> 32);
+ word pM2 = (a >> 32) * (b & Msk);
word pH = (a >> 32) * (b >> 32);
- word Car = (pM1 & 0xFFFFFFFF) + (pM2 & 0xFFFFFFFF) + (pL >> 32);
- r[0] = pL;
+ word Car = (pM1 & Msk) + (pM2 & Msk) + (pL >> 32);
+ r[0] = a * b;
r[1] = pH + (pM1 >> 32) + (pM2 >> 32) + (Car >> 32);
}
-void Sbc_SimMult( word A[64], word B[64], word R[64][2] )
+void Sbc_SimMult( word A[64], word B[64], word R[128], int nIns )
{
- word a, b, r[2]; int i, k;
+ word a, b, r[2], Mask = Abc_Tt6Mask(nIns); int i, k;
for ( i = 0; i < 64; i++ )
- A[i] = B[i] = R[0][i] = R[1][i] = 0;
+ A[i] = B[i] = R[i] = R[i+64] = 0;
Gia_ManRandom(1);
for ( i = 0; i < 64; i++ )
{
- a = Gia_ManRandom(0);
- b = Gia_ManRandom(0);
+ a = i ? (Mask & Gia_ManRandomW(0)) : 0;
+ b = i ? (Mask & Gia_ManRandomW(0)) : 0;
Sbc_Mult( a, b, r );
for ( k = 0; k < 64; k++ )
{
- if ( (a >> k) & 1 ) A[k] |= (1 << i);
- if ( (b >> k) & 1 ) B[k] |= (1 << i);
- if ( (r[0] >> k) & 1 ) R[0][k] |= (1 << i);
- if ( (r[1] >> k) & 1 ) R[1][k] |= (1 << i);
+ if ( (a >> k) & 1 ) A[k] |= ((word)1 << i);
+ if ( (b >> k) & 1 ) B[k] |= ((word)1 << i);
+ if ( (r[0] >> k) & 1 ) R[k] |= ((word)1 << i);
+ if ( (r[1] >> k) & 1 ) R[k+64] |= ((word)1 << i);
}
}
+// for ( i = 0; i < 128; i++ )
+// for ( k = 0; k < 64; k++, printf( "\n" ) )
+// printf( "%d", (R[i] >> k) & 1 );
}
/**Function*************************************************************
@@ -345,69 +349,181 @@ void Sbc_SimMult( word A[64], word B[64], word R[64][2] )
Vec_Int_t * Sbc_ManDetectMult( Gia_Man_t * p, Vec_Int_t * vIns )
{
int nWords = 1;
- Vec_Int_t * vNodes = Vec_IntStart( Vec_IntSize(vIns) );
+ Vec_Int_t * vGia2Out = Vec_IntStartFull( Gia_ManObjNum(p) );
Gia_Obj_t * pObj; int i, Entry, nIns = Vec_IntSize(vIns)/2;
- word A[64], B[64], R[64][2], * pInfoObj;
+ word A[64], B[64], R[128], * pInfoObj; word Temp;
- // alloc simulation info
+ // create hash table
Vec_Mem_t * vTtMem = Vec_MemAlloc( nWords, 10 );
- Vec_MemHashAlloc( vTtMem, 10000 );
+ Vec_MemHashAlloc( vTtMem, 1000 );
+ Sbc_SimMult( A, B, R, nIns );
+ for ( i = 0; i < 2*nIns; i++ )
+ {
+ Vec_MemHashInsert( vTtMem, R+i );
+ //printf( "Out %2d : ", i );
+ //Extra_PrintHex( stdout, (unsigned *)(R+i), 6 ); printf( "\n" );
+ }
+ assert( Vec_MemEntryNum(vTtMem) == 2*nIns );
+
+ // alloc simulation info
Vec_WrdFreeP( &p->vSims );
p->vSims = Vec_WrdStart( Gia_ManObjNum(p) * nWords );
p->nSimWords = nWords;
- // prepare simulation manager
- pInfoObj = Wlc_ObjSim( p, 0 );
- Vec_MemHashInsert( vTtMem, pInfoObj );
+ // mark inputs
+ Gia_ManIncrementTravId( p );
Gia_ObjSetTravIdCurrentId( p, 0 );
Gia_ManForEachCi( p, pObj, i )
+ {
Gia_ObjSetTravIdCurrent( p, pObj );
- // set internal nodes
- assert( Vec_IntSize(vIns) % 2 );
- Sbc_SimMult( A, B, R );
- Gia_ManIncrementTravId( p );
+ //Wlc_ObjSimPi( p, Gia_ObjId(p, pObj) );
+ }
+
+ // assign inputs
+ assert( Vec_IntSize(vIns) % 2 == 0 );
Gia_ManForEachObjVec( vIns, p, pObj, i )
{
Gia_ObjSetTravIdCurrent( p, pObj );
pInfoObj = Wlc_ObjSim( p, Gia_ObjId(p, pObj) );
- *pInfoObj = i < nIns ? A[i] : B[nIns-i];
+ *pInfoObj = i < nIns ? A[i] : B[i - nIns];
}
+
// perform simulation
Gia_ManForEachObj1( p, pObj, i )
{
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
continue;
+
if ( Gia_ObjIsAnd(pObj) )
Wlc_ObjSimAnd( p, i );
else if ( Gia_ObjIsCo(pObj) )
Wlc_ObjSimCo( p, i );
else assert( 0 );
- // mark each first node
+ // mark direct polarity
pInfoObj = Wlc_ObjSim( p, i );
Entry = *Vec_MemHashLookup( vTtMem, pInfoObj );
- if ( Entry > 0 )
+ if ( Entry >= 0 )
{
- if ( Vec_IntEntry(vNodes, Entry) == 0 ) // new
- Vec_IntWriteEntry( vNodes, Entry, Abc_Var2Lit(i, 0) );
+ Vec_IntWriteEntry( vGia2Out, i, Abc_Var2Lit(Entry, 0) );
continue;
}
+
+ // mark negated polarity
+ Temp = *pInfoObj;
Abc_TtNot( pInfoObj, nWords );
Entry = *Vec_MemHashLookup( vTtMem, pInfoObj );
Abc_TtNot( pInfoObj, nWords );
- if ( Entry > 0 )
+ assert( Temp == *pInfoObj );
+ if ( Entry >= 0 )
{
- if ( Vec_IntEntry(vNodes, Entry) == 0 ) // new
- Vec_IntWriteEntry( vNodes, Entry, Abc_Var2Lit(i, 1) );
+ Vec_IntWriteEntry( vGia2Out, i, Abc_Var2Lit(Entry, 1) );
continue;
}
}
+
+ Gia_ManForEachCo( p, pObj, i )
+ {
+ pInfoObj = Wlc_ObjSim( p, Gia_ObjId(p, pObj) );
+ //printf( "Out %2d : Driver = %5d(%d)", i, Gia_ObjFaninId0p(p, pObj), Gia_ObjFaninC0(pObj) );
+ //Extra_PrintHex( stdout, (unsigned *)pInfoObj, 6 ); printf( "\n" );
+ }
+
// cleanup
Vec_MemHashFree( vTtMem );
Vec_MemFreeP( &vTtMem );
- Vec_WrdFreeP( &p->vSims );
- p->nSimWords = 0;
- return vNodes;
+ //Vec_WrdFreeP( &p->vSims );
+ //p->nSimWords = 0;
+ return vGia2Out;
+}
+Vec_Int_t * Sbc_ManWlcNodes2( Wlc_Ntk_t * pNtk, Gia_Man_t * p, Vec_Int_t * vGiaLits )
+{
+ Wlc_Obj_t * pObj; int i, k, iGiaLit, iFirst, nBits;
+ Vec_Int_t * vRes = Vec_IntAlloc( 100 );
+ Vec_Int_t * vMap = Vec_IntStartFull( Gia_ManObjNum(p) );
+ Vec_IntForEachEntry( vGiaLits, iGiaLit, i )
+ if ( iGiaLit != -1 )
+ Vec_IntWriteEntry( vMap, Abc_Lit2Var(iGiaLit), Abc_Var2Lit(i, Abc_LitIsCompl(iGiaLit)) );
+ Wlc_NtkForEachObj( pNtk, pObj, i )
+ {
+ iFirst = Vec_IntEntry( &pNtk->vCopies, i );
+ nBits = Wlc_ObjRange(pObj);
+ for ( k = 0; k < nBits; k++ )
+ {
+ int iLitGia = Vec_IntEntry( &pNtk->vBits, iFirst + k );
+ int iLitOut = Vec_IntEntry( vMap, Abc_Lit2Var(iLitGia) );
+ if ( iLitOut == -1 )
+ continue;
+ Vec_IntWriteEntry( vMap, Abc_Lit2Var(iLitGia), -1 );
+ iLitOut = Abc_LitNotCond( iLitOut, Abc_LitIsCompl(iLitGia) );
+ printf( "Matched out %d in phase %d with object %d (%s) bit %d (out of %d).\n", Abc_Lit2Var(iLitOut), Abc_LitIsCompl(iLitOut), i, Wlc_ObjName(pNtk, Wlc_ObjId(pNtk, pObj)), k, nBits );
+ Vec_IntPushUnique( vRes, i );
+ }
+ }
+ Vec_IntFree( vMap );
+ Vec_IntSort( vRes, 0 );
+ // consider the last one
+ pObj = Wlc_NtkObj( pNtk, Vec_IntEntryLast(vRes) );
+ iFirst = Vec_IntEntry( &pNtk->vCopies, Wlc_ObjId(pNtk, pObj) );
+ nBits = Wlc_ObjRange(pObj);
+ printf( "Considering object %d (%s):\n", Wlc_ObjId(pNtk, pObj), Wlc_ObjName(pNtk, Wlc_ObjId(pNtk, pObj)) );
+ for ( k = 0; k < nBits; k++ )
+ {
+ int iLitGia = Vec_IntEntry( &pNtk->vBits, iFirst + k );
+ int iLitOutP = Vec_IntFind( vGiaLits, iLitGia );
+ int iLitOutN = Vec_IntFind( vGiaLits, Abc_LitNot(iLitGia) );
+ printf( "Matching bit %d with output %d / %d.\n", k, iLitOutP, iLitOutN );
+ // print simulation signature
+ {
+ word * pInfoObj = Wlc_ObjSim( p, Abc_Lit2Var(iLitGia) );
+ Extra_PrintHex( stdout, (unsigned *)pInfoObj, 6 ); printf( "\n" );
+ }
+ }
+ return vRes;
+}
+int Sbc_ManWlcNodes( Wlc_Ntk_t * pNtk, Gia_Man_t * p, Vec_Int_t * vGia2Out, int nOuts )
+{
+ Wlc_Obj_t * pObj;
+ int i, k, iLitGia, iLitOut, iFirst, nBits, iObjFound = -1;
+ Vec_Int_t * vMatched = Vec_IntAlloc( 100 );
+ Wlc_NtkForEachObj( pNtk, pObj, i )
+ {
+ iFirst = Vec_IntEntry( &pNtk->vCopies, i );
+ nBits = Wlc_ObjRange(pObj);
+ Vec_IntClear( vMatched );
+ for ( k = 0; k < nBits; k++ )
+ {
+ iLitGia = Vec_IntEntry( &pNtk->vBits, iFirst + k );
+ iLitOut = Vec_IntEntry( vGia2Out, Abc_Lit2Var(iLitGia) );
+ if ( iLitOut == -1 )
+ continue;
+ iLitOut = Abc_LitNotCond( iLitOut, Abc_LitIsCompl(iLitGia) );
+ printf( "Matched node %5d (%10s) bit %3d (out of %3d) with output %3d(%d).\n",
+ i, Wlc_ObjName(pNtk, Wlc_ObjId(pNtk, pObj)), k, nBits, Abc_Lit2Var(iLitOut), Abc_LitIsCompl(iLitOut) );
+ Vec_IntPushOrder( vMatched, Abc_Lit2Var(iLitOut) );
+ }
+ if ( Vec_IntSize(vMatched) > 0 )
+ printf( "\n" );
+ if ( Vec_IntSize(vMatched) == nOuts )
+ {
+ if ( iObjFound == -1 )
+ iObjFound = i;
+ printf( "Found object %d with all bits matched.\n", i );
+ /*
+ for ( k = nBits-2; k < nBits; k++ )
+ {
+ iLitGia = Vec_IntEntry( &pNtk->vBits, iFirst + k );
+ {
+ word * pInfoObj = Wlc_ObjSim( p, Abc_Lit2Var(iLitGia) );
+ Extra_PrintHex( stdout, (unsigned *)pInfoObj, 6 ); printf( "\n" );
+ }
+ }
+ */
+ break;
+ }
+ }
+ Vec_IntFree( vMatched );
+ return iObjFound;
}
/**Function*************************************************************
@@ -421,17 +537,31 @@ Vec_Int_t * Sbc_ManDetectMult( Gia_Man_t * p, Vec_Int_t * vIns )
SeeAlso []
***********************************************************************/
-void Sbc_ManDetectMultTest( Gia_Man_t * p )
+void Sbc_ManDetectMultTest( Wlc_Ntk_t * pNtk, int fVerbose )
{
extern Vec_Int_t * Sdb_StoComputeCutsDetect( Gia_Man_t * pGia );
+ Gia_Man_t * p = Wlc_NtkBitBlast( pNtk, NULL, -1, 0, 0, 0, 0, 1 );
+ Vec_Int_t * vIns, * vGia2Out;
+ int iObjFound = -1;
+// Gia_Obj_t * pObj; int i;
+// Gia_ManForEachCo( p, pObj, i )
+// printf( "Output %2d - driver %5d (%d)\n", i, Gia_ObjFaninId0p(p, pObj), Gia_ObjFaninC0(pObj) );
+
+ vIns = Sdb_StoComputeCutsDetect( p );
+ if ( vIns == NULL || Vec_IntSize(vIns) == 0 || (Vec_IntSize(vIns) % 2) != 0 )
+ {
+ printf( "Input identification did not work out.\n" );
+ return;
+ }
- Vec_Int_t * vIns = Sdb_StoComputeCutsDetect( p );
- Vec_Int_t * vNodes = Sbc_ManDetectMult( p, vIns );
+ vGia2Out = Sbc_ManDetectMult( p, vIns );
- Vec_IntPrint( vNodes );
+ iObjFound = Sbc_ManWlcNodes( pNtk, p, vGia2Out, Vec_IntSize(vIns) );
- Vec_IntFree( vNodes );
+ Vec_IntFree( vGia2Out );
Vec_IntFree( vIns );
+
+ Gia_ManStop( p );
}
////////////////////////////////////////////////////////////////////////