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| author | Alan Mishchenko <alanmi@berkeley.edu> | 2013-09-17 14:47:34 -0700 |
|---|---|---|
| committer | Alan Mishchenko <alanmi@berkeley.edu> | 2013-09-17 14:47:34 -0700 |
| commit | 73a997a8bd303b4398e64de2d3a0bfb3f85a3acf (patch) | |
| tree | 0cd6215b82a53b18caae1739eeac883ca2c9fbd0 /src/base/main/mainInt.h | |
| parent | ca39b892f0c035f571e5ac62e08a3d1166697ac7 (diff) | |
| download | abc-73a997a8bd303b4398e64de2d3a0bfb3f85a3acf.tar.gz abc-73a997a8bd303b4398e64de2d3a0bfb3f85a3acf.tar.bz2 abc-73a997a8bd303b4398e64de2d3a0bfb3f85a3acf.zip | |
Adding commands to set and print timing constraints.
Diffstat (limited to 'src/base/main/mainInt.h')
| -rw-r--r-- | src/base/main/mainInt.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/base/main/mainInt.h b/src/base/main/mainInt.h index acd8bbd3..cf1a9376 100644 --- a/src/base/main/mainInt.h +++ b/src/base/main/mainInt.h @@ -93,6 +93,9 @@ struct Abc_Frame_t_ void * pLibSuper; // the current supergate library void * pLibVer; // the current Verilog library void * pLibScl; // the current Liberty library + // timing constraints + char * pDrivingCell; // name of the driving cell + float MaxLoad; // maximum output load // new code Gia_Man_t * pGia; // alternative current network as a light-weight AIG |