Version abc70428

3 files changed, 27 insertions, 3 deletions

diff --git a/src/base/io/ioReadAiger.c b/src/base/io/ioReadAiger.c
index 48738903..a54a00fe 100644
--- a/src/base/io/ioReadAiger.c
+++ b/src/base/io/ioReadAiger.c
@@ -25,7 +25,7 @@
 ///                        DECLARATIONS                              ///
 ////////////////////////////////////////////////////////////////////////
 
-static unsigned Io_ReadAigerDecode( char ** ppPos );
+unsigned Io_ReadAigerDecode( char ** ppPos );
 
 ////////////////////////////////////////////////////////////////////////
 ///                     FUNCTION DEFINITIONS                         ///
diff --git a/src/base/io/ioWriteAiger.c b/src/base/io/ioWriteAiger.c
index a1ff4456..7c9da184 100644
--- a/src/base/io/ioWriteAiger.c
+++ b/src/base/io/ioWriteAiger.c
@@ -129,7 +129,7 @@ static unsigned Io_ObjMakeLit( int Var, int fCompl )                 { return (V
 static unsigned Io_ObjAigerNum( Abc_Obj_t * pObj )                   { return (unsigned)pObj->pCopy;  }
 static void     Io_ObjSetAigerNum( Abc_Obj_t * pObj, unsigned Num )  { pObj->pCopy = (void *)Num;     }
 
-static int      Io_WriteAigerEncode( char * pBuffer, int Pos, unsigned x );
+int      Io_WriteAigerEncode( char * pBuffer, int Pos, unsigned x );
 
 ////////////////////////////////////////////////////////////////////////
 ///                     FUNCTION DEFINITIONS                         ///
diff --git a/src/base/io/ioWriteVerilog.c b/src/base/io/ioWriteVerilog.c
index bf5182fb..a02d53fd 100644
--- a/src/base/io/ioWriteVerilog.c
+++ b/src/base/io/ioWriteVerilog.c
@@ -213,17 +213,33 @@ void Io_WriteVerilogPis( FILE * pFile, Abc_Ntk_t * pNtk, int Start )
 ***********************************************************************/
 void Io_WriteVerilogPos( FILE * pFile, Abc_Ntk_t * pNtk, int Start )
 {
-    Abc_Obj_t * pTerm, * pNet;
+    Abc_Obj_t * pTerm, * pNet, * pSkip;
     int LineLength;
     int AddedLength;
     int NameCounter;
     int i;
+    int nskip;
+
+    pSkip = 0;
+    nskip = 0;
 
     LineLength  = Start;
     NameCounter = 0;
     Abc_NtkForEachPo( pNtk, pTerm, i )
     {
         pNet = Abc_ObjFanin0(pTerm);
+        
+        if ( Abc_ObjIsPi(Abc_ObjFanin0(pNet)) )
+        {
+            // Skip this output since it is a feedthrough -- the same
+            // name will appear as an input and an output which other
+            // tools reading verilog do not like.
+            
+            nskip++;
+            pSkip = pNet;   // save an example of skipped net
+            continue;
+        }
+        
         // get the line length after this name is written
         AddedLength = strlen(Io_WriteVerilogGetName(Abc_ObjName(pNet))) + 2;
         if ( NameCounter && LineLength + AddedLength + 3 > IO_WRITE_LINE_LENGTH )
@@ -237,6 +253,14 @@ void Io_WriteVerilogPos( FILE * pFile, Abc_Ntk_t * pNtk, int Start )
         LineLength += AddedLength;
         NameCounter++;
     }
+
+    if (nskip != 0)
+    {
+        assert (pSkip);
+        printf( "Io_WriteVerilogPos(): Omitted %d feedthrough nets from output list of module (e.g. %s).\n", nskip, Abc_ObjName(pSkip) );
+        return;
+    }
+
 }
 
 /**Function*************************************************************