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authorBaruch Sterin <baruchs@gmail.com>2015-11-05 01:23:31 -0800
committerBaruch Sterin <baruchs@gmail.com>2015-11-05 01:23:31 -0800
commitc0ba25a69388765d7057ae8729e12b8a85435e35 (patch)
tree98c999fed9d9cf65b6425334e819c8b339fc6025 /src/base/bac
parent8ee49ff150a12f7183fe25e0a8d8e845391c100b (diff)
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silence clang errors when compiling as C++
Diffstat (limited to 'src/base/bac')
-rw-r--r--src/base/bac/bacWriteVer.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/base/bac/bacWriteVer.c b/src/base/bac/bacWriteVer.c
index 45742850..0f00eeef 100644
--- a/src/base/bac/bacWriteVer.c
+++ b/src/base/bac/bacWriteVer.c
@@ -110,7 +110,7 @@ static void Psr_ManWriteVerilogBoxes( FILE * pFile, Psr_Ntk_t * p )
Vec_Int_t * vBox; int i;
Psr_NtkForEachBox( p, vBox, i )
{
- Bac_ObjType_t NtkId = Psr_BoxNtk(p, i);
+ Bac_ObjType_t NtkId = (Bac_ObjType_t)Psr_BoxNtk(p, i);
if ( NtkId == BAC_BOX_MUX )
Psr_ManWriteVerilogMux( pFile, p, vBox );
else if ( Psr_BoxIsNode(p, i) ) // node ------- check order of fanins