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| author | Alan Mishchenko <alanmi@berkeley.edu> | 2015-03-24 19:24:52 +0700 |
|---|---|---|
| committer | Alan Mishchenko <alanmi@berkeley.edu> | 2015-03-24 19:24:52 +0700 |
| commit | 53e4946c4383acabefa8e9070cbaae445005b312 (patch) | |
| tree | 92719120dd7ff37efebefa0dc2756be49c5d440e /src/base/abci/abcDar.c | |
| parent | efdd26f86d3dbbde1626fe6a84304bc700b97479 (diff) | |
| download | abc-53e4946c4383acabefa8e9070cbaae445005b312.tar.gz abc-53e4946c4383acabefa8e9070cbaae445005b312.tar.bz2 abc-53e4946c4383acabefa8e9070cbaae445005b312.zip | |
Trying to reduce delay degradation afer 'map' with user timing.
Diffstat (limited to 'src/base/abci/abcDar.c')
| -rw-r--r-- | src/base/abci/abcDar.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/base/abci/abcDar.c b/src/base/abci/abcDar.c index ad857730..92235822 100644 --- a/src/base/abci/abcDar.c +++ b/src/base/abci/abcDar.c @@ -290,6 +290,7 @@ Aig_Man_t * Abc_NtkToDar( Abc_Ntk_t * pNtk, int fExors, int fRegisters ) // initialize logic level of the CIs ((Aig_Obj_t *)pObj->pCopy)->Level = pObj->Level; } + // complement the 1-values registers if ( fRegisters ) { Abc_NtkForEachLatch( pNtk, pObj, i ) |