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author | Alan Mishchenko <alanmi@berkeley.edu> | 2009-04-10 08:01:00 -0700 |
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committer | Alan Mishchenko <alanmi@berkeley.edu> | 2009-04-10 08:01:00 -0700 |
commit | ccd1b57264d3bf1514410747cdcf6e4731ac7f2a (patch) | |
tree | 17993c239735ee63c4e8ed69cb1c3df7eacecc6d /src/aig/dch | |
parent | df6fdd1dffd8ce83dfc4a7868ebdd25241f8f24b (diff) | |
download | abc-ccd1b57264d3bf1514410747cdcf6e4731ac7f2a.tar.gz abc-ccd1b57264d3bf1514410747cdcf6e4731ac7f2a.tar.bz2 abc-ccd1b57264d3bf1514410747cdcf6e4731ac7f2a.zip |
Version abc90410
Diffstat (limited to 'src/aig/dch')
-rw-r--r-- | src/aig/dch/dch.h | 4 | ||||
-rw-r--r-- | src/aig/dch/dchAig.c | 2 |
2 files changed, 4 insertions, 2 deletions
diff --git a/src/aig/dch/dch.h b/src/aig/dch/dch.h index a5a56da6..6157a811 100644 --- a/src/aig/dch/dch.h +++ b/src/aig/dch/dch.h @@ -46,8 +46,10 @@ struct Dch_Pars_t_ int nSatVarMax; // the max number of SAT variables int fSynthesis; // set to 1 to perform synthesis int fPolarFlip; // uses polarity adjustment - int fSimulateTfo; // uses simulatin of TFO classes + int fSimulateTfo; // uses simulation of TFO classes int fPower; // uses power-aware rewriting + int fUseGia; // uses GIA package + int fUseCSat; // uses circuit-based solver int fVerbose; // verbose stats int timeSynth; // synthesis runtime int nNodesAhead; // the lookahead in terms of nodes diff --git a/src/aig/dch/dchAig.c b/src/aig/dch/dchAig.c index 239ece18..d38a1304 100644 --- a/src/aig/dch/dchAig.c +++ b/src/aig/dch/dchAig.c @@ -72,7 +72,7 @@ Aig_Man_t * Dch_DeriveTotalAig( Vec_Ptr_t * vAigs ) { assert( Aig_ManPiNum(pAig) == Aig_ManPiNum(pAig2) ); assert( Aig_ManPoNum(pAig) == Aig_ManPoNum(pAig2) ); - nNodes += Aig_ManNodeNum(pAig); + nNodes += Aig_ManNodeNum(pAig2); Aig_ManCleanData( pAig2 ); } // map constant nodes |