summaryrefslogtreecommitdiffstats
path: root/regtest.script
diff options
context:
space:
mode:
authorAlan Mishchenko <alanmi@berkeley.edu>2008-01-30 20:01:00 -0800
committerAlan Mishchenko <alanmi@berkeley.edu>2008-01-30 20:01:00 -0800
commit0c6505a26a537dc911b6566f82d759521e527c08 (patch)
treef2687995efd4943fe3b1307fce7ef5942d0a57b3 /regtest.script
parent4d30a1e4f1edecff86d5066ce4653a370e59e5e1 (diff)
downloadabc-0c6505a26a537dc911b6566f82d759521e527c08.tar.gz
abc-0c6505a26a537dc911b6566f82d759521e527c08.tar.bz2
abc-0c6505a26a537dc911b6566f82d759521e527c08.zip
Version abc80130_2
Diffstat (limited to 'regtest.script')
-rw-r--r--regtest.script119
1 files changed, 17 insertions, 102 deletions
diff --git a/regtest.script b/regtest.script
index a047af53..c4a23a89 100644
--- a/regtest.script
+++ b/regtest.script
@@ -1,103 +1,18 @@
-r examples/apex4.pla
-resyn
-sharem
-fpga
-cec
-ps
-
-clp
-share
-resyn
-map
-cec
-ps
-
-r examples/C2670.blif
-resyn
-fpga
-cec
-ps
-
-u
-map
-cec
-ps
-
-r examples/frg2.blif
-dsd
-muxes
-cec
-clp
-share
-resyn
-map
-cec
-ps
-
-r examples/pj1.blif
-resyn
-fpga
-cec
-ps
-
-u
-map
-cec
-ps
-
-r examples/s38584.bench
-resyn
-fpga
-cec
-ps
-
-u
-map
-cec
-ps
-
-r examples/ac.v
-resyn
-fpga
-cec
-ps
-
-u
-map
-cec
-ps
-
-r examples/s444.blif
-b
-esd -v
-dsd
-cec
-ps
-
-r examples/i10.blif
-fpga
-cec
-ps
-u
-map
-cec
-ps
-
-r examples/i10.blif
-b
-fraig_store
-resyn
-fraig_store
-resyn2
-fraig_store
-fraig_restore
-fpga
-cec
-ps
-
-u
-map
-cec
-ps
-
+r examples/apex4.pla; resyn; if; cec; ps; clp; resyn; map; cec; ps
+r examples/C2670.blif; st; w 1.aig; cec 1.aig
+r examples/C2670.blif; st; short_names; w 1.bench; cec 1.bench
+r examples/C2670.blif; st; short_names; ren -s; w 1.eqn; cec 1.eqn
+r examples/C2670.blif; resyn2; if -K 8; cec; ps; u; map; cec; ps
+r examples/frg2.blif; dsd; muxes; cec; ps; clp; share; resyn; map; cec; ps
+r examples/frg2.blif; bdd; muxes; cec; ps; clp; st; ren -b; muxes; cec; ps
+r examples/i10.blif; resyn2; fpga; cec; ps; u; map; cec; ps
+r examples/i10.blif; choice; fpga; cec; ps; u; map; cec; ps
+r examples/pj1.blif; st; if; cec; ps; u; map; cec; ps
+r examples/s38417.blif; comb; w 1.blif; resyn; if; cec 1.blif; ps
+r examples/s38417.blif; resyn; if; cec; ps; u; map; cec; ps
+r examples/s38584.bench; resyn; ren -s; fx; if; cec; ps; u; map; cec; ps
+r examples/s444.blif; b; esd -v; print_exdc; dsd; cec; ps
+r examples/s444.blif; double; frames -F 5; w 1.blif; ffpga -K 8; cec 1.blif
+r examples/s5378.blif; frames -F 5; cycle; w 1.blif; ps; ret; ps; sec 1.blif
+r examples/s6669.blif; cycle; w 1.blif; ps; ret -M 3; resyn; ps; sec 1.blif
time