Renamed Aig_ObjIsPi/Po to be ...Ci/Co and Aig_Man(Pi/Po)Num to be ...(Ci/Co)...

163 files changed, 1129 insertions, 1129 deletions

diff --git a/src/aig/aig/aig.h b/src/aig/aig/aig.h
index 9d4a877b..4c437b8c 100644
--- a/src/aig/aig/aig.h
+++ b/src/aig/aig/aig.h
@@ -58,8 +58,8 @@ typedef struct Aig_MmStep_t_         Aig_MmStep_t;
 typedef enum { 
     AIG_OBJ_NONE,                    // 0: non-existent object
     AIG_OBJ_CONST1,                  // 1: constant 1 
-    AIG_OBJ_PI,                      // 2: primary input
-    AIG_OBJ_PO,                      // 3: primary output
+    AIG_OBJ_CI,                      // 2: combinational input
+    AIG_OBJ_CO,                      // 3: combinational output
     AIG_OBJ_BUF,                     // 4: buffer node
     AIG_OBJ_AND,                     // 5: AND node
     AIG_OBJ_EXOR,                    // 6: EXOR node
@@ -98,8 +98,8 @@ struct Aig_Man_t_
     char *           pName;          // the design name
     char *           pSpec;          // the input file name
     // AIG nodes
-    Vec_Ptr_t *      vPis;           // the array of PIs
-    Vec_Ptr_t *      vPos;           // the array of POs
+    Vec_Ptr_t *      vCis;           // the array of PIs
+    Vec_Ptr_t *      vCos;           // the array of POs
     Vec_Ptr_t *      vObjs;          // the array of all nodes (optional)
     Vec_Ptr_t *      vBufs;          // the array of buffers
     Aig_Obj_t *      pConst1;        // the constant 1 node
@@ -246,8 +246,8 @@ static inline Aig_Obj_t *  Aig_Not( Aig_Obj_t * p )               { return (Aig_
 static inline Aig_Obj_t *  Aig_NotCond( Aig_Obj_t * p, int c )    { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) ^ (c));  }
 static inline int          Aig_IsComplement( Aig_Obj_t * p )      { return (int)((ABC_PTRUINT_T)(p) & 01);           }
 
-static inline int          Aig_ManPiNum( Aig_Man_t * p )          { return p->nObjs[AIG_OBJ_PI];                     }
-static inline int          Aig_ManPoNum( Aig_Man_t * p )          { return p->nObjs[AIG_OBJ_PO];                     }
+static inline int          Aig_ManCiNum( Aig_Man_t * p )          { return p->nObjs[AIG_OBJ_CI];                     }
+static inline int          Aig_ManCoNum( Aig_Man_t * p )          { return p->nObjs[AIG_OBJ_CO];                     }
 static inline int          Aig_ManBufNum( Aig_Man_t * p )         { return p->nObjs[AIG_OBJ_BUF];                    }
 static inline int          Aig_ManAndNum( Aig_Man_t * p )         { return p->nObjs[AIG_OBJ_AND];                    }
 static inline int          Aig_ManExorNum( Aig_Man_t * p )        { return p->nObjs[AIG_OBJ_EXOR];                   }
@@ -261,26 +261,26 @@ static inline int          Aig_ManConstrNum( Aig_Man_t * p )      { return p->nC
 static inline Aig_Obj_t *  Aig_ManConst0( Aig_Man_t * p )         { return Aig_Not(p->pConst1);                      }
 static inline Aig_Obj_t *  Aig_ManConst1( Aig_Man_t * p )         { return p->pConst1;                               }
 static inline Aig_Obj_t *  Aig_ManGhost( Aig_Man_t * p )          { return &p->Ghost;                                }
-static inline Aig_Obj_t *  Aig_ManPi( Aig_Man_t * p, int i )      { return (Aig_Obj_t *)Vec_PtrEntry(p->vPis, i);    }
-static inline Aig_Obj_t *  Aig_ManPo( Aig_Man_t * p, int i )      { return (Aig_Obj_t *)Vec_PtrEntry(p->vPos, i);    }
-static inline Aig_Obj_t *  Aig_ManLo( Aig_Man_t * p, int i )      { return (Aig_Obj_t *)Vec_PtrEntry(p->vPis, Aig_ManPiNum(p)-Aig_ManRegNum(p)+i);   }
-static inline Aig_Obj_t *  Aig_ManLi( Aig_Man_t * p, int i )      { return (Aig_Obj_t *)Vec_PtrEntry(p->vPos, Aig_ManPoNum(p)-Aig_ManRegNum(p)+i);   }
+static inline Aig_Obj_t *  Aig_ManCi( Aig_Man_t * p, int i )      { return (Aig_Obj_t *)Vec_PtrEntry(p->vCis, i);    }
+static inline Aig_Obj_t *  Aig_ManCo( Aig_Man_t * p, int i )      { return (Aig_Obj_t *)Vec_PtrEntry(p->vCos, i);    }
+static inline Aig_Obj_t *  Aig_ManLo( Aig_Man_t * p, int i )      { return (Aig_Obj_t *)Vec_PtrEntry(p->vCis, Aig_ManCiNum(p)-Aig_ManRegNum(p)+i);   }
+static inline Aig_Obj_t *  Aig_ManLi( Aig_Man_t * p, int i )      { return (Aig_Obj_t *)Vec_PtrEntry(p->vCos, Aig_ManCoNum(p)-Aig_ManRegNum(p)+i);   }
 static inline Aig_Obj_t *  Aig_ManObj( Aig_Man_t * p, int i )     { return p->vObjs ? (Aig_Obj_t *)Vec_PtrEntry(p->vObjs, i) : NULL;  }
 
 static inline Aig_Type_t   Aig_ObjType( Aig_Obj_t * pObj )        { return (Aig_Type_t)pObj->Type;       }
 static inline int          Aig_ObjId( Aig_Obj_t * pObj )          { return pObj->Id;                     }
 static inline int          Aig_ObjIsNone( Aig_Obj_t * pObj )      { return pObj->Type == AIG_OBJ_NONE;   }
 static inline int          Aig_ObjIsConst1( Aig_Obj_t * pObj )    { assert(!Aig_IsComplement(pObj)); return pObj->Type == AIG_OBJ_CONST1; }
-static inline int          Aig_ObjIsPi( Aig_Obj_t * pObj )        { return pObj->Type == AIG_OBJ_PI;     }
-static inline int          Aig_ObjIsPo( Aig_Obj_t * pObj )        { return pObj->Type == AIG_OBJ_PO;     }
+static inline int          Aig_ObjIsCi( Aig_Obj_t * pObj )        { return pObj->Type == AIG_OBJ_CI;     }
+static inline int          Aig_ObjIsCo( Aig_Obj_t * pObj )        { return pObj->Type == AIG_OBJ_CO;     }
 static inline int          Aig_ObjIsBuf( Aig_Obj_t * pObj )       { return pObj->Type == AIG_OBJ_BUF;    }
 static inline int          Aig_ObjIsAnd( Aig_Obj_t * pObj )       { return pObj->Type == AIG_OBJ_AND;    }
 static inline int          Aig_ObjIsExor( Aig_Obj_t * pObj )      { return pObj->Type == AIG_OBJ_EXOR;   }
 static inline int          Aig_ObjIsNode( Aig_Obj_t * pObj )      { return pObj->Type == AIG_OBJ_AND || pObj->Type == AIG_OBJ_EXOR;   }
-static inline int          Aig_ObjIsTerm( Aig_Obj_t * pObj )      { return pObj->Type == AIG_OBJ_PI  || pObj->Type == AIG_OBJ_PO || pObj->Type == AIG_OBJ_CONST1;   }
+static inline int          Aig_ObjIsTerm( Aig_Obj_t * pObj )      { return pObj->Type == AIG_OBJ_CI  || pObj->Type == AIG_OBJ_CO || pObj->Type == AIG_OBJ_CONST1;   }
 static inline int          Aig_ObjIsHash( Aig_Obj_t * pObj )      { return pObj->Type == AIG_OBJ_AND || pObj->Type == AIG_OBJ_EXOR;                                 }
 static inline int          Aig_ObjIsChoice( Aig_Man_t * p, Aig_Obj_t * pObj )    { return p->pEquivs && p->pEquivs[pObj->Id] && pObj->nRefs > 0;                    }
-static inline int          Aig_ObjIsCand( Aig_Obj_t * pObj )      { return pObj->Type == AIG_OBJ_PI || pObj->Type == AIG_OBJ_AND || pObj->Type == AIG_OBJ_EXOR;     }
+static inline int          Aig_ObjIsCand( Aig_Obj_t * pObj )      { return pObj->Type == AIG_OBJ_CI || pObj->Type == AIG_OBJ_AND || pObj->Type == AIG_OBJ_EXOR;     }
 
 static inline int          Aig_ObjIsMarkA( Aig_Obj_t * pObj )     { return pObj->fMarkA;  }
 static inline void         Aig_ObjSetMarkA( Aig_Obj_t * pObj )    { pObj->fMarkA = 1;     }
@@ -347,7 +347,7 @@ static inline Aig_Obj_t *  Aig_ObjCreateGhost( Aig_Man_t * p, Aig_Obj_t * p0, Ai
     Aig_Obj_t * pGhost;
     assert( Type != AIG_OBJ_AND || !Aig_ObjIsConst1(Aig_Regular(p0)) );
     assert( p1 == NULL || !Aig_ObjIsConst1(Aig_Regular(p1)) );
-    assert( Type == AIG_OBJ_PI || Aig_Regular(p0) != Aig_Regular(p1) );
+    assert( Type == AIG_OBJ_CI || Aig_Regular(p0) != Aig_Regular(p1) );
     pGhost = Aig_ManGhost(p);
     pGhost->Type = Type;
     if ( p1 == NULL || Aig_Regular(p0)->Id < Aig_Regular(p1)->Id )
@@ -388,16 +388,16 @@ static inline void Aig_ManRecycleMemory( Aig_Man_t * p, Aig_Obj_t * pEntry )
 ///                             ITERATORS                            ///
 ////////////////////////////////////////////////////////////////////////
 
-// iterator over the primary inputs
+// iterator over the combinational inputs
 #define Aig_ManForEachCi( p, pObj, i )                                          \
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vPis, pObj, i )
+    Vec_PtrForEachEntry( Aig_Obj_t *, p->vCis, pObj, i )
 #define Aig_ManForEachCiReverse( p, pObj, i )                                   \
-    Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vPis, pObj, i )
-// iterator over the primary outputs
+    Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vCis, pObj, i )
+// iterator over the combinational outputs
 #define Aig_ManForEachCo( p, pObj, i )                                          \
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vPos, pObj, i )
+    Vec_PtrForEachEntry( Aig_Obj_t *, p->vCos, pObj, i )
 #define Aig_ManForEachCoReverse( p, pObj, i )                                   \
-    Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vPos, pObj, i )
+    Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vCos, pObj, i )
 // iterators over all objects, including those currently not used
 #define Aig_ManForEachObj( p, pObj, i )                                         \
     Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL ) {} else
@@ -435,16 +435,16 @@ static inline int     Aig_ObjFanoutNext( Aig_Man_t * p, int iFan )   { assert(iF
 
 // iterator over the primary inputs
 #define Aig_ManForEachPiSeq( p, pObj, i )                                       \
-    Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vPis, pObj, i, Aig_ManPiNum(p)-Aig_ManRegNum(p) )
+    Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCis, pObj, i, Aig_ManCiNum(p)-Aig_ManRegNum(p) )
 // iterator over the latch outputs
 #define Aig_ManForEachLoSeq( p, pObj, i )                                       \
-    Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vPis, pObj, i, Aig_ManPiNum(p)-Aig_ManRegNum(p) )
+    Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vCis, pObj, i, Aig_ManCiNum(p)-Aig_ManRegNum(p) )
 // iterator over the primary outputs
 #define Aig_ManForEachPoSeq( p, pObj, i )                                       \
-    Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vPos, pObj, i, Aig_ManPoNum(p)-Aig_ManRegNum(p) )
+    Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCos, pObj, i, Aig_ManCoNum(p)-Aig_ManRegNum(p) )
 // iterator over the latch inputs
 #define Aig_ManForEachLiSeq( p, pObj, i )                                       \
-    Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vPos, pObj, i, Aig_ManPoNum(p)-Aig_ManRegNum(p) )
+    Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vCos, pObj, i, Aig_ManCoNum(p)-Aig_ManRegNum(p) )
 // iterator over the latch input and outputs
 #define Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, k )                           \
     for ( k = 0; (k < Aig_ManRegNum(p)) && (((pObjLi) = Aig_ManLi(p, k)), 1)    \
@@ -486,7 +486,7 @@ extern Aig_Obj_t *     Aig_ManDupSimpleDfs_rec( Aig_Man_t * pNew, Aig_Man_t * p,
 extern Aig_Man_t *     Aig_ManDupSimple( Aig_Man_t * p );
 extern Aig_Man_t *     Aig_ManDupSimpleWithHints( Aig_Man_t * p, Vec_Int_t * vHints );
 extern Aig_Man_t *     Aig_ManDupSimpleDfs( Aig_Man_t * p );
-extern Aig_Man_t *     Aig_ManDupSimpleDfsPart( Aig_Man_t * p, Vec_Ptr_t * vPis, Vec_Ptr_t * vPos );
+extern Aig_Man_t *     Aig_ManDupSimpleDfsPart( Aig_Man_t * p, Vec_Ptr_t * vPis, Vec_Ptr_t * vCos );
 extern Aig_Man_t *     Aig_ManDupOrdered( Aig_Man_t * p );
 extern Aig_Man_t *     Aig_ManDupCof( Aig_Man_t * p, int iInput, int Value );
 extern Aig_Man_t *     Aig_ManDupTrim( Aig_Man_t * p );
@@ -520,8 +520,8 @@ extern void            Aig_ManStop( Aig_Man_t * p );
 extern void            Aig_ManStopP( Aig_Man_t ** p );
 extern int             Aig_ManCleanup( Aig_Man_t * p );
 extern int             Aig_ManAntiCleanup( Aig_Man_t * p );
-extern int             Aig_ManPiCleanup( Aig_Man_t * p );
-extern int             Aig_ManPoCleanup( Aig_Man_t * p );
+extern int             Aig_ManCiCleanup( Aig_Man_t * p );
+extern int             Aig_ManCoCleanup( Aig_Man_t * p );
 extern void            Aig_ManPrintStats( Aig_Man_t * p );
 extern void            Aig_ManReportImprovement( Aig_Man_t * p, Aig_Man_t * pNew );
 extern void            Aig_ManSetRegNum( Aig_Man_t * p, int nRegs );
diff --git a/src/aig/aig/aigCheck.c b/src/aig/aig/aigCheck.c
index 6458cd6a..166b6e18 100644
--- a/src/aig/aig/aigCheck.c
+++ b/src/aig/aig/aigCheck.c
@@ -92,13 +92,13 @@ int Aig_ManCheck( Aig_Man_t * p )
         }
     }
     // count the total number of nodes
-    if ( Aig_ManObjNum(p) != 1 + Aig_ManPiNum(p) + Aig_ManPoNum(p) + 
+    if ( Aig_ManObjNum(p) != 1 + Aig_ManCiNum(p) + Aig_ManCoNum(p) + 
         Aig_ManBufNum(p) + Aig_ManAndNum(p) + Aig_ManExorNum(p) )
     {
         printf( "Aig_ManCheck: The number of created nodes is wrong.\n" );
         printf( "C1 = %d. Pi = %d. Po = %d. Buf = %d. And = %d. Xor = %d. Total = %d.\n",
-            1, Aig_ManPiNum(p), Aig_ManPoNum(p), Aig_ManBufNum(p), Aig_ManAndNum(p), Aig_ManExorNum(p), 
-            1 + Aig_ManPiNum(p) + Aig_ManPoNum(p) + Aig_ManBufNum(p) + Aig_ManAndNum(p) + Aig_ManExorNum(p) );
+            1, Aig_ManCiNum(p), Aig_ManCoNum(p), Aig_ManBufNum(p), Aig_ManAndNum(p), Aig_ManExorNum(p), 
+            1 + Aig_ManCiNum(p) + Aig_ManCoNum(p) + Aig_ManBufNum(p) + Aig_ManAndNum(p) + Aig_ManExorNum(p) );
         printf( "Created = %d. Deleted = %d. Existing = %d.\n",
             p->nCreated, p->nDeleted, p->nCreated - p->nDeleted );
         return 0;
@@ -153,7 +153,7 @@ void Aig_ManCheckPhase( Aig_Man_t * p )
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachObj( p, pObj, i )
-        if ( Aig_ObjIsPi(pObj) )
+        if ( Aig_ObjIsCi(pObj) )
             assert( (int)pObj->fPhase == 0 );
         else
             assert( (int)pObj->fPhase == (Aig_ObjPhaseReal(Aig_ObjChild0(pObj)) & Aig_ObjPhaseReal(Aig_ObjChild1(pObj))) );
diff --git a/src/aig/aig/aigDfs.c b/src/aig/aig/aigDfs.c
index 671dad0d..20830acb 100644
--- a/src/aig/aig/aigDfs.c
+++ b/src/aig/aig/aigDfs.c
@@ -66,7 +66,7 @@ int Aig_ManVerifyTopoOrder( Aig_Man_t * p )
                 return 0;
             }
         }
-        else if ( Aig_ObjIsPo(pObj) || Aig_ObjIsBuf(pObj) )
+        else if ( Aig_ObjIsCo(pObj) || Aig_ObjIsBuf(pObj) )
         {
             pNext = Aig_ObjFanin0(pObj);
             if ( !Aig_ObjIsTravIdCurrent(p,pNext) )
@@ -75,7 +75,7 @@ int Aig_ManVerifyTopoOrder( Aig_Man_t * p )
                 return 0;
             }
         }
-        else if ( Aig_ObjIsPi(pObj) )
+        else if ( Aig_ObjIsCi(pObj) )
         {
             if ( p->pManTime )
             {
@@ -86,7 +86,7 @@ int Aig_ManVerifyTopoOrder( Aig_Man_t * p )
                     nTerms = Tim_ManBoxInputNum( (Tim_Man_t *)p->pManTime, iBox );
                     for ( k = 0; k < nTerms; k++ )
                     {
-                        pNext = Aig_ManPo( p, iTerm1 + k );
+                        pNext = Aig_ManCo( p, iTerm1 + k );
                         assert( Tim_ManBoxForCo( (Tim_Man_t *)p->pManTime, Aig_ObjPioNum(pNext) ) == iBox ); 
                         if ( !Aig_ObjIsTravIdCurrent(p,pNext) )
                         {
@@ -183,12 +183,12 @@ void Aig_ManDfsAll_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vNodes )
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Vec_PtrPush( vNodes, pObj );
         return;
     }
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         Aig_ManDfsAll_rec( p, Aig_ObjFanin0(pObj), vNodes );
         Vec_PtrPush( vNodes, pObj );
@@ -343,7 +343,7 @@ Vec_Ptr_t * Aig_ManDfsNodes( Aig_Man_t * p, Aig_Obj_t ** ppNodes, int nNodes )
     // go through the nodes
     vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) );
     for ( i = 0; i < nNodes; i++ )
-        if ( Aig_ObjIsPo(ppNodes[i]) )
+        if ( Aig_ObjIsCo(ppNodes[i]) )
             Aig_ManDfs_rec( p, Aig_ObjFanin0(ppNodes[i]), vNodes );
         else
             Aig_ManDfs_rec( p, ppNodes[i], vNodes );
@@ -501,7 +501,7 @@ void Aig_ManChoiceLevel_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
     if ( Aig_ObjIsTravIdCurrent( p, pObj ) )
         return;
     Aig_ObjSetTravIdCurrent( p, pObj );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         if ( p->pManTime )
         {
@@ -512,7 +512,7 @@ void Aig_ManChoiceLevel_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
                 nTerms = Tim_ManBoxInputNum( (Tim_Man_t *)p->pManTime, iBox );
                 for ( i = 0; i < nTerms; i++ )
                 {
-                    pNext = Aig_ManPo(p, iTerm1 + i);
+                    pNext = Aig_ManCo(p, iTerm1 + i);
                     Aig_ManChoiceLevel_rec( p, pNext );
                     if ( LevelMax < Aig_ObjLevel(pNext) )
                         LevelMax = Aig_ObjLevel(pNext);
@@ -522,7 +522,7 @@ void Aig_ManChoiceLevel_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
         }
 //        printf( "%d ", pObj->Level );
     }
-    else if ( Aig_ObjIsPo(pObj) )
+    else if ( Aig_ObjIsCo(pObj) )
     {
         pNext = Aig_ObjFanin0(pObj);
         Aig_ManChoiceLevel_rec( p, pNext );
@@ -721,7 +721,7 @@ void Aig_SupportSize_rec( Aig_Man_t * p, Aig_Obj_t * pObj, int * pCounter )
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         (*pCounter)++;
         return;
@@ -747,7 +747,7 @@ int Aig_SupportSize( Aig_Man_t * p, Aig_Obj_t * pObj )
 {
     int Counter = 0;
     assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPo(pObj) );
+    assert( !Aig_ObjIsCo(pObj) );
     Aig_ManIncrementTravId( p );
     Aig_SupportSize_rec( p, pObj, &Counter );
     return Counter;
@@ -794,7 +794,7 @@ void Aig_Support_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vSupp )
     Aig_ObjSetTravIdCurrent(p, pObj);
     if ( Aig_ObjIsConst1(pObj) )
         return;
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Vec_PtrPush( vSupp, pObj );
         return;
@@ -820,7 +820,7 @@ Vec_Ptr_t * Aig_Support( Aig_Man_t * p, Aig_Obj_t * pObj )
 {
     Vec_Ptr_t * vSupp;
     assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPo(pObj) );
+    assert( !Aig_ObjIsCo(pObj) );
     Aig_ManIncrementTravId( p );
     vSupp = Vec_PtrAlloc( 100 );
     Aig_Support_rec( p, pObj, vSupp );
@@ -847,7 +847,7 @@ void Aig_SupportNodes( Aig_Man_t * p, Aig_Obj_t ** ppObjs, int nObjs, Vec_Ptr_t
     for ( i = 0; i < nObjs; i++ )
     {
         assert( !Aig_IsComplement(ppObjs[i]) );
-        if ( Aig_ObjIsPo(ppObjs[i]) )
+        if ( Aig_ObjIsCo(ppObjs[i]) )
             Aig_Support_rec( p, Aig_ObjFanin0(ppObjs[i]), vSupp );
         else
             Aig_Support_rec( p, ppObjs[i], vSupp );
@@ -927,7 +927,7 @@ void Aig_Compose_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFunc, Aig_Ob
     assert( !Aig_IsComplement(pObj) );
     if ( Aig_ObjIsMarkA(pObj) )
         return;
-    if ( Aig_ObjIsConst1(pObj) || Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsConst1(pObj) || Aig_ObjIsCi(pObj) )
     {
         pObj->pData = pObj == pVar ? pFunc : pObj;
         return;
@@ -953,13 +953,13 @@ void Aig_Compose_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFunc, Aig_Ob
 Aig_Obj_t * Aig_Compose( Aig_Man_t * p, Aig_Obj_t * pRoot, Aig_Obj_t * pFunc, int iVar )
 {
     // quit if the PI variable is not defined
-    if ( iVar >= Aig_ManPiNum(p) )
+    if ( iVar >= Aig_ManCiNum(p) )
     {
         printf( "Aig_Compose(): The PI variable %d is not defined.\n", iVar );
         return NULL;
     }
     // recursively perform composition
-    Aig_Compose_rec( p, Aig_Regular(pRoot), pFunc, Aig_ManPi(p, iVar) );
+    Aig_Compose_rec( p, Aig_Regular(pRoot), pFunc, Aig_ManCi(p, iVar) );
     // clear the markings
     Aig_ConeUnmark_rec( Aig_Regular(pRoot) );
     return Aig_NotCond( (Aig_Obj_t *)Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) );
diff --git a/src/aig/aig/aigDoms.c b/src/aig/aig/aigDoms.c
index 2bbb06b9..00350304 100644
--- a/src/aig/aig/aigDoms.c
+++ b/src/aig/aig/aigDoms.c
@@ -579,7 +579,7 @@ int Aig_ManMarkFlopTfi_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return 0;
     Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
+    if ( Aig_ObjIsCi(pObj) || Aig_ObjIsConst1(pObj) )
         return 1;
     Count = Aig_ManMarkFlopTfi_rec( p, Aig_ObjFanin0(pObj) );
     if ( Aig_ObjIsNode(pObj) )
@@ -773,8 +773,8 @@ int Aig_ObjDomVolume_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
     Aig_ObjSetTravIdCurrent(p, pObj);
     if ( pObj->fMarkA )
         return 1;
-//    assert( !Aig_ObjIsPi(pObj) && !Aig_ObjIsConst1(pObj) );
-    if ( Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
+//    assert( !Aig_ObjIsCi(pObj) && !Aig_ObjIsConst1(pObj) );
+    if ( Aig_ObjIsCi(pObj) || Aig_ObjIsConst1(pObj) )
         return 1;
     Count = Aig_ObjDomVolume_rec( p, Aig_ObjFanin0(pObj) );
     if ( Aig_ObjIsNode(pObj) )
@@ -826,7 +826,7 @@ int Aig_ObjDomDeref_rec( Aig_Obj_t * pNode )
     assert( pNode->nRefs == 0 );
     if ( pNode->fMarkA )
         return 1;
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return 0;
     Counter += Aig_ObjDomDeref_rec( Aig_ObjFanin0(pNode) );
     if ( Aig_ObjIsNode(pNode) )
@@ -854,7 +854,7 @@ int Aig_ObjDomRef_rec( Aig_Obj_t * pNode )
     assert( pNode->nRefs == 1 );
     if ( pNode->fMarkA )
         return 1;
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return 0;
     Counter += Aig_ObjDomRef_rec( Aig_ObjFanin0(pNode) );
     if ( Aig_ObjIsNode(pNode) )
@@ -880,7 +880,7 @@ int Aig_ObjDomDomed( Aig_Sto_t * pSto, Aig_Dom_t * pDom )
     Counter0 = 0;
     Aig_DomForEachNode( pSto->pAig, pDom, pObj, i )
     {
-        assert( !Aig_ObjIsPi(pObj) );
+        assert( !Aig_ObjIsCi(pObj) );
         Counter0 += Aig_ObjDomDeref_rec( Aig_ObjFanin0(pObj) );
         if ( Aig_ObjIsNode(pObj) )
         Counter0 += Aig_ObjDomDeref_rec( Aig_ObjFanin1(pObj) );
@@ -888,7 +888,7 @@ int Aig_ObjDomDomed( Aig_Sto_t * pSto, Aig_Dom_t * pDom )
     Counter1 = 0;
     Aig_DomForEachNode( pSto->pAig, pDom, pObj, i )
     {
-        assert( !Aig_ObjIsPi(pObj) );
+        assert( !Aig_ObjIsCi(pObj) );
         Counter1 += Aig_ObjDomRef_rec( Aig_ObjFanin0(pObj) );
         if ( Aig_ObjIsNode(pObj) )
         Counter1 += Aig_ObjDomRef_rec( Aig_ObjFanin1(pObj) );
@@ -1124,7 +1124,7 @@ void Aig_ManComputeDomsForCofactoring( Aig_Man_t * pAig )
     pSto = Aig_ManComputeDomsNodes( pAig, 1 );
     Aig_ManForEachObj( pAig, pObj, i )
     {
-        if ( !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
+        if ( !Aig_ObjIsCi(pObj) && !Aig_ObjIsNode(pObj) )
             continue;
         if ( Aig_ObjRefs(pObj) < 10 )
             continue;
diff --git a/src/aig/aig/aigDup.c b/src/aig/aig/aigDup.c
index 3c5e6b3b..9b993c86 100644
--- a/src/aig/aig/aigDup.c
+++ b/src/aig/aig/aigDup.c
@@ -222,7 +222,7 @@ Aig_Man_t * Aig_ManDupSimpleDfs( Aig_Man_t * p )
     }
     // duplicate internal nodes
     Aig_ManForEachObj( p, pObj, i )
-        if ( !Aig_ObjIsPo(pObj) )
+        if ( !Aig_ObjIsCo(pObj) )
         {
             Aig_ManDupSimpleDfs_rec( pNew, p, pObj );        
             assert( pObj->Level == ((Aig_Obj_t*)pObj->pData)->Level );
@@ -322,12 +322,12 @@ Aig_Man_t * Aig_ManDupOrdered( Aig_Man_t * p )
         {
             pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
         }
-        else if ( Aig_ObjIsPi(pObj) )
+        else if ( Aig_ObjIsCi(pObj) )
         {
             pObjNew = Aig_ObjCreateCi( pNew );
             pObjNew->Level = pObj->Level;
         }
-        else if ( Aig_ObjIsPo(pObj) )
+        else if ( Aig_ObjIsCo(pObj) )
         {
             pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
         }
@@ -466,9 +466,9 @@ Aig_Man_t * Aig_ManDupTrim( Aig_Man_t * p )
     {
         if ( Aig_ObjIsNode(pObj) )
             pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
-        else if ( Aig_ObjIsPi(pObj) )
+        else if ( Aig_ObjIsCi(pObj) )
             pObjNew = (Aig_ObjRefs(pObj) > 0 || Saig_ObjIsLo(p, pObj)) ? Aig_ObjCreateCi(pNew) : NULL;
-        else if ( Aig_ObjIsPo(pObj) )
+        else if ( Aig_ObjIsCo(pObj) )
             pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
         else if ( Aig_ObjIsConst1(pObj) )
             pObjNew = Aig_ManConst1(pNew);
@@ -524,12 +524,12 @@ Aig_Man_t * Aig_ManDupExor( Aig_Man_t * p )
         {
             pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
         }
-        else if ( Aig_ObjIsPi(pObj) )
+        else if ( Aig_ObjIsCi(pObj) )
         {
             pObjNew = Aig_ObjCreateCi( pNew );
             pObjNew->Level = pObj->Level;
         }
-        else if ( Aig_ObjIsPo(pObj) )
+        else if ( Aig_ObjIsCo(pObj) )
         {
             pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
         }
@@ -626,14 +626,14 @@ Aig_Man_t * Aig_ManDupDfs( Aig_Man_t * p )
     Aig_ManConst1(pNew)->pHaig = Aig_ManConst1(p)->pHaig;
     Aig_ManForEachObj( p, pObj, i )
     {
-        if ( Aig_ObjIsPi(pObj) )
+        if ( Aig_ObjIsCi(pObj) )
         {
             pObjNew = Aig_ObjCreateCi( pNew );
             pObjNew->Level = pObj->Level;
             pObjNew->pHaig = pObj->pHaig;
             pObj->pData = pObjNew;
         }
-        else if ( Aig_ObjIsPo(pObj) )
+        else if ( Aig_ObjIsCo(pObj) )
         {
             Aig_ManDupDfs_rec( pNew, p, Aig_ObjFanin0(pObj) );        
 //            assert( pObj->Level == ((Aig_Obj_t*)pObj->pData)->Level );
@@ -677,16 +677,16 @@ Vec_Ptr_t * Aig_ManOrderPios( Aig_Man_t * p, Aig_Man_t * pOrder )
     Vec_Ptr_t * vPios;
     Aig_Obj_t * pObj;
     int i;
-    assert( Aig_ManPiNum(p) == Aig_ManPiNum(pOrder) );
-    assert( Aig_ManPoNum(p) == Aig_ManPoNum(pOrder) );
+    assert( Aig_ManCiNum(p) == Aig_ManCiNum(pOrder) );
+    assert( Aig_ManCoNum(p) == Aig_ManCoNum(pOrder) );
     Aig_ManSetPioNumbers( pOrder );
-    vPios = Vec_PtrAlloc( Aig_ManPiNum(p) + Aig_ManPoNum(p) );
+    vPios = Vec_PtrAlloc( Aig_ManCiNum(p) + Aig_ManCoNum(p) );
     Aig_ManForEachObj( pOrder, pObj, i )
     {
-        if ( Aig_ObjIsPi(pObj) )
-            Vec_PtrPush( vPios, Aig_ManPi(p, Aig_ObjPioNum(pObj)) );
-        else if ( Aig_ObjIsPo(pObj) )
-            Vec_PtrPush( vPios, Aig_ManPo(p, Aig_ObjPioNum(pObj)) );
+        if ( Aig_ObjIsCi(pObj) )
+            Vec_PtrPush( vPios, Aig_ManCi(p, Aig_ObjPioNum(pObj)) );
+        else if ( Aig_ObjIsCo(pObj) )
+            Vec_PtrPush( vPios, Aig_ManCo(p, Aig_ObjPioNum(pObj)) );
     }
     Aig_ManCleanPioNumbers( pOrder );
     return vPios;
@@ -708,7 +708,7 @@ Aig_Obj_t * Aig_ManDupDfsGuided_rec( Aig_Man_t * pNew, Aig_Man_t * p, Aig_Obj_t
     Aig_Obj_t * pObjNew, * pEquivNew = NULL;
     if ( pObj->pData )
         return (Aig_Obj_t *)pObj->pData;
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return NULL;
     if ( p->pEquivs && Aig_ObjEquiv(p, pObj) )
         pEquivNew = Aig_ManDupDfsGuided_rec( pNew, p, Aig_ObjEquiv(p, pObj) );
@@ -773,14 +773,14 @@ Aig_Man_t * Aig_ManDupDfsGuided( Aig_Man_t * p, Vec_Ptr_t * vPios )
     Aig_ManConst1(pNew)->pHaig = Aig_ManConst1(p)->pHaig;
     Vec_PtrForEachEntry( Aig_Obj_t *, vPios, pObj, i )
     {
-        if ( Aig_ObjIsPi(pObj) )
+        if ( Aig_ObjIsCi(pObj) )
         {
             pObjNew = Aig_ObjCreateCi( pNew );
             pObjNew->Level = pObj->Level;
             Aig_Regular(pObjNew)->pHaig = pObj->pHaig;
             pObj->pData = pObjNew;
         }
-        else if ( Aig_ObjIsPo(pObj) )
+        else if ( Aig_ObjIsCo(pObj) )
         {
             Aig_ManDupDfsGuided_rec( pNew, p, Aig_ObjFanin0(pObj) );        
 //            assert( pObj->Level == ((Aig_Obj_t*)pObj->pData)->Level );
@@ -991,12 +991,12 @@ Aig_Man_t * Aig_ManDupRepres( Aig_Man_t * p )
     {
         if ( Aig_ObjIsNode(pObj) )
             pObj->pData = Aig_And( pNew, Aig_ObjChild0Repres(p, pObj), Aig_ObjChild1Repres(p, pObj) );
-        else if ( Aig_ObjIsPi(pObj) )
+        else if ( Aig_ObjIsCi(pObj) )
         {
             pObj->pData = Aig_ObjCreateCi(pNew);
             pObj->pData = Aig_ObjGetRepres( p, pObj );
         }
-        else if ( Aig_ObjIsPo(pObj) )
+        else if ( Aig_ObjIsCo(pObj) )
             pObj->pData = Aig_ObjCreateCo( pNew, Aig_ObjChild0Repres(p, pObj) );
         else if ( Aig_ObjIsConst1(pObj) )
             pObj->pData = Aig_ManConst1(pNew);
@@ -1065,9 +1065,9 @@ Aig_Man_t * Aig_ManDupRepresDfs( Aig_Man_t * p )
     {
         if ( Aig_ObjIsNode(pObj) )
             continue;
-        if ( Aig_ObjIsPi(pObj) )
+        if ( Aig_ObjIsCi(pObj) )
             pObj->pData = Aig_ObjCreateCi(pNew);
-        else if ( Aig_ObjIsPo(pObj) )
+        else if ( Aig_ObjIsCo(pObj) )
         {
             Aig_ManDupRepres_rec( pNew, p, Aig_ObjFanin0(pObj) );
             pObj->pData = Aig_ObjCreateCo( pNew, Aig_ObjChild0Repres(p, pObj) );
@@ -1107,9 +1107,9 @@ Aig_Man_t * Aig_ManCreateMiter( Aig_Man_t * p1, Aig_Man_t * p2, int Oper )
     int i;
     assert( Aig_ManRegNum(p1) == 0 );
     assert( Aig_ManRegNum(p2) == 0 );
-    assert( Aig_ManPoNum(p1) == 1 );
-    assert( Aig_ManPoNum(p2) == 1 );
-    assert( Aig_ManPiNum(p1) == Aig_ManPiNum(p2) );
+    assert( Aig_ManCoNum(p1) == 1 );
+    assert( Aig_ManCoNum(p2) == 1 );
+    assert( Aig_ManCiNum(p1) == Aig_ManCiNum(p2) );
     pNew = Aig_ManStart( Aig_ManObjNumMax(p1) + Aig_ManObjNumMax(p2) );
     // add first AIG
     Aig_ManConst1(p1)->pData = Aig_ManConst1(pNew);
@@ -1120,18 +1120,18 @@ Aig_Man_t * Aig_ManCreateMiter( Aig_Man_t * p1, Aig_Man_t * p2, int Oper )
     // add second AIG
     Aig_ManConst1(p2)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p2, pObj, i )
-        pObj->pData = Aig_ManPi( pNew, i );
+        pObj->pData = Aig_ManCi( pNew, i );
     Aig_ManForEachNode( p2, pObj, i )
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // add the output
     if ( Oper == 0 ) // XOR
-        pObj = Aig_Exor( pNew, Aig_ObjChild0Copy(Aig_ManPo(p1,0)), Aig_ObjChild0Copy(Aig_ManPo(p2,0)) );
+        pObj = Aig_Exor( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_ObjChild0Copy(Aig_ManCo(p2,0)) );
     else if ( Oper == 1 ) // implication is PO(p1) -> PO(p2)  ...  complement is PO(p1) & !PO(p2) 
-        pObj = Aig_And( pNew, Aig_ObjChild0Copy(Aig_ManPo(p1,0)), Aig_Not(Aig_ObjChild0Copy(Aig_ManPo(p2,0))) );
+        pObj = Aig_And( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_Not(Aig_ObjChild0Copy(Aig_ManCo(p2,0))) );
     else if ( Oper == 2 ) // OR
-        pObj = Aig_Or( pNew, Aig_ObjChild0Copy(Aig_ManPo(p1,0)), Aig_ObjChild0Copy(Aig_ManPo(p2,0)) );
+        pObj = Aig_Or( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_ObjChild0Copy(Aig_ManCo(p2,0)) );
     else if ( Oper == 3 ) // AND
-        pObj = Aig_And( pNew, Aig_ObjChild0Copy(Aig_ManPo(p1,0)), Aig_ObjChild0Copy(Aig_ManPo(p2,0)) );
+        pObj = Aig_And( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_ObjChild0Copy(Aig_ManCo(p2,0)) );
     else
         assert( 0 );
     Aig_ObjCreateCo( pNew, pObj );
@@ -1209,7 +1209,7 @@ Aig_Man_t * Aig_ManDupOneOutput( Aig_Man_t * p, int iPoNum, int fAddRegs )
     Aig_Obj_t * pObj;
     int i;
     assert( Aig_ManRegNum(p) > 0 );
-    assert( iPoNum < Aig_ManPoNum(p)-Aig_ManRegNum(p) );
+    assert( iPoNum < Aig_ManCoNum(p)-Aig_ManRegNum(p) );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
@@ -1227,7 +1227,7 @@ Aig_Man_t * Aig_ManDupOneOutput( Aig_Man_t * p, int iPoNum, int fAddRegs )
     Aig_ManForEachNode( p, pObj, i )
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // create the PO
-    pObj = Aig_ManPo( p, iPoNum );
+    pObj = Aig_ManCo( p, iPoNum );
     Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     // create register inputs with MUXes
     if ( fAddRegs )
@@ -1317,7 +1317,7 @@ Aig_Man_t * Aig_ManDupArray( Vec_Ptr_t * vArray )
     Vec_PtrForEachEntry( Aig_Man_t *, vArray, pNew, k )
     {
         assert( Aig_ManRegNum(pNew) == 0 );
-        assert( Aig_ManPiNum(pNew) == Aig_ManPiNum(p) );
+        assert( Aig_ManCiNum(pNew) == Aig_ManCiNum(p) );
     }
     // create the new manager
     pNew = Aig_ManStart( 10000 );
@@ -1329,7 +1329,7 @@ Aig_Man_t * Aig_ManDupArray( Vec_Ptr_t * vArray )
     {
         Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
         Aig_ManForEachCi( p, pObj, i )
-            pObj->pData = Aig_ManPi( pNew, i );
+            pObj->pData = Aig_ManCi( pNew, i );
         Aig_ManForEachNode( p, pObj, i )
             pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
         Aig_ManForEachCo( p, pObj, i )
@@ -1367,7 +1367,7 @@ Aig_Man_t * Aig_ManDupNodes( Aig_Man_t * pMan, Vec_Ptr_t * vArray )
     pNew->pName = Abc_UtilStrsav( pMan->pName );
     Aig_ManConst1(pMan)->pData = Aig_ManConst1(pNew);
     Vec_PtrForEachEntry( Aig_Obj_t *, vObjs, pObj, i )
-        if ( Aig_ObjIsPi(pObj) )
+        if ( Aig_ObjIsCi(pObj) )
             pObj->pData = Aig_ObjCreateCi(pNew);
     Vec_PtrForEachEntry( Aig_Obj_t *, vObjs, pObj, i )
         if ( Aig_ObjIsNode(pObj) )
diff --git a/src/aig/aig/aigFact.c b/src/aig/aig/aigFact.c
index 40885365..33e07161 100644
--- a/src/aig/aig/aigFact.c
+++ b/src/aig/aig/aigFact.c
@@ -45,7 +45,7 @@ ABC_NAMESPACE_IMPL_START
 ***********************************************************************/
 void Aig_ManFindImplications_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vImplics )
 {
-    if ( Aig_IsComplement(pObj) || Aig_ObjIsPi(pObj) )
+    if ( Aig_IsComplement(pObj) || Aig_ObjIsCi(pObj) )
     {
         Vec_PtrPushUnique( vImplics, pObj );
         return;
@@ -93,7 +93,7 @@ int Aig_ManFindConeOverlap_rec( Aig_Man_t * p, Aig_Obj_t * pNode )
     if ( Aig_ObjIsTravIdCurrent( p, pNode ) )
         return 0;
     Aig_ObjSetTravIdCurrent( p, pNode );
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return 0;
     if ( Aig_ManFindConeOverlap_rec( p, Aig_ObjFanin0(pNode) ) )
         return 1;
@@ -142,7 +142,7 @@ Aig_Obj_t * Aig_ManDeriveNewCone_rec( Aig_Man_t * p, Aig_Obj_t * pNode )
     if ( Aig_ObjIsTravIdCurrent( p, pNode ) )
         return (Aig_Obj_t *)pNode->pData;
     Aig_ObjSetTravIdCurrent( p, pNode );
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return (Aig_Obj_t *)(pNode->pData = pNode);
     Aig_ManDeriveNewCone_rec( p, Aig_ObjFanin0(pNode) );
     Aig_ManDeriveNewCone_rec( p, Aig_ObjFanin1(pNode) );
@@ -194,7 +194,7 @@ Aig_Obj_t * Aig_ManFactorAlgebraic_int( Aig_Man_t * p, Aig_Obj_t * pPoA, Aig_Obj
     int RetValue;
     if ( Aig_ObjIsConst1(Aig_ObjFanin0(pPoA)) || Aig_ObjIsConst1(Aig_ObjFanin0(pPoB)) )
         return NULL;
-    if ( Aig_ObjIsPi(Aig_ObjFanin0(pPoB)) )
+    if ( Aig_ObjIsCi(Aig_ObjFanin0(pPoB)) )
         return NULL;
     // get the internal node representing function of A under assignment A = 'Value'
     pNodeA = Aig_ObjChild0( pPoA );
@@ -229,10 +229,10 @@ Aig_Obj_t * Aig_ManFactorAlgebraic_int( Aig_Man_t * p, Aig_Obj_t * pPoA, Aig_Obj
 ***********************************************************************/
 Aig_Obj_t * Aig_ManFactorAlgebraic( Aig_Man_t * p, int iPoA, int iPoB, int Value )
 {
-    assert( iPoA >= 0 && iPoA < Aig_ManPoNum(p) );
-    assert( iPoB >= 0 && iPoB < Aig_ManPoNum(p) );
+    assert( iPoA >= 0 && iPoA < Aig_ManCoNum(p) );
+    assert( iPoB >= 0 && iPoB < Aig_ManCoNum(p) );
     assert( Value == 0 || Value == 1 );
-    return Aig_ManFactorAlgebraic_int( p, Aig_ManPo(p, iPoA), Aig_ManPo(p, iPoB), Value ); 
+    return Aig_ManFactorAlgebraic_int( p, Aig_ManCo(p, iPoA), Aig_ManCo(p, iPoB), Value ); 
 }
 
 /**Function*************************************************************
@@ -501,7 +501,7 @@ int Aig_SuppMinHighlightCone_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
     if ( Aig_ObjIsTravIdPrevious( p, pObj ) ) // visited, no marks there
         return 0;
     Aig_ObjSetTravIdPrevious( p, pObj );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return 0;
     RetValue = Aig_SuppMinHighlightCone_rec( p, Aig_ObjFanin0(pObj) ) |
                Aig_SuppMinHighlightCone_rec( p, Aig_ObjFanin1(pObj) );
@@ -552,7 +552,7 @@ int Aig_SuppMinHighlightCone( Aig_Man_t * p, Aig_Obj_t * pRoot, Vec_Ptr_t * vOrG
 void Aig_SuppMinCollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper )
 {
     // if the new node is complemented or a PI, another gate begins
-    if ( Aig_IsComplement(pObj) || Aig_ObjIsPi(pObj) ) // || (Aig_ObjRefs(pObj) > 1) )
+    if ( Aig_IsComplement(pObj) || Aig_ObjIsCi(pObj) ) // || (Aig_ObjRefs(pObj) > 1) )
     {
         Vec_PtrPushUnique( vSuper, Aig_Not(pObj) );
         return;
@@ -577,7 +577,7 @@ Vec_Ptr_t * Aig_SuppMinCollectSuper( Aig_Obj_t * pObj )
 {
     Vec_Ptr_t * vSuper;
     assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPi(pObj) );
+    assert( !Aig_ObjIsCi(pObj) );
     vSuper = Vec_PtrAlloc( 4 );
     Aig_SuppMinCollectSuper_rec( Aig_ObjChild0(pObj), vSuper );
     Aig_SuppMinCollectSuper_rec( Aig_ObjChild1(pObj), vSuper );
@@ -607,7 +607,7 @@ Aig_Obj_t * Aig_ManSupportMinimization( Aig_Man_t * p, Aig_Obj_t * pCond, Aig_Ob
     int RetValue;
     *pStatus = 0;
     // if pCond is not OR
-    if ( !Aig_IsComplement(pCond) || Aig_ObjIsPi(Aig_Regular(pCond)) || Aig_ObjIsConst1(Aig_Regular(pCond)) )
+    if ( !Aig_IsComplement(pCond) || Aig_ObjIsCi(Aig_Regular(pCond)) || Aig_ObjIsConst1(Aig_Regular(pCond)) )
     {
         *pStatus = -1;
         return NULL;
diff --git a/src/aig/aig/aigInter.c b/src/aig/aig/aigInter.c
index 1210a335..fcf32236 100644
--- a/src/aig/aig/aigInter.c
+++ b/src/aig/aig/aigInter.c
@@ -56,20 +56,20 @@ void Aig_ManInterFast( Aig_Man_t * pManOn, Aig_Man_t * pManOff, int fVerbose )
     int Lits[3], status, i;
 //    int clk = clock();
 
-    assert( Aig_ManPiNum(pManOn) == Aig_ManPiNum(pManOff) );
-    assert( Aig_ManPoNum(pManOn) == Aig_ManPoNum(pManOff) );
+    assert( Aig_ManCiNum(pManOn) == Aig_ManCiNum(pManOff) );
+    assert( Aig_ManCoNum(pManOn) == Aig_ManCoNum(pManOff) );
 
     // derive CNFs
-    pManOn->nRegs = Aig_ManPoNum(pManOn);
-    pCnfOn  = Cnf_Derive( pManOn, Aig_ManPoNum(pManOn) );
+    pManOn->nRegs = Aig_ManCoNum(pManOn);
+    pCnfOn  = Cnf_Derive( pManOn, Aig_ManCoNum(pManOn) );
     pManOn->nRegs = 0;
 
-    pManOff->nRegs = Aig_ManPoNum(pManOn);
-    pCnfOff = Cnf_Derive( pManOff, Aig_ManPoNum(pManOff) );
+    pManOff->nRegs = Aig_ManCoNum(pManOn);
+    pCnfOff = Cnf_Derive( pManOff, Aig_ManCoNum(pManOff) );
     pManOff->nRegs = 0;
 
-//    pCnfOn  = Cnf_DeriveSimple( pManOn, Aig_ManPoNum(pManOn) );
-//    pCnfOff = Cnf_DeriveSimple( pManOff, Aig_ManPoNum(pManOn) );
+//    pCnfOn  = Cnf_DeriveSimple( pManOn, Aig_ManCoNum(pManOn) );
+//    pCnfOff = Cnf_DeriveSimple( pManOff, Aig_ManCoNum(pManOn) );
     Cnf_DataLift( pCnfOff, pCnfOn->nVars );
 
     // start the solver
@@ -104,7 +104,7 @@ void Aig_ManInterFast( Aig_Man_t * pManOn, Aig_Man_t * pManOff, int fVerbose )
     // collect the common variables
     Aig_ManForEachCi( pManOn, pObj, i )
     {
-        pObj2 = Aig_ManPi( pManOff, i );
+        pObj2 = Aig_ManCi( pManOff, i );
 
         Lits[0] = toLitCond( pCnfOn->pVarNums[pObj->Id], 0 );
         Lits[1] = toLitCond( pCnfOff->pVarNums[pObj2->Id], 1 );
@@ -121,7 +121,7 @@ void Aig_ManInterFast( Aig_Man_t * pManOn, Aig_Man_t * pManOff, int fVerbose )
     // solve incremental SAT problems
     Aig_ManForEachCo( pManOn, pObj, i )
     {
-        pObj2 = Aig_ManPo( pManOff, i );
+        pObj2 = Aig_ManCo( pManOff, i );
 
         Lits[0] = toLitCond( pCnfOn->pVarNums[pObj->Id], 0 );
         Lits[1] = toLitCond( pCnfOff->pVarNums[pObj2->Id], 0 );
@@ -159,7 +159,7 @@ Aig_Man_t * Aig_ManInter( Aig_Man_t * pManOn, Aig_Man_t * pManOff, int fRelation
     int clk;
     int iLast = -1; // Suppress "might be used uninitialized"
 
-    assert( Aig_ManPiNum(pManOn) == Aig_ManPiNum(pManOff) );
+    assert( Aig_ManCiNum(pManOn) == Aig_ManCiNum(pManOff) );
 
 clk = clock();
     // derive CNFs
@@ -210,14 +210,14 @@ clk = clock();
 
     // add PI clauses
     // collect the common variables
-    vVarsAB = Vec_IntAlloc( Aig_ManPiNum(pManOn) );
+    vVarsAB = Vec_IntAlloc( Aig_ManCiNum(pManOn) );
     if ( fRelation )
         Vec_IntPush( vVarsAB, iLast );
 
     Aig_ManForEachCi( pManOn, pObj, i )
     {
         Vec_IntPush( vVarsAB, pCnfOn->pVarNums[pObj->Id] );
-        pObj2 = Aig_ManPi( pManOff, i );
+        pObj2 = Aig_ManCi( pManOff, i );
 
         Lits[0] = toLitCond( pCnfOn->pVarNums[pObj->Id], 0 );
         Lits[1] = toLitCond( pCnfOff->pVarNums[pObj2->Id], 1 );
diff --git a/src/aig/aig/aigJust.c b/src/aig/aig/aigJust.c
index b15190e6..a6df4a1b 100644
--- a/src/aig/aig/aigJust.c
+++ b/src/aig/aig/aigJust.c
@@ -109,7 +109,7 @@ int Aig_NtkFindSatAssign_rec( Aig_Man_t * pAig, Aig_Obj_t * pNode, int Value, Ve
         return ((int)pNode->fMarkA == Value);
     Aig_ObjSetTravIdCurrent(pAig, pNode);
     pNode->fMarkA = Value;
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
     {
 //        if ( Aig_ObjId(pNode) % 1000 == 0 )
 //            Value ^= 1;
@@ -162,7 +162,7 @@ int Aig_NtkFindSatAssign_rec( Aig_Man_t * pAig, Aig_Obj_t * pNode, int Value, Ve
 int Aig_ObjFindSatAssign( Aig_Man_t * pAig, Aig_Obj_t * pNode, int Value, Vec_Int_t * vSuppLits )
 {
     int i;
-    if ( Aig_ObjIsPo(pNode) )
+    if ( Aig_ObjIsCo(pNode) )
         return Aig_ObjFindSatAssign( pAig, Aig_ObjFanin0(pNode), Value ^ Aig_ObjFaninC0(pNode), vSuppLits );
     for ( i = 0; i < 8; i++ )
     {
@@ -193,10 +193,10 @@ int Aig_ObjTerSimulate_rec( Aig_Man_t * pAig, Aig_Obj_t * pNode )
     if ( Aig_ObjIsTravIdCurrent(pAig, pNode) )
         return Aig_ObjGetTerValue( pNode );
     Aig_ObjSetTravIdCurrent( pAig, pNode );
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return Aig_ObjSetTerValue( pNode, AIG_VALX );
     Value0 = Aig_ObjNotCondTerValue( Aig_ObjTerSimulate_rec(pAig, Aig_ObjFanin0(pNode)), Aig_ObjFaninC0(pNode) );
-    if ( Aig_ObjIsPo(pNode) || Value0 == AIG_VAL0 )
+    if ( Aig_ObjIsCo(pNode) || Value0 == AIG_VAL0 )
         return Aig_ObjSetTerValue( pNode, Value0 );
     assert( Aig_ObjIsNode(pNode) );
     Value1 = Aig_ObjNotCondTerValue( Aig_ObjTerSimulate_rec(pAig, Aig_ObjFanin1(pNode)), Aig_ObjFaninC1(pNode) );
@@ -221,7 +221,7 @@ int Aig_ObjTerSimulate( Aig_Man_t * pAig, Aig_Obj_t * pNode, Vec_Int_t * vSuppLi
     Aig_ManIncrementTravId( pAig );
     Vec_IntForEachEntry( vSuppLits, Entry, i )
     {
-        pObj = Aig_ManPi( pAig, Abc_Lit2Var(Entry) );
+        pObj = Aig_ManCi( pAig, Abc_Lit2Var(Entry) );
         Aig_ObjSetTerValue( pObj, Abc_LitIsCompl(Entry) ? AIG_VAL0 : AIG_VAL1 );
         Aig_ObjSetTravIdCurrent( pAig, pObj );
 //printf( "%d ", Entry );
@@ -292,7 +292,7 @@ void Aig_ManJustExperiment( Aig_Man_t * pAig )
     }
     Vec_IntFree( vSuppLits );
     printf( "PO =%6d. C0 =%6d. C0f =%6d. C1 =%6d. C1f =%6d. (%6.2f %%) Ave =%4.1f ", 
-        Aig_ManPoNum(pAig), Count0, Count0f, Count1, Count1f, 100.0*(Count0+Count1)/Aig_ManPoNum(pAig), 1.0*nTotalLits/(Count0+Count1) );
+        Aig_ManCoNum(pAig), Count0, Count0f, Count1, Count1f, 100.0*(Count0+Count1)/Aig_ManCoNum(pAig), 1.0*nTotalLits/(Count0+Count1) );
     Abc_PrintTime( 1, "T", clock() - clk );
     Aig_ManCleanMarkAB( pAig );
     Aig_ManPackStop( pPack );
diff --git a/src/aig/aig/aigMan.c b/src/aig/aig/aigMan.c
index 46cdb260..ed8cf8e9 100644
--- a/src/aig/aig/aigMan.c
+++ b/src/aig/aig/aigMan.c
@@ -56,8 +56,8 @@ Aig_Man_t * Aig_ManStart( int nNodesMax )
     p->nTravIds = 1;
     p->fCatchExor = 0;
     // allocate arrays for nodes
-    p->vPis  = Vec_PtrAlloc( 100 );
-    p->vPos  = Vec_PtrAlloc( 100 );
+    p->vCis  = Vec_PtrAlloc( 100 );
+    p->vCos  = Vec_PtrAlloc( 100 );
     p->vObjs = Vec_PtrAlloc( 1000 );
     p->vBufs = Vec_PtrAlloc( 100 );
     // prepare the internal memory manager
@@ -198,8 +198,8 @@ void Aig_ManStop( Aig_Man_t * p )
         Aig_ManStop( p->pManExdc );
 //    Aig_TableProfile( p );
     Aig_MmFixedStop( p->pMemObjs, 0 );
-    Vec_PtrFreeP( &p->vPis );
-    Vec_PtrFreeP( &p->vPos );
+    Vec_PtrFreeP( &p->vCis );
+    Vec_PtrFreeP( &p->vCos );
     Vec_PtrFreeP( &p->vObjs );
     Vec_PtrFreeP( &p->vBufs );
     Vec_IntFreeP( &p->vLevelR );
@@ -287,11 +287,11 @@ int Aig_ManCleanup( Aig_Man_t * p )
 int Aig_ManAntiCleanup( Aig_Man_t * p )
 {
     Aig_Obj_t * pNode;
-    int i, nNodesOld = Aig_ManPoNum(p);
+    int i, nNodesOld = Aig_ManCoNum(p);
     Aig_ManForEachObj( p, pNode, i )
         if ( Aig_ObjIsNode(pNode) && Aig_ObjRefs(pNode) == 0 )
             Aig_ObjCreateCo( p, pNode );
-    return nNodesOld - Aig_ManPoNum(p);
+    return nNodesOld - Aig_ManCoNum(p);
 }
 
 /**Function*************************************************************
@@ -305,24 +305,24 @@ int Aig_ManAntiCleanup( Aig_Man_t * p )
   SeeAlso     []
 
 ***********************************************************************/
-int Aig_ManPiCleanup( Aig_Man_t * p )
+int Aig_ManCiCleanup( Aig_Man_t * p )
 {
     Aig_Obj_t * pObj;
-    int i, k = 0, nPisOld = Aig_ManPiNum(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vPis, pObj, i )
+    int i, k = 0, nPisOld = Aig_ManCiNum(p);
+    Vec_PtrForEachEntry( Aig_Obj_t *, p->vCis, pObj, i )
     {
-        if ( i >= Aig_ManPiNum(p) - Aig_ManRegNum(p) )
-            Vec_PtrWriteEntry( p->vPis, k++, pObj );
+        if ( i >= Aig_ManCiNum(p) - Aig_ManRegNum(p) )
+            Vec_PtrWriteEntry( p->vCis, k++, pObj );
         else if ( Aig_ObjRefs(pObj) > 0 )
-            Vec_PtrWriteEntry( p->vPis, k++, pObj );
+            Vec_PtrWriteEntry( p->vCis, k++, pObj );
         else
             Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
     }
-    Vec_PtrShrink( p->vPis, k );
-    p->nObjs[AIG_OBJ_PI] = Vec_PtrSize( p->vPis );
+    Vec_PtrShrink( p->vCis, k );
+    p->nObjs[AIG_OBJ_CI] = Vec_PtrSize( p->vCis );
     if ( Aig_ManRegNum(p) )
-        p->nTruePis = Aig_ManPiNum(p) - Aig_ManRegNum(p);
-    return nPisOld - Aig_ManPiNum(p);
+        p->nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p);
+    return nPisOld - Aig_ManCiNum(p);
 }
 
 /**Function*************************************************************
@@ -336,27 +336,27 @@ int Aig_ManPiCleanup( Aig_Man_t * p )
   SeeAlso     []
 
 ***********************************************************************/
-int Aig_ManPoCleanup( Aig_Man_t * p )
+int Aig_ManCoCleanup( Aig_Man_t * p )
 {
     Aig_Obj_t * pObj;
-    int i, k = 0, nPosOld = Aig_ManPoNum(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vPos, pObj, i )
+    int i, k = 0, nPosOld = Aig_ManCoNum(p);
+    Vec_PtrForEachEntry( Aig_Obj_t *, p->vCos, pObj, i )
     {
-        if ( i >= Aig_ManPoNum(p) - Aig_ManRegNum(p) )
-            Vec_PtrWriteEntry( p->vPos, k++, pObj );
+        if ( i >= Aig_ManCoNum(p) - Aig_ManRegNum(p) )
+            Vec_PtrWriteEntry( p->vCos, k++, pObj );
         else if ( !Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) || !Aig_ObjFaninC0(pObj) ) // non-const or const1
-            Vec_PtrWriteEntry( p->vPos, k++, pObj );
+            Vec_PtrWriteEntry( p->vCos, k++, pObj );
         else
         {
             Aig_ObjDisconnect( p, pObj );
             Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
         }
     }
-    Vec_PtrShrink( p->vPos, k );
-    p->nObjs[AIG_OBJ_PO] = Vec_PtrSize( p->vPos );
+    Vec_PtrShrink( p->vCos, k );
+    p->nObjs[AIG_OBJ_CO] = Vec_PtrSize( p->vCos );
     if ( Aig_ManRegNum(p) )
-        p->nTruePos = Aig_ManPoNum(p) - Aig_ManRegNum(p);
-    return nPosOld - Aig_ManPoNum(p);
+        p->nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p);
+    return nPosOld - Aig_ManCoNum(p);
 }
 
 /**Function*************************************************************
@@ -395,8 +395,8 @@ void Aig_ManPrintStats( Aig_Man_t * p )
 {
     int nChoices = Aig_ManChoiceNum(p);
     printf( "%-15s : ",      p->pName );
-    printf( "pi = %5d  ",    Aig_ManPiNum(p)-Aig_ManRegNum(p) );
-    printf( "po = %5d  ",    Aig_ManPoNum(p)-Aig_ManRegNum(p) );
+    printf( "pi = %5d  ",    Aig_ManCiNum(p)-Aig_ManRegNum(p) );
+    printf( "po = %5d  ",    Aig_ManCoNum(p)-Aig_ManRegNum(p) );
     if ( Aig_ManRegNum(p) )
     printf( "lat = %5d  ", Aig_ManRegNum(p) );
     printf( "and = %7d  ",   Aig_ManAndNum(p) );
@@ -453,8 +453,8 @@ void Aig_ManReportImprovement( Aig_Man_t * p, Aig_Man_t * pNew )
 void Aig_ManSetRegNum( Aig_Man_t * p, int nRegs )
 {
     p->nRegs = nRegs;
-    p->nTruePis = Aig_ManPiNum(p) - nRegs;
-    p->nTruePos = Aig_ManPoNum(p) - nRegs;
+    p->nTruePis = Aig_ManCiNum(p) - nRegs;
+    p->nTruePos = Aig_ManCoNum(p) - nRegs;
     Aig_ManSetPioNumbers( p );
 }
 
@@ -471,7 +471,7 @@ void Aig_ManSetRegNum( Aig_Man_t * p, int nRegs )
 ***********************************************************************/
 void Aig_ManFlipFirstPo( Aig_Man_t * p )
 {
-    Aig_ObjChild0Flip( Aig_ManPo(p, 0) ); 
+    Aig_ObjChild0Flip( Aig_ManCo(p, 0) ); 
 }
 
 /**Function*************************************************************
diff --git a/src/aig/aig/aigMffc.c b/src/aig/aig/aigMffc.c
index ed0015ac..e577124a 100644
--- a/src/aig/aig/aigMffc.c
+++ b/src/aig/aig/aigMffc.c
@@ -49,7 +49,7 @@ int Aig_NodeDeref_rec( Aig_Obj_t * pNode, unsigned LevelMin, float * pPower, flo
     int Counter = 0;
     if ( pProbs )
         *pPower = 0.0;
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return 0;
     // consider the first fanin
     pFanin = Aig_ObjFanin0(pNode);
@@ -87,7 +87,7 @@ int Aig_NodeRef_rec( Aig_Obj_t * pNode, unsigned LevelMin )
 {
     Aig_Obj_t * pFanin;
     int Counter = 0;
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return 0;
     // consider the first fanin
     pFanin = Aig_ObjFanin0(pNode);
@@ -119,7 +119,7 @@ int Aig_NodeRefLabel_rec( Aig_Man_t * p, Aig_Obj_t * pNode, unsigned LevelMin )
 {
     Aig_Obj_t * pFanin;
     int Counter = 0;
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return 0;
     Aig_ObjSetTravIdCurrent( p, pNode );
     // consider the first fanin
@@ -154,7 +154,7 @@ void Aig_NodeMffcSupp_rec( Aig_Man_t * p, Aig_Obj_t * pNode, unsigned LevelMin,
         return;
     Aig_ObjSetTravIdCurrent(p, pNode);
     // add to the new support nodes
-    if ( !fTopmost && pNode != pObjSkip && (Aig_ObjIsPi(pNode) || pNode->nRefs > 0 || pNode->Level <= LevelMin) )
+    if ( !fTopmost && pNode != pObjSkip && (Aig_ObjIsCi(pNode) || pNode->nRefs > 0 || pNode->Level <= LevelMin) )
     {
         if ( vSupp ) Vec_PtrPush( vSupp, pNode );
         return;
@@ -182,7 +182,7 @@ int Aig_NodeMffcSupp( Aig_Man_t * p, Aig_Obj_t * pNode, int LevelMin, Vec_Ptr_t
     if ( vSupp ) Vec_PtrClear( vSupp );
     if ( !Aig_ObjIsNode(pNode) )
     {
-        if ( Aig_ObjIsPi(pNode) && vSupp )
+        if ( Aig_ObjIsCi(pNode) && vSupp )
             Vec_PtrPush( vSupp, pNode );
         return 0;
     }
diff --git a/src/aig/aig/aigObj.c b/src/aig/aig/aigObj.c
index 863188f4..51989d0a 100644
--- a/src/aig/aig/aigObj.c
+++ b/src/aig/aig/aigObj.c
@@ -46,9 +46,9 @@ Aig_Obj_t * Aig_ObjCreateCi( Aig_Man_t * p )
 {
     Aig_Obj_t * pObj;
     pObj = Aig_ManFetchMemory( p );
-    pObj->Type = AIG_OBJ_PI;
-    Vec_PtrPush( p->vPis, pObj );
-    p->nObjs[AIG_OBJ_PI]++;
+    pObj->Type = AIG_OBJ_CI;
+    Vec_PtrPush( p->vCis, pObj );
+    p->nObjs[AIG_OBJ_CI]++;
     if ( p->pManHaig && p->fCreatePios )
     {
         p->pManHaig->nRegs++;
@@ -73,10 +73,10 @@ Aig_Obj_t * Aig_ObjCreateCo( Aig_Man_t * p, Aig_Obj_t * pDriver )
 {
     Aig_Obj_t * pObj;
     pObj = Aig_ManFetchMemory( p );
-    pObj->Type = AIG_OBJ_PO;
-    Vec_PtrPush( p->vPos, pObj );
+    pObj->Type = AIG_OBJ_CO;
+    Vec_PtrPush( p->vCos, pObj );
     Aig_ObjConnect( p, pObj, pDriver, NULL );
-    p->nObjs[AIG_OBJ_PO]++;
+    p->nObjs[AIG_OBJ_CO]++;
     if ( p->pManHaig && p->fCreatePios )
     {
         pObj->pHaig = Aig_ObjCreateCo( p->pManHaig, Aig_ObjHaig( pDriver ) );
@@ -145,7 +145,7 @@ Aig_Obj_t * Aig_ObjCreate( Aig_Man_t * p, Aig_Obj_t * pGhost )
 void Aig_ObjConnect( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFan0, Aig_Obj_t * pFan1 )
 {
     assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPi(pObj) );
+    assert( !Aig_ObjIsCi(pObj) );
     // add the first fanin
     pObj->pFanin0 = pFan0;
     pObj->pFanin1 = pFan1;
@@ -252,9 +252,9 @@ void Aig_ObjDelete_rec( Aig_Man_t * p, Aig_Obj_t * pObj, int fFreeTop )
 {
     Aig_Obj_t * pFanin0, * pFanin1;
     assert( !Aig_IsComplement(pObj) );
-    if ( Aig_ObjIsConst1(pObj) || Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsConst1(pObj) || Aig_ObjIsCi(pObj) )
         return;
-    assert( !Aig_ObjIsPo(pObj) );
+    assert( !Aig_ObjIsCo(pObj) );
     pFanin0 = Aig_ObjFanin0(pObj);
     pFanin1 = Aig_ObjFanin1(pObj);
     Aig_ObjDisconnect( p, pObj );
@@ -279,7 +279,7 @@ void Aig_ObjDelete_rec( Aig_Man_t * p, Aig_Obj_t * pObj, int fFreeTop )
 ***********************************************************************/
 void Aig_ObjDeletePo( Aig_Man_t * p, Aig_Obj_t * pObj )
 {
-    assert( Aig_ObjIsPo(pObj) );
+    assert( Aig_ObjIsCo(pObj) );
     Aig_ObjDeref(Aig_ObjFanin0(pObj));
     pObj->pFanin0 = NULL;
     p->nObjs[pObj->Type]--;
@@ -302,7 +302,7 @@ void Aig_ObjPatchFanin0( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFaninNew
 {
     Aig_Obj_t * pFaninOld;
     assert( !Aig_IsComplement(pObj) );
-    assert( Aig_ObjIsPo(pObj) );
+    assert( Aig_ObjIsCo(pObj) );
     pFaninOld = Aig_ObjFanin0(pObj);
     // decrement ref and remove fanout
     if ( p->pFanData )
@@ -317,7 +317,7 @@ void Aig_ObjPatchFanin0( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFaninNew
         Aig_ObjAddFanout( p, Aig_ObjFanin0(pObj), pObj );
     Aig_ObjRef( Aig_ObjFanin0(pObj) );
     // get rid of old fanin
-    if ( !Aig_ObjIsPi(pFaninOld) && !Aig_ObjIsConst1(pFaninOld) && Aig_ObjRefs(pFaninOld) == 0 )
+    if ( !Aig_ObjIsCi(pFaninOld) && !Aig_ObjIsConst1(pFaninOld) && Aig_ObjRefs(pFaninOld) == 0 )
         Aig_ObjDelete_rec( p, pFaninOld, 1 );
 }
 
@@ -351,9 +351,9 @@ void Aig_ObjPrint( Aig_Man_t * p, Aig_Obj_t * pObj )
     printf( "Node %4d : ", Aig_ObjId(pObj) );
     if ( Aig_ObjIsConst1(pObj) )
         printf( "constant 1" );
-    else if ( Aig_ObjIsPi(pObj) )
+    else if ( Aig_ObjIsCi(pObj) )
         printf( "PI" );
-    else if ( Aig_ObjIsPo(pObj) )
+    else if ( Aig_ObjIsCo(pObj) )
         printf( "PO( %4d%s )", Aig_ObjFanin0(pObj)->Id, (Aig_ObjFaninC0(pObj)? "\'" : " ") );
     else if ( Aig_ObjIsBuf(pObj) )
         printf( "BUF( %d%s )", Aig_ObjFanin0(pObj)->Id, (Aig_ObjFaninC0(pObj)? "\'" : " ") );
@@ -372,7 +372,7 @@ void Aig_ObjPrint( Aig_Man_t * p, Aig_Obj_t * pObj )
         {
             printf( "    " );
             printf( "Node %4d : ", Aig_ObjId(pFanout) );
-            if ( Aig_ObjIsPo(pFanout) )
+            if ( Aig_ObjIsCo(pFanout) )
                 printf( "PO( %4d%s )", Aig_ObjFanin0(pFanout)->Id, (Aig_ObjFaninC0(pFanout)? "\'" : " ") );
             else if ( Aig_ObjIsBuf(pFanout) )
                 printf( "BUF( %d%s )", Aig_ObjFanin0(pFanout)->Id, (Aig_ObjFaninC0(pFanout)? "\'" : " ") );
@@ -422,7 +422,7 @@ void Aig_NodeFixBufferFanins( Aig_Man_t * p, Aig_Obj_t * pObj, int fUpdateLevel
 {
     Aig_Obj_t * pFanReal0, * pFanReal1, * pResult;
     p->nBufFixes++;
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         assert( Aig_ObjIsBuf(Aig_ObjFanin0(pObj)) );
         pFanReal0 = Aig_ObjReal_rec( Aig_ObjChild0(pObj) );
@@ -498,9 +498,9 @@ void Aig_ObjReplace( Aig_Man_t * p, Aig_Obj_t * pObjOld, Aig_Obj_t * pObjNew, in
     // the object to be replaced cannot be complemented
     assert( !Aig_IsComplement(pObjOld) );
     // the object to be replaced cannot be a terminal
-    assert( !Aig_ObjIsPi(pObjOld) && !Aig_ObjIsPo(pObjOld) );
+    assert( !Aig_ObjIsCi(pObjOld) && !Aig_ObjIsCo(pObjOld) );
     // the object to be used cannot be a buffer or a PO
-    assert( !Aig_ObjIsBuf(pObjNewR) && !Aig_ObjIsPo(pObjNewR) );
+    assert( !Aig_ObjIsBuf(pObjNewR) && !Aig_ObjIsCo(pObjNewR) );
     // the object cannot be the same
     assert( pObjOld != pObjNewR );
     // make sure object is not pointing to itself
diff --git a/src/aig/aig/aigOper.c b/src/aig/aig/aigOper.c
index 6dd445af..4fe2cd8c 100644
--- a/src/aig/aig/aigOper.c
+++ b/src/aig/aig/aigOper.c
@@ -63,10 +63,10 @@ static inline int Aig_ObjIsExorType( Aig_Obj_t * p0, Aig_Obj_t * p1, Aig_Obj_t *
 Aig_Obj_t * Aig_IthVar( Aig_Man_t * p, int i )
 {
     int v;
-    for ( v = Aig_ManPiNum(p); v <= i; v++ )
+    for ( v = Aig_ManCiNum(p); v <= i; v++ )
         Aig_ObjCreateCi( p );
-    assert( i < Vec_PtrSize(p->vPis) );
-    return Aig_ManPi( p, i );
+    assert( i < Vec_PtrSize(p->vCis) );
+    return Aig_ManCi( p, i );
 }
 
 /**Function*************************************************************
diff --git a/src/aig/aig/aigPack.c b/src/aig/aig/aigPack.c
index 206f2262..3dcd19b1 100644
--- a/src/aig/aig/aigPack.c
+++ b/src/aig/aig/aigPack.c
@@ -68,8 +68,8 @@ Aig_ManPack_t * Aig_ManPackAlloc( Aig_Man_t * pAig )
     p = ABC_CALLOC( Aig_ManPack_t, 1 );
     p->pAig    = pAig;
     p->vSigns  = Vec_WrdStart( Aig_ManObjNumMax(pAig) );
-    p->vPiPats = Vec_WrdStart( Aig_ManPiNum(pAig) );
-    p->vPiCare = Vec_WrdStart( Aig_ManPiNum(pAig) );
+    p->vPiPats = Vec_WrdStart( Aig_ManCiNum(pAig) );
+    p->vPiCare = Vec_WrdStart( Aig_ManCiNum(pAig) );
     p->iPatCur = 1;
     return p;
 }
@@ -137,7 +137,7 @@ void Aig_ManPackFree( Aig_ManPack_t * p )
     printf( "Patterns: " );
     printf( "Total = %6d. ",   p->nPatTotal );
     printf( "Skipped = %6d. ", p->nPatSkip );
-    printf( "Cares = %6.2f %%  ", 100.0*Aig_ManPackCountCares(p)/Aig_ManPiNum(p->pAig)/64 );
+    printf( "Cares = %6.2f %%  ", 100.0*Aig_ManPackCountCares(p)/Aig_ManCiNum(p->pAig)/64 );
     printf( "\n" );
     Vec_WrdFree( p->vSigns );
     Vec_WrdFree( p->vPiPats );
diff --git a/src/aig/aig/aigPart.c b/src/aig/aig/aigPart.c
index 2c82264a..587596b5 100644
--- a/src/aig/aig/aigPart.c
+++ b/src/aig/aig/aigPart.c
@@ -286,7 +286,7 @@ Vec_Ptr_t * Aig_ManSupports( Aig_Man_t * pMan )
     // start the support computation manager
     p = Part_ManStart( 1 << 20, 1 << 6 );
     // consider objects in the topological order
-    vSupports = Vec_PtrAlloc( Aig_ManPoNum(pMan) );
+    vSupports = Vec_PtrAlloc( Aig_ManCoNum(pMan) );
     Aig_ManCleanData(pMan);
     Aig_ManForEachObj( pMan, pObj, i )
     {
@@ -305,7 +305,7 @@ Vec_Ptr_t * Aig_ManSupports( Aig_Man_t * pMan )
                 Counter++;
             continue;
         }
-        if ( Aig_ObjIsPo(pObj) )
+        if ( Aig_ObjIsCo(pObj) )
         {
             pPart0 = (Part_One_t *)Aig_ObjFanin0(pObj)->pData;
             vSupp = Part_ManTransferEntry(pPart0);
@@ -316,7 +316,7 @@ Vec_Ptr_t * Aig_ManSupports( Aig_Man_t * pMan )
                 Part_ManRecycleEntry( p, pPart0 );
             continue;
         }
-        if ( Aig_ObjIsPi(pObj) )
+        if ( Aig_ObjIsCi(pObj) )
         {
             if ( pObj->nRefs )
             {
@@ -390,8 +390,8 @@ Vec_Ptr_t * Aig_ManSupportsInverse( Aig_Man_t * p )
     // get structural supports for each output
     vSupps = Aig_ManSupports( p );
     // start the inverse supports
-    vSuppsInv = Vec_PtrAlloc( Aig_ManPiNum(p) );
-    for ( i = 0; i < Aig_ManPiNum(p); i++ )
+    vSuppsInv = Vec_PtrAlloc( Aig_ManCiNum(p) );
+    for ( i = 0; i < Aig_ManCiNum(p); i++ )
         Vec_PtrPush( vSuppsInv, Vec_IntAlloc(8) );
     // transforms the supports into the inverse supports
     Vec_PtrForEachEntry( Vec_Int_t *, vSupps, vSupp, i )
@@ -428,7 +428,7 @@ Vec_Ptr_t * Aig_ManSupportsRegisters( Aig_Man_t * p )
     {
         // skip true POs
         iOut = Vec_IntPop( vSupp );
-        iOut -= Aig_ManPoNum(p) - Aig_ManRegNum(p);
+        iOut -= Aig_ManCoNum(p) - Aig_ManRegNum(p);
         if ( iOut < 0 )
         {
             Vec_IntFree( vSupp );
@@ -438,7 +438,7 @@ Vec_Ptr_t * Aig_ManSupportsRegisters( Aig_Man_t * p )
         m = 0;
         Vec_IntForEachEntry( vSupp, iIn, k )
         {
-            iIn -= Aig_ManPiNum(p) - Aig_ManRegNum(p);
+            iIn -= Aig_ManCiNum(p) - Aig_ManRegNum(p);
             if ( iIn < 0 )
                 continue;
             assert( iIn < Aig_ManRegNum(p) );
@@ -596,8 +596,8 @@ void Aig_ManPartitionPrint( Aig_Man_t * p, Vec_Ptr_t * vPartsAll, Vec_Ptr_t * vP
         if ( i == Vec_PtrSize(vPartsAll) - 1 )
             break;
     }
-    assert( Counter == Aig_ManPoNum(p) );
-//    printf( "\nTotal = %d. Outputs = %d.\n", Counter, Aig_ManPoNum(p) );
+    assert( Counter == Aig_ManCoNum(p) );
+//    printf( "\nTotal = %d. Outputs = %d.\n", Counter, Aig_ManCoNum(p) );
 }
 
 /**Function*************************************************************
@@ -721,7 +721,7 @@ clk = clock();
             Vec_PtrPush( vPartsAll, vPart );
             Vec_PtrPush( vPartSuppsAll, vPartSupp );
 
-            Vec_PtrPush( vPartSuppsBit, Aig_ManSuppCharStart(vOne, Aig_ManPiNum(p)) );
+            Vec_PtrPush( vPartSuppsBit, Aig_ManSuppCharStart(vOne, Aig_ManCiNum(p)) );
         }
         else
         {
@@ -735,7 +735,7 @@ clk = clock();
             // reinsert new support
             Vec_PtrWriteEntry( vPartSuppsAll, iPart, vPartSupp );
 
-            Aig_ManSuppCharAdd( (unsigned *)Vec_PtrEntry(vPartSuppsBit, iPart), vOne, Aig_ManPiNum(p) );
+            Aig_ManSuppCharAdd( (unsigned *)Vec_PtrEntry(vPartSuppsBit, iPart), vOne, Aig_ManCiNum(p) );
         }
     }
 
@@ -788,7 +788,7 @@ if ( fVerbose )
     {
         vPartPtr = Vec_PtrAlloc( Vec_IntSize(vPart) );
         Vec_IntForEachEntry( vPart, iOut, i )
-            Vec_PtrPush( vPartPtr, Aig_ManPo(p, iOut) );
+            Vec_PtrPush( vPartPtr, Aig_ManCo(p, iOut) );
         Vec_IntFree( vPart );
         Vec_PtrWriteEntry( vPartsAll, iPart, vPartPtr );
     }
@@ -917,7 +917,7 @@ if ( fVerbose )
     {
         vPartPtr = Vec_PtrAlloc( Vec_IntSize(vPart) );
         Vec_IntForEachEntry( vPart, iOut, i )
-            Vec_PtrPush( vPartPtr, Aig_ManPo(p, iOut) );
+            Vec_PtrPush( vPartPtr, Aig_ManCo(p, iOut) );
         Vec_IntFree( vPart );
         Vec_PtrWriteEntry( vPartsAll, iPart, vPartPtr );
     }
@@ -941,7 +941,7 @@ Vec_Ptr_t * Aig_ManPartitionNaive( Aig_Man_t * p, int nPartSize )
     Vec_Ptr_t * vParts;
     Aig_Obj_t * pObj;
     int nParts, i;
-    nParts = (Aig_ManPoNum(p) / nPartSize) + ((Aig_ManPoNum(p) % nPartSize) > 0);
+    nParts = (Aig_ManCoNum(p) / nPartSize) + ((Aig_ManCoNum(p) % nPartSize) > 0);
     vParts = (Vec_Ptr_t *)Vec_VecStart( nParts );
     Aig_ManForEachCo( p, pObj, i )
         Vec_IntPush( (Vec_Int_t *)Vec_PtrEntry(vParts, i / nPartSize), i );
@@ -967,9 +967,9 @@ Aig_Obj_t * Aig_ManDupPart_rec( Aig_Man_t * pNew, Aig_Man_t * pOld, Aig_Obj_t *
     if ( Aig_ObjIsTravIdCurrent(pOld, pObj) )
         return (Aig_Obj_t *)pObj->pData;
     Aig_ObjSetTravIdCurrent(pOld, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
-        assert( Vec_IntSize(vSuppMap) == Aig_ManPiNum(pNew) );
+        assert( Vec_IntSize(vSuppMap) == Aig_ManCiNum(pNew) );
         Vec_IntPush( vSuppMap, (int)(long)pObj->pNext );
         return (Aig_Obj_t *)(pObj->pData = Aig_ObjCreateCi(pNew));
     }
@@ -1003,8 +1003,8 @@ Vec_Ptr_t * Aig_ManDupPart( Aig_Man_t * pNew, Aig_Man_t * pOld, Vec_Int_t * vPar
     {
         Vec_IntForEachEntry( vSuppMap, Entry, i )
         {
-            pObj = Aig_ManPi( pOld, Entry );
-            pObj->pData = Aig_ManPi( pNew, i );
+            pObj = Aig_ManCi( pOld, Entry );
+            pObj->pData = Aig_ManCi( pNew, i );
             Aig_ObjSetTravIdCurrent( pOld, pObj );
         }
     }
@@ -1012,8 +1012,8 @@ Vec_Ptr_t * Aig_ManDupPart( Aig_Man_t * pNew, Aig_Man_t * pOld, Vec_Int_t * vPar
     {
         Vec_IntForEachEntry( vSuppMap, Entry, i )
         {
-            pObj = Aig_ManPi( pOld, i );
-            pObj->pData = Aig_ManPi( pNew, Entry );
+            pObj = Aig_ManCi( pOld, i );
+            pObj->pData = Aig_ManCi( pNew, Entry );
             Aig_ObjSetTravIdCurrent( pOld, pObj );
         }
         vSuppMap = NULL; // should not be useful
@@ -1024,7 +1024,7 @@ Vec_Ptr_t * Aig_ManDupPart( Aig_Man_t * pNew, Aig_Man_t * pOld, Vec_Int_t * vPar
     {
         Vec_IntForEachEntry( vPart, Entry, i )
         {
-            pObj = Aig_ManPo( pOld, Entry );
+            pObj = Aig_ManCo( pOld, Entry );
             Aig_ManDupPart_rec( pNew, pOld, Aig_ObjFanin0(pObj), vSuppMap );
             Vec_PtrPush( vOutsTotal, Aig_ObjChild0Copy(pObj) );
         }
@@ -1033,7 +1033,7 @@ Vec_Ptr_t * Aig_ManDupPart( Aig_Man_t * pNew, Aig_Man_t * pOld, Vec_Int_t * vPar
     {
         Aig_ManForEachObj( pOld, pObj, i )
         {
-            if ( Aig_ObjIsPo(pObj) )
+            if ( Aig_ObjIsCo(pObj) )
             {
                 Aig_ManDupPart_rec( pNew, pOld, Aig_ObjFanin0(pObj), vSuppMap );
                 Vec_PtrPush( vOutsTotal, Aig_ObjChild0Copy(pObj) );
@@ -1064,9 +1064,9 @@ void Aig_ManDupPartAll_rec( Aig_Man_t * pNew, Aig_Man_t * pOld, Aig_Obj_t * pObj
     if ( Aig_ObjIsTravIdCurrent(pOld, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(pOld, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         pObjNew = Aig_ObjCreateCi(pNew);
-    else if ( Aig_ObjIsPo(pObj) )
+    else if ( Aig_ObjIsCo(pObj) )
     {
         Aig_ManDupPartAll_rec( pNew, pOld, Aig_ObjFanin0(pObj) );
         pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
@@ -1109,7 +1109,7 @@ Aig_Man_t * Aig_ManDupPartAll( Aig_Man_t * pOld, Vec_Int_t * vPart )
     // map all other nodes
     Vec_IntForEachEntry( vPart, Entry, i )
     {
-        pObj = Aig_ManPo( pOld, Entry );
+        pObj = Aig_ManCo( pOld, Entry );
         Aig_ManDupPartAll_rec( pNew, pOld, pObj );
     }
     return pNew;
@@ -1131,7 +1131,7 @@ void Aig_ManSupportNodes_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t * vSupp
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Vec_IntPush( vSupport, Aig_ObjPioNum(pObj) );
         return;
@@ -1164,7 +1164,7 @@ Vec_Ptr_t * Aig_ManSupportNodes( Aig_Man_t * p, Vec_Ptr_t * vParts )
         Aig_ManIncrementTravId( p );
         Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
         Vec_IntForEachEntry( vPart, iOut, k )
-            Aig_ManSupportNodes_rec( p, Aig_ObjFanin0(Aig_ManPo(p, iOut)), vSupport );
+            Aig_ManSupportNodes_rec( p, Aig_ObjFanin0(Aig_ManCo(p, iOut)), vSupport );
 //        Vec_IntSort( vSupport, 0 );
         Vec_PtrPush( vPartSupps, vSupport );
     }
@@ -1270,7 +1270,7 @@ Aig_Man_t * Aig_ManChoicePartitioned( Vec_Ptr_t * vAigs, int nPartSize, int nCon
     // start the total fraiged AIG
     pAigTotal = Aig_ManStartFrom( pAig );
     Aig_ManReprStart( pAigTotal, nIdMax );
-    vOutsTotal = Vec_PtrStart( Aig_ManPoNum(pAig) );
+    vOutsTotal = Vec_PtrStart( Aig_ManCoNum(pAig) );
 
     // set the PI numbers
     Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig, i )
@@ -1313,7 +1313,7 @@ Aig_Man_t * Aig_ManChoicePartitioned( Vec_Ptr_t * vAigs, int nPartSize, int nCon
         // report the process
         if ( fVerbose )
         printf( "Part %4d  (out of %4d)  PI = %5d. PO = %5d. And = %6d. Lev = %4d.\r", 
-            i+1, Vec_PtrSize(vParts), Aig_ManPiNum(pAigPart), Aig_ManPoNum(pAigPart), 
+            i+1, Vec_PtrSize(vParts), Aig_ManCiNum(pAigPart), Aig_ManCoNum(pAigPart), 
             Aig_ManNodeNum(pAigPart), Aig_ManLevelNum(pAigPart) );
         // compute equivalence classes (to be stored in pNew->pReprs)
         pAig = Fra_FraigChoice( pAigPart, nConfMax, nLevelMax );
@@ -1406,7 +1406,7 @@ Aig_Man_t * Aig_ManFraigPartitioned( Aig_Man_t * pAig, int nPartSize, int nConfM
         // report the process
         if ( fVerbose )
         printf( "Part %4d  (out of %4d)  PI = %5d. PO = %5d. And = %6d. Lev = %4d.\r", 
-            i+1, Vec_PtrSize(vParts), Aig_ManPiNum(pAigPart), Aig_ManPoNum(pAigPart), 
+            i+1, Vec_PtrSize(vParts), Aig_ManCiNum(pAigPart), Aig_ManCoNum(pAigPart), 
             Aig_ManNodeNum(pAigPart), Aig_ManLevelNum(pAigPart) );
         // compute equivalence classes (to be stored in pNew->pReprs)
         pAigTemp = Fra_FraigChoice( pAigPart, nConfMax, nLevelMax );
@@ -1477,10 +1477,10 @@ void Aig_ManChoiceConstructiveOne( Aig_Man_t * pNew, Aig_Man_t * pPrev, Aig_Man_
 {
     Aig_Obj_t * pObj, * pObjNew;
     int i;
-    assert( Aig_ManPiNum(pNew) == Aig_ManPiNum(pPrev) );
-    assert( Aig_ManPiNum(pNew) == Aig_ManPiNum(pThis) );
-    assert( Aig_ManPoNum(pNew) == Aig_ManPoNum(pPrev) );
-    assert( Aig_ManPoNum(pNew) == Aig_ManPoNum(pThis) );
+    assert( Aig_ManCiNum(pNew) == Aig_ManCiNum(pPrev) );
+    assert( Aig_ManCiNum(pNew) == Aig_ManCiNum(pThis) );
+    assert( Aig_ManCoNum(pNew) == Aig_ManCoNum(pPrev) );
+    assert( Aig_ManCoNum(pNew) == Aig_ManCoNum(pThis) );
     // make sure the nodes of pPrev point to pNew
     Aig_ManForEachObj( pNew, pObj, i )
         pObj->fMarkB = 1;
@@ -1499,9 +1499,9 @@ void Aig_ManChoiceConstructiveOne( Aig_Man_t * pNew, Aig_Man_t * pPrev, Aig_Man_
     pObj = Aig_ManConst1(pThis);
     pObj->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( pThis, pObj, i )
-        pObj->pData = Aig_ManPi(pNew, i);
+        pObj->pData = Aig_ManCi(pNew, i);
     Aig_ManForEachCo( pThis, pObj, i )
-        pObj->pData = Aig_ManPo(pNew, i);
+        pObj->pData = Aig_ManCo(pNew, i);
     // go through the nodes in the topological order
     Aig_ManForEachNode( pThis, pObj, i )
     {
@@ -1514,7 +1514,7 @@ void Aig_ManChoiceConstructiveOne( Aig_Man_t * pNew, Aig_Man_t * pPrev, Aig_Man_
     // set the inputs of POs as equivalent
     Aig_ManForEachCo( pThis, pObj, i )
     {
-        pObjNew = Aig_ObjFanin0( Aig_ManPo(pNew,i) );
+        pObjNew = Aig_ObjFanin0( Aig_ManCo(pNew,i) );
         // pObjNew and Aig_ObjFanin0(pObj)->pData are equivalent
         Aig_ObjSetRepr_( pNew, pObjNew, Aig_Regular((Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData) );
     }
diff --git a/src/aig/aig/aigPartReg.c b/src/aig/aig/aigPartReg.c
index ca2e9602..b5064900 100644
--- a/src/aig/aig/aigPartReg.c
+++ b/src/aig/aig/aigPartReg.c
@@ -255,13 +255,13 @@ Vec_Ptr_t * Aig_ManRegProjectOnehots( Aig_Man_t * pAig, Aig_Man_t * pPart, Vec_P
     Aig_ManForEachCi( pPart, pObj, i )
         pObj->iData = i;
     // go through each group and check if registers are involved in this one
-    nOffset = Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig);
+    nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
     Vec_PtrForEachEntry( Vec_Int_t *, vOnehots, vGroup, i )
     {
         vGroupNew = NULL;
         Vec_IntForEachEntry( vGroup, iReg, k )
         {
-            pObj = Aig_ManPi( pAig, nOffset+iReg );
+            pObj = Aig_ManCi( pAig, nOffset+iReg );
             if ( !Aig_ObjIsTravIdCurrent(pAig, pObj) )
                 continue;
             if ( vGroupNew == NULL )
@@ -316,20 +316,20 @@ Aig_Man_t * Aig_ManRegCreatePart( Aig_Man_t * pAig, Vec_Int_t * vPart, int * pnC
     int * pMapBack;
     // collect roots
     vRoots = Vec_PtrAlloc( Vec_IntSize(vPart) );
-    nOffset = Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig);
+    nOffset = Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig);
     Vec_IntForEachEntry( vPart, iOut, i )
     {
-        pObj = Aig_ManPo(pAig, nOffset+iOut);
+        pObj = Aig_ManCo(pAig, nOffset+iOut);
         Vec_PtrPush( vRoots, Aig_ObjFanin0(pObj) );
     }
     // collect/mark nodes/PIs in the DFS order
     vNodes = Aig_ManDfsNodes( pAig, (Aig_Obj_t **)Vec_PtrArray(vRoots), Vec_PtrSize(vRoots) );
     Vec_PtrFree( vRoots );
     // unmark register outputs
-    nOffset = Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig);
+    nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
     Vec_IntForEachEntry( vPart, iOut, i )
     {
-        pObj = Aig_ManPi(pAig, nOffset+iOut);
+        pObj = Aig_ManCi(pAig, nOffset+iOut);
         Aig_ObjSetTravIdPrevious( pAig, pObj );
     }
     // count pure PIs
@@ -352,10 +352,10 @@ Aig_Man_t * Aig_ManRegCreatePart( Aig_Man_t * pAig, Vec_Int_t * vPart, int * pnC
             pObj->pData = Aig_ObjCreateCi(pNew);
     // add variables for the register outputs
     // create fake POs to hold the register outputs
-    nOffset = Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig);
+    nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
     Vec_IntForEachEntry( vPart, iOut, i )
     {
-        pObj = Aig_ManPi(pAig, nOffset+iOut);
+        pObj = Aig_ManCi(pAig, nOffset+iOut);
         pObj->pData = Aig_ObjCreateCi(pNew);
         Aig_ObjCreateCo( pNew, (Aig_Obj_t *)pObj->pData );
         Aig_ObjSetTravIdCurrent( pAig, pObj ); // added
@@ -365,10 +365,10 @@ Aig_Man_t * Aig_ManRegCreatePart( Aig_Man_t * pAig, Vec_Int_t * vPart, int * pnC
         if ( Aig_ObjIsNode(pObj) )
             pObj->pData = Aig_And(pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // add real POs for the registers
-    nOffset = Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig);
+    nOffset = Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig);
     Vec_IntForEachEntry( vPart, iOut, i )
     {
-        pObj = Aig_ManPo( pAig, nOffset+iOut );
+        pObj = Aig_ManCo( pAig, nOffset+iOut );
         Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     }
     pNew->nRegs = Vec_IntSize(vPart);
@@ -386,10 +386,10 @@ Aig_Man_t * Aig_ManRegCreatePart( Aig_Man_t * pAig, Vec_Int_t * vPart, int * pnC
             pMapBack[pObjNew->Id] = pObj->Id;
         }
         // map register outputs
-        nOffset = Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig);
+        nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
         Vec_IntForEachEntry( vPart, iOut, i )
         {
-            pObj = Aig_ManPi(pAig, nOffset+iOut);
+            pObj = Aig_ManCi(pAig, nOffset+iOut);
             pObjNew = (Aig_Obj_t *)pObj->pData;
             pMapBack[pObjNew->Id] = pObj->Id;
         }
@@ -551,12 +551,12 @@ void Aig_ManRegPartitionTraverse_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return;
     Aig_ObjSetTravIdCurrent( p, pObj );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
-        if ( pObj->iData >= Aig_ManPiNum(p) - Aig_ManRegNum(p) )
+        if ( pObj->iData >= Aig_ManCiNum(p) - Aig_ManRegNum(p) )
         {
             Vec_PtrPush( vLos, pObj );
-            printf( "%d ", pObj->iData - (Aig_ManPiNum(p) - Aig_ManRegNum(p)) );
+            printf( "%d ", pObj->iData - (Aig_ManCiNum(p) - Aig_ManRegNum(p)) );
         }
         return;
     }
diff --git a/src/aig/aig/aigPartSat.c b/src/aig/aig/aigPartSat.c
index 701273a3..839a17ee 100644
--- a/src/aig/aig/aigPartSat.c
+++ b/src/aig/aig/aigPartSat.c
@@ -247,7 +247,7 @@ Vec_Ptr_t * Aig_ManPartSplit( Aig_Man_t * p, Vec_Int_t * vNode2Part, Vec_Ptr_t *
     Aig_ManForEachCo( p, pObj, i )
     {
         pDriver = Aig_ObjFanin0(pObj);
-        if ( Aig_ObjIsPi(pDriver) )
+        if ( Aig_ObjIsCi(pDriver) )
         {
             if ( Aig_ObjFaninC0(pObj) )
                 pDriver->fMarkA = 1; // const0 PI
@@ -275,7 +275,7 @@ Vec_Ptr_t * Aig_ManPartSplit( Aig_Man_t * p, Vec_Int_t * vNode2Part, Vec_Ptr_t *
     Aig_ManForEachCo( p, pObj, i )
     {
         pDriver = Aig_ObjFanin0(pObj);
-        if ( Aig_ObjIsPi(pDriver) )
+        if ( Aig_ObjIsCi(pDriver) )
             pDriver->fMarkA = pDriver->fMarkB = 0;
         else
             Vec_VecPush( vPart2Pos, Vec_IntEntry(vNode2Part, Aig_ObjFaninId0(pObj)), pObj );
@@ -330,7 +330,7 @@ void Aig_ManPartSetNodePolarity( Aig_Man_t * p, Aig_Man_t * pPart, Vec_Int_t * v
         pObj->fPhase = (Aig_ObjFanin0(pObj)->fPhase ^ Aig_ObjFaninC0(pObj)) & (Aig_ObjFanin1(pObj)->fPhase ^ Aig_ObjFaninC1(pObj));
     Aig_ManForEachCo( pPart, pObj, i )
     {
-        pObjInit = Aig_ManObj( p, Vec_IntEntry(vPio2Id, Aig_ManPiNum(pPart) + i) );
+        pObjInit = Aig_ManObj( p, Vec_IntEntry(vPio2Id, Aig_ManCiNum(pPart) + i) );
         pObj->fPhase = (Aig_ObjFanin0(pObj)->fPhase ^ Aig_ObjFaninC0(pObj));
         assert( pObj->fPhase == pObjInit->fPhase );
     }
@@ -354,7 +354,7 @@ void Aig_ManDeriveCounterExample( Aig_Man_t * p, Vec_Int_t * vNode2Var, sat_solv
     int i;
     // collect IDs of PI variables
     // (fanoutless PIs have SAT var 0, which is an unused in the SAT solver -> has value 0)
-    vPisIds = Vec_IntAlloc( Aig_ManPiNum(p) );
+    vPisIds = Vec_IntAlloc( Aig_ManCiNum(p) );
     Aig_ManForEachCi( p, pObj, i )
         Vec_IntPush( vPisIds, Vec_IntEntry(vNode2Var, Aig_ObjId(pObj)) );
     // derive the SAT assignment
@@ -383,7 +383,7 @@ int Aig_ManAddNewCnfToSolver( sat_solver * pSat, Aig_Man_t * pAig, Vec_Int_t * v
     int * pBeg, * pEnd;
     int i, Lits[2], iSatVarOld, iNodeIdOld;
     // derive CNF and express it using new SAT variables
-    pCnf = Cnf_Derive( pAig, Aig_ManPoNum(pAig) );
+    pCnf = Cnf_Derive( pAig, Aig_ManCoNum(pAig) );
     Cnf_DataTranformPolarity( pCnf, 1 );
     Cnf_DataLift( pCnf, sat_solver_nvars(pSat) );
     // create new variables in the SAT solver
@@ -419,7 +419,7 @@ int Aig_ManAddNewCnfToSolver( sat_solver * pSat, Aig_Man_t * pAig, Vec_Int_t * v
     // derive the connector clauses
     Aig_ManForEachCo( pAig, pObj, i )
     {
-        iNodeIdOld = Vec_IntEntry( vPioIds, Aig_ManPiNum(pAig) + i );
+        iNodeIdOld = Vec_IntEntry( vPioIds, Aig_ManCiNum(pAig) + i );
         iSatVarOld = Vec_IntEntry( vNode2Var, iNodeIdOld );
         if ( iSatVarOld == 0 ) // iNodeIdOld in the original AIG has no SAT var
         { 
diff --git a/src/aig/aig/aigRepar.c b/src/aig/aig/aigRepar.c
index 2b17cde6..1b017346 100644
--- a/src/aig/aig/aigRepar.c
+++ b/src/aig/aig/aigRepar.c
@@ -131,7 +131,7 @@ void Aig_ManInterTest( Aig_Man_t * pMan, int fVerbose )
     int Lit, Cid, Var, status, i;
     int clk = clock();
     assert( Aig_ManRegNum(pMan) == 0 );
-    assert( Aig_ManPoNum(pMan) == 1 );
+    assert( Aig_ManCoNum(pMan) == 1 );
 
     // derive CNFs
     pCnf = Cnf_Derive( pMan, 1 );
@@ -144,7 +144,7 @@ void Aig_ManInterTest( Aig_Man_t * pMan, int fVerbose )
     {
         if ( pCnf->pVarNums[pObj->Id] < 0 )
             continue;
-        if ( !Aig_ObjIsPi(pObj) && !Aig_ObjIsPo(pObj) )
+        if ( !Aig_ObjIsCi(pObj) && !Aig_ObjIsCo(pObj) )
             var_set_partA( pSat, pCnf->pVarNums[pObj->Id], 1 );
     }
 
@@ -162,7 +162,7 @@ void Aig_ManInterTest( Aig_Man_t * pMan, int fVerbose )
     Cnf_DataLift( pCnf, -pCnf->nVars );
 
     // add PI equality clauses
-    vVars = Vec_IntAlloc( Aig_ManPoNum(pMan)+1 );
+    vVars = Vec_IntAlloc( Aig_ManCoNum(pMan)+1 );
     Aig_ManForEachCi( pMan, pObj, i )
     {
         if ( Aig_ObjRefs(pObj) == 0 )
@@ -173,7 +173,7 @@ void Aig_ManInterTest( Aig_Man_t * pMan, int fVerbose )
     }
 
     // add an XOR clause in the end
-    Var = pCnf->pVarNums[Aig_ManPo(pMan,0)->Id];
+    Var = pCnf->pVarNums[Aig_ManCo(pMan,0)->Id];
     Aig_ManInterAddXor( pSat, Var, pCnf->nVars + Var, 2*pCnf->nVars, 0, 0 );
     Vec_IntPush( vVars, Var );
 
@@ -215,8 +215,8 @@ void Aig_ManAppend( Aig_Man_t * pBase, Aig_Man_t * pNew )
 {
     Aig_Obj_t * pObj;
     int i;
-    assert( Aig_ManPoNum(pNew) == 1 );
-    assert( Aig_ManPiNum(pNew) == Aig_ManPiNum(pBase) );
+    assert( Aig_ManCoNum(pNew) == 1 );
+    assert( Aig_ManCiNum(pNew) == Aig_ManCiNum(pBase) );
     // create the PIs
     Aig_ManCleanData( pNew );
     Aig_ManConst1(pNew)->pData = Aig_ManConst1(pBase);
@@ -226,7 +226,7 @@ void Aig_ManAppend( Aig_Man_t * pBase, Aig_Man_t * pNew )
     Aig_ManForEachNode( pNew, pObj, i )
         pObj->pData = Aig_And( pBase, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // add one PO to base
-    pObj = Aig_ManPo( pNew, 0 );
+    pObj = Aig_ManCo( pNew, 0 );
     Aig_ObjCreateCo( pBase, Aig_ObjChild0Copy(pObj) );
 }
 
@@ -248,7 +248,7 @@ Aig_Man_t * Aig_ManInterRepar( Aig_Man_t * pMan, int fVerbose )
     Vec_Int_t * vVars;
     Cnf_Dat_t * pCnf, * pCnfInter;
     Aig_Obj_t * pObj;
-    int nOuts = Aig_ManPoNum(pMan);
+    int nOuts = Aig_ManCoNum(pMan);
     int ShiftP[2], ShiftCnf[2], ShiftOr[2], ShiftAssume;
     int Cid, Lit, status, i, k, c;
     int clk = clock();
@@ -369,7 +369,7 @@ Aig_Man_t * Aig_ManInterRepar( Aig_Man_t * pMan, int fVerbose )
                 if ( i <= k )
                     Aig_ManInterAddBuffer( pSat, i, pCnf->pVarNums[pObj->Id], 0, c==0 );
             // connect to the outputs
-            pObj = Aig_ManPo(pInter, 0);
+            pObj = Aig_ManCo(pInter, 0);
             Aig_ManInterAddBuffer( pSat, ShiftP[c] + k, pCnf->pVarNums[pObj->Id], 0, c==0 );
             if ( c == 1 )
                 Cnf_DataLift( pCnfInter, -pCnfInter->nVars );
diff --git a/src/aig/aig/aigRepr.c b/src/aig/aig/aigRepr.c
index 5063d559..f43b7edd 100644
--- a/src/aig/aig/aigRepr.c
+++ b/src/aig/aig/aigRepr.c
@@ -401,7 +401,7 @@ int Aig_ObjCheckTfi_rec( Aig_Man_t * p, Aig_Obj_t * pNode, Aig_Obj_t * pOld )
     // check the trivial cases
     if ( pNode == NULL )
         return 0;
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return 0;
 //    if ( pNode->Id < pOld->Id ) // cannot use because of choices of pNode
 //        return 0;
diff --git a/src/aig/aig/aigRet.c b/src/aig/aig/aigRet.c
index d96e209e..58a04fb0 100644
--- a/src/aig/aig/aigRet.c
+++ b/src/aig/aig/aigRet.c
@@ -307,8 +307,8 @@ Rtm_Man_t * Rtm_ManAlloc( Aig_Man_t * p )
     memset( pRtm, 0, sizeof(Rtm_Man_t) );
     // perform initializations
     pRtm->vObjs = Vec_PtrAlloc( Aig_ManObjNum(p) );
-    pRtm->vPis  = Vec_PtrAlloc( Aig_ManPiNum(p) );
-    pRtm->vPos  = Vec_PtrAlloc( Aig_ManPoNum(p) );
+    pRtm->vPis  = Vec_PtrAlloc( Aig_ManCiNum(p) );
+    pRtm->vPos  = Vec_PtrAlloc( Aig_ManCoNum(p) );
     pRtm->pMem  = Aig_MmFlexStart();
     return pRtm;
 }
@@ -742,7 +742,7 @@ Aig_Obj_t * Rtm_ManToAig_rec( Aig_Man_t * pNew, Rtm_Man_t * pRtm, Rtm_Obj_t * pO
         else
         {
             Val = Rtm_ObjGetFirst( pRtm, pEdge );
-            pFanin = Aig_ManPi( pNew, pLatches[2*pObjRtm->Id + k] + pEdge->nLats - 1 );
+            pFanin = Aig_ManCi( pNew, pLatches[2*pObjRtm->Id + k] + pEdge->nLats - 1 );
             pFanin = Aig_NotCond( pFanin, Val == RTM_VAL_ONE );
         }
         pFanin = Aig_NotCond( pFanin, k ? pObjRtm->fCompl1 : pObjRtm->fCompl0 );
@@ -806,7 +806,7 @@ Aig_Man_t * Rtm_ManToAig( Rtm_Man_t * pRtm )
             assert( Val == RTM_VAL_ZERO || Val == RTM_VAL_ONE || Val == RTM_VAL_VOID );
             pObjNew = Aig_NotCond( pObjNew, Val == RTM_VAL_ONE );
             Aig_ObjCreateCo( pNew, pObjNew );
-            pObjNew = Aig_ManPi( pNew, pLatches[2*pObjRtm->Id + k] + m );
+            pObjNew = Aig_ManCi( pNew, pLatches[2*pObjRtm->Id + k] + m );
             pObjNew = Aig_NotCond( pObjNew, Val == RTM_VAL_ONE );
         }
 //        assert( Aig_Regular(pObjNew)->nRefs > 0 );
diff --git a/src/aig/aig/aigRetF.c b/src/aig/aig/aigRetF.c
index 567f6468..05fba120 100644
--- a/src/aig/aig/aigRetF.c
+++ b/src/aig/aig/aigRetF.c
@@ -46,7 +46,7 @@ int Aig_ManRetimeMark_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
 {
     if ( pObj->fMarkB )
         return 1;
-    if ( Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
+    if ( Aig_ObjIsCi(pObj) || Aig_ObjIsConst1(pObj) )
         return 0;
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return pObj->fMarkB;
diff --git a/src/aig/aig/aigScl.c b/src/aig/aig/aigScl.c
index dcae3eb7..26de9244 100644
--- a/src/aig/aig/aigScl.c
+++ b/src/aig/aig/aigScl.c
@@ -65,7 +65,7 @@ Aig_Man_t * Aig_ManRemap( Aig_Man_t * p, Vec_Ptr_t * vMap )
     Aig_ManForEachCi( p, pObj, i )
         pObj->pData = Aig_ObjCreateCi(pNew);
     // implement the mapping
-    nTruePis = Aig_ManPiNum(p)-Aig_ManRegNum(p);
+    nTruePis = Aig_ManCiNum(p)-Aig_ManRegNum(p);
     if ( p->vFlopReprs )
     {
         Aig_ManForEachLoSeq( p, pObj, i )
@@ -83,7 +83,7 @@ Aig_Man_t * Aig_ManRemap( Aig_Man_t * p, Vec_Ptr_t * vMap )
             else
             {
                 assert( !Aig_IsComplement(pObjMapped) );
-                assert( Aig_ObjIsPi(pObjMapped) );
+                assert( Aig_ObjIsCi(pObjMapped) );
                 assert( Aig_ObjPioNum(pObj) != Aig_ObjPioNum(pObjMapped) );
                 Vec_IntPush( pNew->vFlopReprs, Aig_ObjPioNum(pObjMapped) );
             }
@@ -128,12 +128,12 @@ void Aig_ManSeqCleanup_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vNodes
         return;
     Aig_ObjSetTravIdCurrent(p, pObj);
     // collect latch input corresponding to unmarked PI (latch output)
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Vec_PtrPush( vNodes, pObj->pNext );
         return;
     }
-    if ( Aig_ObjIsPo(pObj) || Aig_ObjIsBuf(pObj) )
+    if ( Aig_ObjIsCo(pObj) || Aig_ObjIsBuf(pObj) )
     {
         Aig_ManSeqCleanup_rec( p, Aig_ObjFanin0(pObj), vNodes );
         return;
@@ -178,17 +178,17 @@ int Aig_ManSeqCleanup( Aig_Man_t * p )
     // mark the nodes reachable from these nodes
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         Aig_ManSeqCleanup_rec( p, pObj, vNodes );
-    assert( Vec_PtrSize(vNodes) <= Aig_ManPoNum(p) );
+    assert( Vec_PtrSize(vNodes) <= Aig_ManCoNum(p) );
     // clean latch output pointers
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
         pObjLo->pNext = NULL;
 
     // if some latches are removed, update PIs/POs
-    if ( Vec_PtrSize(vNodes) < Aig_ManPoNum(p) )
+    if ( Vec_PtrSize(vNodes) < Aig_ManCoNum(p) )
     {
         if ( p->vFlopNums )
         {
-            int nTruePos = Aig_ManPoNum(p)-Aig_ManRegNum(p);
+            int nTruePos = Aig_ManCoNum(p)-Aig_ManRegNum(p);
             int iNum, k = 0;
             Aig_ManForEachCo( p, pObj, i )
                 if ( i >= nTruePos && Aig_ObjIsTravIdCurrent(p, pObj) )
@@ -200,7 +200,7 @@ int Aig_ManSeqCleanup( Aig_Man_t * p )
             Vec_IntShrink( p->vFlopNums, k );
         }
         // collect new CIs/COs
-        vCis = Vec_PtrAlloc( Aig_ManPiNum(p) );
+        vCis = Vec_PtrAlloc( Aig_ManCiNum(p) );
         Aig_ManForEachCi( p, pObj, i )
             if ( Aig_ObjIsTravIdCurrent(p, pObj) )
                 Vec_PtrPush( vCis, pObj );
@@ -209,7 +209,7 @@ int Aig_ManSeqCleanup( Aig_Man_t * p )
                 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
 //                Aig_ManRecycleMemory( p, pObj );
             }
-        vCos = Vec_PtrAlloc( Aig_ManPoNum(p) );
+        vCos = Vec_PtrAlloc( Aig_ManCoNum(p) );
         Aig_ManForEachCo( p, pObj, i )
             if ( Aig_ObjIsTravIdCurrent(p, pObj) )
                 Vec_PtrPush( vCos, pObj );
@@ -220,22 +220,22 @@ int Aig_ManSeqCleanup( Aig_Man_t * p )
 //                Aig_ManRecycleMemory( p, pObj );
             }
         // remember the number of true PIs/POs
-        nTruePis = Aig_ManPiNum(p) - Aig_ManRegNum(p);
-        nTruePos = Aig_ManPoNum(p) - Aig_ManRegNum(p);
+        nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p);
+        nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p);
         // set the new number of registers
-        p->nRegs -= Aig_ManPoNum(p) - Vec_PtrSize(vNodes);
+        p->nRegs -= Aig_ManCoNum(p) - Vec_PtrSize(vNodes);
         // create new PIs/POs
         assert( Vec_PtrSize(vCis) == nTruePis + p->nRegs );
         assert( Vec_PtrSize(vCos) == nTruePos + p->nRegs );
-        Vec_PtrFree( p->vPis );    p->vPis = vCis;
-        Vec_PtrFree( p->vPos );    p->vPos = vCos;
-        p->nObjs[AIG_OBJ_PI] = Vec_PtrSize( p->vPis );
-        p->nObjs[AIG_OBJ_PO] = Vec_PtrSize( p->vPos );
+        Vec_PtrFree( p->vCis );    p->vCis = vCis;
+        Vec_PtrFree( p->vCos );    p->vCos = vCos;
+        p->nObjs[AIG_OBJ_CI] = Vec_PtrSize( p->vCis );
+        p->nObjs[AIG_OBJ_CO] = Vec_PtrSize( p->vCos );
                 
     }
     Vec_PtrFree( vNodes );
-    p->nTruePis = Aig_ManPiNum(p) - Aig_ManRegNum(p); 
-    p->nTruePos = Aig_ManPoNum(p) - Aig_ManRegNum(p); 
+    p->nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p); 
+    p->nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p); 
     Aig_ManSetPioNumbers( p );
     // remove dangling nodes
     return Aig_ManCleanup( p );
@@ -277,13 +277,13 @@ int Aig_ManSeqCleanupBasic( Aig_Man_t * p )
     // mark the nodes reachable from these nodes
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         Aig_ManSeqCleanup_rec( p, pObj, vNodes );
-    assert( Vec_PtrSize(vNodes) <= Aig_ManPoNum(p) );
+    assert( Vec_PtrSize(vNodes) <= Aig_ManCoNum(p) );
     // clean latch output pointers
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
         pObjLo->pNext = NULL;
 
     // if some latches are removed, update PIs/POs
-    if ( Vec_PtrSize(vNodes) < Aig_ManPoNum(p) )
+    if ( Vec_PtrSize(vNodes) < Aig_ManCoNum(p) )
     {
         // add constant drivers to the dangling latches
         Aig_ManForEachCo( p, pObj, i )
@@ -396,7 +396,7 @@ Vec_Ptr_t * Aig_ManReduceLachesOnce( Aig_Man_t * p )
     Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pFanin;
     int * pMapping, i;
     // start mapping by adding the true PIs
-    vMap = Vec_PtrAlloc( Aig_ManPiNum(p) );
+    vMap = Vec_PtrAlloc( Aig_ManCiNum(p) );
     Aig_ManForEachPiSeq( p, pObj, i )
         Vec_PtrPush( vMap, pObj );
     // create mapping of fanin nodes into the corresponding latch outputs
@@ -504,14 +504,14 @@ void Aig_ManComputeSccs( Aig_Man_t * p )
     {
         // skip true POs
         iOut = Vec_IntPop( vSupp );
-        iOut -= Aig_ManPoNum(p) - Aig_ManRegNum(p);
+        iOut -= Aig_ManCoNum(p) - Aig_ManRegNum(p);
         if ( iOut < 0 )
             continue;
         // remove PIs
         m = 0;
         Vec_IntForEachEntry( vSupp, iIn, k )
         {
-            iIn -= Aig_ManPiNum(p) - Aig_ManRegNum(p);
+            iIn -= Aig_ManCiNum(p) - Aig_ManRegNum(p);
             if ( iIn < 0 )
                 continue;
             assert( iIn < Aig_ManRegNum(p) );
@@ -623,7 +623,7 @@ Aig_Man_t * Aig_ManSclPart( Aig_Man_t * pAig, int fLatchConst, int fLatchEqual,
             nClasses = Aig_TransferMappedClasses( pAig, pTemp, pMapBack );
             if ( fVerbose )
                 printf( "%3d : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d. It = %3d. Cl = %5d\n",
-                        i, Vec_IntSize(vPart), Aig_ManPiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp), 0, nClasses );
+                        i, Vec_IntSize(vPart), Aig_ManCiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp), 0, nClasses );
             Aig_ManStop( pNew );
         }
         Aig_ManStop( pTemp );
@@ -671,13 +671,13 @@ Aig_Man_t * Aig_ManScl( Aig_Man_t * pAig, int fLatchConst, int fLatchEqual, int
     if ( fLatchEqual && pAig->nRegs )
         pAig = Aig_ManReduceLaches( pAig, fVerbose );
     // translate pairs into reprs
-    nTruePis = Aig_ManPiNum(pAigInit)-Aig_ManRegNum(pAigInit);
+    nTruePis = Aig_ManCiNum(pAigInit)-Aig_ManRegNum(pAigInit);
     Aig_ManReprStart( pAigInit, Aig_ManObjNumMax(pAigInit) );
     Vec_IntForEachEntry( pAig->vFlopReprs, Entry1, i )
     {
         Entry2 = Vec_IntEntry( pAig->vFlopReprs, ++i ); 
-        pFlop1 = Aig_ManPi( pAigInit, nTruePis + Entry1 );
-        pFlop2 = (Entry2 == -1)? Aig_ManConst1(pAigInit) : Aig_ManPi( pAigInit, nTruePis + Entry2 );
+        pFlop1 = Aig_ManCi( pAigInit, nTruePis + Entry1 );
+        pFlop2 = (Entry2 == -1)? Aig_ManConst1(pAigInit) : Aig_ManCi( pAigInit, nTruePis + Entry2 );
         assert( pFlop1 != pFlop2 );
         if ( pFlop1->Id > pFlop2->Id )
             pAigInit->pReprs[pFlop1->Id] = pFlop2;
diff --git a/src/aig/aig/aigShow.c b/src/aig/aig/aigShow.c
index 14a67806..b14032d3 100644
--- a/src/aig/aig/aigShow.c
+++ b/src/aig/aig/aigShow.c
@@ -256,7 +256,7 @@ void Aig_WriteDotAig( Aig_Man_t * pMan, char * pFileName, int fHaig, Vec_Ptr_t *
     // generate edges
     Aig_ManForEachObj( pMan, pNode, i )
     {
-        if ( !Aig_ObjIsNode(pNode) && !Aig_ObjIsPo(pNode) && !Aig_ObjIsBuf(pNode) )
+        if ( !Aig_ObjIsNode(pNode) && !Aig_ObjIsCo(pNode) && !Aig_ObjIsBuf(pNode) )
             continue;
         // generate the edge from this node to the next
         fprintf( pFile, "Node%d",  pNode->Id );
diff --git a/src/aig/aig/aigSplit.c b/src/aig/aig/aigSplit.c
index 3e4e8ed4..f187860f 100644
--- a/src/aig/aig/aigSplit.c
+++ b/src/aig/aig/aigSplit.c
@@ -194,7 +194,7 @@ DdManager * Aig_ManBuildPoBdd( Aig_Man_t * p, DdNode ** pbFunc )
     int i;
     assert( Saig_ManPoNum(p) == 1 );
     Aig_ManCleanData( p );
-    dd = Cudd_Init( Aig_ManPiNum(p), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
+    dd = Cudd_Init( Aig_ManCiNum(p), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
     Cudd_AutodynEnable( dd,  CUDD_REORDER_SYMM_SIFT );
     pObj = Aig_ManConst1(p);
     pObj->pData = Cudd_ReadOne(dd);  Cudd_Ref( (DdNode *)pObj->pData );
@@ -202,7 +202,7 @@ DdManager * Aig_ManBuildPoBdd( Aig_Man_t * p, DdNode ** pbFunc )
     {
         pObj->pData = Cudd_bddIthVar(dd, i);  Cudd_Ref( (DdNode *)pObj->pData );
     }
-    pObj = Aig_ManPo( p, 0 );
+    pObj = Aig_ManCo( p, 0 );
     *pbFunc = Aig_ManBuildPoBdd_rec( p, Aig_ObjFanin0(pObj), dd );  Cudd_Ref( *pbFunc );
     *pbFunc = Cudd_NotCond( *pbFunc, Aig_ObjFaninC0(pObj) );
     Aig_ManForEachObj( p, pObj, i )
@@ -274,7 +274,7 @@ Aig_Man_t * Aig_ManSplit( Aig_Man_t * p, int nVars, int fVerbose )
         printf( "The number of cofactoring variables should be less than 17.\n" );
         return NULL;
     }
-    vSupp = Aig_Support( p, Aig_ObjFanin0(Aig_ManPo(p,0)) );
+    vSupp = Aig_Support( p, Aig_ObjFanin0(Aig_ManCo(p,0)) );
     if ( Vec_PtrSize(vSupp) == 0 )
     {
         printf( "Property output function is a constant.\n" );
diff --git a/src/aig/aig/aigTsim.c b/src/aig/aig/aigTsim.c
index 99aa5c64..36dc28dd 100644
--- a/src/aig/aig/aigTsim.c
+++ b/src/aig/aig/aigTsim.c
@@ -458,7 +458,7 @@ Aig_TsiStatePrint( pTsi, pState );
     }
 
     // start mapping by adding the true PIs
-    vMap = Vec_PtrAlloc( Aig_ManPiNum(p) );
+    vMap = Vec_PtrAlloc( Aig_ManCiNum(p) );
     Aig_ManForEachPiSeq( p, pObj, i )
         Vec_PtrPush( vMap, pObj );
     // find constant registers
diff --git a/src/aig/aig/aigUtil.c b/src/aig/aig/aigUtil.c
index 16065b4e..c247208f 100644
--- a/src/aig/aig/aigUtil.c
+++ b/src/aig/aig/aigUtil.c
@@ -85,7 +85,7 @@ char * Aig_TimeStamp()
 ***********************************************************************/
 int Aig_ManHasNoGaps( Aig_Man_t * p )
 {
-    return (int)(Aig_ManObjNum(p) == Aig_ManPiNum(p) + Aig_ManPoNum(p) + Aig_ManNodeNum(p) + 1);
+    return (int)(Aig_ManObjNum(p) == Aig_ManCiNum(p) + Aig_ManCoNum(p) + Aig_ManNodeNum(p) + 1);
 }
 
 /**Function*************************************************************
@@ -243,7 +243,7 @@ void Aig_ManCleanNext( Aig_Man_t * p )
 void Aig_ObjCleanData_rec( Aig_Obj_t * pObj )
 {
     assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPo(pObj) );
+    assert( !Aig_ObjIsCo(pObj) );
     if ( Aig_ObjIsAnd(pObj) )
     {
         Aig_ObjCleanData_rec( Aig_ObjFanin0(pObj) );
@@ -266,7 +266,7 @@ void Aig_ObjCleanData_rec( Aig_Obj_t * pObj )
 ***********************************************************************/
 void Aig_ObjCollectMulti_rec( Aig_Obj_t * pRoot, Aig_Obj_t * pObj, Vec_Ptr_t * vSuper )
 {
-    if ( pRoot != pObj && (Aig_IsComplement(pObj) || Aig_ObjIsPi(pObj) || Aig_ObjType(pRoot) != Aig_ObjType(pObj)) )
+    if ( pRoot != pObj && (Aig_IsComplement(pObj) || Aig_ObjIsCi(pObj) || Aig_ObjType(pRoot) != Aig_ObjType(pObj)) )
     {
         Vec_PtrPushUnique(vSuper, pObj);
         return;
@@ -531,7 +531,7 @@ void Aig_ObjPrintEqn( FILE * pFile, Aig_Obj_t * pObj, Vec_Vec_t * vLevels, int L
         return;
     }
     // PI case
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         fprintf( pFile, "%s%s", fCompl? "!" : "", (char*)pObj->pData );
         return;
@@ -578,7 +578,7 @@ void Aig_ObjPrintVerilog( FILE * pFile, Aig_Obj_t * pObj, Vec_Vec_t * vLevels, i
         return;
     }
     // PI case
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         fprintf( pFile, "%s%s", fCompl? "~" : "", (char*)pObj->pData );
         return;
@@ -656,9 +656,9 @@ void Aig_ObjPrintVerbose( Aig_Obj_t * pObj, int fHaig )
     printf( "Node %p : ", pObj );
     if ( Aig_ObjIsConst1(pObj) )
         printf( "constant 1" );
-    else if ( Aig_ObjIsPi(pObj) )
+    else if ( Aig_ObjIsCi(pObj) )
         printf( "PI" );
-    else if ( Aig_ObjIsPo(pObj) )
+    else if ( Aig_ObjIsCo(pObj) )
     {
         printf( "PO" );
         printf( "%p%s", 
@@ -736,7 +736,7 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pConst1 = NULL;
     int i, nDigits, Counter = 0;
-    if ( Aig_ManPoNum(p) == 0 )
+    if ( Aig_ManCoNum(p) == 0 )
     {
         printf( "Aig_ManDumpBlif(): AIG manager does not have POs.\n" );
         return;
@@ -785,11 +785,11 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
         {
             fprintf( pFile, ".latch" );
             if ( vPoNames )
-                fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPoNames, Aig_ManPoNum(p)-Aig_ManRegNum(p)+i) );
+                fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPoNames, Aig_ManCoNum(p)-Aig_ManRegNum(p)+i) );
             else
                 fprintf( pFile, " n%0*d", nDigits, pObjLi->iData );
             if ( vPiNames )
-                fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ManPiNum(p)-Aig_ManRegNum(p)+i) );
+                fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ManCiNum(p)-Aig_ManRegNum(p)+i) );
             else
                 fprintf( pFile, " n%0*d", nDigits, pObjLo->iData );
             fprintf( pFile, " 0\n" );
@@ -803,11 +803,11 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
     {
         fprintf( pFile, ".names" );
-        if ( vPiNames && Aig_ObjIsPi(Aig_ObjFanin0(pObj)) )
+        if ( vPiNames && Aig_ObjIsCi(Aig_ObjFanin0(pObj)) )
             fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjPioNum(Aig_ObjFanin0(pObj))) );
         else
             fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin0(pObj)->iData );
-        if ( vPiNames && Aig_ObjIsPi(Aig_ObjFanin1(pObj)) )
+        if ( vPiNames && Aig_ObjIsCi(Aig_ObjFanin1(pObj)) )
             fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjPioNum(Aig_ObjFanin1(pObj))) );
         else
             fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin1(pObj)->iData );
@@ -818,7 +818,7 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
     Aig_ManForEachCo( p, pObj, i )
     {
         fprintf( pFile, ".names" );
-        if ( vPiNames && Aig_ObjIsPi(Aig_ObjFanin0(pObj)) )
+        if ( vPiNames && Aig_ObjIsCi(Aig_ObjFanin0(pObj)) )
             fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjPioNum(Aig_ObjFanin0(pObj))) );
         else
             fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin0(pObj)->iData );
@@ -851,7 +851,7 @@ void Aig_ManDumpVerilog( Aig_Man_t * p, char * pFileName )
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pConst1 = NULL;
     int i, nDigits, Counter = 0;
-    if ( Aig_ManPoNum(p) == 0 )
+    if ( Aig_ManCoNum(p) == 0 )
     {
         printf( "Aig_ManDumpBlif(): AIG manager does not have POs.\n" );
         return;
@@ -1029,7 +1029,7 @@ void Aig_ManPrintControlFanouts( Aig_Man_t * p )
     Aig_Obj_t * pObj, * pFanin0, * pFanin1, * pCtrl;
     int i;
 
-    pCtrl = Aig_ManPi( p, Aig_ManPiNum(p) - 1 );
+    pCtrl = Aig_ManCi( p, Aig_ManCiNum(p) - 1 );
 
     printf( "Control signal:\n" );
     Aig_ObjPrint( p, pCtrl ); printf( "\n\n" );
@@ -1041,13 +1041,13 @@ void Aig_ManPrintControlFanouts( Aig_Man_t * p )
         assert( pObj != pCtrl );
         pFanin0 = Aig_ObjFanin0(pObj);
         pFanin1 = Aig_ObjFanin1(pObj);
-        if ( pFanin0 == pCtrl && Aig_ObjIsPi(pFanin1) )
+        if ( pFanin0 == pCtrl && Aig_ObjIsCi(pFanin1) )
         {
             Aig_ObjPrint( p, pObj ); printf( "\n" );
             Aig_ObjPrint( p, pFanin1 ); printf( "\n" );
             printf( "\n" );
         }
-        if ( pFanin1 == pCtrl && Aig_ObjIsPi(pFanin0) )
+        if ( pFanin1 == pCtrl && Aig_ObjIsCi(pFanin0) )
         {
             Aig_ObjPrint( p, pObj ); printf( "\n" );
             Aig_ObjPrint( p, pFanin0 ); printf( "\n" );
@@ -1355,7 +1355,7 @@ void Aig_ManCounterExampleValueStart( Aig_Man_t * pAig, Abc_Cex_t * pCex )
     }
     assert( iBit == pCex->nBits );
     // check that the counter-example is correct, that is, the corresponding output is asserted
-    assert( Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * pCex->iFrame + Aig_ObjId(Aig_ManPo(pAig, pCex->iPo)) ) );
+    assert( Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * pCex->iFrame + Aig_ObjId(Aig_ManCo(pAig, pCex->iPo)) ) );
 }
 
 /**Function*************************************************************
diff --git a/src/aig/aig/aigWin.c b/src/aig/aig/aigWin.c
index 5568c9ec..cc179267 100644
--- a/src/aig/aig/aigWin.c
+++ b/src/aig/aig/aigWin.c
@@ -49,7 +49,7 @@ static inline int Aig_NodeGetLeafCostOne( Aig_Obj_t * pNode, int nFanoutLimit )
     // make sure the node is in the construction zone
     assert( pNode->fMarkA );  
     // cannot expand over the PI node
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return 999;
     // get the cost of the cone
     Cost = (!Aig_ObjFanin0(pNode)->fMarkA) + (!Aig_ObjFanin1(pNode)->fMarkA);
diff --git a/src/aig/gia/giaAbs.c b/src/aig/gia/giaAbs.c
index 2efc73e4..548eec74 100644
--- a/src/aig/gia/giaAbs.c
+++ b/src/aig/gia/giaAbs.c
@@ -264,7 +264,7 @@ int Gia_ManCbaPerform( Gia_Man_t * pGia, void * pPars )
     {
         assert( pAig->pSeqModel != NULL );
         printf( "Refinement did not happen. Discovered a true counter-example.\n" );
-        printf( "Remapping counter-example from %d to %d primary inputs.\n", Aig_ManPiNum(pAig), Gia_ManPiNum(pGia) );
+        printf( "Remapping counter-example from %d to %d primary inputs.\n", Aig_ManCiNum(pAig), Gia_ManPiNum(pGia) );
         // derive new counter-example
         pOrig = Gia_ManToAigSimple( pGia );
         pGia->pCexSeq = Saig_ManCexRemap( pOrig, pAig, pAig->pSeqModel );
@@ -347,7 +347,7 @@ int Gia_ManPbaPerform( Gia_Man_t * pGia, int nStart, int nFrames, int nConfLimit
         // found real counter-example
         assert( pAig->pSeqModel != NULL );
         printf( "Refinement did not happen. Discovered a true counter-example.\n" );
-        printf( "Remapping counter-example from %d to %d primary inputs.\n", Aig_ManPiNum(pAig), Gia_ManPiNum(pGia) );
+        printf( "Remapping counter-example from %d to %d primary inputs.\n", Aig_ManCiNum(pAig), Gia_ManPiNum(pGia) );
         // derive new counter-example
         pOrig = Gia_ManToAigSimple( pGia );
         pGia->pCexSeq = Saig_ManCexRemap( pOrig, pAig, pAig->pSeqModel );
diff --git a/src/aig/gia/giaAig.c b/src/aig/gia/giaAig.c
index e619bde8..f8fce6f6 100644
--- a/src/aig/gia/giaAig.c
+++ b/src/aig/gia/giaAig.c
@@ -136,9 +136,9 @@ Gia_Man_t * Gia_ManFromAigSimple( Aig_Man_t * p )
     {
         if ( Aig_ObjIsAnd(pObj) )
             pObj->iData = Gia_ManAppendAnd( pNew, Gia_ObjChild0Copy(pObj), Gia_ObjChild1Copy(pObj) );
-        else if ( Aig_ObjIsPi(pObj) )
+        else if ( Aig_ObjIsCi(pObj) )
             pObj->iData = Gia_ManAppendCi( pNew );
-        else if ( Aig_ObjIsPo(pObj) )
+        else if ( Aig_ObjIsCo(pObj) )
             pObj->iData = Gia_ManAppendCo( pNew, Gia_ObjChild0Copy(pObj) );
         else if ( Aig_ObjIsConst1(pObj) )
             pObj->iData = 1;
@@ -463,7 +463,7 @@ void Gia_ManReprFromAigRepr( Aig_Man_t * pAig, Gia_Man_t * pGia )
     int i;
     assert( pAig->pReprs != NULL );
     assert( pGia->pReprs == NULL );
-    assert( Gia_ManObjNum(pGia) - Gia_ManCoNum(pGia) == Aig_ManObjNum(pAig) - Aig_ManPoNum(pAig) );
+    assert( Gia_ManObjNum(pGia) - Gia_ManCoNum(pGia) == Aig_ManObjNum(pAig) - Aig_ManCoNum(pAig) );
     pGia->pReprs = ABC_CALLOC( Gia_Rpr_t, Gia_ManObjNum(pGia) );
     for ( i = 0; i < Gia_ManObjNum(pGia); i++ )
         Gia_ObjSetRepr( pGia, i, GIA_VOID );
@@ -478,7 +478,7 @@ void Gia_ManReprFromAigRepr( Aig_Man_t * pAig, Gia_Man_t * pGia )
     }
     Aig_ManForEachObj( pAig, pObjAig, i )
     {
-        if ( Aig_ObjIsPo(pObjAig) )
+        if ( Aig_ObjIsCo(pObjAig) )
             continue;
         if ( pAig->pReprs[i] == NULL )
             continue;
diff --git a/src/aig/gia/giaSwitch.c b/src/aig/gia/giaSwitch.c
index 4e39a921..628427d0 100644
--- a/src/aig/gia/giaSwitch.c
+++ b/src/aig/gia/giaSwitch.c
@@ -689,7 +689,7 @@ Vec_Int_t * Saig_ManComputeSwitchProbs( Aig_Man_t * pAig, int nFrames, int nPref
     vResult = Vec_IntStart( Aig_ManObjNumMax(pAig) );
     Aig_ManForEachObj( pAig, pObj, i )
     {
-//        if ( Aig_ObjIsPo(pObj) )
+//        if ( Aig_ObjIsCo(pObj) )
 //            printf( "%d=%f\n", i, Abc_Int2Float( Vec_IntEntry(vSwitching, Abc_Lit2Var(pObj->iData)) ) );
         Vec_IntWriteEntry( vResult, i, Vec_IntEntry(vSwitching, Abc_Lit2Var(pObj->iData)) );
     }
diff --git a/src/aig/ioa/ioaWriteAig.c b/src/aig/ioa/ioaWriteAig.c
index ca5a8a5e..e6207879 100644
--- a/src/aig/ioa/ioaWriteAig.c
+++ b/src/aig/ioa/ioaWriteAig.c
@@ -209,7 +209,7 @@ Vec_Int_t * Ioa_WriteAigerLiterals( Aig_Man_t * pMan )
     Vec_Int_t * vLits;
     Aig_Obj_t * pObj, * pDriver;
     int i;
-    vLits = Vec_IntAlloc( Aig_ManPoNum(pMan) );
+    vLits = Vec_IntAlloc( Aig_ManCoNum(pMan) );
     Aig_ManForEachLiSeq( pMan, pObj, i )
     {
         pDriver = Aig_ObjFanin0(pObj);
@@ -300,21 +300,21 @@ Vec_Str_t * Ioa_WriteAigerIntoMemoryStr( Aig_Man_t * pMan )
 /*
     fprintf( pFile, "aig%s %u %u %u %u %u\n", 
         fCompact? "2" : "",
-        Aig_ManPiNum(pMan) + Aig_ManNodeNum(pMan), 
-        Aig_ManPiNum(pMan) - Aig_ManRegNum(pMan),
+        Aig_ManCiNum(pMan) + Aig_ManNodeNum(pMan), 
+        Aig_ManCiNum(pMan) - Aig_ManRegNum(pMan),
         Aig_ManRegNum(pMan),
-        Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan),
+        Aig_ManCoNum(pMan) - Aig_ManRegNum(pMan),
         Aig_ManNodeNum(pMan) );
 */
     vBuffer = Vec_StrAlloc( 3*Aig_ManObjNum(pMan) );
     Vec_StrPrintStr( vBuffer, "aig " );
-    Vec_StrPrintNum( vBuffer, Aig_ManPiNum(pMan) + Aig_ManNodeNum(pMan) );
+    Vec_StrPrintNum( vBuffer, Aig_ManCiNum(pMan) + Aig_ManNodeNum(pMan) );
     Vec_StrPrintStr( vBuffer, " " );
-    Vec_StrPrintNum( vBuffer, Aig_ManPiNum(pMan) - Aig_ManRegNum(pMan) );
+    Vec_StrPrintNum( vBuffer, Aig_ManCiNum(pMan) - Aig_ManRegNum(pMan) );
     Vec_StrPrintStr( vBuffer, " " );
     Vec_StrPrintNum( vBuffer, Aig_ManRegNum(pMan) );
     Vec_StrPrintStr( vBuffer, " " );
-    Vec_StrPrintNum( vBuffer, Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan) );
+    Vec_StrPrintNum( vBuffer, Aig_ManCoNum(pMan) - Aig_ManRegNum(pMan) );
     Vec_StrPrintStr( vBuffer, " " );
     Vec_StrPrintNum( vBuffer, Aig_ManNodeNum(pMan) );
     Vec_StrPrintStr( vBuffer, "\n" );
@@ -407,7 +407,7 @@ void Ioa_WriteAigerBufferTest( Aig_Man_t * pMan, char * pFileName, int fWriteSym
     FILE * pFile;
     char * pBuffer;
     int nSize;
-    if ( Aig_ManPoNum(pMan) == 0 )
+    if ( Aig_ManCoNum(pMan) == 0 )
     {
         printf( "AIG cannot be written because it has no POs.\n" );
         return;
@@ -452,7 +452,7 @@ void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int
     unsigned char * pBuffer;
     unsigned uLit0, uLit1, uLit;
 
-    if ( Aig_ManPoNum(pMan) == 0 )
+    if ( Aig_ManCoNum(pMan) == 0 )
     {
         printf( "AIG cannot be written because it has no POs.\n" );
         return;
@@ -485,14 +485,14 @@ void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int
     // write the header "M I L O A" where M = I + L + A
     fprintf( pFile, "aig%s %u %u %u %u %u", 
         fCompact? "2" : "",
-        Aig_ManPiNum(pMan) + Aig_ManNodeNum(pMan), 
-        Aig_ManPiNum(pMan) - Aig_ManRegNum(pMan),
+        Aig_ManCiNum(pMan) + Aig_ManNodeNum(pMan), 
+        Aig_ManCiNum(pMan) - Aig_ManRegNum(pMan),
         Aig_ManRegNum(pMan),
-        Aig_ManConstrNum(pMan) ? 0 : Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan),
+        Aig_ManConstrNum(pMan) ? 0 : Aig_ManCoNum(pMan) - Aig_ManRegNum(pMan),
         Aig_ManNodeNum(pMan) );
     // write the extended header "B C J F"
     if ( Aig_ManConstrNum(pMan) )
-        fprintf( pFile, " %u %u", Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan) - Aig_ManConstrNum(pMan), Aig_ManConstrNum(pMan) );
+        fprintf( pFile, " %u %u", Aig_ManCoNum(pMan) - Aig_ManRegNum(pMan) - Aig_ManConstrNum(pMan), Aig_ManConstrNum(pMan) );
     fprintf( pFile, "\n" ); 
 
     // if the driver node is a constant, we need to complement the literal below
diff --git a/src/aig/saig/saig.h b/src/aig/saig/saig.h
index 8fde2ef6..0f2234b7 100644
--- a/src/aig/saig/saig.h
+++ b/src/aig/saig/saig.h
@@ -101,27 +101,27 @@ static inline int          Saig_ManCiNum( Aig_Man_t * p )                     {
 static inline int          Saig_ManCoNum( Aig_Man_t * p )                     { return p->nTruePos + p->nRegs;          }
 static inline int          Saig_ManRegNum( Aig_Man_t * p )                    { return p->nRegs;                        }
 static inline int          Saig_ManConstrNum( Aig_Man_t * p )                 { return p->nConstrs;                     }
-static inline Aig_Obj_t *  Saig_ManLo( Aig_Man_t * p, int i )                 { return (Aig_Obj_t *)Vec_PtrEntry(p->vPis, Saig_ManPiNum(p)+i);   }
-static inline Aig_Obj_t *  Saig_ManLi( Aig_Man_t * p, int i )                 { return (Aig_Obj_t *)Vec_PtrEntry(p->vPos, Saig_ManPoNum(p)+i);   }
-
-static inline int          Saig_ObjIsPi( Aig_Man_t * p, Aig_Obj_t * pObj )    { return Aig_ObjIsPi(pObj) && Aig_ObjPioNum(pObj) < Saig_ManPiNum(p); }
-static inline int          Saig_ObjIsPo( Aig_Man_t * p, Aig_Obj_t * pObj )    { return Aig_ObjIsPo(pObj) && Aig_ObjPioNum(pObj) < Saig_ManPoNum(p); }
-static inline int          Saig_ObjIsLo( Aig_Man_t * p, Aig_Obj_t * pObj )    { return Aig_ObjIsPi(pObj) && Aig_ObjPioNum(pObj) >= Saig_ManPiNum(p); }
-static inline int          Saig_ObjIsLi( Aig_Man_t * p, Aig_Obj_t * pObj )    { return Aig_ObjIsPo(pObj) && Aig_ObjPioNum(pObj) >= Saig_ManPoNum(p); }
-static inline Aig_Obj_t *  Saig_ObjLoToLi( Aig_Man_t * p, Aig_Obj_t * pObj )  { assert(Saig_ObjIsLo(p, pObj)); return (Aig_Obj_t *)Vec_PtrEntry(p->vPos, Saig_ManPoNum(p)+Aig_ObjPioNum(pObj)-Saig_ManPiNum(p));   }
-static inline Aig_Obj_t *  Saig_ObjLiToLo( Aig_Man_t * p, Aig_Obj_t * pObj )  { assert(Saig_ObjIsLi(p, pObj)); return (Aig_Obj_t *)Vec_PtrEntry(p->vPis, Saig_ManPiNum(p)+Aig_ObjPioNum(pObj)-Saig_ManPoNum(p));   }
+static inline Aig_Obj_t *  Saig_ManLo( Aig_Man_t * p, int i )                 { return (Aig_Obj_t *)Vec_PtrEntry(p->vCis, Saig_ManPiNum(p)+i);   }
+static inline Aig_Obj_t *  Saig_ManLi( Aig_Man_t * p, int i )                 { return (Aig_Obj_t *)Vec_PtrEntry(p->vCos, Saig_ManPoNum(p)+i);   }
+
+static inline int          Saig_ObjIsPi( Aig_Man_t * p, Aig_Obj_t * pObj )    { return Aig_ObjIsCi(pObj) && Aig_ObjPioNum(pObj) < Saig_ManPiNum(p); }
+static inline int          Saig_ObjIsPo( Aig_Man_t * p, Aig_Obj_t * pObj )    { return Aig_ObjIsCo(pObj) && Aig_ObjPioNum(pObj) < Saig_ManPoNum(p); }
+static inline int          Saig_ObjIsLo( Aig_Man_t * p, Aig_Obj_t * pObj )    { return Aig_ObjIsCi(pObj) && Aig_ObjPioNum(pObj) >= Saig_ManPiNum(p); }
+static inline int          Saig_ObjIsLi( Aig_Man_t * p, Aig_Obj_t * pObj )    { return Aig_ObjIsCo(pObj) && Aig_ObjPioNum(pObj) >= Saig_ManPoNum(p); }
+static inline Aig_Obj_t *  Saig_ObjLoToLi( Aig_Man_t * p, Aig_Obj_t * pObj )  { assert(Saig_ObjIsLo(p, pObj)); return (Aig_Obj_t *)Vec_PtrEntry(p->vCos, Saig_ManPoNum(p)+Aig_ObjPioNum(pObj)-Saig_ManPiNum(p));   }
+static inline Aig_Obj_t *  Saig_ObjLiToLo( Aig_Man_t * p, Aig_Obj_t * pObj )  { assert(Saig_ObjIsLi(p, pObj)); return (Aig_Obj_t *)Vec_PtrEntry(p->vCis, Saig_ManPiNum(p)+Aig_ObjPioNum(pObj)-Saig_ManPoNum(p));   }
 static inline int          Saig_ObjRegId( Aig_Man_t * p, Aig_Obj_t * pObj )   { if ( Saig_ObjIsLo(p, pObj) ) return Aig_ObjPioNum(pObj)-Saig_ManPiNum(p); if ( Saig_ObjIsLi(p, pObj) ) return Aig_ObjPioNum(pObj)-Saig_ManPoNum(p); else assert(0);  return -1; }
 
 // iterator over the primary inputs/outputs
 #define Saig_ManForEachPi( p, pObj, i )                                           \
-    Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vPis, pObj, i, Saig_ManPiNum(p) )
+    Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCis, pObj, i, Saig_ManPiNum(p) )
 #define Saig_ManForEachPo( p, pObj, i )                                           \
-    Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vPos, pObj, i, Saig_ManPoNum(p) )
+    Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCos, pObj, i, Saig_ManPoNum(p) )
 // iterator over the latch inputs/outputs
 #define Saig_ManForEachLo( p, pObj, i )                                           \
-    for ( i = 0; (i < Saig_ManRegNum(p)) && (((pObj) = (Aig_Obj_t *)Vec_PtrEntry(p->vPis, i+Saig_ManPiNum(p))), 1); i++ )
+    for ( i = 0; (i < Saig_ManRegNum(p)) && (((pObj) = (Aig_Obj_t *)Vec_PtrEntry(p->vCis, i+Saig_ManPiNum(p))), 1); i++ )
 #define Saig_ManForEachLi( p, pObj, i )                                           \
-    for ( i = 0; (i < Saig_ManRegNum(p)) && (((pObj) = (Aig_Obj_t *)Vec_PtrEntry(p->vPos, i+Saig_ManPoNum(p))), 1); i++ )
+    for ( i = 0; (i < Saig_ManRegNum(p)) && (((pObj) = (Aig_Obj_t *)Vec_PtrEntry(p->vCos, i+Saig_ManPoNum(p))), 1); i++ )
 // iterator over the latch input and outputs
 #define Saig_ManForEachLiLo( p, pObjLi, pObjLo, i )                               \
     for ( i = 0; (i < Saig_ManRegNum(p)) && (((pObjLi) = Saig_ManLi(p, i)), 1)    \
@@ -185,7 +185,7 @@ extern Aig_Man_t *       Saig_ManReadBlif( char * pFileName );
 /*=== saigIso.c ==========================================================*/
 extern Vec_Int_t *       Saig_ManFindIsoPerm( Aig_Man_t * pAig, int fVerbose );
 extern Aig_Man_t *       Saig_ManDupIsoCanonical( Aig_Man_t * pAig, int fVerbose );
-extern Aig_Man_t *       Saig_ManIsoReduce( Aig_Man_t * pAig, Vec_Ptr_t ** pvPosEquivs, int fVerbose );
+extern Aig_Man_t *       Saig_ManIsoReduce( Aig_Man_t * pAig, Vec_Ptr_t ** pvCosEquivs, int fVerbose );
 /*=== saigIsoFast.c ==========================================================*/
 extern Vec_Vec_t *       Saig_IsoDetectFast( Aig_Man_t * pAig );
 /*=== saigMiter.c ==========================================================*/
diff --git a/src/aig/saig/saigAbsCba.c b/src/aig/saig/saigAbsCba.c
index c68143d4..d7975d92 100644
--- a/src/aig/saig/saigAbsCba.c
+++ b/src/aig/saig/saigAbsCba.c
@@ -202,7 +202,7 @@ Vec_Int_t * Saig_ManCbaReason2Inputs( Saig_ManCba_t * p, Vec_Int_t * vReasons )
     Vec_IntForEachEntry( vReasons, Entry, i )
     {
         int iInput = Vec_IntEntry( p->vMapPiF2A, 2*Entry );
-        assert( iInput >= p->nInputs && iInput < Aig_ManPiNum(p->pAig) );
+        assert( iInput >= p->nInputs && iInput < Aig_ManCiNum(p->pAig) );
         if ( Vec_IntEntry(vVisited, iInput) == 0 )
             Vec_IntPush( vOriginal, iInput - p->nInputs );
         Vec_IntAddToEntry( vVisited, iInput, 1 );
@@ -230,7 +230,7 @@ Abc_Cex_t * Saig_ManCbaReason2Cex( Saig_ManCba_t * p, Vec_Int_t * vReasons )
     memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
     Vec_IntForEachEntry( vReasons, Entry, i )
     {
-        assert( Entry >= 0 && Entry < Aig_ManPiNum(p->pFrames) );
+        assert( Entry >= 0 && Entry < Aig_ManCiNum(p->pFrames) );
         iInput = Vec_IntEntry( p->vMapPiF2A, 2*Entry );
         iFrame = Vec_IntEntry( p->vMapPiF2A, 2*Entry+1 );
         Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
@@ -266,7 +266,7 @@ void Saig_ManCbaFindReason_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t * vPr
     Aig_ObjSetTravIdCurrent(p, pObj);
     if ( Aig_ObjIsConst1(pObj) )
         return;
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Vec_IntPush( vReasons, Aig_ObjPioNum(pObj) );
         return;
@@ -344,7 +344,7 @@ Vec_Int_t * Saig_ManCbaFindReason( Saig_ManCba_t * p )
             Vec_IntWriteEntry( vPrios, Aig_ObjId(pObj), Abc_MinInt(iPrio0, iPrio1) );
     }
     // check the property output
-    pObj = Aig_ManPo( p->pFrames, 0 );
+    pObj = Aig_ManCo( p->pFrames, 0 );
     pObj->fPhase = Aig_ObjFaninC0(pObj) ^ Aig_ObjFanin0(pObj)->fPhase;
     assert( !pObj->fPhase );
 
@@ -374,7 +374,7 @@ void Saig_ManCbaUnrollCollect_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t
     if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
         Saig_ManCbaUnrollCollect_rec( pAig, Aig_ObjFanin0(pObj), vObjs, vRoots );
     else if ( Aig_ObjIsNode(pObj) )
     {
@@ -417,7 +417,7 @@ Aig_Man_t * Saig_ManCbaUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nI
     vFrameCos  = Vec_VecStart( pCex->iFrame+1 );
     vFrameObjs = Vec_VecStart( pCex->iFrame+1 );
     // initialized the topmost frame
-    pObj = Aig_ManPo( pAig, pCex->iPo );
+    pObj = Aig_ManCo( pAig, pCex->iPo );
     Vec_VecPushInt( vFrameCos, pCex->iFrame, Aig_ObjId(pObj) );
     for ( f = pCex->iFrame; f >= 0; f-- )
     {
@@ -454,7 +454,7 @@ Aig_Man_t * Saig_ManCbaUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nI
         {
             if ( Aig_ObjIsNode(pObj) )
                 pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-            else if ( Aig_ObjIsPo(pObj) )
+            else if ( Aig_ObjIsCo(pObj) )
                 pObj->pData = Aig_ObjChild0Copy(pObj);
             else if ( Aig_ObjIsConst1(pObj) )
                 pObj->pData = Aig_ManConst1(pFrames);
@@ -488,7 +488,7 @@ Aig_Man_t * Saig_ManCbaUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nI
         }
     }
     // create output
-    pObj = Aig_ManPo( pAig, pCex->iPo );
+    pObj = Aig_ManCo( pAig, pCex->iPo );
     Aig_ObjCreateCo( pFrames, Aig_Not((Aig_Obj_t *)pObj->pData) );
     Aig_ManSetRegNum( pFrames, 0 );
     // cleanup
@@ -611,7 +611,7 @@ static inline void Saig_ObjCexMinSim( Aig_Obj_t * pObj )
         else 
             Saig_ObjCexMinSetX( pObj );
     }
-    else if ( Aig_ObjIsPo(pObj) )
+    else if ( Aig_ObjIsCo(pObj) )
     {
         if ( Saig_ObjCexMinGet0Fanin0(pObj) )
             Saig_ObjCexMinSet0( pObj );
@@ -700,7 +700,7 @@ int Saig_ManCexVerifyUsingTernary( Aig_Man_t * pAig, Abc_Cex_t * pCex, Abc_Cex_t
             pObjRo->fMarkB = pObjRi->fMarkB;
     }
     assert( iBit == pCex->nBits );
-    return Saig_ObjCexMinGet1( Aig_ManPo( pAig, pCex->iPo ) );
+    return Saig_ObjCexMinGet1( Aig_ManCo( pAig, pCex->iPo ) );
 }
 
 /**Function*************************************************************
@@ -741,7 +741,7 @@ Abc_Cex_t * Saig_ManCbaFindCexCareBits( Aig_Man_t * pAig, Abc_Cex_t * pCex, int
     {
         Vec_Int_t * vRes = Saig_ManCbaReason2Inputs( p, vReasons );
         printf( "Frame PIs = %4d (essential = %4d)   AIG PIs = %4d (essential = %4d)   ",
-            Aig_ManPiNum(p->pFrames), Vec_IntSize(vReasons), 
+            Aig_ManCiNum(p->pFrames), Vec_IntSize(vReasons), 
             Saig_ManPiNum(p->pAig) - p->nInputs, Vec_IntSize(vRes) );
         Vec_IntFree( vRes );
 ABC_PRT( "Time", clock() - clk );
@@ -789,7 +789,7 @@ Vec_Int_t * Saig_ManCbaFilterInputs( Aig_Man_t * pAig, int iFirstFlopPi, Abc_Cex
     if ( Saig_ManPiNum(pAig) != pCex->nPis )
     {
         printf( "Saig_ManCbaFilterInputs(): The PI count of AIG (%d) does not match that of cex (%d).\n", 
-            Aig_ManPiNum(pAig), pCex->nPis );
+            Aig_ManCiNum(pAig), pCex->nPis );
         return NULL;
     }
 
@@ -801,7 +801,7 @@ clk = clock();
     if ( fVerbose )
     {
         printf( "Frame PIs = %4d (essential = %4d)   AIG PIs = %4d (essential = %4d)   ",
-            Aig_ManPiNum(p->pFrames), Vec_IntSize(vReasons), 
+            Aig_ManCiNum(p->pFrames), Vec_IntSize(vReasons), 
             Saig_ManPiNum(p->pAig) - p->nInputs, Vec_IntSize(vRes) );
 ABC_PRT( "Time", clock() - clk );
     }
diff --git a/src/aig/saig/saigAbsPba.c b/src/aig/saig/saigAbsPba.c
index 736cd699..b735f3c0 100644
--- a/src/aig/saig/saigAbsPba.c
+++ b/src/aig/saig/saigAbsPba.c
@@ -49,7 +49,7 @@ void Saig_ManUnrollForPba_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t * v
     if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
         Saig_ManUnrollForPba_rec( pAig, Aig_ObjFanin0(pObj), vObjs, vRoots );
     else if ( Aig_ObjIsNode(pObj) )
     {
@@ -106,7 +106,7 @@ Aig_Man_t * Saig_ManUnrollForPba( Aig_Man_t * pAig, int nStart, int nFrames, Vec
         Aig_ObjCreateCi( pFrames );
     // initialize the flops 
     Saig_ManForEachLo( pAig, pObj, i )
-        pObj->pData = Aig_Mux( pFrames, Aig_ManPi(pFrames,i), Aig_ObjCreateCi(pFrames), Aig_ManConst0(pFrames) );
+        pObj->pData = Aig_Mux( pFrames, Aig_ManCi(pFrames,i), Aig_ObjCreateCi(pFrames), Aig_ManConst0(pFrames) );
     // iterate through the frames
     *pvPiVarMap = Vec_IntStartFull( nFrames * Saig_ManPiNum(pAig) );
     pObjNew = Aig_ManConst0(pFrames);
@@ -118,11 +118,11 @@ Aig_Man_t * Saig_ManUnrollForPba( Aig_Man_t * pAig, int nStart, int nFrames, Vec
         {
             if ( Aig_ObjIsNode(pObj) )
                 pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-            else if ( Aig_ObjIsPo(pObj) )
+            else if ( Aig_ObjIsCo(pObj) )
                 pObj->pData = Aig_ObjChild0Copy(pObj);
             else if ( Saig_ObjIsPi(pAig, pObj) )
             {
-                Vec_IntWriteEntry( *pvPiVarMap, f * Saig_ManPiNum(pAig) + Aig_ObjPioNum(pObj), Aig_ManPiNum(pFrames) );
+                Vec_IntWriteEntry( *pvPiVarMap, f * Saig_ManPiNum(pAig) + Aig_ObjPioNum(pObj), Aig_ManCiNum(pFrames) );
                 pObj->pData = Aig_ObjCreateCi( pFrames );
             }
             else if ( Aig_ObjIsConst1(pObj) )
@@ -146,7 +146,7 @@ Aig_Man_t * Saig_ManUnrollForPba( Aig_Man_t * pAig, int nStart, int nFrames, Vec
             {
                 int iFlopNum = Aig_ObjPioNum(pObj) - Saig_ManPoNum(pAig);
                 assert( iFlopNum >= 0 && iFlopNum < Aig_ManRegNum(pAig) );
-                Saig_ObjLiToLo(pAig, pObj)->pData = Aig_Mux( pFrames, Aig_ManPi(pFrames,iFlopNum), Aig_ObjCreateCi(pFrames), (Aig_Obj_t *)pObj->pData );
+                Saig_ObjLiToLo(pAig, pObj)->pData = Aig_Mux( pFrames, Aig_ManCi(pFrames,iFlopNum), Aig_ObjCreateCi(pFrames), (Aig_Obj_t *)pObj->pData );
             }
         }
     }
@@ -184,7 +184,7 @@ Abc_Cex_t * Saig_ManPbaDeriveCex( Aig_Man_t * pAig, sat_solver * pSat, Cnf_Dat_t
     {
         if ( Entry >= 0 )
         {
-            int iSatVar = pCnf->pVarNums[ Aig_ObjId(Aig_ManPi(pCnf->pMan, Entry)) ];
+            int iSatVar = pCnf->pVarNums[ Aig_ObjId(Aig_ManCi(pCnf->pMan, Entry)) ];
             if ( sat_solver_var_value( pSat, iSatVar ) )
                 Abc_InfoSetBit( pCex->pData, Aig_ManRegNum(pAig) + i );
         }
diff --git a/src/aig/saig/saigAbsStart.c b/src/aig/saig/saigAbsStart.c
index eb02eba9..d6583862 100644
--- a/src/aig/saig/saigAbsStart.c
+++ b/src/aig/saig/saigAbsStart.c
@@ -145,7 +145,7 @@ Aig_Man_t * Saig_ManCexRefine( Aig_Man_t * p, Aig_Man_t * pAbs, Vec_Int_t * vFlo
     {
         Entry = Vec_IntEntry(pAbs->vCiNumsOrig, Entry);
         assert( Entry >= Saig_ManPiNum(p) );
-        assert( Entry < Aig_ManPiNum(p) );
+        assert( Entry < Aig_ManCiNum(p) );
         Vec_IntPush( vFlops, Entry-Saig_ManPiNum(p) );
     }
     Vec_IntFree( vFlopsNew );
@@ -187,7 +187,7 @@ int Saig_ManCexRefineStep( Aig_Man_t * p, Vec_Int_t * vFlops, Vec_Int_t * vFlopC
     if ( Vec_IntSize(vFlopsNew) == 0 )
     {
         printf( "Refinement did not happen. Discovered a true counter-example.\n" );
-        printf( "Remapping counter-example from %d to %d primary inputs.\n", Aig_ManPiNum(pAbs), Aig_ManPiNum(p) );
+        printf( "Remapping counter-example from %d to %d primary inputs.\n", Aig_ManCiNum(pAbs), Aig_ManCiNum(p) );
         p->pSeqModel = Saig_ManCexRemap( p, pAbs, pCex );
         Vec_IntFree( vFlopsNew );
         Aig_ManStop( pAbs );
@@ -222,7 +222,7 @@ int Saig_ManCexRefineStep( Aig_Man_t * p, Vec_Int_t * vFlops, Vec_Int_t * vFlopC
     {
         Entry = Vec_IntEntry(pAbs->vCiNumsOrig, Entry);
         assert( Entry >= Saig_ManPiNum(p) );
-        assert( Entry < Aig_ManPiNum(p) );
+        assert( Entry < Aig_ManCiNum(p) );
         Vec_IntPush( vFlops, Entry-Saig_ManPiNum(p) );
     }
     Vec_IntFree( vFlopsNew );
diff --git a/src/aig/saig/saigAbsVfa.c b/src/aig/saig/saigAbsVfa.c
index c3243b0e..897c1638 100644
--- a/src/aig/saig/saigAbsVfa.c
+++ b/src/aig/saig/saigAbsVfa.c
@@ -183,11 +183,11 @@ int Abs_VfaManCreateFrame_rec( Abs_VfaMan_t * p, Aig_Obj_t * pObj, int f )
     if ( Aig_ObjIsConst1(pObj) )
         return -1;
     SatVar = Abs_VfaManAddVar( p, pObj, f, &fNew );
-    if ( (SatVar > 0 && !fNew) || Saig_ObjIsPi(p->pAig, pObj) || (Aig_ObjIsPi(pObj) && f==0) )
+    if ( (SatVar > 0 && !fNew) || Saig_ObjIsPi(p->pAig, pObj) || (Aig_ObjIsCi(pObj) && f==0) )
         return SatVar;
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
         return Abs_VfaManCreateFrame_rec( p, Aig_ObjFanin0(pObj), f );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return Abs_VfaManCreateFrame_rec( p, Saig_ObjLoToLi(p->pAig, pObj), f-1 );
     assert( Aig_ObjIsAnd(pObj) );
     Abs_VfaManCreateFrame_rec( p, Aig_ObjFanin0(pObj), f );
diff --git a/src/aig/saig/saigBmc.c b/src/aig/saig/saigBmc.c
index b0ae1750..60f406ad 100644
--- a/src/aig/saig/saigBmc.c
+++ b/src/aig/saig/saigBmc.c
@@ -203,7 +203,7 @@ int Saig_ManBmcSimple( Aig_Man_t * pAig, int nFrames, int nSizeMax, int nConfLim
     else if ( nSizeMax > 0 )
     {
         pFrames = Saig_ManFramesBmcLimit( pAig, nFrames, nSizeMax );
-        nFrames = Aig_ManPoNum(pFrames) / Saig_ManPoNum(pAig) + ((Aig_ManPoNum(pFrames) % Saig_ManPoNum(pAig)) > 0);
+        nFrames = Aig_ManCoNum(pFrames) / Saig_ManPoNum(pAig) + ((Aig_ManCoNum(pFrames) % Saig_ManPoNum(pAig)) > 0);
     }
     else
         pFrames = Saig_ManFramesBmc( pAig, nFrames );
@@ -215,7 +215,7 @@ int Saig_ManBmcSimple( Aig_Man_t * pAig, int nFrames, int nSizeMax, int nConfLim
             Saig_ManPiNum(pAig), Saig_ManPoNum(pAig), Saig_ManRegNum(pAig),
             Aig_ManNodeNum(pAig), Aig_ManLevelNum(pAig) );
         printf( "Time-frames (%d):  PI/PO = %d/%d.  Node = %6d. Lev = %5d.  ", 
-            nFrames, Aig_ManPiNum(pFrames), Aig_ManPoNum(pFrames), 
+            nFrames, Aig_ManCiNum(pFrames), Aig_ManCoNum(pFrames), 
             Aig_ManNodeNum(pFrames), Aig_ManLevelNum(pFrames) );
         ABC_PRT( "Time", clock() - clk );
         fflush( stdout );
@@ -237,7 +237,7 @@ int Saig_ManBmcSimple( Aig_Man_t * pAig, int nFrames, int nSizeMax, int nConfLim
     }
     // create the SAT solver
     clk = clock();
-    pCnf = Cnf_Derive( pFrames, Aig_ManPoNum(pFrames) );  
+    pCnf = Cnf_Derive( pFrames, Aig_ManCoNum(pFrames) );  
 //if ( s_fInterrupt )
 //return -1;
     pSat = sat_solver_new();
@@ -303,7 +303,7 @@ int Saig_ManBmcSimple( Aig_Man_t * pAig, int nFrames, int nSizeMax, int nConfLim
             {
                 Vec_Int_t * vCiIds = Cnf_DataCollectPiSatNums( pCnf, pFrames );
                 int * pModel = Sat_SolverGetModel( pSat, vCiIds->pArray, vCiIds->nSize );
-                pModel[Aig_ManPiNum(pFrames)] = pObj->Id;
+                pModel[Aig_ManCiNum(pFrames)] = pObj->Id;
                 pAig->pSeqModel = Fra_SmlCopyCounterExample( pAig, pFrames, pModel );
                 ABC_FREE( pModel );
                 Vec_IntFree( vCiIds );
diff --git a/src/aig/saig/saigBmc2.c b/src/aig/saig/saigBmc2.c
index a3e3ea71..ca6049ef 100644
--- a/src/aig/saig/saigBmc2.c
+++ b/src/aig/saig/saigBmc2.c
@@ -129,7 +129,7 @@ int Abs_ManExtendOneEval_rec( Vec_Ptr_t * vSimInfo, Aig_Man_t * p, Aig_Obj_t * p
     Value = Abs_ManSimInfoGet( vSimInfo, pObj, iFrame );
     if ( Value )
         return Value;
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         assert( Saig_ObjIsLo(p, pObj) );
         Value = Abs_ManExtendOneEval_rec( vSimInfo, p, Saig_ObjLoToLi(p, pObj), iFrame-1 );
@@ -139,7 +139,7 @@ int Abs_ManExtendOneEval_rec( Vec_Ptr_t * vSimInfo, Aig_Man_t * p, Aig_Obj_t * p
     Value0 = Abs_ManExtendOneEval_rec( vSimInfo, p, Aig_ObjFanin0(pObj), iFrame );
     if ( Aig_ObjFaninC0(pObj) )
         Value0 = Abs_ManSimInfoNot( Value0 );
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         Abs_ManSimInfoSet( vSimInfo, pObj, iFrame, Value0 );
         return Value0;
@@ -358,7 +358,7 @@ Aig_Obj_t * Saig_BmcIntervalExplore_rec( Saig_Bmc_t * p, Aig_Obj_t * pObj, int i
         pRes = AIG_VISITED;
     else if ( Saig_ObjIsLo( p->pAig, pObj ) )
         pRes = Saig_BmcIntervalExplore_rec( p, Saig_ObjLoToLi(p->pAig, pObj), i-1 );
-    else if ( Aig_ObjIsPo( pObj ) )
+    else if ( Aig_ObjIsCo( pObj ) )
     {
         pRes = Saig_BmcIntervalExplore_rec( p, Aig_ObjFanin0(pObj), i );
         if ( pRes != AIG_VISITED )
@@ -410,7 +410,7 @@ Aig_Obj_t * Saig_BmcIntervalConstruct_rec( Saig_Bmc_t * p, Aig_Obj_t * pObj, int
         pRes = Aig_ObjCreateCi(p->pFrm);
     else if ( Saig_ObjIsLo( p->pAig, pObj ) )
         pRes = Saig_BmcIntervalConstruct_rec( p, Saig_ObjLoToLi(p->pAig, pObj), i-1, vVisited );
-    else if ( Aig_ObjIsPo( pObj ) )
+    else if ( Aig_ObjIsCo( pObj ) )
     {
         Saig_BmcIntervalConstruct_rec( p, Aig_ObjFanin0(pObj), i, vVisited );
         pRes = Saig_BmcObjChild0( p, pObj, i );
@@ -462,9 +462,9 @@ void Saig_BmcInterval( Saig_Bmc_t * p )
         {
             if ( Aig_ManObjNum(p->pFrm) >= nNodes + p->nNodesMax )
                 return;
-//            Saig_BmcIntervalExplore_rec( p, Aig_ManPo(p->pAig, p->iOutputLast), p->iFrameLast );
+//            Saig_BmcIntervalExplore_rec( p, Aig_ManCo(p->pAig, p->iOutputLast), p->iFrameLast );
             Vec_PtrClear( p->vVisited );
-            pTarget = Saig_BmcIntervalConstruct_rec( p, Aig_ManPo(p->pAig, p->iOutputLast), p->iFrameLast, p->vVisited );
+            pTarget = Saig_BmcIntervalConstruct_rec( p, Aig_ManCo(p->pAig, p->iOutputLast), p->iFrameLast, p->vVisited );
             Vec_PtrPush( p->vTargets, pTarget );
             Aig_ObjCreateCo( p->pFrm, pTarget );
             Aig_ManCleanup( p->pFrm );
@@ -501,9 +501,9 @@ Aig_Obj_t * Saig_BmcIntervalToAig_rec( Saig_Bmc_t * p, Aig_Man_t * pNew, Aig_Obj
     if ( pObj->pData )
         return (Aig_Obj_t *)pObj->pData;
     Vec_PtrPush( p->vVisited, pObj );
-    if ( Saig_BmcSatNum(p, pObj) || Aig_ObjIsPi(pObj) )
+    if ( Saig_BmcSatNum(p, pObj) || Aig_ObjIsCi(pObj) )
     {
-        p->nStitchVars += !Aig_ObjIsPi(pObj);
+        p->nStitchVars += !Aig_ObjIsCi(pObj);
         return (Aig_Obj_t *)(pObj->pData = Aig_ObjCreateCi(pNew));
     }
     Saig_BmcIntervalToAig_rec( p, pNew, Aig_ObjFanin0(pObj) );
@@ -784,7 +784,7 @@ int Saig_BmcPerform( Aig_Man_t * pAig, int nStart, int nFramesMax, int nNodesMax
         pNew = Saig_BmcIntervalToAig( p );
 //printf( "StitchVars = %d.\n", p->nStitchVars );
         // derive CNF for the new AIG
-        pCnf = Cnf_Derive( pNew, Aig_ManPoNum(pNew) );
+        pCnf = Cnf_Derive( pNew, Aig_ManCoNum(pNew) );
         Cnf_DataLift( pCnf, p->nSatVars );
         p->nSatVars += pCnf->nVars;
         // add this CNF to the solver
diff --git a/src/aig/saig/saigBmc3.c b/src/aig/saig/saigBmc3.c
index 19753c3c..e96d0039 100644
--- a/src/aig/saig/saigBmc3.c
+++ b/src/aig/saig/saigBmc3.c
@@ -352,7 +352,7 @@ void Saig_ManBmcSectionsTest( Aig_Man_t * p )
 void Saig_ManBmcSupergate_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper )
 {
     // if the new node is complemented or a PI, another gate begins
-    if ( Aig_IsComplement(pObj) || Aig_ObjIsPi(pObj) ) // || (Aig_ObjRefs(pObj) > 1) )
+    if ( Aig_IsComplement(pObj) || Aig_ObjIsCi(pObj) ) // || (Aig_ObjRefs(pObj) > 1) )
     {
         Vec_PtrPushUnique( vSuper, Aig_Regular(pObj) );
         return;
@@ -378,7 +378,7 @@ Vec_Ptr_t * Saig_ManBmcSupergate( Aig_Man_t * p, int iPo )
     Vec_Ptr_t * vSuper;
     Aig_Obj_t * pObj;
     vSuper = Vec_PtrAlloc( 10 );
-    pObj = Aig_ManPo( p, iPo );
+    pObj = Aig_ManCo( p, iPo );
     pObj = Aig_ObjChild0( pObj );
     if ( !Aig_IsComplement(pObj) )
     {
@@ -905,7 +905,7 @@ int Saig_ManBmcCreateCnf_rec( Gia_ManBmc_t * p, Aig_Obj_t * pObj, int iFrame, in
     if ( iLit != ~0 )
         return iLit;
     assert( iFrame >= 0 );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         if ( Saig_ObjIsPi(p->pAig, pObj) )
             iLit = fAddClauses ? toLit( p->nSatVars++ ) : ABC_INFINITY;
@@ -913,7 +913,7 @@ int Saig_ManBmcCreateCnf_rec( Gia_ManBmc_t * p, Aig_Obj_t * pObj, int iFrame, in
             iLit = Saig_ManBmcCreateCnf_rec( p, Saig_ObjLoToLi(p->pAig, pObj), iFrame-1, fAddClauses );
         return Saig_ManBmcSetLiteral( p, pObj, iFrame, iLit );
     }
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         iLit = Saig_ManBmcCreateCnf_rec( p, Aig_ObjFanin0(pObj), iFrame, fAddClauses );
         if ( Aig_ObjFaninC0(pObj) )
diff --git a/src/aig/saig/saigCexMin.c b/src/aig/saig/saigCexMin.c
index 2fb5cd54..466159e6 100644
--- a/src/aig/saig/saigCexMin.c
+++ b/src/aig/saig/saigCexMin.c
@@ -50,7 +50,7 @@ void Saig_ManCexMinGetCos( Aig_Man_t * pAig, Abc_Cex_t * pCex, Vec_Int_t * vLeav
     Vec_IntClear( vRoots );
     if ( vLeaves == NULL )
     {
-        pObj = Aig_ManPo( pAig, pCex->iPo );
+        pObj = Aig_ManCo( pAig, pCex->iPo );
         Vec_IntPush( vRoots, Aig_ObjId(pObj) );
         return;
     }
@@ -75,14 +75,14 @@ void Saig_ManCexMinCollectFrameTerms_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Ve
     if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
         Saig_ManCexMinCollectFrameTerms_rec( pAig, Aig_ObjFanin0(pObj), vFrameCisOne );
     else if ( Aig_ObjIsNode(pObj) )
     {
         Saig_ManCexMinCollectFrameTerms_rec( pAig, Aig_ObjFanin0(pObj), vFrameCisOne );
         Saig_ManCexMinCollectFrameTerms_rec( pAig, Aig_ObjFanin1(pObj), vFrameCisOne );
     }
-    else if ( Aig_ObjIsPi(pObj) )
+    else if ( Aig_ObjIsCi(pObj) )
         Vec_IntPush( vFrameCisOne, Aig_ObjId(pObj) );
 }
 
@@ -138,7 +138,7 @@ void Saig_ManCexMinDerivePhasePriority_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj )
     if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         Saig_ManCexMinDerivePhasePriority_rec( pAig, Aig_ObjFanin0(pObj) );
         assert( Aig_ObjFanin0(pObj)->iData >= 0 );
@@ -277,7 +277,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority_( Aig_Man_t * pAig, Abc_Cex_t * p
         assert( Vec_IntSize(vFramePPsOne) == 0 );
         Aig_ManForEachObjVec( vFrameCisOne, pAig, pObj, i )
         {
-            assert( Aig_ObjIsPi(pObj) );
+            assert( Aig_ObjIsCi(pObj) );
             if ( Saig_ObjIsPi(pAig, pObj) )
                 Vec_IntPush( vFramePPsOne, Abc_Var2Lit( (f+1) * pCex->nPis - nPiCount++, Abc_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj)) ) );
             else if ( f == 0 )
@@ -290,7 +290,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority_( Aig_Man_t * pAig, Abc_Cex_t * p
     }
     Vec_IntFree( vRoots );
     // check the output
-    pObj = Aig_ManPo( pAig, pCex->iPo );
+    pObj = Aig_ManCo( pAig, pCex->iPo );
     assert( Abc_LitIsCompl(pObj->iData) );
     return vFramePPs;
 }
@@ -331,7 +331,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority( Aig_Man_t * pAig, Abc_Cex_t * pC
         assert( Vec_IntSize(vFramePPsOne) == 0 );
         Aig_ManForEachObjVec( vFrameCisOne, pAig, pObj, i )
         {
-            assert( Aig_ObjIsPi(pObj) );
+            assert( Aig_ObjIsCi(pObj) );
             if ( Saig_ObjIsPi(pAig, pObj) )
                 Vec_IntPush( vFramePPsOne, Abc_Var2Lit( nPrioOffset + (f+1) * pCex->nPis - 1 - nPiCount++, Abc_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj)) ) );
             else if ( f == 0 )
@@ -344,7 +344,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority( Aig_Man_t * pAig, Abc_Cex_t * pC
     }
     Vec_IntFree( vRoots );
     // check the output
-    pObj = Aig_ManPo( pAig, pCex->iPo );
+    pObj = Aig_ManCo( pAig, pCex->iPo );
     assert( Abc_LitIsCompl(pObj->iData) );
     return vFramePPs;
 }
@@ -366,7 +366,7 @@ void Saig_ManCexMinCollectReason_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         if ( fPiReason && Saig_ObjIsPi(p, pObj) )
             Vec_IntPush( vReason, Abc_Var2Lit( Aig_ObjPioNum(pObj), !Abc_LitIsCompl(pObj->iData) ) );
@@ -374,7 +374,7 @@ void Saig_ManCexMinCollectReason_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t
             Vec_IntPush( vReason, Abc_Var2Lit( Saig_ObjRegId(p, pObj), !Abc_LitIsCompl(pObj->iData) ) );
         return;
     }
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin0(pObj), vReason, fPiReason );
         return;
diff --git a/src/aig/saig/saigCone.c b/src/aig/saig/saigCone.c
index 2b0da5c9..a6b0d864 100644
--- a/src/aig/saig/saigCone.c
+++ b/src/aig/saig/saigCone.c
@@ -49,7 +49,7 @@ void Saig_ManSupport_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vSupp )
     Aig_ObjSetTravIdCurrent(p, pObj);
     if ( Aig_ObjIsConst1(pObj) )
         return;
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         if ( Saig_ObjIsLo(p,pObj) )
         {
@@ -83,7 +83,7 @@ Vec_Ptr_t * Saig_ManSupport( Aig_Man_t * p, Vec_Ptr_t * vNodes )
     Aig_ManIncrementTravId( p );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
     {
-        assert( Aig_ObjIsPo(pObj) );
+        assert( Aig_ObjIsCo(pObj) );
         Saig_ManSupport_rec( p, Aig_ObjFanin0(pObj), vSupp );
     }
     return vSupp;
diff --git a/src/aig/saig/saigConstr.c b/src/aig/saig/saigConstr.c
index 7f45b844..6b90f2c1 100644
--- a/src/aig/saig/saigConstr.c
+++ b/src/aig/saig/saigConstr.c
@@ -128,7 +128,7 @@ Aig_Man_t * Saig_ManDupFoldConstrs( Aig_Man_t * pAig, Vec_Int_t * vConstrs )
     Vec_IntForEachEntry( vConstrs, Entry, i )
     {
         assert( Entry > 0 && Entry < Saig_ManPoNum(pAig) );
-        pObj = Aig_ManPo( pAig, Entry );
+        pObj = Aig_ManCo( pAig, Entry );
         pMiter = Aig_Or( pAigNew, pMiter, Aig_ObjChild0Copy(pObj) );
     }
     // create additional flop
@@ -283,7 +283,7 @@ int Saig_ManDetectConstr( Aig_Man_t * p, Vec_Ptr_t ** pvOuts, Vec_Ptr_t ** pvCon
         printf( "The number of POs is other than 1.\n" );
         return 0;
     }
-    pObj = Aig_ObjChild0( Aig_ManPo(p, 0) );
+    pObj = Aig_ObjChild0( Aig_ManCo(p, 0) );
     if ( Aig_IsComplement(pObj) || !Aig_ObjIsNode(pObj) )
     {
         printf( "The output is not an AND.\n" );
diff --git a/src/aig/saig/saigConstr2.c b/src/aig/saig/saigConstr2.c
index 3532ac3f..f54f2dbe 100644
--- a/src/aig/saig/saigConstr2.c
+++ b/src/aig/saig/saigConstr2.c
@@ -312,7 +312,7 @@ int Saig_ManFilterUsingIndOne_new( Aig_Man_t * p, Aig_Man_t * pFrame, sat_solver
 {
     Aig_Obj_t * pObj;
     int Lit, status;
-    pObj = Aig_ManPo( pFrame, Counter );
+    pObj = Aig_ManCo( pFrame, Counter );
     Lit  = toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], 0 );
     status = sat_solver_solve( pSat, &Lit, &Lit + 1, (ABC_INT64_T)nConfs, 0, 0, 0 );
     if ( status == l_False )
@@ -354,9 +354,9 @@ void Saig_ManFilterUsingInd( Aig_Man_t * p, Vec_Vec_t * vCands, int nConfs, int
     // create timeframes
 //    pFrames = Saig_ManUnrollInd( p );
     pFrames = Saig_ManCreateIndMiter( p, vCands );
-    assert( Aig_ManPoNum(pFrames) == Vec_VecSizeSize(vCands) );
+    assert( Aig_ManCoNum(pFrames) == Vec_VecSizeSize(vCands) );
     // start the SAT solver
-    pCnf = Cnf_DeriveSimple( pFrames, Aig_ManPoNum(pFrames) );
+    pCnf = Cnf_DeriveSimple( pFrames, Aig_ManCoNum(pFrames) );
     pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
     // check candidates
     if ( fVerbose )
@@ -500,7 +500,7 @@ void Saig_CollectSatValues( sat_solver * pSat, Cnf_Dat_t * pCnf, Vec_Ptr_t * vIn
     int i;
     Aig_ManForEachObj( pCnf->pMan, pObj, i )
     {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
             continue;
         assert( pCnf->pVarNums[i] > 0 );
         pInfo = (unsigned *)Vec_PtrEntry( vInfo, i );
@@ -522,7 +522,7 @@ void Saig_CollectSatValues( sat_solver * pSat, Cnf_Dat_t * pCnf, Vec_Ptr_t * vIn
 ***********************************************************************/
 int Saig_DetectTryPolarity( sat_solver * pSat, int nConfs, int nProps, Cnf_Dat_t * pCnf, Aig_Obj_t * pObj, int iPol, Vec_Ptr_t * vInfo, int * piPat, int fVerbose )
 {
-    Aig_Obj_t * pOut = Aig_ManPo( pCnf->pMan, 0 );
+    Aig_Obj_t * pOut = Aig_ManCo( pCnf->pMan, 0 );
     int status, Lits[2];
 //    ABC_INT64_T nOldConfs = pSat->stats.conflicts;
 //    ABC_INT64_T nOldImps = pSat->stats.propagations;
@@ -576,7 +576,7 @@ Vec_Vec_t * Ssw_ManFindDirectImplications( Aig_Man_t * p, int nFrames, int nConf
 
     // perform unrolling
     pFrames = Saig_ManUnrollCOI( p, nFrames );
-    assert( Aig_ManPoNum(pFrames) == 1 );
+    assert( Aig_ManCoNum(pFrames) == 1 );
     // start the SAT solver
     pCnf = Cnf_DeriveSimple( pFrames, 0 );
     pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
@@ -679,7 +679,7 @@ Vec_Vec_t * Saig_ManDetectConstrFunc( Aig_Man_t * p, int nFrames, int nConfs, in
 
     // perform unrolling
     pFrames = Saig_ManUnrollCOI( p, nFrames );
-    assert( Aig_ManPoNum(pFrames) == 1 );
+    assert( Aig_ManCoNum(pFrames) == 1 );
     if ( fVerbose )
     {
         printf( "Detecting constraints with %d frames, %d conflicts, and %d propagations.\n", nFrames, nConfs, nProps );
@@ -689,12 +689,12 @@ Vec_Vec_t * Saig_ManDetectConstrFunc( Aig_Man_t * p, int nFrames, int nConfs, in
 //    Aig_ManShow( pFrames, 0, NULL );
 
     // start the SAT solver
-    pCnf = Cnf_DeriveSimple( pFrames, Aig_ManPoNum(pFrames) );
+    pCnf = Cnf_DeriveSimple( pFrames, Aig_ManCoNum(pFrames) );
     pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
 //printf( "Implications = %d.\n", pSat->qhead );
 
     // solve the original problem
-    Lit = toLitCond( pCnf->pVarNums[Aig_ObjId(Aig_ManPo(pFrames,0))], 0 );
+    Lit = toLitCond( pCnf->pVarNums[Aig_ObjId(Aig_ManCo(pFrames,0))], 0 );
     status = sat_solver_solve( pSat, &Lit, &Lit + 1, (ABC_INT64_T)nConfs, 0, 0, 0 );
     if ( status == l_False )
     {
@@ -732,7 +732,7 @@ Vec_Vec_t * Saig_ManDetectConstrFunc( Aig_Man_t * p, int nFrames, int nConfs, in
     Aig_ManCleanMarkAB( pFrames );
     Aig_ManForEachObj( pFrames, pObj, i )
     {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
             continue;
         Bar_ProgressUpdate( pProgress, i, NULL );
         // check if the node is available in both polarities
@@ -774,7 +774,7 @@ Vec_Vec_t * Saig_ManDetectConstrFunc( Aig_Man_t * p, int nFrames, int nConfs, in
         {
             Aig_ManForEachObj( p, pObj, i )
             {
-                if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+                if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
                     continue;
                 pRepr = p->pObjCopies[nFrames*i + nFrames-1-k];
 //                pRepr = p->pObjCopies[nFrames*i + k];
diff --git a/src/aig/saig/saigDup.c b/src/aig/saig/saigDup.c
index 7e1499b4..cd978717 100644
--- a/src/aig/saig/saigDup.c
+++ b/src/aig/saig/saigDup.c
@@ -153,7 +153,7 @@ Aig_Man_t * Saig_ManTrimPis( Aig_Man_t * p )
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->nConstrs = p->nConstrs;
     // start mapping of the CI numbers
-    pNew->vCiNumsOrig = Vec_IntAlloc( Aig_ManPiNum(p) );
+    pNew->vCiNumsOrig = Vec_IntAlloc( Aig_ManCiNum(p) );
     // map const and primary inputs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -225,7 +225,7 @@ Aig_Man_t * Saig_ManDupAbstraction( Aig_Man_t * p, Vec_Int_t * vFlops )
     }
     // create variables for PIs
     assert( p->vCiNumsOrig == NULL );
-    pNew->vCiNumsOrig = Vec_IntAlloc( Aig_ManPiNum(p) );
+    pNew->vCiNumsOrig = Vec_IntAlloc( Aig_ManCiNum(p) );
     Aig_ManForEachCi( p, pObj, i )
         if ( !pObj->fMarkA )
         {
@@ -299,7 +299,7 @@ int Saig_ManVerifyCex( Aig_Man_t * pAig, Abc_Cex_t * p )
             pObjRo->fMarkB = pObjRi->fMarkB;
     }
     assert( iBit == p->nBits );
-    RetValue = Aig_ManPo(pAig, p->iPo)->fMarkB;
+    RetValue = Aig_ManCo(pAig, p->iPo)->fMarkB;
     Aig_ManCleanMarkB(pAig);
     return RetValue;
 }
@@ -321,7 +321,7 @@ Abc_Cex_t * Saig_ManExtendCex( Aig_Man_t * pAig, Abc_Cex_t * p )
     Aig_Obj_t * pObj, * pObjRi, * pObjRo;
     int RetValue, i, k, iBit = 0;
     // create new counter-example
-    pNew = Abc_CexAlloc( 0, Aig_ManPiNum(pAig), p->iFrame + 1 );
+    pNew = Abc_CexAlloc( 0, Aig_ManCiNum(pAig), p->iFrame + 1 );
     pNew->iPo = p->iPo;
     pNew->iFrame = p->iFrame;
     // simulate the AIG
@@ -336,7 +336,7 @@ Abc_Cex_t * Saig_ManExtendCex( Aig_Man_t * pAig, Abc_Cex_t * p )
         ///////// write PI+LO values ////////////
         Aig_ManForEachCi( pAig, pObj, k )
             if ( pObj->fMarkB )
-                Abc_InfoSetBit(pNew->pData, Aig_ManPiNum(pAig)*i + k);
+                Abc_InfoSetBit(pNew->pData, Aig_ManCiNum(pAig)*i + k);
         /////////////////////////////////////////
         Aig_ManForEachNode( pAig, pObj, k )
             pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) & 
@@ -349,7 +349,7 @@ Abc_Cex_t * Saig_ManExtendCex( Aig_Man_t * pAig, Abc_Cex_t * p )
             pObjRo->fMarkB = pObjRi->fMarkB;
     }
     assert( iBit == p->nBits );
-    RetValue = Aig_ManPo(pAig, p->iPo)->fMarkB;
+    RetValue = Aig_ManCo(pAig, p->iPo)->fMarkB;
     Aig_ManCleanMarkB(pAig);
     if ( RetValue == 0 )
         printf( "Saig_ManExtendCex(): The counter-example is invalid!!!\n" );
@@ -468,7 +468,7 @@ void Saig_ManDupCones_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vLeaves,
         Saig_ManDupCones_rec( p, Aig_ObjFanin1(pObj), vLeaves, vNodes, vRoots );
         Vec_PtrPush( vNodes, pObj );
     }
-    else if ( Aig_ObjIsPo(pObj) )
+    else if ( Aig_ObjIsCo(pObj) )
         Saig_ManDupCones_rec( p, Aig_ObjFanin0(pObj), vLeaves, vNodes, vRoots );
     else if ( Saig_ObjIsLo(p, pObj) )
         Vec_PtrPush( vRoots, Saig_ObjLoToLi(p, pObj) );
@@ -488,7 +488,7 @@ Aig_Man_t * Saig_ManDupCones( Aig_Man_t * pAig, int * pPos, int nPos )
     vNodes = Vec_PtrAlloc( 100 );
     vRoots = Vec_PtrAlloc( 100 );
     for ( i = 0; i < nPos; i++ )
-        Vec_PtrPush( vRoots, Aig_ManPo(pAig, pPos[i]) );
+        Vec_PtrPush( vRoots, Aig_ManCo(pAig, pPos[i]) );
 
     // mark internal nodes
     Aig_ManIncrementTravId( pAig );
diff --git a/src/aig/saig/saigGlaCba.c b/src/aig/saig/saigGlaCba.c
index f3bfc695..459d8ede 100644
--- a/src/aig/saig/saigGlaCba.c
+++ b/src/aig/saig/saigGlaCba.c
@@ -730,7 +730,7 @@ Vec_Int_t * Aig_Gla1ManPerform( Aig_Man_t * pAig, Vec_Int_t * vGateClassesOld, i
             continue;
 
         // create output literal to represent property failure
-        pObj    = Aig_ManPo( pAig, 0 );
+        pObj    = Aig_ManCo( pAig, 0 );
         iSatVar = Aig_Gla1FetchVar( p, Aig_ObjFanin0(pObj), f );
         Lit     = toLitCond( iSatVar, Aig_ObjFaninC0(pObj) );
 
diff --git a/src/aig/saig/saigGlaPba.c b/src/aig/saig/saigGlaPba.c
index cdc91759..6f461995 100644
--- a/src/aig/saig/saigGlaPba.c
+++ b/src/aig/saig/saigGlaPba.c
@@ -229,7 +229,7 @@ void Aig_Gla2AssignVars_rec( Aig_Gla2Man_t * p, Aig_Obj_t * pObj, int f )
         Aig_Gla2AssignVars_rec( p, Aig_ObjFanin0(pObj), f );
         return;
     }
-    if ( Aig_ObjIsPi( pObj ) )
+    if ( Aig_ObjIsCi( pObj ) )
     {
         if ( Saig_ObjIsLo(p->pAig, pObj) && f > 0 )
             Aig_Gla2AssignVars_rec( p, Aig_ObjFanin0( Saig_ObjLoToLi(p->pAig, pObj) ), f-1 );
@@ -260,7 +260,7 @@ int Aig_Gla2CreateSatSolver( Aig_Gla2Man_t * p )
     // assign variables
     for ( f = p->nFramesMax - 1; f >= 0; f-- )
 //    for ( f = 0; f < p->nFramesMax; f++ )
-        Aig_Gla2AssignVars_rec( p, Aig_ManPo(p->pAig, 0), f );
+        Aig_Gla2AssignVars_rec( p, Aig_ManCo(p->pAig, 0), f );
 
     // create SAT solver
     p->pSat = sat_solver_new();
@@ -334,7 +334,7 @@ int Aig_Gla2CreateSatSolver( Aig_Gla2Man_t * p )
     // add output clause
     vPoLits = Vec_IntAlloc( p->nFramesMax );
     for ( f = p->nStart; f < p->nFramesMax; f++ )
-        Vec_IntPush( vPoLits, 2 * Aig_Gla2FetchVar(p, Aig_ManPo(p->pAig, 0), f) );
+        Vec_IntPush( vPoLits, 2 * Aig_Gla2FetchVar(p, Aig_ManCo(p->pAig, 0), f) );
     RetValue &= sat_solver_addclause( p->pSat, Vec_IntArray(vPoLits), Vec_IntArray(vPoLits) + Vec_IntSize(vPoLits) );
     Vec_IntFree( vPoLits );
     Vec_IntPush( p->vCla2Obj, 0 );
diff --git a/src/aig/saig/saigGlaPba2.c b/src/aig/saig/saigGlaPba2.c
index 8417cbf5..a7122d01 100644
--- a/src/aig/saig/saigGlaPba2.c
+++ b/src/aig/saig/saigGlaPba2.c
@@ -198,7 +198,7 @@ void Aig_Gla3AssignVars_rec( Aig_Gla3Man_t * p, Aig_Obj_t * pObj, int f )
         Aig_Gla3AssignVars_rec( p, Aig_ObjFanin0(pObj), f );
         return;
     }
-    if ( Aig_ObjIsPi( pObj ) )
+    if ( Aig_ObjIsCi( pObj ) )
     {
         if ( Saig_ObjIsLo(p->pAig, pObj) && f > 0 )
             Aig_Gla3AssignVars_rec( p, Aig_ObjFanin0( Saig_ObjLoToLi(p->pAig, pObj) ), f-1 );
@@ -228,7 +228,7 @@ int Aig_Gla3CreateSatSolver( Aig_Gla3Man_t * p )
 
     // assign variables
     for ( f = p->nFramesMax - 1; f >= 0; f-- )
-        Aig_Gla3AssignVars_rec( p, Aig_ManPo(p->pAig, 0), f );
+        Aig_Gla3AssignVars_rec( p, Aig_ManCo(p->pAig, 0), f );
 
     // create SAT solver
     p->pSat = sat_solver2_new();
@@ -301,7 +301,7 @@ int Aig_Gla3CreateSatSolver( Aig_Gla3Man_t * p )
     // add output clause
     vPoLits = Vec_IntAlloc( p->nFramesMax );
     for ( f = p->nStart; f < p->nFramesMax; f++ )
-        Vec_IntPush( vPoLits, 2 * Aig_Gla3FetchVar(p, Aig_ManPo(p->pAig, 0), f) );
+        Vec_IntPush( vPoLits, 2 * Aig_Gla3FetchVar(p, Aig_ManCo(p->pAig, 0), f) );
     sat_solver2_addclause( p->pSat, Vec_IntArray(vPoLits), Vec_IntArray(vPoLits) + Vec_IntSize(vPoLits) );
     Vec_IntFree( vPoLits );
     Vec_IntPush( p->vCla2Obj, 0 );
diff --git a/src/aig/saig/saigHaig.c b/src/aig/saig/saigHaig.c
index ef90734a..d3539abb 100644
--- a/src/aig/saig/saigHaig.c
+++ b/src/aig/saig/saigHaig.c
@@ -122,7 +122,7 @@ Aig_Man_t * Aig_ManHaigFrames( Aig_Man_t * pHaig, int nFrames )
             Aig_ManHaigSpeculate( pFrames, pObj );
         }
         if ( f == nFrames - 2 )
-            nAssumptions = Aig_ManPoNum(pFrames);
+            nAssumptions = Aig_ManCoNum(pFrames);
         if ( f == nFrames - 1 )
             break;
         // save register inputs
@@ -133,7 +133,7 @@ Aig_Man_t * Aig_ManHaigFrames( Aig_Man_t * pHaig, int nFrames )
             pObjLo->pData = pObjLi->pData;
     }
     Aig_ManCleanup( pFrames );
-    pFrames->nAsserts = Aig_ManPoNum(pFrames) - nAssumptions;
+    pFrames->nAsserts = Aig_ManCoNum(pFrames) - nAssumptions;
     Aig_ManSetRegNum( pFrames, 0 );
     return pFrames;
 }
@@ -161,13 +161,13 @@ int Aig_ManMapHaigNodes( Aig_Man_t * pHaig )
         pObj1 = Aig_ManObj( pHaig, Id1 );
         pObj2 = Aig_ManObj( pHaig, Id2 );
         assert( pObj1 != pObj2 );
-        assert( !Aig_ObjIsPi(pObj1) || !Aig_ObjIsPi(pObj2) );
-        if ( Aig_ObjIsPi(pObj1) )
+        assert( !Aig_ObjIsCi(pObj1) || !Aig_ObjIsCi(pObj2) );
+        if ( Aig_ObjIsCi(pObj1) )
         {
             Counter += (int)(pObj2->pHaig != NULL);
             pObj2->pHaig = pObj1;
         }
-        else if ( Aig_ObjIsPi(pObj2) )
+        else if ( Aig_ObjIsCi(pObj2) )
         {
             Counter += (int)(pObj1->pHaig != NULL);
             pObj1->pHaig = pObj2;
@@ -225,13 +225,13 @@ clk = clock();
     Aig_ManPrintStats( pFrames );
 
     printf( "Additional frames stats: Assumptions = %d. Assertions = %d. Pairs = %d. Over = %d.\n", 
-        Aig_ManPoNum(pFrames)/2 - pFrames->nAsserts/2, pFrames->nAsserts/2, Vec_IntSize(pHaig->vEquPairs)/2, nOvers );
-//    pCnf = Cnf_DeriveSimple( pFrames, Aig_ManPoNum(pFrames) );
-    pCnf = Cnf_Derive( pFrames, Aig_ManPoNum(pFrames) );
+        Aig_ManCoNum(pFrames)/2 - pFrames->nAsserts/2, pFrames->nAsserts/2, Vec_IntSize(pHaig->vEquPairs)/2, nOvers );
+//    pCnf = Cnf_DeriveSimple( pFrames, Aig_ManCoNum(pFrames) );
+    pCnf = Cnf_Derive( pFrames, Aig_ManCoNum(pFrames) );
 
 
 
-//    pCnf = Cnf_Derive( pFrames, Aig_ManPoNum(pFrames) - pFrames->nAsserts );
+//    pCnf = Cnf_Derive( pFrames, Aig_ManCoNum(pFrames) - pFrames->nAsserts );
 //Cnf_DataWriteIntoFile( pCnf, "temp.cnf", 1 );
 //    Saig_ManDumpBlif( pHaig, "haig_temp.blif" );
 //    Saig_ManDumpBlif( pFrames, "haig_temp_frames.blif" );
@@ -248,10 +248,10 @@ clk = clock();
         // add clauses for the first frame
         Aig_ManForEachCo( pFrames, pObj1, i )
         {
-            if ( i >= Aig_ManPoNum(pFrames) - pFrames->nAsserts )
+            if ( i >= Aig_ManCoNum(pFrames) - pFrames->nAsserts )
                 break;
 
-            pObj2 = Aig_ManPo( pFrames, ++i );
+            pObj2 = Aig_ManCo( pFrames, ++i );
             assert( pObj1->fPhase == pObj2->fPhase );
 
             Lits[0] = toLitCond( pCnf->pVarNums[pObj1->Id], 0 );
@@ -285,10 +285,10 @@ clk = clock();
     printf( "Started solving ...\r" );
     Aig_ManForEachCo( pFrames, pObj1, i )
     {
-        if ( i < Aig_ManPoNum(pFrames) - pFrames->nAsserts )
+        if ( i < Aig_ManCoNum(pFrames) - pFrames->nAsserts )
             continue;
 
-        pObj2 = Aig_ManPo( pFrames, ++i );
+        pObj2 = Aig_ManCo( pFrames, ++i );
         assert( pObj1->fPhase == pObj2->fPhase );
 
         Lits[0] = toLitCond( pCnf->pVarNums[pObj1->Id], 0 );
@@ -320,7 +320,7 @@ clk = clock();
 
         if ( i % 50 == 1 )
             printf( "Solving assertion %6d out of %6d.\r", 
-                (i - (Aig_ManPoNum(pFrames) - pFrames->nAsserts))/2, 
+                (i - (Aig_ManCoNum(pFrames) - pFrames->nAsserts))/2, 
                 pFrames->nAsserts/2 );
 //        if ( nClasses == 1000 )
 //            break;
@@ -376,7 +376,7 @@ clkVerif = clock() - clk;
         fprintf( pTable, "%d ", pCnf->nClauses );
         fprintf( pTable, "%d ", pCnf->nLiterals );
 
-        fprintf( pTable, "%d ", Aig_ManPoNum(pFrames)/2 - pFrames->nAsserts/2 );
+        fprintf( pTable, "%d ", Aig_ManCoNum(pFrames)/2 - pFrames->nAsserts/2 );
         fprintf( pTable, "%d ", pFrames->nAsserts/2 );
         fprintf( pTable, "%d ", Vec_IntSize(pHaig->vEquPairs)/2 );
 
@@ -419,7 +419,7 @@ int Aig_ManHaigVerify2( Aig_Man_t * p, Aig_Man_t * pAig, Aig_Man_t * pHaig, int
     assert( nFrames == 1 || nFrames == 2 );
 
 clk = clock();
-    pCnf = Cnf_DeriveSimple( pHaig, Aig_ManPoNum(pHaig) );
+    pCnf = Cnf_DeriveSimple( pHaig, Aig_ManCoNum(pHaig) );
 //    Aig_ManForEachObj( pHaig, pObj, i )
 //        printf( "%d=%d  ", pObj->Id, pCnf->pVarNums[pObj->Id] );
 //    printf( "\n" );
@@ -572,8 +572,8 @@ Aig_Man_t * Saig_ManHaigDump( Aig_Man_t * pHaig )
             Vec_PtrPush( vTemp, pObj );
         }
     }
-    Vec_PtrShrink( pHaig->vPos, 0 ); 
-    pHaig->nObjs[AIG_OBJ_PO] = Vec_PtrSize( vTemp );
+    Vec_PtrShrink( pHaig->vCos, 0 ); 
+    pHaig->nObjs[AIG_OBJ_CO] = Vec_PtrSize( vTemp );
     // add new POs
     Vec_IntForEachEntry( pHaig->vEquPairs, Id1, i )
     {
@@ -581,7 +581,7 @@ Aig_Man_t * Saig_ManHaigDump( Aig_Man_t * pHaig )
         pObj1 = Aig_ManObj( pHaig, Id1 );
         pObj2 = Aig_ManObj( pHaig, Id2 );
         assert( pObj1 != pObj2 );
-        assert( !Aig_ObjIsPi(pObj1) || !Aig_ObjIsPi(pObj2) );
+        assert( !Aig_ObjIsCi(pObj1) || !Aig_ObjIsCi(pObj2) );
         pMiter = Aig_Exor( pHaig, pObj1, pObj2 );
         pMiter = Aig_NotCond( pMiter, Aig_ObjPhaseReal(pMiter) );
         assert( Aig_ObjPhaseReal(pMiter) == 0 );
@@ -590,9 +590,9 @@ Aig_Man_t * Saig_ManHaigDump( Aig_Man_t * pHaig )
     printf( "Added %d property outputs.\n", Vec_IntSize(pHaig->vEquPairs)/2 );
     // add the registers
     Vec_PtrForEachEntry( Aig_Obj_t *, vTemp, pObj, i )
-        Vec_PtrPush( pHaig->vPos, pObj );
+        Vec_PtrPush( pHaig->vCos, pObj );
     Vec_PtrFree( vTemp );
-    assert( pHaig->nObjs[AIG_OBJ_PO] ==  Vec_PtrSize(pHaig->vPos) ); 
+    assert( pHaig->nObjs[AIG_OBJ_CO] ==  Vec_PtrSize(pHaig->vCos) ); 
     Aig_ManCleanup( pHaig );
     Aig_ManSetRegNum( pHaig, pHaig->nRegs );
 //    return pHaig;
diff --git a/src/aig/saig/saigInd.c b/src/aig/saig/saigInd.c
index 0dd1e7d2..18aebc74 100644
--- a/src/aig/saig/saigInd.c
+++ b/src/aig/saig/saigInd.c
@@ -160,7 +160,7 @@ int Saig_ManInduction( Aig_Man_t * p, int nFramesMax, int nConfMax, int fUnique,
     vBot = Vec_PtrAlloc( 100 );
     vTop = Vec_PtrAlloc( 100 );
     vState = Vec_IntAlloc( 1000 );
-    Vec_PtrPush( vTop, Aig_ManPo(p, 0) );
+    Vec_PtrPush( vTop, Aig_ManCo(p, 0) );
     // start the array of CNF variables
     vTopVarNums = Vec_IntAlloc( 100 );
     // start the solver
@@ -185,7 +185,7 @@ int Saig_ManInduction( Aig_Man_t * p, int nFramesMax, int nConfMax, int fUnique,
         // derive AIG for the part between top and bottom
         pAigPart = Aig_ManDupSimpleDfsPart( p, vBot, vTop );
         // convert it into CNF
-        pCnfPart = Cnf_Derive( pAigPart, Aig_ManPoNum(pAigPart) );
+        pCnfPart = Cnf_Derive( pAigPart, Aig_ManCoNum(pAigPart) );
         Cnf_DataLift( pCnfPart, nSatVarNum );
         nSatVarNum += pCnfPart->nVars;
         nClauses   += pCnfPart->nClauses;
@@ -193,13 +193,13 @@ int Saig_ManInduction( Aig_Man_t * p, int nFramesMax, int nConfMax, int fUnique,
         // remember top frame var IDs
         if ( fGetCex && vTopVarIds == NULL )
         {
-            vTopVarIds = Vec_IntStartFull( Aig_ManPiNum(p) );
+            vTopVarIds = Vec_IntStartFull( Aig_ManCiNum(p) );
             Aig_ManForEachCi( p, pObjPi, i )
             {
                 if ( pObjPi->pData == NULL )
                     continue;
                 pObjPiCopy = (Aig_Obj_t *)pObjPi->pData;
-                assert( Aig_ObjIsPi(pObjPiCopy) );
+                assert( Aig_ObjIsCi(pObjPiCopy) );
                 if ( Saig_ObjIsPi(p, pObjPi) )
                     Vec_IntWriteEntry( vTopVarIds, Aig_ObjPioNum(pObjPi) + Saig_ManRegNum(p), pCnfPart->pVarNums[Aig_ObjId(pObjPiCopy)] );
                 else if ( Saig_ObjIsLo(p, pObjPi) )
@@ -209,7 +209,7 @@ int Saig_ManInduction( Aig_Man_t * p, int nFramesMax, int nConfMax, int fUnique,
         }
 
         // stitch variables of top and bot
-        assert( Aig_ManPoNum(pAigPart)-1 == Vec_IntSize(vTopVarNums) );
+        assert( Aig_ManCoNum(pAigPart)-1 == Vec_IntSize(vTopVarNums) );
         Aig_ManForEachCo( pAigPart, pObjPo, i )
         {
             if ( i == 0 )
@@ -247,13 +247,13 @@ int Saig_ManInduction( Aig_Man_t * p, int nFramesMax, int nConfMax, int fUnique,
 
         // create new set of POs to derive new top
         Vec_PtrClear( vTop );
-        Vec_PtrPush( vTop, Aig_ManPo(p, 0) );
+        Vec_PtrPush( vTop, Aig_ManCo(p, 0) );
         Vec_IntClear( vTopVarNums );
         nOldSize = Vec_IntSize(vState);
         Vec_IntFillExtra( vState, nOldSize + Aig_ManRegNum(p), -1 );
         Vec_PtrForEachEntry( Aig_Obj_t *, vBot, pObjPi, i )
         {
-            assert( Aig_ObjIsPi(pObjPi) );
+            assert( Aig_ObjIsCi(pObjPi) );
             if ( Saig_ObjIsLo(p, pObjPi) )
             {
                 pObjPiCopy = (Aig_Obj_t *)pObjPi->pData;
@@ -286,7 +286,7 @@ nextrun:
         if ( fVerbose )
         {
             printf( "%4d : PI =%5d. PO =%5d. AIG =%5d. Var =%7d. Clau =%7d. Conf =%7d. ",
-                f, Aig_ManPiNum(pAigPart), Aig_ManPoNum(pAigPart), Aig_ManNodeNum(pAigPart), 
+                f, Aig_ManCiNum(pAigPart), Aig_ManCoNum(pAigPart), Aig_ManNodeNum(pAigPart), 
                 nSatVarNum, nClauses, (int)pSat->stats.conflicts-nConfPrev );
             ABC_PRT( "Time", clock() - clk );
         }
diff --git a/src/aig/saig/saigIoa.c b/src/aig/saig/saigIoa.c
index 82d6c9af..9eba652d 100644
--- a/src/aig/saig/saigIoa.c
+++ b/src/aig/saig/saigIoa.c
@@ -77,7 +77,7 @@ void Saig_ManDumpBlif( Aig_Man_t * p, char * pFileName )
     FILE * pFile;
     Aig_Obj_t * pObj, * pObjLi, * pObjLo;
     int i;
-    if ( Aig_ManPoNum(p) == 0 )
+    if ( Aig_ManCoNum(p) == 0 )
     {
         printf( "Aig_ManDumpBlif(): AIG manager does not have POs.\n" );
         return;
@@ -208,7 +208,7 @@ Aig_Obj_t * Saig_ManReadNode( Aig_Man_t * p, int * pNum2Id, char * pToken )
         if ( pToken[0] == 'i' )
         {
             Num = atoi( pToken + 1 );
-            return Aig_ManPi( p, Num );
+            return Aig_ManCi( p, Num );
         }
         if ( pToken[0] == 'o' )
             return NULL;
@@ -382,7 +382,7 @@ Aig_Man_t * Saig_ManReadBlif( char * pFileName )
     }
     if ( pToken == NULL || strcmp( pToken, ".end" ) ) 
         { printf( "Saig_ManReadBlif(): Error 19.\n" ); Aig_ManStop(p); return NULL; }
-    if ( nPos + nRegs != Aig_ManPoNum(p) ) 
+    if ( nPos + nRegs != Aig_ManCoNum(p) ) 
         { printf( "Saig_ManReadBlif(): Error 20.\n" ); Aig_ManStop(p); return NULL; }
     // add non-node objects to the mapping
     Aig_ManForEachCi( p, pNode, i )
diff --git a/src/aig/saig/saigIso.c b/src/aig/saig/saigIso.c
index dac8e273..d68819f3 100644
--- a/src/aig/saig/saigIso.c
+++ b/src/aig/saig/saigIso.c
@@ -49,8 +49,8 @@ Vec_Int_t * Saig_ManFindIsoPermCos( Aig_Man_t * pAig, Vec_Int_t * vPermCis )
     Vec_Int_t * vPermCos;
     Aig_Obj_t * pObj, * pFanin;
     int i, Entry, Diff;
-    assert( Vec_IntSize(vPermCis) == Aig_ManPiNum(pAig) );
-    vPermCos = Vec_IntAlloc( Aig_ManPoNum(pAig) );
+    assert( Vec_IntSize(vPermCis) == Aig_ManCiNum(pAig) );
+    vPermCos = Vec_IntAlloc( Aig_ManCoNum(pAig) );
     if ( Saig_ManPoNum(pAig) == 1 )
         Vec_IntPush( vPermCos, 0 );
     else
@@ -145,20 +145,20 @@ Aig_Man_t * Saig_ManDupIsoCanonical( Aig_Man_t * pAig, int fVerbose )
     // create PIs
     Vec_IntForEachEntry( vPerm, Entry, i )
     {
-        pObj = Aig_ManPi(pAig, Entry);
+        pObj = Aig_ManCi(pAig, Entry);
         pObj->pData = Aig_ObjCreateCi(pNew);
         Aig_ObjSetTravIdCurrent( pAig, pObj );
     }
     // traverse from the POs
     Vec_IntForEachEntry( vPermCo, Entry, i )
     {
-        pObj = Aig_ManPo(pAig, Entry);
+        pObj = Aig_ManCo(pAig, Entry);
         Saig_ManDupIsoCanonical_rec( pNew, pAig, Aig_ObjFanin0(pObj) );
     }
     // create POs
     Vec_IntForEachEntry( vPermCo, Entry, i )
     {
-        pObj = Aig_ManPo(pAig, Entry);
+        pObj = Aig_ManCo(pAig, Entry);
         Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     }
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(pAig) );
@@ -187,15 +187,15 @@ int Iso_ManCheckMapping( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Vec_Int_t * vMap2
 {
     Aig_Obj_t * pObj, * pFanin0, * pFanin1;
     int i;
-    assert( Aig_ManPiNum(pAig1) == Aig_ManPiNum(pAig2) );
-    assert( Aig_ManPoNum(pAig1) == Aig_ManPoNum(pAig2) );
+    assert( Aig_ManCiNum(pAig1) == Aig_ManCiNum(pAig2) );
+    assert( Aig_ManCoNum(pAig1) == Aig_ManCoNum(pAig2) );
     assert( Aig_ManRegNum(pAig1) == Aig_ManRegNum(pAig2) );
     assert( Aig_ManNodeNum(pAig1) == Aig_ManNodeNum(pAig2) );
     Aig_ManCleanData( pAig1 );
     // map const and PI nodes
     Aig_ManConst1(pAig2)->pData = Aig_ManConst1(pAig1);
     Aig_ManForEachCi( pAig2, pObj, i )
-        pObj->pData = Aig_ManPi( pAig1, Vec_IntEntry(vMap2to1, i) );
+        pObj->pData = Aig_ManCi( pAig1, Vec_IntEntry(vMap2to1, i) );
     // try internal nodes
     Aig_ManForEachNode( pAig2, pObj, i )
     {
@@ -210,7 +210,7 @@ int Iso_ManCheckMapping( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Vec_Int_t * vMap2
         }
     }
     // make sure the first PO points to the same node
-    if ( Aig_ManPoNum(pAig1)-Aig_ManRegNum(pAig1) == 1 && Aig_ObjChild0Copy(Aig_ManPo(pAig2, 0)) != Aig_ObjChild0(Aig_ManPo(pAig1, 0)) )
+    if ( Aig_ManCoNum(pAig1)-Aig_ManRegNum(pAig1) == 1 && Aig_ObjChild0Copy(Aig_ManCo(pAig2, 0)) != Aig_ObjChild0(Aig_ManCo(pAig1, 0)) )
     {
         if ( fVerbose )
             printf( "Structural equivalence failed at primary output 0.\n" );
@@ -244,7 +244,7 @@ int Iso_ManNegEdgeNum( Aig_Man_t * pAig )
             Counter += Aig_ObjFaninC0(pObj);
             Counter += Aig_ObjFaninC1(pObj);
         }
-        else if ( Aig_ObjIsPo(pObj) )
+        else if ( Aig_ObjIsCo(pObj) )
             Counter += Aig_ObjFaninC0(pObj);
     return (pAig->nComplEdges = Counter);
 }
@@ -265,9 +265,9 @@ Vec_Int_t * Iso_ManFindMapping( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Vec_Int_t
 {
     Vec_Int_t * vPerm1, * vPerm2, * vInvPerm2;
     int i, Entry;
-    if ( Aig_ManPiNum(pAig1) != Aig_ManPiNum(pAig2) )
+    if ( Aig_ManCiNum(pAig1) != Aig_ManCiNum(pAig2) )
         return NULL;
-    if ( Aig_ManPoNum(pAig1) != Aig_ManPoNum(pAig2) )
+    if ( Aig_ManCoNum(pAig1) != Aig_ManCoNum(pAig2) )
         return NULL;
     if ( Aig_ManRegNum(pAig1) != Aig_ManRegNum(pAig2) )
         return NULL;
@@ -286,15 +286,15 @@ Vec_Int_t * Iso_ManFindMapping( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Vec_Int_t
         printf( "AIG1:\n" );
     vPerm2 = vPerm2_ ? vPerm2_ : Saig_ManFindIsoPerm( pAig2, fVerbose );
     if ( vPerm1_ )
-        assert( Vec_IntSize(vPerm1_) == Aig_ManPiNum(pAig1) );
+        assert( Vec_IntSize(vPerm1_) == Aig_ManCiNum(pAig1) );
     if ( vPerm2_ )
-        assert( Vec_IntSize(vPerm2_) == Aig_ManPiNum(pAig2) );
+        assert( Vec_IntSize(vPerm2_) == Aig_ManCiNum(pAig2) );
     // find canonical permutation
     // vPerm1/vPerm2 give canonical order of CIs of AIG1/AIG2
     vInvPerm2 = Vec_IntInvert( vPerm2, -1 );
     Vec_IntForEachEntry( vInvPerm2, Entry, i )
     {
-        assert( Entry >= 0 && Entry < Aig_ManPiNum(pAig1) );
+        assert( Entry >= 0 && Entry < Aig_ManCiNum(pAig1) );
         Vec_IntWriteEntry( vInvPerm2, i, Vec_IntEntry(vPerm1, Entry) );
     }
     if ( vPerm1_ == NULL )
@@ -328,7 +328,7 @@ Aig_Man_t * Iso_ManFilterPos_old( Aig_Man_t * pAig, int fVerbose )
     int i, k, nPos;
 
     // derive AIG for each PO
-    nPos = Aig_ManPoNum(pAig) - Aig_ManRegNum(pAig);
+    nPos = Aig_ManCoNum(pAig) - Aig_ManRegNum(pAig);
     vParts = Vec_PtrAlloc( nPos );
     vPerms = Vec_PtrAlloc( nPos );
     for ( i = 0; i < nPos; i++ )
@@ -431,7 +431,7 @@ Aig_Man_t * Iso_ManFilterPos( Aig_Man_t * pAig, Vec_Ptr_t ** pvPosEquivs, int fV
     *pvPosEquivs = NULL;
 
     // derive AIG for each PO
-    nPos = Aig_ManPoNum(pAig) - Aig_ManRegNum(pAig);
+    nPos = Aig_ManCoNum(pAig) - Aig_ManRegNum(pAig);
     vBuffers = Vec_PtrAlloc( nPos );
     for ( i = 0; i < nPos; i++ )
     {
diff --git a/src/aig/saig/saigIsoFast.c b/src/aig/saig/saigIsoFast.c
index befbf934..a7cc942c 100644
--- a/src/aig/saig/saigIsoFast.c
+++ b/src/aig/saig/saigIsoFast.c
@@ -111,7 +111,7 @@ void Iso_StoStop( Iso_Sto_t * p )
 void Iso_StoCollectInfo_rec( Aig_Man_t * p, Aig_Obj_t * pObj, int fCompl, Vec_Int_t * vVisited, Iso_Dat_t * pData, Vec_Ptr_t * vRoots )
 {
     Iso_Dat_t * pThis = pData + Aig_ObjId(pObj);
-    assert( Aig_ObjIsPi(pObj) || Aig_ObjIsNode(pObj) );
+    assert( Aig_ObjIsCi(pObj) || Aig_ObjIsNode(pObj) );
     if ( pThis->fVisit )
     {
         if ( fCompl )
@@ -183,7 +183,7 @@ Vec_Int_t * Iso_StoCollectInfo( Iso_Sto_t * p, Aig_Obj_t * pPo )
     int i, Value, Entry, * pPerm;
 //    int clk = clock();
 
-    assert( Aig_ObjIsPo(pPo) );
+    assert( Aig_ObjIsCo(pPo) );
 
     // collect initial POs
     Vec_IntClear( p->vVisited );
diff --git a/src/aig/saig/saigIsoSlow.c b/src/aig/saig/saigIsoSlow.c
index eabf7c1b..e4c1dc47 100644
--- a/src/aig/saig/saigIsoSlow.c
+++ b/src/aig/saig/saigIsoSlow.c
@@ -393,7 +393,7 @@ void Iso_FindNumbers()
 ***********************************************************************/
 void Iso_ManObjCount_rec( Aig_Man_t * p, Aig_Obj_t * pObj, int * pnNodes, int * pnEdges )
 {
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return;
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return;
@@ -490,8 +490,8 @@ int Iso_ObjCompareByData( Aig_Obj_t ** pp1, Aig_Obj_t ** pp2 )
 {
     Aig_Obj_t * pIso1 = *pp1;
     Aig_Obj_t * pIso2 = *pp2;
-    assert( Aig_ObjIsPi(pIso1) || Aig_ObjIsPo(pIso1) );
-    assert( Aig_ObjIsPi(pIso2) || Aig_ObjIsPo(pIso2) );
+    assert( Aig_ObjIsCi(pIso1) || Aig_ObjIsCo(pIso1) );
+    assert( Aig_ObjIsCi(pIso2) || Aig_ObjIsCo(pIso2) );
     return pIso1->iData - pIso2->iData;
 }
 
@@ -605,7 +605,7 @@ Iso_Man_t * Iso_ManCreate( Aig_Man_t * pAig )
     // create TFI signatures
     Aig_ManForEachObj( pAig, pObj, i )
     {
-        if ( Aig_ObjIsPo(pObj) )
+        if ( Aig_ObjIsCo(pObj) )
             continue;
         pIso = p->pObjs + i;
         pIso->Level = pObj->Level;
@@ -644,7 +644,7 @@ Iso_Man_t * Iso_ManCreate( Aig_Man_t * pAig )
     // create TFO signatures
     Aig_ManForEachObjReverse( pAig, pObj, i )
     {
-        if ( Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
+        if ( Aig_ObjIsCi(pObj) || Aig_ObjIsConst1(pObj) )
             continue;
         pIso = p->pObjs + i;
         if ( fUseXor )
@@ -659,7 +659,7 @@ Iso_Man_t * Iso_ManCreate( Aig_Man_t * pAig )
                 pIsoF->FanoutSig ^= pIso->FanoutSig;
                 pIsoF->FanoutSig ^= s_1kPrimes[Abc_Var2Lit(pIso->Level, Aig_ObjFaninC1(pObj)) & ISO_MASK];
             }
-            else if ( Aig_ObjIsPo(pObj) )
+            else if ( Aig_ObjIsCo(pObj) )
             {
                 pIsoF = p->pObjs + Aig_ObjFaninId0(pObj);
                 pIsoF->FanoutSig ^= pIso->FanoutSig;
@@ -678,7 +678,7 @@ Iso_Man_t * Iso_ManCreate( Aig_Man_t * pAig )
                 pIsoF->FanoutSig += pIso->FanoutSig;
                 pIsoF->FanoutSig += pIso->Level * s_1kPrimes[Abc_Var2Lit(pIso->Level, Aig_ObjFaninC1(pObj)) & ISO_MASK];
             }
-            else if ( Aig_ObjIsPo(pObj) )
+            else if ( Aig_ObjIsCo(pObj) )
             {
                 pIsoF = p->pObjs + Aig_ObjFaninId0(pObj);
                 pIsoF->FanoutSig += pIso->FanoutSig;
@@ -713,7 +713,7 @@ Iso_Man_t * Iso_ManCreate( Aig_Man_t * pAig )
     // add to the hash table
     Aig_ManForEachObj( pAig, pObj, i )
     {
-        if ( !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
+        if ( !Aig_ObjIsCi(pObj) && !Aig_ObjIsNode(pObj) )
             continue;
         pIso = p->pObjs + i;
         Iso_ObjHashAdd( p, pIso );
@@ -748,7 +748,7 @@ void Iso_ManAssignAdjacency( Iso_Man_t * p )
         pIso->FaninSig = 0;
         pIso->FanoutSig = 0;
 
-        if ( Aig_ObjIsPo(pObj) )
+        if ( Aig_ObjIsCo(pObj) )
             continue;
         if ( fUseXor )
         {
@@ -784,10 +784,10 @@ void Iso_ManAssignAdjacency( Iso_Man_t * p )
     // create TFO signatures
     Aig_ManForEachObjReverse( p->pAig, pObj, i )
     {
-        if ( Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
+        if ( Aig_ObjIsCi(pObj) || Aig_ObjIsConst1(pObj) )
             continue;
         pIso = p->pObjs + i;
-        assert( !Aig_ObjIsPo(pObj) || pIso->Id == 0 );
+        assert( !Aig_ObjIsCo(pObj) || pIso->Id == 0 );
         if ( fUseXor )
         {
             if ( Aig_ObjIsNode(pObj) )
@@ -802,7 +802,7 @@ void Iso_ManAssignAdjacency( Iso_Man_t * p )
                 if ( pIso->Id )
                     pIsoF->FanoutSig ^= s_1kPrimes[Abc_Var2Lit(pIso->Id, Aig_ObjFaninC1(pObj)) & ISO_MASK];
             }
-            else if ( Aig_ObjIsPo(pObj) )
+            else if ( Aig_ObjIsCo(pObj) )
             {
                 pIsoF = p->pObjs + Aig_ObjFaninId0(pObj);
                 pIsoF->FanoutSig ^= pIso->FanoutSig;
@@ -824,7 +824,7 @@ void Iso_ManAssignAdjacency( Iso_Man_t * p )
                 if ( pIso->Id )
                     pIsoF->FanoutSig += pIso->Id * s_1kPrimes[Abc_Var2Lit(pIso->Id, Aig_ObjFaninC1(pObj)) & ISO_MASK];
             }
-            else if ( Aig_ObjIsPo(pObj) )
+            else if ( Aig_ObjIsCo(pObj) )
             {
                 pIsoF = p->pObjs + Aig_ObjFaninId0(pObj);
                 pIsoF->FanoutSig += pIso->FanoutSig;
@@ -1093,7 +1093,7 @@ Vec_Int_t * Iso_ManFinalize( Iso_Man_t * p )
     // set canonical numbers
     Aig_ManForEachObj( p->pAig, pObj, i )
     {
-        if ( !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
+        if ( !Aig_ObjIsCi(pObj) && !Aig_ObjIsNode(pObj) )
         {
             pObj->iData = -1;
             continue;
@@ -1108,7 +1108,7 @@ Vec_Int_t * Iso_ManFinalize( Iso_Man_t * p )
     Aig_ManForEachCi( p->pAig, pObj, i )
     {
         assert( pObj->iData > 0 );
-        if ( Aig_ObjPioNum(pObj) >= Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig) ) // flop
+        if ( Aig_ObjPioNum(pObj) >= Aig_ManCiNum(p->pAig) - Aig_ManRegNum(p->pAig) ) // flop
             Vec_PtrPush( p->vTemp2, pObj );
         else // PI
             Vec_PtrPush( p->vTemp1, pObj );
@@ -1117,7 +1117,7 @@ Vec_Int_t * Iso_ManFinalize( Iso_Man_t * p )
     Vec_PtrSort( p->vTemp1, (int (*)(void))Iso_ObjCompareByData );
     Vec_PtrSort( p->vTemp2, (int (*)(void))Iso_ObjCompareByData );
     // create the result
-    vRes = Vec_IntAlloc( Aig_ManPiNum(p->pAig) );
+    vRes = Vec_IntAlloc( Aig_ManCiNum(p->pAig) );
     Vec_PtrForEachEntry( Aig_Obj_t *, p->vTemp1, pObj, i )
         Vec_IntPush( vRes, Aig_ObjPioNum(pObj) );
     Vec_PtrForEachEntry( Aig_Obj_t *, p->vTemp2, pObj, i )
@@ -1205,8 +1205,8 @@ Vec_Int_t * Saig_ManFindIsoPerm( Aig_Man_t * pAig, int fVerbose )
         }
     }
     p->timeTotal = clock() - clk2;
-//    printf( "IDs assigned = %d.  Objects = %d.\n", p->nObjIds, 1+Aig_ManPiNum(p->pAig)+Aig_ManNodeNum(p->pAig) );
-    assert( p->nObjIds == 1+Aig_ManPiNum(p->pAig)+Aig_ManNodeNum(p->pAig) );
+//    printf( "IDs assigned = %d.  Objects = %d.\n", p->nObjIds, 1+Aig_ManCiNum(p->pAig)+Aig_ManNodeNum(p->pAig) );
+    assert( p->nObjIds == 1+Aig_ManCiNum(p->pAig)+Aig_ManNodeNum(p->pAig) );
 //    if ( p->nClasses )
 //        Iso_ManDumpOneClass( p );
     vRes = Iso_ManFinalize( p );
diff --git a/src/aig/saig/saigMiter.c b/src/aig/saig/saigMiter.c
index 9f8328b1..4c0e9bdf 100644
--- a/src/aig/saig/saigMiter.c
+++ b/src/aig/saig/saigMiter.c
@@ -116,7 +116,7 @@ Aig_Man_t * Saig_ManCreateMiter( Aig_Man_t * p0, Aig_Man_t * p1, int Oper )
     Saig_ManForEachPi( p0, pObj, i )
         pObj->pData = Aig_ObjCreateCi( pNew );
     Saig_ManForEachPi( p1, pObj, i )
-        pObj->pData = Aig_ManPi( pNew, i );
+        pObj->pData = Aig_ManCi( pNew, i );
     // map register outputs
     Saig_ManForEachLo( p0, pObj, i )
         pObj->pData = Aig_ObjCreateCi( pNew );
@@ -131,9 +131,9 @@ Aig_Man_t * Saig_ManCreateMiter( Aig_Man_t * p0, Aig_Man_t * p1, int Oper )
     Saig_ManForEachPo( p0, pObj, i )
     {
         if ( Oper == 0 ) // XOR
-            pObj = Aig_Exor( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild0Copy(Aig_ManPo(p1,i)) );
+            pObj = Aig_Exor( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild0Copy(Aig_ManCo(p1,i)) );
         else if ( Oper == 1 ) // implication is PO(p0) -> PO(p1)  ...  complement is PO(p0) & !PO(p1) 
-            pObj = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_Not(Aig_ObjChild0Copy(Aig_ManPo(p1,i))) );
+            pObj = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_Not(Aig_ObjChild0Copy(Aig_ManCo(p1,i))) );
         else
             assert( 0 );
         Aig_ObjCreateCo( pNew, pObj );
@@ -165,8 +165,8 @@ Aig_Man_t * Saig_ManCreateMiterComb( Aig_Man_t * p0, Aig_Man_t * p1, int Oper )
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
-    assert( Aig_ManPiNum(p0) == Aig_ManPiNum(p1) );
-    assert( Aig_ManPoNum(p0) == Aig_ManPoNum(p1) );
+    assert( Aig_ManCiNum(p0) == Aig_ManCiNum(p1) );
+    assert( Aig_ManCoNum(p0) == Aig_ManCoNum(p1) );
     pNew = Aig_ManStart( Aig_ManObjNumMax(p0) + Aig_ManObjNumMax(p1) );
     pNew->pName = Abc_UtilStrsav( "miter" );
     // map constant nodes
@@ -176,7 +176,7 @@ Aig_Man_t * Saig_ManCreateMiterComb( Aig_Man_t * p0, Aig_Man_t * p1, int Oper )
     Aig_ManForEachCi( p0, pObj, i )
         pObj->pData = Aig_ObjCreateCi( pNew );
     Aig_ManForEachCi( p1, pObj, i )
-        pObj->pData = Aig_ManPi( pNew, i );
+        pObj->pData = Aig_ManCi( pNew, i );
     // map internal nodes
     Aig_ManForEachNode( p0, pObj, i )
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
@@ -186,9 +186,9 @@ Aig_Man_t * Saig_ManCreateMiterComb( Aig_Man_t * p0, Aig_Man_t * p1, int Oper )
     Aig_ManForEachCo( p0, pObj, i )
     {
         if ( Oper == 0 ) // XOR
-            pObj = Aig_Exor( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild0Copy(Aig_ManPo(p1,i)) );
+            pObj = Aig_Exor( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild0Copy(Aig_ManCo(p1,i)) );
         else if ( Oper == 1 ) // implication is PO(p0) -> PO(p1)  ...  complement is PO(p0) & !PO(p1) 
-            pObj = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_Not(Aig_ObjChild0Copy(Aig_ManPo(p1,i))) );
+            pObj = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_Not(Aig_ObjChild0Copy(Aig_ManCo(p1,i))) );
         else
             assert( 0 );
         Aig_ObjCreateCo( pNew, pObj );
@@ -721,11 +721,11 @@ int Saig_ManDemiterDual( Aig_Man_t * p, Aig_Man_t ** ppAig0, Aig_Man_t ** ppAig1
         if ( i & 1 )
             Aig_ObjDeletePo( pTemp, pObj );
         else
-            Vec_PtrWriteEntry( pTemp->vPos, k++, pObj );
+            Vec_PtrWriteEntry( pTemp->vCos, k++, pObj );
     }
     Saig_ManForEachLi( pTemp, pObj, i )
-        Vec_PtrWriteEntry( pTemp->vPos, k++, pObj );
-    Vec_PtrShrink( pTemp->vPos, k );
+        Vec_PtrWriteEntry( pTemp->vCos, k++, pObj );
+    Vec_PtrShrink( pTemp->vCos, k );
     pTemp->nTruePos = k - Saig_ManRegNum(pTemp);
     Aig_ManSeqCleanup( pTemp );
     *ppAig0 = Aig_ManDupSimple( pTemp );
@@ -736,13 +736,13 @@ int Saig_ManDemiterDual( Aig_Man_t * p, Aig_Man_t ** ppAig0, Aig_Man_t ** ppAig1
     Saig_ManForEachPo( pTemp, pObj, i )
     {
         if ( i & 1 )
-            Vec_PtrWriteEntry( pTemp->vPos, k++, pObj );
+            Vec_PtrWriteEntry( pTemp->vCos, k++, pObj );
         else
             Aig_ObjDeletePo( pTemp, pObj );
     }
     Saig_ManForEachLi( pTemp, pObj, i )
-        Vec_PtrWriteEntry( pTemp->vPos, k++, pObj );
-    Vec_PtrShrink( pTemp->vPos, k );
+        Vec_PtrWriteEntry( pTemp->vCos, k++, pObj );
+    Vec_PtrShrink( pTemp->vCos, k );
     pTemp->nTruePos = k - Saig_ManRegNum(pTemp);
     Aig_ManSeqCleanup( pTemp );
     *ppAig1 = Aig_ManDupSimple( pTemp );
diff --git a/src/aig/saig/saigOutDec.c b/src/aig/saig/saigOutDec.c
index 4e7e955f..d059a935 100644
--- a/src/aig/saig/saigOutDec.c
+++ b/src/aig/saig/saigOutDec.c
@@ -57,11 +57,11 @@ Vec_Ptr_t * Saig_ManFindPrimes( Aig_Man_t * pAig, int nLits, int fVerbose )
     assert( nLits < 10 );
 
     // create SAT solver
-    pCnf = Cnf_DeriveSimple( pAig, Aig_ManPoNum(pAig) ); 
+    pCnf = Cnf_DeriveSimple( pAig, Aig_ManCoNum(pAig) ); 
     pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
 
     // collect nodes in the property output cone
-    pMiter = Aig_ManPo( pAig, 0 );
+    pMiter = Aig_ManCo( pAig, 0 );
     pRoot  = Aig_ObjFanin0( pMiter );
     vNodes = Aig_ManDfsNodes( pAig, &pRoot, 1 );
     // sort nodes by level and remove the last few
diff --git a/src/aig/saig/saigPhase.c b/src/aig/saig/saigPhase.c
index f0bf3281..e7a586fe 100644
--- a/src/aig/saig/saigPhase.c
+++ b/src/aig/saig/saigPhase.c
@@ -810,8 +810,8 @@ Aig_Man_t * Saig_ManPerformAbstraction( Saig_Tsim_t * pTsi, int nFrames, int fVe
         }
     }
     pFrames->nRegs = pAig->nRegs;
-    pFrames->nTruePis = Aig_ManPiNum(pFrames) - Aig_ManRegNum(pFrames); 
-    pFrames->nTruePos = Aig_ManPoNum(pFrames) - Aig_ManRegNum(pFrames); 
+    pFrames->nTruePis = Aig_ManCiNum(pFrames) - Aig_ManRegNum(pFrames); 
+    pFrames->nTruePos = Aig_ManCoNum(pFrames) - Aig_ManRegNum(pFrames); 
     Aig_ManForEachLiSeq( pAig, pObj, i )
     {
         pObjNew = Aig_ObjCreateCo( pFrames, Saig_ObjChild0Frames(pObjMap,nFrames,pObj,nFrames-1) );
@@ -820,7 +820,7 @@ Aig_Man_t * Saig_ManPerformAbstraction( Saig_Tsim_t * pTsi, int nFrames, int fVe
 //Aig_ManPrintStats( pFrames );
     Aig_ManSeqCleanup( pFrames );
 //Aig_ManPrintStats( pFrames );
-//    Aig_ManPiCleanup( pFrames );
+//    Aig_ManCiCleanup( pFrames );
 //Aig_ManPrintStats( pFrames );
     ABC_FREE( pObjMap );
     return pFrames;
@@ -1021,7 +1021,7 @@ Aig_Man_t * Saig_ManPhaseAbstractAuto( Aig_Man_t * p, int fVerbose )
     Saig_TsiStop( pTsi );
     if ( pNew == NULL )
         pNew = Aig_ManDupSimple( p );
-    if ( Aig_ManPiNum(pNew) == Aig_ManRegNum(pNew) )
+    if ( Aig_ManCiNum(pNew) == Aig_ManRegNum(pNew) )
     {
         Aig_ManStop( pNew);
         pNew = Aig_ManDupSimple( p );
diff --git a/src/aig/saig/saigRefSat.c b/src/aig/saig/saigRefSat.c
index 09a0c69b..f195f36c 100644
--- a/src/aig/saig/saigRefSat.c
+++ b/src/aig/saig/saigRefSat.c
@@ -70,7 +70,7 @@ Vec_Int_t * Saig_RefManReason2Inputs( Saig_RefMan_t * p, Vec_Int_t * vReasons )
     Vec_IntForEachEntry( vReasons, Entry, i )
     {
         int iInput = Vec_IntEntry( p->vMapPiF2A, 2*Entry );
-        assert( iInput >= 0 && iInput < Aig_ManPiNum(p->pAig) );
+        assert( iInput >= 0 && iInput < Aig_ManCiNum(p->pAig) );
         if ( Vec_IntEntry(vVisited, iInput) == 0 )
             Vec_IntPush( vOriginal, iInput );
         Vec_IntAddToEntry( vVisited, iInput, 1 );
@@ -98,7 +98,7 @@ Abc_Cex_t * Saig_RefManReason2Cex( Saig_RefMan_t * p, Vec_Int_t * vReasons )
     memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
     Vec_IntForEachEntry( vReasons, Entry, i )
     {
-        assert( Entry >= 0 && Entry < Aig_ManPiNum(p->pFrames) );
+        assert( Entry >= 0 && Entry < Aig_ManCiNum(p->pFrames) );
         iInput = Vec_IntEntry( p->vMapPiF2A, 2*Entry );
         iFrame = Vec_IntEntry( p->vMapPiF2A, 2*Entry+1 );
         Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
@@ -122,7 +122,7 @@ void Saig_RefManFindReason_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t * vPr
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Vec_IntPush( vReasons, Aig_ObjPioNum(pObj) );
         return;
@@ -209,7 +209,7 @@ Vec_Int_t * Saig_RefManFindReason( Saig_RefMan_t * p )
             Vec_IntWriteEntry( vPrios, Aig_ObjId(pObj), Abc_MinInt(iPrio0, iPrio1) );
     }
     // check the property output
-    pObj = Aig_ManPo( p->pFrames, 0 );
+    pObj = Aig_ManCo( p->pFrames, 0 );
     assert( (int)Aig_ObjFanin0(pObj)->fPhase == Aig_ObjFaninC0(pObj) );
 
     // select the reason
@@ -238,7 +238,7 @@ void Saig_ManUnrollCollect_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t *
     if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
         Saig_ManUnrollCollect_rec( pAig, Aig_ObjFanin0(pObj), vObjs, vRoots );
     else if ( Aig_ObjIsNode(pObj) )
     {
@@ -281,7 +281,7 @@ Aig_Man_t * Saig_ManUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nInpu
     vFrameCos  = Vec_VecStart( pCex->iFrame+1 );
     vFrameObjs = Vec_VecStart( pCex->iFrame+1 );
     // initialized the topmost frame
-    pObj = Aig_ManPo( pAig, pCex->iPo );
+    pObj = Aig_ManCo( pAig, pCex->iPo );
     Vec_VecPushInt( vFrameCos, pCex->iFrame, Aig_ObjId(pObj) );
     for ( f = pCex->iFrame; f >= 0; f-- )
     {
@@ -310,7 +310,7 @@ Aig_Man_t * Saig_ManUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nInpu
         {
             if ( Aig_ObjIsNode(pObj) )
                 pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-            else if ( Aig_ObjIsPo(pObj) )
+            else if ( Aig_ObjIsCo(pObj) )
                 pObj->pData = Aig_ObjChild0Copy(pObj);
             else if ( Aig_ObjIsConst1(pObj) )
                 pObj->pData = Aig_ManConst1(pFrames);
@@ -337,7 +337,7 @@ Aig_Man_t * Saig_ManUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nInpu
             Saig_ObjLiToLo( pAig, pObj )->pData = pObj->pData;
     }
     // create output
-    pObj = Aig_ManPo( pAig, pCex->iPo );
+    pObj = Aig_ManCo( pAig, pCex->iPo );
     Aig_ObjCreateCo( pFrames, Aig_Not((Aig_Obj_t *)pObj->pData) );
     Aig_ManSetRegNum( pFrames, 0 );
     // cleanup
@@ -420,7 +420,7 @@ int Saig_RefManSetPhases( Saig_RefMan_t * p, Abc_Cex_t * pCare, int fValue1 )
                      & ( Aig_ObjFanin1(pObj)->fPhase ^ Aig_ObjFaninC1(pObj) );
     Aig_ManForEachCo( p->pFrames, pObj, i )
         pObj->fPhase = ( Aig_ObjFanin0(pObj)->fPhase ^ Aig_ObjFaninC0(pObj) );
-    pObj = Aig_ManPo( p->pFrames, 0 );
+    pObj = Aig_ManCo( p->pFrames, 0 );
     return pObj->fPhase;
 }
 
@@ -446,7 +446,7 @@ Vec_Vec_t * Saig_RefManOrderLiterals( Saig_RefMan_t * p, Vec_Int_t * vVar2PiId,
     Vec_IntForEachEntry( vAssumps, Entry, i )
     {
         int iPiNum = Vec_IntEntry( vVar2PiId, lit_var(Entry) );
-        assert( iPiNum >= 0 && iPiNum < Aig_ManPiNum(p->pFrames) );
+        assert( iPiNum >= 0 && iPiNum < Aig_ManCiNum(p->pFrames) );
         iInput = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum );
         iFrame = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum+1 );
 //        Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
@@ -480,7 +480,7 @@ Abc_Cex_t * Saig_RefManCreateCex( Saig_RefMan_t * p, Vec_Int_t * vVar2PiId, Vec_
     Vec_IntForEachEntry( vAssumps, Entry, i )
     {
         int iPiNum = Vec_IntEntry( vVar2PiId, lit_var(Entry) );
-        assert( iPiNum >= 0 && iPiNum < Aig_ManPiNum(p->pFrames) );
+        assert( iPiNum >= 0 && iPiNum < Aig_ManCiNum(p->pFrames) );
         iInput = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum );
         iFrame = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum+1 );
         Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
@@ -548,7 +548,7 @@ Abc_Cex_t * Saig_RefManRunSat( Saig_RefMan_t * p, int fNewOrder )
     }
     // create assumptions
     vVar2PiId = Vec_IntStartFull( pCnf->nVars );
-    vAssumps = Vec_IntAlloc( Aig_ManPiNum(p->pFrames) );
+    vAssumps = Vec_IntAlloc( Aig_ManCiNum(p->pFrames) );
     Aig_ManForEachCi( p->pFrames, pObj, i )
     {
 //        RetValue = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
@@ -726,13 +726,13 @@ Vec_Int_t * Saig_RefManRefineWithSat( Saig_RefMan_t * p, Vec_Int_t * vAigPis )
     vVisited = Vec_IntStart( Saig_ManPiNum(p->pAig) );
     Vec_IntForEachEntry( vAigPis, Entry, i )
     {
-        assert( Entry >= 0 && Entry < Aig_ManPiNum(p->pAig) );
+        assert( Entry >= 0 && Entry < Aig_ManCiNum(p->pAig) );
         Vec_IntWriteEntry( vVisited, Entry, 1 );
     }
 
     // create assumptions
     vVar2PiId = Vec_IntStartFull( pCnf->nVars );
-    vAssumps = Vec_IntAlloc( Aig_ManPiNum(p->pFrames) );
+    vAssumps = Vec_IntAlloc( Aig_ManCiNum(p->pFrames) );
     Aig_ManForEachCi( p->pFrames, pObj, i )
     {
         int iInput = Vec_IntEntry( p->vMapPiF2A, 2*i );
@@ -836,7 +836,7 @@ Vec_Int_t * Saig_RefManRefineWithSat( Saig_RefMan_t * p, Vec_Int_t * vAigPis )
     Vec_IntForEachEntry( vAssumps, Entry, i )
     {
         int iPiNum = Vec_IntEntry( vVar2PiId, lit_var(Entry) );
-        assert( iPiNum >= 0 && iPiNum < Aig_ManPiNum(p->pFrames) );
+        assert( iPiNum >= 0 && iPiNum < Aig_ManCiNum(p->pFrames) );
         Vec_IntPush( vReasons, iPiNum );
     }
 
@@ -881,7 +881,7 @@ Aig_ManPrintStats( p->pFrames );
     {
         Vec_Int_t * vRes = Saig_RefManReason2Inputs( p, vReasons );
         printf( "Frame PIs = %4d (essential = %4d)   AIG PIs = %4d (essential = %4d)   ",
-            Aig_ManPiNum(p->pFrames), Vec_IntSize(vReasons), 
+            Aig_ManCiNum(p->pFrames), Vec_IntSize(vReasons), 
             Saig_ManPiNum(p->pAig) - p->nInputs, Vec_IntSize(vRes) );
 ABC_PRT( "Time", clock() - clk );
 
@@ -896,7 +896,7 @@ ABC_PRT( "Time", clock() - clk );
         Vec_IntFree( vRes );
         vRes = Saig_RefManReason2Inputs( p, vReasons );
         printf( "Frame PIs = %4d (essential = %4d)   AIG PIs = %4d (essential = %4d)   ",
-            Aig_ManPiNum(p->pFrames), Vec_IntSize(vReasons), 
+            Aig_ManCiNum(p->pFrames), Vec_IntSize(vReasons), 
             Saig_ManPiNum(p->pAig) - p->nInputs, Vec_IntSize(vRes) );
 
         Vec_IntFree( vRes );
@@ -935,7 +935,7 @@ Vec_Int_t * Saig_ManExtendCounterExampleTest3( Aig_Man_t * pAig, int iFirstFlopP
     if ( Saig_ManPiNum(pAig) != pCex->nPis )
     {
         printf( "Saig_ManExtendCounterExampleTest3(): The PI count of AIG (%d) does not match that of cex (%d).\n", 
-            Aig_ManPiNum(pAig), pCex->nPis );
+            Aig_ManCiNum(pAig), pCex->nPis );
         return NULL;
     }
 
@@ -948,7 +948,7 @@ clk = clock();
 //    if ( fVerbose )
     {
         printf( "Frame PIs = %4d (essential = %4d)   AIG PIs = %4d (essential = %4d)   ",
-            Aig_ManPiNum(p->pFrames), Vec_IntSize(vReasons), 
+            Aig_ManCiNum(p->pFrames), Vec_IntSize(vReasons), 
             Saig_ManPiNum(p->pAig) - p->nInputs, Vec_IntSize(vRes) );
 ABC_PRT( "Time", clock() - clk );
     }
@@ -965,7 +965,7 @@ ABC_PRT( "Time", clock() - clk );
 //    if ( fVerbose )
     {
         printf( "Frame PIs = %4d (essential = %4d)   AIG PIs = %4d (essential = %4d)   ",
-            Aig_ManPiNum(p->pFrames), Vec_IntSize(vReasons), 
+            Aig_ManCiNum(p->pFrames), Vec_IntSize(vReasons), 
             Saig_ManPiNum(p->pAig) - p->nInputs, Vec_IntSize(vRes) );
 ABC_PRT( "Time", clock() - clk );
     }
diff --git a/src/aig/saig/saigRetFwd.c b/src/aig/saig/saigRetFwd.c
index 94d08aaf..bbd7f397 100644
--- a/src/aig/saig/saigRetFwd.c
+++ b/src/aig/saig/saigRetFwd.c
@@ -53,7 +53,7 @@ Aig_Obj_t ** Aig_ManStaticFanoutStart( Aig_Man_t * p )
     Aig_Obj_t ** ppFanouts, * pObj;
     int i, nFanouts, nFanoutsAlloc;
     // allocate fanouts
-    nFanoutsAlloc = 2 * Aig_ManObjNumMax(p) - Aig_ManPiNum(p) - Aig_ManPoNum(p);
+    nFanoutsAlloc = 2 * Aig_ManObjNumMax(p) - Aig_ManCiNum(p) - Aig_ManCoNum(p);
     ppFanouts = ABC_ALLOC( Aig_Obj_t *, nFanoutsAlloc );
     // mark up storage
     nFanouts = 0;
diff --git a/src/aig/saig/saigRetMin.c b/src/aig/saig/saigRetMin.c
index d4caff3f..161fce0a 100644
--- a/src/aig/saig/saigRetMin.c
+++ b/src/aig/saig/saigRetMin.c
@@ -69,12 +69,12 @@ Vec_Int_t * Saig_ManRetimeInitState( Aig_Man_t * p )
     if ( RetValue == l_True )
     {
         // accumulate SAT variables of the CIs
-        vCiIds = Vec_IntAlloc( Aig_ManPiNum(p) );
+        vCiIds = Vec_IntAlloc( Aig_ManCiNum(p) );
         Aig_ManForEachCi( p, pObj, i )
             Vec_IntPush( vCiIds, pCnf->pVarNums[pObj->Id] );
         // create the model
         pModel = Sat_SolverGetModel( pSat, vCiIds->pArray, vCiIds->nSize );
-        vInit = Vec_IntAllocArray( pModel, Aig_ManPiNum(p) );
+        vInit = Vec_IntAllocArray( pModel, Aig_ManCiNum(p) );
         Vec_IntFree( vCiIds );
     }
     sat_solver_delete( pSat );
@@ -376,7 +376,7 @@ Aig_Man_t * Saig_ManRetimeDupBackward( Aig_Man_t * p, Vec_Ptr_t * vCut, Vec_Int_
     pObj = Aig_ManConst1(p);
     pObj->pData = Aig_ManConst1(pNew);
     Saig_ManForEachPi( p, pObj, i )
-        pObj->pData = Aig_ManPi( pNew, i );
+        pObj->pData = Aig_ManCi( pNew, i );
     // duplicate logic below the cut
     Saig_ManForEachPo( p, pObj, i )
     {
@@ -499,10 +499,10 @@ int Saig_ManHideBadRegs( Aig_Man_t * p, Vec_Ptr_t * vBadRegs )
     Saig_ManForEachLiLo( p, pObjLi, pObjLo, i )
         pObjLi->pData = pObjLo;
     // reorder them by putting bad registers first
-    vPisNew = Vec_PtrDup( p->vPis );
-    vPosNew = Vec_PtrDup( p->vPos );
-    nTruePi = Aig_ManPiNum(p) - Aig_ManRegNum(p);
-    nTruePo = Aig_ManPoNum(p) - Aig_ManRegNum(p);
+    vPisNew = Vec_PtrDup( p->vCis );
+    vPosNew = Vec_PtrDup( p->vCos );
+    nTruePi = Aig_ManCiNum(p) - Aig_ManRegNum(p);
+    nTruePo = Aig_ManCoNum(p) - Aig_ManRegNum(p);
     assert( nTruePi == p->nTruePis );
     assert( nTruePo == p->nTruePos );
     Vec_PtrForEachEntry( Aig_Obj_t *, vBadRegs, pObjLi, i )
@@ -522,11 +522,11 @@ int Saig_ManHideBadRegs( Aig_Man_t * p, Vec_Ptr_t * vBadRegs )
         Vec_PtrWriteEntry( vPosNew, nTruePo++, pObjLi );
     }
     // check the sizes
-    assert( nTruePi == Aig_ManPiNum(p) );
-    assert( nTruePo == Aig_ManPoNum(p) );
+    assert( nTruePi == Aig_ManCiNum(p) );
+    assert( nTruePo == Aig_ManCoNum(p) );
     // transfer the arrays
-    Vec_PtrFree( p->vPis ); p->vPis = vPisNew;
-    Vec_PtrFree( p->vPos ); p->vPos = vPosNew;
+    Vec_PtrFree( p->vCis ); p->vCis = vPisNew;
+    Vec_PtrFree( p->vCos ); p->vCos = vPosNew;
     // update the PIs
     nBadRegs = Vec_PtrSize(vBadRegs);
     p->nRegs -= nBadRegs;
@@ -604,7 +604,7 @@ Aig_Man_t * Saig_ManRetimeMinAreaBackward( Aig_Man_t * pNew, int fVerbose )
             printf( "Excluding register %d.\n", iBadReg ); 
         // prepare to remove this output
         vBadRegs = Vec_PtrAlloc( 1 );
-        Vec_PtrPush( vBadRegs, Aig_ManPo( pNew, Saig_ManPoNum(pNew) + iBadReg ) );
+        Vec_PtrPush( vBadRegs, Aig_ManCo( pNew, Saig_ManPoNum(pNew) + iBadReg ) );
     }
     return NULL;
 }
diff --git a/src/aig/saig/saigRetStep.c b/src/aig/saig/saigRetStep.c
index 543c7e24..e43923f8 100644
--- a/src/aig/saig/saigRetStep.c
+++ b/src/aig/saig/saigRetStep.c
@@ -56,7 +56,7 @@ Aig_Obj_t * Saig_ManRetimeNodeFwd( Aig_Man_t * p, Aig_Obj_t * pObj, int fMakeBug
     pFanin0 = Aig_ObjFanin0(pObj);
     pFanin1 = Aig_ObjFanin1(pObj);
     // skip of they are not primary inputs
-    if ( !Aig_ObjIsPi(pFanin0) || !Aig_ObjIsPi(pFanin1) )
+    if ( !Aig_ObjIsCi(pFanin0) || !Aig_ObjIsCi(pFanin1) )
         return NULL;
 
     // skip of they are not register outputs
@@ -90,11 +90,11 @@ Aig_Obj_t * Saig_ManRetimeNodeFwd( Aig_Man_t * p, Aig_Obj_t * pObj, int fMakeBug
 
     // create new register input
     pObjLi = Aig_ObjCreateCo( p, Aig_NotCond(pObjNew, fCompl) );
-    pObjLi->PioNum = Aig_ManPoNum(p) - 1;
+    pObjLi->PioNum = Aig_ManCoNum(p) - 1;
 
     // create new register output
     pObjLo = Aig_ObjCreateCi( p );
-    pObjLo->PioNum = Aig_ManPiNum(p) - 1;
+    pObjLo->PioNum = Aig_ManCiNum(p) - 1;
     p->nRegs++;
 
     // make sure the register is retimable.
@@ -148,15 +148,15 @@ Aig_Obj_t * Saig_ManRetimeNodeBwd( Aig_Man_t * p, Aig_Obj_t * pObjLo )
 
     // create latch inputs
     pLi0New = Aig_ObjCreateCo( p, Aig_NotCond(pFanin0, fCompl0) );
-    pLi0New->PioNum = Aig_ManPoNum(p) - 1;
+    pLi0New->PioNum = Aig_ManCoNum(p) - 1;
     pLi1New = Aig_ObjCreateCo( p, Aig_NotCond(pFanin1, fCompl1) );
-    pLi1New->PioNum = Aig_ManPoNum(p) - 1;
+    pLi1New->PioNum = Aig_ManCoNum(p) - 1;
 
     // create latch outputs
     pLo0New = Aig_ObjCreateCi(p);
-    pLo0New->PioNum = Aig_ManPiNum(p) - 1;
+    pLo0New->PioNum = Aig_ManCiNum(p) - 1;
     pLo1New = Aig_ObjCreateCi(p);
-    pLo1New->PioNum = Aig_ManPiNum(p) - 1;
+    pLo1New->PioNum = Aig_ManCiNum(p) - 1;
     pLo0New = Aig_NotCond( pLo0New, fCompl0 );
     pLo1New = Aig_NotCond( pLo1New, fCompl1 );
     p->nRegs += 2;
diff --git a/src/aig/saig/saigSimExt.c b/src/aig/saig/saigSimExt.c
index d4b87e92..c83a7a64 100644
--- a/src/aig/saig/saigSimExt.c
+++ b/src/aig/saig/saigSimExt.c
@@ -81,7 +81,7 @@ int Saig_ManExtendOneEval( Vec_Ptr_t * vSimInfo, Aig_Obj_t * pObj, int iFrame )
     Value0 = Saig_ManSimInfoGet( vSimInfo, Aig_ObjFanin0(pObj), iFrame );
     if ( Aig_ObjFaninC0(pObj) )
         Value0 = Saig_ManSimInfoNot( Value0 );
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         Saig_ManSimInfoSet( vSimInfo, pObj, iFrame, Value0 );
         return Value0;
@@ -119,7 +119,7 @@ int Saig_ManSimDataInit( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo,
             Saig_ManSimInfoSet( vSimInfo, pObj, f, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
         if ( vRes )
         Vec_IntForEachEntry( vRes, Entry, i )
-            Saig_ManSimInfoSet( vSimInfo, Aig_ManPi(p, Entry), f, SAIG_UND );
+            Saig_ManSimInfoSet( vSimInfo, Aig_ManCi(p, Entry), f, SAIG_UND );
         Aig_ManForEachNode( p, pObj, i )
             Saig_ManExtendOneEval( vSimInfo, pObj, f );
         Aig_ManForEachCo( p, pObj, i )
@@ -130,7 +130,7 @@ int Saig_ManSimDataInit( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo,
             Saig_ManSimInfoSet( vSimInfo, pObjLo, f+1, Saig_ManSimInfoGet(vSimInfo, pObjLi, f) );
     }
     // make sure the output of the property failed
-    pObj = Aig_ManPo( p, pCex->iPo );
+    pObj = Aig_ManCo( p, pCex->iPo );
     return Saig_ManSimInfoGet( vSimInfo, pObj, pCex->iFrame );
 }
 
@@ -148,7 +148,7 @@ int Saig_ManSimDataInit( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo,
 int Saig_ManExtendOne( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo, 
     int iPi, int iFrame, Vec_Int_t * vUndo, Vec_Int_t * vVis, Vec_Int_t * vVis2 )
 {
-    Aig_Obj_t * pFanout, * pObj = Aig_ManPi(p, iPi);
+    Aig_Obj_t * pFanout, * pObj = Aig_ManCi(p, iPi);
     int i, k, f, iFanout = -1, Value, Value2, Entry;
     // save original value
     Value = Saig_ManSimInfoGet( vSimInfo, pObj, iFrame );
@@ -204,7 +204,7 @@ int Saig_ManExtendOne( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo,
         }
     }
     // check the output
-    pObj = Aig_ManPo( p, pCex->iPo );
+    pObj = Aig_ManCo( p, pCex->iPo );
     Value = Saig_ManSimInfoGet( vSimInfo, pObj, pCex->iFrame );
     assert( Value == SAIG_ONE || Value == SAIG_UND );
     return (int)(Value == SAIG_ONE);
@@ -525,7 +525,7 @@ Vec_Int_t * Saig_ManExtendCounterExampleTest( Aig_Man_t * p, int iFirstFlopPi, A
     if ( Saig_ManPiNum(p) != pCex->nPis )
     {
         printf( "Saig_ManExtendCounterExampleTest(): The PI count of AIG (%d) does not match that of cex (%d).\n", 
-            Aig_ManPiNum(p), pCex->nPis );
+            Aig_ManCiNum(p), pCex->nPis );
         return NULL;
     }
     Aig_ManFanoutStart( p );
diff --git a/src/aig/saig/saigSimExt2.c b/src/aig/saig/saigSimExt2.c
index 6a0f514e..70a8892e 100644
--- a/src/aig/saig/saigSimExt2.c
+++ b/src/aig/saig/saigSimExt2.c
@@ -109,7 +109,7 @@ int Saig_ManExtendOneEval2( Vec_Ptr_t * vSimInfo, Aig_Obj_t * pObj, int iFrame )
     Value0 = Saig_ManSimInfo2Get( vSimInfo, Aig_ObjFanin0(pObj), iFrame );
     if ( Aig_ObjFaninC0(pObj) )
         Value0 = Saig_ManSimInfo2Not( Value0 );
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         Saig_ManSimInfo2Set( vSimInfo, pObj, iFrame, Value0 );
         return Value0;
@@ -155,7 +155,7 @@ int Saig_ManSimDataInit2( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo
             Saig_ManSimInfo2Set( vSimInfo, pObjLo, f+1, Saig_ManSimInfo2Get(vSimInfo, pObjLi, f) );
     }
     // make sure the output of the property failed
-    pObj = Aig_ManPo( p, pCex->iPo );
+    pObj = Aig_ManCo( p, pCex->iPo );
     return Saig_ManSimInfo2Get( vSimInfo, pObj, pCex->iFrame );
 }
 
@@ -177,7 +177,7 @@ void Saig_ManSetAndDriveImplications_rec( Aig_Man_t * p, Aig_Obj_t * pObj, int f
     int Value = Saig_ManSimInfo2Get( vSimInfo, pObj, f );
     assert( !Saig_ManSimInfo2IsOld( Value ) );
     Saig_ManSimInfo2Set( vSimInfo, pObj, f, Saig_ManSimInfo2SetOld(Value) );
-    if ( (Aig_ObjIsPo(pObj) && f == fMax) || Saig_ObjIsPo(p, pObj) )
+    if ( (Aig_ObjIsCo(pObj) && f == fMax) || Saig_ObjIsPo(p, pObj) )
         return;
     if ( Saig_ObjIsLi( p, pObj ) )
     {
@@ -188,13 +188,13 @@ void Saig_ManSetAndDriveImplications_rec( Aig_Man_t * p, Aig_Obj_t * pObj, int f
             Saig_ManSetAndDriveImplications_rec( p, pFanout, f+1, fMax, vSimInfo );
         return;
     }
-    assert( Aig_ObjIsPi(pObj) || Aig_ObjIsNode(pObj) || Aig_ObjIsConst1(pObj) );
+    assert( Aig_ObjIsCi(pObj) || Aig_ObjIsNode(pObj) || Aig_ObjIsConst1(pObj) );
     Aig_ObjForEachFanout( p, pObj, pFanout, iFanout, k )
     {
         Value = Saig_ManSimInfo2Get( vSimInfo, pFanout, f );
         if ( Saig_ManSimInfo2IsOld( Value ) )
             continue;
-        if ( Aig_ObjIsPo(pFanout) )
+        if ( Aig_ObjIsCo(pFanout) )
         {
             Saig_ManSetAndDriveImplications_rec( p, pFanout, f, fMax, vSimInfo );
             continue;
@@ -238,7 +238,7 @@ void Saig_ManExplorePaths_rec( Aig_Man_t * p, Aig_Obj_t * pObj, int f, int fMax,
         int i, iPiNum = Aig_ObjPioNum(pObj);
         for ( i = fMax; i >= 0; i-- )
             if ( i != f )
-                Saig_ManSetAndDriveImplications_rec( p, Aig_ManPi(p, iPiNum), i, fMax, vSimInfo );
+                Saig_ManSetAndDriveImplications_rec( p, Aig_ManCi(p, iPiNum), i, fMax, vSimInfo );
         return;
     }
     if ( Saig_ObjIsLo( p, pObj ) )
@@ -247,7 +247,7 @@ void Saig_ManExplorePaths_rec( Aig_Man_t * p, Aig_Obj_t * pObj, int f, int fMax,
         Saig_ManExplorePaths_rec( p, Saig_ObjLoToLi(p, pObj), f-1, fMax, vSimInfo );
         return;
     }
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         Saig_ManExplorePaths_rec( p, Aig_ObjFanin0(pObj), f, fMax, vSimInfo );
         return;
@@ -295,10 +295,10 @@ Vec_Int_t * Saig_ManProcessCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCe
     {
         Saig_ManSetAndDriveImplications_rec( p, Aig_ManConst1(p), f, pCex->iFrame, vSimInfo );
         for ( i = 0; i < iFirstFlopPi; i++ )
-            Saig_ManSetAndDriveImplications_rec( p, Aig_ManPi(p, i), f, pCex->iFrame, vSimInfo );
+            Saig_ManSetAndDriveImplications_rec( p, Aig_ManCi(p, i), f, pCex->iFrame, vSimInfo );
     }
     // recursively compute justification
-    Saig_ManExplorePaths_rec( p, Aig_ManPo(p, pCex->iPo), pCex->iFrame, pCex->iFrame, vSimInfo );
+    Saig_ManExplorePaths_rec( p, Aig_ManCo(p, pCex->iPo), pCex->iFrame, pCex->iFrame, vSimInfo );
     // select the result
     vRes = Vec_IntAlloc( 1000 );
     vResInv = Vec_IntAlloc( 1000 );
@@ -306,7 +306,7 @@ Vec_Int_t * Saig_ManProcessCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCe
     {
         for ( f = pCex->iFrame; f >= 0; f-- )
         {
-            Value = Saig_ManSimInfo2Get( vSimInfo, Aig_ManPi(p, i), f );
+            Value = Saig_ManSimInfo2Get( vSimInfo, Aig_ManCi(p, i), f );
             if ( Saig_ManSimInfo2IsOld( Value ) )
                 break;
         }
@@ -341,7 +341,7 @@ Vec_Int_t * Saig_ManExtendCounterExampleTest2( Aig_Man_t * p, int iFirstFlopPi,
     if ( Saig_ManPiNum(p) != pCex->nPis )
     {
         printf( "Saig_ManExtendCounterExampleTest2(): The PI count of AIG (%d) does not match that of cex (%d).\n", 
-            Aig_ManPiNum(p), pCex->nPis );
+            Aig_ManCiNum(p), pCex->nPis );
         return NULL;
     }
     Aig_ManFanoutStart( p );
@@ -393,10 +393,10 @@ Abc_Cex_t * Saig_ManDeriveCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCex
     {
         Saig_ManSetAndDriveImplications_rec( p, Aig_ManConst1(p), f, pCex->iFrame, vSimInfo );
         for ( i = 0; i < iFirstFlopPi; i++ )
-            Saig_ManSetAndDriveImplications_rec( p, Aig_ManPi(p, i), f, pCex->iFrame, vSimInfo );
+            Saig_ManSetAndDriveImplications_rec( p, Aig_ManCi(p, i), f, pCex->iFrame, vSimInfo );
     }
     // recursively compute justification
-    Saig_ManExplorePaths_rec( p, Aig_ManPo(p, pCex->iPo), pCex->iFrame, pCex->iFrame, vSimInfo );
+    Saig_ManExplorePaths_rec( p, Aig_ManCo(p, pCex->iPo), pCex->iFrame, pCex->iFrame, vSimInfo );
 
     // create CEX
     pCare = Abc_CexDup( pCex, pCex->nRegs );
@@ -410,7 +410,7 @@ Abc_Cex_t * Saig_ManDeriveCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCex
         int fFound = 0;
         for ( f = pCex->iFrame; f >= 0; f-- )
         {
-            Value = Saig_ManSimInfo2Get( vSimInfo, Aig_ManPi(p, i), f );
+            Value = Saig_ManSimInfo2Get( vSimInfo, Aig_ManCi(p, i), f );
             if ( Saig_ManSimInfo2IsOld( Value ) )
             {
                 fFound = 1;
@@ -450,7 +450,7 @@ Abc_Cex_t * Saig_ManFindCexCareBitsSense( Aig_Man_t * p, Abc_Cex_t * pCex, int i
     if ( Saig_ManPiNum(p) != pCex->nPis )
     {
         printf( "Saig_ManExtendCounterExampleTest2(): The PI count of AIG (%d) does not match that of cex (%d).\n", 
-            Aig_ManPiNum(p), pCex->nPis );
+            Aig_ManCiNum(p), pCex->nPis );
         return NULL;
     }
     Aig_ManFanoutStart( p );
diff --git a/src/aig/saig/saigSimFast.c b/src/aig/saig/saigSimFast.c
index 2c0f3974..27855bfd 100644
--- a/src/aig/saig/saigSimFast.c
+++ b/src/aig/saig/saigSimFast.c
@@ -93,7 +93,7 @@ static inline int  Faig_ObjFanin( int iFan )                  { return iFan >> 1
 int Faig_ManIsCorrect( Aig_Man_t * pAig )
 {
     return Aig_ManObjNumMax(pAig) == 
-        1 + Aig_ManPiNum(pAig) + Aig_ManNodeNum(pAig) + Aig_ManPoNum(pAig);
+        1 + Aig_ManCiNum(pAig) + Aig_ManNodeNum(pAig) + Aig_ManCoNum(pAig);
 }
 
 /**Function*************************************************************
@@ -112,14 +112,14 @@ Faig_Man_t * Faig_ManAlloc( Aig_Man_t * pAig )
     Faig_Man_t * p;
     int nWords;
 //    assert( Faig_ManIsCorrect(pAig) );
-    nWords = 2 * Aig_ManNodeNum(pAig) + Aig_ManPoNum(pAig);
+    nWords = 2 * Aig_ManNodeNum(pAig) + Aig_ManCoNum(pAig);
     p = (Faig_Man_t *)ABC_ALLOC( char, sizeof(Faig_Man_t) + sizeof(int) * nWords );
 //printf( "Allocating %7.2f Mb.\n", 1.0 * (sizeof(Faig_Man_t) + sizeof(int) * nWords)/(1<<20) );
     memset( p, 0, sizeof(Faig_Man_t) );
-    p->nPis   = Aig_ManPiNum(pAig) - Aig_ManRegNum(pAig);
-    p->nPos   = Aig_ManPoNum(pAig) - Aig_ManRegNum(pAig);
-    p->nCis   = Aig_ManPiNum(pAig);
-    p->nCos   = Aig_ManPoNum(pAig);
+    p->nPis   = Aig_ManCiNum(pAig) - Aig_ManRegNum(pAig);
+    p->nPos   = Aig_ManCoNum(pAig) - Aig_ManRegNum(pAig);
+    p->nCis   = Aig_ManCiNum(pAig);
+    p->nCos   = Aig_ManCoNum(pAig);
     p->nFfs   = Aig_ManRegNum(pAig);
     p->nNos   = Aig_ManNodeNum(pAig);
     // offsets
diff --git a/src/aig/saig/saigSimMv.c b/src/aig/saig/saigSimMv.c
index 2a1cea40..11bd088c 100644
--- a/src/aig/saig/saigSimMv.c
+++ b/src/aig/saig/saigSimMv.c
@@ -138,7 +138,7 @@ Saig_MvObj_t * Saig_ManCreateReducedAig( Aig_Man_t * p, Vec_Ptr_t ** pvFlops )
     {
         pEntry = pAig + i;
         pEntry->Type = pObj->Type;
-        if ( Aig_ObjIsPi(pObj) || i == 0 )
+        if ( Aig_ObjIsCi(pObj) || i == 0 )
         {
             if ( Saig_ObjIsLo(p, pObj) )
             {
@@ -149,7 +149,7 @@ Saig_MvObj_t * Saig_ManCreateReducedAig( Aig_Man_t * p, Vec_Ptr_t ** pvFlops )
             continue;
         }
         pEntry->iFan0 = (Aig_ObjFaninId0(pObj) << 1) | Aig_ObjFaninC0(pObj);
-        if ( Aig_ObjIsPo(pObj) )
+        if ( Aig_ObjIsCo(pObj) )
             continue;
         assert( Aig_ObjIsNode(pObj) );
         pEntry->iFan1 = (Aig_ObjFaninId1(pObj) << 1) | Aig_ObjFaninC1(pObj);
@@ -442,9 +442,9 @@ void Saig_MvSimulateFrame( Saig_MvMan_t * p, int fFirst, int fVerbose )
                 Saig_MvSimulateValue0(p->pAigOld, pEntry),
                 Saig_MvSimulateValue1(p->pAigOld, pEntry), fFirst );
         }
-        else if ( pEntry->Type == AIG_OBJ_PO )
+        else if ( pEntry->Type == AIG_OBJ_CO )
             pEntry->Value = Saig_MvSimulateValue0(p->pAigOld, pEntry);
-        else if ( pEntry->Type == AIG_OBJ_PI )
+        else if ( pEntry->Type == AIG_OBJ_CI )
         {
             if ( pEntry->iFan1 == 0 ) // true PI
             {
@@ -827,7 +827,7 @@ Vec_Ptr_t * Saig_MvManDeriveMap( Saig_MvMan_t * p, int fVerbose )
     int i, k, j, FlopK, FlopJ;
     int Counter1 = 0, Counter2 = 0;
     // prepare CI map
-    vMap = Vec_PtrAlloc( Aig_ManPiNum(p->pAig) );
+    vMap = Vec_PtrAlloc( Aig_ManCiNum(p->pAig) );
     Aig_ManForEachCi( p->pAig, pObj, i )
         Vec_PtrPush( vMap, pObj );
     // detect constant flops
diff --git a/src/aig/saig/saigSimSeq.c b/src/aig/saig/saigSimSeq.c
index 89dd2b5d..a134b412 100644
--- a/src/aig/saig/saigSimSeq.c
+++ b/src/aig/saig/saigSimSeq.c
@@ -115,7 +115,7 @@ int Raig_ManCreate_rec( Raig_Man_t * p, Aig_Obj_t * pObj )
         iFan1 = Raig_ManCreate_rec( p, Aig_ObjFanin1(pObj) );
         iFan1 = (iFan1 << 1) | Aig_ObjFaninC1(pObj);
     }
-    else if ( Aig_ObjIsPo(pObj) )
+    else if ( Aig_ObjIsCo(pObj) )
     {
         iFan0 = Raig_ManCreate_rec( p, Aig_ObjFanin0(pObj) );
         iFan0 = (iFan0 << 1) | Aig_ObjFaninC0(pObj);
@@ -154,15 +154,15 @@ Raig_Man_t * Raig_ManCreate( Aig_Man_t * pAig )
     p->pAig = pAig;
     p->nPis = Saig_ManPiNum(pAig);
     p->nPos = Saig_ManPoNum(pAig);
-    p->nCis = Aig_ManPiNum(pAig);
-    p->nCos = Aig_ManPoNum(pAig);
+    p->nCis = Aig_ManCiNum(pAig);
+    p->nCos = Aig_ManCoNum(pAig);
     p->nNodes = Aig_ManNodeNum(pAig);
     nObjs = p->nCis + p->nCos + p->nNodes + 2;
     p->pFans0 = ABC_ALLOC( int, nObjs );
     p->pFans1 = ABC_ALLOC( int, nObjs );
     p->pRefs = ABC_ALLOC( int, nObjs );
     p->pSims = ABC_CALLOC( unsigned, nObjs );
-    p->vCis2Ids = Vec_IntAlloc( Aig_ManPiNum(pAig) );
+    p->vCis2Ids = Vec_IntAlloc( Aig_ManCiNum(pAig) );
     // add objects (0=unused; 1=const1)
     p->nObjs = 2;
     pObj = Aig_ManConst1( pAig );
@@ -172,7 +172,7 @@ Raig_Man_t * Raig_ManCreate( Aig_Man_t * pAig )
             Raig_ManCreate_rec( p, pObj );
     Aig_ManForEachCo( pAig, pObj, i )
         Raig_ManCreate_rec( p, pObj );
-    assert( Vec_IntSize(p->vCis2Ids) == Aig_ManPiNum(pAig) );
+    assert( Vec_IntSize(p->vCis2Ids) == Aig_ManCiNum(pAig) );
     assert( p->nObjs == nObjs );
     // collect flop outputs
     p->vLos = Vec_IntAlloc( Aig_ManRegNum(pAig) );
@@ -426,7 +426,7 @@ Abc_Cex_t * Raig_ManGenerateCounter( Aig_Man_t * pAig, int iFrame, int iOut, int
     Counter = p->nRegs;
     pData = ABC_ALLOC( unsigned, nWords );
     for ( f = 0; f <= iFrame; f++, Counter += p->nPis )
-    for ( i = 0; i < Aig_ManPiNum(pAig); i++ )
+    for ( i = 0; i < Aig_ManCiNum(pAig); i++ )
     {
         iPioId = Vec_IntEntry( vCis2Ids, i );
         if ( iPioId >= p->nPis )
diff --git a/src/aig/saig/saigStrSim.c b/src/aig/saig/saigStrSim.c
index 06890c7a..5d33595f 100644
--- a/src/aig/saig/saigStrSim.c
+++ b/src/aig/saig/saigStrSim.c
@@ -298,7 +298,7 @@ void Saig_StrSimulateRound( Aig_Man_t * p0, Aig_Man_t * p1 )
     // simulate the nodes
     Aig_ManForEachObj( p0, pObj0, i )
     {
-        if ( !Aig_ObjIsPi(pObj0) && !Aig_ObjIsNode(pObj0) )
+        if ( !Aig_ObjIsCi(pObj0) && !Aig_ObjIsNode(pObj0) )
            continue;
         pObj1 = Aig_ObjRepr(p0, pObj0);
         if ( pObj1 == NULL )
@@ -406,7 +406,7 @@ int Saig_StrSimDetectUnique( Aig_Man_t * p0, Aig_Man_t * p1 )
     // hash nodes of the first AIG 
     Aig_ManForEachObj( p0, pObj, i )
     {
-        if ( !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
+        if ( !Aig_ObjIsCi(pObj) && !Aig_ObjIsNode(pObj) )
             continue;
         if ( Aig_ObjRepr(p0, pObj) )
             continue;
@@ -423,7 +423,7 @@ int Saig_StrSimDetectUnique( Aig_Man_t * p0, Aig_Man_t * p1 )
     // hash nodes from the second AIG
     Aig_ManForEachObj( p1, pObj, i )
     {
-        if ( !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
+        if ( !Aig_ObjIsCi(pObj) && !Aig_ObjIsNode(pObj) )
             continue;
         if ( Aig_ObjRepr(p1, pObj) )
             continue;
@@ -551,7 +551,7 @@ void Saig_StrSimSetInitMatching( Aig_Man_t * p0, Aig_Man_t * p1 )
     Aig_ObjSetRepr( p1, pObj1, pObj0 );
     Saig_ManForEachPi( p0, pObj0, i )
     {
-        pObj1 = Aig_ManPi( p1, i );
+        pObj1 = Aig_ManCi( p1, i );
         Aig_ObjSetRepr( p0, pObj0, pObj1 );
         Aig_ObjSetRepr( p1, pObj1, pObj0 );
     }
@@ -650,14 +650,14 @@ void Saig_StrSimSetContiguousMatching_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
         Saig_StrSimSetContiguousMatching_rec( p, Saig_ObjLiToLo(p, pObj) );
         return;
     }
-    assert( Aig_ObjIsPi(pObj) || Aig_ObjIsNode(pObj) );
+    assert( Aig_ObjIsCi(pObj) || Aig_ObjIsNode(pObj) );
     if ( Aig_ObjRepr(p, pObj) == NULL )
         return;
     // go through the fanouts
     Aig_ObjForEachFanout( p, pObj, pFanout, iFanout, i )
         Saig_StrSimSetContiguousMatching_rec( p, pFanout );
     // go through the fanins
-    if ( !Aig_ObjIsPi( pObj ) )
+    if ( !Aig_ObjIsCi( pObj ) )
     {
         Saig_StrSimSetContiguousMatching_rec( p, Aig_ObjFanin0(pObj) );
         Saig_StrSimSetContiguousMatching_rec( p, Aig_ObjFanin1(pObj) );
@@ -724,7 +724,7 @@ void Ssw_StrSimMatchingExtendOne( Aig_Man_t * p, Vec_Ptr_t * vNodes )
     Aig_ManIncrementTravId( p );
     Aig_ManForEachObj( p, pObj, i )
     {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
             continue;
         if ( Aig_ObjRepr( p, pObj ) != NULL )
             continue;
@@ -785,7 +785,7 @@ int Ssw_StrSimMatchingCountUnmached( Aig_Man_t * p )
     int i, Counter = 0;
     Aig_ManForEachObj( p, pObj, i )
     {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
             continue;
         if ( Aig_ObjRepr( p, pObj ) != NULL )
             continue;
@@ -817,8 +817,8 @@ void Ssw_StrSimMatchingExtend( Aig_Man_t * p0, Aig_Man_t * p1, int nDist, int fV
         int nUnmached = Ssw_StrSimMatchingCountUnmached(p0);
         printf( "Extending islands by %d steps:\n", nDist );
         printf( "%2d : Total = %6d. Unmatched = %6d.  Ratio = %6.2f %%\n",
-            0, Aig_ManPiNum(p0) + Aig_ManNodeNum(p0), 
-            nUnmached, 100.0 * nUnmached/(Aig_ManPiNum(p0) + Aig_ManNodeNum(p0)) );
+            0, Aig_ManCiNum(p0) + Aig_ManNodeNum(p0), 
+            nUnmached, 100.0 * nUnmached/(Aig_ManCiNum(p0) + Aig_ManNodeNum(p0)) );
     }
     for ( d = 0; d < nDist; d++ )
     {
@@ -850,8 +850,8 @@ void Ssw_StrSimMatchingExtend( Aig_Man_t * p0, Aig_Man_t * p1, int nDist, int fV
         {
             int nUnmached = Ssw_StrSimMatchingCountUnmached(p0);
             printf( "%2d : Total = %6d. Unmatched = %6d.  Ratio = %6.2f %%\n",
-                d+1, Aig_ManPiNum(p0) + Aig_ManNodeNum(p0), 
-                nUnmached, 100.0 * nUnmached/(Aig_ManPiNum(p0) + Aig_ManNodeNum(p0)) );
+                d+1, Aig_ManCiNum(p0) + Aig_ManNodeNum(p0), 
+                nUnmached, 100.0 * nUnmached/(Aig_ManCiNum(p0) + Aig_ManNodeNum(p0)) );
         }
     }
     Vec_PtrFree( vNodes0 );
diff --git a/src/aig/saig/saigSwitch.c b/src/aig/saig/saigSwitch.c
index 37270b52..4c54e3ad 100644
--- a/src/aig/saig/saigSwitch.c
+++ b/src/aig/saig/saigSwitch.c
@@ -74,7 +74,7 @@ Saig_SimObj_t * Saig_ManCreateMan( Aig_Man_t * p )
     {
         pEntry = pAig + i;
         pEntry->Type = pObj->Type;
-        if ( Aig_ObjIsPi(pObj) || i == 0 )
+        if ( Aig_ObjIsCi(pObj) || i == 0 )
         {
             if ( Saig_ObjIsLo(p, pObj) )
             {
@@ -84,7 +84,7 @@ Saig_SimObj_t * Saig_ManCreateMan( Aig_Man_t * p )
             continue;
         }
         pEntry->iFan0 = (Aig_ObjFaninId0(pObj) << 1) | Aig_ObjFaninC0(pObj);
-        if ( Aig_ObjIsPo(pObj) )
+        if ( Aig_ObjIsCo(pObj) )
             continue;
         assert( Aig_ObjIsNode(pObj) );
         pEntry->iFan1 = (Aig_ObjFaninId1(pObj) << 1) | Aig_ObjFaninC1(pObj);
@@ -179,9 +179,9 @@ void Saig_ManSimulateFrames( Saig_SimObj_t * pAig, int nFrames, int nPref )
         {
             if ( pEntry->Type == AIG_OBJ_AND )
                 Saig_ManSimulateNode( pAig, pEntry );
-            else if ( pEntry->Type == AIG_OBJ_PO )
+            else if ( pEntry->Type == AIG_OBJ_CO )
                 Saig_ManSimulateOneInput( pAig, pEntry );
-            else if ( pEntry->Type == AIG_OBJ_PI )
+            else if ( pEntry->Type == AIG_OBJ_CI )
             {
                 if ( pEntry->iFan0 == 0 ) // true PI
                     pEntry->pData[0] = Aig_ManRandom( 0 );
@@ -548,7 +548,7 @@ Aig_CMan_t * Aig_CManCreate( Aig_Man_t * p )
     Aig_CMan_t * pCMan;
     Aig_Obj_t * pObj;
     int i;
-    pCMan = Aig_CManStart( Aig_ManPiNum(p), Aig_ManNodeNum(p), Aig_ManPoNum(p) );
+    pCMan = Aig_CManStart( Aig_ManCiNum(p), Aig_ManNodeNum(p), Aig_ManCoNum(p) );
     Aig_ManForEachNode( p, pObj, i )
         Aig_CManAddNode( pCMan, 
             (Aig_ObjFaninId0(pObj) << 1) | Aig_ObjFaninC0(pObj), 
diff --git a/src/aig/saig/saigTempor.c b/src/aig/saig/saigTempor.c
index 3b11c55c..c8c33680 100644
--- a/src/aig/saig/saigTempor.c
+++ b/src/aig/saig/saigTempor.c
@@ -98,7 +98,7 @@ Aig_Man_t * Saig_ManTemporDecompose( Aig_Man_t * pAig, int nFrames )
     }
     // create initialized timeframes
     pFrames = Saig_ManTemporFrames( pAig, nFrames );
-    assert( Aig_ManPoNum(pFrames) == Aig_ManRegNum(pAig) );
+    assert( Aig_ManCoNum(pFrames) == Aig_ManRegNum(pAig) );
 
     // start the new manager
     Aig_ManCleanData( pAig );
@@ -123,7 +123,7 @@ Aig_Man_t * Saig_ManTemporDecompose( Aig_Man_t * pAig, int nFrames )
 
     // create flop output values
     Saig_ManForEachLo( pAig, pObj, i )
-        pObj->pData = Aig_Mux( pAigNew, pReset, Aig_ObjCreateCi(pAigNew), (Aig_Obj_t *)Aig_ManPo(pFrames, i)->pData );
+        pObj->pData = Aig_Mux( pAigNew, pReset, Aig_ObjCreateCi(pAigNew), (Aig_Obj_t *)Aig_ManCo(pFrames, i)->pData );
     Aig_ManStop( pFrames );
 
     // add internal nodes of this frame
diff --git a/src/aig/saig/saigTrans.c b/src/aig/saig/saigTrans.c
index 552ec8f3..9be84e31 100644
--- a/src/aig/saig/saigTrans.c
+++ b/src/aig/saig/saigTrans.c
@@ -299,7 +299,7 @@ Aig_Man_t * Saig_ManFramesInitialMapped( Aig_Man_t * pAig, int nFrames, int nFra
             if ( fInit )
                 pObj->pData = Aig_ObjCreateCi( pFrames );
             else
-                pObj->pData = Aig_ManPi( pFrames, f * Saig_ManPiNum(pAig) + i );
+                pObj->pData = Aig_ManCi( pFrames, f * Saig_ManPiNum(pAig) + i );
             Saig_ManSetMap1( pAig, pObj, f, Aig_Regular((Aig_Obj_t *)pObj->pData) );
         }
         // add internal nodes of this frame
diff --git a/src/aig/saig/saigWnd.c b/src/aig/saig/saigWnd.c
index fc1f9191..ce70e7b4 100644
--- a/src/aig/saig/saigWnd.c
+++ b/src/aig/saig/saigWnd.c
@@ -359,7 +359,7 @@ Aig_Man_t * Saig_ManWindowInsertNodes( Aig_Man_t * p, Vec_Ptr_t * vNodes, Aig_Ma
     vSmallPi2BigNode = Vec_PtrStart( Aig_ManObjNumMax(pWnd) ); 
     vNodesPi = Saig_ManWindowCollectPis( p, vNodes );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodesPi, pObj, i )
-        Vec_PtrWriteEntry( vSmallPi2BigNode, Aig_ManPi(pWnd, i)->Id, pObj );
+        Vec_PtrWriteEntry( vSmallPi2BigNode, Aig_ManCi(pWnd, i)->Id, pObj );
     assert( i == Saig_ManPiNum(pWnd) );
     Vec_PtrFree( vNodesPi );
 
@@ -367,7 +367,7 @@ Aig_Man_t * Saig_ManWindowInsertNodes( Aig_Man_t * p, Vec_Ptr_t * vNodes, Aig_Ma
     vBigNode2SmallPo = Vec_PtrStart( Aig_ManObjNumMax(p) ); 
     vNodesPo = Saig_ManWindowCollectPos( p, vNodes, NULL );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodesPo, pObj, i )
-        Vec_PtrWriteEntry( vBigNode2SmallPo, pObj->Id, Aig_ManPo(pWnd, i) );
+        Vec_PtrWriteEntry( vBigNode2SmallPo, pObj->Id, Aig_ManCo(pWnd, i) );
     assert( i == Saig_ManPoNum(pWnd) );
     Vec_PtrFree( vNodesPo );
 
@@ -407,8 +407,8 @@ Aig_Man_t * Saig_ManWindowInsertNodes( Aig_Man_t * p, Vec_Ptr_t * vNodes, Aig_Ma
     Vec_PtrFree( vBigNode2SmallPo );
     Vec_PtrFree( vSmallPi2BigNode );
     // set the new number of registers
-    assert( Aig_ManPiNum(pNew) - Aig_ManPiNum(p) == Aig_ManPoNum(pNew) - Aig_ManPoNum(p) );
-    Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) + (Aig_ManPiNum(pNew) - Aig_ManPiNum(p)) );
+    assert( Aig_ManCiNum(pNew) - Aig_ManCiNum(p) == Aig_ManCoNum(pNew) - Aig_ManCoNum(p) );
+    Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) + (Aig_ManCiNum(pNew) - Aig_ManCiNum(p)) );
     Aig_ManCleanup( pNew );
     return pNew;
 }
@@ -567,7 +567,7 @@ Vec_Ptr_t * Saig_ManCollectedDiffNodes( Aig_Man_t * p0, Aig_Man_t * p1 )
         }
         // mark and collect unmatched objects
         Aig_ObjSetTravIdCurrent( p0, pObj0 ); 
-        if ( Aig_ObjIsNode(pObj0) || Aig_ObjIsPi(pObj0) )
+        if ( Aig_ObjIsNode(pObj0) || Aig_ObjIsCi(pObj0) )
             Vec_PtrPush( vNodes, pObj0 );
     }
     // make sure LI/LO are labeled/unlabeled mutually
@@ -658,11 +658,11 @@ void Saig_ManWindowCreatePos( Aig_Man_t * pNew, Aig_Man_t * p0, Aig_Man_t * p1 )
             continue;
         if ( Aig_ObjIsConst1(pObj0) )
             continue;
-        if ( Aig_ObjIsPi(pObj0) )
+        if ( Aig_ObjIsCi(pObj0) )
             continue;
         pObj1 = Aig_ObjRepr( p0, pObj0 );
         assert( pObj0 == Aig_ObjRepr( p1, pObj1 ) );
-        if ( Aig_ObjIsPo(pObj0) )
+        if ( Aig_ObjIsCo(pObj0) )
         {
             pFanin0 = Aig_ObjFanin0(pObj0);
             pFanin1 = Aig_ObjFanin0(pObj1);
@@ -722,7 +722,7 @@ Aig_Man_t * Saig_ManWindowExtractMiter( Aig_Man_t * p0, Aig_Man_t * p1 )
     // add matching of POs and LIs
     Saig_ManForEachPo( p0, pObj0, i )
     {
-        pObj1 = Aig_ManPo( p1, i );
+        pObj1 = Aig_ManCo( p1, i );
         Aig_ObjSetRepr( p0, pObj0, pObj1 );
         Aig_ObjSetRepr( p1, pObj1, pObj0 );
     }
diff --git a/src/base/abci/abcDar.c b/src/base/abci/abcDar.c
index 6d705ca9..1d96edf1 100644
--- a/src/base/abci/abcDar.c
+++ b/src/base/abci/abcDar.c
@@ -397,7 +397,7 @@ Abc_Ntk_t * Abc_NtkFromDar( Abc_Ntk_t * pNtkOld, Aig_Man_t * pMan )
     // connect the PO nodes
     Aig_ManForEachCo( pMan, pObj, i )
     {
-        if ( pMan->nAsserts && i == Aig_ManPoNum(pMan) - pMan->nAsserts )
+        if ( pMan->nAsserts && i == Aig_ManCoNum(pMan) - pMan->nAsserts )
             break;
         Abc_ObjAddFanin( Abc_NtkCo(pNtkNew, i), (Abc_Obj_t *)Aig_ObjChild0Copy(pObj) );
     }
@@ -432,17 +432,17 @@ Abc_Ntk_t * Abc_NtkFromDarSeqSweep( Abc_Ntk_t * pNtkOld, Aig_Man_t * pMan )
     pNtkNew = Abc_NtkStartFromNoLatches( pNtkOld, ABC_NTK_STRASH, ABC_FUNC_AIG );
     pNtkNew->nConstrs = pMan->nConstrs;
     // consider the case of target enlargement
-    if ( Abc_NtkCiNum(pNtkNew) < Aig_ManPiNum(pMan) - Aig_ManRegNum(pMan) )
+    if ( Abc_NtkCiNum(pNtkNew) < Aig_ManCiNum(pMan) - Aig_ManRegNum(pMan) )
     {
-        for ( i = Aig_ManPiNum(pMan) - Aig_ManRegNum(pMan) - Abc_NtkCiNum(pNtkNew); i > 0; i-- )
+        for ( i = Aig_ManCiNum(pMan) - Aig_ManRegNum(pMan) - Abc_NtkCiNum(pNtkNew); i > 0; i-- )
         {
             pObjNew = Abc_NtkCreatePi( pNtkNew );
             Abc_ObjAssignName( pObjNew, Abc_ObjName(pObjNew), NULL );
         }
         Abc_NtkOrderCisCos( pNtkNew );
     }
-    assert( Abc_NtkCiNum(pNtkNew) == Aig_ManPiNum(pMan) - Aig_ManRegNum(pMan) );
-    assert( Abc_NtkCoNum(pNtkNew) == Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan) );
+    assert( Abc_NtkCiNum(pNtkNew) == Aig_ManCiNum(pMan) - Aig_ManRegNum(pMan) );
+    assert( Abc_NtkCoNum(pNtkNew) == Aig_ManCoNum(pMan) - Aig_ManRegNum(pMan) );
     // transfer the pointers to the basic nodes
     Aig_ManConst1(pMan)->pData = Abc_AigConst1(pNtkNew);
     Aig_ManForEachPiSeq( pMan, pObj, i )
@@ -468,7 +468,7 @@ Abc_Ntk_t * Abc_NtkFromDarSeqSweep( Abc_Ntk_t * pNtkOld, Aig_Man_t * pMan )
     // connect the PO nodes
     Aig_ManForEachCo( pMan, pObj, i )
     {
-//        if ( pMan->nAsserts && i == Aig_ManPoNum(pMan) - pMan->nAsserts )
+//        if ( pMan->nAsserts && i == Aig_ManCoNum(pMan) - pMan->nAsserts )
 //            break;
         iNodeId = Nm_ManFindIdByNameTwoTypes( pNtkNew->pManName, Abc_ObjName(Abc_NtkCo(pNtkNew, i)), ABC_OBJ_PI, ABC_OBJ_BO );
         if ( iNodeId >= 0 )
@@ -568,8 +568,8 @@ Abc_Ntk_t * Abc_NtkFromAigPhase( Aig_Man_t * pMan )
         Abc_ObjAssignName( pObjNew, Abc_ObjName(pObjNew), NULL );
         pObj->pData = pObjNew;
     }
-    assert( Abc_NtkCiNum(pNtkNew) == Aig_ManPiNum(pMan) - Aig_ManRegNum(pMan) );
-    assert( Abc_NtkCoNum(pNtkNew) == Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan) );
+    assert( Abc_NtkCiNum(pNtkNew) == Aig_ManCiNum(pMan) - Aig_ManRegNum(pMan) );
+    assert( Abc_NtkCoNum(pNtkNew) == Aig_ManCoNum(pMan) - Aig_ManRegNum(pMan) );
     // create as many latches as there are registers in the manager
     Aig_ManForEachLiLoSeq( pMan, pObjLi, pObjLo, i )
     {
@@ -651,8 +651,8 @@ Abc_Ntk_t * Abc_NtkAfterTrim( Aig_Man_t * pMan, Abc_Ntk_t * pNtkOld )
         pObjOld = Abc_NtkCo( pNtkOld, i );
         Abc_ObjAssignName( pObjNew, Abc_ObjName(pObjOld), NULL );
     }
-    assert( Abc_NtkCiNum(pNtkNew) == Aig_ManPiNum(pMan) - Aig_ManRegNum(pMan) );
-    assert( Abc_NtkCoNum(pNtkNew) == Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan) );
+    assert( Abc_NtkCiNum(pNtkNew) == Aig_ManCiNum(pMan) - Aig_ManRegNum(pMan) );
+    assert( Abc_NtkCoNum(pNtkNew) == Aig_ManCoNum(pMan) - Aig_ManRegNum(pMan) );
     // create as many latches as there are registers in the manager
     Aig_ManForEachLiLoSeq( pMan, pObjLi, pObjLo, i )
     {
@@ -1259,7 +1259,7 @@ Abc_Ntk_t * Abc_NtkConstructFromCnf( Abc_Ntk_t * pNtk, Cnf_Man_t * p, Vec_Ptr_t
     // make the mapper point to the new network
     Aig_ManConst1(p->pManAig)->pData = Abc_NtkCreateNodeConst1(pNtkNew);
     Abc_NtkForEachCi( pNtk, pNode, i )
-        Aig_ManPi(p->pManAig, i)->pData = pNode->pCopy;
+        Aig_ManCi(p->pManAig, i)->pData = pNode->pCopy;
     // process the nodes in topological order
     vCover = Vec_IntAlloc( 1 << 16 );
     Vec_PtrForEachEntry( Aig_Obj_t *, vMapped, pObj, i )
@@ -1286,7 +1286,7 @@ Abc_Ntk_t * Abc_NtkConstructFromCnf( Abc_Ntk_t * pNtk, Cnf_Man_t * p, Vec_Ptr_t
     // add the CO drivers
     Abc_NtkForEachCo( pNtk, pNode, i )
     {
-        pObj = Aig_ManPo(p->pManAig, i);
+        pObj = Aig_ManCo(p->pManAig, i);
         pNodeNew = Abc_ObjNotCond( (Abc_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
         Abc_ObjAddFanin( pNode->pCopy, pNodeNew );
     }
@@ -3914,13 +3914,13 @@ Abc_Ntk_t * Abc_NtkDarCleanupAig( Abc_Ntk_t * pNtk, int fCleanupPis, int fCleanu
         return NULL;
     if ( fCleanupPis )
     {
-        int Temp = Aig_ManPiCleanup( pMan );
+        int Temp = Aig_ManCiCleanup( pMan );
         if ( fVerbose )
             Abc_Print( 1, "Cleanup removed %d primary inputs without fanout.\n", Temp );                                                                     
     }
     if ( fCleanupPos )
     {
-        int Temp = Aig_ManPoCleanup( pMan );
+        int Temp = Aig_ManCoCleanup( pMan );
         if ( fVerbose )
             Abc_Print( 1, "Cleanup removed %d primary outputs driven by const-0.\n", Temp );                                                                     
     }
diff --git a/src/base/abci/abcDress2.c b/src/base/abci/abcDress2.c
index 4fb89759..b50a660b 100644
--- a/src/base/abci/abcDress2.c
+++ b/src/base/abci/abcDress2.c
@@ -84,8 +84,8 @@ Aig_Man_t * Aig_ManCreateDualOutputMiter( Aig_Man_t * p1, Aig_Man_t * p2 )
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
-    assert( Aig_ManPiNum(p1) == Aig_ManPiNum(p2) );
-    assert( Aig_ManPoNum(p1) == Aig_ManPoNum(p2) );
+    assert( Aig_ManCiNum(p1) == Aig_ManCiNum(p2) );
+    assert( Aig_ManCoNum(p1) == Aig_ManCoNum(p2) );
     pNew = Aig_ManStart( Aig_ManObjNumMax(p1) + Aig_ManObjNumMax(p2) );
     // add first AIG
     Aig_ManConst1(p1)->pData = Aig_ManConst1(pNew);
@@ -96,14 +96,14 @@ Aig_Man_t * Aig_ManCreateDualOutputMiter( Aig_Man_t * p1, Aig_Man_t * p2 )
     // add second AIG
     Aig_ManConst1(p2)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p2, pObj, i )
-        pObj->pData = Aig_ManPi( pNew, i );
+        pObj->pData = Aig_ManCi( pNew, i );
     Aig_ManForEachNode( p2, pObj, i )
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // add the outputs
-    for ( i = 0; i < Aig_ManPoNum(p1); i++ )
+    for ( i = 0; i < Aig_ManCoNum(p1); i++ )
     {
-        Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(Aig_ManPo(p1, i)) );
-        Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(Aig_ManPo(p2, i)) );
+        Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1, i)) );
+        Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(Aig_ManCo(p2, i)) );
     }
     Aig_ManCleanup( pNew );
     return pNew;
diff --git a/src/base/io/ioWriteAiger.c b/src/base/io/ioWriteAiger.c
index d5b17a72..a22d16ba 100644
--- a/src/base/io/ioWriteAiger.c
+++ b/src/base/io/ioWriteAiger.c
@@ -842,7 +842,7 @@ void Io_WriteAigerCex( Abc_Cex_t * pCex, Abc_Ntk_t * pNtk, void * pG, char * pFi
         for ( k = 0; k < pCex->nPis; k++ )
         {
             fprintf( pFile, "%d", Abc_InfoHasBit(pCex->pData, b) );
-            Aig_ManPi( pAig, k )->fMarkA = Abc_InfoHasBit(pCex->pData, b++);
+            Aig_ManCi( pAig, k )->fMarkA = Abc_InfoHasBit(pCex->pData, b++);
         }
         fprintf( pFile, " " );
         Aig_ManForEachNode( pAig, pObj, k )
diff --git a/src/opt/cgt/cgtAig.c b/src/opt/cgt/cgtAig.c
index 96f6a289..8d403732 100644
--- a/src/opt/cgt/cgtAig.c
+++ b/src/opt/cgt/cgtAig.c
@@ -91,7 +91,7 @@ void Cgt_ManDetectFanout_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, int nOdcMax, V
 {
     Aig_Obj_t * pFanout;
     int f, iFanout = -1;
-    if ( Aig_ObjIsPo(pObj) || Aig_ObjLevel(pObj) > nOdcMax )
+    if ( Aig_ObjIsCo(pObj) || Aig_ObjLevel(pObj) > nOdcMax )
         return;
     if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
         return;
@@ -150,7 +150,7 @@ void Cgt_ManDetectFanout( Aig_Man_t * pAig, Aig_Obj_t * pObj, int nOdcMax, Vec_P
 ***********************************************************************/
 void Cgt_ManCollectVisited_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Ptr_t * vVisited )
 {
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return;
     if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
         return;
@@ -213,7 +213,7 @@ Aig_Obj_t * Cgt_ManConstructCareCondition( Cgt_Man_t * p, Aig_Man_t * pNew, Aig_
 {
     Aig_Obj_t * pMiter, * pObj, * pTemp;
     int i;
-    assert( Aig_ObjIsPi(pObjLo) );
+    assert( Aig_ObjIsCi(pObjLo) );
     // detect nodes and their cone
     Cgt_ManDetectFanout( p->pAig, pObjLo, p->pPars->nOdcMax, p->vFanout );
     Cgt_ManCollectVisited( p->pAig, p->vFanout, p->vVisited );
@@ -341,7 +341,7 @@ Aig_Obj_t * Cgt_ManConstructCare_rec( Aig_Man_t * pCare, Aig_Obj_t * pObj, Aig_M
     if ( Aig_ObjIsTravIdCurrent( pCare, pObj ) )
         return (Aig_Obj_t *)pObj->pData;
     Aig_ObjSetTravIdCurrent( pCare, pObj );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return (Aig_Obj_t *)(pObj->pData = NULL);
     pObj0 = Cgt_ManConstructCare_rec( pCare, Aig_ObjFanin0(pObj), pNew );
     if ( pObj0 == NULL )
@@ -375,7 +375,7 @@ void Cgt_ManConstructCare( Aig_Man_t * pNew, Aig_Man_t * pCare, Vec_Vec_t * vSup
     Aig_ManIncrementTravId( pCare );
     Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pLeaf, i )
     {
-        pPi = Aig_ManPi( pCare, Aig_ObjPioNum(pLeaf) );
+        pPi = Aig_ManCi( pCare, Aig_ObjPioNum(pLeaf) );
         Aig_ObjSetTravIdCurrent( pCare, pPi );
         pPi->pData = pLeaf->pData;
     }
@@ -385,7 +385,7 @@ void Cgt_ManConstructCare( Aig_Man_t * pNew, Aig_Man_t * pCare, Vec_Vec_t * vSup
         vOuts = Vec_VecEntryInt( vSuppsInv, Aig_ObjPioNum(pLeaf) );
         Vec_IntForEachEntry( vOuts, iOut, k )
         {
-            pPo = Aig_ManPo( pCare, iOut );
+            pPo = Aig_ManCo( pCare, iOut );
             if ( Aig_ObjIsTravIdCurrent( pCare, pPo ) )
                 continue;
             Aig_ObjSetTravIdCurrent( pCare, pPo );
@@ -416,7 +416,7 @@ Aig_Obj_t * Cgt_ManDupPartition_rec( Aig_Man_t * pNew, Aig_Man_t * pAig, Aig_Obj
     if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
         return (Aig_Obj_t *)pObj->pData;
     Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         pObj->pData = Aig_ObjCreateCi( pNew );
         Vec_PtrPush( vLeaves, pObj );
@@ -453,16 +453,16 @@ Aig_Man_t * Cgt_ManDupPartition( Aig_Man_t * pFrame, int nVarsMin, int nFlopsMin
     Aig_ManIncrementTravId( pFrame );
     Aig_ManConst1(pFrame)->pData = Aig_ManConst1(pNew);
     Aig_ObjSetTravIdCurrent( pFrame, Aig_ManConst1(pFrame) );
-    for ( i = iStart; i < iStart + nFlopsMin && i < Aig_ManPoNum(pFrame); i++ )
+    for ( i = iStart; i < iStart + nFlopsMin && i < Aig_ManCoNum(pFrame); i++ )
     {
-        pObj = Aig_ManPo( pFrame, i );
+        pObj = Aig_ManCo( pFrame, i );
         Cgt_ManDupPartition_rec( pNew, pFrame, Aig_ObjFanin0(pObj), vLeaves );
         Vec_PtrPush( vRoots, Aig_ObjChild0Copy(pObj) );
         Vec_PtrPush( vPos, pObj );
     }
-    for ( ; Aig_ManObjNum(pNew) < nVarsMin && i < Aig_ManPoNum(pFrame); i++ )
+    for ( ; Aig_ManObjNum(pNew) < nVarsMin && i < Aig_ManCoNum(pFrame); i++ )
     {
-        pObj = Aig_ManPo( pFrame, i );
+        pObj = Aig_ManCo( pFrame, i );
         Cgt_ManDupPartition_rec( pNew, pFrame, Aig_ObjFanin0(pObj), vLeaves );
         Vec_PtrPush( vRoots, Aig_ObjChild0Copy(pObj) );
         Vec_PtrPush( vPos, pObj );
diff --git a/src/opt/cgt/cgtCore.c b/src/opt/cgt/cgtCore.c
index 27810e1a..73195413 100644
--- a/src/opt/cgt/cgtCore.c
+++ b/src/opt/cgt/cgtCore.c
@@ -132,7 +132,7 @@ void Cgt_ClockGatingRangeCheck( Cgt_Man_t * p, int iStart, int nOutputs )
     Vec_Ptr_t * vNodes = p->vFanout;
     Aig_Obj_t * pMiter, * pCand, * pMiterFrame, * pCandFrame, * pMiterPart, * pCandPart;
     int i, k, RetValue, nCalls;
-    assert( Vec_VecSize(p->vGatesAll) == Aig_ManPoNum(p->pFrame) );
+    assert( Vec_VecSize(p->vGatesAll) == Aig_ManCoNum(p->pFrame) );
     // go through all the registers inputs of this range
     for ( i = iStart; i < iStart + nOutputs; i++ )
     {
@@ -218,7 +218,7 @@ p->timePrepare += clock() - clk;
     if ( p->pPars->fVeryVerbose )
     {
         printf( "%5d : D =%4d. C =%5d. Var =%6d. Pr =%5d. Cex =%5d. F =%4d. Saved =%6d. ",
-            iStart, iStop-iStart, Aig_ManPoNum(p->pPart)-nOutputs, p->pSat->size, 
+            iStart, iStop-iStart, Aig_ManCoNum(p->pPart)-nOutputs, p->pSat->size, 
             p->nCallsUnsat-nCallsUnsat, 
             p->nCallsSat  -nCallsSat, 
             p->nCallsUndec-nCallsUndec,
@@ -255,9 +255,9 @@ Vec_Vec_t * Cgt_ClockGatingCandidates( Aig_Man_t * pAig, Aig_Man_t * pCare, Cgt_
     p = Cgt_ManCreate( pAig, pCare, pPars );
     p->pFrame = Cgt_ManDeriveAigForGating( p );
 p->timeAig += clock() - clk;
-    assert( Aig_ManPoNum(p->pFrame) == Saig_ManRegNum(p->pAig) );
-    pProgress = Bar_ProgressStart( stdout, Aig_ManPoNum(p->pFrame) );
-    for ( iStart = 0; iStart < Aig_ManPoNum(p->pFrame); )
+    assert( Aig_ManCoNum(p->pFrame) == Saig_ManRegNum(p->pAig) );
+    pProgress = Bar_ProgressStart( stdout, Aig_ManCoNum(p->pFrame) );
+    for ( iStart = 0; iStart < Aig_ManCoNum(p->pFrame); )
     {
         Bar_ProgressUpdate( pProgress, iStart, NULL );
         iStart = Cgt_ClockGatingRange( p, iStart );
diff --git a/src/opt/cgt/cgtDecide.c b/src/opt/cgt/cgtDecide.c
index 2ac206cb..3370498e 100644
--- a/src/opt/cgt/cgtDecide.c
+++ b/src/opt/cgt/cgtDecide.c
@@ -56,7 +56,7 @@ void Cgt_ManCollectFanoutPos_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Ptr_t
     if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         Vec_PtrPush( vFanout, pObj );
         return;
diff --git a/src/opt/cgt/cgtMan.c b/src/opt/cgt/cgtMan.c
index 7744226d..2ba5baae 100644
--- a/src/opt/cgt/cgtMan.c
+++ b/src/opt/cgt/cgtMan.c
@@ -61,10 +61,10 @@ Cgt_Man_t * Cgt_ManCreate( Aig_Man_t * pAig, Aig_Man_t * pCare, Cgt_Par_t * pPar
     if ( pCare == NULL )
         return p;
     // check out the constraints
-    if ( Aig_ManPiNum(pCare) != Aig_ManPiNum(pAig) )
+    if ( Aig_ManCiNum(pCare) != Aig_ManCiNum(pAig) )
     {
         printf( "The PI count of care (%d) and AIG (%d) differ. Careset is not used.\n", 
-            Aig_ManPiNum(pCare), Aig_ManPiNum(pAig) );
+            Aig_ManCiNum(pCare), Aig_ManCiNum(pAig) );
         return p;
     }
     p->pCare = pCare;
diff --git a/src/opt/csw/cswCore.c b/src/opt/csw/cswCore.c
index 9159417f..f1c2d934 100644
--- a/src/opt/csw/cswCore.c
+++ b/src/opt/csw/cswCore.c
@@ -55,7 +55,7 @@ clk = clock();
     Aig_ManForEachCi( p->pManRes, pObj, i )
     {
         Csw_ObjPrepareCuts( p, pObj, 1 );
-        Csw_ObjAddRefs( p, pObj, Aig_ManPi(p->pManAig,i)->nRefs );
+        Csw_ObjAddRefs( p, pObj, Aig_ManCi(p->pManAig,i)->nRefs );
     }
     // process the nodes
     Aig_ManForEachNode( pAig, pObj, i )
diff --git a/src/opt/csw/cswMan.c b/src/opt/csw/cswMan.c
index 0f0d79f9..aa5d2dea 100644
--- a/src/opt/csw/cswMan.c
+++ b/src/opt/csw/cswMan.c
@@ -58,7 +58,7 @@ Csw_Man_t * Csw_ManStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, int fVer
     p->pManAig  = pMan;
     // create the new manager
     p->pManRes  = Aig_ManStartFrom( pMan );
-    assert( Aig_ManPiNum(p->pManAig) == Aig_ManPiNum(p->pManRes) );
+    assert( Aig_ManCiNum(p->pManAig) == Aig_ManCiNum(p->pManRes) );
     // allocate room for cuts and equivalent nodes
     p->pnRefs   = ABC_ALLOC( int, Aig_ManObjNumMax(pMan) );
     p->pEquiv   = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pMan) );
@@ -76,7 +76,7 @@ Csw_Man_t * Csw_ManStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, int fVer
     // set the pointers to the available fraig nodes
     Csw_ObjSetEquiv( p, Aig_ManConst1(p->pManAig), Aig_ManConst1(p->pManRes) );
     Aig_ManForEachCi( p->pManAig, pObj, i )
-        Csw_ObjSetEquiv( p, pObj, Aig_ManPi(p->pManRes, i) );
+        Csw_ObjSetEquiv( p, pObj, Aig_ManCi(p->pManRes, i) );
     // room for temporary truth tables
     p->puTemp[0] = ABC_ALLOC( unsigned, 4 * p->nTruthWords );
     p->puTemp[1] = p->puTemp[0] + p->nTruthWords;
diff --git a/src/opt/dar/darBalance.c b/src/opt/dar/darBalance.c
index a0a17311..558316a6 100644
--- a/src/opt/dar/darBalance.c
+++ b/src/opt/dar/darBalance.c
@@ -500,7 +500,7 @@ Aig_Man_t * Dar_ManBalance( Aig_Man_t * p, int fUpdateLevel )
         {
             if ( Aig_ObjIsNode(pObj) || Aig_ObjIsConst1(pObj) )
                 continue;
-            if ( Aig_ObjIsPi(pObj) )
+            if ( Aig_ObjIsCi(pObj) )
             {
                 // copy the PI
                 pObjNew = Aig_ObjCreateCi(pNew); 
@@ -510,7 +510,7 @@ Aig_Man_t * Dar_ManBalance( Aig_Man_t * p, int fUpdateLevel )
                 arrTime = Tim_ManGetCiArrival( (Tim_Man_t *)p->pManTime, Aig_ObjPioNum(pObj) );
                 pObjNew->Level = (int)arrTime;
             }
-            else if ( Aig_ObjIsPo(pObj) )
+            else if ( Aig_ObjIsCo(pObj) )
             {
                 // perform balancing
                 pDriver = Aig_ObjReal_rec( Aig_ObjChild0(pObj) );
diff --git a/src/opt/dar/darCut.c b/src/opt/dar/darCut.c
index b272b388..f0d10100 100644
--- a/src/opt/dar/darCut.c
+++ b/src/opt/dar/darCut.c
@@ -734,7 +734,7 @@ Dar_Cut_t * Dar_ObjComputeCuts_rec( Dar_Man_t * p, Aig_Obj_t * pObj )
 {
     if ( Dar_ObjCuts(pObj) )
         return Dar_ObjCuts(pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return Dar_ObjPrepareCuts( p, pObj );
     if ( Aig_ObjIsBuf(pObj) )
         return Dar_ObjComputeCuts_rec( p, Aig_ObjFanin0(pObj) );
diff --git a/src/opt/dar/darRefact.c b/src/opt/dar/darRefact.c
index 60364358..0ff7c44f 100644
--- a/src/opt/dar/darRefact.c
+++ b/src/opt/dar/darRefact.c
@@ -477,7 +477,7 @@ int Dar_ObjCutLevelAchieved( Vec_Ptr_t * vCut, int nLevelMin )
     Aig_Obj_t * pObj;
     int i;
     Vec_PtrForEachEntry( Aig_Obj_t *, vCut, pObj, i )
-        if ( !Aig_ObjIsPi(pObj) && (int)pObj->Level <= nLevelMin )
+        if ( !Aig_ObjIsCi(pObj) && (int)pObj->Level <= nLevelMin )
             return 1;
     return 0;
 }
diff --git a/src/opt/mfs/mfsCore.c b/src/opt/mfs/mfsCore.c
index 72774730..5214e833 100644
--- a/src/opt/mfs/mfsCore.c
+++ b/src/opt/mfs/mfsCore.c
@@ -447,7 +447,7 @@ int Abc_NtkMfs( Abc_Ntk_t * pNtk, Mfs_Par_t * pPars )
         }
     }
     if ( p->pCare != NULL )
-        printf( "Performing optimization with %d external care clauses.\n", Aig_ManPoNum(p->pCare) );
+        printf( "Performing optimization with %d external care clauses.\n", Aig_ManCoNum(p->pCare) );
     // prepare the BDC manager
     if ( !pPars->fResub )
     {
diff --git a/src/opt/mfs/mfsInter.c b/src/opt/mfs/mfsInter.c
index d18613c7..b3de7b96 100644
--- a/src/opt/mfs/mfsInter.c
+++ b/src/opt/mfs/mfsInter.c
@@ -92,12 +92,12 @@ sat_solver * Abc_MfsCreateSolverResub( Mfs_Man_t * p, int * pCands, int nCands,
     int Lits[2], status, iVar, i, c;
 
     // get the literal for the output of F
-    pObjPo = Aig_ManPo( p->pAigWin, Aig_ManPoNum(p->pAigWin) - Vec_PtrSize(p->vDivs) - 1 );
+    pObjPo = Aig_ManCo( p->pAigWin, Aig_ManCoNum(p->pAigWin) - Vec_PtrSize(p->vDivs) - 1 );
     Lits[0] = toLitCond( p->pCnf->pVarNums[pObjPo->Id], fInvert );
 
     // collect the outputs of the divisors
     Vec_IntClear( p->vProjVarsCnf );
-    Vec_PtrForEachEntryStart( Aig_Obj_t *, p->pAigWin->vPos, pObjPo, i, Aig_ManPoNum(p->pAigWin) - Vec_PtrSize(p->vDivs) )
+    Vec_PtrForEachEntryStart( Aig_Obj_t *, p->pAigWin->vCos, pObjPo, i, Aig_ManCoNum(p->pAigWin) - Vec_PtrSize(p->vDivs) )
     {
         assert( p->pCnf->pVarNums[pObjPo->Id] >= 0 );
         Vec_IntPush( p->vProjVarsCnf, p->pCnf->pVarNums[pObjPo->Id] );
diff --git a/src/opt/mfs/mfsSat.c b/src/opt/mfs/mfsSat.c
index e5e9de1a..e18487bf 100644
--- a/src/opt/mfs/mfsSat.c
+++ b/src/opt/mfs/mfsSat.c
@@ -98,7 +98,7 @@ int Abc_NtkMfsSolveSat( Mfs_Man_t * p, Abc_Obj_t * pNode )
     int RetValue, i;
     // collect projection variables
     Vec_IntClear( p->vProjVarsSat );
-    Vec_PtrForEachEntryStart( Aig_Obj_t *, p->pAigWin->vPos, pObjPo, i, Aig_ManPoNum(p->pAigWin) - Abc_ObjFaninNum(pNode) )
+    Vec_PtrForEachEntryStart( Aig_Obj_t *, p->pAigWin->vCos, pObjPo, i, Aig_ManCoNum(p->pAigWin) - Abc_ObjFaninNum(pNode) )
     {
         assert( p->pCnf->pVarNums[pObjPo->Id] >= 0 );
         Vec_IntPush( p->vProjVarsSat, p->pCnf->pVarNums[pObjPo->Id] );
@@ -156,11 +156,11 @@ int Abc_NtkAddOneHotness( Mfs_Man_t * p )
 {
     Aig_Obj_t * pObj1, * pObj2;
     int i, k, Lits[2];
-    for ( i = 0; i < Vec_PtrSize(p->pAigWin->vPis); i++ )
-    for ( k = i+1; k < Vec_PtrSize(p->pAigWin->vPis); k++ )
+    for ( i = 0; i < Vec_PtrSize(p->pAigWin->vCis); i++ )
+    for ( k = i+1; k < Vec_PtrSize(p->pAigWin->vCis); k++ )
     {
-        pObj1 = Aig_ManPi( p->pAigWin, i );
-        pObj2 = Aig_ManPi( p->pAigWin, k );
+        pObj1 = Aig_ManCi( p->pAigWin, i );
+        pObj2 = Aig_ManCi( p->pAigWin, k );
         Lits[0] = toLitCond( p->pCnf->pVarNums[pObj1->Id], 1 );
         Lits[1] = toLitCond( p->pCnf->pVarNums[pObj2->Id], 1 );
         if ( !sat_solver_addclause( p->pSat, Lits, Lits+2 ) )
diff --git a/src/opt/mfs/mfsStrash.c b/src/opt/mfs/mfsStrash.c
index b70b3e9b..5681564e 100644
--- a/src/opt/mfs/mfsStrash.c
+++ b/src/opt/mfs/mfsStrash.c
@@ -68,8 +68,8 @@ Hop_Obj_t * Abc_MfsConvertAigToHop( Aig_Man_t * pMan, Hop_Man_t * pHop )
 {
     Aig_Obj_t * pRoot, * pObj;
     int i;
-    assert( Aig_ManPoNum(pMan) == 1 );
-    pRoot = Aig_ManPo( pMan, 0 );
+    assert( Aig_ManCoNum(pMan) == 1 );
+    pRoot = Aig_ManCo( pMan, 0 );
     // check the case of a constant
     if ( Aig_ObjIsConst1( Aig_ObjFanin0(pRoot) ) )
         return Hop_NotCond( Hop_ManConst1(pHop), Aig_ObjFaninC0(pRoot) );
@@ -206,7 +206,7 @@ Aig_Obj_t * Abc_NtkConstructCare_rec( Aig_Man_t * pCare, Aig_Obj_t * pObj, Aig_M
     if ( Aig_ObjIsTravIdCurrent( pCare, pObj ) )
         return (Aig_Obj_t *)pObj->pData;
     Aig_ObjSetTravIdCurrent( pCare, pObj );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return (Aig_Obj_t *)(pObj->pData = NULL);
     pObj0 = Abc_NtkConstructCare_rec( pCare, Aig_ObjFanin0(pObj), pMan );
     if ( pObj0 == NULL )
@@ -249,7 +249,7 @@ Aig_Man_t * Abc_NtkConstructAig( Mfs_Man_t * p, Abc_Obj_t * pNode )
         Aig_ManIncrementTravId( p->pCare );
         Vec_PtrForEachEntry( Abc_Obj_t *, p->vSupp, pFanin, i )
         {
-            pPi = Aig_ManPi( p->pCare, (int)(ABC_PTRUINT_T)pFanin->pData );
+            pPi = Aig_ManCi( p->pCare, (int)(ABC_PTRUINT_T)pFanin->pData );
             Aig_ObjSetTravIdCurrent( p->pCare, pPi );
             pPi->pData = pFanin->pCopy;
         }
@@ -259,7 +259,7 @@ Aig_Man_t * Abc_NtkConstructAig( Mfs_Man_t * p, Abc_Obj_t * pNode )
             vOuts = (Vec_Int_t *)Vec_PtrEntry( p->vSuppsInv, (int)(ABC_PTRUINT_T)pFanin->pData );
             Vec_IntForEachEntry( vOuts, iOut, k )
             {
-                pPo = Aig_ManPo( p->pCare, iOut );
+                pPo = Aig_ManCo( p->pCare, iOut );
                 if ( Aig_ObjIsTravIdCurrent( p->pCare, pPo ) )
                     continue;
                 Aig_ObjSetTravIdCurrent( p->pCare, pPo );
@@ -336,7 +336,7 @@ Aig_Man_t * Abc_NtkAigForConstraints( Mfs_Man_t * p, Abc_Obj_t * pNode )
     Aig_ManIncrementTravId( p->pCare );
     Vec_PtrForEachEntry( Abc_Obj_t *, p->vSupp, pFanin, i )
     {
-        pPi = Aig_ManPi( p->pCare, (int)(ABC_PTRUINT_T)pFanin->pData );
+        pPi = Aig_ManCi( p->pCare, (int)(ABC_PTRUINT_T)pFanin->pData );
         Aig_ObjSetTravIdCurrent( p->pCare, pPi );
         pPi->pData = Aig_ObjCreateCi(pMan);
     }
@@ -347,7 +347,7 @@ Aig_Man_t * Abc_NtkAigForConstraints( Mfs_Man_t * p, Abc_Obj_t * pNode )
         vOuts = (Vec_Int_t *)Vec_PtrEntry( p->vSuppsInv, (int)(ABC_PTRUINT_T)pFanin->pData );
         Vec_IntForEachEntry( vOuts, iOut, k )
         {
-            pPo = Aig_ManPo( p->pCare, iOut );
+            pPo = Aig_ManCo( p->pCare, iOut );
             if ( Aig_ObjIsTravIdCurrent( p->pCare, pPo ) )
                 continue;
             Aig_ObjSetTravIdCurrent( p->pCare, pPo );
@@ -391,7 +391,7 @@ double Abc_NtkConstraintRatio( Mfs_Man_t * p, Abc_Obj_t * pNode )
     int Counter;
     pMan = Abc_NtkAigForConstraints( p, pNode );
     pSim = Fra_SmlSimulateComb( pMan, nSimWords );
-    Counter = Fra_SmlNodeCountOnes( pSim, Aig_ManPo(pMan, 0) );
+    Counter = Fra_SmlNodeCountOnes( pSim, Aig_ManCo(pMan, 0) );
     Aig_ManStop( pMan );
     Fra_SmlStop( pSim );
     return 1.0 * Counter / (32 * nSimWords);
diff --git a/src/opt/nwk/nwkMap.c b/src/opt/nwk/nwkMap.c
index cb35fee9..599dc3ee 100644
--- a/src/opt/nwk/nwkMap.c
+++ b/src/opt/nwk/nwkMap.c
@@ -135,7 +135,7 @@ If_Man_t * Nwk_ManToIf( Aig_Man_t * p, If_Par_t * pPars, Vec_Ptr_t * vAigToIf )
                 If_NotCond( (If_Obj_t *)Aig_ObjFanin1(pNode)->pData, Aig_ObjFaninC1(pNode) ) );
 //            printf( "no%d=%d\n ", If_ObjId(pIfObj), If_ObjLevel(pIfObj) );
         }
-        else if ( Aig_ObjIsPi(pNode) )
+        else if ( Aig_ObjIsCi(pNode) )
         {
             pIfObj = If_ManCreateCi( pIfMan );
             If_ObjSetLevel( pIfObj, Aig_ObjLevel(pNode) );
@@ -143,7 +143,7 @@ If_Man_t * Nwk_ManToIf( Aig_Man_t * p, If_Par_t * pPars, Vec_Ptr_t * vAigToIf )
             if ( pIfMan->nLevelMax < (int)pIfObj->Level )
                 pIfMan->nLevelMax = (int)pIfObj->Level;
         }
-        else if ( Aig_ObjIsPo(pNode) )
+        else if ( Aig_ObjIsCo(pNode) )
         {
             pIfObj = If_ManCreateCo( pIfMan, If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ) );
 //            printf( "po%d=%d\n ", If_ObjId(pIfObj), If_ObjLevel(pIfObj) );
@@ -281,8 +281,8 @@ Nwk_Man_t * Nwk_ManFromIf( If_Man_t * pIfMan, Aig_Man_t * p, Vec_Ptr_t * vAigToI
     If_Obj_t * pIfObj;
     If_Cut_t * pCutBest;
     int i, k, nLeaves, * ppLeaves;
-    assert( Aig_ManPiNum(p) == If_ManCiNum(pIfMan) );
-    assert( Aig_ManPoNum(p) == If_ManCoNum(pIfMan) );
+    assert( Aig_ManCiNum(p) == If_ManCiNum(pIfMan) );
+    assert( Aig_ManCoNum(p) == If_ManCoNum(pIfMan) );
     assert( Aig_ManNodeNum(p) == If_ManAndNum(pIfMan) );
     Aig_ManCleanData( p );
     If_ManCleanCutData( pIfMan );
@@ -320,9 +320,9 @@ Nwk_Man_t * Nwk_ManFromIf( If_Man_t * pIfMan, Aig_Man_t * p, Vec_Ptr_t * vAigToI
             // get the functionality
             pObjNew->pFunc = Nwk_NodeIfToHop( pNtk->pManHop, pIfMan, pIfObj );
         }
-        else if ( Aig_ObjIsPi(pObj) )
+        else if ( Aig_ObjIsCi(pObj) )
             pObjNew = Nwk_ManCreateCi( pNtk, pIfObj->nRefs );
-        else if ( Aig_ObjIsPo(pObj) )
+        else if ( Aig_ObjIsCo(pObj) )
         {
             pObjNew = Nwk_ManCreateCo( pNtk );
             pObjNew->fInvert = Aig_ObjFaninC0(pObj);
@@ -363,8 +363,8 @@ Nwk_Man_t * Nwk_MappingIf( Aig_Man_t * p, Tim_Man_t * pManTime, If_Par_t * pPars
     If_Man_t * pIfMan;
     Vec_Ptr_t * vAigToIf;
     // set the arrival times
-    pPars->pTimesArr = ABC_ALLOC( float, Aig_ManPiNum(p) );
-    memset( pPars->pTimesArr, 0, sizeof(float) * Aig_ManPiNum(p) );
+    pPars->pTimesArr = ABC_ALLOC( float, Aig_ManCiNum(p) );
+    memset( pPars->pTimesArr, 0, sizeof(float) * Aig_ManCiNum(p) );
     // translate into the mapper
     vAigToIf = Vec_PtrStart( Aig_ManObjNumMax(p) );
     pIfMan = Nwk_ManToIf( p, pPars, vAigToIf );    
diff --git a/src/opt/nwk/nwkSpeedup.c b/src/opt/nwk/nwkSpeedup.c
index 335d50f8..c8bd675a 100644
--- a/src/opt/nwk/nwkSpeedup.c
+++ b/src/opt/nwk/nwkSpeedup.c
@@ -46,7 +46,7 @@ int Aig_ManSpeedupNode_rec( Aig_Man_t * pAig, Aig_Obj_t * pNode, Vec_Ptr_t * vNo
 {
     if ( Aig_ObjIsTravIdCurrent(pAig, pNode) )
         return 1;
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
         return 0;
     assert( Aig_ObjIsNode(pNode) );
     Aig_ObjSetTravIdCurrent( pAig, pNode );
diff --git a/src/proof/bbr/bbrNtbdd.c b/src/proof/bbr/bbrNtbdd.c
index 49c2873b..f61c3d73 100644
--- a/src/proof/bbr/bbrNtbdd.c
+++ b/src/proof/bbr/bbrNtbdd.c
@@ -135,7 +135,7 @@ int Aig_ManSizeOfGlobalBdds( Aig_Man_t * p )
     Aig_Obj_t * pObj;
     int RetValue, i;
     // complement the global functions
-    vFuncsGlob = Vec_PtrAlloc( Aig_ManPoNum(p) );
+    vFuncsGlob = Vec_PtrAlloc( Aig_ManCoNum(p) );
     Aig_ManForEachCo( p, pObj, i )
         Vec_PtrPush( vFuncsGlob, Aig_ObjGlobalBdd(pObj) );
     RetValue = Cudd_SharingSize( (DdNode **)Vec_PtrArray(vFuncsGlob), Vec_PtrSize(vFuncsGlob) );
@@ -162,7 +162,7 @@ DdManager * Aig_ManComputeGlobalBdds( Aig_Man_t * p, int nBddSizeMax, int fDropI
     DdNode * bFunc;
     int i, Counter;
     // start the manager
-    dd = Cudd_Init( Aig_ManPiNum(p), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
+    dd = Cudd_Init( Aig_ManCiNum(p), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
     // set reordering
     if ( fReorder )
         Cudd_AutodynEnable( dd, CUDD_REORDER_SYMM_SIFT );
diff --git a/src/proof/bbr/bbrReach.c b/src/proof/bbr/bbrReach.c
index 1b5c3984..eda4d7cf 100644
--- a/src/proof/bbr/bbrReach.c
+++ b/src/proof/bbr/bbrReach.c
@@ -548,7 +548,7 @@ int Aig_ManVerifyUsingBdds( Aig_Man_t * pInit, Saig_ParBbr_t * pPars )
         return Aig_ManVerifyUsingBdds_int( pInit, pPars );
     // create new AIG
     p = Aig_ManDupTrim( pInit );
-    assert( Aig_ManPiNum(p) < Aig_ManPiNum(pInit) );
+    assert( Aig_ManCiNum(p) < Aig_ManCiNum(pInit) );
     assert( Aig_ManRegNum(p) == Aig_ManRegNum(pInit) );
     RetValue = Aig_ManVerifyUsingBdds_int( p, pPars );
     if ( RetValue != 0 )
diff --git a/src/proof/cec/cecCec.c b/src/proof/cec/cecCec.c
index 22474042..aa36a28e 100644
--- a/src/proof/cec/cecCec.c
+++ b/src/proof/cec/cecCec.c
@@ -97,7 +97,7 @@ Abc_PrintTime( 1, "Time", clock() - clkTotal );
                 Abc_Print( 1, "Counter-example verification has failed.\n" );
             else 
             {
-//                Aig_Obj_t * pObj = Aig_ManPo(pMiterCec, iOut);
+//                Aig_Obj_t * pObj = Aig_ManCo(pMiterCec, iOut);
 //                Aig_Obj_t * pFan = Aig_ObjFanin0(pObj);
                 Abc_Print( 1, "Primary output %d has failed", iOut );
                 if ( nOuts-1 >= 0 )
diff --git a/src/proof/dch/dchAig.c b/src/proof/dch/dchAig.c
index 59828443..1b6f1539 100644
--- a/src/proof/dch/dchAig.c
+++ b/src/proof/dch/dchAig.c
@@ -73,8 +73,8 @@ Aig_Man_t * Dch_DeriveTotalAig( Vec_Ptr_t * vAigs )
     pAig = (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 );
     Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig2, i )
     {
-        assert( Aig_ManPiNum(pAig) == Aig_ManPiNum(pAig2) );
-        assert( Aig_ManPoNum(pAig) == Aig_ManPoNum(pAig2) );
+        assert( Aig_ManCiNum(pAig) == Aig_ManCiNum(pAig2) );
+        assert( Aig_ManCoNum(pAig) == Aig_ManCoNum(pAig2) );
         nNodes += Aig_ManNodeNum(pAig2);
         Aig_ManCleanData( pAig2 );
     }
@@ -87,14 +87,14 @@ Aig_Man_t * Dch_DeriveTotalAig( Vec_Ptr_t * vAigs )
     {
         pObjPi = Aig_ObjCreateCi( pAigTotal );
         Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig2, k )
-            Aig_ManPi( pAig2, i )->pData = pObjPi;
+            Aig_ManCi( pAig2, i )->pData = pObjPi;
     }
     // construct the AIG in the order of POs
     Aig_ManForEachCo( pAig, pObj, i )
     {
         Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig2, k )
         {
-            pObjPo = Aig_ManPo( pAig2, i );
+            pObjPo = Aig_ManCo( pAig2, i );
             Dch_DeriveTotalAig_rec( pAigTotal, Aig_ObjFanin0(pObjPo) );
         }
         Aig_ObjCreateCo( pAigTotal, Aig_ObjChild0Copy(pObj) );
diff --git a/src/proof/dch/dchChoice.c b/src/proof/dch/dchChoice.c
index 1de11509..7a763d84 100644
--- a/src/proof/dch/dchChoice.c
+++ b/src/proof/dch/dchChoice.c
@@ -117,7 +117,7 @@ int Dch_ObjCheckTfi_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
     // check the trivial cases
     if ( pObj == NULL )
         return 0;
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return 0;
     if ( pObj->fMarkA )
         return 1;
@@ -289,7 +289,7 @@ int Aig_ManCheckAcyclic_rec( Aig_Man_t * p, Aig_Obj_t * pNode, int fVerbose )
 {
     Aig_Obj_t * pFanin;
     int fAcyclic;
-    if ( Aig_ObjIsPi(pNode) || Aig_ObjIsConst1(pNode) )
+    if ( Aig_ObjIsCi(pNode) || Aig_ObjIsConst1(pNode) )
         return 1;
     assert( Aig_ObjIsNode(pNode) );
     // make sure the node is not visited
diff --git a/src/proof/dch/dchClass.c b/src/proof/dch/dchClass.c
index 24476309..1f974236 100644
--- a/src/proof/dch/dchClass.c
+++ b/src/proof/dch/dchClass.c
@@ -350,12 +350,12 @@ void Dch_ClassesPrepare( Dch_Cla_t * p, int fLatchCorr, int nMaxLevs )
     {
         if ( fLatchCorr )
         {
-            if ( !Aig_ObjIsPi(pObj) )
+            if ( !Aig_ObjIsCi(pObj) )
                 continue;
         }
         else
         {
-            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
                 continue;
             // skip the node with more that the given number of levels
             if ( nMaxLevs && (int)pObj->Level >= nMaxLevs )
@@ -400,7 +400,7 @@ void Dch_ClassesPrepare( Dch_Cla_t * p, int fLatchCorr, int nMaxLevs )
     nEntries2 = 0;
     Aig_ManForEachObj( p->pAig, pObj, i )
     {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
             continue;
         nNodes = p->pClassSizes[pObj->Id];
         // skip the nodes that are not representatives of non-trivial classes
diff --git a/src/proof/dch/dchCnf.c b/src/proof/dch/dchCnf.c
index 4175a123..b65b096c 100644
--- a/src/proof/dch/dchCnf.c
+++ b/src/proof/dch/dchCnf.c
@@ -217,7 +217,7 @@ void Dch_AddClausesSuper( Dch_Man_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
 void Dch_CollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int fUseMuxes )
 {
     // if the new node is complemented or a PI, another gate begins
-    if ( Aig_IsComplement(pObj) || Aig_ObjIsPi(pObj) || 
+    if ( Aig_IsComplement(pObj) || Aig_ObjIsCi(pObj) || 
          (!fFirst && Aig_ObjRefs(pObj) > 1) || 
          (fUseMuxes && Aig_ObjIsMuxType(pObj)) )
     {
@@ -243,7 +243,7 @@ void Dch_CollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int
 void Dch_CollectSuper( Aig_Obj_t * pObj, int fUseMuxes, Vec_Ptr_t * vSuper )
 {
     assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPi(pObj) );
+    assert( !Aig_ObjIsCi(pObj) );
     Vec_PtrClear( vSuper );
     Dch_CollectSuper_rec( pObj, vSuper, 1, fUseMuxes );
 }
diff --git a/src/proof/dch/dchSimSat.c b/src/proof/dch/dchSimSat.c
index 808e754a..6f69b47e 100644
--- a/src/proof/dch/dchSimSat.c
+++ b/src/proof/dch/dchSimSat.c
@@ -113,7 +113,7 @@ void Dch_ManResimulateSolved_rec( Dch_Man_t * p, Aig_Obj_t * pObj )
     if ( Aig_ObjIsTravIdCurrent(p->pAigTotal, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(p->pAigTotal, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Aig_Obj_t * pObjFraig;
         int nVarNum;
@@ -151,7 +151,7 @@ void Dch_ManResimulateOther_rec( Dch_Man_t * p, Aig_Obj_t * pObj )
     if ( Aig_ObjIsTravIdCurrent(p->pAigTotal, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(p->pAigTotal, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         // set random value
         pObj->fMarkB = Aig_ManRandom(0) & 1;
diff --git a/src/proof/fra/fraBmc.c b/src/proof/fra/fraBmc.c
index b0dd3c86..2ddecf48 100644
--- a/src/proof/fra/fraBmc.c
+++ b/src/proof/fra/fraBmc.c
@@ -395,10 +395,10 @@ void Fra_BmcPerformSimple( Aig_Man_t * pAig, int nFrames, int nBTLimit, int fRew
     if ( fVerbose )
     {
         printf( "AIG:  PI/PO/Reg = %d/%d/%d.  Node = %6d. Lev = %5d.\n", 
-            Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig), Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig), Aig_ManRegNum(pAig),
+            Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig), Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig), Aig_ManRegNum(pAig),
             Aig_ManNodeNum(pAig), Aig_ManLevelNum(pAig) );
         printf( "Time-frames (%d):  PI/PO = %d/%d.  Node = %6d. Lev = %5d.  ", 
-            nFrames, Aig_ManPiNum(pBmc->pAigFrames), Aig_ManPoNum(pBmc->pAigFrames), 
+            nFrames, Aig_ManCiNum(pBmc->pAigFrames), Aig_ManCoNum(pBmc->pAigFrames), 
             Aig_ManNodeNum(pBmc->pAigFrames), Aig_ManLevelNum(pBmc->pAigFrames) );
         ABC_PRT( "Time", clock() - clk );
     }
@@ -417,7 +417,7 @@ void Fra_BmcPerformSimple( Aig_Man_t * pAig, int nFrames, int nBTLimit, int fRew
     clk = clock();
     iOutput = Fra_FraigMiterAssertedOutput( pBmc->pAigFrames );
     if ( iOutput >= 0 )
-        pAig->pSeqModel = Abc_CexMakeTriv( Aig_ManRegNum(pAig), Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig), Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig), iOutput );
+        pAig->pSeqModel = Abc_CexMakeTriv( Aig_ManRegNum(pAig), Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig), Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig), iOutput );
     else
     {
         pBmc->pAigFraig = Fra_FraigEquivence( pBmc->pAigFrames, nBTLimit, 1 );
@@ -428,7 +428,7 @@ void Fra_BmcPerformSimple( Aig_Man_t * pAig, int nFrames, int nBTLimit, int fRew
             ABC_FREE( pBmc->pAigFraig->pData );
         }
         else if ( iOutput >= 0 )
-            pAig->pSeqModel = Abc_CexMakeTriv( Aig_ManRegNum(pAig), Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig), Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig), iOutput );
+            pAig->pSeqModel = Abc_CexMakeTriv( Aig_ManRegNum(pAig), Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig), Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig), iOutput );
     }
     if ( fVerbose )
     {
diff --git a/src/proof/fra/fraCec.c b/src/proof/fra/fraCec.c
index ac11b0bb..0acca245 100644
--- a/src/proof/fra/fraCec.c
+++ b/src/proof/fra/fraCec.c
@@ -60,8 +60,8 @@ int Fra_FraigSat( Aig_Man_t * pMan, ABC_INT64_T nConfLimit, ABC_INT64_T nInsLimi
         pMan->pData = NULL;
 
         // derive CNF
-        pCnf = Cnf_Derive( pMan, Aig_ManPoNum(pMan) );
-    //    pCnf = Cnf_DeriveSimple( pMan, Aig_ManPoNum(pMan) );
+        pCnf = Cnf_Derive( pMan, Aig_ManCoNum(pMan) );
+    //    pCnf = Cnf_DeriveSimple( pMan, Aig_ManCoNum(pMan) );
 
         if ( fFlipBits ) 
             Cnf_DataTranformPolarity( pCnf, 0 );
@@ -166,8 +166,8 @@ int Fra_FraigSat( Aig_Man_t * pMan, ABC_INT64_T nConfLimit, ABC_INT64_T nInsLimi
         pMan->pData = NULL;
 
         // derive CNF
-        pCnf = Cnf_Derive( pMan, Aig_ManPoNum(pMan) );
-    //    pCnf = Cnf_DeriveSimple( pMan, Aig_ManPoNum(pMan) );
+        pCnf = Cnf_Derive( pMan, Aig_ManCoNum(pMan) );
+    //    pCnf = Cnf_DeriveSimple( pMan, Aig_ManCoNum(pMan) );
 
         if ( fFlipBits ) 
             Cnf_DataTranformPolarity( pCnf, 0 );
@@ -293,8 +293,8 @@ int Fra_FraigCec( Aig_Man_t ** ppAig, int nConfLimit, int fVerbose )
 //    assert( RetValue == -1 );
     if ( RetValue == 0 )
     {
-        pAig->pData = ABC_ALLOC( int, Aig_ManPiNum(pAig) );
-        memset( pAig->pData, 0, sizeof(int) * Aig_ManPiNum(pAig) );
+        pAig->pData = ABC_ALLOC( int, Aig_ManCiNum(pAig) );
+        memset( pAig->pData, 0, sizeof(int) * Aig_ManCiNum(pAig) );
         return RetValue;
     }
 
@@ -406,7 +406,7 @@ int Fra_FraigCecPartitioned( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimi
         if ( fVerbose )
         {
             printf( "Verifying part %4d  (out of %4d)  PI = %5d. PO = %5d. And = %6d. Lev = %4d.\r", 
-                i+1, Vec_PtrSize(vParts), Aig_ManPiNum(pAig), Aig_ManPoNum(pAig), 
+                i+1, Vec_PtrSize(vParts), Aig_ManCiNum(pAig), Aig_ManCoNum(pAig), 
                 Aig_ManNodeNum(pAig), Aig_ManLevelNum(pAig) );
             fflush( stdout );
         }
@@ -459,18 +459,18 @@ int Fra_FraigCecTop( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimit, int n
     //Abc_NtkDarCec( pNtk1, pNtk2, fPartition, fVerbose );
     int RetValue, clkTotal = clock();
 
-    if ( Aig_ManPiNum(pMan1) != Aig_ManPiNum(pMan1) )
+    if ( Aig_ManCiNum(pMan1) != Aig_ManCiNum(pMan1) )
     {
         printf( "Abc_CommandAbc8Cec(): Miters have different number of PIs.\n" );
         return 0;
     }
-    if ( Aig_ManPoNum(pMan1) != Aig_ManPoNum(pMan1) )
+    if ( Aig_ManCoNum(pMan1) != Aig_ManCoNum(pMan1) )
     {
         printf( "Abc_CommandAbc8Cec(): Miters have different number of POs.\n" );
         return 0;
     }
-    assert( Aig_ManPiNum(pMan1) == Aig_ManPiNum(pMan1) );
-    assert( Aig_ManPoNum(pMan1) == Aig_ManPoNum(pMan1) );
+    assert( Aig_ManCiNum(pMan1) == Aig_ManCiNum(pMan1) );
+    assert( Aig_ManCoNum(pMan1) == Aig_ManCoNum(pMan1) );
 
     // make sure that the first miter has more nodes
     if ( Aig_ManNodeNum(pMan1) < Aig_ManNodeNum(pMan2) )
@@ -484,7 +484,7 @@ int Fra_FraigCecTop( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimit, int n
     if ( nPartSize )
         RetValue = Fra_FraigCecPartitioned( pMan1, pMan2, nConfLimit, nPartSize, fSmart, fVerbose );
     else // no partitioning
-        RetValue = Fra_FraigCecPartitioned( pMan1, pMan2, nConfLimit, Aig_ManPoNum(pMan1), 0, fVerbose );
+        RetValue = Fra_FraigCecPartitioned( pMan1, pMan2, nConfLimit, Aig_ManCoNum(pMan1), 0, fVerbose );
 
     // report the miter
     if ( RetValue == 1 )
diff --git a/src/proof/fra/fraClass.c b/src/proof/fra/fraClass.c
index f7850241..cef2f673 100644
--- a/src/proof/fra/fraClass.c
+++ b/src/proof/fra/fraClass.c
@@ -291,12 +291,12 @@ void Fra_ClassesPrepare( Fra_Cla_t * p, int fLatchCorr, int nMaxLevs )
     {
         if ( fLatchCorr )
         {
-            if ( !Aig_ObjIsPi(pObj) )
+            if ( !Aig_ObjIsCi(pObj) )
                 continue;
         }
         else
         {
-            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
                 continue;
             // skip the node with more that the given number of levels
             if ( nMaxLevs && (int)pObj->Level > nMaxLevs )
@@ -349,7 +349,7 @@ void Fra_ClassesPrepare( Fra_Cla_t * p, int fLatchCorr, int nMaxLevs )
     nEntries = 0;
     Aig_ManForEachObj( p->pAig, pObj, i )
     {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
             continue;
         // skip the nodes that are not representatives of non-trivial classes
         if ( pObj->fMarkA == 0 )
@@ -800,7 +800,7 @@ Aig_Man_t * Fra_ClassesDeriveAig( Fra_Cla_t * p, int nFramesK )
     Aig_Obj_t ** pLatches, ** ppEquivs;
     int i, k, f, nFramesAll = nFramesK + 1;
     assert( Aig_ManRegNum(p->pAig) > 0 );
-    assert( Aig_ManRegNum(p->pAig) < Aig_ManPiNum(p->pAig) );
+    assert( Aig_ManRegNum(p->pAig) < Aig_ManCiNum(p->pAig) );
     assert( nFramesK > 0 );
     // start the fraig package
     pManFraig = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * nFramesAll );
@@ -832,7 +832,7 @@ Aig_Man_t * Fra_ClassesDeriveAig( Fra_Cla_t * p, int nFramesK )
         if ( f == nFramesAll - 1 )
             break;
         if ( f == nFramesAll - 2 )
-            pManFraig->nAsserts = Aig_ManPoNum(pManFraig);
+            pManFraig->nAsserts = Aig_ManCoNum(pManFraig);
         // save the latch input values
         k = 0;
         Aig_ManForEachLiSeq( p->pAig, pObj, i )
@@ -845,9 +845,9 @@ Aig_Man_t * Fra_ClassesDeriveAig( Fra_Cla_t * p, int nFramesK )
     ABC_FREE( pLatches );
     ABC_FREE( ppEquivs );
     // mark the asserts
-    assert( Aig_ManPoNum(pManFraig) % nFramesAll == 0 );
+    assert( Aig_ManCoNum(pManFraig) % nFramesAll == 0 );
 printf( "Assert miters = %6d. Output miters = %6d.\n", 
-       pManFraig->nAsserts, Aig_ManPoNum(pManFraig) - pManFraig->nAsserts );
+       pManFraig->nAsserts, Aig_ManCoNum(pManFraig) - pManFraig->nAsserts );
     // remove dangling nodes
     Aig_ManCleanup( pManFraig );
     return pManFraig;
diff --git a/src/proof/fra/fraClau.c b/src/proof/fra/fraClau.c
index 28e9e9b9..6c692afa 100644
--- a/src/proof/fra/fraClau.c
+++ b/src/proof/fra/fraClau.c
@@ -108,7 +108,7 @@ Vec_Int_t * Fra_ClauSaveOutputVars( Aig_Man_t * pMan, Cnf_Dat_t * pCnf )
     Vec_Int_t * vVars;
     Aig_Obj_t * pObj;
     int i;
-    vVars = Vec_IntAlloc( Aig_ManPoNum(pMan) );
+    vVars = Vec_IntAlloc( Aig_ManCoNum(pMan) );
     Aig_ManForEachCo( pMan, pObj, i )
         Vec_IntPush( vVars, pCnf->pVarNums[pObj->Id] );
     return vVars;
@@ -130,7 +130,7 @@ Vec_Int_t * Fra_ClauSaveInputVars( Aig_Man_t * pMan, Cnf_Dat_t * pCnf, int nStar
     Vec_Int_t * vVars;
     Aig_Obj_t * pObj;
     int i;
-    vVars = Vec_IntAlloc( Aig_ManPiNum(pMan) - nStarting );
+    vVars = Vec_IntAlloc( Aig_ManCiNum(pMan) - nStarting );
     Aig_ManForEachCi( pMan, pObj, i )
     {
         if ( i < nStarting )
@@ -217,7 +217,7 @@ Cla_Man_t * Fra_ClauStart( Aig_Man_t * pMan )
     Aig_Man_t * pFramesMain;
     Aig_Man_t * pFramesTest;
     Aig_Man_t * pFramesBmc;
-    assert( Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan) == 1 );
+    assert( Aig_ManCoNum(pMan) - Aig_ManRegNum(pMan) == 1 );
 
     // start the manager
     p = ABC_ALLOC( Cla_Man_t, 1 );
@@ -232,8 +232,8 @@ Cla_Man_t * Fra_ClauStart( Aig_Man_t * pMan )
     // derive two timeframes to be checked
     pFramesMain = Aig_ManFrames( pMan, 2, 0, 1, 0, 0, NULL ); // nFrames, fInit, fOuts, fRegs
 //Aig_ManShow( pFramesMain, 0, NULL );
-    assert( Aig_ManPoNum(pFramesMain) == 2 );
-    Aig_ObjChild0Flip( Aig_ManPo(pFramesMain, 0) ); // complement the first output
+    assert( Aig_ManCoNum(pFramesMain) == 2 );
+    Aig_ObjChild0Flip( Aig_ManCo(pFramesMain, 0) ); // complement the first output
     pCnfMain = Cnf_DeriveSimple( pFramesMain, 0 );
 //Cnf_DataWriteIntoFile( pCnfMain, "temp.cnf", 1 );
     p->pSatMain = (sat_solver *)Cnf_DataWriteIntoSolver( pCnfMain, 1, 0 );
@@ -249,7 +249,7 @@ Cla_Man_t * Fra_ClauStart( Aig_Man_t * pMan )
 
     // derive one timeframe to be checked
     pFramesTest = Aig_ManFrames( pMan, 1, 0, 0, 1, 0, NULL );
-    assert( Aig_ManPoNum(pFramesTest) == Aig_ManRegNum(pMan) );
+    assert( Aig_ManCoNum(pFramesTest) == Aig_ManRegNum(pMan) );
     pCnfTest = Cnf_DeriveSimple( pFramesTest, Aig_ManRegNum(pMan) );
     p->pSatTest = (sat_solver *)Cnf_DataWriteIntoSolver( pCnfTest, 1, 0 );
     p->nSatVarsTestBeg = p->nSatVarsTestCur = sat_solver_nvars( p->pSatTest );
@@ -257,12 +257,12 @@ Cla_Man_t * Fra_ClauStart( Aig_Man_t * pMan )
     // derive one timeframe to be checked for BMC
     pFramesBmc = Aig_ManFrames( pMan, 1, 1, 0, 1, 0, NULL );
 //Aig_ManShow( pFramesBmc, 0, NULL );
-    assert( Aig_ManPoNum(pFramesBmc) == Aig_ManRegNum(pMan) );
+    assert( Aig_ManCoNum(pFramesBmc) == Aig_ManRegNum(pMan) );
     pCnfBmc = Cnf_DeriveSimple( pFramesBmc, Aig_ManRegNum(pMan) );
     p->pSatBmc = (sat_solver *)Cnf_DataWriteIntoSolver( pCnfBmc, 1, 0 );
 
     // create variable sets
-    p->vSatVarsMainCs = Fra_ClauSaveInputVars( pFramesMain, pCnfMain, 2 * (Aig_ManPiNum(pMan)-Aig_ManRegNum(pMan)) );
+    p->vSatVarsMainCs = Fra_ClauSaveInputVars( pFramesMain, pCnfMain, 2 * (Aig_ManCiNum(pMan)-Aig_ManRegNum(pMan)) );
     p->vSatVarsTestCs = Fra_ClauSaveLatchVars( pFramesTest, pCnfTest, 1 );
     p->vSatVarsTestNs = Fra_ClauSaveLatchVars( pFramesTest, pCnfTest, 0 );
     p->vSatVarsBmcNs  = Fra_ClauSaveOutputVars( pFramesBmc, pCnfBmc );
@@ -638,7 +638,7 @@ int Fra_Clau( Aig_Man_t * pMan, int nIters, int fVerbose, int fVeryVerbose )
 {
     Cla_Man_t * p;
     int Iter, RetValue, fFailed, i;
-    assert( Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan) == 1 );
+    assert( Aig_ManCoNum(pMan) - Aig_ManRegNum(pMan) == 1 );
     // create the manager
     p = Fra_ClauStart( pMan );
     if ( p == NULL )
diff --git a/src/proof/fra/fraClaus.c b/src/proof/fra/fraClaus.c
index f27c63ce..571cc510 100644
--- a/src/proof/fra/fraClaus.c
+++ b/src/proof/fra/fraClaus.c
@@ -97,7 +97,7 @@ int Fra_ClausRunBmc( Clu_Man_t * p )
     int Lits[2], nLitsTot, RetValue, i;
     // set the output literals
     nLitsTot = 2 * p->pCnf->nVars;
-    pObj = Aig_ManPo(p->pAig, 0);
+    pObj = Aig_ManCo(p->pAig, 0);
     for ( i = 0; i < p->nPref + p->nFrames; i++ )
     {
         Lits[0] = i * nLitsTot + toLitCond( p->pCnf->pVarNums[pObj->Id], 0 ); 
@@ -126,7 +126,7 @@ int Fra_ClausRunSat( Clu_Man_t * p )
     int i, RetValue;
     pLits = ABC_ALLOC( int, p->nFrames + 1 );
     // set the output literals
-    pObj = Aig_ManPo(p->pAig, 0);
+    pObj = Aig_ManCo(p->pAig, 0);
     for ( i = 0; i <= p->nFrames; i++ )
         pLits[i] = i * 2 * p->pCnf->nVars + toLitCond( p->pCnf->pVarNums[pObj->Id], i != p->nFrames ); 
     // try to solve the problem
@@ -154,7 +154,7 @@ int Fra_ClausRunSat0( Clu_Man_t * p )
 {
     Aig_Obj_t * pObj;
     int Lits[2], RetValue;
-    pObj = Aig_ManPo(p->pAig, 0);
+    pObj = Aig_ManCo(p->pAig, 0);
     Lits[0] = toLitCond( p->pCnf->pVarNums[pObj->Id], 0 ); 
     RetValue = sat_solver_solve( p->pSatMain, Lits, Lits + 1, (ABC_INT64_T)p->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
     if ( RetValue == l_False )
@@ -523,7 +523,7 @@ int Fra_ClausCollectLatchClauses( Clu_Man_t * p, Fra_Sml_t * pSeq )
     {
         Aig_Obj_t * pObj;
         int Lits[1];
-        pObj = Aig_ManPo( p->pAig, 0 );
+        pObj = Aig_ManCo( p->pAig, 0 );
         Lits[0] = toLitCond( p->pCnf->pVarNums[pObj->Id], 1 ); 
         Vec_IntPush( p->vLits, Lits[0] );
         Vec_IntPush( p->vClauses, Vec_IntSize(p->vLits) );
@@ -1242,7 +1242,7 @@ int Fra_ClausInductiveClauses( Clu_Man_t * p )
         Aig_Obj_t * pObj;
         int Lits[2];
         // set the output literals
-        pObj = Aig_ManPo(p->pAig, 0);
+        pObj = Aig_ManCo(p->pAig, 0);
         Lits[0] = i * nLitsTot + toLitCond( p->pCnf->pVarNums[pObj->Id], 1 ); 
         // add the clause
         RetValue = sat_solver_addclause( p->pSatMain, Lits, Lits + 1 );
@@ -1637,9 +1637,9 @@ void Fra_ClausEstimateCoverage( Clu_Man_t * p )
             pVar2Id[ p->pCnf->pVarNums[i] ] = i;
         }
     // get storage for one assignment and all assignments
-    assert( Aig_ManPoNum(p->pAig) > 2 );
-    pResultOne = Fra_ObjSim( pComb, Aig_ManPo(p->pAig, 0)->Id );
-    pResultTot = Fra_ObjSim( pComb, Aig_ManPo(p->pAig, 1)->Id );
+    assert( Aig_ManCoNum(p->pAig) > 2 );
+    pResultOne = Fra_ObjSim( pComb, Aig_ManCo(p->pAig, 0)->Id );
+    pResultTot = Fra_ObjSim( pComb, Aig_ManCo(p->pAig, 1)->Id );
     // start the OR of don't-cares
     for ( w = 0; w < nCombSimWords; w++ )
         pResultTot[w] = 0;
@@ -1693,13 +1693,13 @@ if ( p->fVerbose )
 //ABC_PRT( "Sim-seq", clock() - clk );
 }
 
-    assert( !p->fTarget || Aig_ManPoNum(pAig) - Aig_ManRegNum(pAig) == 1 );
+    assert( !p->fTarget || Aig_ManCoNum(pAig) - Aig_ManRegNum(pAig) == 1 );
 
 clk = clock();
     // derive CNF
 //    if ( p->fTarget )
 //        p->pAig->nRegs++;
-    p->pCnf = Cnf_DeriveSimple( p->pAig, Aig_ManPoNum(p->pAig) );
+    p->pCnf = Cnf_DeriveSimple( p->pAig, Aig_ManCoNum(p->pAig) );
 //    if ( p->fTarget )
 //        p->pAig->nRegs--;
 if ( fVerbose )
@@ -1846,8 +1846,8 @@ clk = clock();
         assert( p->nBatches == 1 );
         pTable = fopen( "stats.txt", "a+" );
         fprintf( pTable, "%s ",  pAig->pName );
-        fprintf( pTable, "%d ",  Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig) );
-        fprintf( pTable, "%d ",  Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig) );
+        fprintf( pTable, "%d ",  Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig) );
+        fprintf( pTable, "%d ",  Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig) );
         fprintf( pTable, "%d ",  Aig_ManRegNum(pAig) );
         fprintf( pTable, "%d ",  Aig_ManNodeNum(pAig) );
         fprintf( pTable, "%d ",  p->nCuts );
diff --git a/src/proof/fra/fraCnf.c b/src/proof/fra/fraCnf.c
index 5021e750..7024c0f4 100644
--- a/src/proof/fra/fraCnf.c
+++ b/src/proof/fra/fraCnf.c
@@ -167,7 +167,7 @@ void Fra_AddClausesSuper( Fra_Man_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
 void Fra_CollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int fUseMuxes )
 {
     // if the new node is complemented or a PI, another gate begins
-    if ( Aig_IsComplement(pObj) || Aig_ObjIsPi(pObj) || (!fFirst && Aig_ObjRefs(pObj) > 1) || 
+    if ( Aig_IsComplement(pObj) || Aig_ObjIsCi(pObj) || (!fFirst && Aig_ObjRefs(pObj) > 1) || 
          (fUseMuxes && Aig_ObjIsMuxType(pObj)) )
     {
         Vec_PtrPushUnique( vSuper, pObj );
@@ -193,7 +193,7 @@ Vec_Ptr_t * Fra_CollectSuper( Aig_Obj_t * pObj, int fUseMuxes )
 {
     Vec_Ptr_t * vSuper;
     assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPi(pObj) );
+    assert( !Aig_ObjIsCi(pObj) );
     vSuper = Vec_PtrAlloc( 4 );
     Fra_CollectSuper_rec( pObj, vSuper, 1, fUseMuxes );
     return vSuper;
diff --git a/src/proof/fra/fraCore.c b/src/proof/fra/fraCore.c
index 1969b36d..2148b467 100644
--- a/src/proof/fra/fraCore.c
+++ b/src/proof/fra/fraCore.c
@@ -81,7 +81,7 @@ int Fra_FraigMiterStatus( Aig_Man_t * p )
             continue;
         }
         // check if the output is a primary input
-        if ( Aig_ObjIsPi(Aig_Regular(pChild)) && Aig_ObjPioNum(Aig_Regular(pChild)) < p->nTruePis )
+        if ( Aig_ObjIsCi(Aig_Regular(pChild)) && Aig_ObjPioNum(Aig_Regular(pChild)) < p->nTruePis )
         {
             CountNonConst0++;
             continue;
@@ -97,7 +97,7 @@ int Fra_FraigMiterStatus( Aig_Man_t * p )
 /*
     if ( p->pParams->fVerbose )
     {
-        printf( "Miter has %d outputs. ", Aig_ManPoNum(p->pManAig) );
+        printf( "Miter has %d outputs. ", Aig_ManCoNum(p->pManAig) );
         printf( "Const0 = %d.  ", CountConst0 );
         printf( "NonConst0 = %d.  ", CountNonConst0 );
         printf( "Undecided = %d.  ", CountUndecided );
@@ -187,7 +187,7 @@ void Fra_FraigVerifyCounterEx( Fra_Man_t * p, Vec_Int_t * vCex )
 {
     Aig_Obj_t * pObj, ** ppClass;
     int i, c;
-    assert( Aig_ManPiNum(p->pManAig) == Vec_IntSize(vCex) );
+    assert( Aig_ManCiNum(p->pManAig) == Vec_IntSize(vCex) );
     // make sure the input pattern is not used
     Aig_ManForEachObj( p->pManAig, pObj, i )
         assert( !pObj->fMarkB );
diff --git a/src/proof/fra/fraHot.c b/src/proof/fra/fraHot.c
index 03dd468a..338b5717 100644
--- a/src/proof/fra/fraHot.c
+++ b/src/proof/fra/fraHot.c
@@ -137,7 +137,7 @@ Vec_Int_t * Fra_OneHotCompute( Fra_Man_t * p, Fra_Sml_t * pSim )
     Vec_Int_t * vOneHots;
     Aig_Obj_t * pObj1, * pObj2;
     int i, k;
-    int nTruePis = Aig_ManPiNum(pSim->pAig) - Aig_ManRegNum(pSim->pAig);
+    int nTruePis = Aig_ManCiNum(pSim->pAig) - Aig_ManRegNum(pSim->pAig);
     assert( pSim->pAig == p->pManAig );
     vOneHots = Vec_IntAlloc( 100 );
     Aig_ManForEachLoSeq( pSim->pAig, pObj1, i )
@@ -146,8 +146,8 @@ Vec_Int_t * Fra_OneHotCompute( Fra_Man_t * p, Fra_Sml_t * pSim )
             continue;
         assert( i-nTruePis >= 0 );
 //        Aig_ManForEachLoSeq( pSim->pAig, pObj2, k )
-//        Vec_PtrForEachEntryStart( Aig_Obj_t *, pSim->pAig->vPis, pObj2, k, Aig_ManPiNum(p)-Aig_ManRegNum(p) )
-        Vec_PtrForEachEntryStart( Aig_Obj_t *, pSim->pAig->vPis, pObj2, k, i+1 )
+//        Vec_PtrForEachEntryStart( Aig_Obj_t *, pSim->pAig->vPis, pObj2, k, Aig_ManCiNum(p)-Aig_ManRegNum(p) )
+        Vec_PtrForEachEntryStart( Aig_Obj_t *, pSim->pAig->vCis, pObj2, k, i+1 )
         {
             if ( fSkipConstEqu && Fra_OneHotNodeIsConst(pSim, pObj2) )
                 continue;
@@ -192,7 +192,7 @@ void Fra_OneHotAssume( Fra_Man_t * p, Vec_Int_t * vOneHots )
 {
     Aig_Obj_t * pObj1, * pObj2;
     int i, Out1, Out2, pLits[2];
-    int nPiNum = Aig_ManPiNum(p->pManFraig) - Aig_ManRegNum(p->pManFraig);
+    int nPiNum = Aig_ManCiNum(p->pManFraig) - Aig_ManRegNum(p->pManFraig);
     assert( p->pPars->nFramesK == 1 ); // add to only one frame
     for ( i = 0; i < Vec_IntSize(vOneHots); i += 2 )
     {
@@ -200,8 +200,8 @@ void Fra_OneHotAssume( Fra_Man_t * p, Vec_Int_t * vOneHots )
         Out2 = Vec_IntEntry( vOneHots, i+1 );
         if ( Out1 == 0 && Out2 == 0 )
             continue;
-        pObj1 = Aig_ManPi( p->pManFraig, nPiNum + Fra_LitReg(Out1) );
-        pObj2 = Aig_ManPi( p->pManFraig, nPiNum + Fra_LitReg(Out2) );
+        pObj1 = Aig_ManCi( p->pManFraig, nPiNum + Fra_LitReg(Out1) );
+        pObj2 = Aig_ManCi( p->pManFraig, nPiNum + Fra_LitReg(Out2) );
         pLits[0] = toLitCond( Fra_ObjSatNum(pObj1), Fra_LitSign(Out1) );
         pLits[1] = toLitCond( Fra_ObjSatNum(pObj2), Fra_LitSign(Out2) );
         // add constraint to solver
@@ -230,15 +230,15 @@ void Fra_OneHotCheck( Fra_Man_t * p, Vec_Int_t * vOneHots )
 {
     Aig_Obj_t * pObj1, * pObj2;
     int RetValue, i, Out1, Out2;
-    int nTruePos = Aig_ManPoNum(p->pManFraig) - Aig_ManRegNum(p->pManFraig);
+    int nTruePos = Aig_ManCoNum(p->pManFraig) - Aig_ManRegNum(p->pManFraig);
     for ( i = 0; i < Vec_IntSize(vOneHots); i += 2 )
     {
         Out1 = Vec_IntEntry( vOneHots, i );
         Out2 = Vec_IntEntry( vOneHots, i+1 );
         if ( Out1 == 0 && Out2 == 0 )
             continue;
-        pObj1 = Aig_ManPo( p->pManFraig, nTruePos + Fra_LitReg(Out1) );
-        pObj2 = Aig_ManPo( p->pManFraig, nTruePos + Fra_LitReg(Out2) );
+        pObj1 = Aig_ManCo( p->pManFraig, nTruePos + Fra_LitReg(Out1) );
+        pObj2 = Aig_ManCo( p->pManFraig, nTruePos + Fra_LitReg(Out2) );
         RetValue = Fra_NodesAreClause( p, pObj1, pObj2, Fra_LitSign(Out1), Fra_LitSign(Out2) );
         if ( RetValue != 1 )
         {
@@ -267,7 +267,7 @@ int Fra_OneHotRefineUsingCex( Fra_Man_t * p, Vec_Int_t * vOneHots )
 {
     Aig_Obj_t * pObj1, * pObj2;
     int i, Out1, Out2, RetValue = 0;
-    int nPiNum = Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
+    int nPiNum = Aig_ManCiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
     assert( p->pSml->pAig == p->pManAig );
     for ( i = 0; i < Vec_IntSize(vOneHots); i += 2 )
     {
@@ -276,8 +276,8 @@ int Fra_OneHotRefineUsingCex( Fra_Man_t * p, Vec_Int_t * vOneHots )
         if ( Out1 == 0 && Out2 == 0 )
             continue;
         // get the corresponding nodes
-        pObj1 = Aig_ManPi( p->pManAig, nPiNum + Fra_LitReg(Out1) );
-        pObj2 = Aig_ManPi( p->pManAig, nPiNum + Fra_LitReg(Out2) );
+        pObj1 = Aig_ManCi( p->pManAig, nPiNum + Fra_LitReg(Out1) );
+        pObj2 = Aig_ManCi( p->pManAig, nPiNum + Fra_LitReg(Out2) );
         // check if implication holds using this simulation info
         if ( !Fra_OneHotNodesAreClause( p->pSml, pObj1, pObj2, Fra_LitSign(Out1), Fra_LitSign(Out2) ) )
         {
@@ -405,22 +405,22 @@ Aig_Man_t * Fra_OneHotCreateExdc( Fra_Man_t * p, Vec_Int_t * vOneHots )
 //        Aig_ObjCreateCi(pNew);
     Aig_ManForEachCi( p->pManAig, pObj, i )
         Aig_ObjCreateCi(pNew);
-    nTruePis = Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
+    nTruePis = Aig_ManCiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
     for ( i = 0; i < Vec_IntSize(vOneHots); i += 2 )
     {
         Out1 = Vec_IntEntry( vOneHots, i );
         Out2 = Vec_IntEntry( vOneHots, i+1 );
         if ( Out1 == 0 && Out2 == 0 )
             continue;
-        pObj1 = Aig_ManPi( pNew, nTruePis + Fra_LitReg(Out1) );
-        pObj2 = Aig_ManPi( pNew, nTruePis + Fra_LitReg(Out2) );
+        pObj1 = Aig_ManCi( pNew, nTruePis + Fra_LitReg(Out1) );
+        pObj2 = Aig_ManCi( pNew, nTruePis + Fra_LitReg(Out2) );
         pObj1 = Aig_NotCond( pObj1, Fra_LitSign(Out1) );
         pObj2 = Aig_NotCond( pObj2, Fra_LitSign(Out2) );
         pObj  = Aig_Or( pNew, pObj1, pObj2 );
         Aig_ObjCreateCo( pNew, pObj );
     }
     Aig_ManCleanup(pNew);
-//    printf( "Created AIG with %d nodes and %d outputs.\n", Aig_ManNodeNum(pNew), Aig_ManPoNum(pNew) );
+//    printf( "Created AIG with %d nodes and %d outputs.\n", Aig_ManNodeNum(pNew), Aig_ManCoNum(pNew) );
     return pNew;
 }
 
@@ -450,8 +450,8 @@ void Fra_OneHotAddKnownConstraint( Fra_Man_t * p, Vec_Ptr_t * vOnehots )
         Vec_IntForEachEntry( vGroup, Out1, i )
         Vec_IntForEachEntryStart( vGroup, Out2, j, i+1 )
         {
-            pObj1 = Aig_ManPi( p->pManFraig, Out1 );
-            pObj2 = Aig_ManPi( p->pManFraig, Out2 );
+            pObj1 = Aig_ManCi( p->pManFraig, Out1 );
+            pObj2 = Aig_ManCi( p->pManFraig, Out2 );
             pLits[0] = toLitCond( Fra_ObjSatNum(pObj1), 1 );
             pLits[1] = toLitCond( Fra_ObjSatNum(pObj2), 1 );
             // add constraint to solver
diff --git a/src/proof/fra/fraImp.c b/src/proof/fra/fraImp.c
index de24f179..f65aca5c 100644
--- a/src/proof/fra/fraImp.c
+++ b/src/proof/fra/fraImp.c
@@ -170,12 +170,12 @@ Vec_Ptr_t * Fra_SmlSortUsingOnes( Fra_Sml_t * p, int fLatchCorr )
         // skip non-PI and non-internal nodes
         if ( fLatchCorr )
         {
-            if ( !Aig_ObjIsPi(pObj) )
+            if ( !Aig_ObjIsCi(pObj) )
                 continue;
         }
         else
         {
-            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
                 continue;
         }
         // skip nodes participating in the classes
@@ -203,12 +203,12 @@ Vec_Ptr_t * Fra_SmlSortUsingOnes( Fra_Sml_t * p, int fLatchCorr )
         // skip non-PI and non-internal nodes
         if ( fLatchCorr )
         {
-            if ( !Aig_ObjIsPi(pObj) )
+            if ( !Aig_ObjIsCi(pObj) )
                 continue;
         }
         else
         {
-            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
                 continue;
         }
         // skip nodes participating in the classes
@@ -708,7 +708,7 @@ void Fra_ImpRecordInManager( Fra_Man_t * p, Aig_Man_t * pNew )
     if ( p->pCla->vImps == NULL || Vec_IntSize(p->pCla->vImps) == 0 )
         return;
     // go through the implication
-    nPosOld = Aig_ManPoNum(pNew);
+    nPosOld = Aig_ManCoNum(pNew);
     Vec_IntForEachEntry( p->pCla->vImps, Imp, i )
     {
         pLeft = Aig_ManObj( p->pManAig, Fra_ImpLeft(Imp) );
@@ -719,7 +719,7 @@ void Fra_ImpRecordInManager( Fra_Man_t * p, Aig_Man_t * pNew )
             Aig_NotCond((Aig_Obj_t *)pRight->pData, pRight->fPhase) ); 
         Aig_ObjCreateCo( pNew, pMiter );
     }
-    pNew->nAsserts = Aig_ManPoNum(pNew) - nPosOld;
+    pNew->nAsserts = Aig_ManCoNum(pNew) - nPosOld;
 }
 
 ////////////////////////////////////////////////////////////////////////
diff --git a/src/proof/fra/fraInd.c b/src/proof/fra/fraInd.c
index b8a1e6bf..29a76eea 100644
--- a/src/proof/fra/fraInd.c
+++ b/src/proof/fra/fraInd.c
@@ -61,16 +61,16 @@ void Fra_FraigInductionRewrite( Fra_Man_t * p )
     // transfer PI/register pointers
     assert( p->pManFraig->nRegs == pTemp->nRegs );
     assert( p->pManFraig->nAsserts == pTemp->nAsserts );
-    nTruePis = Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
+    nTruePis = Aig_ManCiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
     memset( p->pMemFraig, 0, sizeof(Aig_Obj_t *) * p->nSizeAlloc * p->nFramesAll );
     Fra_ObjSetFraig( Aig_ManConst1(p->pManAig), p->pPars->nFramesK, Aig_ManConst1(pTemp) );
     Aig_ManForEachPiSeq( p->pManAig, pObj, i )
-        Fra_ObjSetFraig( pObj, p->pPars->nFramesK, Aig_ManPi(pTemp,nTruePis*p->pPars->nFramesK+i) );
+        Fra_ObjSetFraig( pObj, p->pPars->nFramesK, Aig_ManCi(pTemp,nTruePis*p->pPars->nFramesK+i) );
     k = 0;
-    assert( Aig_ManRegNum(p->pManAig) == Aig_ManPoNum(pTemp) - pTemp->nAsserts );
+    assert( Aig_ManRegNum(p->pManAig) == Aig_ManCoNum(pTemp) - pTemp->nAsserts );
     Aig_ManForEachLoSeq( p->pManAig, pObj, i )
     {
-        pObjPo = Aig_ManPo(pTemp, pTemp->nAsserts + k++);
+        pObjPo = Aig_ManCo(pTemp, pTemp->nAsserts + k++);
         Fra_ObjSetFraig( pObj, p->pPars->nFramesK, Aig_ObjChild0(pObjPo) );
     }
     // exchange
@@ -133,7 +133,7 @@ Aig_Man_t * Fra_FramesWithClasses( Fra_Man_t * p )
     int i, k, f;
     assert( p->pManFraig == NULL );
     assert( Aig_ManRegNum(p->pManAig) > 0 );
-    assert( Aig_ManRegNum(p->pManAig) < Aig_ManPiNum(p->pManAig) );
+    assert( Aig_ManRegNum(p->pManAig) < Aig_ManCiNum(p->pManAig) );
 
     // start the fraig package
     pManFraig = Aig_ManStart( Aig_ManObjNumMax(p->pManAig) * p->nFramesAll );
@@ -170,7 +170,7 @@ Aig_Man_t * Fra_FramesWithClasses( Fra_Man_t * p )
     }
 //    pManFraig->fAddStrash = 0;
     // mark the asserts
-    pManFraig->nAsserts = Aig_ManPoNum(pManFraig);
+    pManFraig->nAsserts = Aig_ManCoNum(pManFraig);
     // add the POs for the latch outputs of the last frame
     Aig_ManForEachLoSeq( p->pManAig, pObj, i )
         Aig_ObjCreateCo( pManFraig, Fra_ObjFraig(pObj,p->nFramesAll-1) );
@@ -291,7 +291,7 @@ Aig_Man_t * Fra_FraigInductionPart( Aig_Man_t * pAig, Fra_Ssw_t * pPars )
             pTemp = Aig_ManRegCreatePart( pAig, vPart, &nCountPis, &nCountRegs, NULL );
             Ioa_WriteAiger( pTemp, Buffer, 0, 0 );
             printf( "part%03d.aig : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d.\n", 
-                i, Vec_IntSize(vPart), Aig_ManPiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp) );
+                i, Vec_IntSize(vPart), Aig_ManCiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp) );
             Aig_ManStop( pTemp );
         }
     }
@@ -309,7 +309,7 @@ Aig_Man_t * Fra_FraigInductionPart( Aig_Man_t * pAig, Fra_Ssw_t * pPars )
         nClasses = Aig_TransferMappedClasses( pAig, pTemp, pMapBack );
         if ( fVerbose )
             printf( "%3d : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d. It = %3d. Cl = %5d.\n", 
-                i, Vec_IntSize(vPart), Aig_ManPiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp), pPars->nIters, nClasses );
+                i, Vec_IntSize(vPart), Aig_ManCiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp), pPars->nIters, nClasses );
         Aig_ManStop( pNew );
         Aig_ManStop( pTemp );
         ABC_FREE( pMapBack );
@@ -637,8 +637,8 @@ p->timeTotal = clock() - clk;
 finish:
     Fra_ManStop( p );
     // check the output
-//    if ( Aig_ManPoNum(pManAigNew) - Aig_ManRegNum(pManAigNew) == 1 )
-//        if ( Aig_ObjChild0( Aig_ManPo(pManAigNew,0) ) == Aig_ManConst0(pManAigNew) )
+//    if ( Aig_ManCoNum(pManAigNew) - Aig_ManRegNum(pManAigNew) == 1 )
+//        if ( Aig_ObjChild0( Aig_ManCo(pManAigNew,0) ) == Aig_ManConst0(pManAigNew) )
 //            printf( "Proved output constant 0.\n" );
     pParams->nIters = nIter;
     return pManAigNew;
diff --git a/src/proof/fra/fraIndVer.c b/src/proof/fra/fraIndVer.c
index 64437607..7c5e9e70 100644
--- a/src/proof/fra/fraIndVer.c
+++ b/src/proof/fra/fraIndVer.c
@@ -59,14 +59,14 @@ int Fra_InvariantVerify( Aig_Man_t * pAig, int nFrames, Vec_Int_t * vClauses, Ve
     }
 
     // derive CNF
-    pCnf = Cnf_DeriveSimple( pAig, Aig_ManPoNum(pAig) );
+    pCnf = Cnf_DeriveSimple( pAig, Aig_ManCoNum(pAig) );
 /*
     // add the property
     {
         Aig_Obj_t * pObj;
         int Lits[1];
 
-        pObj = Aig_ManPo( pAig, 0 );
+        pObj = Aig_ManCo( pAig, 0 );
         Lits[0] = toLitCond( pCnf->pVarNums[pObj->Id], 1 ); 
 
         Vec_IntPush( vLits, Lits[0] );
diff --git a/src/proof/fra/fraLcr.c b/src/proof/fra/fraLcr.c
index d24b37f6..8ea6d297 100644
--- a/src/proof/fra/fraLcr.c
+++ b/src/proof/fra/fraLcr.c
@@ -83,10 +83,10 @@ Fra_Lcr_t * Lcr_ManAlloc( Aig_Man_t * pAig )
     p = ABC_ALLOC( Fra_Lcr_t, 1 );
     memset( p, 0, sizeof(Fra_Lcr_t) );
     p->pAig = pAig;
-    p->pInToOutPart = ABC_ALLOC( int, Aig_ManPiNum(pAig) );
-    memset( p->pInToOutPart, 0, sizeof(int) * Aig_ManPiNum(pAig) );
-    p->pInToOutNum = ABC_ALLOC( int, Aig_ManPiNum(pAig) );
-    memset( p->pInToOutNum, 0, sizeof(int) * Aig_ManPiNum(pAig) );
+    p->pInToOutPart = ABC_ALLOC( int, Aig_ManCiNum(pAig) );
+    memset( p->pInToOutPart, 0, sizeof(int) * Aig_ManCiNum(pAig) );
+    p->pInToOutNum = ABC_ALLOC( int, Aig_ManCiNum(pAig) );
+    memset( p->pInToOutNum, 0, sizeof(int) * Aig_ManCiNum(pAig) );
     p->vFraigs = Vec_PtrAlloc( 1000 );
     return p;
 }
@@ -205,8 +205,8 @@ int Fra_LcrNodesAreEqual( Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
     Aig_Man_t * pFraig;
     Aig_Obj_t * pOut0, * pOut1;
     int nPart0, nPart1;
-    assert( Aig_ObjIsPi(pObj0) );
-    assert( Aig_ObjIsPi(pObj1) );
+    assert( Aig_ObjIsCi(pObj0) );
+    assert( Aig_ObjIsCi(pObj1) );
     // find the partition to which these nodes belong
     nPart0 = pLcr->pInToOutPart[(long)pObj0->pNext];
     nPart1 = pLcr->pInToOutPart[(long)pObj1->pNext];
@@ -220,8 +220,8 @@ int Fra_LcrNodesAreEqual( Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
     assert( nPart0 == nPart1 );
     pFraig = (Aig_Man_t *)Vec_PtrEntry( pLcr->vFraigs, nPart0 );
     // get the fraig outputs
-    pOut0 = Aig_ManPo( pFraig, pLcr->pInToOutNum[(long)pObj0->pNext] );
-    pOut1 = Aig_ManPo( pFraig, pLcr->pInToOutNum[(long)pObj1->pNext] );
+    pOut0 = Aig_ManCo( pFraig, pLcr->pInToOutNum[(long)pObj0->pNext] );
+    pOut1 = Aig_ManCo( pFraig, pLcr->pInToOutNum[(long)pObj1->pNext] );
     return Aig_ObjFanin0(pOut0) == Aig_ObjFanin0(pOut1);
 }
 
@@ -243,12 +243,12 @@ int Fra_LcrNodeIsConst( Aig_Obj_t * pObj )
     Aig_Man_t * pFraig;
     Aig_Obj_t * pOut;
     int nPart;
-    assert( Aig_ObjIsPi(pObj) );
+    assert( Aig_ObjIsCi(pObj) );
     // find the partition to which these nodes belong
     nPart = pLcr->pInToOutPart[(long)pObj->pNext];
     pFraig = (Aig_Man_t *)Vec_PtrEntry( pLcr->vFraigs, nPart );
     // get the fraig outputs
-    pOut = Aig_ManPo( pFraig, pLcr->pInToOutNum[(long)pObj->pNext] );
+    pOut = Aig_ManCo( pFraig, pLcr->pInToOutNum[(long)pObj->pNext] );
     return Aig_ObjFanin0(pOut) == Aig_ManConst1(pFraig);
 }
 
@@ -306,7 +306,7 @@ Aig_Man_t * Fra_LcrDeriveAigForPartitioning( Fra_Lcr_t * pLcr )
         pObj->pNext = (Aig_Obj_t *)(long)i;
     }
     // compute the LO/LI offset
-    Offset = Aig_ManPoNum(pLcr->pAig) - Aig_ManPiNum(pLcr->pAig);
+    Offset = Aig_ManCoNum(pLcr->pAig) - Aig_ManCiNum(pLcr->pAig);
     // create the PIs
     Aig_ManCleanData( pLcr->pAig );
     pNew = Aig_ManStartFrom( pLcr->pAig );
@@ -316,8 +316,8 @@ Aig_Man_t * Fra_LcrDeriveAigForPartitioning( Fra_Lcr_t * pLcr )
         pMiter = Aig_ManConst0(pNew);
         for ( c = 0; ppClass[c]; c++ )
         {
-            assert( Aig_ObjIsPi(ppClass[c]) );
-            pObjPo  = Aig_ManPo( pLcr->pAig, Offset+(long)ppClass[c]->pNext );
+            assert( Aig_ObjIsCi(ppClass[c]) );
+            pObjPo  = Aig_ManCo( pLcr->pAig, Offset+(long)ppClass[c]->pNext );
             pObjNew = Fra_LcrManDup_rec( pNew, pLcr->pAig, Aig_ObjFanin0(pObjPo) );
             pMiter  = Aig_Exor( pNew, pMiter, pObjNew );
         }
@@ -326,8 +326,8 @@ Aig_Man_t * Fra_LcrDeriveAigForPartitioning( Fra_Lcr_t * pLcr )
     // go over the constant candidates
     Vec_PtrForEachEntry( Aig_Obj_t *, pLcr->pCla->vClasses1, pObj, i )
     {
-        assert( Aig_ObjIsPi(pObj) );
-        pObjPo = Aig_ManPo( pLcr->pAig, Offset+(long)pObj->pNext );
+        assert( Aig_ObjIsCi(pObj) );
+        pObjPo = Aig_ManCo( pLcr->pAig, Offset+(long)pObj->pNext );
         pMiter = Fra_LcrManDup_rec( pNew, pLcr->pAig, Aig_ObjFanin0(pObjPo) );
         Aig_ObjCreateCo( pNew, pMiter );
     }
@@ -351,7 +351,7 @@ void Fra_LcrRemapPartitions( Vec_Ptr_t * vParts, Fra_Cla_t * pCla, int * pInToOu
     Aig_Obj_t ** ppClass, * pObjPi;
     int Out, Offset, i, k, c;
     // compute the LO/LI offset
-    Offset = Aig_ManPoNum(pCla->pAig) - Aig_ManPiNum(pCla->pAig);
+    Offset = Aig_ManCoNum(pCla->pAig) - Aig_ManCiNum(pCla->pAig);
     Vec_PtrForEachEntry( Vec_Int_t *, vParts, vOne, i )
     {
         vOneNew = Vec_IntAlloc( Vec_IntSize(vOne) );
@@ -398,7 +398,7 @@ Aig_Obj_t * Fra_LcrCreatePart_rec( Fra_Cla_t * pCla, Aig_Man_t * pNew, Aig_Man_t
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return (Aig_Obj_t *)pObj->pData;
     Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
 //        Aig_Obj_t * pRepr = Fra_ClassObjRepr(pObj);
         Aig_Obj_t * pRepr = pCla->pMemRepr[pObj->Id];
@@ -439,7 +439,7 @@ Aig_Man_t * Fra_LcrCreatePart( Fra_Lcr_t * p, Vec_Int_t * vPart )
     Aig_ManConst1(p->pAig)->pData = Aig_ManConst1(pNew);
     Vec_IntForEachEntry( vPart, Out, i )
     {
-        pObj = Aig_ManPo( p->pAig, Out );
+        pObj = Aig_ManCo( p->pAig, Out );
         if ( pObj->fMarkA )
         {
             pObjNew = Fra_LcrCreatePart_rec( p->pCla, pNew, p->pAig, Aig_ObjFanin0(pObj) );
@@ -468,18 +468,18 @@ void Fra_ClassNodesMark( Fra_Lcr_t * p )
     Aig_Obj_t * pObj, ** ppClass;
     int i, c, Offset;
     // compute the LO/LI offset
-    Offset = Aig_ManPoNum(p->pCla->pAig) - Aig_ManPiNum(p->pCla->pAig);
+    Offset = Aig_ManCoNum(p->pCla->pAig) - Aig_ManCiNum(p->pCla->pAig);
     // mark the nodes remaining in the classes
     Vec_PtrForEachEntry( Aig_Obj_t *, p->pCla->vClasses1, pObj, i )
     {
-        pObj = Aig_ManPo( p->pCla->pAig, Offset+(long)pObj->pNext );
+        pObj = Aig_ManCo( p->pCla->pAig, Offset+(long)pObj->pNext );
         pObj->fMarkA = 1;
     }
     Vec_PtrForEachEntry( Aig_Obj_t **, p->pCla->vClasses, ppClass, i )
     {
         for ( c = 0; ppClass[c]; c++ )
         {
-            pObj = Aig_ManPo( p->pCla->pAig, Offset+(long)ppClass[c]->pNext );
+            pObj = Aig_ManCo( p->pCla->pAig, Offset+(long)ppClass[c]->pNext );
             pObj->fMarkA = 1;
         }
     }
@@ -501,18 +501,18 @@ void Fra_ClassNodesUnmark( Fra_Lcr_t * p )
     Aig_Obj_t * pObj, ** ppClass;
     int i, c, Offset;
     // compute the LO/LI offset
-    Offset = Aig_ManPoNum(p->pCla->pAig) - Aig_ManPiNum(p->pCla->pAig);
+    Offset = Aig_ManCoNum(p->pCla->pAig) - Aig_ManCiNum(p->pCla->pAig);
     // mark the nodes remaining in the classes
     Vec_PtrForEachEntry( Aig_Obj_t *, p->pCla->vClasses1, pObj, i )
     {
-        pObj = Aig_ManPo( p->pCla->pAig, Offset+(long)pObj->pNext );
+        pObj = Aig_ManCo( p->pCla->pAig, Offset+(long)pObj->pNext );
         pObj->fMarkA = 0;
     }
     Vec_PtrForEachEntry( Aig_Obj_t **, p->pCla->vClasses, ppClass, i )
     {
         for ( c = 0; ppClass[c]; c++ )
         {
-            pObj = Aig_ManPo( p->pCla->pAig, Offset+(long)ppClass[c]->pNext );
+            pObj = Aig_ManCo( p->pCla->pAig, Offset+(long)ppClass[c]->pNext );
             pObj->fMarkA = 0;
         }
     }
diff --git a/src/proof/fra/fraMan.c b/src/proof/fra/fraMan.c
index 67832f83..5ffbc778 100644
--- a/src/proof/fra/fraMan.c
+++ b/src/proof/fra/fraMan.c
@@ -114,7 +114,7 @@ Fra_Man_t * Fra_ManStart( Aig_Man_t * pManAig, Fra_Par_t * pPars )
     p->nSizeAlloc = Aig_ManObjNumMax( pManAig );
     p->nFramesAll = pPars->nFramesK + 1;
     // allocate storage for sim pattern
-    p->nPatWords  = Abc_BitWordNum( (Aig_ManPiNum(pManAig) - Aig_ManRegNum(pManAig)) * p->nFramesAll + Aig_ManRegNum(pManAig) );
+    p->nPatWords  = Abc_BitWordNum( (Aig_ManCiNum(pManAig) - Aig_ManRegNum(pManAig)) * p->nFramesAll + Aig_ManRegNum(pManAig) );
     p->pPatWords  = ABC_ALLOC( unsigned, p->nPatWords ); 
     p->vPiVars    = Vec_PtrAlloc( 100 );
     // equivalence classes
diff --git a/src/proof/fra/fraPart.c b/src/proof/fra/fraPart.c
index 6594ac0b..e3bb2850 100644
--- a/src/proof/fra/fraPart.c
+++ b/src/proof/fra/fraPart.c
@@ -74,7 +74,7 @@ ABC_PRT( "Supports", clock() - clk );
 
     // create reverse supports
 clk = clock();
-    vSuppsIn = Vec_VecStart( Aig_ManPiNum(p) );
+    vSuppsIn = Vec_VecStart( Aig_ManCiNum(p) );
     Aig_ManForEachCo( p, pObj, i )
     {
         vSup = Vec_VecEntryInt( vSupps, i );
@@ -86,10 +86,10 @@ ABC_PRT( "Inverse ", clock() - clk );
 clk = clock();
     // compute extended supports
     Largest = 0;
-    vSuppsNew = Vec_PtrAlloc( Aig_ManPoNum(p) );
-    vOverNew  = Vec_IntAlloc( Aig_ManPoNum(p) );
-    vQuantNew = Vec_IntAlloc( Aig_ManPoNum(p) );
-//    pProgress = Bar_ProgressStart( stdout, Aig_ManPoNum(p) );
+    vSuppsNew = Vec_PtrAlloc( Aig_ManCoNum(p) );
+    vOverNew  = Vec_IntAlloc( Aig_ManCoNum(p) );
+    vQuantNew = Vec_IntAlloc( Aig_ManCoNum(p) );
+//    pProgress = Bar_ProgressStart( stdout, Aig_ManCoNum(p) );
     Aig_ManForEachCo( p, pObj, i )
     {
 //        Bar_ProgressUpdate( pProgress, i, NULL );
@@ -160,9 +160,9 @@ ABC_PRT( "Scanning", clock() - clk );
 
     // print cumulative statistics
     printf( "PIs = %6d. POs = %6d. Lim = %3d.   AveS = %3d. SN = %3d. R = %4.2f Max = %5d.\n",
-        Aig_ManPiNum(p), Aig_ManPoNum(p), nComLim,
-        nTotalSupp/Aig_ManPoNum(p), nTotalSupp2/Aig_ManPoNum(p),
-        Ratio/Aig_ManPoNum(p), Largest );
+        Aig_ManCiNum(p), Aig_ManCoNum(p), nComLim,
+        nTotalSupp/Aig_ManCoNum(p), nTotalSupp2/Aig_ManCoNum(p),
+        Ratio/Aig_ManCoNum(p), Largest );
 
     Vec_VecFree( vSupps );
     Vec_VecFree( vSuppsIn );
@@ -208,7 +208,7 @@ ABC_PRT( "Supports", clock() - clk );
 
     // create reverse supports
 clk = clock();
-    vSuppsIn = Vec_VecStart( Aig_ManPiNum(p) );
+    vSuppsIn = Vec_VecStart( Aig_ManCiNum(p) );
     Aig_ManForEachCo( p, pObj, i )
     {
         if ( i == p->nAsserts )
@@ -221,13 +221,13 @@ ABC_PRT( "Inverse ", clock() - clk );
 
     // create affective supports
 clk = clock();
-    pSupp = ABC_ALLOC( char, Aig_ManPiNum(p) );
+    pSupp = ABC_ALLOC( char, Aig_ManCiNum(p) );
     Aig_ManForEachCo( p, pObj, i )
     {
         if ( i % 50 != 0 )
             continue;
         vSup = Vec_VecEntryInt( vSupps, i );
-        memset( pSupp, 0, sizeof(char) * Aig_ManPiNum(p) );
+        memset( pSupp, 0, sizeof(char) * Aig_ManCiNum(p) );
         // go through each input of this output
         Vec_IntForEachEntry( vSup, Entry, k )
         {
@@ -246,7 +246,7 @@ clk = clock();
         }
         // count the entries
         Counter = 0;
-        for ( m = 0; m < Aig_ManPiNum(p); m++ )
+        for ( m = 0; m < Aig_ManCiNum(p); m++ )
             Counter += pSupp[m];
         printf( "%d(%d) ", Vec_IntSize(vSup), Counter );
     }
diff --git a/src/proof/fra/fraSat.c b/src/proof/fra/fraSat.c
index 38702d5e..2702113c 100644
--- a/src/proof/fra/fraSat.c
+++ b/src/proof/fra/fraSat.c
@@ -507,7 +507,7 @@ int Fra_SetActivityFactors_rec( Fra_Man_t * p, Aig_Obj_t * pObj, int LevelMin, i
         return 0;
     Aig_ObjSetTravIdCurrent(p->pManFraig, pObj);
     // add the PI to the list
-    if ( pObj->Level <= (unsigned)LevelMin || Aig_ObjIsPi(pObj) )
+    if ( pObj->Level <= (unsigned)LevelMin || Aig_ObjIsCi(pObj) )
         return 0;
     // set the factor of this variable
     // (LevelMax-LevelMin) / (pObj->Level-LevelMin) = p->pPars->dActConeBumpMax / ThisBump
diff --git a/src/proof/fra/fraSec.c b/src/proof/fra/fraSec.c
index 8067b8c2..cde56809 100644
--- a/src/proof/fra/fraSec.c
+++ b/src/proof/fra/fraSec.c
@@ -142,8 +142,8 @@ clk = clock();
     if ( pParSec->fPhaseAbstract )
     {
         extern Aig_Man_t * Saig_ManPhaseAbstractAuto( Aig_Man_t * p, int fVerbose );
-        pNew->nTruePis = Aig_ManPiNum(pNew) - Aig_ManRegNum(pNew); 
-        pNew->nTruePos = Aig_ManPoNum(pNew) - Aig_ManRegNum(pNew); 
+        pNew->nTruePis = Aig_ManCiNum(pNew) - Aig_ManRegNum(pNew); 
+        pNew->nTruePos = Aig_ManCoNum(pNew) - Aig_ManRegNum(pNew); 
         pNew = Saig_ManPhaseAbstractAuto( pTemp = pNew, 0 );
         Aig_ManStop( pTemp );
         if ( pParSec->fVerbose )
@@ -301,8 +301,8 @@ ABC_PRT( "Time", clock() - clk );
     {
 //    extern Aig_Man_t * Saig_ManRetimeMinArea( Aig_Man_t * p, int nMaxIters, int fForwardOnly, int fBackwardOnly, int fInitial, int fVerbose );
 clk = clock();
-    pNew->nTruePis = Aig_ManPiNum(pNew) - Aig_ManRegNum(pNew); 
-    pNew->nTruePos = Aig_ManPoNum(pNew) - Aig_ManRegNum(pNew); 
+    pNew->nTruePis = Aig_ManCiNum(pNew) - Aig_ManRegNum(pNew); 
+    pNew->nTruePos = Aig_ManCoNum(pNew) - Aig_ManRegNum(pNew); 
 //        pNew = Rtm_ManRetime( pTemp = pNew, 1, 1000, 0 );
     pNew = Saig_ManRetimeMinArea( pTemp = pNew, 1000, 0, 0, 1, 0 );
     Aig_ManStop( pTemp );
@@ -391,8 +391,8 @@ ABC_PRT( "Time", clock() - clk );
         {
 //        extern Aig_Man_t * Saig_ManRetimeMinArea( Aig_Man_t * p, int nMaxIters, int fForwardOnly, int fBackwardOnly, int fInitial, int fVerbose );
 clk = clock();
-        pNew->nTruePis = Aig_ManPiNum(pNew) - Aig_ManRegNum(pNew); 
-        pNew->nTruePos = Aig_ManPoNum(pNew) - Aig_ManRegNum(pNew); 
+        pNew->nTruePis = Aig_ManCiNum(pNew) - Aig_ManRegNum(pNew); 
+        pNew->nTruePos = Aig_ManCoNum(pNew) - Aig_ManRegNum(pNew); 
 //        pNew = Rtm_ManRetime( pTemp = pNew, 1, 1000, 0 );
         pNew = Saig_ManRetimeMinArea( pTemp = pNew, 1000, 0, 0, 1, 0 );
         Aig_ManStop( pTemp );
@@ -580,8 +580,8 @@ ABC_PRT( "Time", clock() - clk );
         pPars->fReorderImage = 1;
         pPars->fVerbose      = 0;
         pPars->fSilent       = pParSec->fSilent;
-        pNew->nTruePis = Aig_ManPiNum(pNew) - Aig_ManRegNum(pNew); 
-        pNew->nTruePos = Aig_ManPoNum(pNew) - Aig_ManRegNum(pNew); 
+        pNew->nTruePis = Aig_ManCiNum(pNew) - Aig_ManRegNum(pNew); 
+        pNew->nTruePos = Aig_ManCoNum(pNew) - Aig_ManRegNum(pNew); 
         RetValue = Aig_ManVerifyUsingBdds( pNew, pPars );
     }
 
diff --git a/src/proof/fra/fraSim.c b/src/proof/fra/fraSim.c
index e54846bc..66579be3 100644
--- a/src/proof/fra/fraSim.c
+++ b/src/proof/fra/fraSim.c
@@ -221,7 +221,7 @@ void Fra_SmlSavePattern1( Fra_Man_t * p, int fInit )
     if ( !fInit )
         return;
     // clear the state bits to correspond to all-0 initial state
-    nTruePis = Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
+    nTruePis = Aig_ManCiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
     k = 0;
     Aig_ManForEachLoSeq( p->pManAig, pObj, i )
         Abc_InfoXorBit( p->pPatWords, nTruePis * p->nFramesAll + k++ );
@@ -251,9 +251,9 @@ void Fra_SmlSavePattern( Fra_Man_t * p )
     if ( p->vCex )
     {
         Vec_IntClear( p->vCex );
-        for ( i = 0; i < Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig); i++ )
+        for ( i = 0; i < Aig_ManCiNum(p->pManAig) - Aig_ManRegNum(p->pManAig); i++ )
             Vec_IntPush( p->vCex, Abc_InfoHasBit( p->pPatWords, i ) );
-        for ( i = Aig_ManPiNum(p->pManFraig) - Aig_ManRegNum(p->pManFraig); i < Aig_ManPiNum(p->pManFraig); i++ )
+        for ( i = Aig_ManCiNum(p->pManFraig) - Aig_ManRegNum(p->pManFraig); i < Aig_ManCiNum(p->pManFraig); i++ )
             Vec_IntPush( p->vCex, Abc_InfoHasBit( p->pPatWords, i ) );
     }
 
@@ -298,13 +298,13 @@ void Fra_SmlCheckOutputSavePattern( Fra_Man_t * p, Aig_Obj_t * pObjPo )
     // determine the best pattern
     BestPat = i * 32 + k;
     // fill in the counter-example data
-    pModel = ABC_ALLOC( int, Aig_ManPiNum(p->pManFraig)+1 );
+    pModel = ABC_ALLOC( int, Aig_ManCiNum(p->pManFraig)+1 );
     Aig_ManForEachCi( p->pManAig, pObjPi, i )
     {
         pModel[i] = Abc_InfoHasBit(Fra_ObjSim(p->pSml, pObjPi->Id), BestPat);
 //        printf( "%d", pModel[i] );
     }
-    pModel[Aig_ManPiNum(p->pManAig)] = pObjPo->Id;
+    pModel[Aig_ManCiNum(p->pManAig)] = pObjPo->Id;
 //    printf( "\n" );
     // set the model
     assert( p->pManFraig->pData == NULL );
@@ -328,7 +328,7 @@ int Fra_SmlCheckOutput( Fra_Man_t * p )
     Aig_Obj_t * pObj;
     int i;
     // make sure the reference simulation pattern does not detect the bug
-    pObj = Aig_ManPo( p->pManAig, 0 );
+    pObj = Aig_ManCo( p->pManAig, 0 );
     assert( Aig_ObjFanin0(pObj)->fPhase == (unsigned)Aig_ObjFaninC0(pObj) ); 
     Aig_ManForEachCo( p->pManAig, pObj, i )
     {
@@ -359,7 +359,7 @@ void Fra_SmlAssignRandom( Fra_Sml_t * p, Aig_Obj_t * pObj )
 {
     unsigned * pSims;
     int i;
-    assert( Aig_ObjIsPi(pObj) );
+    assert( Aig_ObjIsCi(pObj) );
     pSims = Fra_ObjSim( p, pObj->Id );
     for ( i = 0; i < p->nWordsTotal; i++ )
         pSims[i] = Fra_ObjRandomSim();
@@ -380,7 +380,7 @@ void Fra_SmlAssignConst( Fra_Sml_t * p, Aig_Obj_t * pObj, int fConst1, int iFram
 {
     unsigned * pSims;
     int i;
-    assert( Aig_ObjIsPi(pObj) );
+    assert( Aig_ObjIsCi(pObj) );
     pSims = Fra_ObjSim( p, pObj->Id ) + p->nWordsFrame * iFrame;
     for ( i = 0; i < p->nWordsFrame; i++ )
         pSims[i] = fConst1? ~(unsigned)0 : 0;
@@ -404,7 +404,7 @@ void Fra_SmlInitialize( Fra_Sml_t * p, int fInit )
     if ( fInit )
     {
         assert( Aig_ManRegNum(p->pAig) > 0 );
-        assert( Aig_ManRegNum(p->pAig) < Aig_ManPiNum(p->pAig) );
+        assert( Aig_ManRegNum(p->pAig) < Aig_ManCiNum(p->pAig) );
         // assign random info for primary inputs
         Aig_ManForEachPiSeq( p->pAig, pObj, i )
             Fra_SmlAssignRandom( p, pObj );
@@ -441,16 +441,16 @@ void Fra_SmlAssignDist1( Fra_Sml_t * p, unsigned * pPat )
         Aig_ManForEachCi( p->pAig, pObj, i )
             Fra_SmlAssignConst( p, pObj, Abc_InfoHasBit(pPat, i), 0 );
         // flip one bit
-        Limit = Abc_MinInt( Aig_ManPiNum(p->pAig), p->nWordsTotal * 32 - 1 );
+        Limit = Abc_MinInt( Aig_ManCiNum(p->pAig), p->nWordsTotal * 32 - 1 );
         for ( i = 0; i < Limit; i++ )
-            Abc_InfoXorBit( Fra_ObjSim( p, Aig_ManPi(p->pAig,i)->Id ), i+1 );
+            Abc_InfoXorBit( Fra_ObjSim( p, Aig_ManCi(p->pAig,i)->Id ), i+1 );
     }
     else
     {
         int fUseDist1 = 0;
 
         // copy the PI info for each frame
-        nTruePis = Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig);
+        nTruePis = Aig_ManCiNum(p->pAig) - Aig_ManRegNum(p->pAig);
         for ( f = 0; f < p->nFrames; f++ )
             Aig_ManForEachPiSeq( p->pAig, pObj, i )
                 Fra_SmlAssignConst( p, pObj, Abc_InfoHasBit(pPat, nTruePis * f + i), f );
@@ -458,14 +458,14 @@ void Fra_SmlAssignDist1( Fra_Sml_t * p, unsigned * pPat )
         k = 0;
         Aig_ManForEachLoSeq( p->pAig, pObj, i )
             Fra_SmlAssignConst( p, pObj, Abc_InfoHasBit(pPat, nTruePis * p->nFrames + k++), 0 );
-//        assert( p->pManFraig == NULL || nTruePis * p->nFrames + k == Aig_ManPiNum(p->pManFraig) );
+//        assert( p->pManFraig == NULL || nTruePis * p->nFrames + k == Aig_ManCiNum(p->pManFraig) );
 
         // flip one bit of the last frame
         if ( fUseDist1 ) //&& p->nFrames == 2 )
         {
             Limit = Abc_MinInt( nTruePis, p->nWordsFrame * 32 - 1 );
             for ( i = 0; i < Limit; i++ )
-                Abc_InfoXorBit( Fra_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ) + p->nWordsFrame*(p->nFrames-1), i+1 );
+                Abc_InfoXorBit( Fra_ObjSim( p, Aig_ManCi(p->pAig, i)->Id ) + p->nWordsFrame*(p->nFrames-1), i+1 );
         }
     }
 }
@@ -581,7 +581,7 @@ void Fra_SmlNodeCopyFanin( Fra_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
     unsigned * pSims, * pSims0;
     int fCompl, fCompl0, i;
     assert( !Aig_IsComplement(pObj) );
-    assert( Aig_ObjIsPo(pObj) );
+    assert( Aig_ObjIsCo(pObj) );
     assert( iFrame == 0 || p->nWordsFrame < p->nWordsTotal );
     // get hold of the simulation information
     pSims  = Fra_ObjSim(p, pObj->Id) + p->nWordsFrame * iFrame;
@@ -615,8 +615,8 @@ void Fra_SmlNodeTransferNext( Fra_Sml_t * p, Aig_Obj_t * pOut, Aig_Obj_t * pIn,
     int i;
     assert( !Aig_IsComplement(pOut) );
     assert( !Aig_IsComplement(pIn) );
-    assert( Aig_ObjIsPo(pOut) );
-    assert( Aig_ObjIsPi(pIn) );
+    assert( Aig_ObjIsCo(pOut) );
+    assert( Aig_ObjIsCi(pIn) );
     assert( iFrame == 0 || p->nWordsFrame < p->nWordsTotal );
     // get hold of the simulation information
     pSims0 = Fra_ObjSim(p, pOut->Id) + p->nWordsFrame * iFrame;
@@ -918,12 +918,12 @@ Abc_Cex_t * Fra_SmlGetCounterExample( Fra_Sml_t * p )
             }
         break;
     }
-    assert( iPo < Aig_ManPoNum(p->pAig)-Aig_ManRegNum(p->pAig) );
+    assert( iPo < Aig_ManCoNum(p->pAig)-Aig_ManRegNum(p->pAig) );
     assert( iFrame < p->nFrames );
     assert( iBit < 32 * p->nWordsFrame );
 
     // allocate the counter example
-    pCex = Abc_CexAlloc( Aig_ManRegNum(p->pAig), Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig), iFrame + 1 );
+    pCex = Abc_CexAlloc( Aig_ManRegNum(p->pAig), Aig_ManCiNum(p->pAig) - Aig_ManRegNum(p->pAig), iFrame + 1 );
     pCex->iPo    = iPo;
     pCex->iFrame = iFrame;
 
@@ -972,16 +972,16 @@ Abc_Cex_t * Fra_SmlCopyCounterExample( Aig_Man_t * pAig, Aig_Man_t * pFrames, in
     // get the number of frames
     assert( Aig_ManRegNum(pAig) > 0 );
     assert( Aig_ManRegNum(pFrames) == 0 );
-    nTruePis = Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig);
-    nTruePos = Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig);
-    nFrames = Aig_ManPiNum(pFrames) / nTruePis;
-    assert( nTruePis * nFrames == Aig_ManPiNum(pFrames) );
-    assert( nTruePos * nFrames == Aig_ManPoNum(pFrames) );
+    nTruePis = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
+    nTruePos = Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig);
+    nFrames = Aig_ManCiNum(pFrames) / nTruePis;
+    assert( nTruePis * nFrames == Aig_ManCiNum(pFrames) );
+    assert( nTruePos * nFrames == Aig_ManCoNum(pFrames) );
     // find the PO that failed
     iPo = -1;
     iFrame = -1;
     Aig_ManForEachCo( pFrames, pObj, i )
-        if ( pObj->Id == pModel[Aig_ManPiNum(pFrames)] )
+        if ( pObj->Id == pModel[Aig_ManCiNum(pFrames)] )
         {
             iPo = i % nTruePos;
             iFrame = i / nTruePos;
@@ -994,7 +994,7 @@ Abc_Cex_t * Fra_SmlCopyCounterExample( Aig_Man_t * pAig, Aig_Man_t * pFrames, in
     pCex->iFrame = iFrame;
 
     // copy the bit data
-    for ( i = 0; i < Aig_ManPiNum(pFrames); i++ )
+    for ( i = 0; i < Aig_ManCiNum(pFrames); i++ )
     {
         if ( pModel[i] )
             Abc_InfoSetBit( pCex->pData, pCex->nRegs + i );
diff --git a/src/proof/int/intCheck.c b/src/proof/int/intCheck.c
index 57d6e7d0..2b14d8ae 100644
--- a/src/proof/int/intCheck.c
+++ b/src/proof/int/intCheck.c
@@ -112,10 +112,10 @@ Inter_Check_t * Inter_CheckStart( Aig_Man_t * pTrans, int nFramesK )
     p->vAssLits = Vec_IntAlloc( 100 );
     // generate the timeframes 
     p->pFrames = Inter_ManUnrollFrames( pTrans, nFramesK );
-    assert( Aig_ManPiNum(p->pFrames) == nFramesK * Saig_ManPiNum(pTrans) + Saig_ManRegNum(pTrans) );
-    assert( Aig_ManPoNum(p->pFrames) == nFramesK * Saig_ManRegNum(pTrans) );
+    assert( Aig_ManCiNum(p->pFrames) == nFramesK * Saig_ManPiNum(pTrans) + Saig_ManRegNum(pTrans) );
+    assert( Aig_ManCoNum(p->pFrames) == nFramesK * Saig_ManRegNum(pTrans) );
     // convert to CNF
-    p->pCnf = Cnf_Derive( p->pFrames, Aig_ManPoNum(p->pFrames) ); 
+    p->pCnf = Cnf_Derive( p->pFrames, Aig_ManCoNum(p->pFrames) ); 
     p->pSat = (sat_solver *)Cnf_DataWriteIntoSolver( p->pCnf, 1, 0 );
     // assign parameters
     p->nFramesK = nFramesK;
@@ -221,9 +221,9 @@ int Inter_CheckPerform( Inter_Check_t * p, Cnf_Dat_t * pCnfInt, int nTimeNewOut
 {
     Aig_Obj_t * pObj, * pObj2;
     int i, f, VarA, VarB, RetValue, Entry, status;
-    int nRegs = Aig_ManPiNum(pCnfInt->pMan);
-    assert( Aig_ManPoNum(p->pCnf->pMan) == p->nFramesK * nRegs );
-    assert( Aig_ManPoNum(pCnfInt->pMan) == 1 );
+    int nRegs = Aig_ManCiNum(pCnfInt->pMan);
+    assert( Aig_ManCoNum(p->pCnf->pMan) == p->nFramesK * nRegs );
+    assert( Aig_ManCoNum(pCnfInt->pMan) == 1 );
 
     // set runtime limit
     if ( nTimeNewOut )
@@ -242,7 +242,7 @@ int Inter_CheckPerform( Inter_Check_t * p, Cnf_Dat_t * pCnfInt, int nTimeNewOut
         // add equality clauses for the flop variables
         Aig_ManForEachCi( pCnfInt->pMan, pObj, i )
         {
-            pObj2 = f ? Aig_ManPo(p->pFrames, i + (f-1) * nRegs) : Aig_ManPi(p->pFrames, i);
+            pObj2 = f ? Aig_ManCo(p->pFrames, i + (f-1) * nRegs) : Aig_ManCi(p->pFrames, i);
             Inter_CheckAddEqual( p, pCnfInt->pVarNums[pObj->Id], p->pCnf->pVarNums[pObj2->Id] );
         }
         // add final clauses
@@ -251,14 +251,14 @@ int Inter_CheckPerform( Inter_Check_t * p, Cnf_Dat_t * pCnfInt, int nTimeNewOut
             if ( f == Vec_IntSize(p->vOrLits) ) // find time here
             {
                 // add literal to this frame
-                VarB = pCnfInt->pVarNums[ Aig_ManPo(pCnfInt->pMan, 0)->Id ];
+                VarB = pCnfInt->pVarNums[ Aig_ManCo(pCnfInt->pMan, 0)->Id ];
                 Vec_IntPush( p->vOrLits, VarB );
             }
             else
             {
                 // add OR gate for this frame
                 VarA = Vec_IntEntry( p->vOrLits, f );
-                VarB = pCnfInt->pVarNums[ Aig_ManPo(pCnfInt->pMan, 0)->Id ];
+                VarB = pCnfInt->pVarNums[ Aig_ManCo(pCnfInt->pMan, 0)->Id ];
                 Inter_CheckAddOrGate( p, VarA, VarB, p->nVars + pCnfInt->nVars );
                 Vec_IntWriteEntry( p->vOrLits, f, p->nVars + pCnfInt->nVars ); // using var ID!
             }
@@ -266,7 +266,7 @@ int Inter_CheckPerform( Inter_Check_t * p, Cnf_Dat_t * pCnfInt, int nTimeNewOut
         else
         {
             // add AND gate for this frame
-            VarB = pCnfInt->pVarNums[ Aig_ManPo(pCnfInt->pMan, 0)->Id ];
+            VarB = pCnfInt->pVarNums[ Aig_ManCo(pCnfInt->pMan, 0)->Id ];
             Vec_IntPush( p->vAndLits, VarB );
         }
         // update variable IDs
diff --git a/src/proof/int/intContain.c b/src/proof/int/intContain.c
index 213c557c..a031c7a4 100644
--- a/src/proof/int/intContain.c
+++ b/src/proof/int/intContain.c
@@ -161,7 +161,7 @@ void Inter_ManAppendCone( Aig_Man_t * pOld, Aig_Man_t * pNew, Aig_Obj_t ** ppNew
 {
     Aig_Obj_t * pObj;
     int i;
-    assert( Aig_ManPoNum(pOld) == 1 );
+    assert( Aig_ManCoNum(pOld) == 1 );
     // create the PIs
     Aig_ManCleanData( pOld );
     Aig_ManConst1(pOld)->pData = Aig_ManConst1(pNew);
@@ -171,7 +171,7 @@ void Inter_ManAppendCone( Aig_Man_t * pOld, Aig_Man_t * pNew, Aig_Obj_t ** ppNew
     Aig_ManForEachNode( pOld, pObj, i )
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // add one PO to new
-    pObj = Aig_ManPo( pOld, 0 );
+    pObj = Aig_ManCo( pOld, 0 );
     Aig_ObjCreateCo( pNew, Aig_NotCond( Aig_ObjChild0Copy(pObj), fCompl ) );
 }
 
@@ -283,7 +283,7 @@ int Inter_ManCheckUniqueness( Aig_Man_t * p, sat_solver * pSat, Cnf_Dat_t * pCnf
         return 1;
 //    assert( Saig_ManPoNum(p) == 1 );
     assert( Aig_ManRegNum(p) > 0 );
-    assert( Aig_ManRegNum(p) < Aig_ManPiNum(p) );
+    assert( Aig_ManRegNum(p) < Aig_ManCiNum(p) );
 
     // get the counter-example
     vPis = Vec_IntAlloc( 100 );
@@ -303,12 +303,12 @@ int Inter_ManCheckUniqueness( Aig_Man_t * p, sat_solver * pSat, Cnf_Dat_t * pCnf
     for ( i = 0; i < nFrames; i++ )
         Aig_ManForEachPiSeq( p, pObj, k )
             Fra_SmlAssignConst( pSml, pObj, pCounterEx[iBit++], i );
-    assert( iBit == Aig_ManPiNum(pCnf->pMan) );
+    assert( iBit == Aig_ManCiNum(pCnf->pMan) );
     // run simulation
     Fra_SmlSimulateOne( pSml );
 
     // check if the given output has failed
-//    RetValue = !Fra_SmlNodeIsZero( pSml, Aig_ManPo(pAig, 0) );
+//    RetValue = !Fra_SmlNodeIsZero( pSml, Aig_ManCo(pAig, 0) );
 //    assert( RetValue );
 
     // check values at the internal nodes
diff --git a/src/proof/int/intCore.c b/src/proof/int/intCore.c
index 10a8fc74..8bef9c59 100644
--- a/src/proof/int/intCore.c
+++ b/src/proof/int/intCore.c
@@ -139,7 +139,7 @@ clk2 = clock();
             p->pInter = Inter_ManStartOneOutput( pAig, 1 );
         else
             p->pInter = Inter_ManStartInitState( Aig_ManRegNum(pAig) );
-        assert( Aig_ManPoNum(p->pInter) == 1 );
+        assert( Aig_ManCoNum(p->pInter) == 1 );
 clk = clock();
         p->pCnfInter = Cnf_Derive( p->pInter, 0 );  
 p->timeCnf += clock() - clk;    
@@ -157,7 +157,7 @@ p->timeRwr += clock() - clk;
         // can also do SAT sweeping on the timeframes...
 clk = clock();
         if ( pPars->fUseBackward )
-            p->pCnfFrames = Cnf_Derive( p->pFrames, Aig_ManPoNum(p->pFrames) );  
+            p->pCnfFrames = Cnf_Derive( p->pFrames, Aig_ManCoNum(p->pFrames) );  
         else
 //            p->pCnfFrames = Cnf_Derive( p->pFrames, 0 );  
             p->pCnfFrames = Cnf_DeriveSimple( p->pFrames, 0 );  
@@ -285,7 +285,7 @@ clk = clock();
 p->timeRwr += clock() - clk;
 
             // check if interpolant is trivial
-            if ( p->pInterNew == NULL || Aig_ObjChild0(Aig_ManPo(p->pInterNew,0)) == Aig_ManConst0(p->pInterNew) )
+            if ( p->pInterNew == NULL || Aig_ObjChild0(Aig_ManCo(p->pInterNew,0)) == Aig_ManConst0(p->pInterNew) )
             { 
 //                printf( "interpolant is constant 0\n" );
                 if ( pPars->fVerbose )
@@ -300,7 +300,7 @@ p->timeRwr += clock() - clk;
 clk = clock();
             if ( pPars->fCheckKstep ) // k-step unique-state induction
             {
-                if ( Aig_ManPiNum(p->pInterNew) == Aig_ManPiNum(p->pInter) )
+                if ( Aig_ManCiNum(p->pInterNew) == Aig_ManCiNum(p->pInter) )
                 {
                     if ( pPars->fTransLoop || pPars->fUseBackward || pPars->nFramesK > 1 )
                     {
@@ -326,7 +326,7 @@ timeTemp = clock() - clk2;
             }
             else // combinational containment
             {
-                if ( Aig_ManPiNum(p->pInterNew) == Aig_ManPiNum(p->pInter) )
+                if ( Aig_ManCiNum(p->pInterNew) == Aig_ManCiNum(p->pInter) )
                     Status = Inter_ManCheckContainment( p->pInterNew, p->pInter );
                 else
                     Status = 0;
diff --git a/src/proof/int/intCtrex.c b/src/proof/int/intCtrex.c
index 22e689f4..04aaa271 100644
--- a/src/proof/int/intCtrex.c
+++ b/src/proof/int/intCtrex.c
@@ -75,7 +75,7 @@ Aig_Man_t * Inter_ManFramesBmc( Aig_Man_t * pAig, int nFrames )
             pObjLo->pData = pObjLi->pData;
     }
     // create POs for the output of the last frame
-    pObj = Aig_ManPo( pAig, 0 );
+    pObj = Aig_ManCo( pAig, 0 );
     Aig_ObjCreateCo( pFrames, Aig_ObjChild0Copy(pObj) );
     Aig_ManCleanup( pFrames );
     return pFrames;
diff --git a/src/proof/int/intDup.c b/src/proof/int/intDup.c
index adc692cb..d7bc73d6 100644
--- a/src/proof/int/intDup.c
+++ b/src/proof/int/intDup.c
@@ -141,7 +141,7 @@ Aig_Man_t * Inter_ManStartOneOutput( Aig_Man_t * p, int fAddFirstPo )
     }
     // set registers
     pNew->nRegs    = fAddFirstPo? 0 : p->nRegs;
-    pNew->nTruePis = fAddFirstPo? Aig_ManPiNum(p) + 1 : p->nTruePis + 1;
+    pNew->nTruePis = fAddFirstPo? Aig_ManCiNum(p) + 1 : p->nTruePis + 1;
     pNew->nTruePos = fAddFirstPo + Saig_ManConstrNum(p);
     // duplicate internal nodes
     Aig_ManForEachNode( p, pObj, i )
@@ -158,7 +158,7 @@ Aig_Man_t * Inter_ManStartOneOutput( Aig_Man_t * p, int fAddFirstPo )
     // add the PO
     if ( fAddFirstPo )
     {
-        pObj = Aig_ManPo( p, 0 );
+        pObj = Aig_ManCo( p, 0 );
         Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     }
     else
diff --git a/src/proof/int/intFrames.c b/src/proof/int/intFrames.c
index 8e74d99a..7c5231b7 100644
--- a/src/proof/int/intFrames.c
+++ b/src/proof/int/intFrames.c
@@ -99,7 +99,7 @@ Aig_Man_t * Inter_ManFramesInter( Aig_Man_t * pAig, int nFrames, int fAddRegOuts
     // create the only PO of the manager
     else
     {
-        pObj = Aig_ManPo( pAig, 0 );
+        pObj = Aig_ManCo( pAig, 0 );
         Aig_ObjCreateCo( pFrames, Aig_ObjChild0Copy(pObj) );
     }
     Aig_ManCleanup( pFrames );
diff --git a/src/proof/int/intInter.c b/src/proof/int/intInter.c
index ef32294b..ffc462d3 100644
--- a/src/proof/int/intInter.c
+++ b/src/proof/int/intInter.c
@@ -45,10 +45,10 @@ ABC_NAMESPACE_IMPL_START
 Aig_Man_t * Inter_ManDupExpand( Aig_Man_t * pInter, Aig_Man_t * pOther )
 {
     Aig_Man_t * pInterC;
-    assert( Aig_ManPiNum(pInter) <= Aig_ManPiNum(pOther) );
+    assert( Aig_ManCiNum(pInter) <= Aig_ManCiNum(pOther) );
     pInterC = Aig_ManDupSimple( pInter );
-    Aig_IthVar( pInterC, Aig_ManPiNum(pOther)-1 );
-    assert( Aig_ManPiNum(pInterC) == Aig_ManPiNum(pOther) );
+    Aig_IthVar( pInterC, Aig_ManCiNum(pOther)-1 );
+    assert( Aig_ManCiNum(pInterC) == Aig_ManCiNum(pOther) );
     return pInterC;
 }
 
diff --git a/src/proof/int/intM114.c b/src/proof/int/intM114.c
index c37cb2c6..ed3ef80e 100644
--- a/src/proof/int/intM114.c
+++ b/src/proof/int/intM114.c
@@ -61,10 +61,10 @@ sat_solver * Inter_ManDeriveSatSolver(
     assert( Aig_ManRegNum(pInter) == 0 );
     assert( Aig_ManRegNum(pAig) > 0 );
     assert( Aig_ManRegNum(pFrames) == 0 );
-    assert( Aig_ManPoNum(pInter) == 1 );
-    assert( Aig_ManPoNum(pFrames) == fUseBackward? Saig_ManRegNum(pAig) : 1 );
-    assert( fUseBackward || Aig_ManPiNum(pInter) == Aig_ManRegNum(pAig) );
-//    assert( (Aig_ManPiNum(pFrames) - Aig_ManRegNum(pAig)) % Saig_ManPiNum(pAig) == 0 );
+    assert( Aig_ManCoNum(pInter) == 1 );
+    assert( Aig_ManCoNum(pFrames) == fUseBackward? Saig_ManRegNum(pAig) : 1 );
+    assert( fUseBackward || Aig_ManCiNum(pInter) == Aig_ManRegNum(pAig) );
+//    assert( (Aig_ManCiNum(pFrames) - Aig_ManRegNum(pAig)) % Saig_ManPiNum(pAig) == 0 );
 
     // prepare CNFs
     Cnf_DataLift( pCnfAig,   pCnfFrames->nVars );
@@ -93,12 +93,12 @@ sat_solver * Inter_ManDeriveSatSolver(
     {
         Saig_ManForEachLi( pAig, pObj2, i )
         {
-            if ( Saig_ManRegNum(pAig) == Aig_ManPiNum(pInter) )
-                pObj = Aig_ManPi( pInter, i );
+            if ( Saig_ManRegNum(pAig) == Aig_ManCiNum(pInter) )
+                pObj = Aig_ManCi( pInter, i );
             else
             {
-                assert( Aig_ManPiNum(pAig) == Aig_ManPiNum(pInter) );
-                pObj = Aig_ManPi( pInter, Aig_ManPiNum(pAig)-Saig_ManRegNum(pAig) + i );
+                assert( Aig_ManCiNum(pAig) == Aig_ManCiNum(pInter) );
+                pObj = Aig_ManCi( pInter, Aig_ManCiNum(pAig)-Saig_ManRegNum(pAig) + i );
             }
 
             Lits[0] = toLitCond( pCnfInter->pVarNums[pObj->Id], 0 );
diff --git a/src/proof/int/intM114p.c b/src/proof/int/intM114p.c
index 6164a389..f143dc39 100644
--- a/src/proof/int/intM114p.c
+++ b/src/proof/int/intM114p.c
@@ -59,10 +59,10 @@ M114p_Solver_t Inter_ManDeriveSatSolverM114p(
     assert( Aig_ManRegNum(pInter) == 0 );
     assert( Aig_ManRegNum(pAig) > 0 );
     assert( Aig_ManRegNum(pFrames) == 0 );
-    assert( Aig_ManPoNum(pInter) == 1 );
-    assert( Aig_ManPoNum(pFrames) == 1 );
-    assert( Aig_ManPiNum(pInter) == Aig_ManRegNum(pAig) );
-//    assert( (Aig_ManPiNum(pFrames) - Aig_ManRegNum(pAig)) % Saig_ManPiNum(pAig) == 0 );
+    assert( Aig_ManCoNum(pInter) == 1 );
+    assert( Aig_ManCoNum(pFrames) == 1 );
+    assert( Aig_ManCiNum(pInter) == Aig_ManRegNum(pAig) );
+//    assert( (Aig_ManCiNum(pFrames) - Aig_ManRegNum(pAig)) % Saig_ManPiNum(pAig) == 0 );
 
     // prepare CNFs
     Cnf_DataLift( pCnfAig,   pCnfFrames->nVars );
diff --git a/src/proof/live/liveness.c b/src/proof/live/liveness.c
index d961e509..e457b3f8 100644
--- a/src/proof/live/liveness.c
+++ b/src/proof/live/liveness.c
@@ -122,12 +122,12 @@ char * retrieveTruePiName( Abc_Ntk_t *pNtkOld, Aig_Man_t *pAigOld, Aig_Man_t *pA
     Aig_ManForEachCi( pAigNew, pObj, index )
         if( pObj == pObjPivot )
             break;
-    assert( index < Aig_ManPiNum( pAigNew ) - Aig_ManRegNum( pAigNew ) );
+    assert( index < Aig_ManCiNum( pAigNew ) - Aig_ManRegNum( pAigNew ) );
     if( index == Saig_ManPiNum( pAigNew ) - 1 )
         return "SAVE_BIERE";
     else
     {
-        pObjOld = Aig_ManPi( pAigOld, index );
+        pObjOld = Aig_ManCi( pAigOld, index );
         pNode = Abc_NtkPi( pNtkOld, index );
         assert( pObjOld->pData == pObjPivot );
         return Abc_ObjName( pNode );
@@ -148,7 +148,7 @@ char * retrieveLOName( Abc_Ntk_t *pNtkOld, Aig_Man_t *pAigOld, Aig_Man_t *pAigNe
     if( index < originalLatchNum )
     {
         oldIndex = Saig_ManPiNum( pAigOld ) + index;
-        pObjOld = Aig_ManPi( pAigOld, oldIndex );
+        pObjOld = Aig_ManCi( pAigOld, oldIndex );
         pNode = Abc_NtkCi( pNtkOld, oldIndex );
         assert( pObjOld->pData == pObjPivot );
         return Abc_ObjName( pNode );
@@ -158,7 +158,7 @@ char * retrieveLOName( Abc_Ntk_t *pNtkOld, Aig_Man_t *pAigOld, Aig_Man_t *pAigNe
     else if( index > originalLatchNum && index < 2 * originalLatchNum + 1 )
     {
         oldIndex = Saig_ManPiNum( pAigOld ) + index - originalLatchNum - 1;
-        pObjOld = Aig_ManPi( pAigOld, oldIndex );
+        pObjOld = Aig_ManCi( pAigOld, oldIndex );
         pNode = Abc_NtkCi( pNtkOld, oldIndex );
         sprintf( dummyStr, "%s__%s", Abc_ObjName( pNode ), "SHADOW");
         return dummyStr;
@@ -219,26 +219,26 @@ Vec_Ptr_t *vecPis, *vecPiNames;
 Vec_Ptr_t *vecLos, *vecLoNames;
 
 
-int Aig_ManPiCleanupBiere( Aig_Man_t * p )
+int Aig_ManCiCleanupBiere( Aig_Man_t * p )
 {
-    int nPisOld = Aig_ManPiNum(p);
+    int nPisOld = Aig_ManCiNum(p);
     
-    p->nObjs[AIG_OBJ_PI] = Vec_PtrSize( p->vPis );
+    p->nObjs[AIG_OBJ_CI] = Vec_PtrSize( p->vCis );
     if ( Aig_ManRegNum(p) )
-        p->nTruePis = Aig_ManPiNum(p) - Aig_ManRegNum(p);
+        p->nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p);
     
-    return nPisOld - Aig_ManPiNum(p);
+    return nPisOld - Aig_ManCiNum(p);
 }
 
 
-int Aig_ManPoCleanupBiere( Aig_Man_t * p )
+int Aig_ManCoCleanupBiere( Aig_Man_t * p )
 {
-    int nPosOld = Aig_ManPoNum(p);
+    int nPosOld = Aig_ManCoNum(p);
 
-    p->nObjs[AIG_OBJ_PO] = Vec_PtrSize( p->vPos );
+    p->nObjs[AIG_OBJ_CO] = Vec_PtrSize( p->vCos );
     if ( Aig_ManRegNum(p) )
-        p->nTruePos = Aig_ManPoNum(p) - Aig_ManRegNum(p);
-    return nPosOld - Aig_ManPoNum(p);
+        p->nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p);
+    return nPosOld - Aig_ManCoNum(p);
 }
 
 Aig_Man_t * LivenessToSafetyTransformation( int mode, Abc_Ntk_t * pNtk, Aig_Man_t * p, 
@@ -518,8 +518,8 @@ Aig_Man_t * LivenessToSafetyTransformation( int mode, Abc_Ntk_t * pNtk, Aig_Man_
 
     Aig_ManSetRegNum( pNew, nRegCount );
 
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
+    Aig_ManCiCleanupBiere( pNew );
+    Aig_ManCoCleanupBiere( pNew );
     
     Aig_ManCleanup( pNew );
     
@@ -527,7 +527,7 @@ Aig_Man_t * LivenessToSafetyTransformation( int mode, Abc_Ntk_t * pNtk, Aig_Man_
     
     if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
     {
-            assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vPos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
+            assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vCos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
             assert( Saig_ManPiNum( p ) + 1 == Saig_ManPiNum( pNew ) );
             assert( Saig_ManRegNum( pNew ) == Saig_ManRegNum( p ) * 2 + 1 + liveLatch + fairLatch );
     }
@@ -821,8 +821,8 @@ Aig_Man_t * LivenessToSafetyTransformationAbs( int mode, Abc_Ntk_t * pNtk, Aig_M
 
     Aig_ManSetRegNum( pNew, nRegCount );
 
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
+    Aig_ManCiCleanupBiere( pNew );
+    Aig_ManCoCleanupBiere( pNew );
     
     Aig_ManCleanup( pNew );
     
@@ -830,7 +830,7 @@ Aig_Man_t * LivenessToSafetyTransformationAbs( int mode, Abc_Ntk_t * pNtk, Aig_M
     
     if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
     {
-            assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vPos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
+            assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vCos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
             assert( Saig_ManPiNum( p ) + 1 == Saig_ManPiNum( pNew ) );
             assert( Saig_ManRegNum( pNew ) == Saig_ManRegNum( p ) + Vec_IntSize( vFlops ) + 1 + liveLatch + fairLatch );
     }
@@ -1128,8 +1128,8 @@ Aig_Man_t * LivenessToSafetyTransformationOneStepLoop( int mode, Abc_Ntk_t * pNt
 
     //printf("\nSaig_ManPiNum = %d, Reg Num = %d, before everything, before Pi cleanup\n", Vec_PtrSize( pNew->vPis ), pNew->nRegs );
 
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
+    Aig_ManCiCleanupBiere( pNew );
+    Aig_ManCoCleanupBiere( pNew );
 
     Aig_ManCleanup( pNew );
     
@@ -1151,7 +1151,7 @@ Vec_Ptr_t * populateLivenessVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
         //if( strstr( Abc_ObjName( pNode ), "assert_fair") != NULL )
         if( nodeName_starts_with( pNode, "assert_fair" ) )
         {
-            Vec_PtrPush( vLive, Aig_ManPo( pAig, i ) );
+            Vec_PtrPush( vLive, Aig_ManCo( pAig, i ) );
             liveCounter++;
         }
     printf("Number of liveness property found = %d\n", liveCounter);
@@ -1169,7 +1169,7 @@ Vec_Ptr_t * populateFairnessVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
         //if( strstr( Abc_ObjName( pNode ), "assume_fair") != NULL )
         if( nodeName_starts_with( pNode, "assume_fair" ) )
         {
-            Vec_PtrPush( vFair, Aig_ManPo( pAig, i ) );
+            Vec_PtrPush( vFair, Aig_ManCo( pAig, i ) );
             fairCounter++;
         }
     printf("Number of fairness property found = %d\n", fairCounter);
@@ -1187,7 +1187,7 @@ Vec_Ptr_t * populateSafetyAssertionVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
         //if( strstr( Abc_ObjName( pNode ), "Assert") != NULL )
         if( nodeName_starts_with( pNode, "assert_safety" ) || nodeName_starts_with( pNode, "Assert" ))
         {
-            Vec_PtrPush( vAssertSafety, Aig_ManPo( pAig, i ) );
+            Vec_PtrPush( vAssertSafety, Aig_ManCo( pAig, i ) );
             assertSafetyCounter++;
         }
     printf("Number of safety property found = %d\n", assertSafetyCounter);
@@ -1205,7 +1205,7 @@ Vec_Ptr_t * populateSafetyAssumptionVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
         //if( strstr( Abc_ObjName( pNode ), "Assert") != NULL )
         if( nodeName_starts_with( pNode, "assume_safety" ) || nodeName_starts_with( pNode, "Assume" ))
         {
-            Vec_PtrPush( vAssumeSafety, Aig_ManPo( pAig, i ) );
+            Vec_PtrPush( vAssumeSafety, Aig_ManCo( pAig, i ) );
             assumeSafetyCounter++;
         }
     printf("Number of assume_safety property found = %d\n", assumeSafetyCounter);
@@ -2247,8 +2247,8 @@ Aig_Man_t * LivenessToSafetyTransformationWithLTL( int mode, Abc_Ntk_t * pNtk, A
 
     Aig_ManSetRegNum( pNew, nRegCount );
 
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
+    Aig_ManCiCleanupBiere( pNew );
+    Aig_ManCoCleanupBiere( pNew );
     
     Aig_ManCleanup( pNew );
     
@@ -2256,7 +2256,7 @@ Aig_Man_t * LivenessToSafetyTransformationWithLTL( int mode, Abc_Ntk_t * pNtk, A
     
     if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
     {
-            assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vPos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
+            assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vCos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
             assert( Saig_ManPiNum( p ) + 1 == Saig_ManPiNum( pNew ) );
             //assert( Saig_ManRegNum( pNew ) == Saig_ManRegNum( p ) * 2 + 1 + liveLatch + fairLatch );
     }
diff --git a/src/proof/live/liveness_sim.c b/src/proof/live/liveness_sim.c
index 552c5204..b99df807 100644
--- a/src/proof/live/liveness_sim.c
+++ b/src/proof/live/liveness_sim.c
@@ -85,12 +85,12 @@ static char * retrieveTruePiName( Abc_Ntk_t *pNtkOld, Aig_Man_t *pAigOld, Aig_Ma
     Aig_ManForEachCi( pAigNew, pObj, index )
         if( pObj == pObjPivot )
             break;
-    assert( index < Aig_ManPiNum( pAigNew ) - Aig_ManRegNum( pAigNew ) );
+    assert( index < Aig_ManCiNum( pAigNew ) - Aig_ManRegNum( pAigNew ) );
     if( index == Saig_ManPiNum( pAigNew ) - 1 )
         return "SAVE_BIERE";
     else
     {
-        pObjOld = Aig_ManPi( pAigOld, index );
+        pObjOld = Aig_ManCi( pAigOld, index );
         pNode = Abc_NtkPi( pNtkOld, index );
         assert( pObjOld->pData == pObjPivot );
         return Abc_ObjName( pNode );
@@ -111,7 +111,7 @@ static char * retrieveLOName( Abc_Ntk_t *pNtkOld, Aig_Man_t *pAigOld, Aig_Man_t
     if( index < originalLatchNum )
     {
         oldIndex = Saig_ManPiNum( pAigOld ) + index;
-        pObjOld = Aig_ManPi( pAigOld, oldIndex );
+        pObjOld = Aig_ManCi( pAigOld, oldIndex );
         pNode = Abc_NtkCi( pNtkOld, oldIndex );
         assert( pObjOld->pData == pObjPivot );
         return Abc_ObjName( pNode );
@@ -121,7 +121,7 @@ static char * retrieveLOName( Abc_Ntk_t *pNtkOld, Aig_Man_t *pAigOld, Aig_Man_t
     else if( index > originalLatchNum && index < 2 * originalLatchNum + 1 )
     {
         oldIndex = Saig_ManPiNum( pAigOld ) + index - originalLatchNum - 1;
-        pObjOld = Aig_ManPi( pAigOld, oldIndex );
+        pObjOld = Aig_ManCi( pAigOld, oldIndex );
         pNode = Abc_NtkCi( pNtkOld, oldIndex );
         sprintf( dummyStr, "%s__%s", Abc_ObjName( pNode ), "SHADOW");
         return dummyStr;
@@ -172,26 +172,26 @@ extern Vec_Ptr_t *vecPis, *vecPiNames;
 extern Vec_Ptr_t *vecLos, *vecLoNames;
 
 
-static int Aig_ManPiCleanupBiere( Aig_Man_t * p )
+static int Aig_ManCiCleanupBiere( Aig_Man_t * p )
 {
-    int nPisOld = Aig_ManPiNum(p);
+    int nPisOld = Aig_ManCiNum(p);
     
-    p->nObjs[AIG_OBJ_PI] = Vec_PtrSize( p->vPis );
+    p->nObjs[AIG_OBJ_CI] = Vec_PtrSize( p->vCis );
     if ( Aig_ManRegNum(p) )
-        p->nTruePis = Aig_ManPiNum(p) - Aig_ManRegNum(p);
+        p->nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p);
     
-    return nPisOld - Aig_ManPiNum(p);
+    return nPisOld - Aig_ManCiNum(p);
 }
 
 
-static int Aig_ManPoCleanupBiere( Aig_Man_t * p )
+static int Aig_ManCoCleanupBiere( Aig_Man_t * p )
 {
-    int nPosOld = Aig_ManPoNum(p);
+    int nPosOld = Aig_ManCoNum(p);
 
-    p->nObjs[AIG_OBJ_PO] = Vec_PtrSize( p->vPos );
+    p->nObjs[AIG_OBJ_CO] = Vec_PtrSize( p->vCos );
     if ( Aig_ManRegNum(p) )
-        p->nTruePos = Aig_ManPoNum(p) - Aig_ManRegNum(p);
-    return nPosOld - Aig_ManPoNum(p);
+        p->nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p);
+    return nPosOld - Aig_ManCoNum(p);
 }
 
 static Aig_Man_t * LivenessToSafetyTransformationSim( Abc_Ntk_t * pNtk, Aig_Man_t * p, Vec_Ptr_t *vLive, Vec_Ptr_t *vFair )
@@ -459,14 +459,14 @@ static Aig_Man_t * LivenessToSafetyTransformationSim( Abc_Ntk_t * pNtk, Aig_Man_
 
     Aig_ManSetRegNum( pNew, nRegCount );
 
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
+    Aig_ManCiCleanupBiere( pNew );
+    Aig_ManCoCleanupBiere( pNew );
     
     Aig_ManCleanup( pNew );
     assert( Aig_ManCheck( pNew ) );
     
 #ifndef DUPLICATE_CKT_DEBUG
-    assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vPos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
+    assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vCos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
     assert( Saig_ManPoNum( pNew ) == 1 );
     assert( Saig_ManPiNum( p ) + 1 == Saig_ManPiNum( pNew ) );
     assert( Saig_ManRegNum( pNew ) == Saig_ManRegNum( p ) * 2 + 1 + liveLatch + fairLatch );
@@ -680,10 +680,10 @@ static Aig_Man_t * LivenessToSafetyTransformationOneStepLoopSim( Abc_Ntk_t * pNt
 
     Aig_ManSetRegNum( pNew, nRegCount );
 
-    printf("\nSaig_ManPiNum = %d, Reg Num = %d, before everything, before Pi cleanup\n", Vec_PtrSize( pNew->vPis ), pNew->nRegs );
+    printf("\nSaig_ManPiNum = %d, Reg Num = %d, before everything, before Pi cleanup\n", Vec_PtrSize( pNew->vCis ), pNew->nRegs );
 
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
+    Aig_ManCiCleanupBiere( pNew );
+    Aig_ManCoCleanupBiere( pNew );
 
     Aig_ManCleanup( pNew );
     
@@ -704,7 +704,7 @@ static Vec_Ptr_t * populateLivenessVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
     Abc_NtkForEachPo( pNtk, pNode, i )
         if( strstr( Abc_ObjName( pNode ), "assert_fair") != NULL )
         {
-            Vec_PtrPush( vLive, Aig_ManPo( pAig, i ) );
+            Vec_PtrPush( vLive, Aig_ManCo( pAig, i ) );
             liveCounter++;
         }
     printf("\nNumber of liveness property found = %d\n", liveCounter);
@@ -721,7 +721,7 @@ static Vec_Ptr_t * populateFairnessVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
     Abc_NtkForEachPo( pNtk, pNode, i )
         if( strstr( Abc_ObjName( pNode ), "assume_fair") != NULL )
         {
-            Vec_PtrPush( vFair, Aig_ManPo( pAig, i ) );
+            Vec_PtrPush( vFair, Aig_ManCo( pAig, i ) );
             fairCounter++;
         }
     printf("\nNumber of fairness property found = %d\n", fairCounter);
diff --git a/src/proof/live/ltl_parser.c b/src/proof/live/ltl_parser.c
index 5572611f..de567576 100644
--- a/src/proof/live/ltl_parser.c
+++ b/src/proof/live/ltl_parser.c
@@ -762,8 +762,8 @@ void populateBoolWithAigNodePtr( Abc_Ntk_t *pNtk, Aig_Man_t *pAigOld, Aig_Man_t
             Abc_NtkForEachPo( pNtk, pNode, i )
                 if( strcmp( Abc_ObjName( pNode ), targetName ) == 0 )
                 {
-                    pObj = Aig_ManPo( pAigOld, i );
-                    assert( Aig_ObjIsPo( pObj ));
+                    pObj = Aig_ManCo( pAigOld, i );
+                    assert( Aig_ObjIsCo( pObj ));
                     pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
                     topASTNode->pObj = pDriverImage;
                     return;
diff --git a/src/proof/llb/llb1Constr.c b/src/proof/llb/llb1Constr.c
index 4ce911db..1ef4ce14 100644
--- a/src/proof/llb/llb1Constr.c
+++ b/src/proof/llb/llb1Constr.c
@@ -150,7 +150,7 @@ void Llb_ManComputeIndCase( Aig_Man_t * p, DdManager * dd, Vec_Int_t * vNodes )
     Vec_PtrWriteEntry( vBdds, Aig_ObjId(Aig_ManConst1(p)), bFunc );
     Saig_ManForEachPi( p, pObj, i )
     {
-        bFunc = Cudd_bddIthVar( dd, Aig_ManPiNum(p) + i );  Cudd_Ref( bFunc );
+        bFunc = Cudd_bddIthVar( dd, Aig_ManCiNum(p) + i );  Cudd_Ref( bFunc );
         Vec_PtrWriteEntry( vBdds, Aig_ObjId(pObj), bFunc );
     }
     Saig_ManForEachLi( p, pObj, i )
@@ -201,11 +201,11 @@ Vec_Int_t * Llb_ManComputeBaseCase( Aig_Man_t * p, DdManager * dd )
     Vec_Int_t * vNodes;
     Aig_Obj_t * pObj, * pRoot;
     int i;
-    pRoot = Aig_ManPo( p, 0 );
+    pRoot = Aig_ManCo( p, 0 );
     vNodes = Vec_IntStartFull( Aig_ManObjNumMax(p) );
     Aig_ManForEachObj( p, pObj, i )
     {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
             continue;
         if ( Cudd_bddLeq( dd, (DdNode *)pObj->pData, Cudd_Not(pRoot->pData) ) )
             Vec_IntWriteEntry( vNodes, i, 1 );
@@ -232,7 +232,7 @@ DdManager * Llb_ManConstructGlobalBdds( Aig_Man_t * p )
     DdNode * bBdd0, * bBdd1;
     Aig_Obj_t * pObj;
     int i;
-    dd = Cudd_Init( Aig_ManPiNum(p), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
+    dd = Cudd_Init( Aig_ManCiNum(p), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
     Cudd_AutodynEnable( dd,  CUDD_REORDER_SYMM_SIFT );
     pObj = Aig_ManConst1(p);
     pObj->pData = Cudd_ReadOne(dd);  Cudd_Ref( (DdNode *)pObj->pData );
diff --git a/src/proof/llb/llb1Core.c b/src/proof/llb/llb1Core.c
index ee697748..56e0cc6b 100644
--- a/src/proof/llb/llb1Core.c
+++ b/src/proof/llb/llb1Core.c
@@ -89,7 +89,7 @@ void Llb_ManPrintAig( Llb_Man_t * p )
     Abc_Print( 1, "pi =%3d  ",    Saig_ManPiNum(p->pAig) );
     Abc_Print( 1, "po =%3d  ",    Saig_ManPoNum(p->pAig) );
     Abc_Print( 1, "ff =%3d  ",    Saig_ManRegNum(p->pAig) );
-    Abc_Print( 1, "int =%5d  ",   Vec_IntSize(p->vVar2Obj)-Aig_ManPiNum(p->pAig)-Saig_ManRegNum(p->pAig) );
+    Abc_Print( 1, "int =%5d  ",   Vec_IntSize(p->vVar2Obj)-Aig_ManCiNum(p->pAig)-Saig_ManRegNum(p->pAig) );
     Abc_Print( 1, "var =%5d  ",   Vec_IntSize(p->vVar2Obj) );
     Abc_Print( 1, "part =%5d  ",  Vec_PtrSize(p->vGroups)-2 );
     Abc_Print( 1, "and =%5d  ",   Aig_ManNodeNum(p->pAig) );
diff --git a/src/proof/llb/llb1Group.c b/src/proof/llb/llb1Group.c
index c61f3a30..1099b2cd 100644
--- a/src/proof/llb/llb1Group.c
+++ b/src/proof/llb/llb1Group.c
@@ -95,7 +95,7 @@ void Llb_ManGroupCollect_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Ptr_t * vN
     Aig_ObjSetTravIdCurrent(pAig, pObj);
     if ( Aig_ObjIsConst1(pObj) )
         return;
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         Llb_ManGroupCollect_rec( pAig, Aig_ObjFanin0(pObj), vNodes );
         return;
@@ -180,7 +180,7 @@ Llb_Grp_t * Llb_ManGroupCreate( Llb_Man_t * pMan, Aig_Obj_t * pObj )
     p = Llb_ManGroupAlloc( pMan );
     Vec_PtrPush( p->vOuts, pObj );
     Aig_ManIncrementTravId( pMan->pAig );
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
         Llb_ManGroupCreate_rec( pMan->pAig, Aig_ObjFanin0(pObj), p->vIns );
     else
     {
diff --git a/src/proof/llb/llb1Hint.c b/src/proof/llb/llb1Hint.c
index 6e705a38..51d3a9fc 100644
--- a/src/proof/llb/llb1Hint.c
+++ b/src/proof/llb/llb1Hint.c
@@ -103,7 +103,7 @@ Vec_Int_t * Llb_ManCollectHighFanoutObjects( Aig_Man_t * pAig, int nCandMax, int
     vFanouts = Vec_IntAlloc( 100 );
     Aig_ManForEachObj( pAig, pObj, i )
     {
-//        if ( !Aig_ObjIsPi(pObj) && (fCisOnly || !Aig_ObjIsNode(pObj)) )
+//        if ( !Aig_ObjIsCi(pObj) && (fCisOnly || !Aig_ObjIsNode(pObj)) )
         if ( !Saig_ObjIsLo(pAig,pObj) && (fCisOnly || !Aig_ObjIsNode(pObj)) )
             continue;
         Vec_IntPush( vFanouts, Aig_ObjRefs(pObj) );
@@ -117,7 +117,7 @@ Vec_Int_t * Llb_ManCollectHighFanoutObjects( Aig_Man_t * pAig, int nCandMax, int
     vResult = Vec_IntAlloc( 100 );
     Aig_ManForEachObj( pAig, pObj, i )
     {
-//        if ( !Aig_ObjIsPi(pObj) && (fCisOnly || !Aig_ObjIsNode(pObj)) )
+//        if ( !Aig_ObjIsCi(pObj) && (fCisOnly || !Aig_ObjIsNode(pObj)) )
         if ( !Saig_ObjIsLo(pAig,pObj) && (fCisOnly || !Aig_ObjIsNode(pObj)) )
             continue;
         if ( Aig_ObjRefs(pObj) < PivotValue )
diff --git a/src/proof/llb/llb1Reach.c b/src/proof/llb/llb1Reach.c
index d8c667ae..60124378 100644
--- a/src/proof/llb/llb1Reach.c
+++ b/src/proof/llb/llb1Reach.c
@@ -69,7 +69,7 @@ DdNode * Llb_ManConstructOutBdd( Aig_Man_t * pAig, Aig_Obj_t * pNode, DdManager
         Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
     }
     Vec_PtrFree( vNodes );
-    if ( Aig_ObjIsPo(pNode) )
+    if ( Aig_ObjIsCo(pNode) )
         bFunc = Cudd_NotCond( bFunc, Aig_ObjFaninC0(pNode) );
     Cudd_Deref( bFunc );
     dd->TimeStop = TimeStop;
@@ -113,7 +113,7 @@ DdNode * Llb_ManConstructGroupBdd( Llb_Man_t * p, Llb_Grp_t * pGroup )
     bRes = Cudd_ReadOne( p->dd );   Cudd_Ref( bRes );
     Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pObj, i )
     {
-        if ( Aig_ObjIsPo(pObj) )
+        if ( Aig_ObjIsCo(pObj) )
             bBdd0 = Cudd_NotCond( Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
         else
             bBdd0 = (DdNode *)pObj->pData;
@@ -413,7 +413,7 @@ DdNode * Llb_ManCreateConstraints( Llb_Man_t * p, Vec_Int_t * vHints, int fUseNs
     if ( vHints == NULL )
         return Cudd_ReadOne( p->dd );
     TimeStop = p->dd->TimeStop; p->dd->TimeStop = 0;
-    assert( Aig_ManPiNum(p->pAig) == Aig_ManPiNum(p->pAigGlo) );
+    assert( Aig_ManCiNum(p->pAig) == Aig_ManCiNum(p->pAigGlo) );
     // assign const and PI nodes to the original AIG
     Aig_ManCleanData( p->pAig );
     Aig_ManConst1( p->pAig )->pData = Cudd_ReadOne( p->dd );
@@ -431,7 +431,7 @@ DdNode * Llb_ManCreateConstraints( Llb_Man_t * p, Vec_Int_t * vHints, int fUseNs
     Aig_ManCleanData( p->pAigGlo );
     Aig_ManConst1( p->pAigGlo )->pData = Cudd_ReadOne( p->dd );
     Aig_ManForEachCi( p->pAigGlo, pObj, i )
-        pObj->pData = Aig_ManPi(p->pAig, i)->pData;
+        pObj->pData = Aig_ManCi(p->pAig, i)->pData;
     // derive consraints
     bConstr = Cudd_ReadOne( p->dd );   Cudd_Ref( bConstr );
     Vec_IntForEachEntry( vHints, Entry, i )
@@ -595,7 +595,7 @@ int Llb_ManReachability( Llb_Man_t * p, Vec_Int_t * vHints, DdManager ** pddGlo
     assert( p->ddG == NULL );
     assert( p->ddR == NULL );
     p->dd  = Cudd_Init( Vec_IntSize(p->vVar2Obj), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    p->ddR = Cudd_Init( Aig_ManPiNum(p->pAig),    0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
+    p->ddR = Cudd_Init( Aig_ManCiNum(p->pAig),    0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
     if ( pddGlo && *pddGlo )
         p->ddG = *pddGlo, *pddGlo = NULL; 
     else
diff --git a/src/proof/llb/llb2Bad.c b/src/proof/llb/llb2Bad.c
index 9aecb9ff..f4359493 100644
--- a/src/proof/llb/llb2Bad.c
+++ b/src/proof/llb/llb2Bad.c
@@ -48,7 +48,7 @@ DdNode * Llb_BddComputeBad( Aig_Man_t * pInit, DdManager * dd, int TimeOut )
     DdNode * bBdd0, * bBdd1, * bTemp, * bResult;
     Aig_Obj_t * pObj;
     int i, k;
-    assert( Cudd_ReadSize(dd) == Aig_ManPiNum(pInit) );
+    assert( Cudd_ReadSize(dd) == Aig_ManCiNum(pInit) );
     // initialize elementary variables
     Aig_ManConst1(pInit)->pData = Cudd_ReadOne( dd );
     Saig_ManForEachLo( pInit, pObj, i )
@@ -56,7 +56,7 @@ DdNode * Llb_BddComputeBad( Aig_Man_t * pInit, DdManager * dd, int TimeOut )
     Saig_ManForEachPi( pInit, pObj, i )
         pObj->pData = Cudd_bddIthVar( dd, Aig_ManRegNum(pInit) + i );
     // compute internal nodes
-    vNodes = Aig_ManDfsNodes( pInit, (Aig_Obj_t **)Vec_PtrArray(pInit->vPos), Saig_ManPoNum(pInit) );
+    vNodes = Aig_ManDfsNodes( pInit, (Aig_Obj_t **)Vec_PtrArray(pInit->vCos), Saig_ManPoNum(pInit) );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
     {
         if ( !Aig_ObjIsNode(pObj) )
@@ -111,7 +111,7 @@ DdNode * Llb_BddQuantifyPis( Aig_Man_t * pInit, DdManager * dd, DdNode * bFunc )
     DdNode * bVar, * bCube, * bTemp;
     Aig_Obj_t * pObj;
     int i, TimeStop;
-    assert( Cudd_ReadSize(dd) == Aig_ManPiNum(pInit) );
+    assert( Cudd_ReadSize(dd) == Aig_ManCiNum(pInit) );
     TimeStop = dd->TimeStop; dd->TimeStop = 0;
     // create PI cube
     bCube = Cudd_ReadOne( dd );  Cudd_Ref( bCube );
diff --git a/src/proof/llb/llb2Core.c b/src/proof/llb/llb2Core.c
index 626acbd2..3b98c32a 100644
--- a/src/proof/llb/llb2Core.c
+++ b/src/proof/llb/llb2Core.c
@@ -622,7 +622,7 @@ Llb_Img_t * Llb_CoreStart( Aig_Man_t * pInit, Aig_Man_t * pAig, Gia_ParLlb_t *
     p->pPars = pPars;
     p->dd    = Cudd_Init( Aig_ManObjNumMax(pAig), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
     p->ddG   = Cudd_Init( Aig_ManRegNum(pAig),    0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    p->ddR   = Cudd_Init( Aig_ManPiNum(pAig),     0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
+    p->ddR   = Cudd_Init( Aig_ManCiNum(pAig),     0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
     Cudd_AutodynEnable( p->dd,  CUDD_REORDER_SYMM_SIFT );
     Cudd_AutodynEnable( p->ddG, CUDD_REORDER_SYMM_SIFT );
     Cudd_AutodynEnable( p->ddR, CUDD_REORDER_SYMM_SIFT );
diff --git a/src/proof/llb/llb2Flow.c b/src/proof/llb/llb2Flow.c
index 295f0bfe..a1db70d3 100644
--- a/src/proof/llb/llb2Flow.c
+++ b/src/proof/llb/llb2Flow.c
@@ -194,7 +194,7 @@ Vec_Ptr_t * Llb_ManCutMap( Aig_Man_t * p, Vec_Ptr_t * vResult, Vec_Ptr_t * vSupp
     if ( fShowMatrix )
     Aig_ManForEachObj( p, pObj, i )
     {
-        if ( !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
+        if ( !Aig_ObjIsCi(pObj) && !Aig_ObjIsNode(pObj) )
             continue;
         Vec_PtrForEachEntry( Vec_Int_t *, vMaps, vMap, k )
             if ( Vec_IntEntry(vMap, i) )
@@ -276,7 +276,7 @@ int Llb_ManCutLiNum( Aig_Man_t * p, Vec_Ptr_t * vMinCut )
     int i, k, iFanout = -1, Counter = 0;
     Vec_PtrForEachEntry( Aig_Obj_t *, vMinCut, pObj, i )
     {
-        if ( Aig_ObjIsPi(pObj) )
+        if ( Aig_ObjIsCi(pObj) )
             continue;
         Aig_ObjForEachFanout( p, pObj, pFanout, iFanout, k )
         {
@@ -547,7 +547,7 @@ void Llb_ManResultPrint( Aig_Man_t * p, Vec_Ptr_t * vResult )
 int Llb_ManFlowBwdPath2_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
 {
     Aig_Obj_t * pFanout;
-    assert( Aig_ObjIsNode(pObj) || Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) );
+    assert( Aig_ObjIsNode(pObj) || Aig_ObjIsCi(pObj) || Aig_ObjIsConst1(pObj) );
     // skip visited nodes
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return 0;
@@ -607,7 +607,7 @@ void Llb_ManFlowLabelTfi_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
     if ( Aig_ObjIsTravIdCurrent(p, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
+    if ( Aig_ObjIsCi(pObj) || Aig_ObjIsConst1(pObj) )
         return;
     assert( Aig_ObjIsNode(pObj) );
     Llb_ManFlowLabelTfi_rec( p, Aig_ObjFanin0(pObj) );
@@ -638,7 +638,7 @@ void Llb_ManFlowUpdateCut( Aig_Man_t * p, Vec_Ptr_t * vMinCut )
     Aig_ManIncrementTravId(p);
     Aig_ManForEachObj( p, pObj, i )
     {
-        if ( !Aig_ObjIsPo(pObj) && !Aig_ObjIsNode(pObj) )
+        if ( !Aig_ObjIsCo(pObj) && !Aig_ObjIsNode(pObj) )
             continue;
         if ( Aig_ObjIsTravIdCurrent(p, pObj) || Aig_ObjIsTravIdPrevious(p, pObj) )
             continue;
@@ -708,7 +708,7 @@ int Llb_ManFlowVerifyCut_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
     // visit the node
     if ( Aig_ObjIsConst1(pObj) )
         return 1;
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return 0;
     // explore the fanins
     assert( Aig_ObjIsNode(pObj) );
@@ -930,7 +930,7 @@ void Llb_ManFlowSetMarkA_rec( Aig_Obj_t * pObj )
     if ( pObj->fMarkA )
         return;
     pObj->fMarkA = 1;
-    if ( Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
+    if ( Aig_ObjIsCi(pObj) || Aig_ObjIsConst1(pObj) )
         return;
     assert( Aig_ObjIsNode(pObj) );
     Llb_ManFlowSetMarkA_rec( Aig_ObjFanin0(pObj) );
diff --git a/src/proof/llb/llb3Nonlin.c b/src/proof/llb/llb3Nonlin.c
index 678a6fff..38d9b8ae 100644
--- a/src/proof/llb/llb3Nonlin.c
+++ b/src/proof/llb/llb3Nonlin.c
@@ -705,17 +705,17 @@ Llb_Mnn_t * Llb_MnnStart( Aig_Man_t * pInit, Aig_Man_t * pAig, Gia_ParLlb_t *  p
     p->pPars = pPars;
     p->dd    = Cudd_Init( Aig_ManObjNumMax(pAig), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
     p->ddG   = Cudd_Init( Aig_ManRegNum(pAig),    0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    p->ddR   = Cudd_Init( Aig_ManPiNum(pAig),     0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
+    p->ddR   = Cudd_Init( Aig_ManCiNum(pAig),     0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
     Cudd_AutodynEnable( p->dd,  CUDD_REORDER_SYMM_SIFT );
     Cudd_AutodynEnable( p->ddG, CUDD_REORDER_SYMM_SIFT );
     Cudd_AutodynEnable( p->ddR, CUDD_REORDER_SYMM_SIFT );
     p->vRings = Vec_PtrAlloc( 100 );
     // create leaves
-    p->vLeaves = Vec_PtrAlloc( Aig_ManPiNum(pAig) );
+    p->vLeaves = Vec_PtrAlloc( Aig_ManCiNum(pAig) );
     Aig_ManForEachCi( pAig, pObj, i )
         Vec_PtrPush( p->vLeaves, pObj );
     // create roots
-    p->vRoots = Vec_PtrAlloc( Aig_ManPoNum(pAig) );
+    p->vRoots = Vec_PtrAlloc( Aig_ManCoNum(pAig) );
     Saig_ManForEachLi( pAig, pObj, i )
         Vec_PtrPush( p->vRoots, pObj );
     // variables to quantify
diff --git a/src/proof/llb/llb4Cex.c b/src/proof/llb/llb4Cex.c
index 69ba6ab1..b5bdb36e 100644
--- a/src/proof/llb/llb4Cex.c
+++ b/src/proof/llb/llb4Cex.c
@@ -63,7 +63,7 @@ Abc_Cex_t * Llb4_Nonlin4TransformCex( Aig_Man_t * pAig, Vec_Ptr_t * vStates, int
 */
     // derive SAT solver
     nRegs = Aig_ManRegNum(pAig); pAig->nRegs = 0;
-    pCnf = Cnf_Derive( pAig, Aig_ManPoNum(pAig) );
+    pCnf = Cnf_Derive( pAig, Aig_ManCoNum(pAig) );
     pAig->nRegs = nRegs;
 //    Cnf_DataTranformPolarity( pCnf, 0 );
     // convert into SAT solver
@@ -249,11 +249,11 @@ Vec_Ptr_t * Llb4_Nonlin4VerifyCex( Aig_Man_t * pAig, Abc_Cex_t * p )
     }
 */
     assert( iBit == p->nBits );
-//    if ( Aig_ManPo(pAig, p->iPo)->fMarkB == 0 )
+//    if ( Aig_ManCo(pAig, p->iPo)->fMarkB == 0 )
 //        Vec_PtrFreeP( &vStates );
     for ( i = Saig_ManPoNum(pAig) - 1; i >= 0; i-- )
     {
-        if ( Aig_ManPo(pAig, i)->fMarkB )
+        if ( Aig_ManCo(pAig, i)->fMarkB )
         {
             p->iPo = i;
             break;
diff --git a/src/proof/llb/llb4Cluster.c b/src/proof/llb/llb4Cluster.c
index c151a618..7e325597 100644
--- a/src/proof/llb/llb4Cluster.c
+++ b/src/proof/llb/llb4Cluster.c
@@ -49,7 +49,7 @@ void Llb_Nonlin4FindOrder_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t * v
         return;
     Aig_ObjSetTravIdCurrent( pAig, pObj );
     assert( Llb_ObjBddVar(vOrder, pObj) < 0 );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), (*pCounter)++ );
         return;
@@ -152,11 +152,11 @@ DdNode * Llb_Nonlin4FindPartitions_rec( DdManager * dd, Aig_Obj_t * pObj, Vec_In
     DdNode * bBdd, * bBdd0, * bBdd1, * bPart, * vVar;
     if ( Aig_ObjIsConst1(pObj) )
         return Cudd_ReadOne(dd); 
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
     if ( pObj->pData )
         return (DdNode *)pObj->pData;
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         bBdd0 = Cudd_NotCond( Llb_Nonlin4FindPartitions_rec(dd, Aig_ObjFanin0(pObj), vOrder, vRoots), Aig_ObjFaninC0(pObj) );
         bPart = Cudd_bddXnor( dd, Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) ), bBdd0 );  Cudd_Ref( bPart );
diff --git a/src/proof/llb/llb4Nonlin.c b/src/proof/llb/llb4Nonlin.c
index 31f94acf..af8dad75 100644
--- a/src/proof/llb/llb4Nonlin.c
+++ b/src/proof/llb/llb4Nonlin.c
@@ -84,7 +84,7 @@ DdNode * Llb_Nonlin4ComputeBad( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vO
     Aig_ManForEachCi( pAig, pObj, i )
         pObj->pData = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
     // compute internal nodes
-    vNodes = Aig_ManDfsNodes( pAig, (Aig_Obj_t **)Vec_PtrArray(pAig->vPos), Saig_ManPoNum(pAig) );
+    vNodes = Aig_ManDfsNodes( pAig, (Aig_Obj_t **)Vec_PtrArray(pAig->vCos), Saig_ManPoNum(pAig) );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
     {
         if ( !Aig_ObjIsNode(pObj) )
@@ -273,7 +273,7 @@ void Llb_Nonlin4CreateOrder_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t *
         return;
     Aig_ObjSetTravIdCurrent( pAig, pObj );
     assert( Llb_ObjBddVar(vOrder, pObj) < 0 );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
 //        if ( Saig_ObjIsLo(pAig, pObj) )
 //            Vec_IntWriteEntry( vOrder, Aig_ObjId(Saig_ObjLoToLi(pAig, pObj)), (*pCounter)++ );
@@ -371,7 +371,7 @@ printf( "Techmapping added %d pivots.\n", Vec_IntSize(vNodes) );
 //                Vec_IntWriteEntry( vOrder, Aig_ObjId(Saig_ObjLoToLi(pAig, pObj)), Counter++ );
             Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), Counter++ );
         }
-    assert( Counter <= Aig_ManPiNum(pAig) + Aig_ManRegNum(pAig) + (vNodes?Vec_IntSize(vNodes):0) );
+    assert( Counter <= Aig_ManCiNum(pAig) + Aig_ManRegNum(pAig) + (vNodes?Vec_IntSize(vNodes):0) );
     Aig_ManCleanMarkA( pAig );
     Vec_IntFreeP( &vNodes );
     return vOrder;
diff --git a/src/proof/llb/llb4Sweep.c b/src/proof/llb/llb4Sweep.c
index 292fb176..6b223ab9 100644
--- a/src/proof/llb/llb4Sweep.c
+++ b/src/proof/llb/llb4Sweep.c
@@ -49,7 +49,7 @@ void Llb_Nonlin4SweepOrder_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t *
         return;
     Aig_ObjSetTravIdCurrent( pAig, pObj );
     assert( Llb_ObjBddVar(vOrder, pObj) < 0 );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), (*pCounter)++ );
         return;
@@ -102,7 +102,7 @@ Vec_Int_t * Llb_Nonlin4SweepOrder( Aig_Man_t * pAig, int * pCounter, int fSaveAl
             Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), Counter++ );
 //    assert( Counter == Aig_ManObjNum(pAig) - 1 ); // no dangling nodes
     if ( pCounter )
-        *pCounter = Counter - Aig_ManPiNum(pAig) - Aig_ManPoNum(pAig);
+        *pCounter = Counter - Aig_ManCiNum(pAig) - Aig_ManCoNum(pAig);
     return vOrder;
 }
 
@@ -211,11 +211,11 @@ DdNode * Llb_Nonlin4SweepPartitions_rec( DdManager * dd, Aig_Obj_t * pObj, Vec_I
     DdNode * bBdd, * bBdd0, * bBdd1, * bPart, * vVar;
     if ( Aig_ObjIsConst1(pObj) )
         return Cudd_ReadOne(dd); 
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
     if ( pObj->pData )
         return (DdNode *)pObj->pData;
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         bBdd0 = Cudd_NotCond( Llb_Nonlin4SweepPartitions_rec(dd, Aig_ObjFanin0(pObj), vOrder, vRoots), Aig_ObjFaninC0(pObj) );
         bPart = Cudd_bddXnor( dd, Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) ), bBdd0 );  Cudd_Ref( bPart );
@@ -535,9 +535,9 @@ void Llb4_Nonlin4Sweep( Aig_Man_t * pAig, int nSweepMax, int nClusterMax, DdMana
     assert( Counter == nCutPoints );
     Aig_ManCleanMarkA( pAig );
     // compute the BAD states
-    ddBad = Llb4_Nonlin4SweepBadStates( pAig, vOrder, nCutPoints + Aig_ManPiNum(pAig) + Aig_ManPoNum(pAig) );
+    ddBad = Llb4_Nonlin4SweepBadStates( pAig, vOrder, nCutPoints + Aig_ManCiNum(pAig) + Aig_ManCoNum(pAig) );
     // compute the clusters
-    ddWork = Llb4_Nonlin4SweepGroups( pAig, vOrder, nCutPoints + Aig_ManPiNum(pAig) + Aig_ManPoNum(pAig), &vGroups, nClusterMax, fVerbose );
+    ddWork = Llb4_Nonlin4SweepGroups( pAig, vOrder, nCutPoints + Aig_ManCiNum(pAig) + Aig_ManCoNum(pAig), &vGroups, nClusterMax, fVerbose );
     // transfer the result from the Bad manager
 //printf( "Bad before = %d.\n", Cudd_DagSize(ddBad->bFunc) );
     ddWork->bFunc = Cudd_bddTransfer( ddBad, ddWork, ddBad->bFunc );   Cudd_Ref( ddWork->bFunc );
diff --git a/src/proof/pdr/pdrClass.c b/src/proof/pdr/pdrClass.c
index cbe5e1c2..5dd4c4a9 100644
--- a/src/proof/pdr/pdrClass.c
+++ b/src/proof/pdr/pdrClass.c
@@ -202,7 +202,7 @@ void Pdr_ManEquivClasses( Aig_Man_t * pAig )
         // report the result
         Abc_Print( 1, "F =%4d : Total = %6d. Nodes = %6d. RedRegs = %6d. Prop = %s\n", 
             f+1, Aig_ManNodeNum(pAig), Aig_ManNodeNum(pTemp), Pdr_ManCountMap(vMap), 
-            Aig_ObjChild0(Aig_ManPo(pTemp,0)) == Aig_ManConst0(pTemp) ? "proof" : "unknown" );
+            Aig_ObjChild0(Aig_ManCo(pTemp,0)) == Aig_ManConst0(pTemp) ? "proof" : "unknown" );
         // recreate the map
         Pdr_ManPrintMap( vMap );
         Vec_IntFree( vMap );
diff --git a/src/proof/pdr/pdrCnf.c b/src/proof/pdr/pdrCnf.c
index fddd292b..fcad15e0 100644
--- a/src/proof/pdr/pdrCnf.c
+++ b/src/proof/pdr/pdrCnf.c
@@ -114,7 +114,7 @@ int Pdr_ObjSatVar2( Pdr_Man_t * p, int k, Aig_Obj_t * pObj )
     if ( nVarCount == Vec_IntSize(vVar2Ids) )
         return iVarThis;
     assert( nVarCount + 1 == Vec_IntSize(vVar2Ids) );
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return iVarThis;
     nClauses = p->pCnf2->pObj2Count[Aig_ObjId(pObj)];
     iFirstClause = p->pCnf2->pObj2Clause[Aig_ObjId(pObj)];
@@ -269,8 +269,8 @@ static inline sat_solver * Pdr_ManNewSolver1( sat_solver * pSat, Pdr_Man_t * p,
     if ( p->pCnf1 == NULL )
     {
         int nRegs = p->pAig->nRegs;
-        p->pAig->nRegs = Aig_ManPoNum(p->pAig);
-        p->pCnf1 = Cnf_Derive( p->pAig, Aig_ManPoNum(p->pAig) );
+        p->pAig->nRegs = Aig_ManCoNum(p->pAig);
+        p->pCnf1 = Cnf_Derive( p->pAig, Aig_ManCoNum(p->pAig) );
         p->pAig->nRegs = nRegs;
         assert( p->vVar2Reg == NULL );
         p->vVar2Reg = Vec_IntStartFull( p->pCnf1->nVars );
diff --git a/src/proof/pdr/pdrSat.c b/src/proof/pdr/pdrSat.c
index c191654a..de661905 100644
--- a/src/proof/pdr/pdrSat.c
+++ b/src/proof/pdr/pdrSat.c
@@ -55,7 +55,7 @@ sat_solver * Pdr_ManCreateSolver( Pdr_Man_t * p, int k )
     Vec_VecExpand( p->vClauses, k );
     Vec_IntPush( p->vActVars, 0 );
     // add property cone
-    Pdr_ObjSatVar( p, k, Aig_ManPo(p->pAig, (p->pPars->iOutput==-1)?0:p->pPars->iOutput ) );
+    Pdr_ObjSatVar( p, k, Aig_ManCo(p->pAig, (p->pPars->iOutput==-1)?0:p->pPars->iOutput ) );
     return pSat;
 }
 
@@ -175,7 +175,7 @@ void Pdr_ManSetPropertyOutput( Pdr_Man_t * p, int k )
     sat_solver * pSat;
     int Lit, RetValue;
     pSat = Pdr_ManSolver(p, k);
-    Lit = toLitCond( Pdr_ObjSatVar(p, k, Aig_ManPo(p->pAig, (p->pPars->iOutput==-1)?0:p->pPars->iOutput)), 1 ); // neg literal
+    Lit = toLitCond( Pdr_ObjSatVar(p, k, Aig_ManCo(p->pAig, (p->pPars->iOutput==-1)?0:p->pPars->iOutput)), 1 ); // neg literal
     RetValue = sat_solver_addclause( pSat, &Lit, &Lit + 1 );
     assert( RetValue == 1 );
     sat_solver_compress( pSat );
@@ -278,7 +278,7 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
     if ( pCube == NULL ) // solve the property
     {
         clk = clock();
-        Lit = toLit( Pdr_ObjSatVar(p, k, Aig_ManPo(p->pAig, (p->pPars->iOutput==-1)?0:p->pPars->iOutput)) ); // pos literal (property fails)
+        Lit = toLit( Pdr_ObjSatVar(p, k, Aig_ManCo(p->pAig, (p->pPars->iOutput==-1)?0:p->pPars->iOutput)) ); // pos literal (property fails)
         RetValue = sat_solver_solve( pSat, &Lit, &Lit + 1, nConfLimit, 0, 0, 0 );
         if ( RetValue == l_Undef )
             return -1;
diff --git a/src/proof/pdr/pdrTsim.c b/src/proof/pdr/pdrTsim.c
index 428c20c7..0547c308 100644
--- a/src/proof/pdr/pdrTsim.c
+++ b/src/proof/pdr/pdrTsim.c
@@ -81,13 +81,13 @@ void Pdr_ManCollectCone_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t * vCi
     if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
         return;
     Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Vec_IntPush( vCiObjs, Aig_ObjId(pObj) );
         return;
     }
     Pdr_ManCollectCone_rec( pAig, Aig_ObjFanin0(pObj), vCiObjs, vNodes );
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
         return;
     Pdr_ManCollectCone_rec( pAig, Aig_ObjFanin1(pObj), vCiObjs, vNodes );
     Vec_IntPush( vNodes, Aig_ObjId(pObj) );
@@ -133,7 +133,7 @@ int Pdr_ManExtendOneEval( Aig_Man_t * pAig, Aig_Obj_t * pObj )
     Value0 = Pdr_ManSimInfoGet( pAig, Aig_ObjFanin0(pObj) );
     if ( Aig_ObjFaninC0(pObj) )
         Value0 = Pdr_ManSimInfoNot( Value0 );
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         Pdr_ManSimInfoSet( pAig, pObj, Value0 );
         return Value0;
@@ -228,7 +228,7 @@ int Pdr_ManExtendOne( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t * vUndo, Vec
             assert( Value2 == PDR_UND );
             Vec_IntPush( vUndo, Aig_ObjId(pFanout) );
             Vec_IntPush( vUndo, Value );
-            if ( Aig_ObjIsPo(pFanout) )
+            if ( Aig_ObjIsCo(pFanout) )
                 return 0;
             assert( Aig_ObjIsNode(pFanout) );
             Vec_IntPushOrder( vVis, Aig_ObjId(pFanout) );
@@ -318,8 +318,8 @@ void Pdr_ManPrintCex( Aig_Man_t * pAig, Vec_Int_t * vCiObjs, Vec_Int_t * vCiVals
 {
     Aig_Obj_t * pObj;
     int i;
-    char * pBuff = ABC_ALLOC( char, Aig_ManPiNum(pAig)+1 );
-    for ( i = 0; i < Aig_ManPiNum(pAig); i++ )
+    char * pBuff = ABC_ALLOC( char, Aig_ManCiNum(pAig)+1 );
+    for ( i = 0; i < Aig_ManCiNum(pAig); i++ )
         pBuff[i] = '-';
     pBuff[i] = 0;
     Aig_ManForEachObjVec( vCiObjs, pAig, pObj, i )
@@ -368,7 +368,7 @@ Pdr_Set_t * Pdr_ManTernarySim( Pdr_Man_t * p, int k, Pdr_Set_t * pCube )
     // collect CO objects
     Vec_IntClear( vCoObjs );
     if ( pCube == NULL ) // the target is the property output
-        Vec_IntPush( vCoObjs, Aig_ObjId(Aig_ManPo(p->pAig, (p->pPars->iOutput==-1)?0:p->pPars->iOutput)) ); 
+        Vec_IntPush( vCoObjs, Aig_ObjId(Aig_ManCo(p->pAig, (p->pPars->iOutput==-1)?0:p->pPars->iOutput)) ); 
     else // the target is the cube
     {
         for ( i = 0; i < pCube->nLits; i++ )
diff --git a/src/proof/pdr/pdrUtil.c b/src/proof/pdr/pdrUtil.c
index 97261a7f..9a2cffb2 100644
--- a/src/proof/pdr/pdrUtil.c
+++ b/src/proof/pdr/pdrUtil.c
@@ -613,7 +613,7 @@ int Pdr_NtkFindSatAssign_rec( Aig_Man_t * pAig, Aig_Obj_t * pNode, int Value, Pd
         return ((int)pNode->fMarkA == Value);
     Aig_ObjSetTravIdCurrent(pAig, pNode);
     pNode->fMarkA = Value;
-    if ( Aig_ObjIsPi(pNode) )
+    if ( Aig_ObjIsCi(pNode) )
     {
 //        if ( vSuppLits )
 //            Vec_IntPush( vSuppLits, Abc_Var2Lit( Aig_ObjPioNum(pNode), !Value ) );
diff --git a/src/proof/ssw/sswAig.c b/src/proof/ssw/sswAig.c
index 5cdced62..cd0f0c7a 100644
--- a/src/proof/ssw/sswAig.c
+++ b/src/proof/ssw/sswAig.c
@@ -148,7 +148,7 @@ Aig_Man_t * Ssw_FramesWithClasses( Ssw_Man_t * p )
     int i, f, iLits;
     assert( p->pFrames == NULL );
     assert( Aig_ManRegNum(p->pAig) > 0 );
-    assert( Aig_ManRegNum(p->pAig) < Aig_ManPiNum(p->pAig) );
+    assert( Aig_ManRegNum(p->pAig) < Aig_ManCiNum(p->pAig) );
     p->nConstrTotal = p->nConstrReduced = 0;
 
     // start the fraig package
@@ -216,7 +216,7 @@ Aig_Man_t * Ssw_SpeculativeReduction( Ssw_Man_t * p )
     int i;
     assert( p->pFrames == NULL );
     assert( Aig_ManRegNum(p->pAig) > 0 );
-    assert( Aig_ManRegNum(p->pAig) < Aig_ManPiNum(p->pAig) );
+    assert( Aig_ManRegNum(p->pAig) < Aig_ManCiNum(p->pAig) );
     p->nConstrTotal = p->nConstrReduced = 0;
  
     // start the fraig package
diff --git a/src/proof/ssw/sswBmc.c b/src/proof/ssw/sswBmc.c
index 0eabaa92..b2920177 100644
--- a/src/proof/ssw/sswBmc.c
+++ b/src/proof/ssw/sswBmc.c
@@ -51,7 +51,7 @@ Aig_Obj_t * Ssw_BmcUnroll_rec( Ssw_Frm_t * pFrm, Aig_Obj_t * pObj, int f )
         pRes = Aig_ManConst1( pFrm->pFrames );
     else if ( Saig_ObjIsPi(pFrm->pAig, pObj) )
         pRes = Aig_ObjCreateCi( pFrm->pFrames );
-    else if ( Aig_ObjIsPo(pObj) )
+    else if ( Aig_ObjIsCo(pObj) )
     {
         Ssw_BmcUnroll_rec( pFrm, Aig_ObjFanin0(pObj), f );
         pRes = Ssw_ObjChild0Fra_( pFrm, pObj, f );
diff --git a/src/proof/ssw/sswClass.c b/src/proof/ssw/sswClass.c
index 95f029d4..581b8aed 100644
--- a/src/proof/ssw/sswClass.c
+++ b/src/proof/ssw/sswClass.c
@@ -642,7 +642,7 @@ clk = clock();
         }
         else
         {
-            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
                 continue;
             // skip the node with more that the given number of levels
             if ( nMaxLevs && (int)pObj->Level > nMaxLevs )
diff --git a/src/proof/ssw/sswCnf.c b/src/proof/ssw/sswCnf.c
index 1970c62f..e3b422d5 100644
--- a/src/proof/ssw/sswCnf.c
+++ b/src/proof/ssw/sswCnf.c
@@ -276,7 +276,7 @@ void Ssw_AddClausesSuper( Ssw_Sat_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
 void Ssw_CollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int fUseMuxes )
 {
     // if the new node is complemented or a PI, another gate begins
-    if ( Aig_IsComplement(pObj) || Aig_ObjIsPi(pObj) || 
+    if ( Aig_IsComplement(pObj) || Aig_ObjIsCi(pObj) || 
          (!fFirst && Aig_ObjRefs(pObj) > 1) || 
          (fUseMuxes && Aig_ObjIsMuxType(pObj)) )
     {
@@ -303,7 +303,7 @@ void Ssw_CollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int
 void Ssw_CollectSuper( Aig_Obj_t * pObj, int fUseMuxes, Vec_Ptr_t * vSuper )
 {
     assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPi(pObj) );
+    assert( !Aig_ObjIsCi(pObj) );
     Vec_PtrClear( vSuper );
     Ssw_CollectSuper_rec( pObj, vSuper, 1, fUseMuxes );
 }
@@ -329,7 +329,7 @@ void Ssw_ObjAddToFrontier( Ssw_Sat_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vFrontie
         return;
 //    pObj->fMarkA = 1;
     // save PIs (used by register correspondence)
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         Vec_PtrPush( p->vUsedPis, pObj );
     Ssw_ObjSetSatNum( p, pObj, p->nSatVars++ );
     sat_solver_setnvars( p->pSat, 100 * (1 + p->nSatVars / 100) );
@@ -408,7 +408,7 @@ int Ssw_CnfGetNodeValue( Ssw_Sat_t * p, Aig_Obj_t * pObj )
         return sat_solver_var_value( p->pSat, nVarNum );
 //    if ( pObj->fMarkA == 1 )
 //        return 0;
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
         return 0;
     assert( Aig_ObjIsNode(pObj) );
     Value0 = Ssw_CnfGetNodeValue( p, Aig_ObjFanin0(pObj) );
diff --git a/src/proof/ssw/sswConstr.c b/src/proof/ssw/sswConstr.c
index 6d8a152d..82977edb 100644
--- a/src/proof/ssw/sswConstr.c
+++ b/src/proof/ssw/sswConstr.c
@@ -51,7 +51,7 @@ Aig_Man_t * Ssw_FramesWithConstraints( Aig_Man_t * p, int nFrames )
     int i, f;
     assert( Saig_ManConstrNum(p) > 0 );
     assert( Aig_ManRegNum(p) > 0 );
-    assert( Aig_ManRegNum(p) < Aig_ManPiNum(p) );
+    assert( Aig_ManRegNum(p) < Aig_ManCiNum(p) );
     // start the fraig package
     pFrames = Aig_ManStart( Aig_ManObjNumMax(p) * nFrames );
     // create latches for the first frame
@@ -165,7 +165,7 @@ int Ssw_ManSetConstrPhases_( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
     assert( p->nConstrs > 0 );
     // create CNF
     nRegs = p->nRegs; p->nRegs = 0;
-    pCnf = Cnf_Derive( p, Aig_ManPoNum(p) );  
+    pCnf = Cnf_Derive( p, Aig_ManCoNum(p) );  
     p->nRegs = nRegs;  
     // create SAT solver
     pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, nFrames, 0 );
@@ -626,18 +626,18 @@ clk = clock();
     // create timeframes
     p->pFrames = Ssw_FramesWithClasses( p );
     // add constants
-    nConstrPairs = Aig_ManPoNum(p->pFrames)-Aig_ManRegNum(p->pAig);
+    nConstrPairs = Aig_ManCoNum(p->pFrames)-Aig_ManRegNum(p->pAig);
     assert( (nConstrPairs & 1) == 0 );
     for ( i = 0; i < nConstrPairs; i += 2 )
     {
-        pObj  = Aig_ManPo( p->pFrames, i   );
-        pObj2 = Aig_ManPo( p->pFrames, i+1 );
+        pObj  = Aig_ManCo( p->pFrames, i   );
+        pObj2 = Aig_ManCo( p->pFrames, i+1 );
         Ssw_NodesAreConstrained( p, Aig_ObjChild0(pObj), Aig_ObjChild0(pObj2) );
     }
     // build logic cones for register inputs
     for ( i = 0; i < Aig_ManRegNum(p->pAig); i++ )
     {
-        pObj  = Aig_ManPo( p->pFrames, nConstrPairs + i );
+        pObj  = Aig_ManCo( p->pFrames, nConstrPairs + i );
         Ssw_CnfNodeAddToSolver( p->pMSat, Aig_ObjFanin0(pObj) );//
     }
 
diff --git a/src/proof/ssw/sswCore.c b/src/proof/ssw/sswCore.c
index df48a5b8..c51d421c 100644
--- a/src/proof/ssw/sswCore.c
+++ b/src/proof/ssw/sswCore.c
@@ -191,13 +191,13 @@ void Ssw_ManUpdateEquivs( Ssw_Man_t * p, Aig_Man_t * pAig, int fVerbose )
     Aig_Obj_t * pObj;
     int i, nTotal = 0, nRemoved = 0;
     // collect the nodes in the cone of constraints
-    pArray  = (Aig_Obj_t **)Vec_PtrArray(pAig->vPos);
+    pArray  = (Aig_Obj_t **)Vec_PtrArray(pAig->vCos);
     pArray += Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig);
     vCones  = Aig_ManDfsNodes( pAig, pArray, Saig_ManConstrNum(pAig) );
     // remove all the node that are equiv to something and are in the cones
     Aig_ManForEachObj( pAig, pObj, i )
     {
-        if ( !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
+        if ( !Aig_ObjIsCi(pObj) && !Aig_ObjIsNode(pObj) )
             continue;
         if ( pAig->pReprs[i] != NULL )
             nTotal++;
@@ -213,7 +213,7 @@ void Ssw_ManUpdateEquivs( Ssw_Man_t * p, Aig_Man_t * pAig, int fVerbose )
         }
     }
     // collect statistics    
-    p->nConesTotal   = Aig_ManPiNum(pAig) + Aig_ManNodeNum(pAig);
+    p->nConesTotal   = Aig_ManCiNum(pAig) + Aig_ManNodeNum(pAig);
     p->nConesConstr  = Vec_PtrSize(vCones);
     p->nEquivsTotal  = nTotal;
     p->nEquivsConstr = nRemoved;
@@ -341,7 +341,7 @@ clk = clock();
                     printf( "R =%4d. ",   p->nRecycles-nRecycles );
                 }
                 printf( "F =%5d. %s ", p->nSatFailsReal-nSatFailsReal, 
-                    (Saig_ManPoNum(p->pAig)==1 && Ssw_ObjIsConst1Cand(p->pAig,Aig_ObjFanin0(Aig_ManPo(p->pAig,0))))? "+" : "-" );
+                    (Saig_ManPoNum(p->pAig)==1 && Ssw_ObjIsConst1Cand(p->pAig,Aig_ObjFanin0(Aig_ManCo(p->pAig,0))))? "+" : "-" );
                 ABC_PRT( "T", clock() - clk );
             } 
 //            if ( p->pPars->fDynamic && p->nSatCallsSat-nSatCallsSat < 100 )
diff --git a/src/proof/ssw/sswDyn.c b/src/proof/ssw/sswDyn.c
index 0f6002fa..f20a7b78 100644
--- a/src/proof/ssw/sswDyn.c
+++ b/src/proof/ssw/sswDyn.c
@@ -54,7 +54,7 @@ void Ssw_ManLabelPiNodes( Ssw_Man_t * p )
         Saig_ManForEachPi( p->pAig, pObj, i )
         {
             pObjFrames = Ssw_ObjFrame( p, pObj, f );
-            assert( Aig_ObjIsPi(pObjFrames) );
+            assert( Aig_ObjIsCi(pObjFrames) );
             assert( pObjFrames->fMarkB == 0 );
             pObjFrames->fMarkA = 1;
             pObjFrames->fMarkB = 1;
@@ -79,7 +79,7 @@ void Ssw_ManCollectPis_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vNewPis )
     if ( pObj->fMarkA )
         return;
     pObj->fMarkA = 1;
-    if ( Aig_ObjIsPi(pObj) )
+    if ( Aig_ObjIsCi(pObj) )
     {
         Vec_PtrPush( vNewPis, pObj );
         return;
@@ -110,10 +110,10 @@ void Ssw_ManCollectPos_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t * vNewPos
     pObj->fMarkB = 1;
     if ( pObj->Id > p->nSRMiterMaxId )
         return;
-    if ( Aig_ObjIsPo(pObj) )
+    if ( Aig_ObjIsCo(pObj) )
     {
         // skip if it is a register input PO
-        if ( Aig_ObjPioNum(pObj) >= Aig_ManPoNum(p->pFrames)-Aig_ManRegNum(p->pAig) )
+        if ( Aig_ObjPioNum(pObj) >= Aig_ManCoNum(p->pFrames)-Aig_ManRegNum(p->pAig) )
             return;
         // add the number of this constraint
         Vec_IntPush( vNewPos, Aig_ObjPioNum(pObj)/2 );
@@ -180,8 +180,8 @@ void Ssw_ManLoadSolver( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj )
     // check if the corresponding pairs are added
     Vec_IntForEachEntry( p->vNewPos, iConstr, i )
     {
-        pObj0 = Aig_ManPo( p->pFrames, 2*iConstr   );
-        pObj1 = Aig_ManPo( p->pFrames, 2*iConstr+1 );
+        pObj0 = Aig_ManCo( p->pFrames, 2*iConstr   );
+        pObj1 = Aig_ManCo( p->pFrames, 2*iConstr+1 );
 //        if ( pObj0->fMarkB && pObj1->fMarkB )
         if ( pObj0->fMarkB || pObj1->fMarkB )
         {
@@ -224,7 +224,7 @@ void Ssw_ManSweepTransferDyn( Ssw_Man_t * p )
             continue;
         }
         assert( !Aig_IsComplement(pObjFraig) );
-        assert( Aig_ObjIsPi(pObjFraig) );
+        assert( Aig_ObjIsCi(pObjFraig) );
         pInfo = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjPioNum(pObjFraig) );
         Ssw_SmlObjSetWord( p->pSml, pObj, pInfo[0], 0, 0 );
     }
@@ -235,7 +235,7 @@ void Ssw_ManSweepTransferDyn( Ssw_Man_t * p )
         {
             pObjFraig = Ssw_ObjFrame( p, pObj, f );
             assert( !Aig_IsComplement(pObjFraig) );
-            assert( Aig_ObjIsPi(pObjFraig) );
+            assert( Aig_ObjIsCi(pObjFraig) );
             pInfo = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjPioNum(pObjFraig) );
             Ssw_SmlObjSetWord( p->pSml, pObj, pInfo[0], 0, f );
         }
@@ -393,7 +393,7 @@ p->timeReduce += clock() - clk;
 
     // prepare simulation info
     assert( p->vSimInfo == NULL );
-    p->vSimInfo = Vec_PtrAllocSimInfo( Aig_ManPiNum(p->pFrames), 1 );
+    p->vSimInfo = Vec_PtrAllocSimInfo( Aig_ManCiNum(p->pFrames), 1 );
     Vec_PtrCleanSimInfo( p->vSimInfo, 0, 1 );
 
     // sweep internal nodes
diff --git a/src/proof/ssw/sswFilter.c b/src/proof/ssw/sswFilter.c
index 536316ff..5f467123 100644
--- a/src/proof/ssw/sswFilter.c
+++ b/src/proof/ssw/sswFilter.c
@@ -162,7 +162,7 @@ void Ssw_ManFindStartingState( Ssw_Man_t * p, Abc_Cex_t * pCex )
     }
     assert( iBit == pCex->nBits );
     // check that the output failed as expected -- cannot check because it is not an SRM!
-//    pObj = Aig_ManPo( p->pAig, pCex->iPo );
+//    pObj = Aig_ManCo( p->pAig, pCex->iPo );
 //    if ( pObj->fMarkB != 1 )
 //        printf( "The counter-example does not refine the output.\n" );
     // record the new pattern
diff --git a/src/proof/ssw/sswIslands.c b/src/proof/ssw/sswIslands.c
index 3173ec6f..8f54432d 100644
--- a/src/proof/ssw/sswIslands.c
+++ b/src/proof/ssw/sswIslands.c
@@ -85,14 +85,14 @@ void Ssw_MatchingStart( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs )
     // make sure PIs are matched
     Saig_ManForEachPi( p0, pObj0, i )
     {
-        pObj1 = Aig_ManPi( p1, i );
+        pObj1 = Aig_ManCi( p1, i );
         assert( pObj0->pData == pObj1 );
         assert( pObj1->pData == pObj0 );
     }
     // make sure the POs are not matched
     Aig_ManForEachCo( p0, pObj0, i )
     {
-        pObj1 = Aig_ManPo( p1, i );
+        pObj1 = Aig_ManCo( p1, i );
         assert( pObj0->pData == NULL );
         assert( pObj1->pData == NULL );
     }
@@ -135,7 +135,7 @@ void Ssw_MatchingExtendOne( Aig_Man_t * p, Vec_Ptr_t * vNodes )
     Aig_ManIncrementTravId( p );
     Aig_ManForEachObj( p, pObj, i )
     {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
             continue;
         if ( pObj->pData != NULL )
             continue;
@@ -196,7 +196,7 @@ int Ssw_MatchingCountUnmached( Aig_Man_t * p )
     int i, Counter = 0;
     Aig_ManForEachObj( p, pObj, i )
     {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
+        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsCi(pObj) )
             continue;
         if ( pObj->pData != NULL )
             continue;
@@ -230,8 +230,8 @@ void Ssw_MatchingExtend( Aig_Man_t * p0, Aig_Man_t * p1, int nDist, int fVerbose
         int nUnmached = Ssw_MatchingCountUnmached(p0);
         printf( "Extending islands by %d steps:\n", nDist );
         printf( "%2d : Total = %6d. Unmatched = %6d.  Ratio = %6.2f %%\n",
-            0, Aig_ManPiNum(p0) + Aig_ManNodeNum(p0), 
-            nUnmached, 100.0 * nUnmached/(Aig_ManPiNum(p0) + Aig_ManNodeNum(p0)) );
+            0, Aig_ManCiNum(p0) + Aig_ManNodeNum(p0), 
+            nUnmached, 100.0 * nUnmached/(Aig_ManCiNum(p0) + Aig_ManNodeNum(p0)) );
     }
     for ( d = 0; d < nDist; d++ )
     {
@@ -263,8 +263,8 @@ void Ssw_MatchingExtend( Aig_Man_t * p0, Aig_Man_t * p1, int nDist, int fVerbose
         {
             int nUnmached = Ssw_MatchingCountUnmached(p0);
             printf( "%2d : Total = %6d. Unmatched = %6d.  Ratio = %6.2f %%\n",
-                d+1, Aig_ManPiNum(p0) + Aig_ManNodeNum(p0), 
-                nUnmached, 100.0 * nUnmached/(Aig_ManPiNum(p0) + Aig_ManNodeNum(p0)) );
+                d+1, Aig_ManCiNum(p0) + Aig_ManNodeNum(p0), 
+                nUnmached, 100.0 * nUnmached/(Aig_ManCiNum(p0) + Aig_ManNodeNum(p0)) );
         }
     }
     Vec_PtrFree( vNodes0 );
@@ -335,15 +335,15 @@ Vec_Int_t * Ssw_MatchingPairs( Aig_Man_t * p0, Aig_Man_t * p1 )
     Aig_Obj_t * pObj0, * pObj1;
     int i;
     // check correctness
-    assert( Aig_ManPiNum(p0) == Aig_ManPiNum(p1) );
-    assert( Aig_ManPoNum(p0) == Aig_ManPoNum(p1) );
+    assert( Aig_ManCiNum(p0) == Aig_ManCiNum(p1) );
+    assert( Aig_ManCoNum(p0) == Aig_ManCoNum(p1) );
     assert( Aig_ManRegNum(p0) == Aig_ManRegNum(p1) );
     assert( Aig_ManObjNum(p0) == Aig_ManObjNum(p1) );
     // create complete pairs
     vPairsNew = Vec_IntAlloc( 2*Aig_ManObjNum(p0) );
     Aig_ManForEachObj( p0, pObj0, i )
     {
-        if ( Aig_ObjIsPo(pObj0) )
+        if ( Aig_ObjIsCo(pObj0) )
             continue;
         pObj1 = (Aig_Obj_t *)pObj0->pData;
         Vec_IntPush( vPairsNew, pObj0->Id );
@@ -390,7 +390,7 @@ Vec_Int_t * Ssw_MatchingMiter( Aig_Man_t * pMiter, Aig_Man_t * p0, Aig_Man_t * p
         assert( !Aig_IsComplement(pObj0) );
         assert( !Aig_IsComplement(pObj1) );
         assert( Aig_ObjType(pObj0) == Aig_ObjType(pObj1) );
-        if ( Aig_ObjIsPo(pObj0) )
+        if ( Aig_ObjIsCo(pObj0) )
             continue;
         assert( Aig_ObjIsNode(pObj0) || Saig_ObjIsLo(pMiter, pObj0) );
         assert( Aig_ObjIsNode(pObj1) || Saig_ObjIsLo(pMiter, pObj1) );
@@ -519,7 +519,7 @@ Vec_Int_t * Saig_StrSimPerformMatching_hack( Aig_Man_t * p0, Aig_Man_t * p1 )
     vPairs = Vec_IntAlloc( 100 );
     Aig_ManForEachObj( p0, pObj, i )
     {
-        if ( !Aig_ObjIsConst1(pObj) && !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
+        if ( !Aig_ObjIsConst1(pObj) && !Aig_ObjIsCi(pObj) && !Aig_ObjIsNode(pObj) )
             continue;
         Vec_IntPush( vPairs, i );
         Vec_IntPush( vPairs, i );
diff --git a/src/proof/ssw/sswLcorr.c b/src/proof/ssw/sswLcorr.c
index c41a74ef..ec6087f0 100644
--- a/src/proof/ssw/sswLcorr.c
+++ b/src/proof/ssw/sswLcorr.c
@@ -58,7 +58,7 @@ void Ssw_ManSweepTransfer( Ssw_Man_t * p )
             continue;
         }
         assert( !Aig_IsComplement(pObjFraig) );
-        assert( Aig_ObjIsPi(pObjFraig) );
+        assert( Aig_ObjIsCi(pObjFraig) );
         pInfo = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjPioNum(pObjFraig) );
         Ssw_SmlObjSetWord( p->pSml, pObj, pInfo[0], 0, 0 );
     }
@@ -160,8 +160,8 @@ void Ssw_ManSweepLatchOne( Ssw_Man_t * p, Aig_Obj_t * pObjRepr, Aig_Obj_t * pObj
 {
     Aig_Obj_t * pObjFraig, * pObjReprFraig, * pObjLi;
     int RetValue, clk;
-    assert( Aig_ObjIsPi(pObj) );
-    assert( Aig_ObjIsPi(pObjRepr) || Aig_ObjIsConst1(pObjRepr) );
+    assert( Aig_ObjIsCi(pObj) );
+    assert( Aig_ObjIsCi(pObjRepr) || Aig_ObjIsConst1(pObjRepr) );
     // check if it makes sense to skip some calls
     if ( p->nCallsCount > 100 && p->nCallsUnsat < p->nCallsSat )
     {
@@ -175,7 +175,7 @@ clk = clock();
     Ssw_ManBuildCone_rec( p, Aig_ObjFanin0(pObjLi) );
     pObjFraig = Ssw_ObjChild0Fra( p, pObjLi, 0 );
     // get the fraiged representative
-    if ( Aig_ObjIsPi(pObjRepr) )
+    if ( Aig_ObjIsCi(pObjRepr) )
     {
         pObjLi = Saig_ObjLoToLi( p->pAig, pObjRepr ); 
         Ssw_ManBuildCone_rec( p, Aig_ObjFanin0(pObjLi) );
@@ -264,7 +264,7 @@ int Ssw_ManSweepLatch( Ssw_Man_t * p )
 
     // prepare simulation info
     assert( p->vSimInfo == NULL );
-    p->vSimInfo = Vec_PtrAllocSimInfo( Aig_ManPiNum(p->pFrames), 1 );
+    p->vSimInfo = Vec_PtrAllocSimInfo( Aig_ManCiNum(p->pFrames), 1 );
     Vec_PtrCleanSimInfo( p->vSimInfo, 0, 1 );
 
     // go through the registers
diff --git a/src/proof/ssw/sswPairs.c b/src/proof/ssw/sswPairs.c
index 0aba942f..e356aa60 100644
--- a/src/proof/ssw/sswPairs.c
+++ b/src/proof/ssw/sswPairs.c
@@ -64,7 +64,7 @@ int Ssw_MiterStatus( Aig_Man_t * p, int fVerbose )
             continue;
         }
         // check if the output is a primary input
-        if ( p->nRegs == 0 && Aig_ObjIsPi(Aig_Regular(pChild)) )
+        if ( p->nRegs == 0 && Aig_ObjIsCi(Aig_Regular(pChild)) )
         {
             CountNonConst0++;
             continue;
diff --git a/src/proof/ssw/sswPart.c b/src/proof/ssw/sswPart.c
index d2f07dc8..5a3aea10 100644
--- a/src/proof/ssw/sswPart.c
+++ b/src/proof/ssw/sswPart.c
@@ -90,7 +90,7 @@ Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
             pTemp = Aig_ManRegCreatePart( pAig, vPart, &nCountPis, &nCountRegs, NULL );
             Ioa_WriteAiger( pTemp, Buffer, 0, 0 );
             printf( "part%03d.aig : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d.\n", 
-                i, Vec_IntSize(vPart), Aig_ManPiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp) );
+                i, Vec_IntSize(vPart), Aig_ManCiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp) );
             Aig_ManStop( pTemp );
         }
     }
@@ -110,7 +110,7 @@ Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
             nClasses = Aig_TransferMappedClasses( pAig, pTemp, pMapBack );
             if ( fVerbose )
                 printf( "%3d : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d. It = %3d. Cl = %5d.\n", 
-                    i, Vec_IntSize(vPart), Aig_ManPiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp), pPars->nIters, nClasses );
+                    i, Vec_IntSize(vPart), Aig_ManCiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp), pPars->nIters, nClasses );
             Aig_ManStop( pNew );
         }
         Aig_ManStop( pTemp );
diff --git a/src/proof/ssw/sswRarity.c b/src/proof/ssw/sswRarity.c
index 6e36ae12..445dda84 100644
--- a/src/proof/ssw/sswRarity.c
+++ b/src/proof/ssw/sswRarity.c
@@ -831,7 +831,7 @@ static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex
     }
     assert( iBit == pCex->nBits );
     // check that the output failed as expected -- cannot check because it is not an SRM!
-//    pObj = Aig_ManPo( pAig, pCex->iPo );
+//    pObj = Aig_ManCo( pAig, pCex->iPo );
 //    if ( pObj->fMarkB != 1 )
 //        printf( "The counter-example does not refine the output.\n" );
     // record the new pattern
diff --git a/src/proof/ssw/sswRarity2.c b/src/proof/ssw/sswRarity2.c
index dce7ac3e..0851cf3d 100644
--- a/src/proof/ssw/sswRarity2.c
+++ b/src/proof/ssw/sswRarity2.c
@@ -282,7 +282,7 @@ static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex
     }
     assert( iBit == pCex->nBits );
     // check that the output failed as expected -- cannot check because it is not an SRM!
-//    pObj = Aig_ManPo( pAig, pCex->iPo );
+//    pObj = Aig_ManCo( pAig, pCex->iPo );
 //    if ( pObj->fMarkB != 1 )
 //        printf( "The counter-example does not refine the output.\n" );
     // record the new pattern
diff --git a/src/proof/ssw/sswSim.c b/src/proof/ssw/sswSim.c
index 946224cd..b53e8baf 100644
--- a/src/proof/ssw/sswSim.c
+++ b/src/proof/ssw/sswSim.c
@@ -457,13 +457,13 @@ int * Ssw_SmlCheckOutputSavePattern( Ssw_Sml_t * p, Aig_Obj_t * pObjPo )
     // determine the best pattern
     BestPat = i * 32 + k;
     // fill in the counter-example data
-    pModel = ABC_ALLOC( int, Aig_ManPiNum(p->pAig)+1 );
+    pModel = ABC_ALLOC( int, Aig_ManCiNum(p->pAig)+1 );
     Aig_ManForEachCi( p->pAig, pObjPi, i )
     {
         pModel[i] = Abc_InfoHasBit(Ssw_ObjSim(p, pObjPi->Id), BestPat);
 //        printf( "%d", pModel[i] );
     }
-    pModel[Aig_ManPiNum(p->pAig)] = pObjPo->Id;
+    pModel[Aig_ManCiNum(p->pAig)] = pObjPo->Id;
 //    printf( "\n" );
     return pModel;
 }
@@ -484,7 +484,7 @@ int * Ssw_SmlCheckOutput( Ssw_Sml_t * p )
     Aig_Obj_t * pObj;
     int i;
     // make sure the reference simulation pattern does not detect the bug
-    pObj = Aig_ManPo( p->pAig, 0 );
+    pObj = Aig_ManCo( p->pAig, 0 );
     assert( Aig_ObjFanin0(pObj)->fPhase == (unsigned)Aig_ObjFaninC0(pObj) ); 
     Aig_ManForEachCo( p->pAig, pObj, i )
     {
@@ -514,7 +514,7 @@ void Ssw_SmlAssignRandom( Ssw_Sml_t * p, Aig_Obj_t * pObj )
 {
     unsigned * pSims;
     int i, f;
-    assert( Aig_ObjIsPi(pObj) );
+    assert( Aig_ObjIsCi(pObj) );
     pSims = Ssw_ObjSim( p, pObj->Id );
     for ( i = 0; i < p->nWordsTotal; i++ )
         pSims[i] = Ssw_ObjRandomSim();
@@ -540,7 +540,7 @@ void Ssw_SmlAssignRandomFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
     unsigned * pSims;
     int i;
     assert( iFrame < p->nFrames );
-    assert( Aig_ObjIsPi(pObj) );
+    assert( Aig_ObjIsCi(pObj) );
     pSims = Ssw_ObjSim( p, pObj->Id ) + p->nWordsFrame * iFrame;
     for ( i = 0; i < p->nWordsFrame; i++ )
         pSims[i] = Ssw_ObjRandomSim();
@@ -562,7 +562,7 @@ void Ssw_SmlObjAssignConst( Ssw_Sml_t * p, Aig_Obj_t * pObj, int fConst1, int iF
     unsigned * pSims;
     int i;
     assert( iFrame < p->nFrames );
-    assert( Aig_ObjIsPi(pObj) );
+    assert( Aig_ObjIsCi(pObj) );
     pSims = Ssw_ObjSim( p, pObj->Id ) + p->nWordsFrame * iFrame;
     for ( i = 0; i < p->nWordsFrame; i++ )
         pSims[i] = fConst1? ~(unsigned)0 : 0;
@@ -584,7 +584,7 @@ void Ssw_SmlObjAssignConstWord( Ssw_Sml_t * p, Aig_Obj_t * pObj, int fConst1, in
     unsigned * pSims;
     assert( iFrame < p->nFrames );
     assert( iWord < p->nWordsFrame );
-    assert( Aig_ObjIsPi(pObj) );
+    assert( Aig_ObjIsCi(pObj) );
     pSims = Ssw_ObjSim( p, pObj->Id ) + p->nWordsFrame * iFrame;
     pSims[iWord] = fConst1? ~(unsigned)0 : 0;
 } 
@@ -604,7 +604,7 @@ void Ssw_SmlObjSetWord( Ssw_Sml_t * p, Aig_Obj_t * pObj, unsigned Word, int iWor
 {
     unsigned * pSims;
     assert( iFrame < p->nFrames );
-    assert( Aig_ObjIsPi(pObj) );
+    assert( Aig_ObjIsCi(pObj) );
     pSims = Ssw_ObjSim( p, pObj->Id ) + p->nWordsFrame * iFrame;
     pSims[iWord] = Word;
 } 
@@ -631,16 +631,16 @@ void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
         Aig_ManForEachCi( p->pAig, pObj, i )
             Ssw_SmlObjAssignConst( p, pObj, Abc_InfoHasBit(pPat, i), 0 );
         // flip one bit
-        Limit = Abc_MinInt( Aig_ManPiNum(p->pAig), p->nWordsTotal * 32 - 1 );
+        Limit = Abc_MinInt( Aig_ManCiNum(p->pAig), p->nWordsTotal * 32 - 1 );
         for ( i = 0; i < Limit; i++ )
-            Abc_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig,i)->Id ), i+1 );
+            Abc_InfoXorBit( Ssw_ObjSim( p, Aig_ManCi(p->pAig,i)->Id ), i+1 );
     }
     else
     {
         int fUseDist1 = 0;
 
         // copy the PI info for each frame
-        nTruePis = Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig);
+        nTruePis = Aig_ManCiNum(p->pAig) - Aig_ManRegNum(p->pAig);
         for ( f = 0; f < p->nFrames; f++ )
             Saig_ManForEachPi( p->pAig, pObj, i )
                 Ssw_SmlObjAssignConst( p, pObj, Abc_InfoHasBit(pPat, nTruePis * f + i), f );
@@ -648,14 +648,14 @@ void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
         k = 0;
         Saig_ManForEachLo( p->pAig, pObj, i )
             Ssw_SmlObjAssignConst( p, pObj, Abc_InfoHasBit(pPat, nTruePis * p->nFrames + k++), 0 );
-//        assert( p->pFrames == NULL || nTruePis * p->nFrames + k == Aig_ManPiNum(p->pFrames) );
+//        assert( p->pFrames == NULL || nTruePis * p->nFrames + k == Aig_ManCiNum(p->pFrames) );
 
         // flip one bit of the last frame
         if ( fUseDist1 ) //&& p->nFrames == 2 )
         {
             Limit = Abc_MinInt( nTruePis, p->nWordsFrame * 32 - 1 );
             for ( i = 0; i < Limit; i++ )
-                Abc_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ) + p->nWordsFrame*(p->nFrames-1), i+1 );
+                Abc_InfoXorBit( Ssw_ObjSim( p, Aig_ManCi(p->pAig, i)->Id ) + p->nWordsFrame*(p->nFrames-1), i+1 );
         }
     }
 }
@@ -684,7 +684,7 @@ void Ssw_SmlAssignDist1Plus( Ssw_Sml_t * p, unsigned * pPat )
     // set distance one PIs for the first frame
     Limit = Abc_MinInt( Saig_ManPiNum(p->pAig), p->nWordsFrame * 32 - 1 );
     for ( i = 0; i < Limit; i++ )
-        Abc_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ), i+1 );
+        Abc_InfoXorBit( Ssw_ObjSim( p, Aig_ManCi(p->pAig, i)->Id ), i+1 );
 
     // create random info for the remaining timeframes
     for ( f = 1; f < p->nFrames; f++ )
@@ -806,7 +806,7 @@ void Ssw_SmlNodeCopyFanin( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
     int fCompl, fCompl0, i;
     assert( iFrame < p->nFrames );
     assert( !Aig_IsComplement(pObj) );
-    assert( Aig_ObjIsPo(pObj) );
+    assert( Aig_ObjIsCo(pObj) );
     assert( iFrame == 0 || p->nWordsFrame < p->nWordsTotal );
     // get hold of the simulation information
     pSims  = Ssw_ObjSim(p, pObj->Id) + p->nWordsFrame * iFrame;
@@ -841,8 +841,8 @@ void Ssw_SmlNodeTransferNext( Ssw_Sml_t * p, Aig_Obj_t * pOut, Aig_Obj_t * pIn,
     assert( iFrame < p->nFrames );
     assert( !Aig_IsComplement(pOut) );
     assert( !Aig_IsComplement(pIn) );
-    assert( Aig_ObjIsPo(pOut) );
-    assert( Aig_ObjIsPi(pIn) );
+    assert( Aig_ObjIsCo(pOut) );
+    assert( Aig_ObjIsCi(pIn) );
     assert( iFrame == 0 || p->nWordsFrame < p->nWordsTotal );
     // get hold of the simulation information
     pSims0 = Ssw_ObjSim(p, pOut->Id) + p->nWordsFrame * iFrame;
@@ -869,8 +869,8 @@ void Ssw_SmlNodeTransferFirst( Ssw_Sml_t * p, Aig_Obj_t * pOut, Aig_Obj_t * pIn
     int i;
     assert( !Aig_IsComplement(pOut) );
     assert( !Aig_IsComplement(pIn) );
-    assert( Aig_ObjIsPo(pOut) );
-    assert( Aig_ObjIsPi(pIn) );
+    assert( Aig_ObjIsCo(pOut) );
+    assert( Aig_ObjIsCi(pIn) );
     assert( p->nWordsFrame < p->nWordsTotal );
     // get hold of the simulation information
     pSims0 = Ssw_ObjSim(p, pOut->Id) + p->nWordsFrame * (p->nFrames-1);
@@ -899,7 +899,7 @@ void Ssw_SmlInitialize( Ssw_Sml_t * p, int fInit )
     if ( fInit )
     {
         assert( Aig_ManRegNum(p->pAig) > 0 );
-        assert( Aig_ManRegNum(p->pAig) <= Aig_ManPiNum(p->pAig) );
+        assert( Aig_ManRegNum(p->pAig) <= Aig_ManCiNum(p->pAig) );
         // assign random info for primary inputs
         Saig_ManForEachPi( p->pAig, pObj, i )
             Ssw_SmlAssignRandom( p, pObj );
@@ -931,7 +931,7 @@ void Ssw_SmlInitializeSpecial( Ssw_Sml_t * p, Vec_Int_t * vInit )
     int Entry, i, nRegs;
     nRegs = Aig_ManRegNum(p->pAig);
     assert( nRegs > 0 );
-    assert( nRegs <= Aig_ManPiNum(p->pAig) );
+    assert( nRegs <= Aig_ManCiNum(p->pAig) );
     assert( Vec_IntSize(vInit) == nRegs * p->nWordsFrame );
     // assign random info for primary inputs
     Saig_ManForEachPi( p->pAig, pObj, i )
@@ -957,7 +957,7 @@ void Ssw_SmlReinitialize( Ssw_Sml_t * p )
     Aig_Obj_t * pObj, * pObjLi, * pObjLo;
     int i;
     assert( Aig_ManRegNum(p->pAig) > 0 );
-    assert( Aig_ManRegNum(p->pAig) < Aig_ManPiNum(p->pAig) );
+    assert( Aig_ManRegNum(p->pAig) < Aig_ManCiNum(p->pAig) );
     // assign random info for primary inputs
     Saig_ManForEachPi( p->pAig, pObj, i )
         Ssw_SmlAssignRandom( p, pObj );
@@ -1361,12 +1361,12 @@ Abc_Cex_t * Ssw_SmlGetCounterExample( Ssw_Sml_t * p )
             }
         break;
     }
-    assert( iPo < Aig_ManPoNum(p->pAig)-Aig_ManRegNum(p->pAig) );
+    assert( iPo < Aig_ManCoNum(p->pAig)-Aig_ManRegNum(p->pAig) );
     assert( iFrame < p->nFrames );
     assert( iBit < 32 * p->nWordsFrame );
 
     // allocate the counter example
-    pCex = Abc_CexAlloc( Aig_ManRegNum(p->pAig), Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig), iFrame + 1 );
+    pCex = Abc_CexAlloc( Aig_ManRegNum(p->pAig), Aig_ManCiNum(p->pAig) - Aig_ManRegNum(p->pAig), iFrame + 1 );
     pCex->iPo    = iPo;
     pCex->iFrame = iFrame;
 
diff --git a/src/proof/ssw/sswSweep.c b/src/proof/ssw/sswSweep.c
index a3a8d1c8..550cb4ce 100644
--- a/src/proof/ssw/sswSweep.c
+++ b/src/proof/ssw/sswSweep.c
@@ -48,7 +48,7 @@ int Ssw_ManGetSatVarValue( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
     int fUseNoBoundary = 0;
     Aig_Obj_t * pObjFraig;
     int Value;
-//    assert( Aig_ObjIsPi(pObj) );
+//    assert( Aig_ObjIsCi(pObj) );
     pObjFraig = Ssw_ObjFrame( p, pObj, f );
     if ( fUseNoBoundary )
     {
@@ -86,12 +86,12 @@ void Ssw_CheckConstraints( Ssw_Man_t * p )
     Aig_Obj_t * pObj, * pObj2;
     int nConstrPairs, i;
     int Counter = 0;
-    nConstrPairs = Aig_ManPoNum(p->pFrames)-Aig_ManRegNum(p->pAig);
+    nConstrPairs = Aig_ManCoNum(p->pFrames)-Aig_ManRegNum(p->pAig);
     assert( (nConstrPairs & 1) == 0 );
     for ( i = 0; i < nConstrPairs; i += 2 )
     {
-        pObj  = Aig_ManPo( p->pFrames, i   );
-        pObj2 = Aig_ManPo( p->pFrames, i+1 );
+        pObj  = Aig_ManCo( p->pFrames, i   );
+        pObj2 = Aig_ManCo( p->pFrames, i+1 );
         if ( Ssw_NodesAreEquiv( p, Aig_ObjFanin0(pObj), Aig_ObjFanin0(pObj2) ) != 1 )
         {
             Ssw_NodesAreConstrained( p, Aig_ObjChild0(pObj), Aig_ObjChild0(pObj2) );
@@ -162,7 +162,7 @@ void Ssw_SmlAddPatternDyn( Ssw_Man_t * p )
     // iterate through the PIs of the frames
     Vec_PtrForEachEntry( Aig_Obj_t *, p->pMSat->vUsedPis, pObj, i )
     {
-        assert( Aig_ObjIsPi(pObj) );
+        assert( Aig_ObjIsCi(pObj) );
         nVarNum = Ssw_ObjSatNum( p->pMSat, pObj );
         assert( nVarNum > 0 );
         if ( sat_solver_var_value( p->pMSat->pSat, nVarNum ) )
@@ -373,18 +373,18 @@ clk = clock();
     // create timeframes
     p->pFrames = Ssw_FramesWithClasses( p );
     // add constants
-    nConstrPairs = Aig_ManPoNum(p->pFrames)-Aig_ManRegNum(p->pAig);
+    nConstrPairs = Aig_ManCoNum(p->pFrames)-Aig_ManRegNum(p->pAig);
     assert( (nConstrPairs & 1) == 0 );
     for ( i = 0; i < nConstrPairs; i += 2 )
     {
-        pObj  = Aig_ManPo( p->pFrames, i   );
-        pObj2 = Aig_ManPo( p->pFrames, i+1 );
+        pObj  = Aig_ManCo( p->pFrames, i   );
+        pObj2 = Aig_ManCo( p->pFrames, i+1 );
         Ssw_NodesAreConstrained( p, Aig_ObjChild0(pObj), Aig_ObjChild0(pObj2) );
     }
     // build logic cones for register inputs
     for ( i = 0; i < Aig_ManRegNum(p->pAig); i++ )
     {
-        pObj  = Aig_ManPo( p->pFrames, nConstrPairs + i );
+        pObj  = Aig_ManCo( p->pFrames, nConstrPairs + i );
         Ssw_CnfNodeAddToSolver( p->pMSat, Aig_ObjFanin0(pObj) );//
     }
     sat_solver_simplify( p->pMSat->pSat );
diff --git a/src/proof/ssw/sswUnique.c b/src/proof/ssw/sswUnique.c
index b5f6a853..8e989531 100644
--- a/src/proof/ssw/sswUnique.c
+++ b/src/proof/ssw/sswUnique.c
@@ -105,7 +105,7 @@ int Ssw_ManUniqueOne( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj, int fV
     k = 0;
     Vec_PtrForEachEntry( Aig_Obj_t *, p->vCommon, pTemp, i )
     {
-        assert( Aig_ObjIsPi(pTemp) );
+        assert( Aig_ObjIsCi(pTemp) );
         if ( !Saig_ObjIsLo(p->pAig, pTemp) )
             continue;
         assert( Aig_ObjPioNum(pTemp) > 0 );
diff --git a/src/sat/cnf/cnfFast.c b/src/sat/cnf/cnfFast.c
index ea831844..492ddb61 100644
--- a/src/sat/cnf/cnfFast.c
+++ b/src/sat/cnf/cnfFast.c
@@ -367,12 +367,12 @@ void Cnf_DeriveFastMark( Aig_Man_t * p )
 //            if ( pObj0 == pObj1 )
 //                continue;
             nFans = 1 + (pObj0 == pObj1);
-            if ( !pObj0->fMarkB && !Aig_ObjIsPi(pObj0) && Aig_ObjRefs(pObj0) == nFans && Vec_IntEntry(vSupps, Aig_ObjId(pObj0)) < 3 )
+            if ( !pObj0->fMarkB && !Aig_ObjIsCi(pObj0) && Aig_ObjRefs(pObj0) == nFans && Vec_IntEntry(vSupps, Aig_ObjId(pObj0)) < 3 )
             {
                 pObj0->fMarkA = 0;
                 continue;
             }
-            if ( !pObj1->fMarkB && !Aig_ObjIsPi(pObj1) && Aig_ObjRefs(pObj1) == nFans && Vec_IntEntry(vSupps, Aig_ObjId(pObj1)) < 3 )
+            if ( !pObj1->fMarkB && !Aig_ObjIsCi(pObj1) && Aig_ObjRefs(pObj1) == nFans && Vec_IntEntry(vSupps, Aig_ObjId(pObj1)) < 3 )
             {
                 pObj1->fMarkA = 0;
                 continue;
@@ -388,7 +388,7 @@ void Cnf_DeriveFastMark( Aig_Man_t * p )
         {
             pTemp = Aig_Regular(pTemp);
             assert( pTemp->fMarkA );
-            if ( pTemp->fMarkB || Aig_ObjIsPi(pTemp) || Aig_ObjRefs(pTemp) > 1 )
+            if ( pTemp->fMarkB || Aig_ObjIsCi(pTemp) || Aig_ObjRefs(pTemp) > 1 )
                 continue;
             assert( Vec_IntEntry(vSupps, Aig_ObjId(pTemp)) > 0 );
             if ( Vec_PtrSize(vLeaves) - 1 + Vec_IntEntry(vSupps, Aig_ObjId(pTemp)) > 6 )
@@ -561,7 +561,7 @@ Cnf_Dat_t * Cnf_DeriveFastClauses( Aig_Man_t * p, int nOutputs )
     {
         if ( Aig_ManRegNum(p) == 0 )
         {
-            assert( nOutputs == Aig_ManPoNum(p) );
+            assert( nOutputs == Aig_ManCoNum(p) );
             Aig_ManForEachCo( p, pObj, i )
                 Vec_IntWriteEntry( vMap, Aig_ObjId(pObj), nVars++ );
         }
@@ -608,7 +608,7 @@ Cnf_Dat_t * Cnf_DeriveFastClauses( Aig_Man_t * p, int nOutputs )
     Aig_ManForEachCo( p, pObj, i )
     {
         DriLit = Cnf_ObjGetLit( vMap, Aig_ObjFanin0(pObj), Aig_ObjFaninC0(pObj) );
-        if ( i < Aig_ManPoNum(p) - nOutputs )
+        if ( i < Aig_ManCoNum(p) - nOutputs )
         {
             Vec_IntPush( vClas, Vec_IntSize(vLits) );
             Vec_IntPush( vLits, DriLit );
diff --git a/src/sat/cnf/cnfMan.c b/src/sat/cnf/cnfMan.c
index 1a28bd2a..a4081f86 100644
--- a/src/sat/cnf/cnfMan.c
+++ b/src/sat/cnf/cnfMan.c
@@ -106,7 +106,7 @@ Vec_Int_t * Cnf_DataCollectPiSatNums( Cnf_Dat_t * pCnf, Aig_Man_t * p )
     Vec_Int_t * vCiIds;
     Aig_Obj_t * pObj;
     int i;
-    vCiIds = Vec_IntAlloc( Aig_ManPiNum(p) );
+    vCiIds = Vec_IntAlloc( Aig_ManCiNum(p) );
     Aig_ManForEachCi( p, pObj, i )
         Vec_IntPush( vCiIds, pCnf->pVarNums[pObj->Id] );
     return vCiIds;
@@ -540,10 +540,10 @@ int Cnf_DataWriteOrClause( void * p, Cnf_Dat_t * pCnf )
     sat_solver * pSat = (sat_solver *)p;
     Aig_Obj_t * pObj;
     int i, * pLits;
-    pLits = ABC_ALLOC( int, Aig_ManPoNum(pCnf->pMan) );
+    pLits = ABC_ALLOC( int, Aig_ManCoNum(pCnf->pMan) );
     Aig_ManForEachCo( pCnf->pMan, pObj, i )
         pLits[i] = toLitCond( pCnf->pVarNums[pObj->Id], 0 );
-    if ( !sat_solver_addclause( pSat, pLits, pLits + Aig_ManPoNum(pCnf->pMan) ) )
+    if ( !sat_solver_addclause( pSat, pLits, pLits + Aig_ManCoNum(pCnf->pMan) ) )
     {
         ABC_FREE( pLits );
         return 0;
@@ -568,10 +568,10 @@ int Cnf_DataWriteOrClause2( void * p, Cnf_Dat_t * pCnf )
     sat_solver2 * pSat = (sat_solver2 *)p;
     Aig_Obj_t * pObj;
     int i, * pLits;
-    pLits = ABC_ALLOC( int, Aig_ManPoNum(pCnf->pMan) );
+    pLits = ABC_ALLOC( int, Aig_ManCoNum(pCnf->pMan) );
     Aig_ManForEachCo( pCnf->pMan, pObj, i )
         pLits[i] = toLitCond( pCnf->pVarNums[pObj->Id], 0 );
-    if ( !sat_solver2_addclause( pSat, pLits, pLits + Aig_ManPoNum(pCnf->pMan) ) )
+    if ( !sat_solver2_addclause( pSat, pLits, pLits + Aig_ManCoNum(pCnf->pMan) ) )
     {
         ABC_FREE( pLits );
         return 0;
@@ -625,7 +625,7 @@ void Cnf_DataTranformPolarity( Cnf_Dat_t * pCnf, int fTransformPos )
     pVarToPol = ABC_CALLOC( int, pCnf->nVars );
     Aig_ManForEachObj( pCnf->pMan, pObj, i )
     {
-        if ( !fTransformPos && Aig_ObjIsPo(pObj) )
+        if ( !fTransformPos && Aig_ObjIsCo(pObj) )
             continue;
         if ( pCnf->pVarNums[pObj->Id] >= 0 )
             pVarToPol[ pCnf->pVarNums[pObj->Id] ] = pObj->fPhase;
diff --git a/src/sat/cnf/cnfUtil.c b/src/sat/cnf/cnfUtil.c
index dd495d89..e3828863 100644
--- a/src/sat/cnf/cnfUtil.c
+++ b/src/sat/cnf/cnfUtil.c
@@ -47,7 +47,7 @@ int Aig_ManScanMapping_rec( Cnf_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vMapped
     Aig_Obj_t * pLeaf;
     Dar_Cut_t * pCutBest;
     int aArea, i;
-    if ( pObj->nRefs++ || Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
+    if ( pObj->nRefs++ || Aig_ObjIsCi(pObj) || Aig_ObjIsConst1(pObj) )
         return 0;
     assert( Aig_ObjIsAnd(pObj) );
     // collect the node first to derive pre-order
@@ -101,7 +101,7 @@ Vec_Ptr_t * Aig_ManScanMapping( Cnf_Man_t * p, int fCollect )
     p->aArea = 0;
     Aig_ManForEachCo( p->pManAig, pObj, i )
         p->aArea += Aig_ManScanMapping_rec( p, Aig_ObjFanin0(pObj), vMapped );
-//    printf( "Variables = %6d. Clauses = %8d.\n", vMapped? Vec_PtrSize(vMapped) + Aig_ManPiNum(p->pManAig) + 1 : 0, p->aArea + 2 );
+//    printf( "Variables = %6d. Clauses = %8d.\n", vMapped? Vec_PtrSize(vMapped) + Aig_ManCiNum(p->pManAig) + 1 : 0, p->aArea + 2 );
     return vMapped;
 }
 
@@ -121,7 +121,7 @@ int Cnf_ManScanMapping_rec( Cnf_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vMapped
     Aig_Obj_t * pLeaf;
     Cnf_Cut_t * pCutBest;
     int aArea, i;
-    if ( pObj->nRefs++ || Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
+    if ( pObj->nRefs++ || Aig_ObjIsCi(pObj) || Aig_ObjIsConst1(pObj) )
         return 0;
     assert( Aig_ObjIsAnd(pObj) );
     assert( pObj->pData != NULL );
@@ -181,7 +181,7 @@ Vec_Ptr_t * Cnf_ManScanMapping( Cnf_Man_t * p, int fCollect, int fPreorder )
     p->aArea = 0;
     Aig_ManForEachCo( p->pManAig, pObj, i )
         p->aArea += Cnf_ManScanMapping_rec( p, Aig_ObjFanin0(pObj), vMapped, fPreorder );
-//    printf( "Variables = %6d. Clauses = %8d.\n", vMapped? Vec_PtrSize(vMapped) + Aig_ManPiNum(p->pManAig) + 1 : 0, p->aArea + 2 );
+//    printf( "Variables = %6d. Clauses = %8d.\n", vMapped? Vec_PtrSize(vMapped) + Aig_ManCiNum(p->pManAig) + 1 : 0, p->aArea + 2 );
     return vMapped;
 }
 
@@ -201,7 +201,7 @@ Vec_Int_t * Cnf_DataCollectCiSatNums( Cnf_Dat_t * pCnf, Aig_Man_t * p )
     Vec_Int_t * vCiIds;
     Aig_Obj_t * pObj;
     int i;
-    vCiIds = Vec_IntAlloc( Aig_ManPiNum(p) );
+    vCiIds = Vec_IntAlloc( Aig_ManCiNum(p) );
     Aig_ManForEachCi( p, pObj, i )
         Vec_IntPush( vCiIds, pCnf->pVarNums[pObj->Id] );
     return vCiIds;
@@ -223,7 +223,7 @@ Vec_Int_t * Cnf_DataCollectCoSatNums( Cnf_Dat_t * pCnf, Aig_Man_t * p )
     Vec_Int_t * vCoIds;
     Aig_Obj_t * pObj;
     int i;
-    vCoIds = Vec_IntAlloc( Aig_ManPoNum(p) );
+    vCoIds = Vec_IntAlloc( Aig_ManCoNum(p) );
     Aig_ManForEachCo( p, pObj, i )
         Vec_IntPush( vCoIds, pCnf->pVarNums[pObj->Id] );
     return vCoIds;
diff --git a/src/sat/cnf/cnfWrite.c b/src/sat/cnf/cnfWrite.c
index 42809299..08407e39 100644
--- a/src/sat/cnf/cnfWrite.c
+++ b/src/sat/cnf/cnfWrite.c
@@ -208,8 +208,8 @@ Cnf_Dat_t * Cnf_ManWriteCnf( Cnf_Man_t * p, Vec_Ptr_t * vMapped, int nOutputs )
     int i, k, nLiterals, nClauses, Cube, Number;
 
     // count the number of literals and clauses
-    nLiterals = 1 + Aig_ManPoNum( p->pManAig ) + 3 * nOutputs;
-    nClauses = 1 + Aig_ManPoNum( p->pManAig ) + nOutputs;
+    nLiterals = 1 + Aig_ManCoNum( p->pManAig ) + 3 * nOutputs;
+    nClauses = 1 + Aig_ManCoNum( p->pManAig ) + nOutputs;
     Vec_PtrForEachEntry( Aig_Obj_t *, vMapped, pObj, i )
     {
         assert( Aig_ObjIsNode(pObj) );
@@ -241,7 +241,7 @@ Cnf_Dat_t * Cnf_ManWriteCnf( Cnf_Man_t * p, Vec_Ptr_t * vMapped, int nOutputs )
             nLiterals += Cnf_IsopCountLiterals( pCut->vIsop[0], pCut->nFanins ) + Vec_IntSize(pCut->vIsop[0]);
             nClauses += Vec_IntSize(pCut->vIsop[0]);
         }
-//printf( "%d ", nClauses-(1 + Aig_ManPoNum( p->pManAig )) );
+//printf( "%d ", nClauses-(1 + Aig_ManCoNum( p->pManAig )) );
     }
 //printf( "\n" );
 
@@ -267,7 +267,7 @@ Cnf_Dat_t * Cnf_ManWriteCnf( Cnf_Man_t * p, Vec_Ptr_t * vMapped, int nOutputs )
         {
             if ( Aig_ManRegNum(p->pManAig) == 0 )
             {
-                assert( nOutputs == Aig_ManPoNum(p->pManAig) );
+                assert( nOutputs == Aig_ManCoNum(p->pManAig) );
                 Aig_ManForEachCo( p->pManAig, pObj, i )
                     pCnf->pVarNums[pObj->Id] = Number++;
             }
@@ -296,7 +296,7 @@ Cnf_Dat_t * Cnf_ManWriteCnf( Cnf_Man_t * p, Vec_Ptr_t * vMapped, int nOutputs )
         {
             if ( Aig_ManRegNum(p->pManAig) == 0 )
             {
-                assert( nOutputs == Aig_ManPoNum(p->pManAig) );
+                assert( nOutputs == Aig_ManCoNum(p->pManAig) );
                 Aig_ManForEachCo( p->pManAig, pObj, i )
                     pCnf->pVarNums[pObj->Id] = Number--;
             }
@@ -377,7 +377,7 @@ Cnf_Dat_t * Cnf_ManWriteCnf( Cnf_Man_t * p, Vec_Ptr_t * vMapped, int nOutputs )
     Aig_ManForEachCo( p->pManAig, pObj, i )
     {
         OutVar = pCnf->pVarNums[ Aig_ObjFanin0(pObj)->Id ];
-        if ( i < Aig_ManPoNum(p->pManAig) - nOutputs )
+        if ( i < Aig_ManCoNum(p->pManAig) - nOutputs )
         {
             *pClas++ = pLits;
             *pLits++ = 2 * OutVar + Aig_ObjFaninC0(pObj); 
@@ -427,8 +427,8 @@ Cnf_Dat_t * Cnf_ManWriteCnfOther( Cnf_Man_t * p, Vec_Ptr_t * vMapped )
     int i, k, nLiterals, nClauses, Cube;
 
     // count the number of literals and clauses
-    nLiterals = 1 + 4 * Aig_ManPoNum( p->pManAig );
-    nClauses  = 1 + 2 * Aig_ManPoNum( p->pManAig );
+    nLiterals = 1 + 4 * Aig_ManCoNum( p->pManAig );
+    nClauses  = 1 + 2 * Aig_ManCoNum( p->pManAig );
     Vec_PtrForEachEntry( Aig_Obj_t *, vMapped, pObj, i )
     {
         assert( Aig_ObjIsNode(pObj) );
@@ -592,8 +592,8 @@ Cnf_Dat_t * Cnf_DeriveSimple( Aig_Man_t * p, int nOutputs )
     int i, nLiterals, nClauses, Number;
 
     // count the number of literals and clauses
-    nLiterals = 1 + 7 * Aig_ManNodeNum(p) + Aig_ManPoNum( p ) + 3 * nOutputs;
-    nClauses = 1 + 3 * Aig_ManNodeNum(p) + Aig_ManPoNum( p ) + nOutputs;
+    nLiterals = 1 + 7 * Aig_ManNodeNum(p) + Aig_ManCoNum( p ) + 3 * nOutputs;
+    nClauses = 1 + 3 * Aig_ManNodeNum(p) + Aig_ManCoNum( p ) + nOutputs;
 
     // allocate CNF
     pCnf = ABC_ALLOC( Cnf_Dat_t, 1 );
@@ -668,7 +668,7 @@ Cnf_Dat_t * Cnf_DeriveSimple( Aig_Man_t * p, int nOutputs )
     Aig_ManForEachCo( p, pObj, i )
     {
         OutVar = pCnf->pVarNums[ Aig_ObjFanin0(pObj)->Id ];
-        if ( i < Aig_ManPoNum(p) - nOutputs )
+        if ( i < Aig_ManCoNum(p) - nOutputs )
         {
             *pClas++ = pLits;
             *pLits++ = 2 * OutVar + Aig_ObjFaninC0(pObj); 
@@ -714,8 +714,8 @@ Cnf_Dat_t * Cnf_DeriveSimpleForRetiming( Aig_Man_t * p )
     int i, nLiterals, nClauses, Number;
 
     // count the number of literals and clauses
-    nLiterals = 1 + 7 * Aig_ManNodeNum(p) + 5 * Aig_ManPoNum(p);
-    nClauses = 1 + 3 * Aig_ManNodeNum(p) + 3 * Aig_ManPoNum(p);
+    nLiterals = 1 + 7 * Aig_ManNodeNum(p) + 5 * Aig_ManCoNum(p);
+    nClauses = 1 + 3 * Aig_ManNodeNum(p) + 3 * Aig_ManCoNum(p);
 
     // allocate CNF
     pCnf = ABC_ALLOC( Cnf_Dat_t, 1 );