From bc24ae901b74c5b673837d7f83423c1f7aa45c29 Mon Sep 17 00:00:00 2001 From: James McKenzie Date: Fri, 18 Apr 2025 12:37:26 +0100 Subject: fish --- .../08_uart_sdram/uart_sdram/doc/IS42S116160.pdf | Bin 0 -> 865246 bytes .../08_uart_sdram/uart_sdram/doc/ML0006 0012-2.pdf | Bin 0 -> 472487 bytes .../uart_sdram/doc/W9825G6DH-6-datasheet.pdf | Bin 0 -> 1768339 bytes .../08_uart_sdram/uart_sdram/doc/uart_sdram.vsdx | Bin 0 -> 845557 bytes .../08_uart_sdram/uart_sdram/matlab/tast_data.m | 7 + .../08_uart_sdram/uart_sdram/matlab/test_data.txt | 1 + .../uart_sdram/project/PLLJ_PLLSPE_INFO.txt | 5 + .../uart_sdram/project/ip_core/clk_gen/clk_gen.ppf | 13 + .../uart_sdram/project/ip_core/clk_gen/clk_gen.qip | 6 + .../uart_sdram/project/ip_core/clk_gen/clk_gen.v | 376 + .../project/ip_core/clk_gen/clk_gen_bb.v | 254 + .../project/ip_core/clk_gen/clk_gen_inst.v | 8 + .../ip_core/clk_gen/greybox_tmp/cbx_args.txt | 63 + .../project/ip_core/fifo_data/fifo_data.qip | 5 + .../project/ip_core/fifo_data/fifo_data.v | 179 + .../project/ip_core/fifo_data/fifo_data_bb.v | 137 + .../project/ip_core/fifo_data/fifo_data_inst.v | 11 + .../ip_core/fifo_data/greybox_tmp/cbx_args.txt | 23 + .../project/ip_core/fifo_read/fifo_read.qip | 5 + .../project/ip_core/fifo_read/fifo_read.v | 151 + .../project/ip_core/fifo_read/fifo_read_bb.v | 115 + .../project/ip_core/fifo_read/fifo_read_inst.v | 8 + .../ip_core/fifo_read/greybox_tmp/cbx_args.txt | 17 + .../ip_core/read_fifo/greybox_tmp/cbx_args.txt | 17 + .../project/ip_core/read_fifo/read_fifo.qip | 5 + .../project/ip_core/read_fifo/read_fifo.v | 151 + .../project/ip_core/read_fifo/read_fifo_bb.v | 115 + .../project/ip_core/read_fifo/read_fifo_inst.v | 8 + .../project/simulation/modelsim/uart_sdram.sft | 6 + .../project/simulation/modelsim/uart_sdram.vo | 24917 +++++++++++++++++++ .../modelsim/uart_sdram_8_1200mv_0c_slow.vo | 24917 +++++++++++++++++++ .../modelsim/uart_sdram_8_1200mv_0c_v_slow.sdo | 19618 +++++++++++++++ .../modelsim/uart_sdram_8_1200mv_85c_slow.vo | 24917 +++++++++++++++++++ .../modelsim/uart_sdram_8_1200mv_85c_v_slow.sdo | 19618 +++++++++++++++ .../modelsim/uart_sdram_min_1200mv_0c_fast.vo | 24917 +++++++++++++++++++ .../modelsim/uart_sdram_min_1200mv_0c_v_fast.sdo | 19618 +++++++++++++++ .../simulation/modelsim/uart_sdram_modelsim.xrf | 1341 + .../project/simulation/modelsim/uart_sdram_v.sdo | 19618 +++++++++++++++ .../uart_sdram/project/uart_sdram.qpf | 30 + .../uart_sdram/project/uart_sdram.qsf | 175 + .../uart_sdram/project/uart_sdram.qws | Bin 0 -> 1420 bytes .../08_uart_sdram/uart_sdram/rtl/fifo_read.v | 151 + .../08_uart_sdram/uart_sdram/rtl/sdram/fifo_ctrl.v | 188 + .../uart_sdram/rtl/sdram/sdram_a_ref.v | 208 + .../uart_sdram/rtl/sdram/sdram_arbit.v | 180 + .../uart_sdram/rtl/sdram/sdram_ctrl.v | 195 + .../uart_sdram/rtl/sdram/sdram_init.v | 229 + .../uart_sdram/rtl/sdram/sdram_read.v | 225 + .../08_uart_sdram/uart_sdram/rtl/sdram/sdram_top.v | 151 + .../uart_sdram/rtl/sdram/sdram_write.v | 221 + .../08_uart_sdram/uart_sdram/rtl/uart_rx.v | 154 + .../08_uart_sdram/uart_sdram/rtl/uart_sdram.v | 208 + .../08_uart_sdram/uart_sdram/rtl/uart_tx.v | 104 + .../uart_sdram/sim/sdram_model_plus.v | 1131 + .../sim/tb_sdram_a_ref/sdram_model_plus.v | 1131 + .../uart_sdram/sim/tb_sdram_a_ref/tb_sdram_a_ref.v | 153 + .../sim/tb_sdram_ctrl/sdram_model_plus.v | 1131 + .../uart_sdram/sim/tb_sdram_ctrl/tb_sdram_ctrl.v | 172 + .../sim/tb_sdram_init/sdram_model_plus.v | 1131 + .../uart_sdram/sim/tb_sdram_init/tb_sdram_init.v | 112 + .../sim/tb_sdram_read/sdram_model_plus.v | 1131 + .../uart_sdram/sim/tb_sdram_read/tb_sdram_read.v | 226 + .../uart_sdram/sim/tb_sdram_top/sdram_model_plus.v | 1131 + .../uart_sdram/sim/tb_sdram_top/tb_sdram_top.v | 231 + .../sim/tb_sdram_write/sdram_model_plus.v | 1131 + .../uart_sdram/sim/tb_sdram_write/tb_sdram_write.v | 178 + .../08_uart_sdram/uart_sdram/sim/tb_uart_sdram.v | 150 + .../08_uart_sdram/uart_sdram/sim/test_data.txt | 1 + ...56\236\351\252\214\347\216\260\350\261\241.txt" | 5 + 69 files changed, 192731 insertions(+) create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/IS42S116160.pdf create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/ML0006 0012-2.pdf create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/W9825G6DH-6-datasheet.pdf create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/uart_sdram.vsdx create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/matlab/tast_data.m create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/matlab/test_data.txt create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/PLLJ_PLLSPE_INFO.txt create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.ppf create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.qip create 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smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_write/tb_sdram_write.v create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_uart_sdram.v create mode 100644 smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/test_data.txt create mode 100644 "smh-ac415-fpga/examples/08_uart_sdram/\345\256\236\351\252\214\347\216\260\350\261\241.txt" (limited to 'smh-ac415-fpga/examples/08_uart_sdram') diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/IS42S116160.pdf b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/IS42S116160.pdf new file mode 100644 index 0000000..4cf210a Binary files /dev/null and b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/IS42S116160.pdf differ diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/ML0006 0012-2.pdf b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/ML0006 0012-2.pdf new file mode 100644 index 0000000..2a88800 Binary files /dev/null and b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/ML0006 0012-2.pdf differ diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/W9825G6DH-6-datasheet.pdf b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/W9825G6DH-6-datasheet.pdf new file mode 100644 index 0000000..dcc2dbd Binary files /dev/null and b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/W9825G6DH-6-datasheet.pdf differ diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/uart_sdram.vsdx b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/uart_sdram.vsdx new file mode 100644 index 0000000..42f175a Binary files /dev/null and b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/doc/uart_sdram.vsdx differ diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/matlab/tast_data.m b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/matlab/tast_data.m new file mode 100644 index 0000000..ee3a0d3 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/matlab/tast_data.m @@ -0,0 +1,7 @@ +fid=fopen('test_data.txt','w+'); +%for i =1:16 + for j = 1:100 + fprintf(fid,'%02x ',j); + end +%end +fclose(fid); diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/matlab/test_data.txt b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/matlab/test_data.txt new file mode 100644 index 0000000..f81cb6e --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/matlab/test_data.txt @@ -0,0 +1 @@ +01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 \ No newline at end of file diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/PLLJ_PLLSPE_INFO.txt b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/PLLJ_PLLSPE_INFO.txt new file mode 100644 index 0000000..790cae7 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/PLLJ_PLLSPE_INFO.txt @@ -0,0 +1,5 @@ +PLL_Name clk_gen:clk_gen_inst|altpll:altpll_component|clk_gen_altpll:auto_generated|pll1 +PLLJITTER 30 +PLLSPEmax 84 +PLLSPEmin -53 + diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.ppf b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.ppf new file mode 100644 index 0000000..4ef1af0 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.ppf @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.qip b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.qip new file mode 100644 index 0000000..433e305 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.qip @@ -0,0 +1,6 @@ +set_global_assignment -name IP_TOOL_NAME "ALTPLL" +set_global_assignment -name IP_TOOL_VERSION "13.0" +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "clk_gen.v"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "clk_gen_inst.v"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "clk_gen_bb.v"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "clk_gen.ppf"] diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.v new file mode 100644 index 0000000..7f4e3ca --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.v @@ -0,0 +1,376 @@ +// megafunction wizard: %ALTPLL% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: altpll + +// ============================================================ +// File Name: clk_gen.v +// Megafunction Name(s): +// altpll +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 13.0.0 Build 156 04/24/2013 SJ Full Version +// ************************************************************ + + +//Copyright (C) 1991-2013 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module clk_gen ( + areset, + inclk0, + c0, + c1, + c2, + locked); + + input areset; + input inclk0; + output c0; + output c1; + output c2; + output locked; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_off +`endif + tri0 areset; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_on +`endif + + wire [4:0] sub_wire0; + wire sub_wire2; + wire [0:0] sub_wire7 = 1'h0; + wire [2:2] sub_wire4 = sub_wire0[2:2]; + wire [0:0] sub_wire3 = sub_wire0[0:0]; + wire [1:1] sub_wire1 = sub_wire0[1:1]; + wire c1 = sub_wire1; + wire locked = sub_wire2; + wire c0 = sub_wire3; + wire c2 = sub_wire4; + wire sub_wire5 = inclk0; + wire [1:0] sub_wire6 = {sub_wire7, sub_wire5}; + + altpll altpll_component ( + .areset (areset), + .inclk (sub_wire6), + .clk (sub_wire0), + .locked (sub_wire2), + .activeclock (), + .clkbad (), + .clkena ({6{1'b1}}), + .clkloss (), + .clkswitch (1'b0), + .configupdate (1'b0), + .enable0 (), + .enable1 (), + .extclk (), + .extclkena ({4{1'b1}}), + .fbin (1'b1), + .fbmimicbidir (), + .fbout (), + .fref (), + .icdrclk (), + .pfdena (1'b1), + .phasecounterselect ({4{1'b1}}), + .phasedone (), + .phasestep (1'b1), + .phaseupdown (1'b1), + .pllena (1'b1), + .scanaclr (1'b0), + .scanclk (1'b0), + .scanclkena (1'b1), + .scandata (1'b0), + .scandataout (), + .scandone (), + .scanread (1'b0), + .scanwrite (1'b0), + .sclkout0 (), + .sclkout1 (), + .vcooverrange (), + .vcounderrange ()); + defparam + altpll_component.bandwidth_type = "AUTO", + altpll_component.clk0_divide_by = 1, + altpll_component.clk0_duty_cycle = 50, + altpll_component.clk0_multiply_by = 1, + altpll_component.clk0_phase_shift = "0", + altpll_component.clk1_divide_by = 1, + altpll_component.clk1_duty_cycle = 50, + altpll_component.clk1_multiply_by = 2, + altpll_component.clk1_phase_shift = "0", + altpll_component.clk2_divide_by = 1, + altpll_component.clk2_duty_cycle = 50, + altpll_component.clk2_multiply_by = 2, + altpll_component.clk2_phase_shift = "-833", + altpll_component.compensate_clock = "CLK0", + altpll_component.inclk0_input_frequency = 20000, + altpll_component.intended_device_family = "Cyclone IV E", + altpll_component.lpm_hint = "CBX_MODULE_PREFIX=clk_gen", + altpll_component.lpm_type = "altpll", + altpll_component.operation_mode = "NORMAL", + altpll_component.pll_type = "AUTO", + altpll_component.port_activeclock = "PORT_UNUSED", + altpll_component.port_areset = "PORT_USED", + altpll_component.port_clkbad0 = "PORT_UNUSED", + altpll_component.port_clkbad1 = "PORT_UNUSED", + altpll_component.port_clkloss = "PORT_UNUSED", + altpll_component.port_clkswitch = "PORT_UNUSED", + altpll_component.port_configupdate = "PORT_UNUSED", + altpll_component.port_fbin = "PORT_UNUSED", + altpll_component.port_inclk0 = "PORT_USED", + altpll_component.port_inclk1 = "PORT_UNUSED", + altpll_component.port_locked = "PORT_USED", + altpll_component.port_pfdena = "PORT_UNUSED", + altpll_component.port_phasecounterselect = "PORT_UNUSED", + altpll_component.port_phasedone = "PORT_UNUSED", + altpll_component.port_phasestep = "PORT_UNUSED", + altpll_component.port_phaseupdown = "PORT_UNUSED", + altpll_component.port_pllena = "PORT_UNUSED", + altpll_component.port_scanaclr = "PORT_UNUSED", + altpll_component.port_scanclk = "PORT_UNUSED", + altpll_component.port_scanclkena = "PORT_UNUSED", + altpll_component.port_scandata = "PORT_UNUSED", + altpll_component.port_scandataout = "PORT_UNUSED", + altpll_component.port_scandone = "PORT_UNUSED", + altpll_component.port_scanread = "PORT_UNUSED", + altpll_component.port_scanwrite = "PORT_UNUSED", + altpll_component.port_clk0 = "PORT_USED", + altpll_component.port_clk1 = "PORT_USED", + altpll_component.port_clk2 = "PORT_USED", + altpll_component.port_clk3 = "PORT_UNUSED", + altpll_component.port_clk4 = "PORT_UNUSED", + altpll_component.port_clk5 = "PORT_UNUSED", + altpll_component.port_clkena0 = "PORT_UNUSED", + altpll_component.port_clkena1 = "PORT_UNUSED", + altpll_component.port_clkena2 = "PORT_UNUSED", + altpll_component.port_clkena3 = "PORT_UNUSED", + altpll_component.port_clkena4 = "PORT_UNUSED", + altpll_component.port_clkena5 = "PORT_UNUSED", + altpll_component.port_extclk0 = "PORT_UNUSED", + altpll_component.port_extclk1 = "PORT_UNUSED", + altpll_component.port_extclk2 = "PORT_UNUSED", + altpll_component.port_extclk3 = "PORT_UNUSED", + altpll_component.self_reset_on_loss_lock = "OFF", + altpll_component.width_clock = 5; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" +// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1" +// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" +// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" +// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" +// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" +// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" +// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0" +// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" +// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" +// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" +// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" +// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0" +// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" +// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1" +// Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "1" +// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" +// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000" +// Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "50.000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "100.000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "100.000000" +// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0" +// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" +// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" +// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" +// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" +// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000" +// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1" +// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "ps" +// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" +// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" +// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0" +// Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0" +// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1" +// Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "2" +// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "50.00000000" +// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.00000000" +// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "100.00000000" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz" +// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1" +// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "-30.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg" +// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "1" +// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" +// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" +// Retrieval info: PRIVATE: RECONFIG_FILE STRING "clk_gen.mif" +// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" +// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1" +// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0" +// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" +// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" +// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" +// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" +// Retrieval info: PRIVATE: SPREAD_USE STRING "0" +// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" +// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" +// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1" +// Retrieval info: PRIVATE: STICKY_CLK2 STRING "1" +// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" +// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: USE_CLK0 STRING "1" +// Retrieval info: PRIVATE: USE_CLK1 STRING "1" +// Retrieval info: PRIVATE: USE_CLK2 STRING "1" +// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA2 STRING "0" +// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" +// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO" +// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1" +// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" +// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "2" +// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0" +// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "2" +// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "-833" +// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" +// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" +// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" +// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO" +// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING "OFF" +// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5" +// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]" +// Retrieval info: USED_PORT: areset 0 0 0 0 INPUT GND "areset" +// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" +// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1" +// Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2" +// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" +// Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked" +// Retrieval info: CONNECT: @areset 0 0 0 0 areset 0 0 0 0 +// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 +// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 +// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 +// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1 +// Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2 +// Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen.ppf TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen_inst.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen_bb.v TRUE +// Retrieval info: LIB_FILE: altera_mf +// Retrieval info: CBX_MODULE_PREFIX: ON diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen_bb.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen_bb.v new file mode 100644 index 0000000..9101d97 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen_bb.v @@ -0,0 +1,254 @@ +// megafunction wizard: %ALTPLL%VBB% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: altpll + +// ============================================================ +// File Name: clk_gen.v +// Megafunction Name(s): +// altpll +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 13.0.0 Build 156 04/24/2013 SJ Full Version +// ************************************************************ + +//Copyright (C) 1991-2013 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + +module clk_gen ( + areset, + inclk0, + c0, + c1, + c2, + locked); + + input areset; + input inclk0; + output c0; + output c1; + output c2; + output locked; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_off +`endif + tri0 areset; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_on +`endif + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" +// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1" +// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" +// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" +// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" +// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" +// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" +// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0" +// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" +// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" +// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" +// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" +// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0" +// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" +// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1" +// Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "1" +// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" +// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000" +// Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "50.000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "100.000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "100.000000" +// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0" +// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" +// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" +// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" +// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" +// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000" +// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1" +// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "ps" +// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" +// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" +// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0" +// Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0" +// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1" +// Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "2" +// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "50.00000000" +// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.00000000" +// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "100.00000000" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz" +// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1" +// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "-30.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg" +// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "1" +// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" +// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" +// Retrieval info: PRIVATE: RECONFIG_FILE STRING "clk_gen.mif" +// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" +// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1" +// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0" +// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" +// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" +// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" +// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" +// Retrieval info: PRIVATE: SPREAD_USE STRING "0" +// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" +// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" +// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1" +// Retrieval info: PRIVATE: STICKY_CLK2 STRING "1" +// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" +// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: USE_CLK0 STRING "1" +// Retrieval info: PRIVATE: USE_CLK1 STRING "1" +// Retrieval info: PRIVATE: USE_CLK2 STRING "1" +// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA2 STRING "0" +// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" +// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO" +// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1" +// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" +// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "2" +// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0" +// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "2" +// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "-833" +// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" +// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" +// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" +// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO" +// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING "OFF" +// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5" +// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]" +// Retrieval info: USED_PORT: areset 0 0 0 0 INPUT GND "areset" +// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" +// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1" +// Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2" +// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" +// Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked" +// Retrieval info: CONNECT: @areset 0 0 0 0 areset 0 0 0 0 +// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 +// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 +// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 +// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1 +// Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2 +// Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen.ppf TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen_inst.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_gen_bb.v TRUE +// Retrieval info: LIB_FILE: altera_mf +// Retrieval info: CBX_MODULE_PREFIX: ON diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen_inst.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen_inst.v new file mode 100644 index 0000000..ee1b2f9 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen_inst.v @@ -0,0 +1,8 @@ +clk_gen clk_gen_inst ( + .areset ( areset_sig ), + .inclk0 ( inclk0_sig ), + .c0 ( c0_sig ), + .c1 ( c1_sig ), + .c2 ( c2_sig ), + .locked ( locked_sig ) + ); diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/greybox_tmp/cbx_args.txt b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/greybox_tmp/cbx_args.txt new file mode 100644 index 0000000..687e8e2 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/greybox_tmp/cbx_args.txt @@ -0,0 +1,63 @@ +BANDWIDTH_TYPE=AUTO +CLK0_DIVIDE_BY=50 +CLK0_DUTY_CYCLE=50 +CLK0_MULTIPLY_BY=9 +CLK0_PHASE_SHIFT=0 +CLK1_DIVIDE_BY=1 +CLK1_DUTY_CYCLE=50 +CLK1_MULTIPLY_BY=2 +CLK1_PHASE_SHIFT=0 +COMPENSATE_CLOCK=CLK0 +INCLK0_INPUT_FREQUENCY=20000 +INTENDED_DEVICE_FAMILY="Cyclone IV E" +LPM_TYPE=altpll +OPERATION_MODE=NORMAL +PLL_TYPE=AUTO +PORT_ACTIVECLOCK=PORT_UNUSED +PORT_ARESET=PORT_UNUSED +PORT_CLKBAD0=PORT_UNUSED +PORT_CLKBAD1=PORT_UNUSED +PORT_CLKLOSS=PORT_UNUSED +PORT_CLKSWITCH=PORT_UNUSED +PORT_CONFIGUPDATE=PORT_UNUSED +PORT_FBIN=PORT_UNUSED +PORT_INCLK0=PORT_USED +PORT_INCLK1=PORT_UNUSED +PORT_LOCKED=PORT_UNUSED +PORT_PFDENA=PORT_UNUSED +PORT_PHASECOUNTERSELECT=PORT_UNUSED +PORT_PHASEDONE=PORT_UNUSED +PORT_PHASESTEP=PORT_UNUSED +PORT_PHASEUPDOWN=PORT_UNUSED +PORT_PLLENA=PORT_UNUSED +PORT_SCANACLR=PORT_UNUSED +PORT_SCANCLK=PORT_UNUSED +PORT_SCANCLKENA=PORT_UNUSED +PORT_SCANDATA=PORT_UNUSED +PORT_SCANDATAOUT=PORT_UNUSED +PORT_SCANDONE=PORT_UNUSED +PORT_SCANREAD=PORT_UNUSED +PORT_SCANWRITE=PORT_UNUSED +PORT_clk0=PORT_USED +PORT_clk1=PORT_USED +PORT_clk2=PORT_UNUSED +PORT_clk3=PORT_UNUSED +PORT_clk4=PORT_UNUSED +PORT_clk5=PORT_UNUSED +PORT_clkena0=PORT_UNUSED +PORT_clkena1=PORT_UNUSED +PORT_clkena2=PORT_UNUSED +PORT_clkena3=PORT_UNUSED +PORT_clkena4=PORT_UNUSED +PORT_clkena5=PORT_UNUSED +PORT_extclk0=PORT_UNUSED +PORT_extclk1=PORT_UNUSED +PORT_extclk2=PORT_UNUSED +PORT_extclk3=PORT_UNUSED +WIDTH_CLOCK=5 +DEVICE_FAMILY="Cyclone IV E" +CBX_AUTO_BLACKBOX=ALL +inclk +inclk +clk +clk diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data.qip b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data.qip new file mode 100644 index 0000000..fffcf83 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data.qip @@ -0,0 +1,5 @@ +set_global_assignment -name IP_TOOL_NAME "FIFO" +set_global_assignment -name IP_TOOL_VERSION "13.0" +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "fifo_data.v"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "fifo_data_inst.v"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "fifo_data_bb.v"] diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data.v new file mode 100644 index 0000000..7031dc3 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data.v @@ -0,0 +1,179 @@ +// megafunction wizard: %FIFO% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: dcfifo + +// ============================================================ +// File Name: fifo_data.v +// Megafunction Name(s): +// dcfifo +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 13.0.0 Build 156 04/24/2013 SJ Full Version +// ************************************************************ + + +//Copyright (C) 1991-2013 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module fifo_data ( + aclr, + data, + rdclk, + rdreq, + wrclk, + wrreq, + q, + rdusedw, + wrusedw); + + input aclr; + input [15:0] data; + input rdclk; + input rdreq; + input wrclk; + input wrreq; + output [15:0] q; + output [9:0] rdusedw; + output [9:0] wrusedw; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_off +`endif + tri0 aclr; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_on +`endif + + wire [15:0] sub_wire0; + wire [9:0] sub_wire1; + wire [9:0] sub_wire2; + wire [15:0] q = sub_wire0[15:0]; + wire [9:0] wrusedw = sub_wire1[9:0]; + wire [9:0] rdusedw = sub_wire2[9:0]; + + dcfifo dcfifo_component ( + .rdclk (rdclk), + .wrclk (wrclk), + .wrreq (wrreq), + .aclr (aclr), + .data (data), + .rdreq (rdreq), + .q (sub_wire0), + .wrusedw (sub_wire1), + .rdusedw (sub_wire2), + .rdempty (), + .rdfull (), + .wrempty (), + .wrfull ()); + defparam + dcfifo_component.intended_device_family = "Cyclone IV E", + dcfifo_component.lpm_numwords = 1024, + dcfifo_component.lpm_showahead = "OFF", + dcfifo_component.lpm_type = "dcfifo", + dcfifo_component.lpm_width = 16, + dcfifo_component.lpm_widthu = 10, + dcfifo_component.overflow_checking = "ON", + dcfifo_component.rdsync_delaypipe = 3, + dcfifo_component.read_aclr_synch = "OFF", + dcfifo_component.underflow_checking = "ON", + dcfifo_component.use_eab = "ON", + dcfifo_component.write_aclr_synch = "OFF", + dcfifo_component.wrsync_delaypipe = 3; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" +// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" +// Retrieval info: PRIVATE: AlmostFull NUMERIC "0" +// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" +// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "1" +// Retrieval info: PRIVATE: Clock NUMERIC "4" +// Retrieval info: PRIVATE: Depth NUMERIC "1024" +// Retrieval info: PRIVATE: Empty NUMERIC "1" +// Retrieval info: PRIVATE: Full NUMERIC "1" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" +// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1" +// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" +// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: Optimize NUMERIC "2" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: UsedW NUMERIC "1" +// Retrieval info: PRIVATE: Width NUMERIC "16" +// Retrieval info: PRIVATE: dc_aclr NUMERIC "1" +// Retrieval info: PRIVATE: diff_widths NUMERIC "0" +// Retrieval info: PRIVATE: msb_usedw NUMERIC "0" +// Retrieval info: PRIVATE: output_width NUMERIC "16" +// Retrieval info: PRIVATE: rsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: rsFull NUMERIC "0" +// Retrieval info: PRIVATE: rsUsedW NUMERIC "1" +// Retrieval info: PRIVATE: sc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: sc_sclr NUMERIC "0" +// Retrieval info: PRIVATE: wsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: wsFull NUMERIC "0" +// Retrieval info: PRIVATE: wsUsedW NUMERIC "1" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "1024" +// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF" +// Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16" +// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "10" +// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: RDSYNC_DELAYPIPE NUMERIC "3" +// Retrieval info: CONSTANT: READ_ACLR_SYNCH STRING "OFF" +// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: USE_EAB STRING "ON" +// Retrieval info: CONSTANT: WRITE_ACLR_SYNCH STRING "OFF" +// Retrieval info: CONSTANT: WRSYNC_DELAYPIPE NUMERIC "3" +// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND "aclr" +// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL "data[15..0]" +// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL "q[15..0]" +// Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL "rdclk" +// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq" +// Retrieval info: USED_PORT: rdusedw 0 0 10 0 OUTPUT NODEFVAL "rdusedw[9..0]" +// Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL "wrclk" +// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq" +// Retrieval info: USED_PORT: wrusedw 0 0 10 0 OUTPUT NODEFVAL "wrusedw[9..0]" +// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0 +// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0 +// Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0 +// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 +// Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0 +// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 +// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0 +// Retrieval info: CONNECT: rdusedw 0 0 10 0 @rdusedw 0 0 10 0 +// Retrieval info: CONNECT: wrusedw 0 0 10 0 @wrusedw 0 0 10 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data_inst.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data_bb.v TRUE +// Retrieval info: LIB_FILE: altera_mf diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data_bb.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data_bb.v new file mode 100644 index 0000000..771b984 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data_bb.v @@ -0,0 +1,137 @@ +// megafunction wizard: %FIFO%VBB% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: dcfifo + +// ============================================================ +// File Name: fifo_data.v +// Megafunction Name(s): +// dcfifo +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 13.0.0 Build 156 04/24/2013 SJ Full Version +// ************************************************************ + +//Copyright (C) 1991-2013 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + +module fifo_data ( + aclr, + data, + rdclk, + rdreq, + wrclk, + wrreq, + q, + rdusedw, + wrusedw); + + input aclr; + input [15:0] data; + input rdclk; + input rdreq; + input wrclk; + input wrreq; + output [15:0] q; + output [9:0] rdusedw; + output [9:0] wrusedw; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_off +`endif + tri0 aclr; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_on +`endif + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" +// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" +// Retrieval info: PRIVATE: AlmostFull NUMERIC "0" +// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" +// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "1" +// Retrieval info: PRIVATE: Clock NUMERIC "4" +// Retrieval info: PRIVATE: Depth NUMERIC "1024" +// Retrieval info: PRIVATE: Empty NUMERIC "1" +// Retrieval info: PRIVATE: Full NUMERIC "1" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" +// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1" +// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" +// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: Optimize NUMERIC "2" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: UsedW NUMERIC "1" +// Retrieval info: PRIVATE: Width NUMERIC "16" +// Retrieval info: PRIVATE: dc_aclr NUMERIC "1" +// Retrieval info: PRIVATE: diff_widths NUMERIC "0" +// Retrieval info: PRIVATE: msb_usedw NUMERIC "0" +// Retrieval info: PRIVATE: output_width NUMERIC "16" +// Retrieval info: PRIVATE: rsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: rsFull NUMERIC "0" +// Retrieval info: PRIVATE: rsUsedW NUMERIC "1" +// Retrieval info: PRIVATE: sc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: sc_sclr NUMERIC "0" +// Retrieval info: PRIVATE: wsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: wsFull NUMERIC "0" +// Retrieval info: PRIVATE: wsUsedW NUMERIC "1" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "1024" +// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF" +// Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16" +// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "10" +// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: RDSYNC_DELAYPIPE NUMERIC "3" +// Retrieval info: CONSTANT: READ_ACLR_SYNCH STRING "OFF" +// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: USE_EAB STRING "ON" +// Retrieval info: CONSTANT: WRITE_ACLR_SYNCH STRING "OFF" +// Retrieval info: CONSTANT: WRSYNC_DELAYPIPE NUMERIC "3" +// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND "aclr" +// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL "data[15..0]" +// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL "q[15..0]" +// Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL "rdclk" +// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq" +// Retrieval info: USED_PORT: rdusedw 0 0 10 0 OUTPUT NODEFVAL "rdusedw[9..0]" +// Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL "wrclk" +// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq" +// Retrieval info: USED_PORT: wrusedw 0 0 10 0 OUTPUT NODEFVAL "wrusedw[9..0]" +// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0 +// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0 +// Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0 +// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 +// Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0 +// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 +// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0 +// Retrieval info: CONNECT: rdusedw 0 0 10 0 @rdusedw 0 0 10 0 +// Retrieval info: CONNECT: wrusedw 0 0 10 0 @wrusedw 0 0 10 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data_inst.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_data_bb.v TRUE +// Retrieval info: LIB_FILE: altera_mf diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data_inst.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data_inst.v new file mode 100644 index 0000000..20d52aa --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data_inst.v @@ -0,0 +1,11 @@ +fifo_data fifo_data_inst ( + .aclr ( aclr_sig ), + .data ( data_sig ), + .rdclk ( rdclk_sig ), + .rdreq ( rdreq_sig ), + .wrclk ( wrclk_sig ), + .wrreq ( wrreq_sig ), + .q ( q_sig ), + .rdusedw ( rdusedw_sig ), + .wrusedw ( wrusedw_sig ) + ); diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/greybox_tmp/cbx_args.txt b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/greybox_tmp/cbx_args.txt new file mode 100644 index 0000000..a65cfa1 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/greybox_tmp/cbx_args.txt @@ -0,0 +1,23 @@ +INTENDED_DEVICE_FAMILY="Cyclone IV E" +LPM_NUMWORDS=1024 +LPM_SHOWAHEAD=OFF +LPM_TYPE=dcfifo +LPM_WIDTH=16 +LPM_WIDTHU=10 +OVERFLOW_CHECKING=ON +RDSYNC_DELAYPIPE=3 +READ_ACLR_SYNCH=OFF +UNDERFLOW_CHECKING=ON +USE_EAB=ON +WRITE_ACLR_SYNCH=OFF +WRSYNC_DELAYPIPE=3 +DEVICE_FAMILY="Cyclone IV E" +aclr +data +rdclk +rdreq +wrclk +wrreq +q +rdusedw +wrusedw diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read.qip b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read.qip new file mode 100644 index 0000000..aaada86 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read.qip @@ -0,0 +1,5 @@ +set_global_assignment -name IP_TOOL_NAME "FIFO" +set_global_assignment -name IP_TOOL_VERSION "13.0" +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "fifo_read.v"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "fifo_read_inst.v"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "fifo_read_bb.v"] diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read.v new file mode 100644 index 0000000..af4ca89 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read.v @@ -0,0 +1,151 @@ +// megafunction wizard: %FIFO% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: scfifo + +// ============================================================ +// File Name: fifo_read.v +// Megafunction Name(s): +// scfifo +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 13.0.0 Build 156 04/24/2013 SJ Full Version +// ************************************************************ + + +//Copyright (C) 1991-2013 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module fifo_read ( + clock, + data, + rdreq, + wrreq, + q, + usedw); + + input clock; + input [7:0] data; + input rdreq; + input wrreq; + output [7:0] q; + output [9:0] usedw; + + wire [9:0] sub_wire0; + wire [7:0] sub_wire1; + wire [9:0] usedw = sub_wire0[9:0]; + wire [7:0] q = sub_wire1[7:0]; + + scfifo scfifo_component ( + .clock (clock), + .data (data), + .rdreq (rdreq), + .wrreq (wrreq), + .usedw (sub_wire0), + .q (sub_wire1), + .aclr (), + .almost_empty (), + .almost_full (), + .empty (), + .full (), + .sclr ()); + defparam + scfifo_component.add_ram_output_register = "OFF", + scfifo_component.intended_device_family = "Cyclone IV E", + scfifo_component.lpm_numwords = 1024, + scfifo_component.lpm_showahead = "OFF", + scfifo_component.lpm_type = "scfifo", + scfifo_component.lpm_width = 8, + scfifo_component.lpm_widthu = 10, + scfifo_component.overflow_checking = "ON", + scfifo_component.underflow_checking = "ON", + scfifo_component.use_eab = "ON"; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" +// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" +// Retrieval info: PRIVATE: AlmostFull NUMERIC "0" +// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" +// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0" +// Retrieval info: PRIVATE: Clock NUMERIC "0" +// Retrieval info: PRIVATE: Depth NUMERIC "1024" +// Retrieval info: PRIVATE: Empty NUMERIC "0" +// Retrieval info: PRIVATE: Full NUMERIC "0" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" +// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1" +// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" +// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: Optimize NUMERIC "0" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: UsedW NUMERIC "1" +// Retrieval info: PRIVATE: Width NUMERIC "8" +// Retrieval info: PRIVATE: dc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: diff_widths NUMERIC "0" +// Retrieval info: PRIVATE: msb_usedw NUMERIC "0" +// Retrieval info: PRIVATE: output_width NUMERIC "8" +// Retrieval info: PRIVATE: rsEmpty NUMERIC "1" +// Retrieval info: PRIVATE: rsFull NUMERIC "0" +// Retrieval info: PRIVATE: rsUsedW NUMERIC "0" +// Retrieval info: PRIVATE: sc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: sc_sclr NUMERIC "0" +// Retrieval info: PRIVATE: wsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: wsFull NUMERIC "1" +// Retrieval info: PRIVATE: wsUsedW NUMERIC "0" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "1024" +// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF" +// Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "8" +// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "10" +// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: USE_EAB STRING "ON" +// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock" +// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL "data[7..0]" +// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]" +// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq" +// Retrieval info: USED_PORT: usedw 0 0 10 0 OUTPUT NODEFVAL "usedw[9..0]" +// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq" +// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0 +// Retrieval info: CONNECT: @data 0 0 8 0 data 0 0 8 0 +// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 +// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 +// Retrieval info: CONNECT: q 0 0 8 0 @q 0 0 8 0 +// Retrieval info: CONNECT: usedw 0 0 10 0 @usedw 0 0 10 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read_inst.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read_bb.v TRUE +// Retrieval info: LIB_FILE: altera_mf diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read_bb.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read_bb.v new file mode 100644 index 0000000..878b924 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read_bb.v @@ -0,0 +1,115 @@ +// megafunction wizard: %FIFO%VBB% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: scfifo + +// ============================================================ +// File Name: fifo_read.v +// Megafunction Name(s): +// scfifo +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 13.0.0 Build 156 04/24/2013 SJ Full Version +// ************************************************************ + +//Copyright (C) 1991-2013 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + +module fifo_read ( + clock, + data, + rdreq, + wrreq, + q, + usedw); + + input clock; + input [7:0] data; + input rdreq; + input wrreq; + output [7:0] q; + output [9:0] usedw; + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" +// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" +// Retrieval info: PRIVATE: AlmostFull NUMERIC "0" +// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" +// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0" +// Retrieval info: PRIVATE: Clock NUMERIC "0" +// Retrieval info: PRIVATE: Depth NUMERIC "1024" +// Retrieval info: PRIVATE: Empty NUMERIC "0" +// Retrieval info: PRIVATE: Full NUMERIC "0" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" +// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1" +// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" +// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: Optimize NUMERIC "0" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: UsedW NUMERIC "1" +// Retrieval info: PRIVATE: Width NUMERIC "8" +// Retrieval info: PRIVATE: dc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: diff_widths NUMERIC "0" +// Retrieval info: PRIVATE: msb_usedw NUMERIC "0" +// Retrieval info: PRIVATE: output_width NUMERIC "8" +// Retrieval info: PRIVATE: rsEmpty NUMERIC "1" +// Retrieval info: PRIVATE: rsFull NUMERIC "0" +// Retrieval info: PRIVATE: rsUsedW NUMERIC "0" +// Retrieval info: PRIVATE: sc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: sc_sclr NUMERIC "0" +// Retrieval info: PRIVATE: wsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: wsFull NUMERIC "1" +// Retrieval info: PRIVATE: wsUsedW NUMERIC "0" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "1024" +// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF" +// Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "8" +// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "10" +// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: USE_EAB STRING "ON" +// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock" +// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL "data[7..0]" +// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]" +// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq" +// Retrieval info: USED_PORT: usedw 0 0 10 0 OUTPUT NODEFVAL "usedw[9..0]" +// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq" +// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0 +// Retrieval info: CONNECT: @data 0 0 8 0 data 0 0 8 0 +// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 +// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 +// Retrieval info: CONNECT: q 0 0 8 0 @q 0 0 8 0 +// Retrieval info: CONNECT: usedw 0 0 10 0 @usedw 0 0 10 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read_inst.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_read_bb.v TRUE +// Retrieval info: LIB_FILE: altera_mf diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read_inst.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read_inst.v new file mode 100644 index 0000000..108f8fa --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/fifo_read_inst.v @@ -0,0 +1,8 @@ +fifo_read fifo_read_inst ( + .clock ( clock_sig ), + .data ( data_sig ), + .rdreq ( rdreq_sig ), + .wrreq ( wrreq_sig ), + .q ( q_sig ), + .usedw ( usedw_sig ) + ); diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/greybox_tmp/cbx_args.txt b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/greybox_tmp/cbx_args.txt new file mode 100644 index 0000000..6491690 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/fifo_read/greybox_tmp/cbx_args.txt @@ -0,0 +1,17 @@ +ADD_RAM_OUTPUT_REGISTER=OFF +INTENDED_DEVICE_FAMILY="Cyclone IV E" +LPM_NUMWORDS=1024 +LPM_SHOWAHEAD=OFF +LPM_TYPE=scfifo +LPM_WIDTH=8 +LPM_WIDTHU=10 +OVERFLOW_CHECKING=ON +UNDERFLOW_CHECKING=ON +USE_EAB=ON +DEVICE_FAMILY="Cyclone IV E" +clock +data +rdreq +wrreq +q +usedw diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/greybox_tmp/cbx_args.txt b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/greybox_tmp/cbx_args.txt new file mode 100644 index 0000000..6491690 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/greybox_tmp/cbx_args.txt @@ -0,0 +1,17 @@ +ADD_RAM_OUTPUT_REGISTER=OFF +INTENDED_DEVICE_FAMILY="Cyclone IV E" +LPM_NUMWORDS=1024 +LPM_SHOWAHEAD=OFF +LPM_TYPE=scfifo +LPM_WIDTH=8 +LPM_WIDTHU=10 +OVERFLOW_CHECKING=ON +UNDERFLOW_CHECKING=ON +USE_EAB=ON +DEVICE_FAMILY="Cyclone IV E" +clock +data +rdreq +wrreq +q +usedw diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo.qip b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo.qip new file mode 100644 index 0000000..5c08e23 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo.qip @@ -0,0 +1,5 @@ +set_global_assignment -name IP_TOOL_NAME "FIFO" +set_global_assignment -name IP_TOOL_VERSION "13.0" +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "read_fifo.v"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "read_fifo_inst.v"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "read_fifo_bb.v"] diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo.v new file mode 100644 index 0000000..c0f7b23 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo.v @@ -0,0 +1,151 @@ +// megafunction wizard: %FIFO% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: scfifo + +// ============================================================ +// File Name: read_fifo.v +// Megafunction Name(s): +// scfifo +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 13.0.0 Build 156 04/24/2013 SJ Full Version +// ************************************************************ + + +//Copyright (C) 1991-2013 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module read_fifo ( + clock, + data, + rdreq, + wrreq, + q, + usedw); + + input clock; + input [7:0] data; + input rdreq; + input wrreq; + output [7:0] q; + output [9:0] usedw; + + wire [9:0] sub_wire0; + wire [7:0] sub_wire1; + wire [9:0] usedw = sub_wire0[9:0]; + wire [7:0] q = sub_wire1[7:0]; + + scfifo scfifo_component ( + .clock (clock), + .data (data), + .rdreq (rdreq), + .wrreq (wrreq), + .usedw (sub_wire0), + .q (sub_wire1), + .aclr (), + .almost_empty (), + .almost_full (), + .empty (), + .full (), + .sclr ()); + defparam + scfifo_component.add_ram_output_register = "OFF", + scfifo_component.intended_device_family = "Cyclone IV E", + scfifo_component.lpm_numwords = 1024, + scfifo_component.lpm_showahead = "OFF", + scfifo_component.lpm_type = "scfifo", + scfifo_component.lpm_width = 8, + scfifo_component.lpm_widthu = 10, + scfifo_component.overflow_checking = "ON", + scfifo_component.underflow_checking = "ON", + scfifo_component.use_eab = "ON"; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" +// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" +// Retrieval info: PRIVATE: AlmostFull NUMERIC "0" +// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" +// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "1" +// Retrieval info: PRIVATE: Clock NUMERIC "0" +// Retrieval info: PRIVATE: Depth NUMERIC "1024" +// Retrieval info: PRIVATE: Empty NUMERIC "0" +// Retrieval info: PRIVATE: Full NUMERIC "0" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" +// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1" +// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" +// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: Optimize NUMERIC "0" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: UsedW NUMERIC "1" +// Retrieval info: PRIVATE: Width NUMERIC "8" +// Retrieval info: PRIVATE: dc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: diff_widths NUMERIC "0" +// Retrieval info: PRIVATE: msb_usedw NUMERIC "0" +// Retrieval info: PRIVATE: output_width NUMERIC "8" +// Retrieval info: PRIVATE: rsEmpty NUMERIC "1" +// Retrieval info: PRIVATE: rsFull NUMERIC "0" +// Retrieval info: PRIVATE: rsUsedW NUMERIC "0" +// Retrieval info: PRIVATE: sc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: sc_sclr NUMERIC "0" +// Retrieval info: PRIVATE: wsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: wsFull NUMERIC "1" +// Retrieval info: PRIVATE: wsUsedW NUMERIC "0" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "1024" +// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF" +// Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "8" +// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "10" +// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: USE_EAB STRING "ON" +// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock" +// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL "data[7..0]" +// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]" +// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq" +// Retrieval info: USED_PORT: usedw 0 0 10 0 OUTPUT NODEFVAL "usedw[9..0]" +// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq" +// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0 +// Retrieval info: CONNECT: @data 0 0 8 0 data 0 0 8 0 +// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 +// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 +// Retrieval info: CONNECT: q 0 0 8 0 @q 0 0 8 0 +// Retrieval info: CONNECT: usedw 0 0 10 0 @usedw 0 0 10 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo_inst.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo_bb.v TRUE +// Retrieval info: LIB_FILE: altera_mf diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo_bb.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo_bb.v new file mode 100644 index 0000000..ebea1f2 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo_bb.v @@ -0,0 +1,115 @@ +// megafunction wizard: %FIFO%VBB% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: scfifo + +// ============================================================ +// File Name: read_fifo.v +// Megafunction Name(s): +// scfifo +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 13.0.0 Build 156 04/24/2013 SJ Full Version +// ************************************************************ + +//Copyright (C) 1991-2013 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + +module read_fifo ( + clock, + data, + rdreq, + wrreq, + q, + usedw); + + input clock; + input [7:0] data; + input rdreq; + input wrreq; + output [7:0] q; + output [9:0] usedw; + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" +// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" +// Retrieval info: PRIVATE: AlmostFull NUMERIC "0" +// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" +// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "1" +// Retrieval info: PRIVATE: Clock NUMERIC "0" +// Retrieval info: PRIVATE: Depth NUMERIC "1024" +// Retrieval info: PRIVATE: Empty NUMERIC "0" +// Retrieval info: PRIVATE: Full NUMERIC "0" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" +// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1" +// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" +// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: Optimize NUMERIC "0" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0" +// Retrieval info: PRIVATE: UsedW NUMERIC "1" +// Retrieval info: PRIVATE: Width NUMERIC "8" +// Retrieval info: PRIVATE: dc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: diff_widths NUMERIC "0" +// Retrieval info: PRIVATE: msb_usedw NUMERIC "0" +// Retrieval info: PRIVATE: output_width NUMERIC "8" +// Retrieval info: PRIVATE: rsEmpty NUMERIC "1" +// Retrieval info: PRIVATE: rsFull NUMERIC "0" +// Retrieval info: PRIVATE: rsUsedW NUMERIC "0" +// Retrieval info: PRIVATE: sc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: sc_sclr NUMERIC "0" +// Retrieval info: PRIVATE: wsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: wsFull NUMERIC "1" +// Retrieval info: PRIVATE: wsUsedW NUMERIC "0" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "1024" +// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF" +// Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "8" +// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "10" +// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON" +// Retrieval info: CONSTANT: USE_EAB STRING "ON" +// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock" +// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL "data[7..0]" +// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]" +// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq" +// Retrieval info: USED_PORT: usedw 0 0 10 0 OUTPUT NODEFVAL "usedw[9..0]" +// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq" +// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0 +// Retrieval info: CONNECT: @data 0 0 8 0 data 0 0 8 0 +// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 +// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 +// Retrieval info: CONNECT: q 0 0 8 0 @q 0 0 8 0 +// Retrieval info: CONNECT: usedw 0 0 10 0 @usedw 0 0 10 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo_inst.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL read_fifo_bb.v TRUE +// Retrieval info: LIB_FILE: altera_mf diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo_inst.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo_inst.v new file mode 100644 index 0000000..58e24fa --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo_inst.v @@ -0,0 +1,8 @@ +read_fifo read_fifo_inst ( + .clock ( clock_sig ), + .data ( data_sig ), + .rdreq ( rdreq_sig ), + .wrreq ( wrreq_sig ), + .q ( q_sig ), + .usedw ( usedw_sig ) + ); diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram.sft b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram.sft new file mode 100644 index 0000000..5b18e2c --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram.sft @@ -0,0 +1,6 @@ +set tool_name "ModelSim (Verilog)" +set corner_file_list { + {{"Slow -8 1.2V 85 Model"} {uart_sdram_8_1200mv_85c_slow.vo uart_sdram_8_1200mv_85c_v_slow.sdo}} + {{"Slow -8 1.2V 0 Model"} {uart_sdram_8_1200mv_0c_slow.vo uart_sdram_8_1200mv_0c_v_slow.sdo}} + {{"Fast -M 1.2V 0 Model"} {uart_sdram_min_1200mv_0c_fast.vo uart_sdram_min_1200mv_0c_v_fast.sdo}} +} diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram.vo b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram.vo new file mode 100644 index 0000000..43c9473 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram.vo @@ -0,0 +1,24917 @@ +// Copyright (C) 1991-2013 Altera Corporation +// Your use of Altera Corporation's design tools, logic functions +// and other software and tools, and its AMPP partner logic +// functions, and any output files from any of the foregoing +// (including device programming or simulation files), and any +// associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License +// Subscription Agreement, Altera MegaCore Function License +// Agreement, or other applicable license agreement, including, +// without limitation, that your use is for the sole purpose of +// programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the +// applicable agreement for further details. + +// VENDOR "Altera" +// PROGRAM "Quartus II 64-Bit" +// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version" + +// DATE "06/02/2023 04:26:31" + +// +// Device: Altera EP4CE15F23C8 Package FBGA484 +// + +// +// This Verilog file should be used for ModelSim (Verilog) only +// + +`timescale 1 ps/ 1 ps + +module uart_sdram ( + sys_clk, + sys_rst_n, + rx, + tx, + sdram_clk, + sdram_cke, + sdram_cs_n, + sdram_cas_n, + sdram_ras_n, + sdram_we_n, + sdram_ba, + sdram_addr, + sdram_dqm, + sdram_dq); +input sys_clk; +input sys_rst_n; +input rx; +output tx; +output sdram_clk; +output sdram_cke; +output sdram_cs_n; +output sdram_cas_n; +output sdram_ras_n; +output sdram_we_n; +output [1:0] sdram_ba; +output [12:0] sdram_addr; +output [1:0] sdram_dqm; +inout [15:0] sdram_dq; + +// Design Ports Information +// tx => Location: PIN_U1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_clk => Location: PIN_E5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cke => Location: PIN_M1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cs_n => Location: PIN_A4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cas_n => Location: PIN_B5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ras_n => Location: PIN_D6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_we_n => Location: PIN_A5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ba[0] => Location: PIN_B4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ba[1] => Location: PIN_C4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[0] => Location: PIN_B3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[1] => Location: PIN_B1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[2] => Location: PIN_B2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[3] => Location: PIN_C1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[4] => Location: PIN_C2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[5] => Location: PIN_E1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[6] => Location: PIN_F1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[7] => Location: PIN_F2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[8] => Location: PIN_H1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[9] => Location: PIN_N2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[10] => Location: PIN_A3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[11] => Location: PIN_N1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[12] => Location: PIN_M2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dqm[0] => Location: PIN_C6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dqm[1] => Location: PIN_J2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[0] => Location: PIN_B7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[1] => Location: PIN_A7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[2] => Location: PIN_C8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[3] => Location: PIN_B8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[4] => Location: PIN_A8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[5] => Location: PIN_C7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[6] => Location: PIN_A6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[7] => Location: PIN_B6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[8] => Location: PIN_J1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[9] => Location: PIN_C3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[10] => Location: PIN_D2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[11] => Location: PIN_E3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[12] => Location: PIN_G4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[13] => Location: PIN_H2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[14] => Location: PIN_J3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[15] => Location: PIN_J4, I/O Standard: 2.5 V, Current Strength: Default +// sys_clk => Location: PIN_T22, I/O Standard: 2.5 V, Current Strength: Default +// sys_rst_n => Location: PIN_U20, I/O Standard: 2.5 V, Current Strength: Default +// rx => Location: PIN_V1, I/O Standard: 2.5 V, Current Strength: Default + + +wire gnd; +wire vcc; +wire unknown; + +assign gnd = 1'b0; +assign vcc = 1'b1; +assign unknown = 1'bx; + +tri1 devclrn; +tri1 devpor; +tri1 devoe; +// synopsys translate_off +initial $sdf_annotate("uart_sdram_v.sdo"); +// synopsys translate_on + +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ; +wire \uart_tx_inst|baud_cnt[3]~19_combout ; +wire \uart_tx_inst|baud_cnt[4]~21_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ; +wire \fifo_read_inst|Add2~4_combout ; +wire \Add1~1 ; +wire \Add1~0_combout ; +wire \Add1~3 ; +wire \Add1~2_combout ; +wire \Add1~5 ; +wire \Add1~4_combout ; +wire \Add1~7 ; +wire \Add1~6_combout ; +wire \Add1~9 ; +wire \Add1~8_combout ; +wire \Add1~11 ; +wire \Add1~10_combout ; +wire \Add1~13 ; +wire \Add1~12_combout ; +wire \Add1~15 ; +wire \Add1~14_combout ; +wire \Add1~17 ; +wire \Add1~16_combout ; +wire \Add1~19 ; +wire \Add1~18_combout ; +wire \Add1~21 ; +wire \Add1~20_combout ; +wire \Add1~23 ; +wire \Add1~22_combout ; +wire \Add1~25 ; +wire \Add1~24_combout ; +wire \Add1~27 ; +wire \Add1~26_combout ; +wire \Add1~29 ; +wire \Add1~28_combout ; +wire \Add1~30_combout ; +wire \fifo_read_inst|baud_cnt[1]~15_combout ; +wire \fifo_read_inst|baud_cnt[4]~21_combout ; +wire \fifo_read_inst|baud_cnt[9]~31_combout ; +wire \fifo_read_inst|baud_cnt[11]~35_combout ; +wire \data_num[0]~25 ; +wire \data_num[0]~24_combout ; +wire \data_num[1]~27 ; +wire \data_num[1]~26_combout ; +wire \data_num[2]~29 ; +wire \data_num[2]~28_combout ; +wire \data_num[3]~31 ; +wire \data_num[3]~30_combout ; +wire \data_num[4]~33 ; +wire \data_num[4]~32_combout ; +wire \data_num[5]~35 ; +wire \data_num[5]~34_combout ; +wire \data_num[6]~37 ; +wire \data_num[6]~36_combout ; +wire \data_num[7]~39 ; +wire \data_num[7]~38_combout ; +wire \data_num[8]~41 ; +wire \data_num[8]~40_combout ; +wire \data_num[9]~43 ; +wire \data_num[9]~42_combout ; +wire \data_num[10]~45 ; +wire \data_num[10]~44_combout ; +wire \data_num[11]~47 ; +wire \data_num[11]~46_combout ; +wire \data_num[12]~49 ; +wire \data_num[12]~48_combout ; +wire \data_num[13]~51 ; +wire \data_num[13]~50_combout ; +wire \data_num[14]~53 ; +wire \data_num[14]~52_combout ; +wire \data_num[15]~55 ; +wire \data_num[15]~54_combout ; +wire \data_num[16]~57 ; +wire \data_num[16]~56_combout ; +wire \data_num[17]~59 ; +wire \data_num[17]~58_combout ; +wire \data_num[18]~61 ; +wire \data_num[18]~60_combout ; +wire \data_num[19]~63 ; +wire \data_num[19]~62_combout ; +wire \data_num[20]~65 ; +wire \data_num[20]~64_combout ; +wire \data_num[21]~67 ; +wire \data_num[21]~66_combout ; +wire \data_num[22]~69 ; +wire \data_num[22]~68_combout ; +wire \data_num[23]~70_combout ; +wire \uart_rx_inst|Add1~0_combout ; +wire \uart_rx_inst|Add1~5 ; +wire \uart_rx_inst|Add1~6_combout ; +wire \fifo_read_inst|cnt_read[0]~11 ; +wire \fifo_read_inst|cnt_read[0]~10_combout ; +wire \fifo_read_inst|cnt_read[1]~13 ; +wire \fifo_read_inst|cnt_read[1]~12_combout ; +wire \fifo_read_inst|cnt_read[2]~15 ; +wire \fifo_read_inst|cnt_read[2]~14_combout ; +wire \fifo_read_inst|cnt_read[3]~17 ; +wire \fifo_read_inst|cnt_read[3]~16_combout ; +wire \fifo_read_inst|cnt_read[4]~19 ; +wire \fifo_read_inst|cnt_read[4]~18_combout ; +wire \fifo_read_inst|cnt_read[5]~21 ; +wire \fifo_read_inst|cnt_read[5]~20_combout ; +wire \fifo_read_inst|cnt_read[6]~23 ; +wire \fifo_read_inst|cnt_read[6]~22_combout ; +wire \fifo_read_inst|cnt_read[7]~25 ; +wire \fifo_read_inst|cnt_read[7]~24_combout ; +wire \fifo_read_inst|cnt_read[8]~27 ; +wire \fifo_read_inst|cnt_read[8]~26_combout ; +wire \fifo_read_inst|cnt_read[9]~28_combout ; +wire \uart_rx_inst|baud_cnt[4]~21_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ; +wire \uart_tx_inst|Mux0~0_combout ; +wire \uart_tx_inst|Mux0~1_combout ; +wire \uart_tx_inst|tx~0_combout ; +wire \uart_tx_inst|tx~1_combout ; +wire \uart_tx_inst|tx~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ; +wire \uart_tx_inst|Add1~0_combout ; +wire \uart_tx_inst|Add1~1_combout ; +wire \uart_tx_inst|bit_cnt[3]~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ; +wire \read_valid~q ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ; +wire \uart_tx_inst|Equal1~3_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ; +wire \fifo_read_inst|Equal1~0_combout ; +wire \fifo_read_inst|Equal1~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ; +wire \Equal0~0_combout ; +wire \Equal0~1_combout ; +wire \Equal0~2_combout ; +wire \Equal0~3_combout ; +wire \Equal0~4_combout ; +wire \read_valid~0_combout ; +wire \read_valid~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ; +wire \fifo_read_inst|Equal1~2_combout ; +wire \fifo_read_inst|Equal5~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ; +wire \Equal1~0_combout ; +wire \Equal1~1_combout ; +wire \Equal1~2_combout ; +wire \Equal1~3_combout ; +wire \Equal1~4_combout ; +wire \Equal1~5_combout ; +wire \Equal1~6_combout ; +wire \cnt_wait[8]~0_combout ; +wire \cnt_wait[15]~1_combout ; +wire \cnt_wait[15]~2_combout ; +wire \cnt_wait[14]~3_combout ; +wire \cnt_wait[13]~4_combout ; +wire \cnt_wait[12]~5_combout ; +wire \cnt_wait[9]~6_combout ; +wire \cnt_wait[11]~7_combout ; +wire \cnt_wait[10]~8_combout ; +wire \cnt_wait[8]~9_combout ; +wire \cnt_wait[7]~10_combout ; +wire \cnt_wait[6]~11_combout ; +wire \cnt_wait[5]~12_combout ; +wire \cnt_wait[4]~13_combout ; +wire \cnt_wait[3]~14_combout ; +wire \cnt_wait[2]~15_combout ; +wire \cnt_wait[1]~16_combout ; +wire \cnt_wait[0]~17_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ; +wire \fifo_read_inst|rd_flag~q ; +wire \fifo_read_inst|Equal4~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ; +wire \fifo_read_inst|Equal2~0_combout ; +wire \fifo_read_inst|Equal2~1_combout ; +wire \fifo_read_inst|Equal2~2_combout ; +wire \fifo_read_inst|rd_flag~0_combout ; +wire \uart_rx_inst|bit_cnt~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ; +wire \uart_rx_inst|work_en~q ; +wire \uart_rx_inst|start_nedge~q ; +wire \uart_rx_inst|work_en~0_combout ; +wire \uart_rx_inst|always3~0_combout ; +wire \uart_tx_inst|bit_cnt[0]~5_combout ; +wire \sdram_dq[8]~input_o ; +wire \sdram_dq[9]~input_o ; +wire \sdram_dq[10]~input_o ; +wire \sdram_dq[11]~input_o ; +wire \sdram_dq[12]~input_o ; +wire \sdram_dq[13]~input_o ; +wire \sdram_dq[14]~input_o ; +wire \sdram_dq[15]~input_o ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ; +wire \uart_rx_inst|baud_cnt[0]~13_combout ; +wire \sys_clk~input_o ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ; +wire \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ; +wire \sys_rst_n~input_o ; +wire \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ; +wire \rst_n~0_combout ; +wire \rst_n~0clkctrl_outclk ; +wire \uart_rx_inst|baud_cnt[2]~18 ; +wire \uart_rx_inst|baud_cnt[3]~19_combout ; +wire \uart_rx_inst|baud_cnt[3]~20 ; +wire \uart_rx_inst|baud_cnt[4]~22 ; +wire \uart_rx_inst|baud_cnt[5]~23_combout ; +wire \uart_rx_inst|Equal1~1_combout ; +wire \uart_rx_inst|baud_cnt[5]~24 ; +wire \uart_rx_inst|baud_cnt[6]~25_combout ; +wire \uart_rx_inst|baud_cnt[6]~26 ; +wire \uart_rx_inst|baud_cnt[7]~27_combout ; +wire \uart_rx_inst|baud_cnt[7]~28 ; +wire \uart_rx_inst|baud_cnt[8]~29_combout ; +wire \uart_rx_inst|Equal1~0_combout ; +wire \uart_rx_inst|baud_cnt[8]~30 ; +wire \uart_rx_inst|baud_cnt[9]~31_combout ; +wire \uart_rx_inst|baud_cnt[9]~32 ; +wire \uart_rx_inst|baud_cnt[10]~34 ; +wire \uart_rx_inst|baud_cnt[11]~35_combout ; +wire \uart_rx_inst|Equal1~2_combout ; +wire \uart_rx_inst|baud_cnt[10]~33_combout ; +wire \uart_rx_inst|Equal1~3_combout ; +wire \uart_rx_inst|always5~0_combout ; +wire \uart_rx_inst|baud_cnt[0]~14 ; +wire \uart_rx_inst|baud_cnt[1]~15_combout ; +wire \uart_rx_inst|baud_cnt[1]~16 ; +wire \uart_rx_inst|baud_cnt[2]~17_combout ; +wire \uart_rx_inst|Equal2~0_combout ; +wire \uart_rx_inst|baud_cnt[11]~36 ; +wire \uart_rx_inst|baud_cnt[12]~37_combout ; +wire \uart_rx_inst|Equal2~1_combout ; +wire \uart_rx_inst|Equal2~2_combout ; +wire \uart_rx_inst|bit_flag~q ; +wire \uart_rx_inst|Add1~1 ; +wire \uart_rx_inst|Add1~3 ; +wire \uart_rx_inst|Add1~4_combout ; +wire \uart_rx_inst|Add1~2_combout ; +wire \uart_rx_inst|always4~0_combout ; +wire \uart_rx_inst|always4~1_combout ; +wire \uart_rx_inst|rx_flag~q ; +wire \uart_rx_inst|po_flag~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ; +wire \fifo_read_inst|read_en_dly~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ; +wire \fifo_read_inst|Add2~0_combout ; +wire \fifo_read_inst|Add2~1 ; +wire \fifo_read_inst|Add2~3 ; +wire \fifo_read_inst|Add2~5 ; +wire \fifo_read_inst|Add2~6_combout ; +wire \fifo_read_inst|bit_cnt~0_combout ; +wire \fifo_read_inst|baud_cnt[0]~13_combout ; +wire \fifo_read_inst|baud_cnt[5]~24 ; +wire \fifo_read_inst|baud_cnt[6]~25_combout ; +wire \fifo_read_inst|baud_cnt[6]~26 ; +wire \fifo_read_inst|baud_cnt[7]~27_combout ; +wire \fifo_read_inst|baud_cnt[7]~28 ; +wire \fifo_read_inst|baud_cnt[8]~29_combout ; +wire \fifo_read_inst|Equal4~0_combout ; +wire \fifo_read_inst|baud_cnt[3]~19_combout ; +wire \fifo_read_inst|Equal4~1_combout ; +wire \fifo_read_inst|baud_cnt[8]~30 ; +wire \fifo_read_inst|baud_cnt[9]~32 ; +wire \fifo_read_inst|baud_cnt[10]~33_combout ; +wire \fifo_read_inst|baud_cnt[10]~34 ; +wire \fifo_read_inst|baud_cnt[11]~36 ; +wire \fifo_read_inst|baud_cnt[12]~37_combout ; +wire \fifo_read_inst|Equal4~3_combout ; +wire \fifo_read_inst|baud_cnt[0]~14 ; +wire \fifo_read_inst|baud_cnt[1]~16 ; +wire \fifo_read_inst|baud_cnt[2]~17_combout ; +wire \fifo_read_inst|baud_cnt[2]~18 ; +wire \fifo_read_inst|baud_cnt[3]~20 ; +wire \fifo_read_inst|baud_cnt[4]~22 ; +wire \fifo_read_inst|baud_cnt[5]~23_combout ; +wire \fifo_read_inst|Equal5~0_combout ; +wire \fifo_read_inst|Equal5~2_combout ; +wire \fifo_read_inst|bit_flag~q ; +wire \fifo_read_inst|Add2~2_combout ; +wire \fifo_read_inst|bit_cnt~1_combout ; +wire \fifo_read_inst|always5~0_combout ; +wire \fifo_read_inst|always5~1_combout ; +wire \fifo_read_inst|rd_en~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ; +wire \Equal2~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ; +wire \fifo_read_inst|read_en~0_combout ; +wire \fifo_read_inst|read_en~1_combout ; +wire \fifo_read_inst|read_en~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ; +wire \Equal2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ; +wire \rx~input_o ; +wire \uart_rx_inst|rx_reg1~0_combout ; +wire \uart_rx_inst|rx_reg1~q ; +wire \uart_rx_inst|rx_reg2~feeder_combout ; +wire \uart_rx_inst|rx_reg2~q ; +wire \uart_rx_inst|rx_reg3~feeder_combout ; +wire \uart_rx_inst|rx_reg3~q ; +wire \uart_rx_inst|rx_data[7]~0_combout ; +wire \uart_rx_inst|bit_cnt~0_combout ; +wire \uart_rx_inst|always8~0_combout ; +wire \uart_rx_inst|rx_data[5]~feeder_combout ; +wire \uart_rx_inst|rx_data[4]~feeder_combout ; +wire \uart_rx_inst|rx_data[3]~feeder_combout ; +wire \uart_rx_inst|rx_data[2]~feeder_combout ; +wire \uart_rx_inst|rx_data[1]~feeder_combout ; +wire \uart_rx_inst|rx_data[0]~feeder_combout ; +wire \uart_rx_inst|po_data[0]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ; +wire \uart_rx_inst|po_data[1]~feeder_combout ; +wire \uart_rx_inst|po_data[2]~feeder_combout ; +wire \uart_rx_inst|po_data[3]~feeder_combout ; +wire \uart_rx_inst|po_data[4]~feeder_combout ; +wire \uart_rx_inst|po_data[5]~feeder_combout ; +wire \uart_rx_inst|po_data[6]~feeder_combout ; +wire \~GND~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ; +wire \sys_clk~inputclkctrl_outclk ; +wire \uart_tx_inst|baud_cnt[0]~13_combout ; +wire \uart_tx_inst|baud_cnt[11]~35_combout ; +wire \uart_tx_inst|Equal1~0_combout ; +wire \uart_tx_inst|baud_cnt[9]~31_combout ; +wire \uart_tx_inst|Equal1~1_combout ; +wire \uart_tx_inst|baud_cnt[1]~15_combout ; +wire \uart_tx_inst|Equal1~2_combout ; +wire \fifo_read_inst|tx_flag~q ; +wire \uart_tx_inst|always3~0_combout ; +wire \uart_tx_inst|bit_cnt[1]~2_combout ; +wire \uart_tx_inst|bit_cnt[2]~3_combout ; +wire \uart_tx_inst|always0~1_combout ; +wire \uart_tx_inst|work_en~0_combout ; +wire \uart_tx_inst|work_en~q ; +wire \uart_tx_inst|always1~0_combout ; +wire \uart_tx_inst|baud_cnt[0]~14 ; +wire \uart_tx_inst|baud_cnt[1]~16 ; +wire \uart_tx_inst|baud_cnt[2]~17_combout ; +wire \uart_tx_inst|baud_cnt[2]~18 ; +wire \uart_tx_inst|baud_cnt[3]~20 ; +wire \uart_tx_inst|baud_cnt[4]~22 ; +wire \uart_tx_inst|baud_cnt[5]~23_combout ; +wire \uart_tx_inst|baud_cnt[5]~24 ; +wire \uart_tx_inst|baud_cnt[6]~25_combout ; +wire \uart_tx_inst|baud_cnt[6]~26 ; +wire \uart_tx_inst|baud_cnt[7]~27_combout ; +wire \uart_tx_inst|baud_cnt[7]~28 ; +wire \uart_tx_inst|baud_cnt[8]~29_combout ; +wire \uart_tx_inst|baud_cnt[8]~30 ; +wire \uart_tx_inst|baud_cnt[9]~32 ; +wire \uart_tx_inst|baud_cnt[10]~33_combout ; +wire \uart_tx_inst|baud_cnt[10]~34 ; +wire \uart_tx_inst|baud_cnt[11]~36 ; +wire \uart_tx_inst|baud_cnt[12]~37_combout ; +wire \uart_tx_inst|Equal2~0_combout ; +wire \uart_tx_inst|Equal2~1_combout ; +wire \uart_tx_inst|bit_flag~q ; +wire \uart_tx_inst|always0~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ; +wire \sdram_dq[0]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ; +wire \sdram_dq[1]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ; +wire \sdram_dq[2]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout ; +wire \sdram_dq[3]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ; +wire \sdram_dq[4]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ; +wire \sdram_dq[5]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout ; +wire \sdram_dq[6]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ; +wire \sdram_dq[7]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ; +wire \uart_tx_inst|tx~4_combout ; +wire \uart_tx_inst|tx~3_combout ; +wire \uart_tx_inst|tx~5_combout ; +wire \uart_tx_inst|tx~q ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a ; +wire [15:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit ; +wire [23:0] data_num; +wire [15:0] cnt_wait; +wire [4:0] \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk ; +wire [7:0] \uart_rx_inst|rx_data ; +wire [7:0] \uart_rx_inst|po_data ; +wire [3:0] \uart_rx_inst|bit_cnt ; +wire [12:0] \uart_rx_inst|baud_cnt ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g ; +wire [9:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a ; +wire [15:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref ; +wire [2:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk ; +wire [14:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us ; +wire [2:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba ; +wire [12:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd ; +wire [12:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr ; +wire [15:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk ; +wire [9:0] \fifo_read_inst|cnt_read ; +wire [3:0] \fifo_read_inst|bit_cnt ; +wire [12:0] \fifo_read_inst|baud_cnt ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit ; +wire [7:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit ; +wire [3:0] \uart_tx_inst|bit_cnt ; +wire [12:0] \uart_tx_inst|baud_cnt ; + +wire [4:0] \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus ; +wire [8:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus ; + +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [0] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [0]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [1] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [1]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [2] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [2]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [3] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [3]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [4] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [4]; + +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [0]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [1]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [2]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [3]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [4] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [4]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [5]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [6]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [7]; + +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [6]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [7]; + +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [6]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [7]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [8] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [8]; + +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [9] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [10] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [11] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [12] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [13] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [14] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [15] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [6]; + +// Location: M9K_X25_Y18_N0 +cycloneive_ram_block \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 ( + .portawe(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .ena0(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .ena1(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({gnd,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0]}), + .portaaddr({\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk0_core_clock_enable = "ena0"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk1_core_clock_enable = "ena1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk1_input_clock_enable = "ena1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .data_interleave_offset_in_bits = 1; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .data_interleave_width_in_bits = 1; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .logical_ram_name = "fifo_read:fifo_read_inst|read_fifo:read_fifo_inst|scfifo:scfifo_component|scfifo_un21:auto_generated|a_dpfifo_5u21:dpfifo|dpram_d811:FIFOram|altsyncram_c3k1:altsyncram1|ALTSYNCRAM"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .operation_mode = "dual_port"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_address_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_address_width = 10; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_byte_enable_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_out_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_out_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_width = 9; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_first_address = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_first_bit_number = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_last_address = 1023; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_logical_ram_depth = 1024; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_logical_ram_width = 8; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_clock = "clock1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_width = 10; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_out_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_out_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_width = 9; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_first_address = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_first_bit_number = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_last_address = 1023; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_logical_ram_depth = 1024; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_logical_ram_width = 8; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_read_enable_clock = "clock1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: FF_X24_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y21_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y18_N11 +dffeas \uart_tx_inst|baud_cnt[3] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y18_N13 +dffeas \uart_tx_inst|baud_cnt[4] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0] & ((GND) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0] $ (GND))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 .lut_mask = 16'h66BB; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N10 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[3]~19 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[3]~19_combout = (\uart_tx_inst|baud_cnt [3] & (!\uart_tx_inst|baud_cnt[2]~18 )) # (!\uart_tx_inst|baud_cnt [3] & ((\uart_tx_inst|baud_cnt[2]~18 ) # (GND))) +// \uart_tx_inst|baud_cnt[3]~20 = CARRY((!\uart_tx_inst|baud_cnt[2]~18 ) # (!\uart_tx_inst|baud_cnt [3])) + + .dataa(\uart_tx_inst|baud_cnt [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[2]~18 ), + .combout(\uart_tx_inst|baud_cnt[3]~19_combout ), + .cout(\uart_tx_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[3]~19 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[4]~21 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[4]~21_combout = (\uart_tx_inst|baud_cnt [4] & (\uart_tx_inst|baud_cnt[3]~20 $ (GND))) # (!\uart_tx_inst|baud_cnt [4] & (!\uart_tx_inst|baud_cnt[3]~20 & VCC)) +// \uart_tx_inst|baud_cnt[4]~22 = CARRY((\uart_tx_inst|baud_cnt [4] & !\uart_tx_inst|baud_cnt[3]~20 )) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[3]~20 ), + .combout(\uart_tx_inst|baud_cnt[4]~21_combout ), + .cout(\uart_tx_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \uart_tx_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [13] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N8 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N7 +dffeas \fifo_read_inst|baud_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N13 +dffeas \fifo_read_inst|baud_cnt[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N23 +dffeas \fifo_read_inst|baud_cnt[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N27 +dffeas \fifo_read_inst|baud_cnt[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N12 +cycloneive_lcell_comb \fifo_read_inst|Add2~4 ( +// Equation(s): +// \fifo_read_inst|Add2~4_combout = (\fifo_read_inst|bit_cnt [2] & (\fifo_read_inst|Add2~3 $ (GND))) # (!\fifo_read_inst|bit_cnt [2] & (!\fifo_read_inst|Add2~3 & VCC)) +// \fifo_read_inst|Add2~5 = CARRY((\fifo_read_inst|bit_cnt [2] & !\fifo_read_inst|Add2~3 )) + + .dataa(\fifo_read_inst|bit_cnt [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|Add2~3 ), + .combout(\fifo_read_inst|Add2~4_combout ), + .cout(\fifo_read_inst|Add2~5 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~4 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|Add2~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y24_N9 +dffeas \data_num[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[0]~24_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[0]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[0] .is_wysiwyg = "true"; +defparam \data_num[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N13 +dffeas \data_num[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[2]~28_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[2]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[2] .is_wysiwyg = "true"; +defparam \data_num[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N11 +dffeas \data_num[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[1]~26_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[1]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[1] .is_wysiwyg = "true"; +defparam \data_num[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N15 +dffeas \data_num[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[3]~30_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[3]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[3] .is_wysiwyg = "true"; +defparam \data_num[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N17 +dffeas \data_num[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[4]~32_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[4]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[4] .is_wysiwyg = "true"; +defparam \data_num[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N19 +dffeas \data_num[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[5]~34_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[5]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[5] .is_wysiwyg = "true"; +defparam \data_num[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N21 +dffeas \data_num[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[6]~36_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[6]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[6] .is_wysiwyg = "true"; +defparam \data_num[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N23 +dffeas \data_num[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[7]~38_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[7]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[7] .is_wysiwyg = "true"; +defparam \data_num[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N25 +dffeas \data_num[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[8]~40_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[8]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[8] .is_wysiwyg = "true"; +defparam \data_num[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N27 +dffeas \data_num[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[9]~42_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[9]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[9] .is_wysiwyg = "true"; +defparam \data_num[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N29 +dffeas \data_num[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[10]~44_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[10]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[10] .is_wysiwyg = "true"; +defparam \data_num[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N31 +dffeas \data_num[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[11]~46_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[11]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[11] .is_wysiwyg = "true"; +defparam \data_num[11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N1 +dffeas \data_num[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[12]~48_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[12]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[12] .is_wysiwyg = "true"; +defparam \data_num[12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N3 +dffeas \data_num[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[13]~50_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[13]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[13] .is_wysiwyg = "true"; +defparam \data_num[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N5 +dffeas \data_num[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[14]~52_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[14]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[14] .is_wysiwyg = "true"; +defparam \data_num[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N7 +dffeas \data_num[15] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[15]~54_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[15]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[15] .is_wysiwyg = "true"; +defparam \data_num[15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N9 +dffeas \data_num[16] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[16]~56_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[16]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[16] .is_wysiwyg = "true"; +defparam \data_num[16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N11 +dffeas \data_num[17] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[17]~58_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[17]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[17] .is_wysiwyg = "true"; +defparam \data_num[17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N13 +dffeas \data_num[18] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[18]~60_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[18]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[18] .is_wysiwyg = "true"; +defparam \data_num[18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N15 +dffeas \data_num[19] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[19]~62_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[19]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[19] .is_wysiwyg = "true"; +defparam \data_num[19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N17 +dffeas \data_num[20] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[20]~64_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[20]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[20] .is_wysiwyg = "true"; +defparam \data_num[20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N19 +dffeas \data_num[21] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[21]~66_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[21]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[21] .is_wysiwyg = "true"; +defparam \data_num[21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N21 +dffeas \data_num[22] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[22]~68_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[22]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[22] .is_wysiwyg = "true"; +defparam \data_num[22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N23 +dffeas \data_num[23] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[23]~70_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[23]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[23] .is_wysiwyg = "true"; +defparam \data_num[23] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N0 +cycloneive_lcell_comb \Add1~0 ( +// Equation(s): +// \Add1~0_combout = cnt_wait[0] $ (VCC) +// \Add1~1 = CARRY(cnt_wait[0]) + + .dataa(gnd), + .datab(cnt_wait[0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\Add1~0_combout ), + .cout(\Add1~1 )); +// synopsys translate_off +defparam \Add1~0 .lut_mask = 16'h33CC; +defparam \Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N2 +cycloneive_lcell_comb \Add1~2 ( +// Equation(s): +// \Add1~2_combout = (cnt_wait[1] & (!\Add1~1 )) # (!cnt_wait[1] & ((\Add1~1 ) # (GND))) +// \Add1~3 = CARRY((!\Add1~1 ) # (!cnt_wait[1])) + + .dataa(cnt_wait[1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~1 ), + .combout(\Add1~2_combout ), + .cout(\Add1~3 )); +// synopsys translate_off +defparam \Add1~2 .lut_mask = 16'h5A5F; +defparam \Add1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N4 +cycloneive_lcell_comb \Add1~4 ( +// Equation(s): +// \Add1~4_combout = (cnt_wait[2] & (\Add1~3 $ (GND))) # (!cnt_wait[2] & (!\Add1~3 & VCC)) +// \Add1~5 = CARRY((cnt_wait[2] & !\Add1~3 )) + + .dataa(gnd), + .datab(cnt_wait[2]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~3 ), + .combout(\Add1~4_combout ), + .cout(\Add1~5 )); +// synopsys translate_off +defparam \Add1~4 .lut_mask = 16'hC30C; +defparam \Add1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N6 +cycloneive_lcell_comb \Add1~6 ( +// Equation(s): +// \Add1~6_combout = (cnt_wait[3] & (!\Add1~5 )) # (!cnt_wait[3] & ((\Add1~5 ) # (GND))) +// \Add1~7 = CARRY((!\Add1~5 ) # (!cnt_wait[3])) + + .dataa(gnd), + .datab(cnt_wait[3]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~5 ), + .combout(\Add1~6_combout ), + .cout(\Add1~7 )); +// synopsys translate_off +defparam \Add1~6 .lut_mask = 16'h3C3F; +defparam \Add1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N8 +cycloneive_lcell_comb \Add1~8 ( +// Equation(s): +// \Add1~8_combout = (cnt_wait[4] & (\Add1~7 $ (GND))) # (!cnt_wait[4] & (!\Add1~7 & VCC)) +// \Add1~9 = CARRY((cnt_wait[4] & !\Add1~7 )) + + .dataa(cnt_wait[4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~7 ), + .combout(\Add1~8_combout ), + .cout(\Add1~9 )); +// synopsys translate_off +defparam \Add1~8 .lut_mask = 16'hA50A; +defparam \Add1~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N10 +cycloneive_lcell_comb \Add1~10 ( +// Equation(s): +// \Add1~10_combout = (cnt_wait[5] & (!\Add1~9 )) # (!cnt_wait[5] & ((\Add1~9 ) # (GND))) +// \Add1~11 = CARRY((!\Add1~9 ) # (!cnt_wait[5])) + + .dataa(cnt_wait[5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~9 ), + .combout(\Add1~10_combout ), + .cout(\Add1~11 )); +// synopsys translate_off +defparam \Add1~10 .lut_mask = 16'h5A5F; +defparam \Add1~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N12 +cycloneive_lcell_comb \Add1~12 ( +// Equation(s): +// \Add1~12_combout = (cnt_wait[6] & (\Add1~11 $ (GND))) # (!cnt_wait[6] & (!\Add1~11 & VCC)) +// \Add1~13 = CARRY((cnt_wait[6] & !\Add1~11 )) + + .dataa(cnt_wait[6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~11 ), + .combout(\Add1~12_combout ), + .cout(\Add1~13 )); +// synopsys translate_off +defparam \Add1~12 .lut_mask = 16'hA50A; +defparam \Add1~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N14 +cycloneive_lcell_comb \Add1~14 ( +// Equation(s): +// \Add1~14_combout = (cnt_wait[7] & (!\Add1~13 )) # (!cnt_wait[7] & ((\Add1~13 ) # (GND))) +// \Add1~15 = CARRY((!\Add1~13 ) # (!cnt_wait[7])) + + .dataa(cnt_wait[7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~13 ), + .combout(\Add1~14_combout ), + .cout(\Add1~15 )); +// synopsys translate_off +defparam \Add1~14 .lut_mask = 16'h5A5F; +defparam \Add1~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N16 +cycloneive_lcell_comb \Add1~16 ( +// Equation(s): +// \Add1~16_combout = (cnt_wait[8] & (\Add1~15 $ (GND))) # (!cnt_wait[8] & (!\Add1~15 & VCC)) +// \Add1~17 = CARRY((cnt_wait[8] & !\Add1~15 )) + + .dataa(cnt_wait[8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~15 ), + .combout(\Add1~16_combout ), + .cout(\Add1~17 )); +// synopsys translate_off +defparam \Add1~16 .lut_mask = 16'hA50A; +defparam \Add1~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N18 +cycloneive_lcell_comb \Add1~18 ( +// Equation(s): +// \Add1~18_combout = (cnt_wait[9] & (!\Add1~17 )) # (!cnt_wait[9] & ((\Add1~17 ) # (GND))) +// \Add1~19 = CARRY((!\Add1~17 ) # (!cnt_wait[9])) + + .dataa(gnd), + .datab(cnt_wait[9]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~17 ), + .combout(\Add1~18_combout ), + .cout(\Add1~19 )); +// synopsys translate_off +defparam \Add1~18 .lut_mask = 16'h3C3F; +defparam \Add1~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N20 +cycloneive_lcell_comb \Add1~20 ( +// Equation(s): +// \Add1~20_combout = (cnt_wait[10] & (\Add1~19 $ (GND))) # (!cnt_wait[10] & (!\Add1~19 & VCC)) +// \Add1~21 = CARRY((cnt_wait[10] & !\Add1~19 )) + + .dataa(cnt_wait[10]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~19 ), + .combout(\Add1~20_combout ), + .cout(\Add1~21 )); +// synopsys translate_off +defparam \Add1~20 .lut_mask = 16'hA50A; +defparam \Add1~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N22 +cycloneive_lcell_comb \Add1~22 ( +// Equation(s): +// \Add1~22_combout = (cnt_wait[11] & (!\Add1~21 )) # (!cnt_wait[11] & ((\Add1~21 ) # (GND))) +// \Add1~23 = CARRY((!\Add1~21 ) # (!cnt_wait[11])) + + .dataa(gnd), + .datab(cnt_wait[11]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~21 ), + .combout(\Add1~22_combout ), + .cout(\Add1~23 )); +// synopsys translate_off +defparam \Add1~22 .lut_mask = 16'h3C3F; +defparam \Add1~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N24 +cycloneive_lcell_comb \Add1~24 ( +// Equation(s): +// \Add1~24_combout = (cnt_wait[12] & (\Add1~23 $ (GND))) # (!cnt_wait[12] & (!\Add1~23 & VCC)) +// \Add1~25 = CARRY((cnt_wait[12] & !\Add1~23 )) + + .dataa(gnd), + .datab(cnt_wait[12]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~23 ), + .combout(\Add1~24_combout ), + .cout(\Add1~25 )); +// synopsys translate_off +defparam \Add1~24 .lut_mask = 16'hC30C; +defparam \Add1~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N26 +cycloneive_lcell_comb \Add1~26 ( +// Equation(s): +// \Add1~26_combout = (cnt_wait[13] & (!\Add1~25 )) # (!cnt_wait[13] & ((\Add1~25 ) # (GND))) +// \Add1~27 = CARRY((!\Add1~25 ) # (!cnt_wait[13])) + + .dataa(gnd), + .datab(cnt_wait[13]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~25 ), + .combout(\Add1~26_combout ), + .cout(\Add1~27 )); +// synopsys translate_off +defparam \Add1~26 .lut_mask = 16'h3C3F; +defparam \Add1~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N28 +cycloneive_lcell_comb \Add1~28 ( +// Equation(s): +// \Add1~28_combout = (cnt_wait[14] & (\Add1~27 $ (GND))) # (!cnt_wait[14] & (!\Add1~27 & VCC)) +// \Add1~29 = CARRY((cnt_wait[14] & !\Add1~27 )) + + .dataa(cnt_wait[14]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~27 ), + .combout(\Add1~28_combout ), + .cout(\Add1~29 )); +// synopsys translate_off +defparam \Add1~28 .lut_mask = 16'hA50A; +defparam \Add1~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N30 +cycloneive_lcell_comb \Add1~30 ( +// Equation(s): +// \Add1~30_combout = \Add1~29 $ (cnt_wait[15]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(cnt_wait[15]), + .cin(\Add1~29 ), + .combout(\Add1~30_combout ), + .cout()); +// synopsys translate_off +defparam \Add1~30 .lut_mask = 16'h0FF0; +defparam \Add1~30 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N6 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[1]~15 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[1]~15_combout = (\fifo_read_inst|baud_cnt [1] & (!\fifo_read_inst|baud_cnt[0]~14 )) # (!\fifo_read_inst|baud_cnt [1] & ((\fifo_read_inst|baud_cnt[0]~14 ) # (GND))) +// \fifo_read_inst|baud_cnt[1]~16 = CARRY((!\fifo_read_inst|baud_cnt[0]~14 ) # (!\fifo_read_inst|baud_cnt [1])) + + .dataa(\fifo_read_inst|baud_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[0]~14 ), + .combout(\fifo_read_inst|baud_cnt[1]~15_combout ), + .cout(\fifo_read_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[1]~15 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N12 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[4]~21 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[4]~21_combout = (\fifo_read_inst|baud_cnt [4] & (\fifo_read_inst|baud_cnt[3]~20 $ (GND))) # (!\fifo_read_inst|baud_cnt [4] & (!\fifo_read_inst|baud_cnt[3]~20 & VCC)) +// \fifo_read_inst|baud_cnt[4]~22 = CARRY((\fifo_read_inst|baud_cnt [4] & !\fifo_read_inst|baud_cnt[3]~20 )) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[3]~20 ), + .combout(\fifo_read_inst|baud_cnt[4]~21_combout ), + .cout(\fifo_read_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N22 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[9]~31 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[9]~31_combout = (\fifo_read_inst|baud_cnt [9] & (!\fifo_read_inst|baud_cnt[8]~30 )) # (!\fifo_read_inst|baud_cnt [9] & ((\fifo_read_inst|baud_cnt[8]~30 ) # (GND))) +// \fifo_read_inst|baud_cnt[9]~32 = CARRY((!\fifo_read_inst|baud_cnt[8]~30 ) # (!\fifo_read_inst|baud_cnt [9])) + + .dataa(\fifo_read_inst|baud_cnt [9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[8]~30 ), + .combout(\fifo_read_inst|baud_cnt[9]~31_combout ), + .cout(\fifo_read_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[9]~31 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N26 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[11]~35 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[11]~35_combout = (\fifo_read_inst|baud_cnt [11] & (!\fifo_read_inst|baud_cnt[10]~34 )) # (!\fifo_read_inst|baud_cnt [11] & ((\fifo_read_inst|baud_cnt[10]~34 ) # (GND))) +// \fifo_read_inst|baud_cnt[11]~36 = CARRY((!\fifo_read_inst|baud_cnt[10]~34 ) # (!\fifo_read_inst|baud_cnt [11])) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[10]~34 ), + .combout(\fifo_read_inst|baud_cnt[11]~35_combout ), + .cout(\fifo_read_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[11]~35 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N8 +cycloneive_lcell_comb \data_num[0]~24 ( +// Equation(s): +// \data_num[0]~24_combout = (\uart_rx_inst|po_flag~q & (data_num[0] $ (VCC))) # (!\uart_rx_inst|po_flag~q & (data_num[0] & VCC)) +// \data_num[0]~25 = CARRY((\uart_rx_inst|po_flag~q & data_num[0])) + + .dataa(\uart_rx_inst|po_flag~q ), + .datab(data_num[0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\data_num[0]~24_combout ), + .cout(\data_num[0]~25 )); +// synopsys translate_off +defparam \data_num[0]~24 .lut_mask = 16'h6688; +defparam \data_num[0]~24 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N10 +cycloneive_lcell_comb \data_num[1]~26 ( +// Equation(s): +// \data_num[1]~26_combout = (data_num[1] & (!\data_num[0]~25 )) # (!data_num[1] & ((\data_num[0]~25 ) # (GND))) +// \data_num[1]~27 = CARRY((!\data_num[0]~25 ) # (!data_num[1])) + + .dataa(data_num[1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[0]~25 ), + .combout(\data_num[1]~26_combout ), + .cout(\data_num[1]~27 )); +// synopsys translate_off +defparam \data_num[1]~26 .lut_mask = 16'h5A5F; +defparam \data_num[1]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N12 +cycloneive_lcell_comb \data_num[2]~28 ( +// Equation(s): +// \data_num[2]~28_combout = (data_num[2] & (\data_num[1]~27 $ (GND))) # (!data_num[2] & (!\data_num[1]~27 & VCC)) +// \data_num[2]~29 = CARRY((data_num[2] & !\data_num[1]~27 )) + + .dataa(data_num[2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[1]~27 ), + .combout(\data_num[2]~28_combout ), + .cout(\data_num[2]~29 )); +// synopsys translate_off +defparam \data_num[2]~28 .lut_mask = 16'hA50A; +defparam \data_num[2]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N14 +cycloneive_lcell_comb \data_num[3]~30 ( +// Equation(s): +// \data_num[3]~30_combout = (data_num[3] & (!\data_num[2]~29 )) # (!data_num[3] & ((\data_num[2]~29 ) # (GND))) +// \data_num[3]~31 = CARRY((!\data_num[2]~29 ) # (!data_num[3])) + + .dataa(gnd), + .datab(data_num[3]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[2]~29 ), + .combout(\data_num[3]~30_combout ), + .cout(\data_num[3]~31 )); +// synopsys translate_off +defparam \data_num[3]~30 .lut_mask = 16'h3C3F; +defparam \data_num[3]~30 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N16 +cycloneive_lcell_comb \data_num[4]~32 ( +// Equation(s): +// \data_num[4]~32_combout = (data_num[4] & (\data_num[3]~31 $ (GND))) # (!data_num[4] & (!\data_num[3]~31 & VCC)) +// \data_num[4]~33 = CARRY((data_num[4] & !\data_num[3]~31 )) + + .dataa(gnd), + .datab(data_num[4]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[3]~31 ), + .combout(\data_num[4]~32_combout ), + .cout(\data_num[4]~33 )); +// synopsys translate_off +defparam \data_num[4]~32 .lut_mask = 16'hC30C; +defparam \data_num[4]~32 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N18 +cycloneive_lcell_comb \data_num[5]~34 ( +// Equation(s): +// \data_num[5]~34_combout = (data_num[5] & (!\data_num[4]~33 )) # (!data_num[5] & ((\data_num[4]~33 ) # (GND))) +// \data_num[5]~35 = CARRY((!\data_num[4]~33 ) # (!data_num[5])) + + .dataa(gnd), + .datab(data_num[5]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[4]~33 ), + .combout(\data_num[5]~34_combout ), + .cout(\data_num[5]~35 )); +// synopsys translate_off +defparam \data_num[5]~34 .lut_mask = 16'h3C3F; +defparam \data_num[5]~34 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N20 +cycloneive_lcell_comb \data_num[6]~36 ( +// Equation(s): +// \data_num[6]~36_combout = (data_num[6] & (\data_num[5]~35 $ (GND))) # (!data_num[6] & (!\data_num[5]~35 & VCC)) +// \data_num[6]~37 = CARRY((data_num[6] & !\data_num[5]~35 )) + + .dataa(gnd), + .datab(data_num[6]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[5]~35 ), + .combout(\data_num[6]~36_combout ), + .cout(\data_num[6]~37 )); +// synopsys translate_off +defparam \data_num[6]~36 .lut_mask = 16'hC30C; +defparam \data_num[6]~36 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N22 +cycloneive_lcell_comb \data_num[7]~38 ( +// Equation(s): +// \data_num[7]~38_combout = (data_num[7] & (!\data_num[6]~37 )) # (!data_num[7] & ((\data_num[6]~37 ) # (GND))) +// \data_num[7]~39 = CARRY((!\data_num[6]~37 ) # (!data_num[7])) + + .dataa(data_num[7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[6]~37 ), + .combout(\data_num[7]~38_combout ), + .cout(\data_num[7]~39 )); +// synopsys translate_off +defparam \data_num[7]~38 .lut_mask = 16'h5A5F; +defparam \data_num[7]~38 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N24 +cycloneive_lcell_comb \data_num[8]~40 ( +// Equation(s): +// \data_num[8]~40_combout = (data_num[8] & (\data_num[7]~39 $ (GND))) # (!data_num[8] & (!\data_num[7]~39 & VCC)) +// \data_num[8]~41 = CARRY((data_num[8] & !\data_num[7]~39 )) + + .dataa(gnd), + .datab(data_num[8]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[7]~39 ), + .combout(\data_num[8]~40_combout ), + .cout(\data_num[8]~41 )); +// synopsys translate_off +defparam \data_num[8]~40 .lut_mask = 16'hC30C; +defparam \data_num[8]~40 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N26 +cycloneive_lcell_comb \data_num[9]~42 ( +// Equation(s): +// \data_num[9]~42_combout = (data_num[9] & (!\data_num[8]~41 )) # (!data_num[9] & ((\data_num[8]~41 ) # (GND))) +// \data_num[9]~43 = CARRY((!\data_num[8]~41 ) # (!data_num[9])) + + .dataa(data_num[9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[8]~41 ), + .combout(\data_num[9]~42_combout ), + .cout(\data_num[9]~43 )); +// synopsys translate_off +defparam \data_num[9]~42 .lut_mask = 16'h5A5F; +defparam \data_num[9]~42 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N28 +cycloneive_lcell_comb \data_num[10]~44 ( +// Equation(s): +// \data_num[10]~44_combout = (data_num[10] & (\data_num[9]~43 $ (GND))) # (!data_num[10] & (!\data_num[9]~43 & VCC)) +// \data_num[10]~45 = CARRY((data_num[10] & !\data_num[9]~43 )) + + .dataa(gnd), + .datab(data_num[10]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[9]~43 ), + .combout(\data_num[10]~44_combout ), + .cout(\data_num[10]~45 )); +// synopsys translate_off +defparam \data_num[10]~44 .lut_mask = 16'hC30C; +defparam \data_num[10]~44 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N30 +cycloneive_lcell_comb \data_num[11]~46 ( +// Equation(s): +// \data_num[11]~46_combout = (data_num[11] & (!\data_num[10]~45 )) # (!data_num[11] & ((\data_num[10]~45 ) # (GND))) +// \data_num[11]~47 = CARRY((!\data_num[10]~45 ) # (!data_num[11])) + + .dataa(data_num[11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[10]~45 ), + .combout(\data_num[11]~46_combout ), + .cout(\data_num[11]~47 )); +// synopsys translate_off +defparam \data_num[11]~46 .lut_mask = 16'h5A5F; +defparam \data_num[11]~46 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N0 +cycloneive_lcell_comb \data_num[12]~48 ( +// Equation(s): +// \data_num[12]~48_combout = (data_num[12] & (\data_num[11]~47 $ (GND))) # (!data_num[12] & (!\data_num[11]~47 & VCC)) +// \data_num[12]~49 = CARRY((data_num[12] & !\data_num[11]~47 )) + + .dataa(gnd), + .datab(data_num[12]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[11]~47 ), + .combout(\data_num[12]~48_combout ), + .cout(\data_num[12]~49 )); +// synopsys translate_off +defparam \data_num[12]~48 .lut_mask = 16'hC30C; +defparam \data_num[12]~48 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N2 +cycloneive_lcell_comb \data_num[13]~50 ( +// Equation(s): +// \data_num[13]~50_combout = (data_num[13] & (!\data_num[12]~49 )) # (!data_num[13] & ((\data_num[12]~49 ) # (GND))) +// \data_num[13]~51 = CARRY((!\data_num[12]~49 ) # (!data_num[13])) + + .dataa(gnd), + .datab(data_num[13]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[12]~49 ), + .combout(\data_num[13]~50_combout ), + .cout(\data_num[13]~51 )); +// synopsys translate_off +defparam \data_num[13]~50 .lut_mask = 16'h3C3F; +defparam \data_num[13]~50 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N4 +cycloneive_lcell_comb \data_num[14]~52 ( +// Equation(s): +// \data_num[14]~52_combout = (data_num[14] & (\data_num[13]~51 $ (GND))) # (!data_num[14] & (!\data_num[13]~51 & VCC)) +// \data_num[14]~53 = CARRY((data_num[14] & !\data_num[13]~51 )) + + .dataa(gnd), + .datab(data_num[14]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[13]~51 ), + .combout(\data_num[14]~52_combout ), + .cout(\data_num[14]~53 )); +// synopsys translate_off +defparam \data_num[14]~52 .lut_mask = 16'hC30C; +defparam \data_num[14]~52 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N6 +cycloneive_lcell_comb \data_num[15]~54 ( +// Equation(s): +// \data_num[15]~54_combout = (data_num[15] & (!\data_num[14]~53 )) # (!data_num[15] & ((\data_num[14]~53 ) # (GND))) +// \data_num[15]~55 = CARRY((!\data_num[14]~53 ) # (!data_num[15])) + + .dataa(data_num[15]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[14]~53 ), + .combout(\data_num[15]~54_combout ), + .cout(\data_num[15]~55 )); +// synopsys translate_off +defparam \data_num[15]~54 .lut_mask = 16'h5A5F; +defparam \data_num[15]~54 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N8 +cycloneive_lcell_comb \data_num[16]~56 ( +// Equation(s): +// \data_num[16]~56_combout = (data_num[16] & (\data_num[15]~55 $ (GND))) # (!data_num[16] & (!\data_num[15]~55 & VCC)) +// \data_num[16]~57 = CARRY((data_num[16] & !\data_num[15]~55 )) + + .dataa(gnd), + .datab(data_num[16]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[15]~55 ), + .combout(\data_num[16]~56_combout ), + .cout(\data_num[16]~57 )); +// synopsys translate_off +defparam \data_num[16]~56 .lut_mask = 16'hC30C; +defparam \data_num[16]~56 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N10 +cycloneive_lcell_comb \data_num[17]~58 ( +// Equation(s): +// \data_num[17]~58_combout = (data_num[17] & (!\data_num[16]~57 )) # (!data_num[17] & ((\data_num[16]~57 ) # (GND))) +// \data_num[17]~59 = CARRY((!\data_num[16]~57 ) # (!data_num[17])) + + .dataa(data_num[17]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[16]~57 ), + .combout(\data_num[17]~58_combout ), + .cout(\data_num[17]~59 )); +// synopsys translate_off +defparam \data_num[17]~58 .lut_mask = 16'h5A5F; +defparam \data_num[17]~58 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N12 +cycloneive_lcell_comb \data_num[18]~60 ( +// Equation(s): +// \data_num[18]~60_combout = (data_num[18] & (\data_num[17]~59 $ (GND))) # (!data_num[18] & (!\data_num[17]~59 & VCC)) +// \data_num[18]~61 = CARRY((data_num[18] & !\data_num[17]~59 )) + + .dataa(data_num[18]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[17]~59 ), + .combout(\data_num[18]~60_combout ), + .cout(\data_num[18]~61 )); +// synopsys translate_off +defparam \data_num[18]~60 .lut_mask = 16'hA50A; +defparam \data_num[18]~60 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N14 +cycloneive_lcell_comb \data_num[19]~62 ( +// Equation(s): +// \data_num[19]~62_combout = (data_num[19] & (!\data_num[18]~61 )) # (!data_num[19] & ((\data_num[18]~61 ) # (GND))) +// \data_num[19]~63 = CARRY((!\data_num[18]~61 ) # (!data_num[19])) + + .dataa(gnd), + .datab(data_num[19]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[18]~61 ), + .combout(\data_num[19]~62_combout ), + .cout(\data_num[19]~63 )); +// synopsys translate_off +defparam \data_num[19]~62 .lut_mask = 16'h3C3F; +defparam \data_num[19]~62 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N16 +cycloneive_lcell_comb \data_num[20]~64 ( +// Equation(s): +// \data_num[20]~64_combout = (data_num[20] & (\data_num[19]~63 $ (GND))) # (!data_num[20] & (!\data_num[19]~63 & VCC)) +// \data_num[20]~65 = CARRY((data_num[20] & !\data_num[19]~63 )) + + .dataa(gnd), + .datab(data_num[20]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[19]~63 ), + .combout(\data_num[20]~64_combout ), + .cout(\data_num[20]~65 )); +// synopsys translate_off +defparam \data_num[20]~64 .lut_mask = 16'hC30C; +defparam \data_num[20]~64 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N18 +cycloneive_lcell_comb \data_num[21]~66 ( +// Equation(s): +// \data_num[21]~66_combout = (data_num[21] & (!\data_num[20]~65 )) # (!data_num[21] & ((\data_num[20]~65 ) # (GND))) +// \data_num[21]~67 = CARRY((!\data_num[20]~65 ) # (!data_num[21])) + + .dataa(gnd), + .datab(data_num[21]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[20]~65 ), + .combout(\data_num[21]~66_combout ), + .cout(\data_num[21]~67 )); +// synopsys translate_off +defparam \data_num[21]~66 .lut_mask = 16'h3C3F; +defparam \data_num[21]~66 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N20 +cycloneive_lcell_comb \data_num[22]~68 ( +// Equation(s): +// \data_num[22]~68_combout = (data_num[22] & (\data_num[21]~67 $ (GND))) # (!data_num[22] & (!\data_num[21]~67 & VCC)) +// \data_num[22]~69 = CARRY((data_num[22] & !\data_num[21]~67 )) + + .dataa(gnd), + .datab(data_num[22]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[21]~67 ), + .combout(\data_num[22]~68_combout ), + .cout(\data_num[22]~69 )); +// synopsys translate_off +defparam \data_num[22]~68 .lut_mask = 16'hC30C; +defparam \data_num[22]~68 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N22 +cycloneive_lcell_comb \data_num[23]~70 ( +// Equation(s): +// \data_num[23]~70_combout = data_num[23] $ (\data_num[22]~69 ) + + .dataa(data_num[23]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\data_num[22]~69 ), + .combout(\data_num[23]~70_combout ), + .cout()); +// synopsys translate_off +defparam \data_num[23]~70 .lut_mask = 16'h5A5A; +defparam \data_num[23]~70 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X28_Y26_N3 +dffeas \fifo_read_inst|cnt_read[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[1]~12_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N7 +dffeas \fifo_read_inst|cnt_read[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[3]~16_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N1 +dffeas \fifo_read_inst|cnt_read[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[0]~10_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N5 +dffeas \fifo_read_inst|cnt_read[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[2]~14_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N9 +dffeas \fifo_read_inst|cnt_read[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[4]~18_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N11 +dffeas \fifo_read_inst|cnt_read[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[5]~20_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N13 +dffeas \fifo_read_inst|cnt_read[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[6]~22_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N15 +dffeas \fifo_read_inst|cnt_read[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[7]~24_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N17 +dffeas \fifo_read_inst|cnt_read[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[8]~26_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N19 +dffeas \fifo_read_inst|cnt_read[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[9]~28_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N24 +cycloneive_lcell_comb \uart_rx_inst|Add1~0 ( +// Equation(s): +// \uart_rx_inst|Add1~0_combout = (\uart_rx_inst|bit_cnt [0] & (\uart_rx_inst|bit_flag~q $ (VCC))) # (!\uart_rx_inst|bit_cnt [0] & (\uart_rx_inst|bit_flag~q & VCC)) +// \uart_rx_inst|Add1~1 = CARRY((\uart_rx_inst|bit_cnt [0] & \uart_rx_inst|bit_flag~q )) + + .dataa(\uart_rx_inst|bit_cnt [0]), + .datab(\uart_rx_inst|bit_flag~q ), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_rx_inst|Add1~0_combout ), + .cout(\uart_rx_inst|Add1~1 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~0 .lut_mask = 16'h6688; +defparam \uart_rx_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N28 +cycloneive_lcell_comb \uart_rx_inst|Add1~4 ( +// Equation(s): +// \uart_rx_inst|Add1~4_combout = (\uart_rx_inst|bit_cnt [2] & (\uart_rx_inst|Add1~3 $ (GND))) # (!\uart_rx_inst|bit_cnt [2] & (!\uart_rx_inst|Add1~3 & VCC)) +// \uart_rx_inst|Add1~5 = CARRY((\uart_rx_inst|bit_cnt [2] & !\uart_rx_inst|Add1~3 )) + + .dataa(gnd), + .datab(\uart_rx_inst|bit_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|Add1~3 ), + .combout(\uart_rx_inst|Add1~4_combout ), + .cout(\uart_rx_inst|Add1~5 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~4 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|Add1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N30 +cycloneive_lcell_comb \uart_rx_inst|Add1~6 ( +// Equation(s): +// \uart_rx_inst|Add1~6_combout = \uart_rx_inst|Add1~5 $ (\uart_rx_inst|bit_cnt [3]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|bit_cnt [3]), + .cin(\uart_rx_inst|Add1~5 ), + .combout(\uart_rx_inst|Add1~6_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Add1~6 .lut_mask = 16'h0FF0; +defparam \uart_rx_inst|Add1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N11 +dffeas \uart_rx_inst|baud_cnt[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N0 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[0]~10 ( +// Equation(s): +// \fifo_read_inst|cnt_read[0]~10_combout = (\fifo_read_inst|rd_en~q & (\fifo_read_inst|cnt_read [0] $ (VCC))) # (!\fifo_read_inst|rd_en~q & (\fifo_read_inst|cnt_read [0] & VCC)) +// \fifo_read_inst|cnt_read[0]~11 = CARRY((\fifo_read_inst|rd_en~q & \fifo_read_inst|cnt_read [0])) + + .dataa(\fifo_read_inst|rd_en~q ), + .datab(\fifo_read_inst|cnt_read [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|cnt_read[0]~10_combout ), + .cout(\fifo_read_inst|cnt_read[0]~11 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[0]~10 .lut_mask = 16'h6688; +defparam \fifo_read_inst|cnt_read[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N2 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[1]~12 ( +// Equation(s): +// \fifo_read_inst|cnt_read[1]~12_combout = (\fifo_read_inst|cnt_read [1] & (!\fifo_read_inst|cnt_read[0]~11 )) # (!\fifo_read_inst|cnt_read [1] & ((\fifo_read_inst|cnt_read[0]~11 ) # (GND))) +// \fifo_read_inst|cnt_read[1]~13 = CARRY((!\fifo_read_inst|cnt_read[0]~11 ) # (!\fifo_read_inst|cnt_read [1])) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [1]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[0]~11 ), + .combout(\fifo_read_inst|cnt_read[1]~12_combout ), + .cout(\fifo_read_inst|cnt_read[1]~13 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[1]~12 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|cnt_read[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N4 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[2]~14 ( +// Equation(s): +// \fifo_read_inst|cnt_read[2]~14_combout = (\fifo_read_inst|cnt_read [2] & (\fifo_read_inst|cnt_read[1]~13 $ (GND))) # (!\fifo_read_inst|cnt_read [2] & (!\fifo_read_inst|cnt_read[1]~13 & VCC)) +// \fifo_read_inst|cnt_read[2]~15 = CARRY((\fifo_read_inst|cnt_read [2] & !\fifo_read_inst|cnt_read[1]~13 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[1]~13 ), + .combout(\fifo_read_inst|cnt_read[2]~14_combout ), + .cout(\fifo_read_inst|cnt_read[2]~15 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[2]~14 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N6 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[3]~16 ( +// Equation(s): +// \fifo_read_inst|cnt_read[3]~16_combout = (\fifo_read_inst|cnt_read [3] & (!\fifo_read_inst|cnt_read[2]~15 )) # (!\fifo_read_inst|cnt_read [3] & ((\fifo_read_inst|cnt_read[2]~15 ) # (GND))) +// \fifo_read_inst|cnt_read[3]~17 = CARRY((!\fifo_read_inst|cnt_read[2]~15 ) # (!\fifo_read_inst|cnt_read [3])) + + .dataa(\fifo_read_inst|cnt_read [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[2]~15 ), + .combout(\fifo_read_inst|cnt_read[3]~16_combout ), + .cout(\fifo_read_inst|cnt_read[3]~17 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[3]~16 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|cnt_read[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N8 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[4]~18 ( +// Equation(s): +// \fifo_read_inst|cnt_read[4]~18_combout = (\fifo_read_inst|cnt_read [4] & (\fifo_read_inst|cnt_read[3]~17 $ (GND))) # (!\fifo_read_inst|cnt_read [4] & (!\fifo_read_inst|cnt_read[3]~17 & VCC)) +// \fifo_read_inst|cnt_read[4]~19 = CARRY((\fifo_read_inst|cnt_read [4] & !\fifo_read_inst|cnt_read[3]~17 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[3]~17 ), + .combout(\fifo_read_inst|cnt_read[4]~18_combout ), + .cout(\fifo_read_inst|cnt_read[4]~19 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[4]~18 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N10 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[5]~20 ( +// Equation(s): +// \fifo_read_inst|cnt_read[5]~20_combout = (\fifo_read_inst|cnt_read [5] & (!\fifo_read_inst|cnt_read[4]~19 )) # (!\fifo_read_inst|cnt_read [5] & ((\fifo_read_inst|cnt_read[4]~19 ) # (GND))) +// \fifo_read_inst|cnt_read[5]~21 = CARRY((!\fifo_read_inst|cnt_read[4]~19 ) # (!\fifo_read_inst|cnt_read [5])) + + .dataa(\fifo_read_inst|cnt_read [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[4]~19 ), + .combout(\fifo_read_inst|cnt_read[5]~20_combout ), + .cout(\fifo_read_inst|cnt_read[5]~21 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[5]~20 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|cnt_read[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N12 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[6]~22 ( +// Equation(s): +// \fifo_read_inst|cnt_read[6]~22_combout = (\fifo_read_inst|cnt_read [6] & (\fifo_read_inst|cnt_read[5]~21 $ (GND))) # (!\fifo_read_inst|cnt_read [6] & (!\fifo_read_inst|cnt_read[5]~21 & VCC)) +// \fifo_read_inst|cnt_read[6]~23 = CARRY((\fifo_read_inst|cnt_read [6] & !\fifo_read_inst|cnt_read[5]~21 )) + + .dataa(\fifo_read_inst|cnt_read [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[5]~21 ), + .combout(\fifo_read_inst|cnt_read[6]~22_combout ), + .cout(\fifo_read_inst|cnt_read[6]~23 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[6]~22 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|cnt_read[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N14 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[7]~24 ( +// Equation(s): +// \fifo_read_inst|cnt_read[7]~24_combout = (\fifo_read_inst|cnt_read [7] & (!\fifo_read_inst|cnt_read[6]~23 )) # (!\fifo_read_inst|cnt_read [7] & ((\fifo_read_inst|cnt_read[6]~23 ) # (GND))) +// \fifo_read_inst|cnt_read[7]~25 = CARRY((!\fifo_read_inst|cnt_read[6]~23 ) # (!\fifo_read_inst|cnt_read [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[6]~23 ), + .combout(\fifo_read_inst|cnt_read[7]~24_combout ), + .cout(\fifo_read_inst|cnt_read[7]~25 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[7]~24 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|cnt_read[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N16 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[8]~26 ( +// Equation(s): +// \fifo_read_inst|cnt_read[8]~26_combout = (\fifo_read_inst|cnt_read [8] & (\fifo_read_inst|cnt_read[7]~25 $ (GND))) # (!\fifo_read_inst|cnt_read [8] & (!\fifo_read_inst|cnt_read[7]~25 & VCC)) +// \fifo_read_inst|cnt_read[8]~27 = CARRY((\fifo_read_inst|cnt_read [8] & !\fifo_read_inst|cnt_read[7]~25 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [8]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[7]~25 ), + .combout(\fifo_read_inst|cnt_read[8]~26_combout ), + .cout(\fifo_read_inst|cnt_read[8]~27 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[8]~26 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N18 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[9]~28 ( +// Equation(s): +// \fifo_read_inst|cnt_read[9]~28_combout = \fifo_read_inst|cnt_read [9] $ (\fifo_read_inst|cnt_read[8]~27 ) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|cnt_read[8]~27 ), + .combout(\fifo_read_inst|cnt_read[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[9]~28 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|cnt_read[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N10 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[4]~21 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[4]~21_combout = (\uart_rx_inst|baud_cnt [4] & (\uart_rx_inst|baud_cnt[3]~20 $ (GND))) # (!\uart_rx_inst|baud_cnt [4] & (!\uart_rx_inst|baud_cnt[3]~20 & VCC)) +// \uart_rx_inst|baud_cnt[4]~22 = CARRY((\uart_rx_inst|baud_cnt [4] & !\uart_rx_inst|baud_cnt[3]~20 )) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[3]~20 ), + .combout(\uart_rx_inst|baud_cnt[4]~21_combout ), + .cout(\uart_rx_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X22_Y22_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 .lut_mask = 16'h8C9D; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N13 +dffeas \uart_tx_inst|bit_cnt[0] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[0]~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|Mux0~0 ( +// Equation(s): +// \uart_tx_inst|Mux0~0_combout = (\uart_tx_inst|bit_cnt [1] & (((\uart_tx_inst|bit_cnt [0])))) # (!\uart_tx_inst|bit_cnt [1] & ((\uart_tx_inst|bit_cnt [0] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b +// [4])) # (!\uart_tx_inst|bit_cnt [0] & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3]))))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [4]), + .datab(\uart_tx_inst|bit_cnt [1]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3]), + .datad(\uart_tx_inst|bit_cnt [0]), + .cin(gnd), + .combout(\uart_tx_inst|Mux0~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Mux0~0 .lut_mask = 16'hEE30; +defparam \uart_tx_inst|Mux0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y15_N8 +cycloneive_lcell_comb \uart_tx_inst|Mux0~1 ( +// Equation(s): +// \uart_tx_inst|Mux0~1_combout = (\uart_tx_inst|Mux0~0_combout & (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6]) # (!\uart_tx_inst|bit_cnt [1])))) # (!\uart_tx_inst|Mux0~0_combout & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5] & ((\uart_tx_inst|bit_cnt [1])))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6]), + .datac(\uart_tx_inst|Mux0~0_combout ), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Mux0~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Mux0~1 .lut_mask = 16'hCAF0; +defparam \uart_tx_inst|Mux0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N16 +cycloneive_lcell_comb \uart_tx_inst|tx~0 ( +// Equation(s): +// \uart_tx_inst|tx~0_combout = (\uart_tx_inst|bit_cnt [0] & ((\uart_tx_inst|bit_cnt [1] & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2]))) # (!\uart_tx_inst|bit_cnt [1] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0])))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~0 .lut_mask = 16'hA088; +defparam \uart_tx_inst|tx~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N10 +cycloneive_lcell_comb \uart_tx_inst|tx~1 ( +// Equation(s): +// \uart_tx_inst|tx~1_combout = (\uart_tx_inst|tx~0_combout ) # ((!\uart_tx_inst|bit_cnt [0] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1] & \uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|tx~0_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~1 .lut_mask = 16'hDCCC; +defparam \uart_tx_inst|tx~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N22 +cycloneive_lcell_comb \uart_tx_inst|tx~2 ( +// Equation(s): +// \uart_tx_inst|tx~2_combout = (\uart_tx_inst|bit_flag~q & ((\uart_tx_inst|bit_cnt [2] & (\uart_tx_inst|Mux0~1_combout )) # (!\uart_tx_inst|bit_cnt [2] & ((\uart_tx_inst|tx~1_combout ))))) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\uart_tx_inst|Mux0~1_combout ), + .datad(\uart_tx_inst|tx~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|tx~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~2 .lut_mask = 16'hA280; +defparam \uart_tx_inst|tx~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N27 +dffeas \uart_tx_inst|bit_cnt[3] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[3]~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X21_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 .lut_mask = 16'h3111; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ) # (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 .lut_mask = 16'hAFEF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 .lut_mask = 16'h0CAE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N20 +cycloneive_lcell_comb \uart_tx_inst|Add1~0 ( +// Equation(s): +// \uart_tx_inst|Add1~0_combout = \uart_tx_inst|bit_cnt [2] $ (((\uart_tx_inst|bit_cnt [0] & \uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(gnd), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Add1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Add1~0 .lut_mask = 16'h5AF0; +defparam \uart_tx_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N30 +cycloneive_lcell_comb \uart_tx_inst|Add1~1 ( +// Equation(s): +// \uart_tx_inst|Add1~1_combout = \uart_tx_inst|bit_cnt [3] $ (((\uart_tx_inst|bit_cnt [0] & (\uart_tx_inst|bit_cnt [2] & \uart_tx_inst|bit_cnt [1])))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\uart_tx_inst|bit_cnt [3]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Add1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Add1~1 .lut_mask = 16'h78F0; +defparam \uart_tx_inst|Add1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N26 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[3]~4 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[3]~4_combout = (!\uart_tx_inst|always0~1_combout & ((\uart_tx_inst|always3~0_combout & ((\uart_tx_inst|bit_cnt [3]))) # (!\uart_tx_inst|always3~0_combout & (\uart_tx_inst|Add1~1_combout )))) + + .dataa(\uart_tx_inst|Add1~1_combout ), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [3]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[3]~4_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[3]~4 .lut_mask = 16'h00E2; +defparam \uart_tx_inst|bit_cnt[3]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 .lut_mask = 16'h0400; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N29 +dffeas read_valid( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\read_valid~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\read_valid~q ), + .prn(vcc)); +// synopsys translate_off +defparam read_valid.is_wysiwyg = "true"; +defparam read_valid.power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 .lut_mask = 16'h000F; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout = (\read_valid~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & ((\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout )))) + + .dataa(\read_valid~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 .lut_mask = 16'h8088; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|Equal1~3 ( +// Equation(s): +// \uart_tx_inst|Equal1~3_combout = (\uart_tx_inst|baud_cnt [12] & \uart_tx_inst|baud_cnt [10]) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [12]), + .datac(gnd), + .datad(\uart_tx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~3 .lut_mask = 16'hCC00; +defparam \uart_tx_inst|Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N2 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout = (\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] & !\fifo_read_inst|rd_en~q ))) + + .dataa(\fifo_read_inst|read_en_dly~q ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 .lut_mask = 16'h0080; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N0 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N13 +dffeas \fifo_read_inst|bit_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Add2~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal1~0 ( +// Equation(s): +// \fifo_read_inst|Equal1~0_combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~0 .lut_mask = 16'h0001; +defparam \fifo_read_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N2 +cycloneive_lcell_comb \fifo_read_inst|Equal1~1 ( +// Equation(s): +// \fifo_read_inst|Equal1~1_combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & (\fifo_read_inst|Equal1~0_combout & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|Equal1~0_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~1 .lut_mask = 16'h0004; +defparam \fifo_read_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .lut_mask = 16'h50F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X27_Y23_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 .lut_mask = 16'h9966; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X14_Y20_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N25 +dffeas \cnt_wait[15] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[15]~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[15]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[15] .is_wysiwyg = "true"; +defparam \cnt_wait[15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N27 +dffeas \cnt_wait[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[14]~3_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[14]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[14] .is_wysiwyg = "true"; +defparam \cnt_wait[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N21 +dffeas \cnt_wait[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[13]~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[13]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[13] .is_wysiwyg = "true"; +defparam \cnt_wait[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N23 +dffeas \cnt_wait[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[12]~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[12]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[12] .is_wysiwyg = "true"; +defparam \cnt_wait[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N8 +cycloneive_lcell_comb \Equal0~0 ( +// Equation(s): +// \Equal0~0_combout = (!cnt_wait[12] & (!cnt_wait[15] & (!cnt_wait[14] & !cnt_wait[13]))) + + .dataa(cnt_wait[12]), + .datab(cnt_wait[15]), + .datac(cnt_wait[14]), + .datad(cnt_wait[13]), + .cin(gnd), + .combout(\Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~0 .lut_mask = 16'h0001; +defparam \Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y26_N23 +dffeas \cnt_wait[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[9]~6_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[9]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[9] .is_wysiwyg = "true"; +defparam \cnt_wait[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N9 +dffeas \cnt_wait[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[11]~7_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[11]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[11] .is_wysiwyg = "true"; +defparam \cnt_wait[11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N11 +dffeas \cnt_wait[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[10]~8_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[10]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[10] .is_wysiwyg = "true"; +defparam \cnt_wait[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N5 +dffeas \cnt_wait[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[8]~9_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[8]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[8] .is_wysiwyg = "true"; +defparam \cnt_wait[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N14 +cycloneive_lcell_comb \Equal0~1 ( +// Equation(s): +// \Equal0~1_combout = (!cnt_wait[10] & (!cnt_wait[8] & (cnt_wait[9] & !cnt_wait[11]))) + + .dataa(cnt_wait[10]), + .datab(cnt_wait[8]), + .datac(cnt_wait[9]), + .datad(cnt_wait[11]), + .cin(gnd), + .combout(\Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~1 .lut_mask = 16'h0010; +defparam \Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N3 +dffeas \cnt_wait[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[7]~10_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[7]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[7] .is_wysiwyg = "true"; +defparam \cnt_wait[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N13 +dffeas \cnt_wait[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[6]~11_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[6]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[6] .is_wysiwyg = "true"; +defparam \cnt_wait[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N15 +dffeas \cnt_wait[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[5]~12_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[5]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[5] .is_wysiwyg = "true"; +defparam \cnt_wait[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N17 +dffeas \cnt_wait[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[4]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[4]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[4] .is_wysiwyg = "true"; +defparam \cnt_wait[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N10 +cycloneive_lcell_comb \Equal0~2 ( +// Equation(s): +// \Equal0~2_combout = (cnt_wait[6] & (cnt_wait[7] & (cnt_wait[5] & !cnt_wait[4]))) + + .dataa(cnt_wait[6]), + .datab(cnt_wait[7]), + .datac(cnt_wait[5]), + .datad(cnt_wait[4]), + .cin(gnd), + .combout(\Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~2 .lut_mask = 16'h0080; +defparam \Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N5 +dffeas \cnt_wait[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[3]~14_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[3]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[3] .is_wysiwyg = "true"; +defparam \cnt_wait[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N7 +dffeas \cnt_wait[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[2]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[2]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[2] .is_wysiwyg = "true"; +defparam \cnt_wait[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N1 +dffeas \cnt_wait[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[1]~16_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[1]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[1] .is_wysiwyg = "true"; +defparam \cnt_wait[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N19 +dffeas \cnt_wait[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[0]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[0]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[0] .is_wysiwyg = "true"; +defparam \cnt_wait[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N28 +cycloneive_lcell_comb \Equal0~3 ( +// Equation(s): +// \Equal0~3_combout = (!cnt_wait[0] & (cnt_wait[1] & (cnt_wait[3] & cnt_wait[2]))) + + .dataa(cnt_wait[0]), + .datab(cnt_wait[1]), + .datac(cnt_wait[3]), + .datad(cnt_wait[2]), + .cin(gnd), + .combout(\Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~3 .lut_mask = 16'h4000; +defparam \Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N30 +cycloneive_lcell_comb \Equal0~4 ( +// Equation(s): +// \Equal0~4_combout = (\Equal0~2_combout & (\Equal0~3_combout & (\Equal0~0_combout & \Equal0~1_combout ))) + + .dataa(\Equal0~2_combout ), + .datab(\Equal0~3_combout ), + .datac(\Equal0~0_combout ), + .datad(\Equal0~1_combout ), + .cin(gnd), + .combout(\Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~4 .lut_mask = 16'h8000; +defparam \Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N16 +cycloneive_lcell_comb \read_valid~0 ( +// Equation(s): +// \read_valid~0_combout = (\Equal0~4_combout ) # ((\read_valid~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ) # (!\Equal2~1_combout )))) + + .dataa(\Equal2~1_combout ), + .datab(\Equal0~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .datad(\read_valid~q ), + .cin(gnd), + .combout(\read_valid~0_combout ), + .cout()); +// synopsys translate_off +defparam \read_valid~0 .lut_mask = 16'hFDCC; +defparam \read_valid~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N28 +cycloneive_lcell_comb \read_valid~1 ( +// Equation(s): +// \read_valid~1_combout = (\read_valid~0_combout ) # ((\read_valid~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ) # (!\Equal2~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datab(\Equal2~0_combout ), + .datac(\read_valid~q ), + .datad(\read_valid~0_combout ), + .cin(gnd), + .combout(\read_valid~1_combout ), + .cout()); +// synopsys translate_off +defparam \read_valid~1 .lut_mask = 16'hFFB0; +defparam \read_valid~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 .lut_mask = 16'hECFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk +// [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3] $ (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 .lut_mask = 16'h6AAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N10 +cycloneive_lcell_comb \fifo_read_inst|Equal1~2 ( +// Equation(s): +// \fifo_read_inst|Equal1~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] & \fifo_read_inst|Equal1~1_combout )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datac(gnd), + .datad(\fifo_read_inst|Equal1~1_combout ), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~2 .lut_mask = 16'h2200; +defparam \fifo_read_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N2 +cycloneive_lcell_comb \fifo_read_inst|Equal5~1 ( +// Equation(s): +// \fifo_read_inst|Equal5~1_combout = (\fifo_read_inst|baud_cnt [11] & (!\fifo_read_inst|baud_cnt [10] & (\fifo_read_inst|baud_cnt [9] & !\fifo_read_inst|baud_cnt [6]))) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(\fifo_read_inst|baud_cnt [9]), + .datad(\fifo_read_inst|baud_cnt [6]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~1 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h4182; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'hF000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'hC000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 .lut_mask = 16'hCA0A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'h8200; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout )) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'hF5A0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'hE0C2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N0 +cycloneive_lcell_comb \Equal1~0 ( +// Equation(s): +// \Equal1~0_combout = (data_num[2]) # (((data_num[0]) # (!data_num[1])) # (!data_num[3])) + + .dataa(data_num[2]), + .datab(data_num[3]), + .datac(data_num[0]), + .datad(data_num[1]), + .cin(gnd), + .combout(\Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~0 .lut_mask = 16'hFBFF; +defparam \Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N2 +cycloneive_lcell_comb \Equal1~1 ( +// Equation(s): +// \Equal1~1_combout = (data_num[6]) # ((data_num[5]) # ((data_num[7]) # (data_num[4]))) + + .dataa(data_num[6]), + .datab(data_num[5]), + .datac(data_num[7]), + .datad(data_num[4]), + .cin(gnd), + .combout(\Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~1 .lut_mask = 16'hFFFE; +defparam \Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N4 +cycloneive_lcell_comb \Equal1~2 ( +// Equation(s): +// \Equal1~2_combout = (data_num[11]) # ((data_num[10]) # ((data_num[9]) # (data_num[8]))) + + .dataa(data_num[11]), + .datab(data_num[10]), + .datac(data_num[9]), + .datad(data_num[8]), + .cin(gnd), + .combout(\Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~2 .lut_mask = 16'hFFFE; +defparam \Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N24 +cycloneive_lcell_comb \Equal1~3 ( +// Equation(s): +// \Equal1~3_combout = (data_num[15]) # ((data_num[13]) # ((data_num[14]) # (data_num[12]))) + + .dataa(data_num[15]), + .datab(data_num[13]), + .datac(data_num[14]), + .datad(data_num[12]), + .cin(gnd), + .combout(\Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~3 .lut_mask = 16'hFFFE; +defparam \Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N6 +cycloneive_lcell_comb \Equal1~4 ( +// Equation(s): +// \Equal1~4_combout = (\Equal1~3_combout ) # ((\Equal1~1_combout ) # ((\Equal1~2_combout ) # (\Equal1~0_combout ))) + + .dataa(\Equal1~3_combout ), + .datab(\Equal1~1_combout ), + .datac(\Equal1~2_combout ), + .datad(\Equal1~0_combout ), + .cin(gnd), + .combout(\Equal1~4_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~4 .lut_mask = 16'hFFFE; +defparam \Equal1~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N26 +cycloneive_lcell_comb \Equal1~5 ( +// Equation(s): +// \Equal1~5_combout = (data_num[18]) # ((data_num[19]) # ((data_num[16]) # (data_num[17]))) + + .dataa(data_num[18]), + .datab(data_num[19]), + .datac(data_num[16]), + .datad(data_num[17]), + .cin(gnd), + .combout(\Equal1~5_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~5 .lut_mask = 16'hFFFE; +defparam \Equal1~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N28 +cycloneive_lcell_comb \Equal1~6 ( +// Equation(s): +// \Equal1~6_combout = (data_num[22]) # ((data_num[21]) # ((data_num[23]) # (data_num[20]))) + + .dataa(data_num[22]), + .datab(data_num[21]), + .datac(data_num[23]), + .datad(data_num[20]), + .cin(gnd), + .combout(\Equal1~6_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~6 .lut_mask = 16'hFFFE; +defparam \Equal1~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N18 +cycloneive_lcell_comb \cnt_wait[8]~0 ( +// Equation(s): +// \cnt_wait[8]~0_combout = (!\Equal0~4_combout & ((\Equal1~4_combout ) # ((\Equal1~5_combout ) # (\Equal1~6_combout )))) + + .dataa(\Equal1~4_combout ), + .datab(\Equal0~4_combout ), + .datac(\Equal1~5_combout ), + .datad(\Equal1~6_combout ), + .cin(gnd), + .combout(\cnt_wait[8]~0_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[8]~0 .lut_mask = 16'h3332; +defparam \cnt_wait[8]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N12 +cycloneive_lcell_comb \cnt_wait[15]~1 ( +// Equation(s): +// \cnt_wait[15]~1_combout = (\Equal1~4_combout ) # ((\Equal0~4_combout ) # ((\Equal1~5_combout ) # (\Equal1~6_combout ))) + + .dataa(\Equal1~4_combout ), + .datab(\Equal0~4_combout ), + .datac(\Equal1~5_combout ), + .datad(\Equal1~6_combout ), + .cin(gnd), + .combout(\cnt_wait[15]~1_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[15]~1 .lut_mask = 16'hFFFE; +defparam \cnt_wait[15]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N24 +cycloneive_lcell_comb \cnt_wait[15]~2 ( +// Equation(s): +// \cnt_wait[15]~2_combout = (\Add1~30_combout & (((\cnt_wait[8]~0_combout & cnt_wait[15])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~30_combout & (\cnt_wait[8]~0_combout & (cnt_wait[15]))) + + .dataa(\Add1~30_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[15]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[15]~2_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[15]~2 .lut_mask = 16'hC0EA; +defparam \cnt_wait[15]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N26 +cycloneive_lcell_comb \cnt_wait[14]~3 ( +// Equation(s): +// \cnt_wait[14]~3_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[14] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~28_combout ) # ((cnt_wait[14] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~28_combout ), + .datac(cnt_wait[14]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[14]~3_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[14]~3 .lut_mask = 16'hF444; +defparam \cnt_wait[14]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N20 +cycloneive_lcell_comb \cnt_wait[13]~4 ( +// Equation(s): +// \cnt_wait[13]~4_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[13] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~26_combout ) # ((cnt_wait[13] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~26_combout ), + .datac(cnt_wait[13]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[13]~4_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[13]~4 .lut_mask = 16'hF444; +defparam \cnt_wait[13]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N22 +cycloneive_lcell_comb \cnt_wait[12]~5 ( +// Equation(s): +// \cnt_wait[12]~5_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[12] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~24_combout ) # ((cnt_wait[12] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~24_combout ), + .datac(cnt_wait[12]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[12]~5_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[12]~5 .lut_mask = 16'hF444; +defparam \cnt_wait[12]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N22 +cycloneive_lcell_comb \cnt_wait[9]~6 ( +// Equation(s): +// \cnt_wait[9]~6_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[9] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~18_combout ) # ((cnt_wait[9] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~18_combout ), + .datac(cnt_wait[9]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[9]~6_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[9]~6 .lut_mask = 16'hF444; +defparam \cnt_wait[9]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N8 +cycloneive_lcell_comb \cnt_wait[11]~7 ( +// Equation(s): +// \cnt_wait[11]~7_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[11] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~22_combout ) # ((cnt_wait[11] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~22_combout ), + .datac(cnt_wait[11]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[11]~7_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[11]~7 .lut_mask = 16'hF444; +defparam \cnt_wait[11]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N10 +cycloneive_lcell_comb \cnt_wait[10]~8 ( +// Equation(s): +// \cnt_wait[10]~8_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[10] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~20_combout ) # ((cnt_wait[10] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~20_combout ), + .datac(cnt_wait[10]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[10]~8_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[10]~8 .lut_mask = 16'hF444; +defparam \cnt_wait[10]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N4 +cycloneive_lcell_comb \cnt_wait[8]~9 ( +// Equation(s): +// \cnt_wait[8]~9_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[8] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~16_combout ) # ((cnt_wait[8] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~16_combout ), + .datac(cnt_wait[8]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[8]~9_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[8]~9 .lut_mask = 16'hF444; +defparam \cnt_wait[8]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N2 +cycloneive_lcell_comb \cnt_wait[7]~10 ( +// Equation(s): +// \cnt_wait[7]~10_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[7] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~14_combout ) # ((cnt_wait[7] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~14_combout ), + .datac(cnt_wait[7]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[7]~10_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[7]~10 .lut_mask = 16'hF444; +defparam \cnt_wait[7]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N12 +cycloneive_lcell_comb \cnt_wait[6]~11 ( +// Equation(s): +// \cnt_wait[6]~11_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[6] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~12_combout ) # ((cnt_wait[6] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~12_combout ), + .datac(cnt_wait[6]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[6]~11_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[6]~11 .lut_mask = 16'hF444; +defparam \cnt_wait[6]~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N14 +cycloneive_lcell_comb \cnt_wait[5]~12 ( +// Equation(s): +// \cnt_wait[5]~12_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[5] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~10_combout ) # ((cnt_wait[5] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~10_combout ), + .datac(cnt_wait[5]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[5]~12_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[5]~12 .lut_mask = 16'hF444; +defparam \cnt_wait[5]~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N16 +cycloneive_lcell_comb \cnt_wait[4]~13 ( +// Equation(s): +// \cnt_wait[4]~13_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[4] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~8_combout ) # ((cnt_wait[4] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~8_combout ), + .datac(cnt_wait[4]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[4]~13_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[4]~13 .lut_mask = 16'hF444; +defparam \cnt_wait[4]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N4 +cycloneive_lcell_comb \cnt_wait[3]~14 ( +// Equation(s): +// \cnt_wait[3]~14_combout = (\Add1~6_combout & (((\cnt_wait[8]~0_combout & cnt_wait[3])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~6_combout & (\cnt_wait[8]~0_combout & (cnt_wait[3]))) + + .dataa(\Add1~6_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[3]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[3]~14_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[3]~14 .lut_mask = 16'hC0EA; +defparam \cnt_wait[3]~14 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N6 +cycloneive_lcell_comb \cnt_wait[2]~15 ( +// Equation(s): +// \cnt_wait[2]~15_combout = (\Add1~4_combout & (((\cnt_wait[8]~0_combout & cnt_wait[2])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~4_combout & (\cnt_wait[8]~0_combout & (cnt_wait[2]))) + + .dataa(\Add1~4_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[2]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[2]~15_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[2]~15 .lut_mask = 16'hC0EA; +defparam \cnt_wait[2]~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N0 +cycloneive_lcell_comb \cnt_wait[1]~16 ( +// Equation(s): +// \cnt_wait[1]~16_combout = (\Add1~2_combout & (((\cnt_wait[8]~0_combout & cnt_wait[1])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~2_combout & (\cnt_wait[8]~0_combout & (cnt_wait[1]))) + + .dataa(\Add1~2_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[1]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[1]~16_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[1]~16 .lut_mask = 16'hC0EA; +defparam \cnt_wait[1]~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N18 +cycloneive_lcell_comb \cnt_wait[0]~17 ( +// Equation(s): +// \cnt_wait[0]~17_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[0] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~0_combout ) # ((cnt_wait[0] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~0_combout ), + .datac(cnt_wait[0]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[0]~17_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[0]~17 .lut_mask = 16'hF444; +defparam \cnt_wait[0]~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h0084; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ) # +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout +// & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'hAAEA; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h4182; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'hB830; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N1 +dffeas \fifo_read_inst|rd_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|rd_flag~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|rd_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|rd_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|rd_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N30 +cycloneive_lcell_comb \fifo_read_inst|Equal4~2 ( +// Equation(s): +// \fifo_read_inst|Equal4~2_combout = (!\fifo_read_inst|baud_cnt [11] & (\fifo_read_inst|baud_cnt [10] & (!\fifo_read_inst|baud_cnt [9] & \fifo_read_inst|baud_cnt [6]))) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(\fifo_read_inst|baud_cnt [9]), + .datad(\fifo_read_inst|baud_cnt [6]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~2 .lut_mask = 16'h0400; +defparam \fifo_read_inst|Equal4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout & ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 .lut_mask = 16'h1030; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N23 +dffeas \uart_rx_inst|bit_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|bit_cnt~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal2~0 ( +// Equation(s): +// \fifo_read_inst|Equal2~0_combout = (\fifo_read_inst|cnt_read [3] & (\fifo_read_inst|cnt_read [1] & (!\fifo_read_inst|cnt_read [2] & !\fifo_read_inst|cnt_read [0]))) + + .dataa(\fifo_read_inst|cnt_read [3]), + .datab(\fifo_read_inst|cnt_read [1]), + .datac(\fifo_read_inst|cnt_read [2]), + .datad(\fifo_read_inst|cnt_read [0]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~0 .lut_mask = 16'h0008; +defparam \fifo_read_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N30 +cycloneive_lcell_comb \fifo_read_inst|Equal2~1 ( +// Equation(s): +// \fifo_read_inst|Equal2~1_combout = (!\fifo_read_inst|cnt_read [6] & (!\fifo_read_inst|cnt_read [7] & (!\fifo_read_inst|cnt_read [4] & !\fifo_read_inst|cnt_read [5]))) + + .dataa(\fifo_read_inst|cnt_read [6]), + .datab(\fifo_read_inst|cnt_read [7]), + .datac(\fifo_read_inst|cnt_read [4]), + .datad(\fifo_read_inst|cnt_read [5]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~1 .lut_mask = 16'h0001; +defparam \fifo_read_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N24 +cycloneive_lcell_comb \fifo_read_inst|Equal2~2 ( +// Equation(s): +// \fifo_read_inst|Equal2~2_combout = (\fifo_read_inst|Equal2~0_combout & (!\fifo_read_inst|cnt_read [9] & (\fifo_read_inst|Equal2~1_combout & !\fifo_read_inst|cnt_read [8]))) + + .dataa(\fifo_read_inst|Equal2~0_combout ), + .datab(\fifo_read_inst|cnt_read [9]), + .datac(\fifo_read_inst|Equal2~1_combout ), + .datad(\fifo_read_inst|cnt_read [8]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~2 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal2~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N0 +cycloneive_lcell_comb \fifo_read_inst|rd_flag~0 ( +// Equation(s): +// \fifo_read_inst|rd_flag~0_combout = (!\fifo_read_inst|Equal2~2_combout & ((\fifo_read_inst|rd_flag~q ) # ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] & +// \fifo_read_inst|Equal1~2_combout )))) + + .dataa(\fifo_read_inst|Equal2~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datac(\fifo_read_inst|rd_flag~q ), + .datad(\fifo_read_inst|Equal1~2_combout ), + .cin(gnd), + .combout(\fifo_read_inst|rd_flag~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|rd_flag~0 .lut_mask = 16'h5450; +defparam \fifo_read_inst|rd_flag~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N22 +cycloneive_lcell_comb \uart_rx_inst|bit_cnt~1 ( +// Equation(s): +// \uart_rx_inst|bit_cnt~1_combout = (\uart_rx_inst|Add1~0_combout & (((!\uart_rx_inst|always4~0_combout ) # (!\uart_rx_inst|bit_flag~q )) # (!\uart_rx_inst|bit_cnt [3]))) + + .dataa(\uart_rx_inst|bit_cnt [3]), + .datab(\uart_rx_inst|Add1~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(\uart_rx_inst|always4~0_combout ), + .cin(gnd), + .combout(\uart_rx_inst|bit_cnt~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt~1 .lut_mask = 16'h4CCC; +defparam \uart_rx_inst|bit_cnt~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N7 +dffeas \uart_rx_inst|work_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|work_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|work_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|work_en .is_wysiwyg = "true"; +defparam \uart_rx_inst|work_en .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y24_N7 +dffeas \uart_rx_inst|start_nedge ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|always3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|start_nedge~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|start_nedge .is_wysiwyg = "true"; +defparam \uart_rx_inst|start_nedge .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N6 +cycloneive_lcell_comb \uart_rx_inst|work_en~0 ( +// Equation(s): +// \uart_rx_inst|work_en~0_combout = (\uart_rx_inst|start_nedge~q ) # ((\uart_rx_inst|work_en~q & !\uart_rx_inst|always4~1_combout )) + + .dataa(gnd), + .datab(\uart_rx_inst|start_nedge~q ), + .datac(\uart_rx_inst|work_en~q ), + .datad(\uart_rx_inst|always4~1_combout ), + .cin(gnd), + .combout(\uart_rx_inst|work_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|work_en~0 .lut_mask = 16'hCCFC; +defparam \uart_rx_inst|work_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N6 +cycloneive_lcell_comb \uart_rx_inst|always3~0 ( +// Equation(s): +// \uart_rx_inst|always3~0_combout = (\uart_rx_inst|rx_reg2~q & !\uart_rx_inst|rx_reg3~q ) + + .dataa(gnd), + .datab(\uart_rx_inst|rx_reg2~q ), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg3~q ), + .cin(gnd), + .combout(\uart_rx_inst|always3~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always3~0 .lut_mask = 16'h00CC; +defparam \uart_rx_inst|always3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[0]~5 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[0]~5_combout = (!\uart_tx_inst|always0~1_combout & (\uart_tx_inst|bit_cnt [0] $ (((\uart_tx_inst|bit_flag~q & \uart_tx_inst|work_en~q ))))) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(\uart_tx_inst|always0~1_combout ), + .datac(\uart_tx_inst|bit_cnt [0]), + .datad(\uart_tx_inst|work_en~q ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[0]~5 .lut_mask = 16'h1230; +defparam \uart_tx_inst|bit_cnt[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y9_N16 +cycloneive_io_obuf \tx~output ( + .i(!\uart_tx_inst|tx~q ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(tx), + .obar()); +// synopsys translate_off +defparam \tx~output .bus_hold = "false"; +defparam \tx~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X1_Y29_N30 +cycloneive_io_obuf \sdram_clk~output ( + .i(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_clk), + .obar()); +// synopsys translate_off +defparam \sdram_clk~output .bus_hold = "false"; +defparam \sdram_clk~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y13_N23 +cycloneive_io_obuf \sdram_cke~output ( + .i(vcc), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cke), + .obar()); +// synopsys translate_off +defparam \sdram_cke~output .bus_hold = "false"; +defparam \sdram_cke~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N9 +cycloneive_io_obuf \sdram_cs_n~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cs_n), + .obar()); +// synopsys translate_off +defparam \sdram_cs_n~output .bus_hold = "false"; +defparam \sdram_cs_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X7_Y29_N16 +cycloneive_io_obuf \sdram_cas_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cas_n), + .obar()); +// synopsys translate_off +defparam \sdram_cas_n~output .bus_hold = "false"; +defparam \sdram_cas_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N16 +cycloneive_io_obuf \sdram_ras_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ras_n), + .obar()); +// synopsys translate_off +defparam \sdram_ras_n~output .bus_hold = "false"; +defparam \sdram_ras_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X7_Y29_N9 +cycloneive_io_obuf \sdram_we_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_we_n), + .obar()); +// synopsys translate_off +defparam \sdram_we_n~output .bus_hold = "false"; +defparam \sdram_we_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N16 +cycloneive_io_obuf \sdram_ba[0]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ba[0]), + .obar()); +// synopsys translate_off +defparam \sdram_ba[0]~output .bus_hold = "false"; +defparam \sdram_ba[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X1_Y29_N2 +cycloneive_io_obuf \sdram_ba[1]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ba[1]), + .obar()); +// synopsys translate_off +defparam \sdram_ba[1]~output .bus_hold = "false"; +defparam \sdram_ba[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N9 +cycloneive_io_obuf \sdram_addr[0]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[0]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[0]~output .bus_hold = "false"; +defparam \sdram_addr[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y27_N16 +cycloneive_io_obuf \sdram_addr[1]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[1]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[1]~output .bus_hold = "false"; +defparam \sdram_addr[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y27_N9 +cycloneive_io_obuf \sdram_addr[2]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[2]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[2]~output .bus_hold = "false"; +defparam \sdram_addr[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N23 +cycloneive_io_obuf \sdram_addr[3]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[3]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[3]~output .bus_hold = "false"; +defparam \sdram_addr[3]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N16 +cycloneive_io_obuf \sdram_addr[4]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[4]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[4]~output .bus_hold = "false"; +defparam \sdram_addr[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y24_N16 +cycloneive_io_obuf \sdram_addr[5]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[5]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[5]~output .bus_hold = "false"; +defparam \sdram_addr[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y23_N2 +cycloneive_io_obuf \sdram_addr[6]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[6]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[6]~output .bus_hold = "false"; +defparam \sdram_addr[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y24_N23 +cycloneive_io_obuf \sdram_addr[7]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[7]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[7]~output .bus_hold = "false"; +defparam \sdram_addr[7]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N16 +cycloneive_io_obuf \sdram_addr[8]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[8]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[8]~output .bus_hold = "false"; +defparam \sdram_addr[8]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y12_N16 +cycloneive_io_obuf \sdram_addr[9]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[9]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[9]~output .bus_hold = "false"; +defparam \sdram_addr[9]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N2 +cycloneive_io_obuf \sdram_addr[10]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[10]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[10]~output .bus_hold = "false"; +defparam \sdram_addr[10]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y12_N23 +cycloneive_io_obuf \sdram_addr[11]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[11]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[11]~output .bus_hold = "false"; +defparam \sdram_addr[11]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y13_N16 +cycloneive_io_obuf \sdram_addr[12]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[12]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[12]~output .bus_hold = "false"; +defparam \sdram_addr[12]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N2 +cycloneive_io_obuf \sdram_dqm[0]~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dqm[0]), + .obar()); +// synopsys translate_off +defparam \sdram_dqm[0]~output .bus_hold = "false"; +defparam \sdram_dqm[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y20_N2 +cycloneive_io_obuf \sdram_dqm[1]~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dqm[1]), + .obar()); +// synopsys translate_off +defparam \sdram_dqm[1]~output .bus_hold = "false"; +defparam \sdram_dqm[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N9 +cycloneive_io_obuf \sdram_dq[0]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[0]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[0]~output .bus_hold = "false"; +defparam \sdram_dq[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N2 +cycloneive_io_obuf \sdram_dq[1]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[1]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[1]~output .bus_hold = "false"; +defparam \sdram_dq[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X9_Y29_N2 +cycloneive_io_obuf \sdram_dq[2]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[2]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[2]~output .bus_hold = "false"; +defparam \sdram_dq[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X14_Y29_N30 +cycloneive_io_obuf \sdram_dq[3]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[3]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[3]~output .bus_hold = "false"; +defparam \sdram_dq[3]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X14_Y29_N23 +cycloneive_io_obuf \sdram_dq[4]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[4]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[4]~output .bus_hold = "false"; +defparam \sdram_dq[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X9_Y29_N9 +cycloneive_io_obuf \sdram_dq[5]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[5]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[5]~output .bus_hold = "false"; +defparam \sdram_dq[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N16 +cycloneive_io_obuf \sdram_dq[6]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[6]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[6]~output .bus_hold = "false"; +defparam \sdram_dq[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N23 +cycloneive_io_obuf \sdram_dq[7]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[7]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[7]~output .bus_hold = "false"; +defparam \sdram_dq[7]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y20_N9 +cycloneive_io_obuf \sdram_dq[8]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [8]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[8]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[8]~output .bus_hold = "false"; +defparam \sdram_dq[8]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N30 +cycloneive_io_obuf \sdram_dq[9]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [9]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[9]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[9]~output .bus_hold = "false"; +defparam \sdram_dq[9]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y25_N2 +cycloneive_io_obuf \sdram_dq[10]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [10]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[10]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[10]~output .bus_hold = "false"; +defparam \sdram_dq[10]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N9 +cycloneive_io_obuf \sdram_dq[11]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [11]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[11]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[11]~output .bus_hold = "false"; +defparam \sdram_dq[11]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y23_N9 +cycloneive_io_obuf \sdram_dq[12]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [12]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[12]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[12]~output .bus_hold = "false"; +defparam \sdram_dq[12]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N9 +cycloneive_io_obuf \sdram_dq[13]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [13]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[13]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[13]~output .bus_hold = "false"; +defparam \sdram_dq[13]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N23 +cycloneive_io_obuf \sdram_dq[14]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [14]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[14]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[14]~output .bus_hold = "false"; +defparam \sdram_dq[14]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N2 +cycloneive_io_obuf \sdram_dq[15]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [15]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[15]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[15]~output .bus_hold = "false"; +defparam \sdram_dq[15]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N2 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[0]~13 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[0]~13_combout = (\uart_rx_inst|work_en~q & (\uart_rx_inst|baud_cnt [0] $ (VCC))) # (!\uart_rx_inst|work_en~q & (\uart_rx_inst|baud_cnt [0] & VCC)) +// \uart_rx_inst|baud_cnt[0]~14 = CARRY((\uart_rx_inst|work_en~q & \uart_rx_inst|baud_cnt [0])) + + .dataa(\uart_rx_inst|work_en~q ), + .datab(\uart_rx_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_rx_inst|baud_cnt[0]~13_combout ), + .cout(\uart_rx_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \uart_rx_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X41_Y15_N22 +cycloneive_io_ibuf \sys_clk~input ( + .i(sys_clk), + .ibar(gnd), + .o(\sys_clk~input_o )); +// synopsys translate_off +defparam \sys_clk~input .bus_hold = "false"; +defparam \sys_clk~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: PLL_2 +cycloneive_pll \clk_gen_inst|altpll_component|auto_generated|pll1 ( + .areset(!\sys_rst_n~input_o ), + .pfdena(vcc), + .fbin(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ), + .phaseupdown(gnd), + .phasestep(gnd), + .scandata(gnd), + .scanclk(gnd), + .scanclkena(vcc), + .configupdate(gnd), + .clkswitch(gnd), + .inclk({gnd,\sys_clk~input_o }), + .phasecounterselect(3'b000), + .phasedone(), + .scandataout(), + .scandone(), + .activeclock(), + .locked(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .vcooverrange(), + .vcounderrange(), + .fbout(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ), + .clk(\clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus ), + .clkbad()); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .auto_settings = "false"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .bandwidth_type = "medium"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_high = 6; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_low = 6; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_high = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_low = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_high = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_low = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_high = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_initial = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_low = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_mode = "bypass"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_high = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_initial = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_low = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_mode = "bypass"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .charge_pump_current_bits = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_counter = "c0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_multiply_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_counter = "c1"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_multiply_by = 2; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_counter = "c2"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_multiply_by = 2; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_phase_shift = "-833"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_counter = "unused"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_counter = "unused"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .compensate_clock = "clock0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .inclk0_input_frequency = 20000; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .inclk1_input_frequency = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .loop_filter_c_bits = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .loop_filter_r_bits = 27; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m = 12; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .n = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .operation_mode = "normal"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pfd_max = 200000; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pfd_min = 3076; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pll_compensation_delay = 6891; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .self_reset_on_loss_lock = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .simulation_type = "timing"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .switch_over_type = "auto"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_center = 1538; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_frequency_control = "auto"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_max = 3333; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_min = 1538; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_phase_shift_step = 208; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_post_scale = 2; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N24 +cycloneive_lcell_comb \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder ( +// Equation(s): +// \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout = VCC + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder .lut_mask = 16'hFFFF; +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X41_Y4_N1 +cycloneive_io_ibuf \sys_rst_n~input ( + .i(sys_rst_n), + .ibar(gnd), + .o(\sys_rst_n~input_o )); +// synopsys translate_off +defparam \sys_rst_n~input .bus_hold = "false"; +defparam \sys_rst_n~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X27_Y26_N25 +dffeas \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .d(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ), + .prn(vcc)); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync .is_wysiwyg = "true"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N26 +cycloneive_lcell_comb \rst_n~0 ( +// Equation(s): +// \rst_n~0_combout = ((!\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ) # (!\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked )) # (!\sys_rst_n~input_o ) + + .dataa(\sys_rst_n~input_o ), + .datab(gnd), + .datac(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .datad(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ), + .cin(gnd), + .combout(\rst_n~0_combout ), + .cout()); +// synopsys translate_off +defparam \rst_n~0 .lut_mask = 16'h5FFF; +defparam \rst_n~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: CLKCTRL_G17 +cycloneive_clkctrl \rst_n~0clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\rst_n~0_combout }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\rst_n~0clkctrl_outclk )); +// synopsys translate_off +defparam \rst_n~0clkctrl .clock_type = "global clock"; +defparam \rst_n~0clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N6 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[2]~17 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[2]~17_combout = (\uart_rx_inst|baud_cnt [2] & (\uart_rx_inst|baud_cnt[1]~16 $ (GND))) # (!\uart_rx_inst|baud_cnt [2] & (!\uart_rx_inst|baud_cnt[1]~16 & VCC)) +// \uart_rx_inst|baud_cnt[2]~18 = CARRY((\uart_rx_inst|baud_cnt [2] & !\uart_rx_inst|baud_cnt[1]~16 )) + + .dataa(\uart_rx_inst|baud_cnt [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[1]~16 ), + .combout(\uart_rx_inst|baud_cnt[2]~17_combout ), + .cout(\uart_rx_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[2]~17 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N8 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[3]~19 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[3]~19_combout = (\uart_rx_inst|baud_cnt [3] & (!\uart_rx_inst|baud_cnt[2]~18 )) # (!\uart_rx_inst|baud_cnt [3] & ((\uart_rx_inst|baud_cnt[2]~18 ) # (GND))) +// \uart_rx_inst|baud_cnt[3]~20 = CARRY((!\uart_rx_inst|baud_cnt[2]~18 ) # (!\uart_rx_inst|baud_cnt [3])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [3]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[2]~18 ), + .combout(\uart_rx_inst|baud_cnt[3]~19_combout ), + .cout(\uart_rx_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[3]~19 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N9 +dffeas \uart_rx_inst|baud_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N12 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[5]~23 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[5]~23_combout = (\uart_rx_inst|baud_cnt [5] & (!\uart_rx_inst|baud_cnt[4]~22 )) # (!\uart_rx_inst|baud_cnt [5] & ((\uart_rx_inst|baud_cnt[4]~22 ) # (GND))) +// \uart_rx_inst|baud_cnt[5]~24 = CARRY((!\uart_rx_inst|baud_cnt[4]~22 ) # (!\uart_rx_inst|baud_cnt [5])) + + .dataa(\uart_rx_inst|baud_cnt [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[4]~22 ), + .combout(\uart_rx_inst|baud_cnt[5]~23_combout ), + .cout(\uart_rx_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[5]~23 .lut_mask = 16'h5A5F; +defparam \uart_rx_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N13 +dffeas \uart_rx_inst|baud_cnt[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N30 +cycloneive_lcell_comb \uart_rx_inst|Equal1~1 ( +// Equation(s): +// \uart_rx_inst|Equal1~1_combout = (\uart_rx_inst|baud_cnt [4] & (\uart_rx_inst|baud_cnt [2] & (!\uart_rx_inst|baud_cnt [3] & !\uart_rx_inst|baud_cnt [5]))) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(\uart_rx_inst|baud_cnt [2]), + .datac(\uart_rx_inst|baud_cnt [3]), + .datad(\uart_rx_inst|baud_cnt [5]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~1 .lut_mask = 16'h0008; +defparam \uart_rx_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N14 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[6]~25 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[6]~25_combout = (\uart_rx_inst|baud_cnt [6] & (\uart_rx_inst|baud_cnt[5]~24 $ (GND))) # (!\uart_rx_inst|baud_cnt [6] & (!\uart_rx_inst|baud_cnt[5]~24 & VCC)) +// \uart_rx_inst|baud_cnt[6]~26 = CARRY((\uart_rx_inst|baud_cnt [6] & !\uart_rx_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[5]~24 ), + .combout(\uart_rx_inst|baud_cnt[6]~25_combout ), + .cout(\uart_rx_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N15 +dffeas \uart_rx_inst|baud_cnt[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N16 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[7]~27 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[7]~27_combout = (\uart_rx_inst|baud_cnt [7] & (!\uart_rx_inst|baud_cnt[6]~26 )) # (!\uart_rx_inst|baud_cnt [7] & ((\uart_rx_inst|baud_cnt[6]~26 ) # (GND))) +// \uart_rx_inst|baud_cnt[7]~28 = CARRY((!\uart_rx_inst|baud_cnt[6]~26 ) # (!\uart_rx_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[6]~26 ), + .combout(\uart_rx_inst|baud_cnt[7]~27_combout ), + .cout(\uart_rx_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N17 +dffeas \uart_rx_inst|baud_cnt[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N18 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[8]~29 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[8]~29_combout = (\uart_rx_inst|baud_cnt [8] & (\uart_rx_inst|baud_cnt[7]~28 $ (GND))) # (!\uart_rx_inst|baud_cnt [8] & (!\uart_rx_inst|baud_cnt[7]~28 & VCC)) +// \uart_rx_inst|baud_cnt[8]~30 = CARRY((\uart_rx_inst|baud_cnt [8] & !\uart_rx_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[7]~28 ), + .combout(\uart_rx_inst|baud_cnt[8]~29_combout ), + .cout(\uart_rx_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N19 +dffeas \uart_rx_inst|baud_cnt[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N0 +cycloneive_lcell_comb \uart_rx_inst|Equal1~0 ( +// Equation(s): +// \uart_rx_inst|Equal1~0_combout = (\uart_rx_inst|baud_cnt [0] & (!\uart_rx_inst|baud_cnt [8] & (\uart_rx_inst|baud_cnt [1] & !\uart_rx_inst|baud_cnt [7]))) + + .dataa(\uart_rx_inst|baud_cnt [0]), + .datab(\uart_rx_inst|baud_cnt [8]), + .datac(\uart_rx_inst|baud_cnt [1]), + .datad(\uart_rx_inst|baud_cnt [7]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~0 .lut_mask = 16'h0020; +defparam \uart_rx_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N20 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[9]~31 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[9]~31_combout = (\uart_rx_inst|baud_cnt [9] & (!\uart_rx_inst|baud_cnt[8]~30 )) # (!\uart_rx_inst|baud_cnt [9] & ((\uart_rx_inst|baud_cnt[8]~30 ) # (GND))) +// \uart_rx_inst|baud_cnt[9]~32 = CARRY((!\uart_rx_inst|baud_cnt[8]~30 ) # (!\uart_rx_inst|baud_cnt [9])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [9]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[8]~30 ), + .combout(\uart_rx_inst|baud_cnt[9]~31_combout ), + .cout(\uart_rx_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[9]~31 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N21 +dffeas \uart_rx_inst|baud_cnt[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N22 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[10]~33 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[10]~33_combout = (\uart_rx_inst|baud_cnt [10] & (\uart_rx_inst|baud_cnt[9]~32 $ (GND))) # (!\uart_rx_inst|baud_cnt [10] & (!\uart_rx_inst|baud_cnt[9]~32 & VCC)) +// \uart_rx_inst|baud_cnt[10]~34 = CARRY((\uart_rx_inst|baud_cnt [10] & !\uart_rx_inst|baud_cnt[9]~32 )) + + .dataa(\uart_rx_inst|baud_cnt [10]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[9]~32 ), + .combout(\uart_rx_inst|baud_cnt[10]~33_combout ), + .cout(\uart_rx_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[10]~33 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N24 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[11]~35 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[11]~35_combout = (\uart_rx_inst|baud_cnt [11] & (!\uart_rx_inst|baud_cnt[10]~34 )) # (!\uart_rx_inst|baud_cnt [11] & ((\uart_rx_inst|baud_cnt[10]~34 ) # (GND))) +// \uart_rx_inst|baud_cnt[11]~36 = CARRY((!\uart_rx_inst|baud_cnt[10]~34 ) # (!\uart_rx_inst|baud_cnt [11])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[10]~34 ), + .combout(\uart_rx_inst|baud_cnt[11]~35_combout ), + .cout(\uart_rx_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[11]~35 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N25 +dffeas \uart_rx_inst|baud_cnt[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N8 +cycloneive_lcell_comb \uart_rx_inst|Equal1~2 ( +// Equation(s): +// \uart_rx_inst|Equal1~2_combout = (!\uart_rx_inst|baud_cnt [9] & \uart_rx_inst|baud_cnt [6]) + + .dataa(gnd), + .datab(gnd), + .datac(\uart_rx_inst|baud_cnt [9]), + .datad(\uart_rx_inst|baud_cnt [6]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~2 .lut_mask = 16'h0F00; +defparam \uart_rx_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y25_N23 +dffeas \uart_rx_inst|baud_cnt[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N2 +cycloneive_lcell_comb \uart_rx_inst|Equal1~3 ( +// Equation(s): +// \uart_rx_inst|Equal1~3_combout = (\uart_rx_inst|baud_cnt [12] & (!\uart_rx_inst|baud_cnt [11] & (\uart_rx_inst|Equal1~2_combout & \uart_rx_inst|baud_cnt [10]))) + + .dataa(\uart_rx_inst|baud_cnt [12]), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(\uart_rx_inst|Equal1~2_combout ), + .datad(\uart_rx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~3 .lut_mask = 16'h2000; +defparam \uart_rx_inst|Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N12 +cycloneive_lcell_comb \uart_rx_inst|always5~0 ( +// Equation(s): +// \uart_rx_inst|always5~0_combout = ((\uart_rx_inst|Equal1~1_combout & (\uart_rx_inst|Equal1~0_combout & \uart_rx_inst|Equal1~3_combout ))) # (!\uart_rx_inst|work_en~q ) + + .dataa(\uart_rx_inst|work_en~q ), + .datab(\uart_rx_inst|Equal1~1_combout ), + .datac(\uart_rx_inst|Equal1~0_combout ), + .datad(\uart_rx_inst|Equal1~3_combout ), + .cin(gnd), + .combout(\uart_rx_inst|always5~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always5~0 .lut_mask = 16'hD555; +defparam \uart_rx_inst|always5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y25_N3 +dffeas \uart_rx_inst|baud_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N4 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[1]~15 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[1]~15_combout = (\uart_rx_inst|baud_cnt [1] & (!\uart_rx_inst|baud_cnt[0]~14 )) # (!\uart_rx_inst|baud_cnt [1] & ((\uart_rx_inst|baud_cnt[0]~14 ) # (GND))) +// \uart_rx_inst|baud_cnt[1]~16 = CARRY((!\uart_rx_inst|baud_cnt[0]~14 ) # (!\uart_rx_inst|baud_cnt [1])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [1]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[0]~14 ), + .combout(\uart_rx_inst|baud_cnt[1]~15_combout ), + .cout(\uart_rx_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[1]~15 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N5 +dffeas \uart_rx_inst|baud_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y25_N7 +dffeas \uart_rx_inst|baud_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N28 +cycloneive_lcell_comb \uart_rx_inst|Equal2~0 ( +// Equation(s): +// \uart_rx_inst|Equal2~0_combout = (!\uart_rx_inst|baud_cnt [4] & (!\uart_rx_inst|baud_cnt [2] & (\uart_rx_inst|baud_cnt [3] & \uart_rx_inst|baud_cnt [5]))) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(\uart_rx_inst|baud_cnt [2]), + .datac(\uart_rx_inst|baud_cnt [3]), + .datad(\uart_rx_inst|baud_cnt [5]), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~0 .lut_mask = 16'h1000; +defparam \uart_rx_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N26 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[12]~37 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[12]~37_combout = \uart_rx_inst|baud_cnt [12] $ (!\uart_rx_inst|baud_cnt[11]~36 ) + + .dataa(\uart_rx_inst|baud_cnt [12]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\uart_rx_inst|baud_cnt[11]~36 ), + .combout(\uart_rx_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[12]~37 .lut_mask = 16'hA5A5; +defparam \uart_rx_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N27 +dffeas \uart_rx_inst|baud_cnt[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N20 +cycloneive_lcell_comb \uart_rx_inst|Equal2~1 ( +// Equation(s): +// \uart_rx_inst|Equal2~1_combout = (!\uart_rx_inst|baud_cnt [6] & (\uart_rx_inst|baud_cnt [11] & (\uart_rx_inst|baud_cnt [9] & !\uart_rx_inst|baud_cnt [10]))) + + .dataa(\uart_rx_inst|baud_cnt [6]), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(\uart_rx_inst|baud_cnt [9]), + .datad(\uart_rx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~1 .lut_mask = 16'h0040; +defparam \uart_rx_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N4 +cycloneive_lcell_comb \uart_rx_inst|Equal2~2 ( +// Equation(s): +// \uart_rx_inst|Equal2~2_combout = (\uart_rx_inst|Equal1~0_combout & (\uart_rx_inst|Equal2~0_combout & (!\uart_rx_inst|baud_cnt [12] & \uart_rx_inst|Equal2~1_combout ))) + + .dataa(\uart_rx_inst|Equal1~0_combout ), + .datab(\uart_rx_inst|Equal2~0_combout ), + .datac(\uart_rx_inst|baud_cnt [12]), + .datad(\uart_rx_inst|Equal2~1_combout ), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~2 .lut_mask = 16'h0800; +defparam \uart_rx_inst|Equal2~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N5 +dffeas \uart_rx_inst|bit_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Equal2~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N26 +cycloneive_lcell_comb \uart_rx_inst|Add1~2 ( +// Equation(s): +// \uart_rx_inst|Add1~2_combout = (\uart_rx_inst|bit_cnt [1] & (!\uart_rx_inst|Add1~1 )) # (!\uart_rx_inst|bit_cnt [1] & ((\uart_rx_inst|Add1~1 ) # (GND))) +// \uart_rx_inst|Add1~3 = CARRY((!\uart_rx_inst|Add1~1 ) # (!\uart_rx_inst|bit_cnt [1])) + + .dataa(\uart_rx_inst|bit_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|Add1~1 ), + .combout(\uart_rx_inst|Add1~2_combout ), + .cout(\uart_rx_inst|Add1~3 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~2 .lut_mask = 16'h5A5F; +defparam \uart_rx_inst|Add1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X16_Y25_N29 +dffeas \uart_rx_inst|bit_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Add1~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y25_N27 +dffeas \uart_rx_inst|bit_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Add1~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N0 +cycloneive_lcell_comb \uart_rx_inst|always4~0 ( +// Equation(s): +// \uart_rx_inst|always4~0_combout = (!\uart_rx_inst|bit_cnt [0] & (!\uart_rx_inst|bit_cnt [2] & !\uart_rx_inst|bit_cnt [1])) + + .dataa(\uart_rx_inst|bit_cnt [0]), + .datab(\uart_rx_inst|bit_cnt [2]), + .datac(\uart_rx_inst|bit_cnt [1]), + .datad(gnd), + .cin(gnd), + .combout(\uart_rx_inst|always4~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always4~0 .lut_mask = 16'h0101; +defparam \uart_rx_inst|always4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N16 +cycloneive_lcell_comb \uart_rx_inst|always4~1 ( +// Equation(s): +// \uart_rx_inst|always4~1_combout = (\uart_rx_inst|bit_cnt [3] & (\uart_rx_inst|always4~0_combout & \uart_rx_inst|bit_flag~q )) + + .dataa(\uart_rx_inst|bit_cnt [3]), + .datab(\uart_rx_inst|always4~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_rx_inst|always4~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always4~1 .lut_mask = 16'h8080; +defparam \uart_rx_inst|always4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N17 +dffeas \uart_rx_inst|rx_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|always4~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_flag .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N1 +dffeas \uart_rx_inst|po_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_flag~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .lut_mask = 16'hF0B4; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .lut_mask = 16'h0800; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .lut_mask = 16'h0100; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .lut_mask = 16'hC3F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 .lut_mask = 16'h0100; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 .lut_mask = 16'h1000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .lut_mask = 16'hE1F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'h2000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 .lut_mask = 16'h000F; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'h0F33; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q )))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .lut_mask = 16'hEEE0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X16_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 .lut_mask = 16'h00BB; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X17_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ) # +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 .lut_mask = 16'hFFFE; +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 .lut_mask = 16'hFFC8; +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9]), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & ((\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 .lut_mask = 16'hAAA8; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .lut_mask = 16'hF0B4; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .lut_mask = 16'hD2F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .lut_mask = 16'hD2D2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .lut_mask = 16'h0020; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .lut_mask = 16'hD2F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 .lut_mask = 16'h0500; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] $ (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 .lut_mask = 16'h000F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 .lut_mask = 16'h2000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 .lut_mask = 16'hCCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [5] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 .lut_mask = 16'hFF30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 .lut_mask = 16'h00F8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 .lut_mask = 16'h0088; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 .lut_mask = 16'hCCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 .lut_mask = 16'hEEFF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [0] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 .lut_mask = 16'h00FE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 .lut_mask = 16'hFFEC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y23_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [1]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 .lut_mask = 16'h5776; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .lut_mask = 16'hF0D2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .lut_mask = 16'h78F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .lut_mask = 16'h0100; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .lut_mask = 16'hA5F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2] $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .lut_mask = 16'h0008; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .lut_mask = 16'hFCFF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 .lut_mask = 16'hF05A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'hAC0C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout )))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'h59FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h0021; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout & +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout +// )) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'h1333; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y24_N25 +dffeas \fifo_read_inst|read_en_dly ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\fifo_read_inst|read_en~q ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_en_dly~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_en_dly .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_en_dly .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q & \fifo_read_inst|read_en_dly~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datab(gnd), + .datac(\fifo_read_inst|read_en_dly~q ), + .datad(gnd), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq .lut_mask = 16'h5050; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] $ (((VCC) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] $ +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 .lut_mask = 16'h5599; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y24_N7 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N8 +cycloneive_lcell_comb \fifo_read_inst|Add2~0 ( +// Equation(s): +// \fifo_read_inst|Add2~0_combout = (\fifo_read_inst|bit_flag~q & (\fifo_read_inst|bit_cnt [0] $ (VCC))) # (!\fifo_read_inst|bit_flag~q & (\fifo_read_inst|bit_cnt [0] & VCC)) +// \fifo_read_inst|Add2~1 = CARRY((\fifo_read_inst|bit_flag~q & \fifo_read_inst|bit_cnt [0])) + + .dataa(\fifo_read_inst|bit_flag~q ), + .datab(\fifo_read_inst|bit_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|Add2~0_combout ), + .cout(\fifo_read_inst|Add2~1 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~0 .lut_mask = 16'h6688; +defparam \fifo_read_inst|Add2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N9 +dffeas \fifo_read_inst|bit_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Add2~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N10 +cycloneive_lcell_comb \fifo_read_inst|Add2~2 ( +// Equation(s): +// \fifo_read_inst|Add2~2_combout = (\fifo_read_inst|bit_cnt [1] & (!\fifo_read_inst|Add2~1 )) # (!\fifo_read_inst|bit_cnt [1] & ((\fifo_read_inst|Add2~1 ) # (GND))) +// \fifo_read_inst|Add2~3 = CARRY((!\fifo_read_inst|Add2~1 ) # (!\fifo_read_inst|bit_cnt [1])) + + .dataa(\fifo_read_inst|bit_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|Add2~1 ), + .combout(\fifo_read_inst|Add2~2_combout ), + .cout(\fifo_read_inst|Add2~3 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~2 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|Add2~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N14 +cycloneive_lcell_comb \fifo_read_inst|Add2~6 ( +// Equation(s): +// \fifo_read_inst|Add2~6_combout = \fifo_read_inst|bit_cnt [3] $ (\fifo_read_inst|Add2~5 ) + + .dataa(gnd), + .datab(\fifo_read_inst|bit_cnt [3]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|Add2~5 ), + .combout(\fifo_read_inst|Add2~6_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Add2~6 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|Add2~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N4 +cycloneive_lcell_comb \fifo_read_inst|bit_cnt~0 ( +// Equation(s): +// \fifo_read_inst|bit_cnt~0_combout = (\fifo_read_inst|Add2~6_combout & ((!\fifo_read_inst|always5~0_combout ) # (!\fifo_read_inst|bit_cnt [0]))) + + .dataa(gnd), + .datab(\fifo_read_inst|bit_cnt [0]), + .datac(\fifo_read_inst|Add2~6_combout ), + .datad(\fifo_read_inst|always5~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|bit_cnt~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt~0 .lut_mask = 16'h30F0; +defparam \fifo_read_inst|bit_cnt~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N5 +dffeas \fifo_read_inst|bit_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|bit_cnt~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N4 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[0]~13 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[0]~13_combout = (\fifo_read_inst|rd_flag~q & (\fifo_read_inst|baud_cnt [0] $ (VCC))) # (!\fifo_read_inst|rd_flag~q & (\fifo_read_inst|baud_cnt [0] & VCC)) +// \fifo_read_inst|baud_cnt[0]~14 = CARRY((\fifo_read_inst|rd_flag~q & \fifo_read_inst|baud_cnt [0])) + + .dataa(\fifo_read_inst|rd_flag~q ), + .datab(\fifo_read_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|baud_cnt[0]~13_combout ), + .cout(\fifo_read_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \fifo_read_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N14 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[5]~23 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[5]~23_combout = (\fifo_read_inst|baud_cnt [5] & (!\fifo_read_inst|baud_cnt[4]~22 )) # (!\fifo_read_inst|baud_cnt [5] & ((\fifo_read_inst|baud_cnt[4]~22 ) # (GND))) +// \fifo_read_inst|baud_cnt[5]~24 = CARRY((!\fifo_read_inst|baud_cnt[4]~22 ) # (!\fifo_read_inst|baud_cnt [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[4]~22 ), + .combout(\fifo_read_inst|baud_cnt[5]~23_combout ), + .cout(\fifo_read_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[5]~23 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N16 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[6]~25 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[6]~25_combout = (\fifo_read_inst|baud_cnt [6] & (\fifo_read_inst|baud_cnt[5]~24 $ (GND))) # (!\fifo_read_inst|baud_cnt [6] & (!\fifo_read_inst|baud_cnt[5]~24 & VCC)) +// \fifo_read_inst|baud_cnt[6]~26 = CARRY((\fifo_read_inst|baud_cnt [6] & !\fifo_read_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[5]~24 ), + .combout(\fifo_read_inst|baud_cnt[6]~25_combout ), + .cout(\fifo_read_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N17 +dffeas \fifo_read_inst|baud_cnt[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N18 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[7]~27 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[7]~27_combout = (\fifo_read_inst|baud_cnt [7] & (!\fifo_read_inst|baud_cnt[6]~26 )) # (!\fifo_read_inst|baud_cnt [7] & ((\fifo_read_inst|baud_cnt[6]~26 ) # (GND))) +// \fifo_read_inst|baud_cnt[7]~28 = CARRY((!\fifo_read_inst|baud_cnt[6]~26 ) # (!\fifo_read_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[6]~26 ), + .combout(\fifo_read_inst|baud_cnt[7]~27_combout ), + .cout(\fifo_read_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N19 +dffeas \fifo_read_inst|baud_cnt[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N20 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[8]~29 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[8]~29_combout = (\fifo_read_inst|baud_cnt [8] & (\fifo_read_inst|baud_cnt[7]~28 $ (GND))) # (!\fifo_read_inst|baud_cnt [8] & (!\fifo_read_inst|baud_cnt[7]~28 & VCC)) +// \fifo_read_inst|baud_cnt[8]~30 = CARRY((\fifo_read_inst|baud_cnt [8] & !\fifo_read_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[7]~28 ), + .combout(\fifo_read_inst|baud_cnt[8]~29_combout ), + .cout(\fifo_read_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N21 +dffeas \fifo_read_inst|baud_cnt[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N0 +cycloneive_lcell_comb \fifo_read_inst|Equal4~0 ( +// Equation(s): +// \fifo_read_inst|Equal4~0_combout = (\fifo_read_inst|baud_cnt [1] & (!\fifo_read_inst|baud_cnt [8] & (\fifo_read_inst|baud_cnt [0] & !\fifo_read_inst|baud_cnt [7]))) + + .dataa(\fifo_read_inst|baud_cnt [1]), + .datab(\fifo_read_inst|baud_cnt [8]), + .datac(\fifo_read_inst|baud_cnt [0]), + .datad(\fifo_read_inst|baud_cnt [7]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~0 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N10 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[3]~19 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[3]~19_combout = (\fifo_read_inst|baud_cnt [3] & (!\fifo_read_inst|baud_cnt[2]~18 )) # (!\fifo_read_inst|baud_cnt [3] & ((\fifo_read_inst|baud_cnt[2]~18 ) # (GND))) +// \fifo_read_inst|baud_cnt[3]~20 = CARRY((!\fifo_read_inst|baud_cnt[2]~18 ) # (!\fifo_read_inst|baud_cnt [3])) + + .dataa(\fifo_read_inst|baud_cnt [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[2]~18 ), + .combout(\fifo_read_inst|baud_cnt[3]~19_combout ), + .cout(\fifo_read_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[3]~19 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N11 +dffeas \fifo_read_inst|baud_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N22 +cycloneive_lcell_comb \fifo_read_inst|Equal4~1 ( +// Equation(s): +// \fifo_read_inst|Equal4~1_combout = (\fifo_read_inst|baud_cnt [4] & (!\fifo_read_inst|baud_cnt [5] & (!\fifo_read_inst|baud_cnt [3] & \fifo_read_inst|baud_cnt [2]))) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(\fifo_read_inst|baud_cnt [3]), + .datad(\fifo_read_inst|baud_cnt [2]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~1 .lut_mask = 16'h0200; +defparam \fifo_read_inst|Equal4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N24 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[10]~33 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[10]~33_combout = (\fifo_read_inst|baud_cnt [10] & (\fifo_read_inst|baud_cnt[9]~32 $ (GND))) # (!\fifo_read_inst|baud_cnt [10] & (!\fifo_read_inst|baud_cnt[9]~32 & VCC)) +// \fifo_read_inst|baud_cnt[10]~34 = CARRY((\fifo_read_inst|baud_cnt [10] & !\fifo_read_inst|baud_cnt[9]~32 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[9]~32 ), + .combout(\fifo_read_inst|baud_cnt[10]~33_combout ), + .cout(\fifo_read_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[10]~33 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N25 +dffeas \fifo_read_inst|baud_cnt[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N28 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[12]~37 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[12]~37_combout = \fifo_read_inst|baud_cnt[11]~36 $ (!\fifo_read_inst|baud_cnt [12]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(\fifo_read_inst|baud_cnt[11]~36 ), + .combout(\fifo_read_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[12]~37 .lut_mask = 16'hF00F; +defparam \fifo_read_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N29 +dffeas \fifo_read_inst|baud_cnt[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N16 +cycloneive_lcell_comb \fifo_read_inst|Equal4~3 ( +// Equation(s): +// \fifo_read_inst|Equal4~3_combout = (\fifo_read_inst|Equal4~2_combout & (\fifo_read_inst|Equal4~0_combout & (\fifo_read_inst|Equal4~1_combout & \fifo_read_inst|baud_cnt [12]))) + + .dataa(\fifo_read_inst|Equal4~2_combout ), + .datab(\fifo_read_inst|Equal4~0_combout ), + .datac(\fifo_read_inst|Equal4~1_combout ), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~3_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~3 .lut_mask = 16'h8000; +defparam \fifo_read_inst|Equal4~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X29_Y25_N5 +dffeas \fifo_read_inst|baud_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N8 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[2]~17 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[2]~17_combout = (\fifo_read_inst|baud_cnt [2] & (\fifo_read_inst|baud_cnt[1]~16 $ (GND))) # (!\fifo_read_inst|baud_cnt [2] & (!\fifo_read_inst|baud_cnt[1]~16 & VCC)) +// \fifo_read_inst|baud_cnt[2]~18 = CARRY((\fifo_read_inst|baud_cnt [2] & !\fifo_read_inst|baud_cnt[1]~16 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[1]~16 ), + .combout(\fifo_read_inst|baud_cnt[2]~17_combout ), + .cout(\fifo_read_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[2]~17 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N9 +dffeas \fifo_read_inst|baud_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N15 +dffeas \fifo_read_inst|baud_cnt[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal5~0 ( +// Equation(s): +// \fifo_read_inst|Equal5~0_combout = (!\fifo_read_inst|baud_cnt [4] & (\fifo_read_inst|baud_cnt [5] & (\fifo_read_inst|baud_cnt [3] & !\fifo_read_inst|baud_cnt [2]))) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(\fifo_read_inst|baud_cnt [3]), + .datad(\fifo_read_inst|baud_cnt [2]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~0 .lut_mask = 16'h0040; +defparam \fifo_read_inst|Equal5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N26 +cycloneive_lcell_comb \fifo_read_inst|Equal5~2 ( +// Equation(s): +// \fifo_read_inst|Equal5~2_combout = (\fifo_read_inst|Equal5~1_combout & (\fifo_read_inst|Equal5~0_combout & (\fifo_read_inst|Equal4~0_combout & !\fifo_read_inst|baud_cnt [12]))) + + .dataa(\fifo_read_inst|Equal5~1_combout ), + .datab(\fifo_read_inst|Equal5~0_combout ), + .datac(\fifo_read_inst|Equal4~0_combout ), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~2 .lut_mask = 16'h0080; +defparam \fifo_read_inst|Equal5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N27 +dffeas \fifo_read_inst|bit_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Equal5~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N6 +cycloneive_lcell_comb \fifo_read_inst|bit_cnt~1 ( +// Equation(s): +// \fifo_read_inst|bit_cnt~1_combout = (\fifo_read_inst|Add2~2_combout & ((!\fifo_read_inst|bit_cnt [0]) # (!\fifo_read_inst|always5~0_combout ))) + + .dataa(gnd), + .datab(\fifo_read_inst|always5~0_combout ), + .datac(\fifo_read_inst|bit_cnt [0]), + .datad(\fifo_read_inst|Add2~2_combout ), + .cin(gnd), + .combout(\fifo_read_inst|bit_cnt~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt~1 .lut_mask = 16'h3F00; +defparam \fifo_read_inst|bit_cnt~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N7 +dffeas \fifo_read_inst|bit_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|bit_cnt~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N24 +cycloneive_lcell_comb \fifo_read_inst|always5~0 ( +// Equation(s): +// \fifo_read_inst|always5~0_combout = (!\fifo_read_inst|bit_cnt [2] & (\fifo_read_inst|bit_cnt [3] & (\fifo_read_inst|bit_flag~q & !\fifo_read_inst|bit_cnt [1]))) + + .dataa(\fifo_read_inst|bit_cnt [2]), + .datab(\fifo_read_inst|bit_cnt [3]), + .datac(\fifo_read_inst|bit_flag~q ), + .datad(\fifo_read_inst|bit_cnt [1]), + .cin(gnd), + .combout(\fifo_read_inst|always5~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|always5~0 .lut_mask = 16'h0040; +defparam \fifo_read_inst|always5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N0 +cycloneive_lcell_comb \fifo_read_inst|always5~1 ( +// Equation(s): +// \fifo_read_inst|always5~1_combout = (\fifo_read_inst|bit_cnt [0] & \fifo_read_inst|always5~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\fifo_read_inst|bit_cnt [0]), + .datad(\fifo_read_inst|always5~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|always5~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|always5~1 .lut_mask = 16'hF000; +defparam \fifo_read_inst|always5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N1 +dffeas \fifo_read_inst|rd_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|always5~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|rd_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|rd_en .is_wysiwyg = "true"; +defparam \fifo_read_inst|rd_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]) # +// (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # (!\fifo_read_inst|rd_en~q )) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 .lut_mask = 16'hFBFF; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ) # (\fifo_read_inst|read_en_dly~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datab(gnd), + .datac(\fifo_read_inst|read_en_dly~q ), + .datad(gnd), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 .lut_mask = 16'hFAFA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ) # +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ) # (!\fifo_read_inst|Equal1~1_combout )))) + + .dataa(\fifo_read_inst|Equal1~1_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 .lut_mask = 16'hFFD0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ) # +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q & !\fifo_read_inst|rd_en~q )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ), + .datab(gnd), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 .lut_mask = 16'hAAFA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N27 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout = (\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q $ (((!\fifo_read_inst|rd_en~q ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ))))) # (!\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & +// ((\fifo_read_inst|rd_en~q )))) + + .dataa(\fifo_read_inst|read_en_dly~q ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 .lut_mask = 16'hC60A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N9 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y25_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X26_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X26_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N10 +cycloneive_lcell_comb \Equal2~1 ( +// Equation(s): +// \Equal2~1_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cin(gnd), + .combout(\Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal2~1 .lut_mask = 16'h0040; +defparam \Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N28 +cycloneive_lcell_comb \fifo_read_inst|read_en~0 ( +// Equation(s): +// \fifo_read_inst|read_en~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout & (\Equal2~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout & +// \Equal2~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datab(\Equal2~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .datad(\Equal2~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_en~0 .lut_mask = 16'h0400; +defparam \fifo_read_inst|read_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N8 +cycloneive_lcell_comb \fifo_read_inst|read_en~1 ( +// Equation(s): +// \fifo_read_inst|read_en~1_combout = (\fifo_read_inst|read_en~0_combout ) # ((\fifo_read_inst|read_en~q & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # +// (!\fifo_read_inst|Equal1~2_combout )))) + + .dataa(\fifo_read_inst|Equal1~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datac(\fifo_read_inst|read_en~q ), + .datad(\fifo_read_inst|read_en~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_en~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_en~1 .lut_mask = 16'hFFD0; +defparam \fifo_read_inst|read_en~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N9 +dffeas \fifo_read_inst|read_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_en~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_en .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout = (\fifo_read_inst|read_en~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\fifo_read_inst|read_en~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .lut_mask = 16'hFC00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .lut_mask = 16'h0800; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N2 +cycloneive_lcell_comb \Equal2~0 ( +// Equation(s): +// \Equal2~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ), + .cin(gnd), + .combout(\Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal2~0 .lut_mask = 16'h0001; +defparam \Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 .lut_mask = 16'h55AA; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9]), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout = (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 .lut_mask = 16'h0002; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout & (\Equal2~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout & +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .datab(\Equal2~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q & (!\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 .lut_mask = 16'h0100; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 .lut_mask = 16'h5500; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & !\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 .lut_mask = 16'hFF08; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 .lut_mask = 16'h0030; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 .lut_mask = 16'hDCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 .lut_mask = 16'hFF50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 .lut_mask = 16'hF888; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 .lut_mask = 16'hFEFE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 .lut_mask = 16'h00F8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 .lut_mask = 16'h0AA0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 .lut_mask = 16'h00F0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 .lut_mask = 16'hFF50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 .lut_mask = 16'h0330; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 .lut_mask = 16'h0300; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout = ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 .lut_mask = 16'hFFD5; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 .lut_mask = 16'hFF88; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 .lut_mask = 16'h1230; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 .lut_mask = 16'h7F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 .lut_mask = 16'hFCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 .lut_mask = 16'h0007; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk +// [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ) # +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 .lut_mask = 16'hB3A0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 .lut_mask = 16'hF5F5; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 .lut_mask = 16'h2020; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 .lut_mask = 16'hFFC0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 .lut_mask = 16'h000F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 .lut_mask = 16'h003C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 .lut_mask = 16'h0C0C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 .lut_mask = 16'hEAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 .lut_mask = 16'hB800; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 .lut_mask = 16'h0055; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 .lut_mask = 16'h0004; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 .lut_mask = 16'h2AAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [9] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [11] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 $ (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 .lut_mask = 16'hF00F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 .lut_mask = 16'h0040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 .lut_mask = 16'h0020; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 .lut_mask = 16'h5000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 .lut_mask = 16'h2000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 .lut_mask = 16'hFEFF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 .lut_mask = 16'h1230; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 .lut_mask = 16'hF2F0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 .lut_mask = 16'h4040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 .lut_mask = 16'h55AA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 .lut_mask = 16'hF0FF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout = (((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 .lut_mask = 16'h777F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 .lut_mask = 16'h8C00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout = ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 .lut_mask = 16'h1F3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 .lut_mask = 16'hC840; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 $ (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 .lut_mask = 16'h0040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 .lut_mask = 16'hC000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ) # +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 .lut_mask = 16'hBA30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 .lut_mask = 16'h5450; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 .lut_mask = 16'hFFCF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 .lut_mask = 16'hF888; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 .lut_mask = 16'hFFF8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] $ (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(gnd), + .datad(gnd), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 .lut_mask = 16'h0033; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 .lut_mask = 16'hAAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout = ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 .lut_mask = 16'h5557; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .lut_mask = 16'h00A8; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .lut_mask = 16'h5400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .lut_mask = 16'h2000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .lut_mask = 16'hC3F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout +// )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'hE2C0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'hA018; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout = (\uart_rx_inst|po_flag~q & ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .datab(gnd), + .datac(\uart_rx_inst|po_flag~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .lut_mask = 16'h50F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: CLKCTRL_G8 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [0]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: CLKCTRL_G9 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [1]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y8_N1 +cycloneive_io_ibuf \rx~input ( + .i(rx), + .ibar(gnd), + .o(\rx~input_o )); +// synopsys translate_off +defparam \rx~input .bus_hold = "false"; +defparam \rx~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N12 +cycloneive_lcell_comb \uart_rx_inst|rx_reg1~0 ( +// Equation(s): +// \uart_rx_inst|rx_reg1~0_combout = !\rx~input_o + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\rx~input_o ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg1~0 .lut_mask = 16'h00FF; +defparam \uart_rx_inst|rx_reg1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N13 +dffeas \uart_rx_inst|rx_reg1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg1 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N2 +cycloneive_lcell_comb \uart_rx_inst|rx_reg2~feeder ( +// Equation(s): +// \uart_rx_inst|rx_reg2~feeder_combout = \uart_rx_inst|rx_reg1~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg1~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg2~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg2~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_reg2~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N3 +dffeas \uart_rx_inst|rx_reg2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg2~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg2 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N0 +cycloneive_lcell_comb \uart_rx_inst|rx_reg3~feeder ( +// Equation(s): +// \uart_rx_inst|rx_reg3~feeder_combout = \uart_rx_inst|rx_reg2~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg2~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg3~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg3~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_reg3~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N1 +dffeas \uart_rx_inst|rx_reg3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg3~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg3 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N14 +cycloneive_lcell_comb \uart_rx_inst|rx_data[7]~0 ( +// Equation(s): +// \uart_rx_inst|rx_data[7]~0_combout = !\uart_rx_inst|rx_reg3~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg3~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[7]~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[7]~0 .lut_mask = 16'h00FF; +defparam \uart_rx_inst|rx_data[7]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N10 +cycloneive_lcell_comb \uart_rx_inst|bit_cnt~0 ( +// Equation(s): +// \uart_rx_inst|bit_cnt~0_combout = (\uart_rx_inst|Add1~6_combout & (((!\uart_rx_inst|always4~0_combout ) # (!\uart_rx_inst|bit_cnt [3])) # (!\uart_rx_inst|bit_flag~q ))) + + .dataa(\uart_rx_inst|Add1~6_combout ), + .datab(\uart_rx_inst|bit_flag~q ), + .datac(\uart_rx_inst|bit_cnt [3]), + .datad(\uart_rx_inst|always4~0_combout ), + .cin(gnd), + .combout(\uart_rx_inst|bit_cnt~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt~0 .lut_mask = 16'h2AAA; +defparam \uart_rx_inst|bit_cnt~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N11 +dffeas \uart_rx_inst|bit_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|bit_cnt~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N18 +cycloneive_lcell_comb \uart_rx_inst|always8~0 ( +// Equation(s): +// \uart_rx_inst|always8~0_combout = (\uart_rx_inst|bit_flag~q & (\uart_rx_inst|always4~0_combout $ (!\uart_rx_inst|bit_cnt [3]))) + + .dataa(gnd), + .datab(\uart_rx_inst|always4~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(\uart_rx_inst|bit_cnt [3]), + .cin(gnd), + .combout(\uart_rx_inst|always8~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always8~0 .lut_mask = 16'hC030; +defparam \uart_rx_inst|always8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N15 +dffeas \uart_rx_inst|rx_data[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[7]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y23_N21 +dffeas \uart_rx_inst|rx_data[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_data [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N18 +cycloneive_lcell_comb \uart_rx_inst|rx_data[5]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[5]~feeder_combout = \uart_rx_inst|rx_data [6] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [6]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[5]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N19 +dffeas \uart_rx_inst|rx_data[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N0 +cycloneive_lcell_comb \uart_rx_inst|rx_data[4]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[4]~feeder_combout = \uart_rx_inst|rx_data [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [5]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[4]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N1 +dffeas \uart_rx_inst|rx_data[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N6 +cycloneive_lcell_comb \uart_rx_inst|rx_data[3]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[3]~feeder_combout = \uart_rx_inst|rx_data [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [4]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[3]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N7 +dffeas \uart_rx_inst|rx_data[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N28 +cycloneive_lcell_comb \uart_rx_inst|rx_data[2]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[2]~feeder_combout = \uart_rx_inst|rx_data [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [3]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[2]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N29 +dffeas \uart_rx_inst|rx_data[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N2 +cycloneive_lcell_comb \uart_rx_inst|rx_data[1]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[1]~feeder_combout = \uart_rx_inst|rx_data [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [2]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[1]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N3 +dffeas \uart_rx_inst|rx_data[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N24 +cycloneive_lcell_comb \uart_rx_inst|rx_data[0]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[0]~feeder_combout = \uart_rx_inst|rx_data [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [1]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[0]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N25 +dffeas \uart_rx_inst|rx_data[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N8 +cycloneive_lcell_comb \uart_rx_inst|po_data[0]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[0]~feeder_combout = \uart_rx_inst|rx_data [0] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [0]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[0]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N9 +dffeas \uart_rx_inst|po_data[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9]), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N10 +cycloneive_lcell_comb \uart_rx_inst|po_data[1]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[1]~feeder_combout = \uart_rx_inst|rx_data [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [1]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[1]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N11 +dffeas \uart_rx_inst|po_data[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N12 +cycloneive_lcell_comb \uart_rx_inst|po_data[2]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[2]~feeder_combout = \uart_rx_inst|rx_data [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [2]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[2]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N13 +dffeas \uart_rx_inst|po_data[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N30 +cycloneive_lcell_comb \uart_rx_inst|po_data[3]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[3]~feeder_combout = \uart_rx_inst|rx_data [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [3]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[3]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N31 +dffeas \uart_rx_inst|po_data[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N16 +cycloneive_lcell_comb \uart_rx_inst|po_data[4]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[4]~feeder_combout = \uart_rx_inst|rx_data [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [4]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[4]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N17 +dffeas \uart_rx_inst|po_data[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N26 +cycloneive_lcell_comb \uart_rx_inst|po_data[5]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[5]~feeder_combout = \uart_rx_inst|rx_data [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [5]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[5]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N27 +dffeas \uart_rx_inst|po_data[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N4 +cycloneive_lcell_comb \uart_rx_inst|po_data[6]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[6]~feeder_combout = \uart_rx_inst|rx_data [6] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [6]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[6]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N5 +dffeas \uart_rx_inst|po_data[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y23_N23 +dffeas \uart_rx_inst|po_data[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_data [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X12_Y23_N8 +cycloneive_lcell_comb \~GND ( +// Equation(s): +// \~GND~combout = GND + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\~GND~combout ), + .cout()); +// synopsys translate_off +defparam \~GND .lut_mask = 16'h0000; +defparam \~GND .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X13_Y23_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({\~GND~combout ,\uart_rx_inst|po_data [7],\uart_rx_inst|po_data [6],\uart_rx_inst|po_data [5],\uart_rx_inst|po_data [4],\uart_rx_inst|po_data [3],\uart_rx_inst|po_data [2],\uart_rx_inst|po_data [1],\uart_rx_inst|po_data [0]}), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:wr_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en .power_up = "low"; +// synopsys translate_on + +// Location: M9K_X13_Y21_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({gnd,gnd,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout }), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:wr_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_first_bit_number = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_first_bit_number = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: CLKCTRL_G5 +cycloneive_clkctrl \sys_clk~inputclkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\sys_clk~input_o }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\sys_clk~inputclkctrl_outclk )); +// synopsys translate_off +defparam \sys_clk~inputclkctrl .clock_type = "global clock"; +defparam \sys_clk~inputclkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N4 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[0]~13 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[0]~13_combout = (\uart_tx_inst|work_en~q & (\uart_tx_inst|baud_cnt [0] $ (VCC))) # (!\uart_tx_inst|work_en~q & (\uart_tx_inst|baud_cnt [0] & VCC)) +// \uart_tx_inst|baud_cnt[0]~14 = CARRY((\uart_tx_inst|work_en~q & \uart_tx_inst|baud_cnt [0])) + + .dataa(\uart_tx_inst|work_en~q ), + .datab(\uart_tx_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_tx_inst|baud_cnt[0]~13_combout ), + .cout(\uart_tx_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \uart_tx_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N26 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[11]~35 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[11]~35_combout = (\uart_tx_inst|baud_cnt [11] & (!\uart_tx_inst|baud_cnt[10]~34 )) # (!\uart_tx_inst|baud_cnt [11] & ((\uart_tx_inst|baud_cnt[10]~34 ) # (GND))) +// \uart_tx_inst|baud_cnt[11]~36 = CARRY((!\uart_tx_inst|baud_cnt[10]~34 ) # (!\uart_tx_inst|baud_cnt [11])) + + .dataa(\uart_tx_inst|baud_cnt [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[10]~34 ), + .combout(\uart_tx_inst|baud_cnt[11]~35_combout ), + .cout(\uart_tx_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[11]~35 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N27 +dffeas \uart_tx_inst|baud_cnt[11] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N0 +cycloneive_lcell_comb \uart_tx_inst|Equal1~0 ( +// Equation(s): +// \uart_tx_inst|Equal1~0_combout = (!\uart_tx_inst|baud_cnt [3] & (!\uart_tx_inst|baud_cnt [5] & (\uart_tx_inst|baud_cnt [0] & !\uart_tx_inst|baud_cnt [7]))) + + .dataa(\uart_tx_inst|baud_cnt [3]), + .datab(\uart_tx_inst|baud_cnt [5]), + .datac(\uart_tx_inst|baud_cnt [0]), + .datad(\uart_tx_inst|baud_cnt [7]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~0 .lut_mask = 16'h0010; +defparam \uart_tx_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N22 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[9]~31 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[9]~31_combout = (\uart_tx_inst|baud_cnt [9] & (!\uart_tx_inst|baud_cnt[8]~30 )) # (!\uart_tx_inst|baud_cnt [9] & ((\uart_tx_inst|baud_cnt[8]~30 ) # (GND))) +// \uart_tx_inst|baud_cnt[9]~32 = CARRY((!\uart_tx_inst|baud_cnt[8]~30 ) # (!\uart_tx_inst|baud_cnt [9])) + + .dataa(\uart_tx_inst|baud_cnt [9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[8]~30 ), + .combout(\uart_tx_inst|baud_cnt[9]~31_combout ), + .cout(\uart_tx_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[9]~31 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N23 +dffeas \uart_tx_inst|baud_cnt[9] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|Equal1~1 ( +// Equation(s): +// \uart_tx_inst|Equal1~1_combout = (!\uart_tx_inst|baud_cnt [8] & (!\uart_tx_inst|baud_cnt [11] & (\uart_tx_inst|Equal1~0_combout & !\uart_tx_inst|baud_cnt [9]))) + + .dataa(\uart_tx_inst|baud_cnt [8]), + .datab(\uart_tx_inst|baud_cnt [11]), + .datac(\uart_tx_inst|Equal1~0_combout ), + .datad(\uart_tx_inst|baud_cnt [9]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~1 .lut_mask = 16'h0010; +defparam \uart_tx_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[1]~15 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[1]~15_combout = (\uart_tx_inst|baud_cnt [1] & (!\uart_tx_inst|baud_cnt[0]~14 )) # (!\uart_tx_inst|baud_cnt [1] & ((\uart_tx_inst|baud_cnt[0]~14 ) # (GND))) +// \uart_tx_inst|baud_cnt[1]~16 = CARRY((!\uart_tx_inst|baud_cnt[0]~14 ) # (!\uart_tx_inst|baud_cnt [1])) + + .dataa(\uart_tx_inst|baud_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[0]~14 ), + .combout(\uart_tx_inst|baud_cnt[1]~15_combout ), + .cout(\uart_tx_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[1]~15 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N7 +dffeas \uart_tx_inst|baud_cnt[1] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N30 +cycloneive_lcell_comb \uart_tx_inst|Equal1~2 ( +// Equation(s): +// \uart_tx_inst|Equal1~2_combout = (\uart_tx_inst|baud_cnt [4] & (\uart_tx_inst|baud_cnt [6] & (\uart_tx_inst|baud_cnt [2] & \uart_tx_inst|baud_cnt [1]))) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(\uart_tx_inst|baud_cnt [2]), + .datad(\uart_tx_inst|baud_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~2 .lut_mask = 16'h8000; +defparam \uart_tx_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N19 +dffeas \fifo_read_inst|tx_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\fifo_read_inst|rd_en~q ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|tx_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|tx_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|tx_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|always3~0 ( +// Equation(s): +// \uart_tx_inst|always3~0_combout = (!\uart_tx_inst|work_en~q ) # (!\uart_tx_inst|bit_flag~q ) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(gnd), + .datac(\uart_tx_inst|work_en~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_tx_inst|always3~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always3~0 .lut_mask = 16'h5F5F; +defparam \uart_tx_inst|always3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N18 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[1]~2 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[1]~2_combout = (!\uart_tx_inst|always0~1_combout & (\uart_tx_inst|bit_cnt [1] $ (((\uart_tx_inst|bit_cnt [0] & !\uart_tx_inst|always3~0_combout ))))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [1]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[1]~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[1]~2 .lut_mask = 16'h00D2; +defparam \uart_tx_inst|bit_cnt[1]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N19 +dffeas \uart_tx_inst|bit_cnt[1] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[1]~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N4 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[2]~3 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[2]~3_combout = (!\uart_tx_inst|always0~1_combout & ((\uart_tx_inst|always3~0_combout & ((\uart_tx_inst|bit_cnt [2]))) # (!\uart_tx_inst|always3~0_combout & (\uart_tx_inst|Add1~0_combout )))) + + .dataa(\uart_tx_inst|Add1~0_combout ), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[2]~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[2]~3 .lut_mask = 16'h00E2; +defparam \uart_tx_inst|bit_cnt[2]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N5 +dffeas \uart_tx_inst|bit_cnt[2] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[2]~3_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|always0~1 ( +// Equation(s): +// \uart_tx_inst|always0~1_combout = (\uart_tx_inst|bit_cnt [0] & (!\uart_tx_inst|bit_cnt [1] & (!\uart_tx_inst|bit_cnt [2] & \uart_tx_inst|always0~0_combout ))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [1]), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|always0~0_combout ), + .cin(gnd), + .combout(\uart_tx_inst|always0~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always0~1 .lut_mask = 16'h0200; +defparam \uart_tx_inst|always0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N18 +cycloneive_lcell_comb \uart_tx_inst|work_en~0 ( +// Equation(s): +// \uart_tx_inst|work_en~0_combout = (\fifo_read_inst|tx_flag~q ) # ((\uart_tx_inst|work_en~q & !\uart_tx_inst|always0~1_combout )) + + .dataa(gnd), + .datab(\uart_tx_inst|work_en~q ), + .datac(\fifo_read_inst|tx_flag~q ), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|work_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|work_en~0 .lut_mask = 16'hF0FC; +defparam \uart_tx_inst|work_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N25 +dffeas \uart_tx_inst|work_en ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(gnd), + .asdata(\uart_tx_inst|work_en~0_combout ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|work_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|work_en .is_wysiwyg = "true"; +defparam \uart_tx_inst|work_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|always1~0 ( +// Equation(s): +// \uart_tx_inst|always1~0_combout = ((\uart_tx_inst|Equal1~3_combout & (\uart_tx_inst|Equal1~1_combout & \uart_tx_inst|Equal1~2_combout ))) # (!\uart_tx_inst|work_en~q ) + + .dataa(\uart_tx_inst|Equal1~3_combout ), + .datab(\uart_tx_inst|Equal1~1_combout ), + .datac(\uart_tx_inst|Equal1~2_combout ), + .datad(\uart_tx_inst|work_en~q ), + .cin(gnd), + .combout(\uart_tx_inst|always1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always1~0 .lut_mask = 16'h80FF; +defparam \uart_tx_inst|always1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y18_N5 +dffeas \uart_tx_inst|baud_cnt[0] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N8 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[2]~17 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[2]~17_combout = (\uart_tx_inst|baud_cnt [2] & (\uart_tx_inst|baud_cnt[1]~16 $ (GND))) # (!\uart_tx_inst|baud_cnt [2] & (!\uart_tx_inst|baud_cnt[1]~16 & VCC)) +// \uart_tx_inst|baud_cnt[2]~18 = CARRY((\uart_tx_inst|baud_cnt [2] & !\uart_tx_inst|baud_cnt[1]~16 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[1]~16 ), + .combout(\uart_tx_inst|baud_cnt[2]~17_combout ), + .cout(\uart_tx_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[2]~17 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N9 +dffeas \uart_tx_inst|baud_cnt[2] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N14 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[5]~23 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[5]~23_combout = (\uart_tx_inst|baud_cnt [5] & (!\uart_tx_inst|baud_cnt[4]~22 )) # (!\uart_tx_inst|baud_cnt [5] & ((\uart_tx_inst|baud_cnt[4]~22 ) # (GND))) +// \uart_tx_inst|baud_cnt[5]~24 = CARRY((!\uart_tx_inst|baud_cnt[4]~22 ) # (!\uart_tx_inst|baud_cnt [5])) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [5]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[4]~22 ), + .combout(\uart_tx_inst|baud_cnt[5]~23_combout ), + .cout(\uart_tx_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[5]~23 .lut_mask = 16'h3C3F; +defparam \uart_tx_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N15 +dffeas \uart_tx_inst|baud_cnt[5] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N16 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[6]~25 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[6]~25_combout = (\uart_tx_inst|baud_cnt [6] & (\uart_tx_inst|baud_cnt[5]~24 $ (GND))) # (!\uart_tx_inst|baud_cnt [6] & (!\uart_tx_inst|baud_cnt[5]~24 & VCC)) +// \uart_tx_inst|baud_cnt[6]~26 = CARRY((\uart_tx_inst|baud_cnt [6] & !\uart_tx_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[5]~24 ), + .combout(\uart_tx_inst|baud_cnt[6]~25_combout ), + .cout(\uart_tx_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N17 +dffeas \uart_tx_inst|baud_cnt[6] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N18 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[7]~27 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[7]~27_combout = (\uart_tx_inst|baud_cnt [7] & (!\uart_tx_inst|baud_cnt[6]~26 )) # (!\uart_tx_inst|baud_cnt [7] & ((\uart_tx_inst|baud_cnt[6]~26 ) # (GND))) +// \uart_tx_inst|baud_cnt[7]~28 = CARRY((!\uart_tx_inst|baud_cnt[6]~26 ) # (!\uart_tx_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[6]~26 ), + .combout(\uart_tx_inst|baud_cnt[7]~27_combout ), + .cout(\uart_tx_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \uart_tx_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N19 +dffeas \uart_tx_inst|baud_cnt[7] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N20 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[8]~29 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[8]~29_combout = (\uart_tx_inst|baud_cnt [8] & (\uart_tx_inst|baud_cnt[7]~28 $ (GND))) # (!\uart_tx_inst|baud_cnt [8] & (!\uart_tx_inst|baud_cnt[7]~28 & VCC)) +// \uart_tx_inst|baud_cnt[8]~30 = CARRY((\uart_tx_inst|baud_cnt [8] & !\uart_tx_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[7]~28 ), + .combout(\uart_tx_inst|baud_cnt[8]~29_combout ), + .cout(\uart_tx_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N21 +dffeas \uart_tx_inst|baud_cnt[8] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[10]~33 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[10]~33_combout = (\uart_tx_inst|baud_cnt [10] & (\uart_tx_inst|baud_cnt[9]~32 $ (GND))) # (!\uart_tx_inst|baud_cnt [10] & (!\uart_tx_inst|baud_cnt[9]~32 & VCC)) +// \uart_tx_inst|baud_cnt[10]~34 = CARRY((\uart_tx_inst|baud_cnt [10] & !\uart_tx_inst|baud_cnt[9]~32 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [10]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[9]~32 ), + .combout(\uart_tx_inst|baud_cnt[10]~33_combout ), + .cout(\uart_tx_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[10]~33 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N25 +dffeas \uart_tx_inst|baud_cnt[10] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N28 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[12]~37 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[12]~37_combout = \uart_tx_inst|baud_cnt[11]~36 $ (!\uart_tx_inst|baud_cnt [12]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_tx_inst|baud_cnt [12]), + .cin(\uart_tx_inst|baud_cnt[11]~36 ), + .combout(\uart_tx_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[12]~37 .lut_mask = 16'hF00F; +defparam \uart_tx_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N29 +dffeas \uart_tx_inst|baud_cnt[12] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|Equal2~0 ( +// Equation(s): +// \uart_tx_inst|Equal2~0_combout = (!\uart_tx_inst|baud_cnt [4] & (!\uart_tx_inst|baud_cnt [6] & (!\uart_tx_inst|baud_cnt [2] & !\uart_tx_inst|baud_cnt [1]))) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(\uart_tx_inst|baud_cnt [2]), + .datad(\uart_tx_inst|baud_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal2~0 .lut_mask = 16'h0001; +defparam \uart_tx_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|Equal2~1 ( +// Equation(s): +// \uart_tx_inst|Equal2~1_combout = (\uart_tx_inst|Equal1~1_combout & (!\uart_tx_inst|baud_cnt [12] & (\uart_tx_inst|Equal2~0_combout & !\uart_tx_inst|baud_cnt [10]))) + + .dataa(\uart_tx_inst|Equal1~1_combout ), + .datab(\uart_tx_inst|baud_cnt [12]), + .datac(\uart_tx_inst|Equal2~0_combout ), + .datad(\uart_tx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_tx_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal2~1 .lut_mask = 16'h0020; +defparam \uart_tx_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y18_N25 +dffeas \uart_tx_inst|bit_flag ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|Equal2~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_flag .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N28 +cycloneive_lcell_comb \uart_tx_inst|always0~0 ( +// Equation(s): +// \uart_tx_inst|always0~0_combout = (\uart_tx_inst|bit_cnt [3] & \uart_tx_inst|bit_flag~q ) + + .dataa(\uart_tx_inst|bit_cnt [3]), + .datab(gnd), + .datac(\uart_tx_inst|bit_flag~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_tx_inst|always0~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always0~0 .lut_mask = 16'hA0A0; +defparam \uart_tx_inst|always0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N30 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & \fifo_read_inst|rd_en~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq .lut_mask = 16'hAA00; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N8 +cycloneive_io_ibuf \sdram_dq[0]~input ( + .i(sdram_dq[0]), + .ibar(gnd), + .o(\sdram_dq[0]~input_o )); +// synopsys translate_off +defparam \sdram_dq[0]~input .bus_hold = "false"; +defparam \sdram_dq[0]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[0]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N1 +cycloneive_io_ibuf \sdram_dq[1]~input ( + .i(sdram_dq[1]), + .ibar(gnd), + .o(\sdram_dq[1]~input_o )); +// synopsys translate_off +defparam \sdram_dq[1]~input .bus_hold = "false"; +defparam \sdram_dq[1]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[1]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X9_Y29_N1 +cycloneive_io_ibuf \sdram_dq[2]~input ( + .i(sdram_dq[2]), + .ibar(gnd), + .o(\sdram_dq[2]~input_o )); +// synopsys translate_off +defparam \sdram_dq[2]~input .bus_hold = "false"; +defparam \sdram_dq[2]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[2]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X14_Y29_N29 +cycloneive_io_ibuf \sdram_dq[3]~input ( + .i(sdram_dq[3]), + .ibar(gnd), + .o(\sdram_dq[3]~input_o )); +// synopsys translate_off +defparam \sdram_dq[3]~input .bus_hold = "false"; +defparam \sdram_dq[3]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[3]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X14_Y29_N22 +cycloneive_io_ibuf \sdram_dq[4]~input ( + .i(sdram_dq[4]), + .ibar(gnd), + .o(\sdram_dq[4]~input_o )); +// synopsys translate_off +defparam \sdram_dq[4]~input .bus_hold = "false"; +defparam \sdram_dq[4]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[4]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X9_Y29_N8 +cycloneive_io_ibuf \sdram_dq[5]~input ( + .i(sdram_dq[5]), + .ibar(gnd), + .o(\sdram_dq[5]~input_o )); +// synopsys translate_off +defparam \sdram_dq[5]~input .bus_hold = "false"; +defparam \sdram_dq[5]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[5]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N15 +cycloneive_io_ibuf \sdram_dq[6]~input ( + .i(sdram_dq[6]), + .ibar(gnd), + .o(\sdram_dq[6]~input_o )); +// synopsys translate_off +defparam \sdram_dq[6]~input .bus_hold = "false"; +defparam \sdram_dq[6]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[6]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N22 +cycloneive_io_ibuf \sdram_dq[7]~input ( + .i(sdram_dq[7]), + .ibar(gnd), + .o(\sdram_dq[7]~input_o )); +// synopsys translate_off +defparam \sdram_dq[7]~input .bus_hold = "false"; +defparam \sdram_dq[7]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[7]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X25_Y25_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({gnd,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout , +\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout , +\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout }), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:rd_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0] $ (VCC) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 .lut_mask = 16'h55AA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N7 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N8 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N9 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0] $ (VCC) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 .lut_mask = 16'h55AA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N27 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N28 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 .lut_mask = 16'h0FF0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N29 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N14 +cycloneive_lcell_comb \uart_tx_inst|tx~4 ( +// Equation(s): +// \uart_tx_inst|tx~4_combout = (\uart_tx_inst|bit_cnt [0]) # ((\uart_tx_inst|bit_cnt [2]) # ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7]) # (\uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~4_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~4 .lut_mask = 16'hFFFE; +defparam \uart_tx_inst|tx~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N8 +cycloneive_lcell_comb \uart_tx_inst|tx~3 ( +// Equation(s): +// \uart_tx_inst|tx~3_combout = (!\uart_tx_inst|bit_flag~q & !\uart_tx_inst|tx~q ) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(gnd), + .datac(gnd), + .datad(\uart_tx_inst|tx~q ), + .cin(gnd), + .combout(\uart_tx_inst|tx~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~3 .lut_mask = 16'h0055; +defparam \uart_tx_inst|tx~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N0 +cycloneive_lcell_comb \uart_tx_inst|tx~5 ( +// Equation(s): +// \uart_tx_inst|tx~5_combout = (!\uart_tx_inst|tx~2_combout & (!\uart_tx_inst|tx~3_combout & ((!\uart_tx_inst|tx~4_combout ) # (!\uart_tx_inst|always0~0_combout )))) + + .dataa(\uart_tx_inst|tx~2_combout ), + .datab(\uart_tx_inst|always0~0_combout ), + .datac(\uart_tx_inst|tx~4_combout ), + .datad(\uart_tx_inst|tx~3_combout ), + .cin(gnd), + .combout(\uart_tx_inst|tx~5_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~5 .lut_mask = 16'h0015; +defparam \uart_tx_inst|tx~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N1 +dffeas \uart_tx_inst|tx ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|tx~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|tx~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|tx .is_wysiwyg = "true"; +defparam \uart_tx_inst|tx .power_up = "low"; +// synopsys translate_on + +// Location: CLKCTRL_G7 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [2]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: FF_X23_Y22_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 .lut_mask = 16'hF0FC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 .lut_mask = 16'hBAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 .lut_mask = 16'h4000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 .lut_mask = 16'hFF20; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 .lut_mask = 16'h8C9D; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1])))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 .lut_mask = 16'h5F22; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 .lut_mask = 16'h00CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 .lut_mask = 16'hFFEE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 .lut_mask = 16'hA1AB; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]))))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 .lut_mask = 16'h5F30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 .lut_mask = 16'h5554; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 .lut_mask = 16'hAAA0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 .lut_mask = 16'h1ABA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 .lut_mask = 16'h4055; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 .lut_mask = 16'hF0FF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 .lut_mask = 16'h3C00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 .lut_mask = 16'h7800; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 .lut_mask = 16'h0002; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS .power_up = "low"; +// synopsys translate_on + +// Location: FF_X21_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 .lut_mask = 16'h55CF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 .lut_mask = 16'hF7F2; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 .lut_mask = 16'h4CCC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0] & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (((!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 .lut_mask = 16'h0777; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 .lut_mask = 16'h0101; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 .lut_mask = 16'h2022; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 .lut_mask = 16'h4400; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 .lut_mask = 16'h5053; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 .lut_mask = 16'h008F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10])))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 .lut_mask = 16'h0FDD; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 .lut_mask = 16'hDFCE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y20_N8 +cycloneive_io_ibuf \sdram_dq[8]~input ( + .i(sdram_dq[8]), + .ibar(gnd), + .o(\sdram_dq[8]~input_o )); +// synopsys translate_off +defparam \sdram_dq[8]~input .bus_hold = "false"; +defparam \sdram_dq[8]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X3_Y29_N29 +cycloneive_io_ibuf \sdram_dq[9]~input ( + .i(sdram_dq[9]), + .ibar(gnd), + .o(\sdram_dq[9]~input_o )); +// synopsys translate_off +defparam \sdram_dq[9]~input .bus_hold = "false"; +defparam \sdram_dq[9]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y25_N1 +cycloneive_io_ibuf \sdram_dq[10]~input ( + .i(sdram_dq[10]), + .ibar(gnd), + .o(\sdram_dq[10]~input_o )); +// synopsys translate_off +defparam \sdram_dq[10]~input .bus_hold = "false"; +defparam \sdram_dq[10]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y26_N8 +cycloneive_io_ibuf \sdram_dq[11]~input ( + .i(sdram_dq[11]), + .ibar(gnd), + .o(\sdram_dq[11]~input_o )); +// synopsys translate_off +defparam \sdram_dq[11]~input .bus_hold = "false"; +defparam \sdram_dq[11]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y23_N8 +cycloneive_io_ibuf \sdram_dq[12]~input ( + .i(sdram_dq[12]), + .ibar(gnd), + .o(\sdram_dq[12]~input_o )); +// synopsys translate_off +defparam \sdram_dq[12]~input .bus_hold = "false"; +defparam \sdram_dq[12]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N8 +cycloneive_io_ibuf \sdram_dq[13]~input ( + .i(sdram_dq[13]), + .ibar(gnd), + .o(\sdram_dq[13]~input_o )); +// synopsys translate_off +defparam \sdram_dq[13]~input .bus_hold = "false"; +defparam \sdram_dq[13]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N22 +cycloneive_io_ibuf \sdram_dq[14]~input ( + .i(sdram_dq[14]), + .ibar(gnd), + .o(\sdram_dq[14]~input_o )); +// synopsys translate_off +defparam \sdram_dq[14]~input .bus_hold = "false"; +defparam \sdram_dq[14]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N1 +cycloneive_io_ibuf \sdram_dq[15]~input ( + .i(sdram_dq[15]), + .ibar(gnd), + .o(\sdram_dq[15]~input_o )); +// synopsys translate_off +defparam \sdram_dq[15]~input .bus_hold = "false"; +defparam \sdram_dq[15]~input .simulate_z_as = "z"; +// synopsys translate_on + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_0c_slow.vo b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_0c_slow.vo new file mode 100644 index 0000000..9d22bab --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_0c_slow.vo @@ -0,0 +1,24917 @@ +// Copyright (C) 1991-2013 Altera Corporation +// Your use of Altera Corporation's design tools, logic functions +// and other software and tools, and its AMPP partner logic +// functions, and any output files from any of the foregoing +// (including device programming or simulation files), and any +// associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License +// Subscription Agreement, Altera MegaCore Function License +// Agreement, or other applicable license agreement, including, +// without limitation, that your use is for the sole purpose of +// programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the +// applicable agreement for further details. + +// VENDOR "Altera" +// PROGRAM "Quartus II 64-Bit" +// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version" + +// DATE "06/02/2023 04:26:31" + +// +// Device: Altera EP4CE15F23C8 Package FBGA484 +// + +// +// This Verilog file should be used for ModelSim (Verilog) only +// + +`timescale 1 ps/ 1 ps + +module uart_sdram ( + sys_clk, + sys_rst_n, + rx, + tx, + sdram_clk, + sdram_cke, + sdram_cs_n, + sdram_cas_n, + sdram_ras_n, + sdram_we_n, + sdram_ba, + sdram_addr, + sdram_dqm, + sdram_dq); +input sys_clk; +input sys_rst_n; +input rx; +output tx; +output sdram_clk; +output sdram_cke; +output sdram_cs_n; +output sdram_cas_n; +output sdram_ras_n; +output sdram_we_n; +output [1:0] sdram_ba; +output [12:0] sdram_addr; +output [1:0] sdram_dqm; +inout [15:0] sdram_dq; + +// Design Ports Information +// tx => Location: PIN_U1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_clk => Location: PIN_E5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cke => Location: PIN_M1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cs_n => Location: PIN_A4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cas_n => Location: PIN_B5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ras_n => Location: PIN_D6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_we_n => Location: PIN_A5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ba[0] => Location: PIN_B4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ba[1] => Location: PIN_C4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[0] => Location: PIN_B3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[1] => Location: PIN_B1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[2] => Location: PIN_B2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[3] => Location: PIN_C1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[4] => Location: PIN_C2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[5] => Location: PIN_E1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[6] => Location: PIN_F1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[7] => Location: PIN_F2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[8] => Location: PIN_H1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[9] => Location: PIN_N2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[10] => Location: PIN_A3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[11] => Location: PIN_N1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[12] => Location: PIN_M2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dqm[0] => Location: PIN_C6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dqm[1] => Location: PIN_J2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[0] => Location: PIN_B7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[1] => Location: PIN_A7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[2] => Location: PIN_C8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[3] => Location: PIN_B8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[4] => Location: PIN_A8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[5] => Location: PIN_C7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[6] => Location: PIN_A6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[7] => Location: PIN_B6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[8] => Location: PIN_J1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[9] => Location: PIN_C3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[10] => Location: PIN_D2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[11] => Location: PIN_E3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[12] => Location: PIN_G4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[13] => Location: PIN_H2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[14] => Location: PIN_J3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[15] => Location: PIN_J4, I/O Standard: 2.5 V, Current Strength: Default +// sys_clk => Location: PIN_T22, I/O Standard: 2.5 V, Current Strength: Default +// sys_rst_n => Location: PIN_U20, I/O Standard: 2.5 V, Current Strength: Default +// rx => Location: PIN_V1, I/O Standard: 2.5 V, Current Strength: Default + + +wire gnd; +wire vcc; +wire unknown; + +assign gnd = 1'b0; +assign vcc = 1'b1; +assign unknown = 1'bx; + +tri1 devclrn; +tri1 devpor; +tri1 devoe; +// synopsys translate_off +initial $sdf_annotate("uart_sdram_8_1200mv_0c_v_slow.sdo"); +// synopsys translate_on + +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ; +wire \uart_tx_inst|baud_cnt[3]~19_combout ; +wire \uart_tx_inst|baud_cnt[4]~21_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ; +wire \fifo_read_inst|Add2~4_combout ; +wire \Add1~1 ; +wire \Add1~0_combout ; +wire \Add1~3 ; +wire \Add1~2_combout ; +wire \Add1~5 ; +wire \Add1~4_combout ; +wire \Add1~7 ; +wire \Add1~6_combout ; +wire \Add1~9 ; +wire \Add1~8_combout ; +wire \Add1~11 ; +wire \Add1~10_combout ; +wire \Add1~13 ; +wire \Add1~12_combout ; +wire \Add1~15 ; +wire \Add1~14_combout ; +wire \Add1~17 ; +wire \Add1~16_combout ; +wire \Add1~19 ; +wire \Add1~18_combout ; +wire \Add1~21 ; +wire \Add1~20_combout ; +wire \Add1~23 ; +wire \Add1~22_combout ; +wire \Add1~25 ; +wire \Add1~24_combout ; +wire \Add1~27 ; +wire \Add1~26_combout ; +wire \Add1~29 ; +wire \Add1~28_combout ; +wire \Add1~30_combout ; +wire \fifo_read_inst|baud_cnt[1]~15_combout ; +wire \fifo_read_inst|baud_cnt[4]~21_combout ; +wire \fifo_read_inst|baud_cnt[9]~31_combout ; +wire \fifo_read_inst|baud_cnt[11]~35_combout ; +wire \data_num[0]~25 ; +wire \data_num[0]~24_combout ; +wire \data_num[1]~27 ; +wire \data_num[1]~26_combout ; +wire \data_num[2]~29 ; +wire \data_num[2]~28_combout ; +wire \data_num[3]~31 ; +wire \data_num[3]~30_combout ; +wire \data_num[4]~33 ; +wire \data_num[4]~32_combout ; +wire \data_num[5]~35 ; +wire \data_num[5]~34_combout ; +wire \data_num[6]~37 ; +wire \data_num[6]~36_combout ; +wire \data_num[7]~39 ; +wire \data_num[7]~38_combout ; +wire \data_num[8]~41 ; +wire \data_num[8]~40_combout ; +wire \data_num[9]~43 ; +wire \data_num[9]~42_combout ; +wire \data_num[10]~45 ; +wire \data_num[10]~44_combout ; +wire \data_num[11]~47 ; +wire \data_num[11]~46_combout ; +wire \data_num[12]~49 ; +wire \data_num[12]~48_combout ; +wire \data_num[13]~51 ; +wire \data_num[13]~50_combout ; +wire \data_num[14]~53 ; +wire \data_num[14]~52_combout ; +wire \data_num[15]~55 ; +wire \data_num[15]~54_combout ; +wire \data_num[16]~57 ; +wire \data_num[16]~56_combout ; +wire \data_num[17]~59 ; +wire \data_num[17]~58_combout ; +wire \data_num[18]~61 ; +wire \data_num[18]~60_combout ; +wire \data_num[19]~63 ; +wire \data_num[19]~62_combout ; +wire \data_num[20]~65 ; +wire \data_num[20]~64_combout ; +wire \data_num[21]~67 ; +wire \data_num[21]~66_combout ; +wire \data_num[22]~69 ; +wire \data_num[22]~68_combout ; +wire \data_num[23]~70_combout ; +wire \uart_rx_inst|Add1~0_combout ; +wire \uart_rx_inst|Add1~5 ; +wire \uart_rx_inst|Add1~6_combout ; +wire \fifo_read_inst|cnt_read[0]~11 ; +wire \fifo_read_inst|cnt_read[0]~10_combout ; +wire \fifo_read_inst|cnt_read[1]~13 ; +wire \fifo_read_inst|cnt_read[1]~12_combout ; +wire \fifo_read_inst|cnt_read[2]~15 ; +wire \fifo_read_inst|cnt_read[2]~14_combout ; +wire \fifo_read_inst|cnt_read[3]~17 ; +wire \fifo_read_inst|cnt_read[3]~16_combout ; +wire \fifo_read_inst|cnt_read[4]~19 ; +wire \fifo_read_inst|cnt_read[4]~18_combout ; +wire \fifo_read_inst|cnt_read[5]~21 ; +wire \fifo_read_inst|cnt_read[5]~20_combout ; +wire \fifo_read_inst|cnt_read[6]~23 ; +wire \fifo_read_inst|cnt_read[6]~22_combout ; +wire \fifo_read_inst|cnt_read[7]~25 ; +wire \fifo_read_inst|cnt_read[7]~24_combout ; +wire \fifo_read_inst|cnt_read[8]~27 ; +wire \fifo_read_inst|cnt_read[8]~26_combout ; +wire \fifo_read_inst|cnt_read[9]~28_combout ; +wire \uart_rx_inst|baud_cnt[4]~21_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ; +wire \uart_tx_inst|Mux0~0_combout ; +wire \uart_tx_inst|Mux0~1_combout ; +wire \uart_tx_inst|tx~0_combout ; +wire \uart_tx_inst|tx~1_combout ; +wire \uart_tx_inst|tx~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ; +wire \uart_tx_inst|Add1~0_combout ; +wire \uart_tx_inst|Add1~1_combout ; +wire \uart_tx_inst|bit_cnt[3]~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ; +wire \read_valid~q ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ; +wire \uart_tx_inst|Equal1~3_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ; +wire \fifo_read_inst|Equal1~0_combout ; +wire \fifo_read_inst|Equal1~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ; +wire \Equal0~0_combout ; +wire \Equal0~1_combout ; +wire \Equal0~2_combout ; +wire \Equal0~3_combout ; +wire \Equal0~4_combout ; +wire \read_valid~0_combout ; +wire \read_valid~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ; +wire \fifo_read_inst|Equal1~2_combout ; +wire \fifo_read_inst|Equal5~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ; +wire \Equal1~0_combout ; +wire \Equal1~1_combout ; +wire \Equal1~2_combout ; +wire \Equal1~3_combout ; +wire \Equal1~4_combout ; +wire \Equal1~5_combout ; +wire \Equal1~6_combout ; +wire \cnt_wait[8]~0_combout ; +wire \cnt_wait[15]~1_combout ; +wire \cnt_wait[15]~2_combout ; +wire \cnt_wait[14]~3_combout ; +wire \cnt_wait[13]~4_combout ; +wire \cnt_wait[12]~5_combout ; +wire \cnt_wait[9]~6_combout ; +wire \cnt_wait[11]~7_combout ; +wire \cnt_wait[10]~8_combout ; +wire \cnt_wait[8]~9_combout ; +wire \cnt_wait[7]~10_combout ; +wire \cnt_wait[6]~11_combout ; +wire \cnt_wait[5]~12_combout ; +wire \cnt_wait[4]~13_combout ; +wire \cnt_wait[3]~14_combout ; +wire \cnt_wait[2]~15_combout ; +wire \cnt_wait[1]~16_combout ; +wire \cnt_wait[0]~17_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ; +wire \fifo_read_inst|rd_flag~q ; +wire \fifo_read_inst|Equal4~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ; +wire \fifo_read_inst|Equal2~0_combout ; +wire \fifo_read_inst|Equal2~1_combout ; +wire \fifo_read_inst|Equal2~2_combout ; +wire \fifo_read_inst|rd_flag~0_combout ; +wire \uart_rx_inst|bit_cnt~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ; +wire \uart_rx_inst|work_en~q ; +wire \uart_rx_inst|start_nedge~q ; +wire \uart_rx_inst|work_en~0_combout ; +wire \uart_rx_inst|always3~0_combout ; +wire \uart_tx_inst|bit_cnt[0]~5_combout ; +wire \sdram_dq[8]~input_o ; +wire \sdram_dq[9]~input_o ; +wire \sdram_dq[10]~input_o ; +wire \sdram_dq[11]~input_o ; +wire \sdram_dq[12]~input_o ; +wire \sdram_dq[13]~input_o ; +wire \sdram_dq[14]~input_o ; +wire \sdram_dq[15]~input_o ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ; +wire \uart_rx_inst|baud_cnt[0]~13_combout ; +wire \sys_clk~input_o ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ; +wire \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ; +wire \sys_rst_n~input_o ; +wire \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ; +wire \rst_n~0_combout ; +wire \rst_n~0clkctrl_outclk ; +wire \uart_rx_inst|baud_cnt[2]~18 ; +wire \uart_rx_inst|baud_cnt[3]~19_combout ; +wire \uart_rx_inst|baud_cnt[3]~20 ; +wire \uart_rx_inst|baud_cnt[4]~22 ; +wire \uart_rx_inst|baud_cnt[5]~23_combout ; +wire \uart_rx_inst|Equal1~1_combout ; +wire \uart_rx_inst|baud_cnt[5]~24 ; +wire \uart_rx_inst|baud_cnt[6]~25_combout ; +wire \uart_rx_inst|baud_cnt[6]~26 ; +wire \uart_rx_inst|baud_cnt[7]~27_combout ; +wire \uart_rx_inst|baud_cnt[7]~28 ; +wire \uart_rx_inst|baud_cnt[8]~29_combout ; +wire \uart_rx_inst|Equal1~0_combout ; +wire \uart_rx_inst|baud_cnt[8]~30 ; +wire \uart_rx_inst|baud_cnt[9]~31_combout ; +wire \uart_rx_inst|baud_cnt[9]~32 ; +wire \uart_rx_inst|baud_cnt[10]~34 ; +wire \uart_rx_inst|baud_cnt[11]~35_combout ; +wire \uart_rx_inst|Equal1~2_combout ; +wire \uart_rx_inst|baud_cnt[10]~33_combout ; +wire \uart_rx_inst|Equal1~3_combout ; +wire \uart_rx_inst|always5~0_combout ; +wire \uart_rx_inst|baud_cnt[0]~14 ; +wire \uart_rx_inst|baud_cnt[1]~15_combout ; +wire \uart_rx_inst|baud_cnt[1]~16 ; +wire \uart_rx_inst|baud_cnt[2]~17_combout ; +wire \uart_rx_inst|Equal2~0_combout ; +wire \uart_rx_inst|baud_cnt[11]~36 ; +wire \uart_rx_inst|baud_cnt[12]~37_combout ; +wire \uart_rx_inst|Equal2~1_combout ; +wire \uart_rx_inst|Equal2~2_combout ; +wire \uart_rx_inst|bit_flag~q ; +wire \uart_rx_inst|Add1~1 ; +wire \uart_rx_inst|Add1~3 ; +wire \uart_rx_inst|Add1~4_combout ; +wire \uart_rx_inst|Add1~2_combout ; +wire \uart_rx_inst|always4~0_combout ; +wire \uart_rx_inst|always4~1_combout ; +wire \uart_rx_inst|rx_flag~q ; +wire \uart_rx_inst|po_flag~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ; +wire \fifo_read_inst|read_en_dly~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ; +wire \fifo_read_inst|Add2~0_combout ; +wire \fifo_read_inst|Add2~1 ; +wire \fifo_read_inst|Add2~3 ; +wire \fifo_read_inst|Add2~5 ; +wire \fifo_read_inst|Add2~6_combout ; +wire \fifo_read_inst|bit_cnt~0_combout ; +wire \fifo_read_inst|baud_cnt[0]~13_combout ; +wire \fifo_read_inst|baud_cnt[5]~24 ; +wire \fifo_read_inst|baud_cnt[6]~25_combout ; +wire \fifo_read_inst|baud_cnt[6]~26 ; +wire \fifo_read_inst|baud_cnt[7]~27_combout ; +wire \fifo_read_inst|baud_cnt[7]~28 ; +wire \fifo_read_inst|baud_cnt[8]~29_combout ; +wire \fifo_read_inst|Equal4~0_combout ; +wire \fifo_read_inst|baud_cnt[3]~19_combout ; +wire \fifo_read_inst|Equal4~1_combout ; +wire \fifo_read_inst|baud_cnt[8]~30 ; +wire \fifo_read_inst|baud_cnt[9]~32 ; +wire \fifo_read_inst|baud_cnt[10]~33_combout ; +wire \fifo_read_inst|baud_cnt[10]~34 ; +wire \fifo_read_inst|baud_cnt[11]~36 ; +wire \fifo_read_inst|baud_cnt[12]~37_combout ; +wire \fifo_read_inst|Equal4~3_combout ; +wire \fifo_read_inst|baud_cnt[0]~14 ; +wire \fifo_read_inst|baud_cnt[1]~16 ; +wire \fifo_read_inst|baud_cnt[2]~17_combout ; +wire \fifo_read_inst|baud_cnt[2]~18 ; +wire \fifo_read_inst|baud_cnt[3]~20 ; +wire \fifo_read_inst|baud_cnt[4]~22 ; +wire \fifo_read_inst|baud_cnt[5]~23_combout ; +wire \fifo_read_inst|Equal5~0_combout ; +wire \fifo_read_inst|Equal5~2_combout ; +wire \fifo_read_inst|bit_flag~q ; +wire \fifo_read_inst|Add2~2_combout ; +wire \fifo_read_inst|bit_cnt~1_combout ; +wire \fifo_read_inst|always5~0_combout ; +wire \fifo_read_inst|always5~1_combout ; +wire \fifo_read_inst|rd_en~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ; +wire \Equal2~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ; +wire \fifo_read_inst|read_en~0_combout ; +wire \fifo_read_inst|read_en~1_combout ; +wire \fifo_read_inst|read_en~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ; +wire \Equal2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ; +wire \rx~input_o ; +wire \uart_rx_inst|rx_reg1~0_combout ; +wire \uart_rx_inst|rx_reg1~q ; +wire \uart_rx_inst|rx_reg2~feeder_combout ; +wire \uart_rx_inst|rx_reg2~q ; +wire \uart_rx_inst|rx_reg3~feeder_combout ; +wire \uart_rx_inst|rx_reg3~q ; +wire \uart_rx_inst|rx_data[7]~0_combout ; +wire \uart_rx_inst|bit_cnt~0_combout ; +wire \uart_rx_inst|always8~0_combout ; +wire \uart_rx_inst|rx_data[5]~feeder_combout ; +wire \uart_rx_inst|rx_data[4]~feeder_combout ; +wire \uart_rx_inst|rx_data[3]~feeder_combout ; +wire \uart_rx_inst|rx_data[2]~feeder_combout ; +wire \uart_rx_inst|rx_data[1]~feeder_combout ; +wire \uart_rx_inst|rx_data[0]~feeder_combout ; +wire \uart_rx_inst|po_data[0]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ; +wire \uart_rx_inst|po_data[1]~feeder_combout ; +wire \uart_rx_inst|po_data[2]~feeder_combout ; +wire \uart_rx_inst|po_data[3]~feeder_combout ; +wire \uart_rx_inst|po_data[4]~feeder_combout ; +wire \uart_rx_inst|po_data[5]~feeder_combout ; +wire \uart_rx_inst|po_data[6]~feeder_combout ; +wire \~GND~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ; +wire \sys_clk~inputclkctrl_outclk ; +wire \uart_tx_inst|baud_cnt[0]~13_combout ; +wire \uart_tx_inst|baud_cnt[11]~35_combout ; +wire \uart_tx_inst|Equal1~0_combout ; +wire \uart_tx_inst|baud_cnt[9]~31_combout ; +wire \uart_tx_inst|Equal1~1_combout ; +wire \uart_tx_inst|baud_cnt[1]~15_combout ; +wire \uart_tx_inst|Equal1~2_combout ; +wire \fifo_read_inst|tx_flag~q ; +wire \uart_tx_inst|always3~0_combout ; +wire \uart_tx_inst|bit_cnt[1]~2_combout ; +wire \uart_tx_inst|bit_cnt[2]~3_combout ; +wire \uart_tx_inst|always0~1_combout ; +wire \uart_tx_inst|work_en~0_combout ; +wire \uart_tx_inst|work_en~q ; +wire \uart_tx_inst|always1~0_combout ; +wire \uart_tx_inst|baud_cnt[0]~14 ; +wire \uart_tx_inst|baud_cnt[1]~16 ; +wire \uart_tx_inst|baud_cnt[2]~17_combout ; +wire \uart_tx_inst|baud_cnt[2]~18 ; +wire \uart_tx_inst|baud_cnt[3]~20 ; +wire \uart_tx_inst|baud_cnt[4]~22 ; +wire \uart_tx_inst|baud_cnt[5]~23_combout ; +wire \uart_tx_inst|baud_cnt[5]~24 ; +wire \uart_tx_inst|baud_cnt[6]~25_combout ; +wire \uart_tx_inst|baud_cnt[6]~26 ; +wire \uart_tx_inst|baud_cnt[7]~27_combout ; +wire \uart_tx_inst|baud_cnt[7]~28 ; +wire \uart_tx_inst|baud_cnt[8]~29_combout ; +wire \uart_tx_inst|baud_cnt[8]~30 ; +wire \uart_tx_inst|baud_cnt[9]~32 ; +wire \uart_tx_inst|baud_cnt[10]~33_combout ; +wire \uart_tx_inst|baud_cnt[10]~34 ; +wire \uart_tx_inst|baud_cnt[11]~36 ; +wire \uart_tx_inst|baud_cnt[12]~37_combout ; +wire \uart_tx_inst|Equal2~0_combout ; +wire \uart_tx_inst|Equal2~1_combout ; +wire \uart_tx_inst|bit_flag~q ; +wire \uart_tx_inst|always0~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ; +wire \sdram_dq[0]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ; +wire \sdram_dq[1]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ; +wire \sdram_dq[2]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout ; +wire \sdram_dq[3]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ; +wire \sdram_dq[4]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ; +wire \sdram_dq[5]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout ; +wire \sdram_dq[6]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ; +wire \sdram_dq[7]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ; +wire \uart_tx_inst|tx~4_combout ; +wire \uart_tx_inst|tx~3_combout ; +wire \uart_tx_inst|tx~5_combout ; +wire \uart_tx_inst|tx~q ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a ; +wire [15:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit ; +wire [23:0] data_num; +wire [15:0] cnt_wait; +wire [4:0] \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk ; +wire [7:0] \uart_rx_inst|rx_data ; +wire [7:0] \uart_rx_inst|po_data ; +wire [3:0] \uart_rx_inst|bit_cnt ; +wire [12:0] \uart_rx_inst|baud_cnt ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g ; +wire [9:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a ; +wire [15:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref ; +wire [2:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk ; +wire [14:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us ; +wire [2:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba ; +wire [12:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd ; +wire [12:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr ; +wire [15:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk ; +wire [9:0] \fifo_read_inst|cnt_read ; +wire [3:0] \fifo_read_inst|bit_cnt ; +wire [12:0] \fifo_read_inst|baud_cnt ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit ; +wire [7:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit ; +wire [3:0] \uart_tx_inst|bit_cnt ; +wire [12:0] \uart_tx_inst|baud_cnt ; + +wire [4:0] \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus ; +wire [8:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus ; + +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [0] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [0]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [1] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [1]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [2] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [2]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [3] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [3]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [4] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [4]; + +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [0]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [1]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [2]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [3]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [4] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [4]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [5]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [6]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [7]; + +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [6]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [7]; + +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [6]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [7]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [8] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [8]; + +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [9] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [10] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [11] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [12] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [13] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [14] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [15] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [6]; + +// Location: M9K_X25_Y18_N0 +cycloneive_ram_block \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 ( + .portawe(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .ena0(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .ena1(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({gnd,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0]}), + .portaaddr({\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk0_core_clock_enable = "ena0"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk1_core_clock_enable = "ena1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk1_input_clock_enable = "ena1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .data_interleave_offset_in_bits = 1; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .data_interleave_width_in_bits = 1; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .logical_ram_name = "fifo_read:fifo_read_inst|read_fifo:read_fifo_inst|scfifo:scfifo_component|scfifo_un21:auto_generated|a_dpfifo_5u21:dpfifo|dpram_d811:FIFOram|altsyncram_c3k1:altsyncram1|ALTSYNCRAM"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .operation_mode = "dual_port"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_address_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_address_width = 10; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_byte_enable_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_out_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_out_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_width = 9; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_first_address = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_first_bit_number = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_last_address = 1023; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_logical_ram_depth = 1024; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_logical_ram_width = 8; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_clock = "clock1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_width = 10; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_out_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_out_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_width = 9; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_first_address = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_first_bit_number = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_last_address = 1023; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_logical_ram_depth = 1024; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_logical_ram_width = 8; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_read_enable_clock = "clock1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: FF_X24_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y21_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y18_N11 +dffeas \uart_tx_inst|baud_cnt[3] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y18_N13 +dffeas \uart_tx_inst|baud_cnt[4] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0] & ((GND) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0] $ (GND))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 .lut_mask = 16'h66BB; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N10 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[3]~19 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[3]~19_combout = (\uart_tx_inst|baud_cnt [3] & (!\uart_tx_inst|baud_cnt[2]~18 )) # (!\uart_tx_inst|baud_cnt [3] & ((\uart_tx_inst|baud_cnt[2]~18 ) # (GND))) +// \uart_tx_inst|baud_cnt[3]~20 = CARRY((!\uart_tx_inst|baud_cnt[2]~18 ) # (!\uart_tx_inst|baud_cnt [3])) + + .dataa(\uart_tx_inst|baud_cnt [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[2]~18 ), + .combout(\uart_tx_inst|baud_cnt[3]~19_combout ), + .cout(\uart_tx_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[3]~19 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[4]~21 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[4]~21_combout = (\uart_tx_inst|baud_cnt [4] & (\uart_tx_inst|baud_cnt[3]~20 $ (GND))) # (!\uart_tx_inst|baud_cnt [4] & (!\uart_tx_inst|baud_cnt[3]~20 & VCC)) +// \uart_tx_inst|baud_cnt[4]~22 = CARRY((\uart_tx_inst|baud_cnt [4] & !\uart_tx_inst|baud_cnt[3]~20 )) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[3]~20 ), + .combout(\uart_tx_inst|baud_cnt[4]~21_combout ), + .cout(\uart_tx_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \uart_tx_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [13] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N8 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N7 +dffeas \fifo_read_inst|baud_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N13 +dffeas \fifo_read_inst|baud_cnt[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N23 +dffeas \fifo_read_inst|baud_cnt[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N27 +dffeas \fifo_read_inst|baud_cnt[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N12 +cycloneive_lcell_comb \fifo_read_inst|Add2~4 ( +// Equation(s): +// \fifo_read_inst|Add2~4_combout = (\fifo_read_inst|bit_cnt [2] & (\fifo_read_inst|Add2~3 $ (GND))) # (!\fifo_read_inst|bit_cnt [2] & (!\fifo_read_inst|Add2~3 & VCC)) +// \fifo_read_inst|Add2~5 = CARRY((\fifo_read_inst|bit_cnt [2] & !\fifo_read_inst|Add2~3 )) + + .dataa(\fifo_read_inst|bit_cnt [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|Add2~3 ), + .combout(\fifo_read_inst|Add2~4_combout ), + .cout(\fifo_read_inst|Add2~5 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~4 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|Add2~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y24_N9 +dffeas \data_num[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[0]~24_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[0]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[0] .is_wysiwyg = "true"; +defparam \data_num[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N13 +dffeas \data_num[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[2]~28_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[2]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[2] .is_wysiwyg = "true"; +defparam \data_num[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N11 +dffeas \data_num[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[1]~26_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[1]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[1] .is_wysiwyg = "true"; +defparam \data_num[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N15 +dffeas \data_num[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[3]~30_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[3]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[3] .is_wysiwyg = "true"; +defparam \data_num[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N17 +dffeas \data_num[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[4]~32_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[4]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[4] .is_wysiwyg = "true"; +defparam \data_num[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N19 +dffeas \data_num[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[5]~34_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[5]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[5] .is_wysiwyg = "true"; +defparam \data_num[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N21 +dffeas \data_num[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[6]~36_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[6]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[6] .is_wysiwyg = "true"; +defparam \data_num[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N23 +dffeas \data_num[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[7]~38_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[7]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[7] .is_wysiwyg = "true"; +defparam \data_num[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N25 +dffeas \data_num[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[8]~40_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[8]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[8] .is_wysiwyg = "true"; +defparam \data_num[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N27 +dffeas \data_num[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[9]~42_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[9]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[9] .is_wysiwyg = "true"; +defparam \data_num[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N29 +dffeas \data_num[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[10]~44_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[10]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[10] .is_wysiwyg = "true"; +defparam \data_num[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N31 +dffeas \data_num[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[11]~46_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[11]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[11] .is_wysiwyg = "true"; +defparam \data_num[11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N1 +dffeas \data_num[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[12]~48_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[12]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[12] .is_wysiwyg = "true"; +defparam \data_num[12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N3 +dffeas \data_num[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[13]~50_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[13]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[13] .is_wysiwyg = "true"; +defparam \data_num[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N5 +dffeas \data_num[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[14]~52_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[14]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[14] .is_wysiwyg = "true"; +defparam \data_num[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N7 +dffeas \data_num[15] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[15]~54_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[15]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[15] .is_wysiwyg = "true"; +defparam \data_num[15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N9 +dffeas \data_num[16] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[16]~56_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[16]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[16] .is_wysiwyg = "true"; +defparam \data_num[16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N11 +dffeas \data_num[17] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[17]~58_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[17]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[17] .is_wysiwyg = "true"; +defparam \data_num[17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N13 +dffeas \data_num[18] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[18]~60_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[18]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[18] .is_wysiwyg = "true"; +defparam \data_num[18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N15 +dffeas \data_num[19] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[19]~62_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[19]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[19] .is_wysiwyg = "true"; +defparam \data_num[19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N17 +dffeas \data_num[20] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[20]~64_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[20]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[20] .is_wysiwyg = "true"; +defparam \data_num[20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N19 +dffeas \data_num[21] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[21]~66_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[21]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[21] .is_wysiwyg = "true"; +defparam \data_num[21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N21 +dffeas \data_num[22] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[22]~68_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[22]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[22] .is_wysiwyg = "true"; +defparam \data_num[22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N23 +dffeas \data_num[23] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[23]~70_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[23]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[23] .is_wysiwyg = "true"; +defparam \data_num[23] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N0 +cycloneive_lcell_comb \Add1~0 ( +// Equation(s): +// \Add1~0_combout = cnt_wait[0] $ (VCC) +// \Add1~1 = CARRY(cnt_wait[0]) + + .dataa(gnd), + .datab(cnt_wait[0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\Add1~0_combout ), + .cout(\Add1~1 )); +// synopsys translate_off +defparam \Add1~0 .lut_mask = 16'h33CC; +defparam \Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N2 +cycloneive_lcell_comb \Add1~2 ( +// Equation(s): +// \Add1~2_combout = (cnt_wait[1] & (!\Add1~1 )) # (!cnt_wait[1] & ((\Add1~1 ) # (GND))) +// \Add1~3 = CARRY((!\Add1~1 ) # (!cnt_wait[1])) + + .dataa(cnt_wait[1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~1 ), + .combout(\Add1~2_combout ), + .cout(\Add1~3 )); +// synopsys translate_off +defparam \Add1~2 .lut_mask = 16'h5A5F; +defparam \Add1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N4 +cycloneive_lcell_comb \Add1~4 ( +// Equation(s): +// \Add1~4_combout = (cnt_wait[2] & (\Add1~3 $ (GND))) # (!cnt_wait[2] & (!\Add1~3 & VCC)) +// \Add1~5 = CARRY((cnt_wait[2] & !\Add1~3 )) + + .dataa(gnd), + .datab(cnt_wait[2]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~3 ), + .combout(\Add1~4_combout ), + .cout(\Add1~5 )); +// synopsys translate_off +defparam \Add1~4 .lut_mask = 16'hC30C; +defparam \Add1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N6 +cycloneive_lcell_comb \Add1~6 ( +// Equation(s): +// \Add1~6_combout = (cnt_wait[3] & (!\Add1~5 )) # (!cnt_wait[3] & ((\Add1~5 ) # (GND))) +// \Add1~7 = CARRY((!\Add1~5 ) # (!cnt_wait[3])) + + .dataa(gnd), + .datab(cnt_wait[3]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~5 ), + .combout(\Add1~6_combout ), + .cout(\Add1~7 )); +// synopsys translate_off +defparam \Add1~6 .lut_mask = 16'h3C3F; +defparam \Add1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N8 +cycloneive_lcell_comb \Add1~8 ( +// Equation(s): +// \Add1~8_combout = (cnt_wait[4] & (\Add1~7 $ (GND))) # (!cnt_wait[4] & (!\Add1~7 & VCC)) +// \Add1~9 = CARRY((cnt_wait[4] & !\Add1~7 )) + + .dataa(cnt_wait[4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~7 ), + .combout(\Add1~8_combout ), + .cout(\Add1~9 )); +// synopsys translate_off +defparam \Add1~8 .lut_mask = 16'hA50A; +defparam \Add1~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N10 +cycloneive_lcell_comb \Add1~10 ( +// Equation(s): +// \Add1~10_combout = (cnt_wait[5] & (!\Add1~9 )) # (!cnt_wait[5] & ((\Add1~9 ) # (GND))) +// \Add1~11 = CARRY((!\Add1~9 ) # (!cnt_wait[5])) + + .dataa(cnt_wait[5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~9 ), + .combout(\Add1~10_combout ), + .cout(\Add1~11 )); +// synopsys translate_off +defparam \Add1~10 .lut_mask = 16'h5A5F; +defparam \Add1~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N12 +cycloneive_lcell_comb \Add1~12 ( +// Equation(s): +// \Add1~12_combout = (cnt_wait[6] & (\Add1~11 $ (GND))) # (!cnt_wait[6] & (!\Add1~11 & VCC)) +// \Add1~13 = CARRY((cnt_wait[6] & !\Add1~11 )) + + .dataa(cnt_wait[6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~11 ), + .combout(\Add1~12_combout ), + .cout(\Add1~13 )); +// synopsys translate_off +defparam \Add1~12 .lut_mask = 16'hA50A; +defparam \Add1~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N14 +cycloneive_lcell_comb \Add1~14 ( +// Equation(s): +// \Add1~14_combout = (cnt_wait[7] & (!\Add1~13 )) # (!cnt_wait[7] & ((\Add1~13 ) # (GND))) +// \Add1~15 = CARRY((!\Add1~13 ) # (!cnt_wait[7])) + + .dataa(cnt_wait[7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~13 ), + .combout(\Add1~14_combout ), + .cout(\Add1~15 )); +// synopsys translate_off +defparam \Add1~14 .lut_mask = 16'h5A5F; +defparam \Add1~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N16 +cycloneive_lcell_comb \Add1~16 ( +// Equation(s): +// \Add1~16_combout = (cnt_wait[8] & (\Add1~15 $ (GND))) # (!cnt_wait[8] & (!\Add1~15 & VCC)) +// \Add1~17 = CARRY((cnt_wait[8] & !\Add1~15 )) + + .dataa(cnt_wait[8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~15 ), + .combout(\Add1~16_combout ), + .cout(\Add1~17 )); +// synopsys translate_off +defparam \Add1~16 .lut_mask = 16'hA50A; +defparam \Add1~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N18 +cycloneive_lcell_comb \Add1~18 ( +// Equation(s): +// \Add1~18_combout = (cnt_wait[9] & (!\Add1~17 )) # (!cnt_wait[9] & ((\Add1~17 ) # (GND))) +// \Add1~19 = CARRY((!\Add1~17 ) # (!cnt_wait[9])) + + .dataa(gnd), + .datab(cnt_wait[9]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~17 ), + .combout(\Add1~18_combout ), + .cout(\Add1~19 )); +// synopsys translate_off +defparam \Add1~18 .lut_mask = 16'h3C3F; +defparam \Add1~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N20 +cycloneive_lcell_comb \Add1~20 ( +// Equation(s): +// \Add1~20_combout = (cnt_wait[10] & (\Add1~19 $ (GND))) # (!cnt_wait[10] & (!\Add1~19 & VCC)) +// \Add1~21 = CARRY((cnt_wait[10] & !\Add1~19 )) + + .dataa(cnt_wait[10]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~19 ), + .combout(\Add1~20_combout ), + .cout(\Add1~21 )); +// synopsys translate_off +defparam \Add1~20 .lut_mask = 16'hA50A; +defparam \Add1~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N22 +cycloneive_lcell_comb \Add1~22 ( +// Equation(s): +// \Add1~22_combout = (cnt_wait[11] & (!\Add1~21 )) # (!cnt_wait[11] & ((\Add1~21 ) # (GND))) +// \Add1~23 = CARRY((!\Add1~21 ) # (!cnt_wait[11])) + + .dataa(gnd), + .datab(cnt_wait[11]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~21 ), + .combout(\Add1~22_combout ), + .cout(\Add1~23 )); +// synopsys translate_off +defparam \Add1~22 .lut_mask = 16'h3C3F; +defparam \Add1~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N24 +cycloneive_lcell_comb \Add1~24 ( +// Equation(s): +// \Add1~24_combout = (cnt_wait[12] & (\Add1~23 $ (GND))) # (!cnt_wait[12] & (!\Add1~23 & VCC)) +// \Add1~25 = CARRY((cnt_wait[12] & !\Add1~23 )) + + .dataa(gnd), + .datab(cnt_wait[12]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~23 ), + .combout(\Add1~24_combout ), + .cout(\Add1~25 )); +// synopsys translate_off +defparam \Add1~24 .lut_mask = 16'hC30C; +defparam \Add1~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N26 +cycloneive_lcell_comb \Add1~26 ( +// Equation(s): +// \Add1~26_combout = (cnt_wait[13] & (!\Add1~25 )) # (!cnt_wait[13] & ((\Add1~25 ) # (GND))) +// \Add1~27 = CARRY((!\Add1~25 ) # (!cnt_wait[13])) + + .dataa(gnd), + .datab(cnt_wait[13]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~25 ), + .combout(\Add1~26_combout ), + .cout(\Add1~27 )); +// synopsys translate_off +defparam \Add1~26 .lut_mask = 16'h3C3F; +defparam \Add1~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N28 +cycloneive_lcell_comb \Add1~28 ( +// Equation(s): +// \Add1~28_combout = (cnt_wait[14] & (\Add1~27 $ (GND))) # (!cnt_wait[14] & (!\Add1~27 & VCC)) +// \Add1~29 = CARRY((cnt_wait[14] & !\Add1~27 )) + + .dataa(cnt_wait[14]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~27 ), + .combout(\Add1~28_combout ), + .cout(\Add1~29 )); +// synopsys translate_off +defparam \Add1~28 .lut_mask = 16'hA50A; +defparam \Add1~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N30 +cycloneive_lcell_comb \Add1~30 ( +// Equation(s): +// \Add1~30_combout = \Add1~29 $ (cnt_wait[15]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(cnt_wait[15]), + .cin(\Add1~29 ), + .combout(\Add1~30_combout ), + .cout()); +// synopsys translate_off +defparam \Add1~30 .lut_mask = 16'h0FF0; +defparam \Add1~30 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N6 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[1]~15 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[1]~15_combout = (\fifo_read_inst|baud_cnt [1] & (!\fifo_read_inst|baud_cnt[0]~14 )) # (!\fifo_read_inst|baud_cnt [1] & ((\fifo_read_inst|baud_cnt[0]~14 ) # (GND))) +// \fifo_read_inst|baud_cnt[1]~16 = CARRY((!\fifo_read_inst|baud_cnt[0]~14 ) # (!\fifo_read_inst|baud_cnt [1])) + + .dataa(\fifo_read_inst|baud_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[0]~14 ), + .combout(\fifo_read_inst|baud_cnt[1]~15_combout ), + .cout(\fifo_read_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[1]~15 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N12 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[4]~21 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[4]~21_combout = (\fifo_read_inst|baud_cnt [4] & (\fifo_read_inst|baud_cnt[3]~20 $ (GND))) # (!\fifo_read_inst|baud_cnt [4] & (!\fifo_read_inst|baud_cnt[3]~20 & VCC)) +// \fifo_read_inst|baud_cnt[4]~22 = CARRY((\fifo_read_inst|baud_cnt [4] & !\fifo_read_inst|baud_cnt[3]~20 )) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[3]~20 ), + .combout(\fifo_read_inst|baud_cnt[4]~21_combout ), + .cout(\fifo_read_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N22 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[9]~31 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[9]~31_combout = (\fifo_read_inst|baud_cnt [9] & (!\fifo_read_inst|baud_cnt[8]~30 )) # (!\fifo_read_inst|baud_cnt [9] & ((\fifo_read_inst|baud_cnt[8]~30 ) # (GND))) +// \fifo_read_inst|baud_cnt[9]~32 = CARRY((!\fifo_read_inst|baud_cnt[8]~30 ) # (!\fifo_read_inst|baud_cnt [9])) + + .dataa(\fifo_read_inst|baud_cnt [9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[8]~30 ), + .combout(\fifo_read_inst|baud_cnt[9]~31_combout ), + .cout(\fifo_read_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[9]~31 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N26 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[11]~35 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[11]~35_combout = (\fifo_read_inst|baud_cnt [11] & (!\fifo_read_inst|baud_cnt[10]~34 )) # (!\fifo_read_inst|baud_cnt [11] & ((\fifo_read_inst|baud_cnt[10]~34 ) # (GND))) +// \fifo_read_inst|baud_cnt[11]~36 = CARRY((!\fifo_read_inst|baud_cnt[10]~34 ) # (!\fifo_read_inst|baud_cnt [11])) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[10]~34 ), + .combout(\fifo_read_inst|baud_cnt[11]~35_combout ), + .cout(\fifo_read_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[11]~35 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N8 +cycloneive_lcell_comb \data_num[0]~24 ( +// Equation(s): +// \data_num[0]~24_combout = (\uart_rx_inst|po_flag~q & (data_num[0] $ (VCC))) # (!\uart_rx_inst|po_flag~q & (data_num[0] & VCC)) +// \data_num[0]~25 = CARRY((\uart_rx_inst|po_flag~q & data_num[0])) + + .dataa(\uart_rx_inst|po_flag~q ), + .datab(data_num[0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\data_num[0]~24_combout ), + .cout(\data_num[0]~25 )); +// synopsys translate_off +defparam \data_num[0]~24 .lut_mask = 16'h6688; +defparam \data_num[0]~24 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N10 +cycloneive_lcell_comb \data_num[1]~26 ( +// Equation(s): +// \data_num[1]~26_combout = (data_num[1] & (!\data_num[0]~25 )) # (!data_num[1] & ((\data_num[0]~25 ) # (GND))) +// \data_num[1]~27 = CARRY((!\data_num[0]~25 ) # (!data_num[1])) + + .dataa(data_num[1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[0]~25 ), + .combout(\data_num[1]~26_combout ), + .cout(\data_num[1]~27 )); +// synopsys translate_off +defparam \data_num[1]~26 .lut_mask = 16'h5A5F; +defparam \data_num[1]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N12 +cycloneive_lcell_comb \data_num[2]~28 ( +// Equation(s): +// \data_num[2]~28_combout = (data_num[2] & (\data_num[1]~27 $ (GND))) # (!data_num[2] & (!\data_num[1]~27 & VCC)) +// \data_num[2]~29 = CARRY((data_num[2] & !\data_num[1]~27 )) + + .dataa(data_num[2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[1]~27 ), + .combout(\data_num[2]~28_combout ), + .cout(\data_num[2]~29 )); +// synopsys translate_off +defparam \data_num[2]~28 .lut_mask = 16'hA50A; +defparam \data_num[2]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N14 +cycloneive_lcell_comb \data_num[3]~30 ( +// Equation(s): +// \data_num[3]~30_combout = (data_num[3] & (!\data_num[2]~29 )) # (!data_num[3] & ((\data_num[2]~29 ) # (GND))) +// \data_num[3]~31 = CARRY((!\data_num[2]~29 ) # (!data_num[3])) + + .dataa(gnd), + .datab(data_num[3]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[2]~29 ), + .combout(\data_num[3]~30_combout ), + .cout(\data_num[3]~31 )); +// synopsys translate_off +defparam \data_num[3]~30 .lut_mask = 16'h3C3F; +defparam \data_num[3]~30 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N16 +cycloneive_lcell_comb \data_num[4]~32 ( +// Equation(s): +// \data_num[4]~32_combout = (data_num[4] & (\data_num[3]~31 $ (GND))) # (!data_num[4] & (!\data_num[3]~31 & VCC)) +// \data_num[4]~33 = CARRY((data_num[4] & !\data_num[3]~31 )) + + .dataa(gnd), + .datab(data_num[4]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[3]~31 ), + .combout(\data_num[4]~32_combout ), + .cout(\data_num[4]~33 )); +// synopsys translate_off +defparam \data_num[4]~32 .lut_mask = 16'hC30C; +defparam \data_num[4]~32 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N18 +cycloneive_lcell_comb \data_num[5]~34 ( +// Equation(s): +// \data_num[5]~34_combout = (data_num[5] & (!\data_num[4]~33 )) # (!data_num[5] & ((\data_num[4]~33 ) # (GND))) +// \data_num[5]~35 = CARRY((!\data_num[4]~33 ) # (!data_num[5])) + + .dataa(gnd), + .datab(data_num[5]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[4]~33 ), + .combout(\data_num[5]~34_combout ), + .cout(\data_num[5]~35 )); +// synopsys translate_off +defparam \data_num[5]~34 .lut_mask = 16'h3C3F; +defparam \data_num[5]~34 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N20 +cycloneive_lcell_comb \data_num[6]~36 ( +// Equation(s): +// \data_num[6]~36_combout = (data_num[6] & (\data_num[5]~35 $ (GND))) # (!data_num[6] & (!\data_num[5]~35 & VCC)) +// \data_num[6]~37 = CARRY((data_num[6] & !\data_num[5]~35 )) + + .dataa(gnd), + .datab(data_num[6]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[5]~35 ), + .combout(\data_num[6]~36_combout ), + .cout(\data_num[6]~37 )); +// synopsys translate_off +defparam \data_num[6]~36 .lut_mask = 16'hC30C; +defparam \data_num[6]~36 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N22 +cycloneive_lcell_comb \data_num[7]~38 ( +// Equation(s): +// \data_num[7]~38_combout = (data_num[7] & (!\data_num[6]~37 )) # (!data_num[7] & ((\data_num[6]~37 ) # (GND))) +// \data_num[7]~39 = CARRY((!\data_num[6]~37 ) # (!data_num[7])) + + .dataa(data_num[7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[6]~37 ), + .combout(\data_num[7]~38_combout ), + .cout(\data_num[7]~39 )); +// synopsys translate_off +defparam \data_num[7]~38 .lut_mask = 16'h5A5F; +defparam \data_num[7]~38 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N24 +cycloneive_lcell_comb \data_num[8]~40 ( +// Equation(s): +// \data_num[8]~40_combout = (data_num[8] & (\data_num[7]~39 $ (GND))) # (!data_num[8] & (!\data_num[7]~39 & VCC)) +// \data_num[8]~41 = CARRY((data_num[8] & !\data_num[7]~39 )) + + .dataa(gnd), + .datab(data_num[8]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[7]~39 ), + .combout(\data_num[8]~40_combout ), + .cout(\data_num[8]~41 )); +// synopsys translate_off +defparam \data_num[8]~40 .lut_mask = 16'hC30C; +defparam \data_num[8]~40 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N26 +cycloneive_lcell_comb \data_num[9]~42 ( +// Equation(s): +// \data_num[9]~42_combout = (data_num[9] & (!\data_num[8]~41 )) # (!data_num[9] & ((\data_num[8]~41 ) # (GND))) +// \data_num[9]~43 = CARRY((!\data_num[8]~41 ) # (!data_num[9])) + + .dataa(data_num[9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[8]~41 ), + .combout(\data_num[9]~42_combout ), + .cout(\data_num[9]~43 )); +// synopsys translate_off +defparam \data_num[9]~42 .lut_mask = 16'h5A5F; +defparam \data_num[9]~42 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N28 +cycloneive_lcell_comb \data_num[10]~44 ( +// Equation(s): +// \data_num[10]~44_combout = (data_num[10] & (\data_num[9]~43 $ (GND))) # (!data_num[10] & (!\data_num[9]~43 & VCC)) +// \data_num[10]~45 = CARRY((data_num[10] & !\data_num[9]~43 )) + + .dataa(gnd), + .datab(data_num[10]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[9]~43 ), + .combout(\data_num[10]~44_combout ), + .cout(\data_num[10]~45 )); +// synopsys translate_off +defparam \data_num[10]~44 .lut_mask = 16'hC30C; +defparam \data_num[10]~44 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N30 +cycloneive_lcell_comb \data_num[11]~46 ( +// Equation(s): +// \data_num[11]~46_combout = (data_num[11] & (!\data_num[10]~45 )) # (!data_num[11] & ((\data_num[10]~45 ) # (GND))) +// \data_num[11]~47 = CARRY((!\data_num[10]~45 ) # (!data_num[11])) + + .dataa(data_num[11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[10]~45 ), + .combout(\data_num[11]~46_combout ), + .cout(\data_num[11]~47 )); +// synopsys translate_off +defparam \data_num[11]~46 .lut_mask = 16'h5A5F; +defparam \data_num[11]~46 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N0 +cycloneive_lcell_comb \data_num[12]~48 ( +// Equation(s): +// \data_num[12]~48_combout = (data_num[12] & (\data_num[11]~47 $ (GND))) # (!data_num[12] & (!\data_num[11]~47 & VCC)) +// \data_num[12]~49 = CARRY((data_num[12] & !\data_num[11]~47 )) + + .dataa(gnd), + .datab(data_num[12]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[11]~47 ), + .combout(\data_num[12]~48_combout ), + .cout(\data_num[12]~49 )); +// synopsys translate_off +defparam \data_num[12]~48 .lut_mask = 16'hC30C; +defparam \data_num[12]~48 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N2 +cycloneive_lcell_comb \data_num[13]~50 ( +// Equation(s): +// \data_num[13]~50_combout = (data_num[13] & (!\data_num[12]~49 )) # (!data_num[13] & ((\data_num[12]~49 ) # (GND))) +// \data_num[13]~51 = CARRY((!\data_num[12]~49 ) # (!data_num[13])) + + .dataa(gnd), + .datab(data_num[13]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[12]~49 ), + .combout(\data_num[13]~50_combout ), + .cout(\data_num[13]~51 )); +// synopsys translate_off +defparam \data_num[13]~50 .lut_mask = 16'h3C3F; +defparam \data_num[13]~50 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N4 +cycloneive_lcell_comb \data_num[14]~52 ( +// Equation(s): +// \data_num[14]~52_combout = (data_num[14] & (\data_num[13]~51 $ (GND))) # (!data_num[14] & (!\data_num[13]~51 & VCC)) +// \data_num[14]~53 = CARRY((data_num[14] & !\data_num[13]~51 )) + + .dataa(gnd), + .datab(data_num[14]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[13]~51 ), + .combout(\data_num[14]~52_combout ), + .cout(\data_num[14]~53 )); +// synopsys translate_off +defparam \data_num[14]~52 .lut_mask = 16'hC30C; +defparam \data_num[14]~52 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N6 +cycloneive_lcell_comb \data_num[15]~54 ( +// Equation(s): +// \data_num[15]~54_combout = (data_num[15] & (!\data_num[14]~53 )) # (!data_num[15] & ((\data_num[14]~53 ) # (GND))) +// \data_num[15]~55 = CARRY((!\data_num[14]~53 ) # (!data_num[15])) + + .dataa(data_num[15]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[14]~53 ), + .combout(\data_num[15]~54_combout ), + .cout(\data_num[15]~55 )); +// synopsys translate_off +defparam \data_num[15]~54 .lut_mask = 16'h5A5F; +defparam \data_num[15]~54 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N8 +cycloneive_lcell_comb \data_num[16]~56 ( +// Equation(s): +// \data_num[16]~56_combout = (data_num[16] & (\data_num[15]~55 $ (GND))) # (!data_num[16] & (!\data_num[15]~55 & VCC)) +// \data_num[16]~57 = CARRY((data_num[16] & !\data_num[15]~55 )) + + .dataa(gnd), + .datab(data_num[16]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[15]~55 ), + .combout(\data_num[16]~56_combout ), + .cout(\data_num[16]~57 )); +// synopsys translate_off +defparam \data_num[16]~56 .lut_mask = 16'hC30C; +defparam \data_num[16]~56 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N10 +cycloneive_lcell_comb \data_num[17]~58 ( +// Equation(s): +// \data_num[17]~58_combout = (data_num[17] & (!\data_num[16]~57 )) # (!data_num[17] & ((\data_num[16]~57 ) # (GND))) +// \data_num[17]~59 = CARRY((!\data_num[16]~57 ) # (!data_num[17])) + + .dataa(data_num[17]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[16]~57 ), + .combout(\data_num[17]~58_combout ), + .cout(\data_num[17]~59 )); +// synopsys translate_off +defparam \data_num[17]~58 .lut_mask = 16'h5A5F; +defparam \data_num[17]~58 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N12 +cycloneive_lcell_comb \data_num[18]~60 ( +// Equation(s): +// \data_num[18]~60_combout = (data_num[18] & (\data_num[17]~59 $ (GND))) # (!data_num[18] & (!\data_num[17]~59 & VCC)) +// \data_num[18]~61 = CARRY((data_num[18] & !\data_num[17]~59 )) + + .dataa(data_num[18]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[17]~59 ), + .combout(\data_num[18]~60_combout ), + .cout(\data_num[18]~61 )); +// synopsys translate_off +defparam \data_num[18]~60 .lut_mask = 16'hA50A; +defparam \data_num[18]~60 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N14 +cycloneive_lcell_comb \data_num[19]~62 ( +// Equation(s): +// \data_num[19]~62_combout = (data_num[19] & (!\data_num[18]~61 )) # (!data_num[19] & ((\data_num[18]~61 ) # (GND))) +// \data_num[19]~63 = CARRY((!\data_num[18]~61 ) # (!data_num[19])) + + .dataa(gnd), + .datab(data_num[19]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[18]~61 ), + .combout(\data_num[19]~62_combout ), + .cout(\data_num[19]~63 )); +// synopsys translate_off +defparam \data_num[19]~62 .lut_mask = 16'h3C3F; +defparam \data_num[19]~62 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N16 +cycloneive_lcell_comb \data_num[20]~64 ( +// Equation(s): +// \data_num[20]~64_combout = (data_num[20] & (\data_num[19]~63 $ (GND))) # (!data_num[20] & (!\data_num[19]~63 & VCC)) +// \data_num[20]~65 = CARRY((data_num[20] & !\data_num[19]~63 )) + + .dataa(gnd), + .datab(data_num[20]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[19]~63 ), + .combout(\data_num[20]~64_combout ), + .cout(\data_num[20]~65 )); +// synopsys translate_off +defparam \data_num[20]~64 .lut_mask = 16'hC30C; +defparam \data_num[20]~64 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N18 +cycloneive_lcell_comb \data_num[21]~66 ( +// Equation(s): +// \data_num[21]~66_combout = (data_num[21] & (!\data_num[20]~65 )) # (!data_num[21] & ((\data_num[20]~65 ) # (GND))) +// \data_num[21]~67 = CARRY((!\data_num[20]~65 ) # (!data_num[21])) + + .dataa(gnd), + .datab(data_num[21]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[20]~65 ), + .combout(\data_num[21]~66_combout ), + .cout(\data_num[21]~67 )); +// synopsys translate_off +defparam \data_num[21]~66 .lut_mask = 16'h3C3F; +defparam \data_num[21]~66 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N20 +cycloneive_lcell_comb \data_num[22]~68 ( +// Equation(s): +// \data_num[22]~68_combout = (data_num[22] & (\data_num[21]~67 $ (GND))) # (!data_num[22] & (!\data_num[21]~67 & VCC)) +// \data_num[22]~69 = CARRY((data_num[22] & !\data_num[21]~67 )) + + .dataa(gnd), + .datab(data_num[22]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[21]~67 ), + .combout(\data_num[22]~68_combout ), + .cout(\data_num[22]~69 )); +// synopsys translate_off +defparam \data_num[22]~68 .lut_mask = 16'hC30C; +defparam \data_num[22]~68 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N22 +cycloneive_lcell_comb \data_num[23]~70 ( +// Equation(s): +// \data_num[23]~70_combout = data_num[23] $ (\data_num[22]~69 ) + + .dataa(data_num[23]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\data_num[22]~69 ), + .combout(\data_num[23]~70_combout ), + .cout()); +// synopsys translate_off +defparam \data_num[23]~70 .lut_mask = 16'h5A5A; +defparam \data_num[23]~70 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X28_Y26_N3 +dffeas \fifo_read_inst|cnt_read[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[1]~12_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N7 +dffeas \fifo_read_inst|cnt_read[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[3]~16_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N1 +dffeas \fifo_read_inst|cnt_read[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[0]~10_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N5 +dffeas \fifo_read_inst|cnt_read[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[2]~14_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N9 +dffeas \fifo_read_inst|cnt_read[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[4]~18_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N11 +dffeas \fifo_read_inst|cnt_read[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[5]~20_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N13 +dffeas \fifo_read_inst|cnt_read[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[6]~22_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N15 +dffeas \fifo_read_inst|cnt_read[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[7]~24_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N17 +dffeas \fifo_read_inst|cnt_read[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[8]~26_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N19 +dffeas \fifo_read_inst|cnt_read[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[9]~28_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N24 +cycloneive_lcell_comb \uart_rx_inst|Add1~0 ( +// Equation(s): +// \uart_rx_inst|Add1~0_combout = (\uart_rx_inst|bit_cnt [0] & (\uart_rx_inst|bit_flag~q $ (VCC))) # (!\uart_rx_inst|bit_cnt [0] & (\uart_rx_inst|bit_flag~q & VCC)) +// \uart_rx_inst|Add1~1 = CARRY((\uart_rx_inst|bit_cnt [0] & \uart_rx_inst|bit_flag~q )) + + .dataa(\uart_rx_inst|bit_cnt [0]), + .datab(\uart_rx_inst|bit_flag~q ), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_rx_inst|Add1~0_combout ), + .cout(\uart_rx_inst|Add1~1 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~0 .lut_mask = 16'h6688; +defparam \uart_rx_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N28 +cycloneive_lcell_comb \uart_rx_inst|Add1~4 ( +// Equation(s): +// \uart_rx_inst|Add1~4_combout = (\uart_rx_inst|bit_cnt [2] & (\uart_rx_inst|Add1~3 $ (GND))) # (!\uart_rx_inst|bit_cnt [2] & (!\uart_rx_inst|Add1~3 & VCC)) +// \uart_rx_inst|Add1~5 = CARRY((\uart_rx_inst|bit_cnt [2] & !\uart_rx_inst|Add1~3 )) + + .dataa(gnd), + .datab(\uart_rx_inst|bit_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|Add1~3 ), + .combout(\uart_rx_inst|Add1~4_combout ), + .cout(\uart_rx_inst|Add1~5 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~4 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|Add1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N30 +cycloneive_lcell_comb \uart_rx_inst|Add1~6 ( +// Equation(s): +// \uart_rx_inst|Add1~6_combout = \uart_rx_inst|Add1~5 $ (\uart_rx_inst|bit_cnt [3]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|bit_cnt [3]), + .cin(\uart_rx_inst|Add1~5 ), + .combout(\uart_rx_inst|Add1~6_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Add1~6 .lut_mask = 16'h0FF0; +defparam \uart_rx_inst|Add1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N11 +dffeas \uart_rx_inst|baud_cnt[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N0 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[0]~10 ( +// Equation(s): +// \fifo_read_inst|cnt_read[0]~10_combout = (\fifo_read_inst|rd_en~q & (\fifo_read_inst|cnt_read [0] $ (VCC))) # (!\fifo_read_inst|rd_en~q & (\fifo_read_inst|cnt_read [0] & VCC)) +// \fifo_read_inst|cnt_read[0]~11 = CARRY((\fifo_read_inst|rd_en~q & \fifo_read_inst|cnt_read [0])) + + .dataa(\fifo_read_inst|rd_en~q ), + .datab(\fifo_read_inst|cnt_read [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|cnt_read[0]~10_combout ), + .cout(\fifo_read_inst|cnt_read[0]~11 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[0]~10 .lut_mask = 16'h6688; +defparam \fifo_read_inst|cnt_read[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N2 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[1]~12 ( +// Equation(s): +// \fifo_read_inst|cnt_read[1]~12_combout = (\fifo_read_inst|cnt_read [1] & (!\fifo_read_inst|cnt_read[0]~11 )) # (!\fifo_read_inst|cnt_read [1] & ((\fifo_read_inst|cnt_read[0]~11 ) # (GND))) +// \fifo_read_inst|cnt_read[1]~13 = CARRY((!\fifo_read_inst|cnt_read[0]~11 ) # (!\fifo_read_inst|cnt_read [1])) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [1]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[0]~11 ), + .combout(\fifo_read_inst|cnt_read[1]~12_combout ), + .cout(\fifo_read_inst|cnt_read[1]~13 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[1]~12 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|cnt_read[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N4 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[2]~14 ( +// Equation(s): +// \fifo_read_inst|cnt_read[2]~14_combout = (\fifo_read_inst|cnt_read [2] & (\fifo_read_inst|cnt_read[1]~13 $ (GND))) # (!\fifo_read_inst|cnt_read [2] & (!\fifo_read_inst|cnt_read[1]~13 & VCC)) +// \fifo_read_inst|cnt_read[2]~15 = CARRY((\fifo_read_inst|cnt_read [2] & !\fifo_read_inst|cnt_read[1]~13 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[1]~13 ), + .combout(\fifo_read_inst|cnt_read[2]~14_combout ), + .cout(\fifo_read_inst|cnt_read[2]~15 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[2]~14 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N6 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[3]~16 ( +// Equation(s): +// \fifo_read_inst|cnt_read[3]~16_combout = (\fifo_read_inst|cnt_read [3] & (!\fifo_read_inst|cnt_read[2]~15 )) # (!\fifo_read_inst|cnt_read [3] & ((\fifo_read_inst|cnt_read[2]~15 ) # (GND))) +// \fifo_read_inst|cnt_read[3]~17 = CARRY((!\fifo_read_inst|cnt_read[2]~15 ) # (!\fifo_read_inst|cnt_read [3])) + + .dataa(\fifo_read_inst|cnt_read [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[2]~15 ), + .combout(\fifo_read_inst|cnt_read[3]~16_combout ), + .cout(\fifo_read_inst|cnt_read[3]~17 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[3]~16 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|cnt_read[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N8 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[4]~18 ( +// Equation(s): +// \fifo_read_inst|cnt_read[4]~18_combout = (\fifo_read_inst|cnt_read [4] & (\fifo_read_inst|cnt_read[3]~17 $ (GND))) # (!\fifo_read_inst|cnt_read [4] & (!\fifo_read_inst|cnt_read[3]~17 & VCC)) +// \fifo_read_inst|cnt_read[4]~19 = CARRY((\fifo_read_inst|cnt_read [4] & !\fifo_read_inst|cnt_read[3]~17 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[3]~17 ), + .combout(\fifo_read_inst|cnt_read[4]~18_combout ), + .cout(\fifo_read_inst|cnt_read[4]~19 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[4]~18 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N10 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[5]~20 ( +// Equation(s): +// \fifo_read_inst|cnt_read[5]~20_combout = (\fifo_read_inst|cnt_read [5] & (!\fifo_read_inst|cnt_read[4]~19 )) # (!\fifo_read_inst|cnt_read [5] & ((\fifo_read_inst|cnt_read[4]~19 ) # (GND))) +// \fifo_read_inst|cnt_read[5]~21 = CARRY((!\fifo_read_inst|cnt_read[4]~19 ) # (!\fifo_read_inst|cnt_read [5])) + + .dataa(\fifo_read_inst|cnt_read [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[4]~19 ), + .combout(\fifo_read_inst|cnt_read[5]~20_combout ), + .cout(\fifo_read_inst|cnt_read[5]~21 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[5]~20 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|cnt_read[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N12 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[6]~22 ( +// Equation(s): +// \fifo_read_inst|cnt_read[6]~22_combout = (\fifo_read_inst|cnt_read [6] & (\fifo_read_inst|cnt_read[5]~21 $ (GND))) # (!\fifo_read_inst|cnt_read [6] & (!\fifo_read_inst|cnt_read[5]~21 & VCC)) +// \fifo_read_inst|cnt_read[6]~23 = CARRY((\fifo_read_inst|cnt_read [6] & !\fifo_read_inst|cnt_read[5]~21 )) + + .dataa(\fifo_read_inst|cnt_read [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[5]~21 ), + .combout(\fifo_read_inst|cnt_read[6]~22_combout ), + .cout(\fifo_read_inst|cnt_read[6]~23 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[6]~22 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|cnt_read[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N14 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[7]~24 ( +// Equation(s): +// \fifo_read_inst|cnt_read[7]~24_combout = (\fifo_read_inst|cnt_read [7] & (!\fifo_read_inst|cnt_read[6]~23 )) # (!\fifo_read_inst|cnt_read [7] & ((\fifo_read_inst|cnt_read[6]~23 ) # (GND))) +// \fifo_read_inst|cnt_read[7]~25 = CARRY((!\fifo_read_inst|cnt_read[6]~23 ) # (!\fifo_read_inst|cnt_read [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[6]~23 ), + .combout(\fifo_read_inst|cnt_read[7]~24_combout ), + .cout(\fifo_read_inst|cnt_read[7]~25 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[7]~24 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|cnt_read[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N16 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[8]~26 ( +// Equation(s): +// \fifo_read_inst|cnt_read[8]~26_combout = (\fifo_read_inst|cnt_read [8] & (\fifo_read_inst|cnt_read[7]~25 $ (GND))) # (!\fifo_read_inst|cnt_read [8] & (!\fifo_read_inst|cnt_read[7]~25 & VCC)) +// \fifo_read_inst|cnt_read[8]~27 = CARRY((\fifo_read_inst|cnt_read [8] & !\fifo_read_inst|cnt_read[7]~25 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [8]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[7]~25 ), + .combout(\fifo_read_inst|cnt_read[8]~26_combout ), + .cout(\fifo_read_inst|cnt_read[8]~27 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[8]~26 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N18 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[9]~28 ( +// Equation(s): +// \fifo_read_inst|cnt_read[9]~28_combout = \fifo_read_inst|cnt_read [9] $ (\fifo_read_inst|cnt_read[8]~27 ) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|cnt_read[8]~27 ), + .combout(\fifo_read_inst|cnt_read[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[9]~28 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|cnt_read[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N10 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[4]~21 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[4]~21_combout = (\uart_rx_inst|baud_cnt [4] & (\uart_rx_inst|baud_cnt[3]~20 $ (GND))) # (!\uart_rx_inst|baud_cnt [4] & (!\uart_rx_inst|baud_cnt[3]~20 & VCC)) +// \uart_rx_inst|baud_cnt[4]~22 = CARRY((\uart_rx_inst|baud_cnt [4] & !\uart_rx_inst|baud_cnt[3]~20 )) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[3]~20 ), + .combout(\uart_rx_inst|baud_cnt[4]~21_combout ), + .cout(\uart_rx_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X22_Y22_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 .lut_mask = 16'h8C9D; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N13 +dffeas \uart_tx_inst|bit_cnt[0] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[0]~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|Mux0~0 ( +// Equation(s): +// \uart_tx_inst|Mux0~0_combout = (\uart_tx_inst|bit_cnt [1] & (((\uart_tx_inst|bit_cnt [0])))) # (!\uart_tx_inst|bit_cnt [1] & ((\uart_tx_inst|bit_cnt [0] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b +// [4])) # (!\uart_tx_inst|bit_cnt [0] & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3]))))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [4]), + .datab(\uart_tx_inst|bit_cnt [1]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3]), + .datad(\uart_tx_inst|bit_cnt [0]), + .cin(gnd), + .combout(\uart_tx_inst|Mux0~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Mux0~0 .lut_mask = 16'hEE30; +defparam \uart_tx_inst|Mux0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y15_N8 +cycloneive_lcell_comb \uart_tx_inst|Mux0~1 ( +// Equation(s): +// \uart_tx_inst|Mux0~1_combout = (\uart_tx_inst|Mux0~0_combout & (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6]) # (!\uart_tx_inst|bit_cnt [1])))) # (!\uart_tx_inst|Mux0~0_combout & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5] & ((\uart_tx_inst|bit_cnt [1])))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6]), + .datac(\uart_tx_inst|Mux0~0_combout ), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Mux0~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Mux0~1 .lut_mask = 16'hCAF0; +defparam \uart_tx_inst|Mux0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N16 +cycloneive_lcell_comb \uart_tx_inst|tx~0 ( +// Equation(s): +// \uart_tx_inst|tx~0_combout = (\uart_tx_inst|bit_cnt [0] & ((\uart_tx_inst|bit_cnt [1] & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2]))) # (!\uart_tx_inst|bit_cnt [1] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0])))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~0 .lut_mask = 16'hA088; +defparam \uart_tx_inst|tx~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N10 +cycloneive_lcell_comb \uart_tx_inst|tx~1 ( +// Equation(s): +// \uart_tx_inst|tx~1_combout = (\uart_tx_inst|tx~0_combout ) # ((!\uart_tx_inst|bit_cnt [0] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1] & \uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|tx~0_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~1 .lut_mask = 16'hDCCC; +defparam \uart_tx_inst|tx~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N22 +cycloneive_lcell_comb \uart_tx_inst|tx~2 ( +// Equation(s): +// \uart_tx_inst|tx~2_combout = (\uart_tx_inst|bit_flag~q & ((\uart_tx_inst|bit_cnt [2] & (\uart_tx_inst|Mux0~1_combout )) # (!\uart_tx_inst|bit_cnt [2] & ((\uart_tx_inst|tx~1_combout ))))) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\uart_tx_inst|Mux0~1_combout ), + .datad(\uart_tx_inst|tx~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|tx~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~2 .lut_mask = 16'hA280; +defparam \uart_tx_inst|tx~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N27 +dffeas \uart_tx_inst|bit_cnt[3] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[3]~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X21_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 .lut_mask = 16'h3111; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ) # (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 .lut_mask = 16'hAFEF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 .lut_mask = 16'h0CAE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N20 +cycloneive_lcell_comb \uart_tx_inst|Add1~0 ( +// Equation(s): +// \uart_tx_inst|Add1~0_combout = \uart_tx_inst|bit_cnt [2] $ (((\uart_tx_inst|bit_cnt [0] & \uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(gnd), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Add1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Add1~0 .lut_mask = 16'h5AF0; +defparam \uart_tx_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N30 +cycloneive_lcell_comb \uart_tx_inst|Add1~1 ( +// Equation(s): +// \uart_tx_inst|Add1~1_combout = \uart_tx_inst|bit_cnt [3] $ (((\uart_tx_inst|bit_cnt [0] & (\uart_tx_inst|bit_cnt [2] & \uart_tx_inst|bit_cnt [1])))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\uart_tx_inst|bit_cnt [3]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Add1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Add1~1 .lut_mask = 16'h78F0; +defparam \uart_tx_inst|Add1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N26 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[3]~4 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[3]~4_combout = (!\uart_tx_inst|always0~1_combout & ((\uart_tx_inst|always3~0_combout & ((\uart_tx_inst|bit_cnt [3]))) # (!\uart_tx_inst|always3~0_combout & (\uart_tx_inst|Add1~1_combout )))) + + .dataa(\uart_tx_inst|Add1~1_combout ), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [3]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[3]~4_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[3]~4 .lut_mask = 16'h00E2; +defparam \uart_tx_inst|bit_cnt[3]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 .lut_mask = 16'h0400; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N29 +dffeas read_valid( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\read_valid~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\read_valid~q ), + .prn(vcc)); +// synopsys translate_off +defparam read_valid.is_wysiwyg = "true"; +defparam read_valid.power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 .lut_mask = 16'h000F; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout = (\read_valid~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & ((\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout )))) + + .dataa(\read_valid~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 .lut_mask = 16'h8088; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|Equal1~3 ( +// Equation(s): +// \uart_tx_inst|Equal1~3_combout = (\uart_tx_inst|baud_cnt [12] & \uart_tx_inst|baud_cnt [10]) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [12]), + .datac(gnd), + .datad(\uart_tx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~3 .lut_mask = 16'hCC00; +defparam \uart_tx_inst|Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N2 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout = (\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] & !\fifo_read_inst|rd_en~q ))) + + .dataa(\fifo_read_inst|read_en_dly~q ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 .lut_mask = 16'h0080; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N0 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N13 +dffeas \fifo_read_inst|bit_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Add2~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal1~0 ( +// Equation(s): +// \fifo_read_inst|Equal1~0_combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~0 .lut_mask = 16'h0001; +defparam \fifo_read_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N2 +cycloneive_lcell_comb \fifo_read_inst|Equal1~1 ( +// Equation(s): +// \fifo_read_inst|Equal1~1_combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & (\fifo_read_inst|Equal1~0_combout & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|Equal1~0_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~1 .lut_mask = 16'h0004; +defparam \fifo_read_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .lut_mask = 16'h50F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X27_Y23_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 .lut_mask = 16'h9966; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X14_Y20_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N25 +dffeas \cnt_wait[15] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[15]~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[15]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[15] .is_wysiwyg = "true"; +defparam \cnt_wait[15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N27 +dffeas \cnt_wait[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[14]~3_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[14]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[14] .is_wysiwyg = "true"; +defparam \cnt_wait[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N21 +dffeas \cnt_wait[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[13]~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[13]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[13] .is_wysiwyg = "true"; +defparam \cnt_wait[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N23 +dffeas \cnt_wait[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[12]~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[12]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[12] .is_wysiwyg = "true"; +defparam \cnt_wait[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N8 +cycloneive_lcell_comb \Equal0~0 ( +// Equation(s): +// \Equal0~0_combout = (!cnt_wait[12] & (!cnt_wait[15] & (!cnt_wait[14] & !cnt_wait[13]))) + + .dataa(cnt_wait[12]), + .datab(cnt_wait[15]), + .datac(cnt_wait[14]), + .datad(cnt_wait[13]), + .cin(gnd), + .combout(\Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~0 .lut_mask = 16'h0001; +defparam \Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y26_N23 +dffeas \cnt_wait[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[9]~6_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[9]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[9] .is_wysiwyg = "true"; +defparam \cnt_wait[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N9 +dffeas \cnt_wait[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[11]~7_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[11]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[11] .is_wysiwyg = "true"; +defparam \cnt_wait[11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N11 +dffeas \cnt_wait[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[10]~8_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[10]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[10] .is_wysiwyg = "true"; +defparam \cnt_wait[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N5 +dffeas \cnt_wait[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[8]~9_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[8]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[8] .is_wysiwyg = "true"; +defparam \cnt_wait[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N14 +cycloneive_lcell_comb \Equal0~1 ( +// Equation(s): +// \Equal0~1_combout = (!cnt_wait[10] & (!cnt_wait[8] & (cnt_wait[9] & !cnt_wait[11]))) + + .dataa(cnt_wait[10]), + .datab(cnt_wait[8]), + .datac(cnt_wait[9]), + .datad(cnt_wait[11]), + .cin(gnd), + .combout(\Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~1 .lut_mask = 16'h0010; +defparam \Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N3 +dffeas \cnt_wait[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[7]~10_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[7]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[7] .is_wysiwyg = "true"; +defparam \cnt_wait[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N13 +dffeas \cnt_wait[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[6]~11_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[6]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[6] .is_wysiwyg = "true"; +defparam \cnt_wait[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N15 +dffeas \cnt_wait[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[5]~12_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[5]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[5] .is_wysiwyg = "true"; +defparam \cnt_wait[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N17 +dffeas \cnt_wait[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[4]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[4]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[4] .is_wysiwyg = "true"; +defparam \cnt_wait[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N10 +cycloneive_lcell_comb \Equal0~2 ( +// Equation(s): +// \Equal0~2_combout = (cnt_wait[6] & (cnt_wait[7] & (cnt_wait[5] & !cnt_wait[4]))) + + .dataa(cnt_wait[6]), + .datab(cnt_wait[7]), + .datac(cnt_wait[5]), + .datad(cnt_wait[4]), + .cin(gnd), + .combout(\Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~2 .lut_mask = 16'h0080; +defparam \Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N5 +dffeas \cnt_wait[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[3]~14_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[3]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[3] .is_wysiwyg = "true"; +defparam \cnt_wait[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N7 +dffeas \cnt_wait[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[2]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[2]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[2] .is_wysiwyg = "true"; +defparam \cnt_wait[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N1 +dffeas \cnt_wait[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[1]~16_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[1]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[1] .is_wysiwyg = "true"; +defparam \cnt_wait[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N19 +dffeas \cnt_wait[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[0]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[0]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[0] .is_wysiwyg = "true"; +defparam \cnt_wait[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N28 +cycloneive_lcell_comb \Equal0~3 ( +// Equation(s): +// \Equal0~3_combout = (!cnt_wait[0] & (cnt_wait[1] & (cnt_wait[3] & cnt_wait[2]))) + + .dataa(cnt_wait[0]), + .datab(cnt_wait[1]), + .datac(cnt_wait[3]), + .datad(cnt_wait[2]), + .cin(gnd), + .combout(\Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~3 .lut_mask = 16'h4000; +defparam \Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N30 +cycloneive_lcell_comb \Equal0~4 ( +// Equation(s): +// \Equal0~4_combout = (\Equal0~2_combout & (\Equal0~3_combout & (\Equal0~0_combout & \Equal0~1_combout ))) + + .dataa(\Equal0~2_combout ), + .datab(\Equal0~3_combout ), + .datac(\Equal0~0_combout ), + .datad(\Equal0~1_combout ), + .cin(gnd), + .combout(\Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~4 .lut_mask = 16'h8000; +defparam \Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N16 +cycloneive_lcell_comb \read_valid~0 ( +// Equation(s): +// \read_valid~0_combout = (\Equal0~4_combout ) # ((\read_valid~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ) # (!\Equal2~1_combout )))) + + .dataa(\Equal2~1_combout ), + .datab(\Equal0~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .datad(\read_valid~q ), + .cin(gnd), + .combout(\read_valid~0_combout ), + .cout()); +// synopsys translate_off +defparam \read_valid~0 .lut_mask = 16'hFDCC; +defparam \read_valid~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N28 +cycloneive_lcell_comb \read_valid~1 ( +// Equation(s): +// \read_valid~1_combout = (\read_valid~0_combout ) # ((\read_valid~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ) # (!\Equal2~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datab(\Equal2~0_combout ), + .datac(\read_valid~q ), + .datad(\read_valid~0_combout ), + .cin(gnd), + .combout(\read_valid~1_combout ), + .cout()); +// synopsys translate_off +defparam \read_valid~1 .lut_mask = 16'hFFB0; +defparam \read_valid~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 .lut_mask = 16'hECFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk +// [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3] $ (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 .lut_mask = 16'h6AAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N10 +cycloneive_lcell_comb \fifo_read_inst|Equal1~2 ( +// Equation(s): +// \fifo_read_inst|Equal1~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] & \fifo_read_inst|Equal1~1_combout )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datac(gnd), + .datad(\fifo_read_inst|Equal1~1_combout ), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~2 .lut_mask = 16'h2200; +defparam \fifo_read_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N2 +cycloneive_lcell_comb \fifo_read_inst|Equal5~1 ( +// Equation(s): +// \fifo_read_inst|Equal5~1_combout = (\fifo_read_inst|baud_cnt [11] & (!\fifo_read_inst|baud_cnt [10] & (\fifo_read_inst|baud_cnt [9] & !\fifo_read_inst|baud_cnt [6]))) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(\fifo_read_inst|baud_cnt [9]), + .datad(\fifo_read_inst|baud_cnt [6]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~1 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h4182; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'hF000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'hC000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 .lut_mask = 16'hCA0A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'h8200; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout )) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'hF5A0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'hE0C2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N0 +cycloneive_lcell_comb \Equal1~0 ( +// Equation(s): +// \Equal1~0_combout = (data_num[2]) # (((data_num[0]) # (!data_num[1])) # (!data_num[3])) + + .dataa(data_num[2]), + .datab(data_num[3]), + .datac(data_num[0]), + .datad(data_num[1]), + .cin(gnd), + .combout(\Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~0 .lut_mask = 16'hFBFF; +defparam \Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N2 +cycloneive_lcell_comb \Equal1~1 ( +// Equation(s): +// \Equal1~1_combout = (data_num[6]) # ((data_num[5]) # ((data_num[7]) # (data_num[4]))) + + .dataa(data_num[6]), + .datab(data_num[5]), + .datac(data_num[7]), + .datad(data_num[4]), + .cin(gnd), + .combout(\Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~1 .lut_mask = 16'hFFFE; +defparam \Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N4 +cycloneive_lcell_comb \Equal1~2 ( +// Equation(s): +// \Equal1~2_combout = (data_num[11]) # ((data_num[10]) # ((data_num[9]) # (data_num[8]))) + + .dataa(data_num[11]), + .datab(data_num[10]), + .datac(data_num[9]), + .datad(data_num[8]), + .cin(gnd), + .combout(\Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~2 .lut_mask = 16'hFFFE; +defparam \Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N24 +cycloneive_lcell_comb \Equal1~3 ( +// Equation(s): +// \Equal1~3_combout = (data_num[15]) # ((data_num[13]) # ((data_num[14]) # (data_num[12]))) + + .dataa(data_num[15]), + .datab(data_num[13]), + .datac(data_num[14]), + .datad(data_num[12]), + .cin(gnd), + .combout(\Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~3 .lut_mask = 16'hFFFE; +defparam \Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N6 +cycloneive_lcell_comb \Equal1~4 ( +// Equation(s): +// \Equal1~4_combout = (\Equal1~3_combout ) # ((\Equal1~1_combout ) # ((\Equal1~2_combout ) # (\Equal1~0_combout ))) + + .dataa(\Equal1~3_combout ), + .datab(\Equal1~1_combout ), + .datac(\Equal1~2_combout ), + .datad(\Equal1~0_combout ), + .cin(gnd), + .combout(\Equal1~4_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~4 .lut_mask = 16'hFFFE; +defparam \Equal1~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N26 +cycloneive_lcell_comb \Equal1~5 ( +// Equation(s): +// \Equal1~5_combout = (data_num[18]) # ((data_num[19]) # ((data_num[16]) # (data_num[17]))) + + .dataa(data_num[18]), + .datab(data_num[19]), + .datac(data_num[16]), + .datad(data_num[17]), + .cin(gnd), + .combout(\Equal1~5_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~5 .lut_mask = 16'hFFFE; +defparam \Equal1~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N28 +cycloneive_lcell_comb \Equal1~6 ( +// Equation(s): +// \Equal1~6_combout = (data_num[22]) # ((data_num[21]) # ((data_num[23]) # (data_num[20]))) + + .dataa(data_num[22]), + .datab(data_num[21]), + .datac(data_num[23]), + .datad(data_num[20]), + .cin(gnd), + .combout(\Equal1~6_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~6 .lut_mask = 16'hFFFE; +defparam \Equal1~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N18 +cycloneive_lcell_comb \cnt_wait[8]~0 ( +// Equation(s): +// \cnt_wait[8]~0_combout = (!\Equal0~4_combout & ((\Equal1~4_combout ) # ((\Equal1~5_combout ) # (\Equal1~6_combout )))) + + .dataa(\Equal1~4_combout ), + .datab(\Equal0~4_combout ), + .datac(\Equal1~5_combout ), + .datad(\Equal1~6_combout ), + .cin(gnd), + .combout(\cnt_wait[8]~0_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[8]~0 .lut_mask = 16'h3332; +defparam \cnt_wait[8]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N12 +cycloneive_lcell_comb \cnt_wait[15]~1 ( +// Equation(s): +// \cnt_wait[15]~1_combout = (\Equal1~4_combout ) # ((\Equal0~4_combout ) # ((\Equal1~5_combout ) # (\Equal1~6_combout ))) + + .dataa(\Equal1~4_combout ), + .datab(\Equal0~4_combout ), + .datac(\Equal1~5_combout ), + .datad(\Equal1~6_combout ), + .cin(gnd), + .combout(\cnt_wait[15]~1_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[15]~1 .lut_mask = 16'hFFFE; +defparam \cnt_wait[15]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N24 +cycloneive_lcell_comb \cnt_wait[15]~2 ( +// Equation(s): +// \cnt_wait[15]~2_combout = (\Add1~30_combout & (((\cnt_wait[8]~0_combout & cnt_wait[15])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~30_combout & (\cnt_wait[8]~0_combout & (cnt_wait[15]))) + + .dataa(\Add1~30_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[15]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[15]~2_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[15]~2 .lut_mask = 16'hC0EA; +defparam \cnt_wait[15]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N26 +cycloneive_lcell_comb \cnt_wait[14]~3 ( +// Equation(s): +// \cnt_wait[14]~3_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[14] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~28_combout ) # ((cnt_wait[14] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~28_combout ), + .datac(cnt_wait[14]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[14]~3_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[14]~3 .lut_mask = 16'hF444; +defparam \cnt_wait[14]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N20 +cycloneive_lcell_comb \cnt_wait[13]~4 ( +// Equation(s): +// \cnt_wait[13]~4_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[13] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~26_combout ) # ((cnt_wait[13] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~26_combout ), + .datac(cnt_wait[13]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[13]~4_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[13]~4 .lut_mask = 16'hF444; +defparam \cnt_wait[13]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N22 +cycloneive_lcell_comb \cnt_wait[12]~5 ( +// Equation(s): +// \cnt_wait[12]~5_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[12] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~24_combout ) # ((cnt_wait[12] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~24_combout ), + .datac(cnt_wait[12]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[12]~5_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[12]~5 .lut_mask = 16'hF444; +defparam \cnt_wait[12]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N22 +cycloneive_lcell_comb \cnt_wait[9]~6 ( +// Equation(s): +// \cnt_wait[9]~6_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[9] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~18_combout ) # ((cnt_wait[9] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~18_combout ), + .datac(cnt_wait[9]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[9]~6_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[9]~6 .lut_mask = 16'hF444; +defparam \cnt_wait[9]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N8 +cycloneive_lcell_comb \cnt_wait[11]~7 ( +// Equation(s): +// \cnt_wait[11]~7_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[11] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~22_combout ) # ((cnt_wait[11] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~22_combout ), + .datac(cnt_wait[11]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[11]~7_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[11]~7 .lut_mask = 16'hF444; +defparam \cnt_wait[11]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N10 +cycloneive_lcell_comb \cnt_wait[10]~8 ( +// Equation(s): +// \cnt_wait[10]~8_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[10] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~20_combout ) # ((cnt_wait[10] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~20_combout ), + .datac(cnt_wait[10]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[10]~8_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[10]~8 .lut_mask = 16'hF444; +defparam \cnt_wait[10]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N4 +cycloneive_lcell_comb \cnt_wait[8]~9 ( +// Equation(s): +// \cnt_wait[8]~9_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[8] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~16_combout ) # ((cnt_wait[8] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~16_combout ), + .datac(cnt_wait[8]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[8]~9_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[8]~9 .lut_mask = 16'hF444; +defparam \cnt_wait[8]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N2 +cycloneive_lcell_comb \cnt_wait[7]~10 ( +// Equation(s): +// \cnt_wait[7]~10_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[7] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~14_combout ) # ((cnt_wait[7] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~14_combout ), + .datac(cnt_wait[7]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[7]~10_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[7]~10 .lut_mask = 16'hF444; +defparam \cnt_wait[7]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N12 +cycloneive_lcell_comb \cnt_wait[6]~11 ( +// Equation(s): +// \cnt_wait[6]~11_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[6] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~12_combout ) # ((cnt_wait[6] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~12_combout ), + .datac(cnt_wait[6]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[6]~11_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[6]~11 .lut_mask = 16'hF444; +defparam \cnt_wait[6]~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N14 +cycloneive_lcell_comb \cnt_wait[5]~12 ( +// Equation(s): +// \cnt_wait[5]~12_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[5] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~10_combout ) # ((cnt_wait[5] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~10_combout ), + .datac(cnt_wait[5]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[5]~12_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[5]~12 .lut_mask = 16'hF444; +defparam \cnt_wait[5]~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N16 +cycloneive_lcell_comb \cnt_wait[4]~13 ( +// Equation(s): +// \cnt_wait[4]~13_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[4] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~8_combout ) # ((cnt_wait[4] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~8_combout ), + .datac(cnt_wait[4]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[4]~13_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[4]~13 .lut_mask = 16'hF444; +defparam \cnt_wait[4]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N4 +cycloneive_lcell_comb \cnt_wait[3]~14 ( +// Equation(s): +// \cnt_wait[3]~14_combout = (\Add1~6_combout & (((\cnt_wait[8]~0_combout & cnt_wait[3])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~6_combout & (\cnt_wait[8]~0_combout & (cnt_wait[3]))) + + .dataa(\Add1~6_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[3]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[3]~14_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[3]~14 .lut_mask = 16'hC0EA; +defparam \cnt_wait[3]~14 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N6 +cycloneive_lcell_comb \cnt_wait[2]~15 ( +// Equation(s): +// \cnt_wait[2]~15_combout = (\Add1~4_combout & (((\cnt_wait[8]~0_combout & cnt_wait[2])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~4_combout & (\cnt_wait[8]~0_combout & (cnt_wait[2]))) + + .dataa(\Add1~4_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[2]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[2]~15_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[2]~15 .lut_mask = 16'hC0EA; +defparam \cnt_wait[2]~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N0 +cycloneive_lcell_comb \cnt_wait[1]~16 ( +// Equation(s): +// \cnt_wait[1]~16_combout = (\Add1~2_combout & (((\cnt_wait[8]~0_combout & cnt_wait[1])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~2_combout & (\cnt_wait[8]~0_combout & (cnt_wait[1]))) + + .dataa(\Add1~2_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[1]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[1]~16_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[1]~16 .lut_mask = 16'hC0EA; +defparam \cnt_wait[1]~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N18 +cycloneive_lcell_comb \cnt_wait[0]~17 ( +// Equation(s): +// \cnt_wait[0]~17_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[0] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~0_combout ) # ((cnt_wait[0] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~0_combout ), + .datac(cnt_wait[0]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[0]~17_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[0]~17 .lut_mask = 16'hF444; +defparam \cnt_wait[0]~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h0084; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ) # +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout +// & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'hAAEA; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h4182; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'hB830; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N1 +dffeas \fifo_read_inst|rd_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|rd_flag~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|rd_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|rd_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|rd_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N30 +cycloneive_lcell_comb \fifo_read_inst|Equal4~2 ( +// Equation(s): +// \fifo_read_inst|Equal4~2_combout = (!\fifo_read_inst|baud_cnt [11] & (\fifo_read_inst|baud_cnt [10] & (!\fifo_read_inst|baud_cnt [9] & \fifo_read_inst|baud_cnt [6]))) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(\fifo_read_inst|baud_cnt [9]), + .datad(\fifo_read_inst|baud_cnt [6]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~2 .lut_mask = 16'h0400; +defparam \fifo_read_inst|Equal4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout & ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 .lut_mask = 16'h1030; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N23 +dffeas \uart_rx_inst|bit_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|bit_cnt~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal2~0 ( +// Equation(s): +// \fifo_read_inst|Equal2~0_combout = (\fifo_read_inst|cnt_read [3] & (\fifo_read_inst|cnt_read [1] & (!\fifo_read_inst|cnt_read [2] & !\fifo_read_inst|cnt_read [0]))) + + .dataa(\fifo_read_inst|cnt_read [3]), + .datab(\fifo_read_inst|cnt_read [1]), + .datac(\fifo_read_inst|cnt_read [2]), + .datad(\fifo_read_inst|cnt_read [0]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~0 .lut_mask = 16'h0008; +defparam \fifo_read_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N30 +cycloneive_lcell_comb \fifo_read_inst|Equal2~1 ( +// Equation(s): +// \fifo_read_inst|Equal2~1_combout = (!\fifo_read_inst|cnt_read [6] & (!\fifo_read_inst|cnt_read [7] & (!\fifo_read_inst|cnt_read [4] & !\fifo_read_inst|cnt_read [5]))) + + .dataa(\fifo_read_inst|cnt_read [6]), + .datab(\fifo_read_inst|cnt_read [7]), + .datac(\fifo_read_inst|cnt_read [4]), + .datad(\fifo_read_inst|cnt_read [5]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~1 .lut_mask = 16'h0001; +defparam \fifo_read_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N24 +cycloneive_lcell_comb \fifo_read_inst|Equal2~2 ( +// Equation(s): +// \fifo_read_inst|Equal2~2_combout = (\fifo_read_inst|Equal2~0_combout & (!\fifo_read_inst|cnt_read [9] & (\fifo_read_inst|Equal2~1_combout & !\fifo_read_inst|cnt_read [8]))) + + .dataa(\fifo_read_inst|Equal2~0_combout ), + .datab(\fifo_read_inst|cnt_read [9]), + .datac(\fifo_read_inst|Equal2~1_combout ), + .datad(\fifo_read_inst|cnt_read [8]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~2 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal2~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N0 +cycloneive_lcell_comb \fifo_read_inst|rd_flag~0 ( +// Equation(s): +// \fifo_read_inst|rd_flag~0_combout = (!\fifo_read_inst|Equal2~2_combout & ((\fifo_read_inst|rd_flag~q ) # ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] & +// \fifo_read_inst|Equal1~2_combout )))) + + .dataa(\fifo_read_inst|Equal2~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datac(\fifo_read_inst|rd_flag~q ), + .datad(\fifo_read_inst|Equal1~2_combout ), + .cin(gnd), + .combout(\fifo_read_inst|rd_flag~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|rd_flag~0 .lut_mask = 16'h5450; +defparam \fifo_read_inst|rd_flag~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N22 +cycloneive_lcell_comb \uart_rx_inst|bit_cnt~1 ( +// Equation(s): +// \uart_rx_inst|bit_cnt~1_combout = (\uart_rx_inst|Add1~0_combout & (((!\uart_rx_inst|always4~0_combout ) # (!\uart_rx_inst|bit_flag~q )) # (!\uart_rx_inst|bit_cnt [3]))) + + .dataa(\uart_rx_inst|bit_cnt [3]), + .datab(\uart_rx_inst|Add1~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(\uart_rx_inst|always4~0_combout ), + .cin(gnd), + .combout(\uart_rx_inst|bit_cnt~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt~1 .lut_mask = 16'h4CCC; +defparam \uart_rx_inst|bit_cnt~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N7 +dffeas \uart_rx_inst|work_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|work_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|work_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|work_en .is_wysiwyg = "true"; +defparam \uart_rx_inst|work_en .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y24_N7 +dffeas \uart_rx_inst|start_nedge ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|always3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|start_nedge~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|start_nedge .is_wysiwyg = "true"; +defparam \uart_rx_inst|start_nedge .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N6 +cycloneive_lcell_comb \uart_rx_inst|work_en~0 ( +// Equation(s): +// \uart_rx_inst|work_en~0_combout = (\uart_rx_inst|start_nedge~q ) # ((\uart_rx_inst|work_en~q & !\uart_rx_inst|always4~1_combout )) + + .dataa(gnd), + .datab(\uart_rx_inst|start_nedge~q ), + .datac(\uart_rx_inst|work_en~q ), + .datad(\uart_rx_inst|always4~1_combout ), + .cin(gnd), + .combout(\uart_rx_inst|work_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|work_en~0 .lut_mask = 16'hCCFC; +defparam \uart_rx_inst|work_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N6 +cycloneive_lcell_comb \uart_rx_inst|always3~0 ( +// Equation(s): +// \uart_rx_inst|always3~0_combout = (\uart_rx_inst|rx_reg2~q & !\uart_rx_inst|rx_reg3~q ) + + .dataa(gnd), + .datab(\uart_rx_inst|rx_reg2~q ), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg3~q ), + .cin(gnd), + .combout(\uart_rx_inst|always3~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always3~0 .lut_mask = 16'h00CC; +defparam \uart_rx_inst|always3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[0]~5 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[0]~5_combout = (!\uart_tx_inst|always0~1_combout & (\uart_tx_inst|bit_cnt [0] $ (((\uart_tx_inst|bit_flag~q & \uart_tx_inst|work_en~q ))))) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(\uart_tx_inst|always0~1_combout ), + .datac(\uart_tx_inst|bit_cnt [0]), + .datad(\uart_tx_inst|work_en~q ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[0]~5 .lut_mask = 16'h1230; +defparam \uart_tx_inst|bit_cnt[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y9_N16 +cycloneive_io_obuf \tx~output ( + .i(!\uart_tx_inst|tx~q ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(tx), + .obar()); +// synopsys translate_off +defparam \tx~output .bus_hold = "false"; +defparam \tx~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X1_Y29_N30 +cycloneive_io_obuf \sdram_clk~output ( + .i(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_clk), + .obar()); +// synopsys translate_off +defparam \sdram_clk~output .bus_hold = "false"; +defparam \sdram_clk~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y13_N23 +cycloneive_io_obuf \sdram_cke~output ( + .i(vcc), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cke), + .obar()); +// synopsys translate_off +defparam \sdram_cke~output .bus_hold = "false"; +defparam \sdram_cke~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N9 +cycloneive_io_obuf \sdram_cs_n~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cs_n), + .obar()); +// synopsys translate_off +defparam \sdram_cs_n~output .bus_hold = "false"; +defparam \sdram_cs_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X7_Y29_N16 +cycloneive_io_obuf \sdram_cas_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cas_n), + .obar()); +// synopsys translate_off +defparam \sdram_cas_n~output .bus_hold = "false"; +defparam \sdram_cas_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N16 +cycloneive_io_obuf \sdram_ras_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ras_n), + .obar()); +// synopsys translate_off +defparam \sdram_ras_n~output .bus_hold = "false"; +defparam \sdram_ras_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X7_Y29_N9 +cycloneive_io_obuf \sdram_we_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_we_n), + .obar()); +// synopsys translate_off +defparam \sdram_we_n~output .bus_hold = "false"; +defparam \sdram_we_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N16 +cycloneive_io_obuf \sdram_ba[0]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ba[0]), + .obar()); +// synopsys translate_off +defparam \sdram_ba[0]~output .bus_hold = "false"; +defparam \sdram_ba[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X1_Y29_N2 +cycloneive_io_obuf \sdram_ba[1]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ba[1]), + .obar()); +// synopsys translate_off +defparam \sdram_ba[1]~output .bus_hold = "false"; +defparam \sdram_ba[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N9 +cycloneive_io_obuf \sdram_addr[0]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[0]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[0]~output .bus_hold = "false"; +defparam \sdram_addr[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y27_N16 +cycloneive_io_obuf \sdram_addr[1]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[1]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[1]~output .bus_hold = "false"; +defparam \sdram_addr[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y27_N9 +cycloneive_io_obuf \sdram_addr[2]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[2]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[2]~output .bus_hold = "false"; +defparam \sdram_addr[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N23 +cycloneive_io_obuf \sdram_addr[3]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[3]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[3]~output .bus_hold = "false"; +defparam \sdram_addr[3]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N16 +cycloneive_io_obuf \sdram_addr[4]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[4]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[4]~output .bus_hold = "false"; +defparam \sdram_addr[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y24_N16 +cycloneive_io_obuf \sdram_addr[5]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[5]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[5]~output .bus_hold = "false"; +defparam \sdram_addr[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y23_N2 +cycloneive_io_obuf \sdram_addr[6]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[6]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[6]~output .bus_hold = "false"; +defparam \sdram_addr[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y24_N23 +cycloneive_io_obuf \sdram_addr[7]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[7]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[7]~output .bus_hold = "false"; +defparam \sdram_addr[7]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N16 +cycloneive_io_obuf \sdram_addr[8]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[8]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[8]~output .bus_hold = "false"; +defparam \sdram_addr[8]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y12_N16 +cycloneive_io_obuf \sdram_addr[9]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[9]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[9]~output .bus_hold = "false"; +defparam \sdram_addr[9]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N2 +cycloneive_io_obuf \sdram_addr[10]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[10]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[10]~output .bus_hold = "false"; +defparam \sdram_addr[10]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y12_N23 +cycloneive_io_obuf \sdram_addr[11]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[11]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[11]~output .bus_hold = "false"; +defparam \sdram_addr[11]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y13_N16 +cycloneive_io_obuf \sdram_addr[12]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[12]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[12]~output .bus_hold = "false"; +defparam \sdram_addr[12]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N2 +cycloneive_io_obuf \sdram_dqm[0]~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dqm[0]), + .obar()); +// synopsys translate_off +defparam \sdram_dqm[0]~output .bus_hold = "false"; +defparam \sdram_dqm[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y20_N2 +cycloneive_io_obuf \sdram_dqm[1]~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dqm[1]), + .obar()); +// synopsys translate_off +defparam \sdram_dqm[1]~output .bus_hold = "false"; +defparam \sdram_dqm[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N9 +cycloneive_io_obuf \sdram_dq[0]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[0]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[0]~output .bus_hold = "false"; +defparam \sdram_dq[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N2 +cycloneive_io_obuf \sdram_dq[1]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[1]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[1]~output .bus_hold = "false"; +defparam \sdram_dq[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X9_Y29_N2 +cycloneive_io_obuf \sdram_dq[2]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[2]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[2]~output .bus_hold = "false"; +defparam \sdram_dq[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X14_Y29_N30 +cycloneive_io_obuf \sdram_dq[3]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[3]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[3]~output .bus_hold = "false"; +defparam \sdram_dq[3]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X14_Y29_N23 +cycloneive_io_obuf \sdram_dq[4]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[4]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[4]~output .bus_hold = "false"; +defparam \sdram_dq[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X9_Y29_N9 +cycloneive_io_obuf \sdram_dq[5]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[5]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[5]~output .bus_hold = "false"; +defparam \sdram_dq[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N16 +cycloneive_io_obuf \sdram_dq[6]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[6]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[6]~output .bus_hold = "false"; +defparam \sdram_dq[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N23 +cycloneive_io_obuf \sdram_dq[7]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[7]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[7]~output .bus_hold = "false"; +defparam \sdram_dq[7]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y20_N9 +cycloneive_io_obuf \sdram_dq[8]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [8]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[8]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[8]~output .bus_hold = "false"; +defparam \sdram_dq[8]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N30 +cycloneive_io_obuf \sdram_dq[9]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [9]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[9]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[9]~output .bus_hold = "false"; +defparam \sdram_dq[9]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y25_N2 +cycloneive_io_obuf \sdram_dq[10]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [10]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[10]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[10]~output .bus_hold = "false"; +defparam \sdram_dq[10]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N9 +cycloneive_io_obuf \sdram_dq[11]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [11]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[11]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[11]~output .bus_hold = "false"; +defparam \sdram_dq[11]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y23_N9 +cycloneive_io_obuf \sdram_dq[12]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [12]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[12]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[12]~output .bus_hold = "false"; +defparam \sdram_dq[12]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N9 +cycloneive_io_obuf \sdram_dq[13]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [13]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[13]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[13]~output .bus_hold = "false"; +defparam \sdram_dq[13]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N23 +cycloneive_io_obuf \sdram_dq[14]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [14]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[14]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[14]~output .bus_hold = "false"; +defparam \sdram_dq[14]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N2 +cycloneive_io_obuf \sdram_dq[15]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [15]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[15]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[15]~output .bus_hold = "false"; +defparam \sdram_dq[15]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N2 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[0]~13 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[0]~13_combout = (\uart_rx_inst|work_en~q & (\uart_rx_inst|baud_cnt [0] $ (VCC))) # (!\uart_rx_inst|work_en~q & (\uart_rx_inst|baud_cnt [0] & VCC)) +// \uart_rx_inst|baud_cnt[0]~14 = CARRY((\uart_rx_inst|work_en~q & \uart_rx_inst|baud_cnt [0])) + + .dataa(\uart_rx_inst|work_en~q ), + .datab(\uart_rx_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_rx_inst|baud_cnt[0]~13_combout ), + .cout(\uart_rx_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \uart_rx_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X41_Y15_N22 +cycloneive_io_ibuf \sys_clk~input ( + .i(sys_clk), + .ibar(gnd), + .o(\sys_clk~input_o )); +// synopsys translate_off +defparam \sys_clk~input .bus_hold = "false"; +defparam \sys_clk~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: PLL_2 +cycloneive_pll \clk_gen_inst|altpll_component|auto_generated|pll1 ( + .areset(!\sys_rst_n~input_o ), + .pfdena(vcc), + .fbin(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ), + .phaseupdown(gnd), + .phasestep(gnd), + .scandata(gnd), + .scanclk(gnd), + .scanclkena(vcc), + .configupdate(gnd), + .clkswitch(gnd), + .inclk({gnd,\sys_clk~input_o }), + .phasecounterselect(3'b000), + .phasedone(), + .scandataout(), + .scandone(), + .activeclock(), + .locked(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .vcooverrange(), + .vcounderrange(), + .fbout(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ), + .clk(\clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus ), + .clkbad()); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .auto_settings = "false"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .bandwidth_type = "medium"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_high = 6; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_low = 6; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_high = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_low = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_high = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_low = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_high = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_initial = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_low = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_mode = "bypass"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_high = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_initial = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_low = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_mode = "bypass"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .charge_pump_current_bits = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_counter = "c0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_multiply_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_counter = "c1"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_multiply_by = 2; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_counter = "c2"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_multiply_by = 2; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_phase_shift = "-833"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_counter = "unused"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_counter = "unused"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .compensate_clock = "clock0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .inclk0_input_frequency = 20000; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .inclk1_input_frequency = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .loop_filter_c_bits = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .loop_filter_r_bits = 27; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m = 12; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .n = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .operation_mode = "normal"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pfd_max = 200000; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pfd_min = 3076; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pll_compensation_delay = 5989; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .self_reset_on_loss_lock = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .simulation_type = "timing"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .switch_over_type = "auto"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_center = 1538; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_frequency_control = "auto"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_max = 3333; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_min = 1538; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_phase_shift_step = 208; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_post_scale = 2; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N24 +cycloneive_lcell_comb \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder ( +// Equation(s): +// \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout = VCC + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder .lut_mask = 16'hFFFF; +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X41_Y4_N1 +cycloneive_io_ibuf \sys_rst_n~input ( + .i(sys_rst_n), + .ibar(gnd), + .o(\sys_rst_n~input_o )); +// synopsys translate_off +defparam \sys_rst_n~input .bus_hold = "false"; +defparam \sys_rst_n~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X27_Y26_N25 +dffeas \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .d(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ), + .prn(vcc)); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync .is_wysiwyg = "true"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N26 +cycloneive_lcell_comb \rst_n~0 ( +// Equation(s): +// \rst_n~0_combout = ((!\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ) # (!\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked )) # (!\sys_rst_n~input_o ) + + .dataa(\sys_rst_n~input_o ), + .datab(gnd), + .datac(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .datad(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ), + .cin(gnd), + .combout(\rst_n~0_combout ), + .cout()); +// synopsys translate_off +defparam \rst_n~0 .lut_mask = 16'h5FFF; +defparam \rst_n~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: CLKCTRL_G17 +cycloneive_clkctrl \rst_n~0clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\rst_n~0_combout }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\rst_n~0clkctrl_outclk )); +// synopsys translate_off +defparam \rst_n~0clkctrl .clock_type = "global clock"; +defparam \rst_n~0clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N6 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[2]~17 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[2]~17_combout = (\uart_rx_inst|baud_cnt [2] & (\uart_rx_inst|baud_cnt[1]~16 $ (GND))) # (!\uart_rx_inst|baud_cnt [2] & (!\uart_rx_inst|baud_cnt[1]~16 & VCC)) +// \uart_rx_inst|baud_cnt[2]~18 = CARRY((\uart_rx_inst|baud_cnt [2] & !\uart_rx_inst|baud_cnt[1]~16 )) + + .dataa(\uart_rx_inst|baud_cnt [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[1]~16 ), + .combout(\uart_rx_inst|baud_cnt[2]~17_combout ), + .cout(\uart_rx_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[2]~17 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N8 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[3]~19 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[3]~19_combout = (\uart_rx_inst|baud_cnt [3] & (!\uart_rx_inst|baud_cnt[2]~18 )) # (!\uart_rx_inst|baud_cnt [3] & ((\uart_rx_inst|baud_cnt[2]~18 ) # (GND))) +// \uart_rx_inst|baud_cnt[3]~20 = CARRY((!\uart_rx_inst|baud_cnt[2]~18 ) # (!\uart_rx_inst|baud_cnt [3])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [3]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[2]~18 ), + .combout(\uart_rx_inst|baud_cnt[3]~19_combout ), + .cout(\uart_rx_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[3]~19 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N9 +dffeas \uart_rx_inst|baud_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N12 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[5]~23 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[5]~23_combout = (\uart_rx_inst|baud_cnt [5] & (!\uart_rx_inst|baud_cnt[4]~22 )) # (!\uart_rx_inst|baud_cnt [5] & ((\uart_rx_inst|baud_cnt[4]~22 ) # (GND))) +// \uart_rx_inst|baud_cnt[5]~24 = CARRY((!\uart_rx_inst|baud_cnt[4]~22 ) # (!\uart_rx_inst|baud_cnt [5])) + + .dataa(\uart_rx_inst|baud_cnt [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[4]~22 ), + .combout(\uart_rx_inst|baud_cnt[5]~23_combout ), + .cout(\uart_rx_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[5]~23 .lut_mask = 16'h5A5F; +defparam \uart_rx_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N13 +dffeas \uart_rx_inst|baud_cnt[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N30 +cycloneive_lcell_comb \uart_rx_inst|Equal1~1 ( +// Equation(s): +// \uart_rx_inst|Equal1~1_combout = (\uart_rx_inst|baud_cnt [4] & (\uart_rx_inst|baud_cnt [2] & (!\uart_rx_inst|baud_cnt [3] & !\uart_rx_inst|baud_cnt [5]))) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(\uart_rx_inst|baud_cnt [2]), + .datac(\uart_rx_inst|baud_cnt [3]), + .datad(\uart_rx_inst|baud_cnt [5]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~1 .lut_mask = 16'h0008; +defparam \uart_rx_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N14 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[6]~25 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[6]~25_combout = (\uart_rx_inst|baud_cnt [6] & (\uart_rx_inst|baud_cnt[5]~24 $ (GND))) # (!\uart_rx_inst|baud_cnt [6] & (!\uart_rx_inst|baud_cnt[5]~24 & VCC)) +// \uart_rx_inst|baud_cnt[6]~26 = CARRY((\uart_rx_inst|baud_cnt [6] & !\uart_rx_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[5]~24 ), + .combout(\uart_rx_inst|baud_cnt[6]~25_combout ), + .cout(\uart_rx_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N15 +dffeas \uart_rx_inst|baud_cnt[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N16 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[7]~27 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[7]~27_combout = (\uart_rx_inst|baud_cnt [7] & (!\uart_rx_inst|baud_cnt[6]~26 )) # (!\uart_rx_inst|baud_cnt [7] & ((\uart_rx_inst|baud_cnt[6]~26 ) # (GND))) +// \uart_rx_inst|baud_cnt[7]~28 = CARRY((!\uart_rx_inst|baud_cnt[6]~26 ) # (!\uart_rx_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[6]~26 ), + .combout(\uart_rx_inst|baud_cnt[7]~27_combout ), + .cout(\uart_rx_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N17 +dffeas \uart_rx_inst|baud_cnt[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N18 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[8]~29 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[8]~29_combout = (\uart_rx_inst|baud_cnt [8] & (\uart_rx_inst|baud_cnt[7]~28 $ (GND))) # (!\uart_rx_inst|baud_cnt [8] & (!\uart_rx_inst|baud_cnt[7]~28 & VCC)) +// \uart_rx_inst|baud_cnt[8]~30 = CARRY((\uart_rx_inst|baud_cnt [8] & !\uart_rx_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[7]~28 ), + .combout(\uart_rx_inst|baud_cnt[8]~29_combout ), + .cout(\uart_rx_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N19 +dffeas \uart_rx_inst|baud_cnt[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N0 +cycloneive_lcell_comb \uart_rx_inst|Equal1~0 ( +// Equation(s): +// \uart_rx_inst|Equal1~0_combout = (\uart_rx_inst|baud_cnt [0] & (!\uart_rx_inst|baud_cnt [8] & (\uart_rx_inst|baud_cnt [1] & !\uart_rx_inst|baud_cnt [7]))) + + .dataa(\uart_rx_inst|baud_cnt [0]), + .datab(\uart_rx_inst|baud_cnt [8]), + .datac(\uart_rx_inst|baud_cnt [1]), + .datad(\uart_rx_inst|baud_cnt [7]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~0 .lut_mask = 16'h0020; +defparam \uart_rx_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N20 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[9]~31 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[9]~31_combout = (\uart_rx_inst|baud_cnt [9] & (!\uart_rx_inst|baud_cnt[8]~30 )) # (!\uart_rx_inst|baud_cnt [9] & ((\uart_rx_inst|baud_cnt[8]~30 ) # (GND))) +// \uart_rx_inst|baud_cnt[9]~32 = CARRY((!\uart_rx_inst|baud_cnt[8]~30 ) # (!\uart_rx_inst|baud_cnt [9])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [9]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[8]~30 ), + .combout(\uart_rx_inst|baud_cnt[9]~31_combout ), + .cout(\uart_rx_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[9]~31 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N21 +dffeas \uart_rx_inst|baud_cnt[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N22 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[10]~33 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[10]~33_combout = (\uart_rx_inst|baud_cnt [10] & (\uart_rx_inst|baud_cnt[9]~32 $ (GND))) # (!\uart_rx_inst|baud_cnt [10] & (!\uart_rx_inst|baud_cnt[9]~32 & VCC)) +// \uart_rx_inst|baud_cnt[10]~34 = CARRY((\uart_rx_inst|baud_cnt [10] & !\uart_rx_inst|baud_cnt[9]~32 )) + + .dataa(\uart_rx_inst|baud_cnt [10]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[9]~32 ), + .combout(\uart_rx_inst|baud_cnt[10]~33_combout ), + .cout(\uart_rx_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[10]~33 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N24 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[11]~35 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[11]~35_combout = (\uart_rx_inst|baud_cnt [11] & (!\uart_rx_inst|baud_cnt[10]~34 )) # (!\uart_rx_inst|baud_cnt [11] & ((\uart_rx_inst|baud_cnt[10]~34 ) # (GND))) +// \uart_rx_inst|baud_cnt[11]~36 = CARRY((!\uart_rx_inst|baud_cnt[10]~34 ) # (!\uart_rx_inst|baud_cnt [11])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[10]~34 ), + .combout(\uart_rx_inst|baud_cnt[11]~35_combout ), + .cout(\uart_rx_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[11]~35 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N25 +dffeas \uart_rx_inst|baud_cnt[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N8 +cycloneive_lcell_comb \uart_rx_inst|Equal1~2 ( +// Equation(s): +// \uart_rx_inst|Equal1~2_combout = (!\uart_rx_inst|baud_cnt [9] & \uart_rx_inst|baud_cnt [6]) + + .dataa(gnd), + .datab(gnd), + .datac(\uart_rx_inst|baud_cnt [9]), + .datad(\uart_rx_inst|baud_cnt [6]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~2 .lut_mask = 16'h0F00; +defparam \uart_rx_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y25_N23 +dffeas \uart_rx_inst|baud_cnt[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N2 +cycloneive_lcell_comb \uart_rx_inst|Equal1~3 ( +// Equation(s): +// \uart_rx_inst|Equal1~3_combout = (\uart_rx_inst|baud_cnt [12] & (!\uart_rx_inst|baud_cnt [11] & (\uart_rx_inst|Equal1~2_combout & \uart_rx_inst|baud_cnt [10]))) + + .dataa(\uart_rx_inst|baud_cnt [12]), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(\uart_rx_inst|Equal1~2_combout ), + .datad(\uart_rx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~3 .lut_mask = 16'h2000; +defparam \uart_rx_inst|Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N12 +cycloneive_lcell_comb \uart_rx_inst|always5~0 ( +// Equation(s): +// \uart_rx_inst|always5~0_combout = ((\uart_rx_inst|Equal1~1_combout & (\uart_rx_inst|Equal1~0_combout & \uart_rx_inst|Equal1~3_combout ))) # (!\uart_rx_inst|work_en~q ) + + .dataa(\uart_rx_inst|work_en~q ), + .datab(\uart_rx_inst|Equal1~1_combout ), + .datac(\uart_rx_inst|Equal1~0_combout ), + .datad(\uart_rx_inst|Equal1~3_combout ), + .cin(gnd), + .combout(\uart_rx_inst|always5~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always5~0 .lut_mask = 16'hD555; +defparam \uart_rx_inst|always5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y25_N3 +dffeas \uart_rx_inst|baud_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N4 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[1]~15 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[1]~15_combout = (\uart_rx_inst|baud_cnt [1] & (!\uart_rx_inst|baud_cnt[0]~14 )) # (!\uart_rx_inst|baud_cnt [1] & ((\uart_rx_inst|baud_cnt[0]~14 ) # (GND))) +// \uart_rx_inst|baud_cnt[1]~16 = CARRY((!\uart_rx_inst|baud_cnt[0]~14 ) # (!\uart_rx_inst|baud_cnt [1])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [1]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[0]~14 ), + .combout(\uart_rx_inst|baud_cnt[1]~15_combout ), + .cout(\uart_rx_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[1]~15 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N5 +dffeas \uart_rx_inst|baud_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y25_N7 +dffeas \uart_rx_inst|baud_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N28 +cycloneive_lcell_comb \uart_rx_inst|Equal2~0 ( +// Equation(s): +// \uart_rx_inst|Equal2~0_combout = (!\uart_rx_inst|baud_cnt [4] & (!\uart_rx_inst|baud_cnt [2] & (\uart_rx_inst|baud_cnt [3] & \uart_rx_inst|baud_cnt [5]))) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(\uart_rx_inst|baud_cnt [2]), + .datac(\uart_rx_inst|baud_cnt [3]), + .datad(\uart_rx_inst|baud_cnt [5]), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~0 .lut_mask = 16'h1000; +defparam \uart_rx_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N26 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[12]~37 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[12]~37_combout = \uart_rx_inst|baud_cnt [12] $ (!\uart_rx_inst|baud_cnt[11]~36 ) + + .dataa(\uart_rx_inst|baud_cnt [12]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\uart_rx_inst|baud_cnt[11]~36 ), + .combout(\uart_rx_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[12]~37 .lut_mask = 16'hA5A5; +defparam \uart_rx_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N27 +dffeas \uart_rx_inst|baud_cnt[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N20 +cycloneive_lcell_comb \uart_rx_inst|Equal2~1 ( +// Equation(s): +// \uart_rx_inst|Equal2~1_combout = (!\uart_rx_inst|baud_cnt [6] & (\uart_rx_inst|baud_cnt [11] & (\uart_rx_inst|baud_cnt [9] & !\uart_rx_inst|baud_cnt [10]))) + + .dataa(\uart_rx_inst|baud_cnt [6]), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(\uart_rx_inst|baud_cnt [9]), + .datad(\uart_rx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~1 .lut_mask = 16'h0040; +defparam \uart_rx_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N4 +cycloneive_lcell_comb \uart_rx_inst|Equal2~2 ( +// Equation(s): +// \uart_rx_inst|Equal2~2_combout = (\uart_rx_inst|Equal1~0_combout & (\uart_rx_inst|Equal2~0_combout & (!\uart_rx_inst|baud_cnt [12] & \uart_rx_inst|Equal2~1_combout ))) + + .dataa(\uart_rx_inst|Equal1~0_combout ), + .datab(\uart_rx_inst|Equal2~0_combout ), + .datac(\uart_rx_inst|baud_cnt [12]), + .datad(\uart_rx_inst|Equal2~1_combout ), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~2 .lut_mask = 16'h0800; +defparam \uart_rx_inst|Equal2~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N5 +dffeas \uart_rx_inst|bit_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Equal2~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N26 +cycloneive_lcell_comb \uart_rx_inst|Add1~2 ( +// Equation(s): +// \uart_rx_inst|Add1~2_combout = (\uart_rx_inst|bit_cnt [1] & (!\uart_rx_inst|Add1~1 )) # (!\uart_rx_inst|bit_cnt [1] & ((\uart_rx_inst|Add1~1 ) # (GND))) +// \uart_rx_inst|Add1~3 = CARRY((!\uart_rx_inst|Add1~1 ) # (!\uart_rx_inst|bit_cnt [1])) + + .dataa(\uart_rx_inst|bit_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|Add1~1 ), + .combout(\uart_rx_inst|Add1~2_combout ), + .cout(\uart_rx_inst|Add1~3 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~2 .lut_mask = 16'h5A5F; +defparam \uart_rx_inst|Add1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X16_Y25_N29 +dffeas \uart_rx_inst|bit_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Add1~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y25_N27 +dffeas \uart_rx_inst|bit_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Add1~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N0 +cycloneive_lcell_comb \uart_rx_inst|always4~0 ( +// Equation(s): +// \uart_rx_inst|always4~0_combout = (!\uart_rx_inst|bit_cnt [0] & (!\uart_rx_inst|bit_cnt [2] & !\uart_rx_inst|bit_cnt [1])) + + .dataa(\uart_rx_inst|bit_cnt [0]), + .datab(\uart_rx_inst|bit_cnt [2]), + .datac(\uart_rx_inst|bit_cnt [1]), + .datad(gnd), + .cin(gnd), + .combout(\uart_rx_inst|always4~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always4~0 .lut_mask = 16'h0101; +defparam \uart_rx_inst|always4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N16 +cycloneive_lcell_comb \uart_rx_inst|always4~1 ( +// Equation(s): +// \uart_rx_inst|always4~1_combout = (\uart_rx_inst|bit_cnt [3] & (\uart_rx_inst|always4~0_combout & \uart_rx_inst|bit_flag~q )) + + .dataa(\uart_rx_inst|bit_cnt [3]), + .datab(\uart_rx_inst|always4~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_rx_inst|always4~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always4~1 .lut_mask = 16'h8080; +defparam \uart_rx_inst|always4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N17 +dffeas \uart_rx_inst|rx_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|always4~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_flag .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N1 +dffeas \uart_rx_inst|po_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_flag~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .lut_mask = 16'hF0B4; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .lut_mask = 16'h0800; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .lut_mask = 16'h0100; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .lut_mask = 16'hC3F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 .lut_mask = 16'h0100; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 .lut_mask = 16'h1000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .lut_mask = 16'hE1F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'h2000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 .lut_mask = 16'h000F; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'h0F33; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q )))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .lut_mask = 16'hEEE0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X16_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 .lut_mask = 16'h00BB; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X17_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ) # +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 .lut_mask = 16'hFFFE; +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 .lut_mask = 16'hFFC8; +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9]), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & ((\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 .lut_mask = 16'hAAA8; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .lut_mask = 16'hF0B4; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .lut_mask = 16'hD2F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .lut_mask = 16'hD2D2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .lut_mask = 16'h0020; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .lut_mask = 16'hD2F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 .lut_mask = 16'h0500; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] $ (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 .lut_mask = 16'h000F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 .lut_mask = 16'h2000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 .lut_mask = 16'hCCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [5] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 .lut_mask = 16'hFF30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 .lut_mask = 16'h00F8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 .lut_mask = 16'h0088; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 .lut_mask = 16'hCCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 .lut_mask = 16'hEEFF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [0] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 .lut_mask = 16'h00FE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 .lut_mask = 16'hFFEC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y23_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [1]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 .lut_mask = 16'h5776; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .lut_mask = 16'hF0D2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .lut_mask = 16'h78F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .lut_mask = 16'h0100; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .lut_mask = 16'hA5F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2] $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .lut_mask = 16'h0008; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .lut_mask = 16'hFCFF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 .lut_mask = 16'hF05A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'hAC0C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout )))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'h59FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h0021; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout & +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout +// )) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'h1333; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y24_N25 +dffeas \fifo_read_inst|read_en_dly ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\fifo_read_inst|read_en~q ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_en_dly~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_en_dly .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_en_dly .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q & \fifo_read_inst|read_en_dly~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datab(gnd), + .datac(\fifo_read_inst|read_en_dly~q ), + .datad(gnd), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq .lut_mask = 16'h5050; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] $ (((VCC) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] $ +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 .lut_mask = 16'h5599; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y24_N7 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N8 +cycloneive_lcell_comb \fifo_read_inst|Add2~0 ( +// Equation(s): +// \fifo_read_inst|Add2~0_combout = (\fifo_read_inst|bit_flag~q & (\fifo_read_inst|bit_cnt [0] $ (VCC))) # (!\fifo_read_inst|bit_flag~q & (\fifo_read_inst|bit_cnt [0] & VCC)) +// \fifo_read_inst|Add2~1 = CARRY((\fifo_read_inst|bit_flag~q & \fifo_read_inst|bit_cnt [0])) + + .dataa(\fifo_read_inst|bit_flag~q ), + .datab(\fifo_read_inst|bit_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|Add2~0_combout ), + .cout(\fifo_read_inst|Add2~1 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~0 .lut_mask = 16'h6688; +defparam \fifo_read_inst|Add2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N9 +dffeas \fifo_read_inst|bit_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Add2~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N10 +cycloneive_lcell_comb \fifo_read_inst|Add2~2 ( +// Equation(s): +// \fifo_read_inst|Add2~2_combout = (\fifo_read_inst|bit_cnt [1] & (!\fifo_read_inst|Add2~1 )) # (!\fifo_read_inst|bit_cnt [1] & ((\fifo_read_inst|Add2~1 ) # (GND))) +// \fifo_read_inst|Add2~3 = CARRY((!\fifo_read_inst|Add2~1 ) # (!\fifo_read_inst|bit_cnt [1])) + + .dataa(\fifo_read_inst|bit_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|Add2~1 ), + .combout(\fifo_read_inst|Add2~2_combout ), + .cout(\fifo_read_inst|Add2~3 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~2 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|Add2~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N14 +cycloneive_lcell_comb \fifo_read_inst|Add2~6 ( +// Equation(s): +// \fifo_read_inst|Add2~6_combout = \fifo_read_inst|bit_cnt [3] $ (\fifo_read_inst|Add2~5 ) + + .dataa(gnd), + .datab(\fifo_read_inst|bit_cnt [3]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|Add2~5 ), + .combout(\fifo_read_inst|Add2~6_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Add2~6 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|Add2~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N4 +cycloneive_lcell_comb \fifo_read_inst|bit_cnt~0 ( +// Equation(s): +// \fifo_read_inst|bit_cnt~0_combout = (\fifo_read_inst|Add2~6_combout & ((!\fifo_read_inst|always5~0_combout ) # (!\fifo_read_inst|bit_cnt [0]))) + + .dataa(gnd), + .datab(\fifo_read_inst|bit_cnt [0]), + .datac(\fifo_read_inst|Add2~6_combout ), + .datad(\fifo_read_inst|always5~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|bit_cnt~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt~0 .lut_mask = 16'h30F0; +defparam \fifo_read_inst|bit_cnt~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N5 +dffeas \fifo_read_inst|bit_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|bit_cnt~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N4 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[0]~13 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[0]~13_combout = (\fifo_read_inst|rd_flag~q & (\fifo_read_inst|baud_cnt [0] $ (VCC))) # (!\fifo_read_inst|rd_flag~q & (\fifo_read_inst|baud_cnt [0] & VCC)) +// \fifo_read_inst|baud_cnt[0]~14 = CARRY((\fifo_read_inst|rd_flag~q & \fifo_read_inst|baud_cnt [0])) + + .dataa(\fifo_read_inst|rd_flag~q ), + .datab(\fifo_read_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|baud_cnt[0]~13_combout ), + .cout(\fifo_read_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \fifo_read_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N14 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[5]~23 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[5]~23_combout = (\fifo_read_inst|baud_cnt [5] & (!\fifo_read_inst|baud_cnt[4]~22 )) # (!\fifo_read_inst|baud_cnt [5] & ((\fifo_read_inst|baud_cnt[4]~22 ) # (GND))) +// \fifo_read_inst|baud_cnt[5]~24 = CARRY((!\fifo_read_inst|baud_cnt[4]~22 ) # (!\fifo_read_inst|baud_cnt [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[4]~22 ), + .combout(\fifo_read_inst|baud_cnt[5]~23_combout ), + .cout(\fifo_read_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[5]~23 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N16 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[6]~25 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[6]~25_combout = (\fifo_read_inst|baud_cnt [6] & (\fifo_read_inst|baud_cnt[5]~24 $ (GND))) # (!\fifo_read_inst|baud_cnt [6] & (!\fifo_read_inst|baud_cnt[5]~24 & VCC)) +// \fifo_read_inst|baud_cnt[6]~26 = CARRY((\fifo_read_inst|baud_cnt [6] & !\fifo_read_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[5]~24 ), + .combout(\fifo_read_inst|baud_cnt[6]~25_combout ), + .cout(\fifo_read_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N17 +dffeas \fifo_read_inst|baud_cnt[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N18 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[7]~27 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[7]~27_combout = (\fifo_read_inst|baud_cnt [7] & (!\fifo_read_inst|baud_cnt[6]~26 )) # (!\fifo_read_inst|baud_cnt [7] & ((\fifo_read_inst|baud_cnt[6]~26 ) # (GND))) +// \fifo_read_inst|baud_cnt[7]~28 = CARRY((!\fifo_read_inst|baud_cnt[6]~26 ) # (!\fifo_read_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[6]~26 ), + .combout(\fifo_read_inst|baud_cnt[7]~27_combout ), + .cout(\fifo_read_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N19 +dffeas \fifo_read_inst|baud_cnt[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N20 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[8]~29 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[8]~29_combout = (\fifo_read_inst|baud_cnt [8] & (\fifo_read_inst|baud_cnt[7]~28 $ (GND))) # (!\fifo_read_inst|baud_cnt [8] & (!\fifo_read_inst|baud_cnt[7]~28 & VCC)) +// \fifo_read_inst|baud_cnt[8]~30 = CARRY((\fifo_read_inst|baud_cnt [8] & !\fifo_read_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[7]~28 ), + .combout(\fifo_read_inst|baud_cnt[8]~29_combout ), + .cout(\fifo_read_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N21 +dffeas \fifo_read_inst|baud_cnt[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N0 +cycloneive_lcell_comb \fifo_read_inst|Equal4~0 ( +// Equation(s): +// \fifo_read_inst|Equal4~0_combout = (\fifo_read_inst|baud_cnt [1] & (!\fifo_read_inst|baud_cnt [8] & (\fifo_read_inst|baud_cnt [0] & !\fifo_read_inst|baud_cnt [7]))) + + .dataa(\fifo_read_inst|baud_cnt [1]), + .datab(\fifo_read_inst|baud_cnt [8]), + .datac(\fifo_read_inst|baud_cnt [0]), + .datad(\fifo_read_inst|baud_cnt [7]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~0 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N10 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[3]~19 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[3]~19_combout = (\fifo_read_inst|baud_cnt [3] & (!\fifo_read_inst|baud_cnt[2]~18 )) # (!\fifo_read_inst|baud_cnt [3] & ((\fifo_read_inst|baud_cnt[2]~18 ) # (GND))) +// \fifo_read_inst|baud_cnt[3]~20 = CARRY((!\fifo_read_inst|baud_cnt[2]~18 ) # (!\fifo_read_inst|baud_cnt [3])) + + .dataa(\fifo_read_inst|baud_cnt [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[2]~18 ), + .combout(\fifo_read_inst|baud_cnt[3]~19_combout ), + .cout(\fifo_read_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[3]~19 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N11 +dffeas \fifo_read_inst|baud_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N22 +cycloneive_lcell_comb \fifo_read_inst|Equal4~1 ( +// Equation(s): +// \fifo_read_inst|Equal4~1_combout = (\fifo_read_inst|baud_cnt [4] & (!\fifo_read_inst|baud_cnt [5] & (!\fifo_read_inst|baud_cnt [3] & \fifo_read_inst|baud_cnt [2]))) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(\fifo_read_inst|baud_cnt [3]), + .datad(\fifo_read_inst|baud_cnt [2]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~1 .lut_mask = 16'h0200; +defparam \fifo_read_inst|Equal4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N24 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[10]~33 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[10]~33_combout = (\fifo_read_inst|baud_cnt [10] & (\fifo_read_inst|baud_cnt[9]~32 $ (GND))) # (!\fifo_read_inst|baud_cnt [10] & (!\fifo_read_inst|baud_cnt[9]~32 & VCC)) +// \fifo_read_inst|baud_cnt[10]~34 = CARRY((\fifo_read_inst|baud_cnt [10] & !\fifo_read_inst|baud_cnt[9]~32 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[9]~32 ), + .combout(\fifo_read_inst|baud_cnt[10]~33_combout ), + .cout(\fifo_read_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[10]~33 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N25 +dffeas \fifo_read_inst|baud_cnt[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N28 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[12]~37 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[12]~37_combout = \fifo_read_inst|baud_cnt[11]~36 $ (!\fifo_read_inst|baud_cnt [12]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(\fifo_read_inst|baud_cnt[11]~36 ), + .combout(\fifo_read_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[12]~37 .lut_mask = 16'hF00F; +defparam \fifo_read_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N29 +dffeas \fifo_read_inst|baud_cnt[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N16 +cycloneive_lcell_comb \fifo_read_inst|Equal4~3 ( +// Equation(s): +// \fifo_read_inst|Equal4~3_combout = (\fifo_read_inst|Equal4~2_combout & (\fifo_read_inst|Equal4~0_combout & (\fifo_read_inst|Equal4~1_combout & \fifo_read_inst|baud_cnt [12]))) + + .dataa(\fifo_read_inst|Equal4~2_combout ), + .datab(\fifo_read_inst|Equal4~0_combout ), + .datac(\fifo_read_inst|Equal4~1_combout ), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~3_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~3 .lut_mask = 16'h8000; +defparam \fifo_read_inst|Equal4~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X29_Y25_N5 +dffeas \fifo_read_inst|baud_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N8 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[2]~17 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[2]~17_combout = (\fifo_read_inst|baud_cnt [2] & (\fifo_read_inst|baud_cnt[1]~16 $ (GND))) # (!\fifo_read_inst|baud_cnt [2] & (!\fifo_read_inst|baud_cnt[1]~16 & VCC)) +// \fifo_read_inst|baud_cnt[2]~18 = CARRY((\fifo_read_inst|baud_cnt [2] & !\fifo_read_inst|baud_cnt[1]~16 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[1]~16 ), + .combout(\fifo_read_inst|baud_cnt[2]~17_combout ), + .cout(\fifo_read_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[2]~17 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N9 +dffeas \fifo_read_inst|baud_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N15 +dffeas \fifo_read_inst|baud_cnt[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal5~0 ( +// Equation(s): +// \fifo_read_inst|Equal5~0_combout = (!\fifo_read_inst|baud_cnt [4] & (\fifo_read_inst|baud_cnt [5] & (\fifo_read_inst|baud_cnt [3] & !\fifo_read_inst|baud_cnt [2]))) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(\fifo_read_inst|baud_cnt [3]), + .datad(\fifo_read_inst|baud_cnt [2]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~0 .lut_mask = 16'h0040; +defparam \fifo_read_inst|Equal5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N26 +cycloneive_lcell_comb \fifo_read_inst|Equal5~2 ( +// Equation(s): +// \fifo_read_inst|Equal5~2_combout = (\fifo_read_inst|Equal5~1_combout & (\fifo_read_inst|Equal5~0_combout & (\fifo_read_inst|Equal4~0_combout & !\fifo_read_inst|baud_cnt [12]))) + + .dataa(\fifo_read_inst|Equal5~1_combout ), + .datab(\fifo_read_inst|Equal5~0_combout ), + .datac(\fifo_read_inst|Equal4~0_combout ), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~2 .lut_mask = 16'h0080; +defparam \fifo_read_inst|Equal5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N27 +dffeas \fifo_read_inst|bit_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Equal5~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N6 +cycloneive_lcell_comb \fifo_read_inst|bit_cnt~1 ( +// Equation(s): +// \fifo_read_inst|bit_cnt~1_combout = (\fifo_read_inst|Add2~2_combout & ((!\fifo_read_inst|bit_cnt [0]) # (!\fifo_read_inst|always5~0_combout ))) + + .dataa(gnd), + .datab(\fifo_read_inst|always5~0_combout ), + .datac(\fifo_read_inst|bit_cnt [0]), + .datad(\fifo_read_inst|Add2~2_combout ), + .cin(gnd), + .combout(\fifo_read_inst|bit_cnt~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt~1 .lut_mask = 16'h3F00; +defparam \fifo_read_inst|bit_cnt~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N7 +dffeas \fifo_read_inst|bit_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|bit_cnt~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N24 +cycloneive_lcell_comb \fifo_read_inst|always5~0 ( +// Equation(s): +// \fifo_read_inst|always5~0_combout = (!\fifo_read_inst|bit_cnt [2] & (\fifo_read_inst|bit_cnt [3] & (\fifo_read_inst|bit_flag~q & !\fifo_read_inst|bit_cnt [1]))) + + .dataa(\fifo_read_inst|bit_cnt [2]), + .datab(\fifo_read_inst|bit_cnt [3]), + .datac(\fifo_read_inst|bit_flag~q ), + .datad(\fifo_read_inst|bit_cnt [1]), + .cin(gnd), + .combout(\fifo_read_inst|always5~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|always5~0 .lut_mask = 16'h0040; +defparam \fifo_read_inst|always5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N0 +cycloneive_lcell_comb \fifo_read_inst|always5~1 ( +// Equation(s): +// \fifo_read_inst|always5~1_combout = (\fifo_read_inst|bit_cnt [0] & \fifo_read_inst|always5~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\fifo_read_inst|bit_cnt [0]), + .datad(\fifo_read_inst|always5~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|always5~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|always5~1 .lut_mask = 16'hF000; +defparam \fifo_read_inst|always5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N1 +dffeas \fifo_read_inst|rd_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|always5~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|rd_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|rd_en .is_wysiwyg = "true"; +defparam \fifo_read_inst|rd_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]) # +// (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # (!\fifo_read_inst|rd_en~q )) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 .lut_mask = 16'hFBFF; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ) # (\fifo_read_inst|read_en_dly~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datab(gnd), + .datac(\fifo_read_inst|read_en_dly~q ), + .datad(gnd), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 .lut_mask = 16'hFAFA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ) # +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ) # (!\fifo_read_inst|Equal1~1_combout )))) + + .dataa(\fifo_read_inst|Equal1~1_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 .lut_mask = 16'hFFD0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ) # +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q & !\fifo_read_inst|rd_en~q )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ), + .datab(gnd), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 .lut_mask = 16'hAAFA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N27 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout = (\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q $ (((!\fifo_read_inst|rd_en~q ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ))))) # (!\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & +// ((\fifo_read_inst|rd_en~q )))) + + .dataa(\fifo_read_inst|read_en_dly~q ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 .lut_mask = 16'hC60A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N9 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y25_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X26_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X26_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N10 +cycloneive_lcell_comb \Equal2~1 ( +// Equation(s): +// \Equal2~1_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cin(gnd), + .combout(\Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal2~1 .lut_mask = 16'h0040; +defparam \Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N28 +cycloneive_lcell_comb \fifo_read_inst|read_en~0 ( +// Equation(s): +// \fifo_read_inst|read_en~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout & (\Equal2~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout & +// \Equal2~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datab(\Equal2~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .datad(\Equal2~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_en~0 .lut_mask = 16'h0400; +defparam \fifo_read_inst|read_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N8 +cycloneive_lcell_comb \fifo_read_inst|read_en~1 ( +// Equation(s): +// \fifo_read_inst|read_en~1_combout = (\fifo_read_inst|read_en~0_combout ) # ((\fifo_read_inst|read_en~q & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # +// (!\fifo_read_inst|Equal1~2_combout )))) + + .dataa(\fifo_read_inst|Equal1~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datac(\fifo_read_inst|read_en~q ), + .datad(\fifo_read_inst|read_en~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_en~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_en~1 .lut_mask = 16'hFFD0; +defparam \fifo_read_inst|read_en~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N9 +dffeas \fifo_read_inst|read_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_en~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_en .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout = (\fifo_read_inst|read_en~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\fifo_read_inst|read_en~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .lut_mask = 16'hFC00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .lut_mask = 16'h0800; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N2 +cycloneive_lcell_comb \Equal2~0 ( +// Equation(s): +// \Equal2~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ), + .cin(gnd), + .combout(\Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal2~0 .lut_mask = 16'h0001; +defparam \Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 .lut_mask = 16'h55AA; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9]), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout = (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 .lut_mask = 16'h0002; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout & (\Equal2~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout & +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .datab(\Equal2~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q & (!\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 .lut_mask = 16'h0100; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 .lut_mask = 16'h5500; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & !\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 .lut_mask = 16'hFF08; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 .lut_mask = 16'h0030; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 .lut_mask = 16'hDCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 .lut_mask = 16'hFF50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 .lut_mask = 16'hF888; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 .lut_mask = 16'hFEFE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 .lut_mask = 16'h00F8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 .lut_mask = 16'h0AA0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 .lut_mask = 16'h00F0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 .lut_mask = 16'hFF50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 .lut_mask = 16'h0330; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 .lut_mask = 16'h0300; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout = ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 .lut_mask = 16'hFFD5; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 .lut_mask = 16'hFF88; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 .lut_mask = 16'h1230; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 .lut_mask = 16'h7F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 .lut_mask = 16'hFCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 .lut_mask = 16'h0007; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk +// [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ) # +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 .lut_mask = 16'hB3A0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 .lut_mask = 16'hF5F5; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 .lut_mask = 16'h2020; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 .lut_mask = 16'hFFC0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 .lut_mask = 16'h000F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 .lut_mask = 16'h003C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 .lut_mask = 16'h0C0C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 .lut_mask = 16'hEAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 .lut_mask = 16'hB800; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 .lut_mask = 16'h0055; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 .lut_mask = 16'h0004; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 .lut_mask = 16'h2AAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [9] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [11] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 $ (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 .lut_mask = 16'hF00F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 .lut_mask = 16'h0040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 .lut_mask = 16'h0020; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 .lut_mask = 16'h5000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 .lut_mask = 16'h2000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 .lut_mask = 16'hFEFF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 .lut_mask = 16'h1230; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 .lut_mask = 16'hF2F0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 .lut_mask = 16'h4040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 .lut_mask = 16'h55AA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 .lut_mask = 16'hF0FF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout = (((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 .lut_mask = 16'h777F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 .lut_mask = 16'h8C00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout = ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 .lut_mask = 16'h1F3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 .lut_mask = 16'hC840; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 $ (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 .lut_mask = 16'h0040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 .lut_mask = 16'hC000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ) # +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 .lut_mask = 16'hBA30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 .lut_mask = 16'h5450; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 .lut_mask = 16'hFFCF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 .lut_mask = 16'hF888; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 .lut_mask = 16'hFFF8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] $ (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(gnd), + .datad(gnd), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 .lut_mask = 16'h0033; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 .lut_mask = 16'hAAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout = ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 .lut_mask = 16'h5557; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .lut_mask = 16'h00A8; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .lut_mask = 16'h5400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .lut_mask = 16'h2000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .lut_mask = 16'hC3F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout +// )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'hE2C0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'hA018; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout = (\uart_rx_inst|po_flag~q & ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .datab(gnd), + .datac(\uart_rx_inst|po_flag~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .lut_mask = 16'h50F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: CLKCTRL_G8 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [0]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: CLKCTRL_G9 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [1]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y8_N1 +cycloneive_io_ibuf \rx~input ( + .i(rx), + .ibar(gnd), + .o(\rx~input_o )); +// synopsys translate_off +defparam \rx~input .bus_hold = "false"; +defparam \rx~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N12 +cycloneive_lcell_comb \uart_rx_inst|rx_reg1~0 ( +// Equation(s): +// \uart_rx_inst|rx_reg1~0_combout = !\rx~input_o + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\rx~input_o ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg1~0 .lut_mask = 16'h00FF; +defparam \uart_rx_inst|rx_reg1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N13 +dffeas \uart_rx_inst|rx_reg1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg1 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N2 +cycloneive_lcell_comb \uart_rx_inst|rx_reg2~feeder ( +// Equation(s): +// \uart_rx_inst|rx_reg2~feeder_combout = \uart_rx_inst|rx_reg1~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg1~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg2~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg2~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_reg2~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N3 +dffeas \uart_rx_inst|rx_reg2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg2~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg2 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N0 +cycloneive_lcell_comb \uart_rx_inst|rx_reg3~feeder ( +// Equation(s): +// \uart_rx_inst|rx_reg3~feeder_combout = \uart_rx_inst|rx_reg2~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg2~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg3~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg3~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_reg3~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N1 +dffeas \uart_rx_inst|rx_reg3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg3~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg3 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N14 +cycloneive_lcell_comb \uart_rx_inst|rx_data[7]~0 ( +// Equation(s): +// \uart_rx_inst|rx_data[7]~0_combout = !\uart_rx_inst|rx_reg3~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg3~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[7]~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[7]~0 .lut_mask = 16'h00FF; +defparam \uart_rx_inst|rx_data[7]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N10 +cycloneive_lcell_comb \uart_rx_inst|bit_cnt~0 ( +// Equation(s): +// \uart_rx_inst|bit_cnt~0_combout = (\uart_rx_inst|Add1~6_combout & (((!\uart_rx_inst|always4~0_combout ) # (!\uart_rx_inst|bit_cnt [3])) # (!\uart_rx_inst|bit_flag~q ))) + + .dataa(\uart_rx_inst|Add1~6_combout ), + .datab(\uart_rx_inst|bit_flag~q ), + .datac(\uart_rx_inst|bit_cnt [3]), + .datad(\uart_rx_inst|always4~0_combout ), + .cin(gnd), + .combout(\uart_rx_inst|bit_cnt~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt~0 .lut_mask = 16'h2AAA; +defparam \uart_rx_inst|bit_cnt~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N11 +dffeas \uart_rx_inst|bit_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|bit_cnt~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N18 +cycloneive_lcell_comb \uart_rx_inst|always8~0 ( +// Equation(s): +// \uart_rx_inst|always8~0_combout = (\uart_rx_inst|bit_flag~q & (\uart_rx_inst|always4~0_combout $ (!\uart_rx_inst|bit_cnt [3]))) + + .dataa(gnd), + .datab(\uart_rx_inst|always4~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(\uart_rx_inst|bit_cnt [3]), + .cin(gnd), + .combout(\uart_rx_inst|always8~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always8~0 .lut_mask = 16'hC030; +defparam \uart_rx_inst|always8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N15 +dffeas \uart_rx_inst|rx_data[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[7]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y23_N21 +dffeas \uart_rx_inst|rx_data[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_data [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N18 +cycloneive_lcell_comb \uart_rx_inst|rx_data[5]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[5]~feeder_combout = \uart_rx_inst|rx_data [6] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [6]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[5]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N19 +dffeas \uart_rx_inst|rx_data[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N0 +cycloneive_lcell_comb \uart_rx_inst|rx_data[4]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[4]~feeder_combout = \uart_rx_inst|rx_data [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [5]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[4]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N1 +dffeas \uart_rx_inst|rx_data[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N6 +cycloneive_lcell_comb \uart_rx_inst|rx_data[3]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[3]~feeder_combout = \uart_rx_inst|rx_data [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [4]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[3]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N7 +dffeas \uart_rx_inst|rx_data[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N28 +cycloneive_lcell_comb \uart_rx_inst|rx_data[2]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[2]~feeder_combout = \uart_rx_inst|rx_data [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [3]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[2]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N29 +dffeas \uart_rx_inst|rx_data[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N2 +cycloneive_lcell_comb \uart_rx_inst|rx_data[1]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[1]~feeder_combout = \uart_rx_inst|rx_data [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [2]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[1]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N3 +dffeas \uart_rx_inst|rx_data[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N24 +cycloneive_lcell_comb \uart_rx_inst|rx_data[0]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[0]~feeder_combout = \uart_rx_inst|rx_data [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [1]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[0]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N25 +dffeas \uart_rx_inst|rx_data[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N8 +cycloneive_lcell_comb \uart_rx_inst|po_data[0]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[0]~feeder_combout = \uart_rx_inst|rx_data [0] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [0]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[0]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N9 +dffeas \uart_rx_inst|po_data[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9]), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N10 +cycloneive_lcell_comb \uart_rx_inst|po_data[1]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[1]~feeder_combout = \uart_rx_inst|rx_data [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [1]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[1]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N11 +dffeas \uart_rx_inst|po_data[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N12 +cycloneive_lcell_comb \uart_rx_inst|po_data[2]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[2]~feeder_combout = \uart_rx_inst|rx_data [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [2]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[2]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N13 +dffeas \uart_rx_inst|po_data[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N30 +cycloneive_lcell_comb \uart_rx_inst|po_data[3]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[3]~feeder_combout = \uart_rx_inst|rx_data [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [3]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[3]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N31 +dffeas \uart_rx_inst|po_data[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N16 +cycloneive_lcell_comb \uart_rx_inst|po_data[4]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[4]~feeder_combout = \uart_rx_inst|rx_data [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [4]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[4]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N17 +dffeas \uart_rx_inst|po_data[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N26 +cycloneive_lcell_comb \uart_rx_inst|po_data[5]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[5]~feeder_combout = \uart_rx_inst|rx_data [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [5]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[5]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N27 +dffeas \uart_rx_inst|po_data[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N4 +cycloneive_lcell_comb \uart_rx_inst|po_data[6]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[6]~feeder_combout = \uart_rx_inst|rx_data [6] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [6]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[6]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N5 +dffeas \uart_rx_inst|po_data[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y23_N23 +dffeas \uart_rx_inst|po_data[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_data [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X12_Y23_N8 +cycloneive_lcell_comb \~GND ( +// Equation(s): +// \~GND~combout = GND + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\~GND~combout ), + .cout()); +// synopsys translate_off +defparam \~GND .lut_mask = 16'h0000; +defparam \~GND .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X13_Y23_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({\~GND~combout ,\uart_rx_inst|po_data [7],\uart_rx_inst|po_data [6],\uart_rx_inst|po_data [5],\uart_rx_inst|po_data [4],\uart_rx_inst|po_data [3],\uart_rx_inst|po_data [2],\uart_rx_inst|po_data [1],\uart_rx_inst|po_data [0]}), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:wr_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en .power_up = "low"; +// synopsys translate_on + +// Location: M9K_X13_Y21_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({gnd,gnd,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout }), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:wr_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_first_bit_number = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_first_bit_number = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: CLKCTRL_G5 +cycloneive_clkctrl \sys_clk~inputclkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\sys_clk~input_o }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\sys_clk~inputclkctrl_outclk )); +// synopsys translate_off +defparam \sys_clk~inputclkctrl .clock_type = "global clock"; +defparam \sys_clk~inputclkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N4 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[0]~13 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[0]~13_combout = (\uart_tx_inst|work_en~q & (\uart_tx_inst|baud_cnt [0] $ (VCC))) # (!\uart_tx_inst|work_en~q & (\uart_tx_inst|baud_cnt [0] & VCC)) +// \uart_tx_inst|baud_cnt[0]~14 = CARRY((\uart_tx_inst|work_en~q & \uart_tx_inst|baud_cnt [0])) + + .dataa(\uart_tx_inst|work_en~q ), + .datab(\uart_tx_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_tx_inst|baud_cnt[0]~13_combout ), + .cout(\uart_tx_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \uart_tx_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N26 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[11]~35 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[11]~35_combout = (\uart_tx_inst|baud_cnt [11] & (!\uart_tx_inst|baud_cnt[10]~34 )) # (!\uart_tx_inst|baud_cnt [11] & ((\uart_tx_inst|baud_cnt[10]~34 ) # (GND))) +// \uart_tx_inst|baud_cnt[11]~36 = CARRY((!\uart_tx_inst|baud_cnt[10]~34 ) # (!\uart_tx_inst|baud_cnt [11])) + + .dataa(\uart_tx_inst|baud_cnt [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[10]~34 ), + .combout(\uart_tx_inst|baud_cnt[11]~35_combout ), + .cout(\uart_tx_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[11]~35 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N27 +dffeas \uart_tx_inst|baud_cnt[11] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N0 +cycloneive_lcell_comb \uart_tx_inst|Equal1~0 ( +// Equation(s): +// \uart_tx_inst|Equal1~0_combout = (!\uart_tx_inst|baud_cnt [3] & (!\uart_tx_inst|baud_cnt [5] & (\uart_tx_inst|baud_cnt [0] & !\uart_tx_inst|baud_cnt [7]))) + + .dataa(\uart_tx_inst|baud_cnt [3]), + .datab(\uart_tx_inst|baud_cnt [5]), + .datac(\uart_tx_inst|baud_cnt [0]), + .datad(\uart_tx_inst|baud_cnt [7]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~0 .lut_mask = 16'h0010; +defparam \uart_tx_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N22 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[9]~31 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[9]~31_combout = (\uart_tx_inst|baud_cnt [9] & (!\uart_tx_inst|baud_cnt[8]~30 )) # (!\uart_tx_inst|baud_cnt [9] & ((\uart_tx_inst|baud_cnt[8]~30 ) # (GND))) +// \uart_tx_inst|baud_cnt[9]~32 = CARRY((!\uart_tx_inst|baud_cnt[8]~30 ) # (!\uart_tx_inst|baud_cnt [9])) + + .dataa(\uart_tx_inst|baud_cnt [9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[8]~30 ), + .combout(\uart_tx_inst|baud_cnt[9]~31_combout ), + .cout(\uart_tx_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[9]~31 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N23 +dffeas \uart_tx_inst|baud_cnt[9] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|Equal1~1 ( +// Equation(s): +// \uart_tx_inst|Equal1~1_combout = (!\uart_tx_inst|baud_cnt [8] & (!\uart_tx_inst|baud_cnt [11] & (\uart_tx_inst|Equal1~0_combout & !\uart_tx_inst|baud_cnt [9]))) + + .dataa(\uart_tx_inst|baud_cnt [8]), + .datab(\uart_tx_inst|baud_cnt [11]), + .datac(\uart_tx_inst|Equal1~0_combout ), + .datad(\uart_tx_inst|baud_cnt [9]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~1 .lut_mask = 16'h0010; +defparam \uart_tx_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[1]~15 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[1]~15_combout = (\uart_tx_inst|baud_cnt [1] & (!\uart_tx_inst|baud_cnt[0]~14 )) # (!\uart_tx_inst|baud_cnt [1] & ((\uart_tx_inst|baud_cnt[0]~14 ) # (GND))) +// \uart_tx_inst|baud_cnt[1]~16 = CARRY((!\uart_tx_inst|baud_cnt[0]~14 ) # (!\uart_tx_inst|baud_cnt [1])) + + .dataa(\uart_tx_inst|baud_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[0]~14 ), + .combout(\uart_tx_inst|baud_cnt[1]~15_combout ), + .cout(\uart_tx_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[1]~15 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N7 +dffeas \uart_tx_inst|baud_cnt[1] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N30 +cycloneive_lcell_comb \uart_tx_inst|Equal1~2 ( +// Equation(s): +// \uart_tx_inst|Equal1~2_combout = (\uart_tx_inst|baud_cnt [4] & (\uart_tx_inst|baud_cnt [6] & (\uart_tx_inst|baud_cnt [2] & \uart_tx_inst|baud_cnt [1]))) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(\uart_tx_inst|baud_cnt [2]), + .datad(\uart_tx_inst|baud_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~2 .lut_mask = 16'h8000; +defparam \uart_tx_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N19 +dffeas \fifo_read_inst|tx_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\fifo_read_inst|rd_en~q ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|tx_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|tx_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|tx_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|always3~0 ( +// Equation(s): +// \uart_tx_inst|always3~0_combout = (!\uart_tx_inst|work_en~q ) # (!\uart_tx_inst|bit_flag~q ) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(gnd), + .datac(\uart_tx_inst|work_en~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_tx_inst|always3~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always3~0 .lut_mask = 16'h5F5F; +defparam \uart_tx_inst|always3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N18 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[1]~2 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[1]~2_combout = (!\uart_tx_inst|always0~1_combout & (\uart_tx_inst|bit_cnt [1] $ (((\uart_tx_inst|bit_cnt [0] & !\uart_tx_inst|always3~0_combout ))))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [1]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[1]~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[1]~2 .lut_mask = 16'h00D2; +defparam \uart_tx_inst|bit_cnt[1]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N19 +dffeas \uart_tx_inst|bit_cnt[1] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[1]~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N4 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[2]~3 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[2]~3_combout = (!\uart_tx_inst|always0~1_combout & ((\uart_tx_inst|always3~0_combout & ((\uart_tx_inst|bit_cnt [2]))) # (!\uart_tx_inst|always3~0_combout & (\uart_tx_inst|Add1~0_combout )))) + + .dataa(\uart_tx_inst|Add1~0_combout ), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[2]~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[2]~3 .lut_mask = 16'h00E2; +defparam \uart_tx_inst|bit_cnt[2]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N5 +dffeas \uart_tx_inst|bit_cnt[2] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[2]~3_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|always0~1 ( +// Equation(s): +// \uart_tx_inst|always0~1_combout = (\uart_tx_inst|bit_cnt [0] & (!\uart_tx_inst|bit_cnt [1] & (!\uart_tx_inst|bit_cnt [2] & \uart_tx_inst|always0~0_combout ))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [1]), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|always0~0_combout ), + .cin(gnd), + .combout(\uart_tx_inst|always0~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always0~1 .lut_mask = 16'h0200; +defparam \uart_tx_inst|always0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N18 +cycloneive_lcell_comb \uart_tx_inst|work_en~0 ( +// Equation(s): +// \uart_tx_inst|work_en~0_combout = (\fifo_read_inst|tx_flag~q ) # ((\uart_tx_inst|work_en~q & !\uart_tx_inst|always0~1_combout )) + + .dataa(gnd), + .datab(\uart_tx_inst|work_en~q ), + .datac(\fifo_read_inst|tx_flag~q ), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|work_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|work_en~0 .lut_mask = 16'hF0FC; +defparam \uart_tx_inst|work_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N25 +dffeas \uart_tx_inst|work_en ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(gnd), + .asdata(\uart_tx_inst|work_en~0_combout ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|work_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|work_en .is_wysiwyg = "true"; +defparam \uart_tx_inst|work_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|always1~0 ( +// Equation(s): +// \uart_tx_inst|always1~0_combout = ((\uart_tx_inst|Equal1~3_combout & (\uart_tx_inst|Equal1~1_combout & \uart_tx_inst|Equal1~2_combout ))) # (!\uart_tx_inst|work_en~q ) + + .dataa(\uart_tx_inst|Equal1~3_combout ), + .datab(\uart_tx_inst|Equal1~1_combout ), + .datac(\uart_tx_inst|Equal1~2_combout ), + .datad(\uart_tx_inst|work_en~q ), + .cin(gnd), + .combout(\uart_tx_inst|always1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always1~0 .lut_mask = 16'h80FF; +defparam \uart_tx_inst|always1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y18_N5 +dffeas \uart_tx_inst|baud_cnt[0] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N8 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[2]~17 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[2]~17_combout = (\uart_tx_inst|baud_cnt [2] & (\uart_tx_inst|baud_cnt[1]~16 $ (GND))) # (!\uart_tx_inst|baud_cnt [2] & (!\uart_tx_inst|baud_cnt[1]~16 & VCC)) +// \uart_tx_inst|baud_cnt[2]~18 = CARRY((\uart_tx_inst|baud_cnt [2] & !\uart_tx_inst|baud_cnt[1]~16 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[1]~16 ), + .combout(\uart_tx_inst|baud_cnt[2]~17_combout ), + .cout(\uart_tx_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[2]~17 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N9 +dffeas \uart_tx_inst|baud_cnt[2] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N14 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[5]~23 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[5]~23_combout = (\uart_tx_inst|baud_cnt [5] & (!\uart_tx_inst|baud_cnt[4]~22 )) # (!\uart_tx_inst|baud_cnt [5] & ((\uart_tx_inst|baud_cnt[4]~22 ) # (GND))) +// \uart_tx_inst|baud_cnt[5]~24 = CARRY((!\uart_tx_inst|baud_cnt[4]~22 ) # (!\uart_tx_inst|baud_cnt [5])) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [5]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[4]~22 ), + .combout(\uart_tx_inst|baud_cnt[5]~23_combout ), + .cout(\uart_tx_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[5]~23 .lut_mask = 16'h3C3F; +defparam \uart_tx_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N15 +dffeas \uart_tx_inst|baud_cnt[5] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N16 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[6]~25 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[6]~25_combout = (\uart_tx_inst|baud_cnt [6] & (\uart_tx_inst|baud_cnt[5]~24 $ (GND))) # (!\uart_tx_inst|baud_cnt [6] & (!\uart_tx_inst|baud_cnt[5]~24 & VCC)) +// \uart_tx_inst|baud_cnt[6]~26 = CARRY((\uart_tx_inst|baud_cnt [6] & !\uart_tx_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[5]~24 ), + .combout(\uart_tx_inst|baud_cnt[6]~25_combout ), + .cout(\uart_tx_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N17 +dffeas \uart_tx_inst|baud_cnt[6] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N18 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[7]~27 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[7]~27_combout = (\uart_tx_inst|baud_cnt [7] & (!\uart_tx_inst|baud_cnt[6]~26 )) # (!\uart_tx_inst|baud_cnt [7] & ((\uart_tx_inst|baud_cnt[6]~26 ) # (GND))) +// \uart_tx_inst|baud_cnt[7]~28 = CARRY((!\uart_tx_inst|baud_cnt[6]~26 ) # (!\uart_tx_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[6]~26 ), + .combout(\uart_tx_inst|baud_cnt[7]~27_combout ), + .cout(\uart_tx_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \uart_tx_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N19 +dffeas \uart_tx_inst|baud_cnt[7] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N20 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[8]~29 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[8]~29_combout = (\uart_tx_inst|baud_cnt [8] & (\uart_tx_inst|baud_cnt[7]~28 $ (GND))) # (!\uart_tx_inst|baud_cnt [8] & (!\uart_tx_inst|baud_cnt[7]~28 & VCC)) +// \uart_tx_inst|baud_cnt[8]~30 = CARRY((\uart_tx_inst|baud_cnt [8] & !\uart_tx_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[7]~28 ), + .combout(\uart_tx_inst|baud_cnt[8]~29_combout ), + .cout(\uart_tx_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N21 +dffeas \uart_tx_inst|baud_cnt[8] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[10]~33 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[10]~33_combout = (\uart_tx_inst|baud_cnt [10] & (\uart_tx_inst|baud_cnt[9]~32 $ (GND))) # (!\uart_tx_inst|baud_cnt [10] & (!\uart_tx_inst|baud_cnt[9]~32 & VCC)) +// \uart_tx_inst|baud_cnt[10]~34 = CARRY((\uart_tx_inst|baud_cnt [10] & !\uart_tx_inst|baud_cnt[9]~32 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [10]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[9]~32 ), + .combout(\uart_tx_inst|baud_cnt[10]~33_combout ), + .cout(\uart_tx_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[10]~33 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N25 +dffeas \uart_tx_inst|baud_cnt[10] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N28 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[12]~37 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[12]~37_combout = \uart_tx_inst|baud_cnt[11]~36 $ (!\uart_tx_inst|baud_cnt [12]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_tx_inst|baud_cnt [12]), + .cin(\uart_tx_inst|baud_cnt[11]~36 ), + .combout(\uart_tx_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[12]~37 .lut_mask = 16'hF00F; +defparam \uart_tx_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N29 +dffeas \uart_tx_inst|baud_cnt[12] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|Equal2~0 ( +// Equation(s): +// \uart_tx_inst|Equal2~0_combout = (!\uart_tx_inst|baud_cnt [4] & (!\uart_tx_inst|baud_cnt [6] & (!\uart_tx_inst|baud_cnt [2] & !\uart_tx_inst|baud_cnt [1]))) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(\uart_tx_inst|baud_cnt [2]), + .datad(\uart_tx_inst|baud_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal2~0 .lut_mask = 16'h0001; +defparam \uart_tx_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|Equal2~1 ( +// Equation(s): +// \uart_tx_inst|Equal2~1_combout = (\uart_tx_inst|Equal1~1_combout & (!\uart_tx_inst|baud_cnt [12] & (\uart_tx_inst|Equal2~0_combout & !\uart_tx_inst|baud_cnt [10]))) + + .dataa(\uart_tx_inst|Equal1~1_combout ), + .datab(\uart_tx_inst|baud_cnt [12]), + .datac(\uart_tx_inst|Equal2~0_combout ), + .datad(\uart_tx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_tx_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal2~1 .lut_mask = 16'h0020; +defparam \uart_tx_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y18_N25 +dffeas \uart_tx_inst|bit_flag ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|Equal2~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_flag .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N28 +cycloneive_lcell_comb \uart_tx_inst|always0~0 ( +// Equation(s): +// \uart_tx_inst|always0~0_combout = (\uart_tx_inst|bit_cnt [3] & \uart_tx_inst|bit_flag~q ) + + .dataa(\uart_tx_inst|bit_cnt [3]), + .datab(gnd), + .datac(\uart_tx_inst|bit_flag~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_tx_inst|always0~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always0~0 .lut_mask = 16'hA0A0; +defparam \uart_tx_inst|always0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N30 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & \fifo_read_inst|rd_en~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq .lut_mask = 16'hAA00; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N8 +cycloneive_io_ibuf \sdram_dq[0]~input ( + .i(sdram_dq[0]), + .ibar(gnd), + .o(\sdram_dq[0]~input_o )); +// synopsys translate_off +defparam \sdram_dq[0]~input .bus_hold = "false"; +defparam \sdram_dq[0]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[0]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N1 +cycloneive_io_ibuf \sdram_dq[1]~input ( + .i(sdram_dq[1]), + .ibar(gnd), + .o(\sdram_dq[1]~input_o )); +// synopsys translate_off +defparam \sdram_dq[1]~input .bus_hold = "false"; +defparam \sdram_dq[1]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[1]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X9_Y29_N1 +cycloneive_io_ibuf \sdram_dq[2]~input ( + .i(sdram_dq[2]), + .ibar(gnd), + .o(\sdram_dq[2]~input_o )); +// synopsys translate_off +defparam \sdram_dq[2]~input .bus_hold = "false"; +defparam \sdram_dq[2]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[2]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X14_Y29_N29 +cycloneive_io_ibuf \sdram_dq[3]~input ( + .i(sdram_dq[3]), + .ibar(gnd), + .o(\sdram_dq[3]~input_o )); +// synopsys translate_off +defparam \sdram_dq[3]~input .bus_hold = "false"; +defparam \sdram_dq[3]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[3]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X14_Y29_N22 +cycloneive_io_ibuf \sdram_dq[4]~input ( + .i(sdram_dq[4]), + .ibar(gnd), + .o(\sdram_dq[4]~input_o )); +// synopsys translate_off +defparam \sdram_dq[4]~input .bus_hold = "false"; +defparam \sdram_dq[4]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[4]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X9_Y29_N8 +cycloneive_io_ibuf \sdram_dq[5]~input ( + .i(sdram_dq[5]), + .ibar(gnd), + .o(\sdram_dq[5]~input_o )); +// synopsys translate_off +defparam \sdram_dq[5]~input .bus_hold = "false"; +defparam \sdram_dq[5]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[5]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N15 +cycloneive_io_ibuf \sdram_dq[6]~input ( + .i(sdram_dq[6]), + .ibar(gnd), + .o(\sdram_dq[6]~input_o )); +// synopsys translate_off +defparam \sdram_dq[6]~input .bus_hold = "false"; +defparam \sdram_dq[6]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[6]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N22 +cycloneive_io_ibuf \sdram_dq[7]~input ( + .i(sdram_dq[7]), + .ibar(gnd), + .o(\sdram_dq[7]~input_o )); +// synopsys translate_off +defparam \sdram_dq[7]~input .bus_hold = "false"; +defparam \sdram_dq[7]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[7]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X25_Y25_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({gnd,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout , +\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout , +\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout }), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:rd_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0] $ (VCC) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 .lut_mask = 16'h55AA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N7 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N8 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N9 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0] $ (VCC) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 .lut_mask = 16'h55AA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N27 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N28 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 .lut_mask = 16'h0FF0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N29 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N14 +cycloneive_lcell_comb \uart_tx_inst|tx~4 ( +// Equation(s): +// \uart_tx_inst|tx~4_combout = (\uart_tx_inst|bit_cnt [0]) # ((\uart_tx_inst|bit_cnt [2]) # ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7]) # (\uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~4_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~4 .lut_mask = 16'hFFFE; +defparam \uart_tx_inst|tx~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N8 +cycloneive_lcell_comb \uart_tx_inst|tx~3 ( +// Equation(s): +// \uart_tx_inst|tx~3_combout = (!\uart_tx_inst|bit_flag~q & !\uart_tx_inst|tx~q ) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(gnd), + .datac(gnd), + .datad(\uart_tx_inst|tx~q ), + .cin(gnd), + .combout(\uart_tx_inst|tx~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~3 .lut_mask = 16'h0055; +defparam \uart_tx_inst|tx~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N0 +cycloneive_lcell_comb \uart_tx_inst|tx~5 ( +// Equation(s): +// \uart_tx_inst|tx~5_combout = (!\uart_tx_inst|tx~2_combout & (!\uart_tx_inst|tx~3_combout & ((!\uart_tx_inst|tx~4_combout ) # (!\uart_tx_inst|always0~0_combout )))) + + .dataa(\uart_tx_inst|tx~2_combout ), + .datab(\uart_tx_inst|always0~0_combout ), + .datac(\uart_tx_inst|tx~4_combout ), + .datad(\uart_tx_inst|tx~3_combout ), + .cin(gnd), + .combout(\uart_tx_inst|tx~5_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~5 .lut_mask = 16'h0015; +defparam \uart_tx_inst|tx~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N1 +dffeas \uart_tx_inst|tx ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|tx~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|tx~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|tx .is_wysiwyg = "true"; +defparam \uart_tx_inst|tx .power_up = "low"; +// synopsys translate_on + +// Location: CLKCTRL_G7 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [2]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: FF_X23_Y22_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 .lut_mask = 16'hF0FC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 .lut_mask = 16'hBAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 .lut_mask = 16'h4000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 .lut_mask = 16'hFF20; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 .lut_mask = 16'h8C9D; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1])))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 .lut_mask = 16'h5F22; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 .lut_mask = 16'h00CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 .lut_mask = 16'hFFEE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 .lut_mask = 16'hA1AB; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]))))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 .lut_mask = 16'h5F30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 .lut_mask = 16'h5554; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 .lut_mask = 16'hAAA0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 .lut_mask = 16'h1ABA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 .lut_mask = 16'h4055; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 .lut_mask = 16'hF0FF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 .lut_mask = 16'h3C00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 .lut_mask = 16'h7800; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 .lut_mask = 16'h0002; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS .power_up = "low"; +// synopsys translate_on + +// Location: FF_X21_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 .lut_mask = 16'h55CF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 .lut_mask = 16'hF7F2; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 .lut_mask = 16'h4CCC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0] & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (((!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 .lut_mask = 16'h0777; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 .lut_mask = 16'h0101; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 .lut_mask = 16'h2022; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 .lut_mask = 16'h4400; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 .lut_mask = 16'h5053; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 .lut_mask = 16'h008F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10])))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 .lut_mask = 16'h0FDD; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 .lut_mask = 16'hDFCE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y20_N8 +cycloneive_io_ibuf \sdram_dq[8]~input ( + .i(sdram_dq[8]), + .ibar(gnd), + .o(\sdram_dq[8]~input_o )); +// synopsys translate_off +defparam \sdram_dq[8]~input .bus_hold = "false"; +defparam \sdram_dq[8]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X3_Y29_N29 +cycloneive_io_ibuf \sdram_dq[9]~input ( + .i(sdram_dq[9]), + .ibar(gnd), + .o(\sdram_dq[9]~input_o )); +// synopsys translate_off +defparam \sdram_dq[9]~input .bus_hold = "false"; +defparam \sdram_dq[9]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y25_N1 +cycloneive_io_ibuf \sdram_dq[10]~input ( + .i(sdram_dq[10]), + .ibar(gnd), + .o(\sdram_dq[10]~input_o )); +// synopsys translate_off +defparam \sdram_dq[10]~input .bus_hold = "false"; +defparam \sdram_dq[10]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y26_N8 +cycloneive_io_ibuf \sdram_dq[11]~input ( + .i(sdram_dq[11]), + .ibar(gnd), + .o(\sdram_dq[11]~input_o )); +// synopsys translate_off +defparam \sdram_dq[11]~input .bus_hold = "false"; +defparam \sdram_dq[11]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y23_N8 +cycloneive_io_ibuf \sdram_dq[12]~input ( + .i(sdram_dq[12]), + .ibar(gnd), + .o(\sdram_dq[12]~input_o )); +// synopsys translate_off +defparam \sdram_dq[12]~input .bus_hold = "false"; +defparam \sdram_dq[12]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N8 +cycloneive_io_ibuf \sdram_dq[13]~input ( + .i(sdram_dq[13]), + .ibar(gnd), + .o(\sdram_dq[13]~input_o )); +// synopsys translate_off +defparam \sdram_dq[13]~input .bus_hold = "false"; +defparam \sdram_dq[13]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N22 +cycloneive_io_ibuf \sdram_dq[14]~input ( + .i(sdram_dq[14]), + .ibar(gnd), + .o(\sdram_dq[14]~input_o )); +// synopsys translate_off +defparam \sdram_dq[14]~input .bus_hold = "false"; +defparam \sdram_dq[14]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N1 +cycloneive_io_ibuf \sdram_dq[15]~input ( + .i(sdram_dq[15]), + .ibar(gnd), + .o(\sdram_dq[15]~input_o )); +// synopsys translate_off +defparam \sdram_dq[15]~input .bus_hold = "false"; +defparam \sdram_dq[15]~input .simulate_z_as = "z"; +// synopsys translate_on + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_0c_v_slow.sdo b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_0c_v_slow.sdo new file mode 100644 index 0000000..dd3ba87 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_0c_v_slow.sdo @@ -0,0 +1,19618 @@ +// Copyright (C) 1991-2013 Altera Corporation +// Your use of Altera Corporation's design tools, logic functions +// and other software and tools, and its AMPP partner logic +// functions, and any output files from any of the foregoing +// (including device programming or simulation files), and any +// associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License +// Subscription Agreement, Altera MegaCore Function License +// Agreement, or other applicable license agreement, including, +// without limitation, that your use is for the sole purpose of +// programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the +// applicable agreement for further details. + + +// +// Device: Altera EP4CE15F23C8 Package FBGA484 +// + +// +// This file contains Slow Corner delays for the design using part EP4CE15F23C8, +// with speed grade 8, core voltage 1.2V, and temperature 0 Celsius +// + +// +// This SDF file should be used for ModelSim (Verilog) only +// + +(DELAYFILE + (SDFVERSION "2.1") + (DESIGN "uart_sdram") + (DATE "06/02/2023 04:26:31") + (VENDOR "Altera") + (PROGRAM "Quartus II 64-Bit") + (VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version") + (DIVIDER .) + (TIMESCALE 1 ps) + + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1631:1631:1631) (1432:1432:1432)) + (PORT d[1] (1572:1572:1572) (1374:1374:1374)) + (PORT d[2] (1676:1676:1676) (1456:1456:1456)) + (PORT d[3] (1662:1662:1662) (1450:1450:1450)) + (PORT d[4] (1610:1610:1610) (1406:1406:1406)) + (PORT d[5] (1604:1604:1604) (1406:1406:1406)) + (PORT d[6] (1672:1672:1672) (1451:1451:1451)) + (PORT d[7] (1636:1636:1636) (1431:1431:1431)) + (PORT clk (2026:2026:2026) (2067:2067:2067)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1255:1255:1255) (1153:1153:1153)) + (PORT d[1] (1332:1332:1332) (1213:1213:1213)) + (PORT d[2] (946:946:946) (891:891:891)) + (PORT d[3] (1185:1185:1185) (1064:1064:1064)) + (PORT d[4] (984:984:984) (918:918:918)) + (PORT d[5] (933:933:933) (879:879:879)) + (PORT d[6] (1224:1224:1224) (1094:1094:1094)) + (PORT d[7] (1288:1288:1288) (1179:1179:1179)) + (PORT d[8] (944:944:944) (892:892:892)) + (PORT d[9] (940:940:940) (887:887:887)) + (PORT clk (2023:2023:2023) (2063:2063:2063)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1956:1956:1956) (1705:1705:1705)) + (PORT clk (2023:2023:2023) (2063:2063:2063)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2026:2026:2026) (2067:2067:2067)) + (PORT d[0] (2578:2578:2578) (2337:2337:2337)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2027:2027:2027) (2068:2068:2068)) + (IOPATH (posedge clk) pulse (0:0:0) (2490:2490:2490)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2027:2027:2027) (2068:2068:2068)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2027:2027:2027) (2068:2068:2068)) + (IOPATH (posedge clk) pulse (0:0:0) (3129:3129:3129)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2027:2027:2027) (2068:2068:2068)) + (IOPATH (posedge clk) pulse (0:0:0) (3129:3129:3129)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (956:956:956) (893:893:893)) + (PORT d[1] (944:944:944) (867:867:867)) + (PORT d[2] (1331:1331:1331) (1200:1200:1200)) + (PORT d[3] (1682:1682:1682) (1474:1474:1474)) + (PORT d[4] (938:938:938) (880:880:880)) + (PORT d[5] (1702:1702:1702) (1596:1596:1596)) + (PORT d[6] (1692:1692:1692) (1502:1502:1502)) + (PORT d[7] (1279:1279:1279) (1173:1173:1173)) + (PORT d[8] (972:972:972) (899:899:899)) + (PORT d[9] (1434:1434:1434) (1235:1235:1235)) + (PORT clk (1979:1979:1979) (1975:1975:1975)) + (PORT ena (2420:2420:2420) (2187:2187:2187)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + (HOLD ena (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (1979:1979:1979) (1975:1975:1975)) + (PORT d[0] (2420:2420:2420) (2187:2187:2187)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1980:1980:1980) (1976:1976:1976)) + (IOPATH (posedge clk) pulse (0:0:0) (2957:2957:2957)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1980:1980:1980) (1976:1976:1976)) + (IOPATH (posedge clk) pulse (0:0:0) (3162:3162:3162)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1980:1980:1980) (1976:1976:1976)) + (IOPATH (posedge clk) pulse (0:0:0) (3162:3162:3162)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (835:835:835) (733:733:733)) + (PORT datab (525:525:525) (500:500:500)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~14) + (DELAY + (ABSOLUTE + (PORT dataa (958:958:958) (852:852:852)) + (PORT datab (979:979:979) (875:875:875)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1561:1561:1561) (1394:1394:1394)) + (PORT datab (528:528:528) (509:509:509)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~16) + (DELAY + (ABSOLUTE + (PORT dataa (522:522:522) (508:508:508)) + (PORT datab (852:852:852) (738:738:738)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (417:417:417)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (392:392:392)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (348:348:348) (419:419:419)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (393:393:393)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT dataa (330:330:330) (393:393:393)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (339:339:339) (406:406:406)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (607:607:607) (558:558:558)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~0) + (DELAY + (ABSOLUTE + (PORT datab (843:843:843) (754:754:754)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (341:341:341) (401:401:401)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~12) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~26) + (DELAY + (ABSOLUTE + (PORT dataa (330:330:330) (392:392:392)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT dataa (558:558:558) (544:544:544)) + (PORT datab (945:945:945) (829:829:829)) + (IOPATH dataa combout (420:420:420) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT dataa (338:338:338) (406:406:406)) + (PORT datab (944:944:944) (828:828:828)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT dataa (349:349:349) (412:412:412)) + (PORT datab (944:944:944) (827:827:827)) + (IOPATH dataa combout (420:420:420) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT dataa (559:559:559) (537:537:537)) + (PORT datab (943:943:943) (827:827:827)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT dataa (566:566:566) (549:549:549)) + (PORT datab (942:942:942) (825:825:825)) + (IOPATH dataa combout (420:420:420) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT dataa (557:557:557) (548:548:548)) + (PORT datab (942:942:942) (825:825:825)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT dataa (820:820:820) (728:728:728)) + (PORT datab (941:941:941) (824:824:824)) + (IOPATH dataa combout (420:420:420) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (337:337:337) (401:401:401)) + (PORT datab (941:941:941) (823:823:823)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (397:397:397)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~4) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (392:392:392)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5204:5204:5204) (5163:5163:5163)) + (PORT sclr (1582:1582:1582) (1567:1567:1567)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[15\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[16\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[17\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[18\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[19\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[20\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[21\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[22\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[23\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5169:5169:5169)) + (PORT sclr (1532:1532:1532) (1524:1524:1524)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~0) + (DELAY + (ABSOLUTE + (PORT datab (529:529:529) (511:511:511)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (603:603:603) (552:552:552)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~4) + (DELAY + (ABSOLUTE + (PORT datab (547:547:547) (522:522:522)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~6) + (DELAY + (ABSOLUTE + (PORT datab (540:540:540) (521:521:521)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~8) + (DELAY + (ABSOLUTE + (PORT dataa (555:555:555) (533:533:533)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~10) + (DELAY + (ABSOLUTE + (PORT dataa (551:551:551) (533:533:533)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~12) + (DELAY + (ABSOLUTE + (PORT dataa (606:606:606) (558:558:558)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~14) + (DELAY + (ABSOLUTE + (PORT dataa (605:605:605) (556:556:556)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~16) + (DELAY + (ABSOLUTE + (PORT dataa (912:912:912) (841:841:841)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~18) + (DELAY + (ABSOLUTE + (PORT datab (985:985:985) (873:873:873)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~20) + (DELAY + (ABSOLUTE + (PORT dataa (946:946:946) (855:855:855)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~22) + (DELAY + (ABSOLUTE + (PORT datab (889:889:889) (813:813:813)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~24) + (DELAY + (ABSOLUTE + (PORT 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(IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[15\]\~54) + (DELAY + (ABSOLUTE + (PORT dataa (328:328:328) (390:390:390)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[16\]\~56) + (DELAY + (ABSOLUTE + (PORT datab (325:325:325) (381:381:381)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[17\]\~58) + (DELAY + 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(posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4943:4943:4943) (4875:4875:4875)) + (PORT sclr (867:867:867) (924:924:924)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4943:4943:4943) (4875:4875:4875)) + (PORT sclr (867:867:867) (924:924:924)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4943:4943:4943) (4875:4875:4875)) + (PORT sclr (867:867:867) (924:924:924)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4943:4943:4943) (4875:4875:4875)) + (PORT sclr (867:867:867) (924:924:924)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4943:4943:4943) (4875:4875:4875)) + (PORT sclr (867:867:867) (924:924:924)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4943:4943:4943) (4875:4875:4875)) + (PORT sclr (867:867:867) (924:924:924)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4943:4943:4943) (4875:4875:4875)) + (PORT sclr (867:867:867) (924:924:924)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4943:4943:4943) (4875:4875:4875)) + (PORT sclr (867:867:867) (924:924:924)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4943:4943:4943) (4875:4875:4875)) + (PORT sclr (867:867:867) (924:924:924)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (328:328:328) (391:391:391)) + (PORT datab (354:354:354) (421:421:421)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~4) + (DELAY + (ABSOLUTE + (PORT datab (323:323:323) (381:381:381)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~6) + (DELAY + (ABSOLUTE + (PORT datad (306:306:306) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (882:882:882) (788:788:788)) + (PORT datab (322:322:322) (379:379:379)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT datab (324:324:324) (381:381:381)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (324:324:324) (381:381:381)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (328:328:328) (391:391:391)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT datab (325:325:325) (382:382:382)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT dataa (327:327:327) (389:389:389)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT dataa (330:330:330) (393:393:393)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (327:327:327) (384:384:384)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (326:326:326) (383:383:383)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT datab (329:329:329) (386:386:386)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (338:338:338) (405:405:405)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT asdata (1590:1590:1590) (1467:1467:1467)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1157:1157:1157) (966:966:966)) + (PORT datab (1146:1146:1146) (972:972:972)) + (PORT datad (275:275:275) (329:329:329)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (415:415:415) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1667:1667:1667) (1686:1686:1686)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4540:4540:4540) (4423:4423:4423)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Mux0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (761:761:761) (628:628:628)) + (PORT datab (386:386:386) (458:458:458)) + (PORT datac (759:759:759) (622:622:622)) + (PORT datad (340:340:340) (425:425:425)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Mux0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (963:963:963) (812:812:812)) + (PORT datab (897:897:897) (781:781:781)) + (PORT datac (1118:1118:1118) (953:953:953)) + (PORT datad (1233:1233:1233) (1105:1105:1105)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~0) + (DELAY + (ABSOLUTE + (PORT dataa (384:384:384) (473:473:473)) + (PORT datab (867:867:867) (688:688:688)) + (PORT datac (1434:1434:1434) (1216:1216:1216)) + (PORT datad (344:344:344) (420:420:420)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~1) + (DELAY + (ABSOLUTE + (PORT dataa (384:384:384) (473:473:473)) + (PORT datab (268:268:268) (275:275:275)) + (PORT datac (752:752:752) (612:612:612)) + (PORT datad (345:345:345) (422:422:422)) + (IOPATH dataa combout (350:350:350) (371:371:371)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~2) + (DELAY + (ABSOLUTE + (PORT dataa (905:905:905) (843:843:843)) + (PORT datab (355:355:355) (421:421:421)) + (PORT datac (1082:1082:1082) (891:891:891)) + (PORT datad (228:228:228) (235:235:235)) + (IOPATH dataa combout (394:394:394) (400:400:400)) + (IOPATH datab combout (400:400:400) (391:391:391)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1667:1667:1667) (1686:1686:1686)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4540:4540:4540) (4423:4423:4423)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (321:321:321) (380:380:380)) + (PORT datab (624:624:624) (588:588:588)) + (PORT datac (1189:1189:1189) (1066:1066:1066)) + (PORT datad (319:319:319) (392:392:392)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\~0) + (DELAY + (ABSOLUTE + (PORT datac (502:502:502) (492:492:492)) + (PORT datad (521:521:521) (503:503:503)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|WideOr5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1699:1699:1699) (1456:1456:1456)) + (PORT datad (1586:1586:1586) (1388:1388:1388)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (447:447:447)) + (PORT datab (350:350:350) (408:408:408)) + (PORT datac (233:233:233) (251:251:251)) + (PORT datad (956:956:956) (879:879:879)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (404:404:404)) + (PORT datab (391:391:391) (463:463:463)) + (PORT datac (859:859:859) (806:806:806)) + (PORT datad (1105:1105:1105) (964:964:964)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector21\~0) + (DELAY + (ABSOLUTE + (PORT dataa (372:372:372) (445:445:445)) + (PORT datab (276:276:276) (286:286:286)) + (PORT datac (305:305:305) (372:372:372)) + (PORT datad (300:300:300) (356:356:356)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (386:386:386) (475:475:475)) + (PORT datac (311:311:311) (386:386:386)) + (PORT datad (344:344:344) (420:420:420)) + (IOPATH dataa combout (375:375:375) (392:392:392)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Add1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (387:387:387) (477:477:477)) + (PORT datab (357:357:357) (424:424:424)) + (PORT datac (284:284:284) (351:351:351)) + (PORT datad (343:343:343) (419:419:419)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[3\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (270:270:270) (282:282:282)) + (PORT datab (284:284:284) (296:296:296)) + (PORT datad (276:276:276) (294:294:294)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT ena (968:968:968) (936:936:936)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (417:417:417)) + (PORT datab (349:349:349) (407:407:407)) + (PORT datac (307:307:307) (374:374:374)) + (PORT datad (309:309:309) (370:370:370)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1655:1655:1655) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1655:1655:1655) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE read_valid) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4924:4924:4924) (4848:4848:4848)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~0) + (DELAY + (ABSOLUTE + (PORT datac (234:234:234) (252:252:252)) + (PORT datad (235:235:235) (246:246:246)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1552:1552:1552) (1398:1398:1398)) + (PORT datab (971:971:971) (880:880:880)) + (PORT datac (224:224:224) (239:239:239)) + (PORT datad (236:236:236) (248:248:248)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TMRD) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1634:1634:1634)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.IDLE\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1231:1231:1231) (1103:1103:1103)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1674:1674:1674)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1639:1639:1639)) + (PORT ena (1012:1012:1012) (982:982:982)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~3) + (DELAY + (ABSOLUTE + (PORT datab (907:907:907) (845:845:845)) + (PORT datad (935:935:935) (845:845:845)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1680:1680:1680)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (1532:1532:1532) (1370:1370:1370)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~0) + (DELAY + (ABSOLUTE + (PORT dataa (558:558:558) (542:542:542)) + (PORT datab (557:557:557) (544:544:544)) + (PORT datac (883:883:883) (812:812:812)) + (PORT datad (883:883:883) (834:834:834)) + (IOPATH dataa combout (394:394:394) (400:400:400)) + (IOPATH datab combout (400:400:400) (391:391:391)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1680:1680:1680)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (1532:1532:1532) (1370:1370:1370)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1680:1680:1680)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (1532:1532:1532) (1370:1370:1370)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1680:1680:1680)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (1532:1532:1532) (1370:1370:1370)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1680:1680:1680)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (1532:1532:1532) (1370:1370:1370)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~1) + (DELAY + (ABSOLUTE + (PORT dataa (567:567:567) (550:550:550)) + (PORT datab (349:349:349) (407:407:407)) + (PORT datac (294:294:294) (364:364:364)) + (PORT datad (307:307:307) (366:366:366)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1680:1680:1680)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (1532:1532:1532) (1370:1370:1370)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1680:1680:1680)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (1532:1532:1532) (1370:1370:1370)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1680:1680:1680)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (1532:1532:1532) (1370:1370:1370)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~2) + (DELAY + (ABSOLUTE + (PORT dataa (339:339:339) (406:406:406)) + (PORT datab (348:348:348) (406:406:406)) + (PORT datac (298:298:298) (362:362:362)) + (PORT datad (308:308:308) (369:369:369)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~3) + (DELAY + (ABSOLUTE + (PORT dataa (823:823:823) (702:702:702)) + (PORT datab (854:854:854) (716:716:716)) + (PORT datac (910:910:910) (832:832:832)) + (PORT datad (228:228:228) (236:236:236)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5193:5193:5193)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (560:560:560) (543:543:543)) + (PORT datab (347:347:347) (405:405:405)) + (PORT datac (291:291:291) (360:360:360)) + (PORT datad (304:304:304) (363:363:363)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (337:337:337) (404:404:404)) + (PORT datab (270:270:270) (278:278:278)) + (PORT datac (305:305:305) (372:372:372)) + (PORT datad (300:300:300) (355:355:355)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (326:326:326) (388:388:388)) + (PORT datac (927:927:927) (857:857:857)) + (PORT datad (1243:1243:1243) (1125:1125:1125)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~2) + (DELAY + (ABSOLUTE + (PORT datac (441:441:441) (389:389:389)) + (PORT datad (294:294:294) (322:322:322)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT asdata (922:922:922) (926:926:926)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (294:294:294) (363:363:363)) + (PORT datad (830:830:830) (720:720:720)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1655:1655:1655) (1673:1673:1673)) + (PORT asdata (1611:1611:1611) (1520:1520:1520)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (333:333:333) (397:397:397)) + (PORT datac (293:293:293) (362:362:362)) + (PORT datad (828:828:828) (719:719:719)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (1281:1281:1281) (1163:1163:1163)) + (PORT datab (1304:1304:1304) (1167:1167:1167)) + (PORT datac (1246:1246:1246) (1145:1145:1145)) + (PORT datad (242:242:242) (255:255:255)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datab (1269:1269:1269) (1163:1163:1163)) + (PORT datac (228:228:228) (243:243:243)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (919:919:919) (870:870:870)) + (PORT datab (950:950:950) (807:807:807)) + (PORT datad (935:935:935) (872:872:872)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datab (952:952:952) (809:809:809)) + (PORT datad (936:936:936) (873:873:873)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datab (337:337:337) (398:398:398)) + (PORT datac (299:299:299) (363:363:363)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT dataa (579:579:579) (565:565:565)) + (PORT datac (331:331:331) (399:399:399)) + (PORT datad (317:317:317) (380:380:380)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (1302:1302:1302) (1134:1134:1134)) + (PORT datac (314:314:314) (389:389:389)) + (PORT datad (244:244:244) (258:258:258)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (493:493:493) (495:495:495)) + (PORT datad (821:821:821) (704:704:704)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (933:933:933) (859:859:859)) + (PORT datab (923:923:923) (836:836:836)) + (PORT datac (495:495:495) (428:428:428)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT asdata (1652:1652:1652) (1518:1518:1518)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (PORT ena (1955:1955:1955) (1752:1752:1752)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (225:225:225) (240:240:240)) + (PORT datad (827:827:827) (767:767:767)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datac (315:315:315) (390:390:390)) + (PORT datad (245:245:245) (258:258:258)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT datab (327:327:327) (385:385:385)) + (PORT datac (295:295:295) (365:365:365)) + (PORT datad (510:510:510) (497:497:497)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datac (295:295:295) (364:364:364)) + (PORT datad (509:509:509) (497:497:497)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[15\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (PORT datab (340:340:340) (395:395:395)) + (PORT datac (298:298:298) (361:361:361)) + (PORT datad (299:299:299) (354:354:354)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4924:4924:4924) (4848:4848:4848)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4924:4924:4924) (4848:4848:4848)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4924:4924:4924) (4848:4848:4848)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4924:4924:4924) (4848:4848:4848)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (341:341:341) (401:401:401)) + (PORT datab (338:338:338) (394:394:394)) + (PORT datac (297:297:297) (360:360:360)) + (PORT datad (491:491:491) (481:481:481)) + (IOPATH dataa combout (392:392:392) (419:419:419)) + (IOPATH datab combout (393:393:393) (431:431:431)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (341:341:341) (401:401:401)) + (PORT datab (338:338:338) (393:393:393)) + (PORT datac (296:296:296) (360:360:360)) + (PORT datad (298:298:298) (354:354:354)) + (IOPATH dataa combout (394:394:394) (400:400:400)) + (IOPATH datab combout (400:400:400) (391:391:391)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1683:1683:1683)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4763:4763:4763) (4712:4712:4712)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (535:535:535) (525:525:525)) + (PORT datab (342:342:342) (398:398:398)) + (PORT datac (299:299:299) (363:363:363)) + (PORT datad (300:300:300) (356:356:356)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (272:272:272) (284:284:284)) + (PORT datab (266:266:266) (273:273:273)) + (PORT datac (228:228:228) (243:243:243)) + (PORT datad (823:823:823) (684:684:684)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE read_valid\~0) + (DELAY + (ABSOLUTE + (PORT dataa (844:844:844) (729:729:729)) + (PORT datab (820:820:820) (710:710:710)) + (PORT datac (909:909:909) (787:787:787)) + (PORT datad (300:300:300) (355:355:355)) + (IOPATH dataa combout (349:349:349) (377:377:377)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE read_valid\~1) + (DELAY + (ABSOLUTE + (PORT dataa (884:884:884) (773:773:773)) + (PORT datab (906:906:906) (772:772:772)) + (PORT datad (227:227:227) (234:234:234)) + (IOPATH dataa combout (394:394:394) (400:400:400)) + (IOPATH datab combout (393:393:393) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (563:563:563) (541:541:541)) + (PORT datab (343:343:343) (398:398:398)) + (PORT datad (490:490:490) (439:439:439)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (621:621:621) (571:571:571)) + (PORT datab (382:382:382) (453:453:453)) + (PORT datac (341:341:341) (418:418:418)) + (PORT datad (290:290:290) (352:352:352)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (330:330:330) (394:394:394)) + (PORT datab (358:358:358) (420:420:420)) + (PORT datac (293:293:293) (362:362:362)) + (PORT datad (284:284:284) (342:342:342)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~2) + (DELAY + (ABSOLUTE + (PORT datab (270:270:270) (277:277:277)) + (PORT datac (324:324:324) (388:388:388)) + (IOPATH datab combout (423:423:423) (391:391:391)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (881:881:881) (825:825:825)) + (PORT datab (951:951:951) (864:864:864)) + (PORT datad (812:812:812) (691:691:691)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (409:409:409)) + (PORT datab (337:337:337) (398:398:398)) + (PORT datac (294:294:294) (364:364:364)) + (PORT datad (293:293:293) (355:355:355)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT asdata (1898:1898:1898) (1732:1732:1732)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (PORT ena (1981:1981:1981) (1791:1791:1791)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (416:416:416)) + (PORT datab (1213:1213:1213) (1107:1107:1107)) + (PORT datad (1199:1199:1199) (1091:1091:1091)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (2051:2051:2051) (1882:1882:1882)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1613:1613:1613) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (566:566:566) (552:552:552)) + (PORT datab (552:552:552) (531:531:531)) + (PORT datad (308:308:308) (367:367:367)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (416:416:416)) + (PORT datab (573:573:573) (556:556:556)) + (PORT datad (545:545:545) (517:517:517)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT datac (438:438:438) (386:386:386)) + (PORT datad (229:229:229) (237:237:237)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1229:1229:1229) (1110:1110:1110)) + (PORT datab (940:940:940) (860:860:860)) + (PORT datad (301:301:301) (357:357:357)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (541:541:541) (525:525:525)) + (PORT datab (339:339:339) (395:395:395)) + (PORT datad (307:307:307) (366:366:366)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (349:349:349) (412:412:412)) + (PORT datab (341:341:341) (396:396:396)) + (PORT datad (299:299:299) (355:355:355)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT datab (268:268:268) (275:275:275)) + (PORT datac (225:225:225) (240:240:240)) + (PORT datad (803:803:803) (678:678:678)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~8) + (DELAY + (ABSOLUTE + (PORT dataa (1180:1180:1180) (1012:1012:1012)) + (PORT datab (1229:1229:1229) (1045:1045:1045)) + (PORT datac (1215:1215:1215) (1040:1040:1040)) + (PORT datad (228:228:228) (235:235:235)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (341:341:341) (400:400:400)) + (PORT datab (346:346:346) (404:404:404)) + (PORT datad (552:552:552) (530:530:530)) + (IOPATH dataa combout (394:394:394) (419:419:419)) + (IOPATH datab combout (400:400:400) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (628:628:628) (589:589:589)) + (PORT datab (348:348:348) (406:406:406)) + (PORT datad (315:315:315) (378:378:378)) + (IOPATH dataa combout (435:435:435) (419:419:419)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT asdata (2404:2404:2404) (2152:2152:2152)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (PORT ena (1622:1622:1622) (1494:1494:1494)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (853:853:853) (679:679:679)) + (PORT datab (482:482:482) (417:417:417)) + (PORT datad (328:328:328) (387:387:387)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (435:435:435)) + (PORT datab (608:608:608) (563:563:563)) + (PORT datad (545:545:545) (518:518:518)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (559:559:559) (545:545:545)) + (PORT datab (364:364:364) (419:419:419)) + (PORT datad (541:541:541) (517:517:517)) + (IOPATH dataa combout (394:394:394) (419:419:419)) + (IOPATH datab combout (400:400:400) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (547:547:547) (452:452:452)) + (PORT datab (534:534:534) (522:522:522)) + (PORT datad (228:228:228) (236:236:236)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (321:321:321) (345:345:345)) + (PORT datac (769:769:769) (666:666:666)) + (PORT datad (842:842:842) (708:708:708)) + (IOPATH dataa combout (420:420:420) (400:400:400)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1307:1307:1307) (1170:1170:1170)) + (PORT datab (1719:1719:1719) (1507:1507:1507)) + (PORT datad (483:483:483) (469:469:469)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (538:538:538) (518:518:518)) + (PORT datab (913:913:913) (860:860:860)) + (PORT datad (1236:1236:1236) (1111:1111:1111)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT asdata (1243:1243:1243) (1180:1180:1180)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (933:933:933) (815:815:815)) + (PORT datab (348:348:348) (406:406:406)) + (PORT datad (299:299:299) (355:355:355)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (270:270:270) (281:281:281)) + (PORT datab (938:938:938) (814:814:814)) + (PORT datad (496:496:496) (489:489:489)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT asdata (1287:1287:1287) (1192:1192:1192)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (535:535:535) (520:520:520)) + (PORT datab (1003:1003:1003) (899:899:899)) + (PORT datad (1237:1237:1237) (1102:1102:1102)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (416:416:416)) + (PORT datab (307:307:307) (321:321:321)) + (PORT datac (314:314:314) (384:384:384)) + (PORT datad (315:315:315) (378:378:378)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (392:392:392)) + (PORT datab (326:326:326) (383:383:383)) + (PORT datac (282:282:282) (348:348:348)) + (PORT datad (285:285:285) (344:344:344)) + (IOPATH dataa combout (349:349:349) (371:371:371)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (557:557:557) (538:538:538)) + (PORT datab (326:326:326) (383:383:383)) + (PORT datac (285:285:285) (352:352:352)) + (PORT datad (285:285:285) (343:343:343)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (394:394:394)) + (PORT datab (327:327:327) (384:384:384)) + (PORT datac (285:285:285) (352:352:352)) + (PORT datad (285:285:285) (344:344:344)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~3) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (392:392:392)) + (PORT datab (326:326:326) (383:383:383)) + (PORT datac (283:283:283) (349:349:349)) + (PORT datad (286:286:286) (344:344:344)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~4) + (DELAY + (ABSOLUTE + (PORT dataa (824:824:824) (703:703:703)) + (PORT datab (266:266:266) (273:273:273)) + (PORT datac (224:224:224) (239:239:239)) + (PORT datad (226:226:226) (233:233:233)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~5) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (393:393:393)) + (PORT datab (326:326:326) (383:383:383)) + (PORT datac (284:284:284) (350:350:350)) + (PORT datad (286:286:286) (345:345:345)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~6) + (DELAY + (ABSOLUTE + (PORT dataa (555:555:555) (536:536:536)) + (PORT datab (325:325:325) (382:382:382)) + (PORT datac (283:283:283) (350:350:350)) + (PORT datad (284:284:284) (343:343:343)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[8\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (888:888:888) (747:747:747)) + (PORT datab (819:819:819) (709:709:709)) + (PORT datac (839:839:839) (723:723:723)) + (PORT datad (828:828:828) (712:712:712)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[15\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (888:888:888) (748:748:748)) + (PORT datab (821:821:821) (711:711:711)) + (PORT datac (840:840:840) (725:725:725)) + (PORT datad (830:830:830) (714:714:714)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[15\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (547:547:547) (455:455:455)) + (PORT datab (976:976:976) (874:874:874)) + (PORT datad (925:925:925) (825:825:825)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[14\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (969:969:969) (875:875:875)) + (PORT datab (480:480:480) (418:418:418)) + (PORT datad (914:914:914) (833:833:833)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[13\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (967:967:967) (873:873:873)) + (PORT datab (736:736:736) (602:602:602)) + (PORT datad (916:916:916) (835:835:835)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[12\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (967:967:967) (874:874:874)) + (PORT datab (536:536:536) (442:442:442)) + (PORT datad (915:915:915) (835:835:835)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[9\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (321:321:321) (345:345:345)) + (PORT datab (861:861:861) (718:718:718)) + (PORT datad (270:270:270) (288:288:288)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[11\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (320:320:320) (345:345:345)) + (PORT datab (814:814:814) (705:705:705)) + (PORT datad (272:272:272) (290:290:290)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[10\]\~8) + (DELAY + (ABSOLUTE + (PORT dataa (320:320:320) (345:345:345)) + (PORT datab (804:804:804) (699:699:699)) + (PORT datad (272:272:272) (289:289:289)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[8\]\~9) + (DELAY + (ABSOLUTE + (PORT dataa (320:320:320) (344:344:344)) + (PORT datab (888:888:888) (739:739:739)) + (PORT datad (272:272:272) (290:290:290)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[7\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (962:962:962) (867:867:867)) + (PORT datab (539:539:539) (448:448:448)) + (PORT datad (921:921:921) (842:842:842)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[6\]\~11) + (DELAY + (ABSOLUTE + (PORT dataa (964:964:964) (870:870:870)) + (PORT datab (540:540:540) (449:449:449)) + (PORT datad (918:918:918) (839:839:839)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[5\]\~12) + (DELAY + (ABSOLUTE + (PORT dataa (965:965:965) (870:870:870)) + (PORT datab (484:484:484) (424:424:424)) + (PORT datad (918:918:918) (838:838:838)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[4\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (966:966:966) (872:872:872)) + (PORT datab (542:542:542) (452:452:452)) + (PORT datad (917:917:917) (837:837:837)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[3\]\~14) + (DELAY + (ABSOLUTE + (PORT dataa (486:486:486) (430:430:430)) + (PORT datab (982:982:982) (881:881:881)) + (PORT datad (919:919:919) (819:819:819)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[2\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (550:550:550) (459:459:459)) + (PORT datab (982:982:982) (881:881:881)) + (PORT datad (919:919:919) (819:819:819)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[1\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (487:487:487) (431:431:431)) + (PORT datab (983:983:983) (882:882:882)) + (PORT datad (918:918:918) (817:817:817)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[0\]\~17) + (DELAY + (ABSOLUTE + (PORT dataa (966:966:966) (872:872:872)) + (PORT datab (543:543:543) (453:453:453)) + (PORT datad (916:916:916) (836:836:836)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1290:1290:1290) (1102:1102:1102)) + (PORT datab (992:992:992) (890:890:890)) + (PORT datad (550:550:550) (526:526:526)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (624:624:624) (580:580:580)) + (PORT datab (554:554:554) (543:543:543)) + (PORT datad (918:918:918) (834:834:834)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (883:883:883) (808:808:808)) + (PORT datab (569:569:569) (545:545:545)) + (PORT datac (867:867:867) (798:798:798)) + (PORT datad (847:847:847) (787:787:787)) + (IOPATH dataa combout (435:435:435) (419:419:419)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (274:274:274) (286:286:286)) + (PORT datab (267:267:267) (273:273:273)) + (PORT datac (1599:1599:1599) (1365:1365:1365)) + (PORT datad (229:229:229) (236:236:236)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (874:874:874) (819:819:819)) + (PORT datab (952:952:952) (862:862:862)) + (PORT datad (299:299:299) (354:354:354)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb\|data_wire\[2\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (1848:1848:1848) (1565:1565:1565)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (857:857:857) (757:757:757)) + (PORT datab (1128:1128:1128) (927:927:927)) + (PORT datad (227:227:227) (234:234:234)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (609:609:609) (560:560:560)) + (PORT datab (530:530:530) (511:511:511)) + (PORT datad (1566:1566:1566) (1379:1379:1379)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (533:533:533) (434:434:434)) + (PORT datab (269:269:269) (276:276:276)) + (PORT datac (439:439:439) (373:373:373)) + (PORT datad (282:282:282) (304:304:304)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1291:1291:1291) (1112:1112:1112)) + (PORT datab (351:351:351) (417:417:417)) + (PORT datad (878:878:878) (799:799:799)) + (IOPATH dataa combout (394:394:394) (419:419:419)) + (IOPATH datab combout (400:400:400) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (339:339:339) (404:404:404)) + (PORT datab (934:934:934) (844:844:844)) + (PORT datac (1333:1333:1333) (1192:1192:1192)) + (PORT datad (304:304:304) (373:373:373)) + (IOPATH dataa combout (435:435:435) (419:419:419)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (430:430:430)) + (PORT datab (353:353:353) (420:420:420)) + (PORT datac (854:854:854) (786:786:786)) + (PORT datad (856:856:856) (784:784:784)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (928:928:928) (774:774:774)) + (PORT datab (328:328:328) (348:348:348)) + (PORT datad (480:480:480) (408:408:408)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (882:882:882) (806:806:806)) + (PORT datab (539:539:539) (521:521:521)) + (PORT datad (527:527:527) (499:499:499)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (966:966:966) (865:865:865)) + (PORT datab (342:342:342) (397:397:397)) + (PORT datad (838:838:838) (750:750:750)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (354:354:354) (429:429:429)) + (PORT datab (957:957:957) (847:847:847)) + (PORT datad (837:837:837) (781:781:781)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (359:359:359) (424:424:424)) + (PORT datab (357:357:357) (418:418:418)) + (PORT datac (1184:1184:1184) (1059:1059:1059)) + (PORT datad (336:336:336) (398:398:398)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|rd_flag) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5255:5255:5255) (5235:5235:5235)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (337:337:337) (404:404:404)) + (PORT datab (334:334:334) (394:394:394)) + (PORT datac (291:291:291) (361:361:361)) + (PORT datad (292:292:292) (354:354:354)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|cntr_cout\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1289:1289:1289) (1175:1175:1175)) + (PORT datab (895:895:895) (831:831:831)) + (PORT datac (464:464:464) (403:403:403)) + (PORT datad (288:288:288) (348:348:348)) + (IOPATH dataa combout (350:350:350) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (PORT ena (1667:1667:1667) (1526:1526:1526)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (330:330:330) (394:394:394)) + (PORT datab (328:328:328) (385:385:385)) + (PORT datac (285:285:285) (351:351:351)) + (PORT datad (288:288:288) (346:346:346)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (330:330:330) (394:394:394)) + (PORT datab (327:327:327) (384:384:384)) + (PORT datac (285:285:285) (351:351:351)) + (PORT datad (287:287:287) (347:347:347)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (487:487:487) (419:419:419)) + (PORT datab (326:326:326) (383:383:383)) + (PORT datac (225:225:225) (240:240:240)) + (PORT datad (285:285:285) (344:344:344)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|rd_flag\~0) + (DELAY + (ABSOLUTE + (PORT dataa (922:922:922) (787:787:787)) + (PORT datab (964:964:964) (881:881:881)) + (PORT datad (236:236:236) (248:248:248)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|bit_cnt\~1) + (DELAY + (ABSOLUTE + (PORT dataa (349:349:349) (418:418:418)) + (PORT datab (269:269:269) (276:276:276)) + (PORT datac (313:313:313) (388:388:388)) + (PORT datad (254:254:254) (273:273:273)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~13) + (DELAY + (ABSOLUTE + (PORT dataa (1196:1196:1196) (1071:1071:1071)) + (PORT datab (360:360:360) (421:421:421)) + (PORT datac (314:314:314) (386:386:386)) + (PORT datad (308:308:308) (367:367:367)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|work_en) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|start_nedge) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|work_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (1257:1257:1257) (1073:1073:1073)) + (PORT datad (228:228:228) (235:235:235)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always3\~0) + (DELAY + (ABSOLUTE + (PORT datab (327:327:327) (384:384:384)) + (PORT datad (299:299:299) (355:355:355)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (908:908:908) (846:846:846)) + (PORT datab (312:312:312) (328:328:328)) + (PORT datad (840:840:840) (759:759:759)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[7\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1456:1456:1456) (1274:1274:1274)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[7\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1147:1147:1147) (1013:1013:1013)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (301:301:301) (357:357:357)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (843:843:843) (773:773:773)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (527:527:527) (498:498:498)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE tx\~output) + (DELAY + (ABSOLUTE + (PORT i (2198:2198:2198) (2389:2389:2389)) + (IOPATH i o (2961:2961:2961) (3013:3013:3013)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_clk\~output) + (DELAY + (ABSOLUTE + (PORT i (1468:1468:1468) (1389:1389:1389)) + (IOPATH i o (2892:2892:2892) (2812:2812:2812)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_cas_n\~output) + (DELAY + (ABSOLUTE + (PORT i (2130:2130:2130) (1818:1818:1818)) + (IOPATH i o (2912:2912:2912) (2832:2832:2832)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ras_n\~output) + (DELAY + (ABSOLUTE + (PORT i (2298:2298:2298) (1877:1877:1877)) + (IOPATH i o (4163:4163:4163) (4170:4170:4170)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_we_n\~output) + (DELAY + (ABSOLUTE + (PORT i (2301:2301:2301) (2012:2012:2012)) + (IOPATH i o (2932:2932:2932) (2852:2852:2852)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ba\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3246:3246:3246) (2813:2813:2813)) + (IOPATH i o (2912:2912:2912) (2832:2832:2832)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ba\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3529:3529:3529) (3038:3038:3038)) + (IOPATH i o (2912:2912:2912) (2832:2832:2832)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2613:2613:2613) (2134:2134:2134)) + (IOPATH i o (2922:2922:2922) (2842:2842:2842)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2607:2607:2607) (2136:2136:2136)) + (IOPATH i o (3043:3043:3043) (2991:2991:2991)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[2\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2607:2607:2607) (2136:2136:2136)) + (IOPATH i o (3043:3043:3043) (2991:2991:2991)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[3\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3239:3239:3239) (2808:2808:2808)) + (IOPATH i o (3043:3043:3043) (2991:2991:2991)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[4\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2994:2994:2994) (2460:2460:2460)) + (IOPATH i o (3043:3043:3043) (2991:2991:2991)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[5\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3011:3011:3011) (2481:2481:2481)) + (IOPATH i o (3023:3023:3023) (2971:2971:2971)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[6\]\~output) + (DELAY + (ABSOLUTE + (PORT i (4333:4333:4333) (3744:3744:3744)) + (IOPATH i o (3023:3023:3023) (2971:2971:2971)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[7\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3936:3936:3936) (3401:3401:3401)) + (IOPATH i o (3013:3013:3013) (2961:2961:2961)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[8\]\~output) + (DELAY + (ABSOLUTE + (PORT i (4339:4339:4339) (3751:3751:3751)) + (IOPATH i o (3023:3023:3023) (2971:2971:2971)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[9\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2581:2581:2581) (2243:2243:2243)) + (IOPATH i o (3013:3013:3013) (2961:2961:2961)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[10\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2598:2598:2598) (2252:2252:2252)) + (IOPATH i o (2932:2932:2932) (2852:2852:2852)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[11\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2581:2581:2581) (2243:2243:2243)) + (IOPATH i o (3023:3023:3023) (2971:2971:2971)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[12\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3140:3140:3140) (2670:2670:2670)) + (IOPATH i o (3013:3013:3013) (2961:2961:2961)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1486:1486:1486) (1268:1268:1268)) + (PORT oe (1586:1586:1586) (1428:1428:1428)) + (IOPATH i o (2912:2912:2912) (2832:2832:2832)) + (IOPATH oe o (2938:2938:2938) (2788:2788:2788)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1432:1432:1432) (1218:1218:1218)) + (PORT oe (1586:1586:1586) (1428:1428:1428)) + (IOPATH i o (2912:2912:2912) (2832:2832:2832)) + (IOPATH oe o (2938:2938:2938) (2788:2788:2788)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[2\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1514:1514:1514) (1298:1298:1298)) + (PORT oe (1964:1964:1964) (1728:1728:1728)) + (IOPATH i o (2872:2872:2872) (2792:2792:2792)) + (IOPATH oe o (2938:2938:2938) (2788:2788:2788)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[3\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1072:1072:1072) (892:892:892)) + (PORT oe (1201:1201:1201) (1085:1085:1085)) + (IOPATH i o (2902:2902:2902) (2822:2822:2822)) + (IOPATH oe o (2938:2938:2938) (2788:2788:2788)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[4\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1089:1089:1089) (918:918:918)) + (PORT oe (1201:1201:1201) (1085:1085:1085)) + (IOPATH i o (2912:2912:2912) (2832:2832:2832)) + (IOPATH oe o (2938:2938:2938) (2788:2788:2788)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[5\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1463:1463:1463) (1242:1242:1242)) + (PORT oe (1964:1964:1964) (1728:1728:1728)) + (IOPATH i o (2892:2892:2892) (2812:2812:2812)) + (IOPATH oe o (2938:2938:2938) (2788:2788:2788)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[6\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1480:1480:1480) (1263:1263:1263)) + (PORT oe (1586:1586:1586) (1428:1428:1428)) + (IOPATH i o (2922:2922:2922) (2842:2842:2842)) + (IOPATH oe o (2938:2938:2938) (2788:2788:2788)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[7\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1160:1160:1160) (988:988:988)) + (PORT oe (1586:1586:1586) (1428:1428:1428)) + (IOPATH i o (2912:2912:2912) (2832:2832:2832)) + (IOPATH oe o (2938:2938:2938) (2788:2788:2788)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[8\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1578:1578:1578) (1371:1371:1371)) + (PORT oe (2587:2587:2587) (2226:2226:2226)) + (IOPATH i o (3023:3023:3023) (2971:2971:2971)) + (IOPATH oe o (3016:3016:3016) (2899:2899:2899)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[9\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1698:1698:1698) (1403:1403:1403)) + (PORT oe (2195:2195:2195) (1907:1907:1907)) + (IOPATH i o (2922:2922:2922) (2842:2842:2842)) + (IOPATH oe o (2938:2938:2938) (2788:2788:2788)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[10\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2010:2010:2010) (1617:1617:1617)) + (PORT oe (1881:1881:1881) (1642:1642:1642)) + (IOPATH i o (3033:3033:3033) (2981:2981:2981)) + (IOPATH oe o (3016:3016:3016) (2899:2899:2899)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[11\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2133:2133:2133) (1821:1821:1821)) + (PORT oe (2213:2213:2213) (1922:1922:1922)) + (IOPATH i o (3013:3013:3013) (2961:2961:2961)) + (IOPATH oe o (3016:3016:3016) (2899:2899:2899)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[12\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1789:1789:1789) (1494:1494:1494)) + (PORT oe (2245:2245:2245) (1968:1968:1968)) + (IOPATH i o (3003:3003:3003) (2951:2951:2951)) + (IOPATH oe o (3016:3016:3016) (2899:2899:2899)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[13\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1455:1455:1455) (1209:1209:1209)) + (PORT oe (2252:2252:2252) (1977:1977:1977)) + (IOPATH i o (3013:3013:3013) (2961:2961:2961)) + (IOPATH oe o (3016:3016:3016) (2899:2899:2899)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[14\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1711:1711:1711) (1368:1368:1368)) + (PORT oe (2252:2252:2252) (1976:1976:1976)) + (IOPATH i o (4207:4207:4207) (4224:4224:4224)) + (IOPATH oe o (4220:4220:4220) (4166:4166:4166)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[15\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1616:1616:1616) (1301:1301:1301)) + (PORT oe (2252:2252:2252) (1977:1977:1977)) + (IOPATH i o (2938:2938:2938) (2862:2862:2862)) + (IOPATH oe o (2950:2950:2950) (2804:2804:2804)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (557:557:557) (546:546:546)) + (PORT datab (338:338:338) (393:393:393)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sys_clk\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (788:788:788) (813:813:813)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_pll") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|pll1) + (DELAY + (ABSOLUTE + (PORT areset (4678:4678:4678) (4678:4678:4678)) + (PORT inclk[0] (2063:2063:2063) (2063:2063:2063)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sys_rst_n\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (748:748:748) (773:773:773)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|pll_lock_sync) + (DELAY + (ABSOLUTE + (PORT clk (1917:1917:1917) (2106:2106:2106)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4924:4924:4924) (4848:4848:4848)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE rst_n\~0) + (DELAY + (ABSOLUTE + (PORT dataa (4268:4268:4268) (4274:4274:4274)) + (PORT datac (1272:1272:1272) (1435:1435:1435)) + (PORT datad (275:275:275) (329:329:329)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE rst_n\~0clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2384:2384:2384) (2150:2150:2150)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (401:401:401)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT datab (333:333:333) (393:393:393)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT dataa (335:335:335) (400:400:400)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (341:341:341) (409:409:409)) + (PORT datab (570:570:570) (546:546:546)) + (PORT datac (294:294:294) (364:364:364)) + (PORT datad (295:295:295) (359:359:359)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (396:396:396)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (325:325:325) (383:383:383)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (327:327:327) (384:384:384)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (616:616:616) (565:565:565)) + (PORT datab (328:328:328) (385:385:385)) + (PORT datac (283:283:283) (349:349:349)) + (PORT datad (286:286:286) (345:345:345)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[9\]\~31) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (396:396:396)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (403:403:403)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[11\]\~35) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT datac (827:827:827) (734:734:734)) + (PORT datad (513:513:513) (499:499:499)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~3) + (DELAY + (ABSOLUTE + (PORT dataa (621:621:621) (575:575:575)) + (PORT datab (612:612:612) (564:564:564)) + (PORT datac (225:225:225) (240:240:240)) + (PORT datad (514:514:514) (495:495:495)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (403:403:403)) + (PORT datab (472:472:472) (406:406:406)) + (PORT datac (484:484:484) (402:402:402)) + (PORT datad (227:227:227) (234:234:234)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT datab (325:325:325) (382:382:382)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (410:410:410)) + (PORT datab (571:571:571) (546:546:546)) + (PORT datac (294:294:294) (364:364:364)) + (PORT datad (295:295:295) (359:359:359)) + (IOPATH dataa combout (350:350:350) (371:371:371)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (404:404:404)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (PORT sclr (1100:1100:1100) (1090:1090:1090)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (556:556:556) (544:544:544)) + (PORT datab (609:609:609) (561:561:561)) + (PORT datac (826:826:826) (733:733:733)) + (PORT datad (512:512:512) (493:493:493)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (540:540:540) (444:444:444)) + (PORT datab (532:532:532) (435:435:435)) + (PORT datac (565:565:565) (534:534:534)) + (PORT datad (229:229:229) (236:236:236)) + (IOPATH dataa combout (349:349:349) (371:371:371)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (326:326:326) (388:388:388)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (394:394:394)) + (PORT datab (329:329:329) (386:386:386)) + (PORT datac (287:287:287) (354:354:354)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (283:283:283)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (416:416:416)) + (PORT datab (293:293:293) (309:309:309)) + (PORT datac (311:311:311) (386:386:386)) + (IOPATH dataa combout (394:394:394) (400:400:400)) + (IOPATH datab combout (400:400:400) (391:391:391)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_flag) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_flag) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT asdata (1635:1635:1635) (1522:1522:1522)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (350:350:350) (419:419:419)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH datac combout (415:415:415) (429:429:429)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a0) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (PORT ena (2349:2349:2349) (2100:2100:2100)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (348:348:348) (417:417:417)) + (PORT datab (1975:1975:1975) (1689:1689:1689)) + (PORT datad (543:543:543) (539:539:539)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (587:587:587) (584:584:584)) + (PORT datab (358:358:358) (419:419:419)) + (PORT datac (302:302:302) (376:376:376)) + (PORT datad (1621:1621:1621) (1400:1400:1400)) + (IOPATH dataa combout (349:349:349) (371:371:371)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (226:226:226) (233:233:233)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (310:310:310) (324:324:324)) + (PORT datad (536:536:536) (526:526:526)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (579:579:579) (576:576:576)) + (PORT datab (361:361:361) (422:422:422)) + (PORT datac (332:332:332) (407:407:407)) + (PORT datad (539:539:539) (528:528:528)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (PORT ena (2349:2349:2349) (2100:2100:2100)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (510:510:510) (444:444:444)) + (PORT datab (376:376:376) (442:442:442)) + (PORT datad (535:535:535) (525:525:525)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (365:365:365) (432:432:432)) + (PORT datab (311:311:311) (325:325:325)) + (PORT datac (330:330:330) (405:405:405)) + (PORT datad (306:306:306) (365:365:365)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5\~0) + (DELAY + (ABSOLUTE + (PORT datad (798:798:798) (678:678:678)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (390:390:390) (468:468:468)) + (PORT datad (795:795:795) (685:685:685)) + (IOPATH dataa combout (375:375:375) (392:392:392)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT dataa (914:914:914) (845:845:845)) + (PORT datab (354:354:354) (420:420:420)) + (PORT datac (344:344:344) (426:426:426)) + (PORT datad (333:333:333) (405:405:405)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (PORT ena (1068:1068:1068) (1053:1053:1053)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (374:374:374) (448:448:448)) + (PORT datab (352:352:352) (418:418:418)) + (PORT datac (344:344:344) (426:426:426)) + (PORT datad (795:795:795) (685:685:685)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (427:427:427) (358:358:358)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (375:375:375) (448:448:448)) + (PORT datab (353:353:353) (419:419:419)) + (PORT datac (342:342:342) (423:423:423)) + (PORT datad (794:794:794) (684:684:684)) + (IOPATH dataa combout (349:349:349) (377:377:377)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10\~0) + (DELAY + (ABSOLUTE + (PORT datab (356:356:356) (423:423:423)) + (PORT datad (449:449:449) (378:378:378)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (490:490:490) (422:422:422)) + (PORT datad (312:312:312) (382:382:382)) + (IOPATH dataa combout (375:375:375) (392:392:392)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT datab (353:353:353) (420:420:420)) + (PORT datac (294:294:294) (365:365:365)) + (PORT datad (762:762:762) (698:698:698)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (PORT ena (1236:1236:1236) (1138:1138:1138)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT datab (322:322:322) (377:377:377)) + (PORT datac (871:871:871) (796:796:796)) + (PORT datad (1094:1094:1094) (959:959:959)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|parity9) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (PORT ena (2349:2349:2349) (2100:2100:2100)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (583:583:583) (581:581:581)) + (PORT datab (356:356:356) (417:417:417)) + (PORT datac (301:301:301) (374:374:374)) + (PORT datad (1619:1619:1619) (1399:1399:1399)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (430:430:430)) + (PORT datab (309:309:309) (324:324:324)) + (PORT datac (330:330:330) (404:404:404)) + (PORT datad (306:306:306) (365:365:365)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (391:391:391) (470:470:470)) + (PORT datab (836:836:836) (724:724:724)) + (PORT datad (332:332:332) (404:404:404)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT asdata (720:720:720) (789:789:789)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (PORT ena (1236:1236:1236) (1138:1138:1138)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (402:402:402)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT dataa (327:327:327) (389:389:389)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (328:328:328) (391:391:391)) + (PORT datab (325:325:325) (382:382:382)) + (PORT datac (283:283:283) (348:348:348)) + (PORT datad (285:285:285) (345:345:345)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (350:350:350) (422:422:422)) + (PORT datab (347:347:347) (410:410:410)) + (PORT datac (303:303:303) (374:374:374)) + (PORT datad (302:302:302) (367:367:367)) + (IOPATH dataa combout (349:349:349) (377:377:377)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~8) + (DELAY + (ABSOLUTE + (PORT dataa (851:851:851) (768:768:768)) + (PORT datab (569:569:569) (558:558:558)) + (PORT datac (499:499:499) (458:458:458)) + (PORT datad (488:488:488) (420:420:420)) + (IOPATH dataa combout (350:350:350) (371:371:371)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (313:313:313) (383:383:383)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (PORT ena (1236:1236:1236) (1138:1138:1138)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT asdata (932:932:932) (924:924:924)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[8\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1120:1120:1120) (974:974:974)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (762:762:762) (697:697:697)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (PORT ena (1236:1236:1236) (1138:1138:1138)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (308:308:308) (368:368:368)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1246:1246:1246) (1080:1080:1080)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (300:300:300) (356:356:356)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1110:1110:1110) (982:982:982)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (597:597:597) (548:548:548)) + (PORT datab (325:325:325) (383:383:383)) + (PORT datac (291:291:291) (361:361:361)) + (PORT datad (506:506:506) (493:493:493)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (334:334:334) (406:406:406)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (PORT ena (1068:1068:1068) (1053:1053:1053)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT asdata (2251:2251:2251) (2035:2035:2035)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT asdata (1183:1183:1183) (1095:1095:1095)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (332:332:332) (395:395:395)) + (PORT datab (286:286:286) (299:299:299)) + (PORT datac (294:294:294) (364:364:364)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT asdata (1294:1294:1294) (1229:1229:1229)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (PORT ena (1068:1068:1068) (1053:1053:1053)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1206:1206:1206) (1079:1079:1079)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (309:309:309) (368:368:368)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (328:328:328) (391:391:391)) + (PORT datab (286:286:286) (299:299:299)) + (PORT datac (294:294:294) (364:364:364)) + (PORT datad (276:276:276) (330:330:330)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (288:288:288) (301:301:301)) + (PORT datad (1239:1239:1239) (1117:1117:1117)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT asdata (742:742:742) (812:812:812)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (PORT ena (2349:2349:2349) (2100:2100:2100)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1637:1637:1637) (1453:1453:1453)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT asdata (759:759:759) (831:831:831)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (PORT ena (2349:2349:2349) (2100:2100:2100)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT asdata (1629:1629:1629) (1500:1500:1500)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (384:384:384) (452:452:452)) + (PORT datab (340:340:340) (396:396:396)) + (PORT datad (1236:1236:1236) (1114:1114:1114)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (383:383:383) (451:451:451)) + (PORT datab (286:286:286) (299:299:299)) + (PORT datac (299:299:299) (363:363:363)) + (PORT datad (1237:1237:1237) (1115:1115:1115)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5\~0) + (DELAY + (ABSOLUTE + (PORT datad (807:807:807) (683:683:683)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT asdata (766:766:766) (845:845:845)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (PORT ena (1068:1068:1068) (1053:1053:1053)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT asdata (1859:1859:1859) (1659:1659:1659)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (949:949:949) (867:867:867)) + (PORT datab (362:362:362) (417:417:417)) + (PORT datad (305:305:305) (364:364:364)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT datad (339:339:339) (402:402:402)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (PORT ena (1667:1667:1667) (1526:1526:1526)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (647:647:647) (597:597:597)) + (PORT datab (360:360:360) (421:421:421)) + (PORT datad (933:933:933) (820:820:820)) + (IOPATH dataa combout (377:377:377) (377:377:377)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (1123:1123:1123) (1004:1004:1004)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (PORT ena (1068:1068:1068) (1053:1053:1053)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT asdata (2389:2389:2389) (2141:2141:2141)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (536:536:536) (527:527:527)) + (PORT datab (1269:1269:1269) (1140:1140:1140)) + (PORT datad (1244:1244:1244) (1117:1117:1117)) + (IOPATH dataa combout (394:394:394) (419:419:419)) + (IOPATH datab combout (400:400:400) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1197:1197:1197) (1035:1035:1035)) + (PORT datab (269:269:269) (276:276:276)) + (PORT datac (1147:1147:1147) (966:966:966)) + (PORT datad (226:226:226) (233:233:233)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT asdata (1593:1593:1593) (1461:1461:1461)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (PORT ena (1033:1033:1033) (1005:1005:1005)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT asdata (1964:1964:1964) (1725:1725:1725)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (PORT ena (1955:1955:1955) (1752:1752:1752)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (869:869:869) (760:760:760)) + (PORT datab (813:813:813) (729:729:729)) + (PORT datad (1232:1232:1232) (1082:1082:1082)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (1924:1924:1924) (1710:1710:1710)) + (PORT datab (609:609:609) (562:562:562)) + (PORT datad (498:498:498) (478:478:478)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (271:271:271) (282:282:282)) + (PORT datab (1214:1214:1214) (1046:1046:1046)) + (PORT datac (1161:1161:1161) (967:967:967)) + (PORT datad (1803:1803:1803) (1497:1497:1497)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~8) + (DELAY + (ABSOLUTE + (PORT datac (225:225:225) (240:240:240)) + (PORT datad (480:480:480) (409:409:409)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT asdata (1649:1649:1649) (1515:1515:1515)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (PORT ena (1033:1033:1033) (1005:1005:1005)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (359:359:359) (425:425:425)) + (PORT datab (944:944:944) (855:855:855)) + (PORT datad (1510:1510:1510) (1289:1289:1289)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT asdata (1322:1322:1322) (1252:1252:1252)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (PORT ena (1033:1033:1033) (1005:1005:1005)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT asdata (737:737:737) (809:809:809)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (PORT ena (1068:1068:1068) (1053:1053:1053)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1644:1644:1644) (1663:1663:1663)) + (PORT asdata (1190:1190:1190) (1108:1108:1108)) + (PORT clrn (1676:1676:1676) (1629:1629:1629)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (480:480:480) (422:422:422)) + (PORT datab (270:270:270) (277:277:277)) + (PORT datad (858:858:858) (786:786:786)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (880:880:880) (812:812:812)) + (PORT datab (340:340:340) (395:395:395)) + (PORT datad (1127:1127:1127) (1018:1018:1018)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (271:271:271) (283:283:283)) + (PORT datab (268:268:268) (275:275:275)) + (PORT datad (839:839:839) (784:784:784)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT datab (1152:1152:1152) (945:945:945)) + (PORT datac (767:767:767) (644:644:644)) + (PORT datad (1155:1155:1155) (990:990:990)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|valid_rdreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1538:1538:1538) (1254:1254:1254)) + (PORT datab (1569:1569:1569) (1375:1375:1375)) + (PORT datac (769:769:769) (694:694:694)) + (PORT datad (1207:1207:1207) (1048:1048:1048)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT asdata (2336:2336:2336) (2089:2089:2089)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (PORT ena (1955:1955:1955) (1752:1752:1752)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6\~0) + (DELAY + (ABSOLUTE + (PORT datab (294:294:294) (309:309:309)) + (PORT datad (1274:1274:1274) (1136:1136:1136)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT asdata (1546:1546:1546) (1418:1418:1418)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (PORT ena (1033:1033:1033) (1005:1005:1005)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (355:355:355) (430:430:430)) + (PORT datab (554:554:554) (544:544:544)) + (PORT datac (299:299:299) (363:363:363)) + (PORT datad (525:525:525) (508:508:508)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (1295:1295:1295) (1126:1126:1126)) + (PORT datab (348:348:348) (414:414:414)) + (PORT datac (299:299:299) (363:363:363)) + (PORT datad (239:239:239) (253:253:253)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (317:317:317) (387:387:387)) + (PORT datad (1129:1129:1129) (924:924:924)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (1924:1924:1924) (1710:1710:1710)) + (PORT datac (315:315:315) (385:385:385)) + (PORT datad (1129:1129:1129) (923:923:923)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (552:552:552) (524:524:524)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT asdata (1542:1542:1542) (1417:1417:1417)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (PORT ena (1068:1068:1068) (1053:1053:1053)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (863:863:863) (786:786:786)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (500:500:500) (483:483:483)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (932:932:932) (857:857:857)) + (PORT datab (922:922:922) (836:836:836)) + (PORT datac (494:494:494) (427:427:427)) + (PORT datad (856:856:856) (781:781:781)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (1246:1246:1246) (1103:1103:1103)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (PORT ena (1955:1955:1955) (1752:1752:1752)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT asdata (1678:1678:1678) (1538:1538:1538)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (PORT ena (1955:1955:1955) (1752:1752:1752)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (1921:1921:1921) (1707:1707:1707)) + (PORT datab (571:571:571) (546:546:546)) + (PORT datac (316:316:316) (386:386:386)) + (PORT datad (1129:1129:1129) (923:923:923)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (839:839:839) (769:769:769)) + (PORT datad (227:227:227) (234:234:234)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (318:318:318) (377:377:377)) + (PORT datab (942:942:942) (836:836:836)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab cout (497:497:497) (381:381:381)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1539:1539:1539) (1338:1338:1338)) + (PORT datab (913:913:913) (819:819:819)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~6) + (DELAY + (ABSOLUTE + (PORT dataa (917:917:917) (822:822:822)) + (PORT datab (906:906:906) (832:832:832)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~8) + (DELAY + (ABSOLUTE + (PORT dataa (933:933:933) (818:818:818)) + (PORT datab (826:826:826) (717:717:717)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~10) + (DELAY + (ABSOLUTE + (PORT dataa (846:846:846) (764:764:764)) + (PORT datab (842:842:842) (736:736:736)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datab (338:338:338) (399:399:399)) + (PORT datac (244:244:244) (266:266:266)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1665:1665:1665)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~12) + (DELAY + (ABSOLUTE + (PORT dataa (792:792:792) (696:696:696)) + (PORT datab (838:838:838) (732:732:732)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~14) + (DELAY + (ABSOLUTE + (PORT dataa (530:530:530) (510:510:510)) + (PORT datab (792:792:792) (695:695:695)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|LessThan2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (272:272:272) (284:284:284)) + (PORT datab (269:269:269) (276:276:276)) + (PORT datac (227:227:227) (243:243:243)) + (PORT datad (229:229:229) (236:236:236)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|LessThan2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (271:271:271) (283:283:283)) + (PORT datab (268:268:268) (275:275:275)) + (PORT datac (226:226:226) (242:242:242)) + (PORT datad (227:227:227) (234:234:234)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (423:423:423) (425:425:425)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT dataa (1333:1333:1333) (1176:1176:1176)) + (PORT datab (956:956:956) (857:857:857)) + (PORT datac (250:250:250) (274:274:274)) + (PORT datad (882:882:882) (799:799:799)) + (IOPATH dataa combout (392:392:392) (419:419:419)) + (IOPATH datab combout (393:393:393) (431:431:431)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9\~0) + (DELAY + (ABSOLUTE + (PORT datab (277:277:277) (287:287:287)) + (PORT datad (308:308:308) (367:367:367)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT asdata (1295:1295:1295) (1231:1231:1231)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (PORT ena (1033:1033:1033) (1005:1005:1005)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datac (318:318:318) (389:389:389)) + (PORT datad (315:315:315) (389:389:389)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT dataa (358:358:358) (434:434:434)) + (PORT datac (316:316:316) (388:388:388)) + (PORT datad (529:529:529) (512:512:512)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~18) + (DELAY + (ABSOLUTE + (PORT dataa (588:588:588) (541:541:541)) + (PORT datad (783:783:783) (684:684:684)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_wr_req\~0) + (DELAY + (ABSOLUTE + (PORT dataa (2221:2221:2221) (1901:1901:1901)) + (PORT datab (289:289:289) (296:296:296)) + (PORT datac (249:249:249) (266:266:266)) + (PORT datad (251:251:251) (259:259:259)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_wr_req) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1678:1678:1678) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (831:831:831) (744:744:744)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH datac combout (415:415:415) (429:429:429)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1068:1068:1068) (1054:1054:1054)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (835:835:835) (749:749:749)) + (PORT datab (323:323:323) (343:343:343)) + (PORT datad (531:531:531) (518:518:518)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~11) + (DELAY + (ABSOLUTE + (PORT dataa (1657:1657:1657) (1481:1481:1481)) + (PORT datab (1667:1667:1667) (1491:1491:1491)) + (PORT datac (914:914:914) (826:826:826)) + (PORT datad (2008:2008:2008) (1776:1776:1776)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1613:1613:1613) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (301:301:301) (323:323:323)) + (PORT datab (363:363:363) (426:426:426)) + (PORT datad (300:300:300) (356:356:356)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (897:897:897) (818:818:818)) + (PORT datab (1656:1656:1656) (1457:1457:1457)) + (PORT datac (866:866:866) (782:782:782)) + (PORT datad (799:799:799) (738:738:738)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1613:1613:1613) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (417:417:417)) + (PORT datab (307:307:307) (321:321:321)) + (PORT datac (315:315:315) (385:385:385)) + (PORT datad (316:316:316) (378:378:378)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (807:807:807) (680:680:680)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1697:1697:1697) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (833:833:833) (717:717:717)) + (PORT datad (321:321:321) (384:384:384)) + (IOPATH dataa combout (375:375:375) (392:392:392)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1697:1697:1697) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (833:833:833) (716:716:716)) + (PORT datab (362:362:362) (424:424:424)) + (IOPATH dataa combout (435:435:435) (419:419:419)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1697:1697:1697) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT datab (356:356:356) (418:418:418)) + (PORT datac (309:309:309) (375:375:375)) + (PORT datad (310:310:310) (369:369:369)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1665:1665:1665) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1697:1697:1697) (1649:1649:1649)) + (PORT ena (1659:1659:1659) (1498:1498:1498)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT datab (321:321:321) (376:376:376)) + (PORT datac (277:277:277) (340:340:340)) + (PORT datad (1259:1259:1259) (1103:1103:1103)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|parity6) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1613:1613:1613) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (354:354:354) (419:419:419)) + (PORT datab (330:330:330) (351:351:351)) + (PORT datac (784:784:784) (703:703:703)) + (PORT datad (524:524:524) (510:510:510)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (545:545:545) (542:542:542)) + (PORT datab (573:573:573) (552:552:552)) + (PORT datac (255:255:255) (282:282:282)) + (PORT datad (321:321:321) (386:386:386)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5\~0) + (DELAY + (ABSOLUTE + (PORT datab (269:269:269) (276:276:276)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (501:501:501) (448:448:448)) + (PORT datab (356:356:356) (416:416:416)) + (PORT datad (524:524:524) (513:513:513)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (902:902:902) (763:763:763)) + (PORT datab (892:892:892) (840:840:840)) + (PORT datad (317:317:317) (380:380:380)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (578:578:578) (560:560:560)) + (PORT datab (938:938:938) (878:878:878)) + (PORT datac (1913:1913:1913) (1688:1688:1688)) + (PORT datad (829:829:829) (739:739:739)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (403:403:403)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|rd_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (575:575:575) (576:576:576)) + (PORT datab (1187:1187:1187) (1052:1052:1052)) + (PORT datad (252:252:252) (271:271:271)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|rd_en) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT dataa (341:341:341) (408:408:408)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (349:349:349) (421:421:421)) + (PORT datac (303:303:303) (374:374:374)) + (PORT datad (302:302:302) (368:368:368)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (356:356:356) (417:417:417)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT datab (326:326:326) (383:383:383)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT datab (326:326:326) (383:383:383)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (327:327:327) (384:384:384)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (348:348:348) (406:406:406)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (416:416:416)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~3) + (DELAY + (ABSOLUTE + (PORT datac (869:869:869) (809:809:809)) + (PORT datad (923:923:923) (848:848:848)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~5) + (DELAY + (ABSOLUTE + (PORT dataa (925:925:925) (805:805:805)) + (PORT datab (1015:1015:1015) (917:917:917)) + (PORT datac (837:837:837) (726:726:726)) + (PORT datad (868:868:868) (762:762:762)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT datab (619:619:619) (575:575:575)) + (PORT datad (470:470:470) (410:410:410)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_CL) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1266:1266:1266) (1048:1048:1048)) + (PORT datab (350:350:350) (408:408:408)) + (PORT datad (469:469:469) (409:409:409)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_DATA) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (392:392:392)) + (PORT datab (325:325:325) (382:382:382)) + (PORT datac (283:283:283) (349:349:349)) + (PORT datad (284:284:284) (342:342:342)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~3) + (DELAY + (ABSOLUTE + (PORT dataa (915:915:915) (781:781:781)) + (PORT datab (931:931:931) (805:805:805)) + (PORT datac (330:330:330) (407:407:407)) + (PORT datad (855:855:855) (752:752:752)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_PRE) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT datab (511:511:511) (449:449:449)) + (PORT datad (521:521:521) (502:502:502)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|trp_end\~1) + (DELAY + (ABSOLUTE + (PORT datab (549:549:549) (463:463:463)) + (PORT datac (563:563:563) (535:535:535)) + (IOPATH datab combout (423:423:423) (391:391:391)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_END) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (2473:2473:2473) (2188:2188:2188)) + (PORT datab (329:329:329) (386:386:386)) + (PORT datad (533:533:533) (533:533:533)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (2472:2472:2472) (2187:2187:2187)) + (PORT datab (330:330:330) (387:387:387)) + (PORT datad (286:286:286) (344:344:344)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_ACTIVE) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT datab (546:546:546) (527:527:527)) + (PORT datad (469:469:469) (410:410:410)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_TRCD) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|trcd_end\~1) + (DELAY + (ABSOLUTE + (PORT datab (611:611:611) (568:568:568)) + (PORT datad (487:487:487) (420:420:420)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_READ) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (573:573:573) (575:575:575)) + (PORT datab (339:339:339) (394:394:394)) + (PORT datad (282:282:282) (340:340:340)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~2) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (417:417:417)) + (PORT datab (355:355:355) (416:416:416)) + (PORT datac (297:297:297) (368:368:368)) + (PORT datad (298:298:298) (363:363:363)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~4) + (DELAY + (ABSOLUTE + (PORT dataa (500:500:500) (442:442:442)) + (PORT datab (294:294:294) (302:302:302)) + (PORT datac (306:306:306) (374:374:374)) + (PORT datad (307:307:307) (366:366:366)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (PORT datab (341:341:341) (397:397:397)) + (PORT datac (513:513:513) (497:497:497)) + (PORT datad (956:956:956) (879:879:879)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (921:921:921) (800:800:800)) + (PORT datab (887:887:887) (758:758:758)) + (PORT datac (443:443:443) (380:380:380)) + (PORT datad (869:869:869) (763:763:763)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~3) + (DELAY + (ABSOLUTE + (PORT dataa (898:898:898) (841:841:841)) + (PORT datab (1195:1195:1195) (983:983:983)) + (PORT datac (251:251:251) (268:268:268)) + (PORT datad (793:793:793) (671:671:671)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_ack\~1) + (DELAY + (ABSOLUTE + (PORT dataa (349:349:349) (420:420:420)) + (PORT datab (357:357:357) (418:418:418)) + (PORT datac (303:303:303) (374:374:374)) + (PORT datad (302:302:302) (368:368:368)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~1) + (DELAY + (ABSOLUTE + (PORT dataa (270:270:270) (282:282:282)) + (PORT datab (843:843:843) (721:721:721)) + (PORT datac (470:470:470) (412:412:412)) + (PORT datad (835:835:835) (728:728:728)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (PORT ena (1599:1599:1599) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (322:322:322) (347:347:347)) + (PORT datab (374:374:374) (442:442:442)) + (PORT datad (925:925:925) (837:837:837)) + (IOPATH dataa combout (435:435:435) (419:419:419)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (282:282:282) (299:299:299)) + (PORT datab (377:377:377) (445:445:445)) + (PORT datad (341:341:341) (404:404:404)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (383:383:383) (443:443:443)) + (PORT datad (244:244:244) (259:259:259)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (589:589:589) (577:577:577)) + (PORT datab (350:350:350) (408:408:408)) + (PORT datac (327:327:327) (403:403:403)) + (PORT datad (239:239:239) (253:253:253)) + (IOPATH dataa combout (349:349:349) (377:377:377)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (577:577:577) (560:560:560)) + (PORT datab (937:937:937) (877:877:877)) + (PORT datac (788:788:788) (671:671:671)) + (PORT datad (828:828:828) (738:738:738)) + (IOPATH dataa combout (392:392:392) (419:419:419)) + (IOPATH datab combout (393:393:393) (431:431:431)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (647:647:647) (602:602:602)) + (PORT datad (235:235:235) (246:246:246)) + (IOPATH dataa combout (377:377:377) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (646:646:646) (601:601:601)) + (PORT datad (236:236:236) (247:247:247)) + (IOPATH dataa combout (375:375:375) (392:392:392)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (649:649:649) (605:605:605)) + (PORT datac (308:308:308) (375:375:375)) + (PORT datad (518:518:518) (505:505:505)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (PORT ena (1599:1599:1599) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (443:443:443)) + (PORT datab (382:382:382) (443:443:443)) + (PORT datac (339:339:339) (409:409:409)) + (PORT datad (333:333:333) (404:404:404)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1068:1068:1068) (1054:1054:1054)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT datab (320:320:320) (375:375:375)) + (PORT datac (277:277:277) (340:340:340)) + (PORT datad (815:815:815) (752:752:752)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|parity9) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (PORT ena (1599:1599:1599) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT datad (925:925:925) (837:837:837)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a0) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1068:1068:1068) (1054:1054:1054)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (319:319:319) (343:343:343)) + (PORT datab (375:375:375) (442:442:442)) + (PORT datac (538:538:538) (532:532:532)) + (PORT datad (922:922:922) (834:834:834)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (370:370:370) (441:441:441)) + (PORT datab (286:286:286) (298:298:298)) + (PORT datad (553:553:553) (537:537:537)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (284:284:284) (301:301:301)) + (PORT datab (383:383:383) (444:444:444)) + (PORT datac (337:337:337) (406:406:406)) + (PORT datad (336:336:336) (406:406:406)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (371:371:371) (442:442:442)) + (PORT datab (349:349:349) (407:407:407)) + (PORT datad (229:229:229) (237:237:237)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (906:906:906) (767:767:767)) + (PORT datad (850:850:850) (799:799:799)) + (IOPATH dataa combout (375:375:375) (392:392:392)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT asdata (959:959:959) (944:944:944)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (PORT ena (1599:1599:1599) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT asdata (1281:1281:1281) (1198:1198:1198)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT asdata (1977:1977:1977) (1802:1802:1802)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (PORT ena (1622:1622:1622) (1494:1494:1494)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1502:1502:1502) (1321:1321:1321)) + (PORT datab (349:349:349) (407:407:407)) + (PORT datad (298:298:298) (353:353:353)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT asdata (731:731:731) (796:796:796)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (PORT ena (1599:1599:1599) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT asdata (1299:1299:1299) (1213:1213:1213)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~0) + (DELAY + (ABSOLUTE + (PORT datab (357:357:357) (417:417:417)) + (PORT datac (850:850:850) (791:791:791)) + (PORT datad (330:330:330) (388:388:388)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~1) + (DELAY + (ABSOLUTE + (PORT dataa (908:908:908) (769:769:769)) + (PORT datad (229:229:229) (236:236:236)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT asdata (1012:1012:1012) (982:982:982)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (PORT ena (1599:1599:1599) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT asdata (1268:1268:1268) (1188:1188:1188)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1365:1365:1365) (1202:1202:1202)) + (PORT datab (1328:1328:1328) (1176:1176:1176)) + (PORT datad (794:794:794) (692:692:692)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (270:270:270) (282:282:282)) + (PORT datab (268:268:268) (275:275:275)) + (PORT datac (891:891:891) (786:786:786)) + (PORT datad (227:227:227) (234:234:234)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (1195:1195:1195) (974:974:974)) + (PORT datab (327:327:327) (347:347:347)) + (PORT datac (315:315:315) (385:385:385)) + (PORT datad (792:792:792) (666:666:666)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (1367:1367:1367) (1269:1269:1269)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1217:1217:1217) (1119:1119:1119)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT asdata (2068:2068:2068) (1878:1878:1878)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (515:515:515) (496:496:496)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1217:1217:1217) (1119:1119:1119)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT asdata (1673:1673:1673) (1571:1571:1571)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1614:1614:1614) (1452:1452:1452)) + (PORT datab (837:837:837) (727:727:727)) + (PORT datad (1264:1264:1264) (1150:1150:1150)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (899:899:899) (841:841:841)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (PORT ena (1599:1599:1599) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT asdata (1643:1643:1643) (1512:1512:1512)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT asdata (2336:2336:2336) (2108:2108:2108)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (PORT ena (1599:1599:1599) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT asdata (1370:1370:1370) (1292:1292:1292)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1581:1581:1581) (1433:1433:1433)) + (PORT datab (1882:1882:1882) (1640:1640:1640)) + (PORT datad (279:279:279) (334:334:334)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (270:270:270) (282:282:282)) + (PORT datab (1649:1649:1649) (1419:1419:1419)) + (PORT datac (448:448:448) (385:385:385)) + (PORT datad (228:228:228) (236:236:236)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (2006:2006:2006) (1774:1774:1774)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1613:1613:1613) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (548:548:548) (519:519:519)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1217:1217:1217) (1119:1119:1119)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT asdata (1652:1652:1652) (1553:1553:1553)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdempty_eq_comp_lsb\|data_wire\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datac (1292:1292:1292) (1163:1163:1163)) + (PORT datad (818:818:818) (729:729:729)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (1324:1324:1324) (1243:1243:1243)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1217:1217:1217) (1119:1119:1119)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT asdata (2055:2055:2055) (1876:1876:1876)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (1306:1306:1306) (1169:1169:1169)) + (PORT datab (268:268:268) (275:275:275)) + (PORT datad (1588:1588:1588) (1377:1377:1377)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (2039:2039:2039) (1867:1867:1867)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1613:1613:1613) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (1277:1277:1277) (1171:1171:1171)) + (PORT datab (1646:1646:1646) (1485:1485:1485)) + (PORT datad (279:279:279) (335:335:335)) + (IOPATH dataa combout (420:420:420) (450:450:450)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (851:851:851) (679:679:679)) + (PORT datab (270:270:270) (278:278:278)) + (PORT datac (228:228:228) (243:243:243)) + (PORT datad (230:230:230) (237:237:237)) + (IOPATH dataa combout (350:350:350) (371:371:371)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_en_dly) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1676:1676:1676)) + (PORT asdata (725:725:725) (787:787:787)) + (PORT clrn (5255:5255:5255) (5235:5235:5235)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|valid_wreq) + (DELAY + (ABSOLUTE + (PORT dataa (335:335:335) (400:400:400)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datac combout (415:415:415) (429:429:429)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (PORT datab (945:945:945) (829:829:829)) + (IOPATH dataa combout (408:408:408) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1680:1680:1680)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (1532:1532:1532) (1370:1370:1370)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (391:391:391)) + (PORT datab (344:344:344) (405:405:405)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5193:5193:5193)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (326:326:326) (388:388:388)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~6) + (DELAY + (ABSOLUTE + (PORT datab (327:327:327) (384:384:384)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|bit_cnt\~0) + (DELAY + (ABSOLUTE + (PORT datab (346:346:346) (408:408:408)) + (PORT datac (226:226:226) (242:242:242)) + (PORT datad (247:247:247) (262:262:262)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5193:5193:5193)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (863:863:863) (765:765:765)) + (PORT datab (325:325:325) (382:382:382)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (333:333:333) (393:393:393)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (325:325:325) (382:382:382)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (326:326:326) (383:383:383)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (392:392:392)) + (PORT datab (328:328:328) (385:385:385)) + (PORT datac (283:283:283) (348:348:348)) + (PORT datad (286:286:286) (345:345:345)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (884:884:884) (800:800:800)) + (PORT datab (621:621:621) (578:578:578)) + (PORT datac (525:525:525) (519:519:519)) + (PORT datad (864:864:864) (787:787:787)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT datab (334:334:334) (395:395:395)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT datad (495:495:495) (482:482:482)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~3) + (DELAY + (ABSOLUTE + (PORT dataa (550:550:550) (458:458:458)) + (PORT datab (550:550:550) (464:464:464)) + (PORT datac (226:226:226) (241:241:241)) + (PORT datad (509:509:509) (501:501:501)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (394:394:394)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5415:5415:5415) (5448:5448:5448)) + (PORT sclr (1065:1065:1065) (1046:1046:1046)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (884:884:884) (801:801:801)) + (PORT datab (621:621:621) (579:579:579)) + (PORT datac (526:526:526) (520:520:520)) + (PORT datad (865:865:865) (788:788:788)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (491:491:491) (437:437:437)) + (PORT datab (268:268:268) (275:275:275)) + (PORT datac (502:502:502) (434:434:434)) + (PORT datad (508:508:508) (500:500:500)) + (IOPATH dataa combout (394:394:394) (400:400:400)) + (IOPATH datab combout (400:400:400) (391:391:391)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5193:5193:5193)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|bit_cnt\~1) + (DELAY + (ABSOLUTE + (PORT datab (287:287:287) (300:300:300)) + (PORT datac (303:303:303) (375:375:375)) + (PORT datad (227:227:227) (234:234:234)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5193:5193:5193)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|always5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (394:394:394)) + (PORT datab (329:329:329) (386:386:386)) + (PORT datac (283:283:283) (349:349:349)) + (PORT datad (287:287:287) (347:347:347)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|always5\~1) + (DELAY + (ABSOLUTE + (PORT datac (303:303:303) (374:374:374)) + (PORT datad (248:248:248) (263:263:263)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|rd_en) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1677:1677:1677)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5210:5210:5210) (5193:5193:5193)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~1) + (DELAY + (ABSOLUTE + (PORT dataa (882:882:882) (827:827:827)) + (PORT datab (953:953:953) (866:866:866)) + (PORT datac (913:913:913) (848:848:848)) + (PORT datad (881:881:881) (831:831:831)) + (IOPATH dataa combout (349:349:349) (371:371:371)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~0) + (DELAY + (ABSOLUTE + (PORT dataa (340:340:340) (406:406:406)) + (PORT datac (514:514:514) (503:503:503)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~2) + (DELAY + (ABSOLUTE + (PORT dataa (880:880:880) (742:742:742)) + (PORT datab (269:269:269) (276:276:276)) + (PORT datad (228:228:228) (235:235:235)) + (IOPATH dataa combout (392:392:392) (419:419:419)) + (IOPATH datab combout (400:400:400) (391:391:391)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~4) + (DELAY + (ABSOLUTE + (PORT dataa (805:805:805) (656:656:656)) + (PORT datad (880:880:880) (830:830:830)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (554:554:554) (538:538:538)) + (PORT datab (559:559:559) (547:547:547)) + (PORT datac (292:292:292) (364:364:364)) + (PORT datad (879:879:879) (830:830:830)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1662:1662:1662) (1680:1680:1680)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (1532:1532:1532) (1370:1370:1370)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT asdata (727:727:727) (789:789:789)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (PORT ena (1599:1599:1599) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT asdata (955:955:955) (936:936:936)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (PORT ena (1599:1599:1599) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (576:576:576) (561:561:561)) + (PORT datab (356:356:356) (417:417:417)) + (PORT datac (299:299:299) (362:362:362)) + (PORT datad (538:538:538) (524:524:524)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (915:915:915) (866:866:866)) + (PORT datab (995:995:995) (912:912:912)) + (PORT datac (941:941:941) (864:864:864)) + (PORT datad (890:890:890) (767:767:767)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (1246:1246:1246) (1145:1145:1145)) + (PORT datad (242:242:242) (256:256:256)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (1282:1282:1282) (1163:1163:1163)) + (PORT datac (1246:1246:1246) (1146:1146:1146)) + (PORT datad (242:242:242) (256:256:256)) + (IOPATH dataa combout (435:435:435) (444:444:444)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (1339:1339:1339) (1248:1248:1248)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (PORT ena (1613:1613:1613) (1466:1466:1466)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1233:1233:1233) (1118:1118:1118)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1655:1655:1655) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1216:1216:1216) (1117:1117:1117)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1655:1655:1655) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1561:1561:1561) (1361:1361:1361)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (PORT ena (1981:1981:1981) (1791:1791:1791)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT asdata (732:732:732) (799:799:799)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT asdata (1734:1734:1734) (1585:1585:1585)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (PORT ena (1622:1622:1622) (1494:1494:1494)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT asdata (1330:1330:1330) (1254:1254:1254)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT asdata (1960:1960:1960) (1748:1748:1748)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (PORT ena (1622:1622:1622) (1494:1494:1494)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (864:864:864) (804:804:804)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (872:872:872) (800:800:800)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (537:537:537) (518:518:518)) + (PORT datab (324:324:324) (381:381:381)) + (PORT datac (292:292:292) (361:361:361)) + (PORT datad (513:513:513) (501:501:501)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (321:321:321) (381:381:381)) + (PORT datab (327:327:327) (384:384:384)) + (PORT datac (290:290:290) (358:358:358)) + (PORT datad (243:243:243) (257:257:257)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (395:395:395)) + (PORT datab (320:320:320) (374:374:374)) + (PORT datac (292:292:292) (361:361:361)) + (PORT datad (828:828:828) (719:719:719)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1655:1655:1655) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1655:1655:1655) (1673:1673:1673)) + (PORT asdata (1714:1714:1714) (1583:1583:1583)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (279:279:279) (342:342:342)) + (PORT datad (227:227:227) (234:234:234)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1655:1655:1655) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (863:863:863) (787:787:787)) + (PORT datab (834:834:834) (734:734:734)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~4) + (DELAY + (ABSOLUTE + (PORT dataa (584:584:584) (535:535:535)) + (PORT datab (872:872:872) (793:793:793)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~6) + (DELAY + (ABSOLUTE + (PORT dataa (533:533:533) (510:510:510)) + (PORT datab (913:913:913) (816:816:816)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (270:270:270) (282:282:282)) + (PORT datab (276:276:276) (286:286:286)) + (PORT datac (234:234:234) (252:252:252)) + (PORT datad (235:235:235) (246:246:246)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT datab (329:329:329) (387:387:387)) + (PORT datac (294:294:294) (363:363:363)) + (PORT datad (517:517:517) (505:505:505)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT datab (329:329:329) (387:387:387)) + (PORT datac (291:291:291) (359:359:359)) + (PORT datad (244:244:244) (258:258:258)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~8) + (DELAY + (ABSOLUTE + (PORT dataa (1228:1228:1228) (1076:1076:1076)) + (PORT datab (893:893:893) (819:819:819)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~10) + (DELAY + (ABSOLUTE + (PORT dataa (866:866:866) (806:806:806)) + (PORT datab (960:960:960) (850:850:850)) + (IOPATH dataa combout (414:414:414) (450:450:450)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~12) + (DELAY + (ABSOLUTE + (PORT dataa (1158:1158:1158) (1023:1023:1023)) + (PORT datab (901:901:901) (829:829:829)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~16) + (DELAY + (ABSOLUTE + (PORT dataa (919:919:919) (848:848:848)) + (PORT datab (942:942:942) (838:838:838)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (423:423:423) (453:453:453)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (879:879:879) (768:768:768)) + (PORT datab (837:837:837) (717:717:717)) + (PORT datac (904:904:904) (781:781:781)) + (PORT datad (835:835:835) (719:719:719)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_en\~1) + (DELAY + (ABSOLUTE + (PORT dataa (278:278:278) (292:292:292)) + (PORT datab (964:964:964) (881:881:881)) + (PORT datad (228:228:228) (235:235:235)) + (IOPATH dataa combout (392:392:392) (419:419:419)) + (IOPATH datab combout (400:400:400) (391:391:391)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_en) + (DELAY + (ABSOLUTE + (PORT clk (1659:1659:1659) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (5255:5255:5255) (5235:5235:5235)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_rdreq\~0) + (DELAY + (ABSOLUTE + (PORT datab (318:318:318) (372:372:372)) + (PORT datac (1276:1276:1276) (1143:1143:1143)) + (PORT datad (1255:1255:1255) (1125:1125:1125)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (354:354:354) (419:419:419)) + (PORT datab (328:328:328) (348:348:348)) + (PORT datac (787:787:787) (706:706:706)) + (PORT datad (527:527:527) (514:514:514)) + (IOPATH dataa combout (349:349:349) (371:371:371)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (229:229:229) (236:236:236)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (299:299:299) (321:321:321)) + (PORT datad (322:322:322) (388:388:388)) + (IOPATH dataa combout (375:375:375) (392:392:392)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (546:546:546) (543:543:543)) + (PORT datab (572:572:572) (552:552:552)) + (PORT datac (251:251:251) (277:277:277)) + (PORT datad (323:323:323) (388:388:388)) + (IOPATH dataa combout (392:392:392) (419:419:419)) + (IOPATH datab combout (393:393:393) (431:431:431)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6\~0) + (DELAY + (ABSOLUTE + (PORT datab (307:307:307) (321:321:321)) + (PORT datad (524:524:524) (514:514:514)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (947:947:947) (862:862:862)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1645:1645:1645)) + (PORT ena (1622:1622:1622) (1494:1494:1494)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT asdata (1331:1331:1331) (1257:1257:1257)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datac (296:296:296) (365:365:365)) + (PORT datad (240:240:240) (253:253:253)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1675:1675:1675)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1689:1689:1689) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (272:272:272) (284:284:284)) + (PORT datab (269:269:269) (276:276:276)) + (PORT datac (227:227:227) (242:242:242)) + (PORT datad (228:228:228) (236:236:236)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT dataa (579:579:579) (564:564:564)) + (PORT datad (312:312:312) (375:375:375)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1661:1661:1661) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1693:1693:1693) (1643:1643:1643)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~18) + (DELAY + (ABSOLUTE + (PORT dataa (923:923:923) (830:830:830)) + (PORT datad (861:861:861) (793:793:793)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~2) + (DELAY + (ABSOLUTE + (PORT dataa (269:269:269) (280:280:280)) + (PORT datab (1908:1908:1908) (1567:1567:1567)) + (PORT datac (1818:1818:1818) (1517:1517:1517)) + (PORT datad (252:252:252) (261:261:261)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1818:1818:1818) (1528:1528:1528)) + (PORT datab (289:289:289) (297:297:297)) + (PORT datac (250:250:250) (266:266:266)) + (PORT datad (225:225:225) (233:233:233)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1578:1578:1578) (1419:1419:1419)) + (PORT datab (888:888:888) (829:829:829)) + (PORT datac (1141:1141:1141) (1016:1016:1016)) + (PORT datad (307:307:307) (366:366:366)) + (IOPATH dataa combout (349:349:349) (377:377:377)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (570:570:570) (572:572:572)) + (PORT datad (310:310:310) (369:369:369)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector3\~1) + (DELAY + (ABSOLUTE + (PORT dataa (295:295:295) (314:314:314)) + (PORT datab (1189:1189:1189) (1054:1054:1054)) + (PORT datac (1498:1498:1498) (1310:1310:1310)) + (PORT datad (230:230:230) (238:238:238)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.READ) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~7) + (DELAY + (ABSOLUTE + (PORT datab (624:624:624) (587:587:587)) + (PORT datac (501:501:501) (460:460:460)) + (PORT datad (529:529:529) (520:520:520)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (497:497:497)) + (PORT datab (362:362:362) (424:424:424)) + (PORT datad (250:250:250) (258:258:258)) + (IOPATH dataa combout (350:350:350) (371:371:371)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_DATA) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|twrite_end\~0) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (423:423:423)) + (PORT datab (349:349:349) (412:412:412)) + (PORT datac (304:304:304) (376:376:376)) + (PORT datad (303:303:303) (369:369:369)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|twrite_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (546:546:546) (499:499:499)) + (PORT datab (318:318:318) (334:334:334)) + (PORT datac (349:349:349) (431:431:431)) + (PORT datad (795:795:795) (644:644:644)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_PRE) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (300:300:300) (316:316:316)) + (PORT datad (526:526:526) (516:516:516)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|trp_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (547:547:547) (501:501:501)) + (PORT datab (336:336:336) (396:396:396)) + (PORT datac (276:276:276) (301:301:301)) + (PORT datad (490:490:490) (422:422:422)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_END) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1262:1262:1262) (1132:1132:1132)) + (PORT datab (1549:1549:1549) (1343:1343:1343)) + (PORT datad (251:251:251) (269:269:269)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.WRITE) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (575:575:575) (577:577:577)) + (PORT datab (346:346:346) (404:404:404)) + (PORT datac (1214:1214:1214) (1090:1090:1090)) + (PORT datad (302:302:302) (358:358:358)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (809:809:809) (704:704:704)) + (PORT datab (269:269:269) (276:276:276)) + (PORT datac (226:226:226) (241:241:241)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.ARBIT) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT datab (1110:1110:1110) (1069:1069:1069)) + (PORT datac (308:308:308) (376:376:376)) + (IOPATH datab combout (423:423:423) (391:391:391)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1234:1234:1234) (1106:1106:1106)) + (PORT datab (363:363:363) (432:432:432)) + (PORT datad (565:565:565) (548:548:548)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\~4) + (DELAY + (ABSOLUTE + (PORT datad (574:574:574) (547:547:547)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\~2) + (DELAY + (ABSOLUTE + (PORT dataa (643:643:643) (598:598:598)) + (PORT datad (293:293:293) (355:355:355)) + (IOPATH dataa combout (420:420:420) (400:400:400)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (PORT ena (1018:1018:1018) (991:991:991)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~15) + (DELAY + (ABSOLUTE + (PORT datac (284:284:284) (350:350:350)) + (PORT datad (290:290:290) (351:351:351)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (291:291:291) (309:309:309)) + (PORT datad (549:549:549) (522:522:522)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~1) + (DELAY + (ABSOLUTE + (PORT datab (278:278:278) (287:287:287)) + (PORT datad (311:311:311) (380:380:380)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT datab (350:350:350) (416:416:416)) + (PORT datac (290:290:290) (358:358:358)) + (PORT datad (518:518:518) (514:514:514)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (640:640:640) (596:596:596)) + (PORT datab (325:325:325) (382:382:382)) + (PORT datac (245:245:245) (269:269:269)) + (PORT datad (300:300:300) (355:355:355)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH datab combout (400:400:400) (391:391:391)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (300:300:300) (323:323:323)) + (PORT datab (341:341:341) (404:404:404)) + (PORT datad (236:236:236) (247:247:247)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~0) + (DELAY + (ABSOLUTE + (PORT dataa (565:565:565) (562:562:562)) + (PORT datab (274:274:274) (284:284:284)) + (PORT datad (310:310:310) (379:379:379)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (560:560:560) (557:557:557)) + (PORT datab (351:351:351) (417:417:417)) + (PORT datac (292:292:292) (360:360:360)) + (PORT datad (301:301:301) (367:367:367)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector3\~1) + (DELAY + (ABSOLUTE + (PORT datab (269:269:269) (276:276:276)) + (PORT datac (306:306:306) (373:373:373)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_TRF) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~2) + (DELAY + (ABSOLUTE + (PORT dataa (299:299:299) (322:322:322)) + (PORT datab (344:344:344) (407:407:407)) + (PORT datad (235:235:235) (246:246:246)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|trc_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (557:557:557) (554:554:554)) + (PORT datab (351:351:351) (417:417:417)) + (PORT datac (293:293:293) (361:361:361)) + (PORT datad (301:301:301) (366:366:366)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (287:287:287) (306:306:306)) + (PORT datab (272:272:272) (280:280:280)) + (PORT datac (287:287:287) (353:353:353)) + (PORT datad (258:258:258) (280:280:280)) + (IOPATH dataa combout (420:420:420) (400:400:400)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AUTO_REF) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[1\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (641:641:641) (597:597:597)) + (PORT datac (308:308:308) (375:375:375)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (PORT ena (1018:1018:1018) (991:991:991)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~17) + (DELAY + (ABSOLUTE + (PORT dataa (300:300:300) (323:323:323)) + (PORT datab (337:337:337) (397:397:397)) + (PORT datac (286:286:286) (352:352:352)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_END) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|aref_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (1110:1110:1110) (1069:1069:1069)) + (PORT datac (308:308:308) (376:376:376)) + (PORT datad (562:562:562) (545:545:545)) + (IOPATH datab combout (423:423:423) (391:391:391)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.AREF) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (PORT ena (973:973:973) (947:947:947)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~3) + (DELAY + (ABSOLUTE + (PORT datad (242:242:242) (256:256:256)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1634:1634:1634)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~2) + (DELAY + (ABSOLUTE + (PORT datab (389:389:389) (460:460:460)) + (PORT datad (247:247:247) (261:261:261)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1634:1634:1634)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~1) + (DELAY + (ABSOLUTE + (PORT datab (354:354:354) (414:414:414)) + (PORT datac (339:339:339) (417:417:417)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1217:1217:1217) (1074:1074:1074)) + (PORT datab (385:385:385) (457:457:457)) + (PORT datad (245:245:245) (260:260:260)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1634:1634:1634)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (395:395:395)) + (PORT datab (385:385:385) (457:457:457)) + (PORT datac (285:285:285) (351:351:351)) + (PORT datad (243:243:243) (258:258:258)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (854:854:854) (793:793:793)) + (PORT datad (306:306:306) (365:365:365)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~10) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (910:910:910) (808:808:808)) + (PORT datab (900:900:900) (801:801:801)) + (PORT datac (800:800:800) (725:725:725)) + (PORT datad (855:855:855) (786:786:786)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\~0) + (DELAY + (ABSOLUTE + (PORT dataa (840:840:840) (701:701:701)) + (PORT datab (269:269:269) (275:275:275)) + (PORT datac (227:227:227) (242:242:242)) + (PORT datad (235:235:235) (246:246:246)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1674:1674:1674)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1639:1639:1639)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~2) + (DELAY + (ABSOLUTE + (PORT datab (338:338:338) (393:393:393)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~4) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (394:394:394)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~8) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (394:394:394)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~14) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~16) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (396:396:396)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~18) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~20) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~22) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (391:391:391)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~24) + (DELAY + (ABSOLUTE + (PORT datab (325:325:325) (382:382:382)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~28) + (DELAY + (ABSOLUTE + (PORT datad (497:497:497) (479:479:479)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1684:1684:1684)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1696:1696:1696) (1649:1649:1649)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (328:328:328) (390:390:390)) + (PORT datab (534:534:534) (515:515:515)) + (PORT datac (283:283:283) (350:350:350)) + (PORT datad (284:284:284) (342:342:342)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (847:847:847) (770:770:770)) + (PORT datab (884:884:884) (796:796:796)) + (PORT datac (842:842:842) (754:754:754)) + (PORT datad (864:864:864) (767:767:767)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (832:832:832) (763:763:763)) + (PORT datac (740:740:740) (629:629:629)) + (PORT datad (226:226:226) (233:233:233)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (908:908:908) (805:805:805)) + (PORT datab (896:896:896) (797:797:797)) + (PORT datac (795:795:795) (720:720:720)) + (PORT datad (856:856:856) (787:787:787)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (857:857:857) (797:797:797)) + (PORT datab (277:277:277) (287:287:287)) + (PORT datac (485:485:485) (408:408:408)) + (PORT datad (307:307:307) (366:366:366)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_IDLE\~0) + (DELAY + (ABSOLUTE + (PORT datad (236:236:236) (246:246:246)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1674:1674:1674)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1639:1639:1639)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (270:270:270) (282:282:282)) + (PORT datab (364:364:364) (419:419:419)) + (PORT datac (228:228:228) (243:243:243)) + (PORT datad (1246:1246:1246) (1093:1093:1093)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~4) + (DELAY + (ABSOLUTE + (PORT dataa (558:558:558) (547:547:547)) + (PORT datab (284:284:284) (296:296:296)) + (PORT datad (316:316:316) (378:378:378)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1634:1634:1634)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT datab (386:386:386) (457:457:457)) + (PORT datad (312:312:312) (374:374:374)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_END\~0) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (395:395:395)) + (PORT datab (386:386:386) (456:456:456)) + (PORT datad (486:486:486) (434:434:434)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_END) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1634:1634:1634)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (407:407:407)) + (PORT datab (362:362:362) (432:432:432)) + (PORT datac (1187:1187:1187) (1065:1065:1065)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_PCHA) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (614:614:614) (568:568:568)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (621:621:621) (572:572:572)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (555:555:555) (533:533:533)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~8) + (DELAY + (ABSOLUTE + (PORT datab (549:549:549) (524:524:524)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~4) + (DELAY + (ABSOLUTE + (PORT datac (488:488:488) (414:414:414)) + (PORT datad (293:293:293) (321:321:321)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[3\]\~1) + (DELAY + (ABSOLUTE + (PORT datac (1528:1528:1528) (1349:1349:1349)) + (PORT datad (300:300:300) (329:329:329)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT ena (968:968:968) (936:936:936)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~10) + (DELAY + (ABSOLUTE + (PORT datab (348:348:348) (407:407:407)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[5\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (591:591:591) (498:498:498)) + (PORT datab (1315:1315:1315) (1208:1208:1208)) + (PORT datad (228:228:228) (235:235:235)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~12) + (DELAY + (ABSOLUTE + (PORT datab (348:348:348) (406:406:406)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[6\]\~9) + (DELAY + (ABSOLUTE + (PORT dataa (590:590:590) (497:497:497)) + (PORT datab (1315:1315:1315) (1209:1209:1209)) + (PORT datad (228:228:228) (236:236:236)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~14) + (DELAY + (ABSOLUTE + (PORT dataa (350:350:350) (412:412:412)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[7\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (596:596:596) (503:503:503)) + (PORT datab (1312:1312:1312) (1206:1206:1206)) + (PORT datad (227:227:227) (234:234:234)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~0) + (DELAY + (ABSOLUTE + (PORT datac (489:489:489) (416:416:416)) + (PORT datad (297:297:297) (325:325:325)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT ena (968:968:968) (936:936:936)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~7) + (DELAY + (ABSOLUTE + (PORT datac (490:490:490) (418:418:418)) + (PORT datad (300:300:300) (328:328:328)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT ena (968:968:968) (936:936:936)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~8) + (DELAY + (ABSOLUTE + (PORT datab (336:336:336) (361:361:361)) + (PORT datad (443:443:443) (383:383:383)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (PORT ena (968:968:968) (936:936:936)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (350:350:350) (413:413:413)) + (PORT datab (348:348:348) (406:406:406)) + (PORT datac (296:296:296) (360:360:360)) + (PORT datad (299:299:299) (355:355:355)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (350:350:350) (414:414:414)) + (PORT datab (612:612:612) (570:570:570)) + (PORT datac (228:228:228) (243:243:243)) + (PORT datad (549:549:549) (522:522:522)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (559:559:559) (548:548:548)) + (PORT datab (346:346:346) (404:404:404)) + (PORT datac (561:561:561) (533:533:533)) + (PORT datad (225:225:225) (232:232:232)) + (IOPATH dataa combout (350:350:350) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~16) + (DELAY + (ABSOLUTE + (PORT datab (544:544:544) (525:525:525)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[8\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1573:1573:1573) (1389:1389:1389)) + (PORT datab (334:334:334) (358:358:358)) + (PORT datad (477:477:477) (403:403:403)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~18) + (DELAY + (ABSOLUTE + (PORT datad (311:311:311) (371:371:371)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[9\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (590:590:590) (497:497:497)) + (PORT datab (1316:1316:1316) (1209:1209:1209)) + (PORT datad (230:230:230) (237:237:237)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1679:1679:1679)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1692:1692:1692) (1644:1644:1644)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (618:618:618) (568:568:568)) + (PORT datab (351:351:351) (409:409:409)) + (PORT datac (305:305:305) (373:373:373)) + (PORT datad (548:548:548) (519:519:519)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT datab (267:267:267) (274:274:274)) + (PORT datac (309:309:309) (376:376:376)) + (PORT datad (311:311:311) (371:371:371)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_req\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1152:1152:1152) (971:971:971)) + (PORT datab (344:344:344) (399:399:399)) + (PORT datad (1094:1094:1094) (907:907:907)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_req) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT datac (845:845:845) (795:795:795)) + (PORT datad (307:307:307) (366:366:366)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|wr_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1263:1263:1263) (1133:1133:1133)) + (PORT datab (1549:1549:1549) (1343:1343:1343)) + (PORT datad (251:251:251) (269:269:269)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|wr_en) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1259:1259:1259) (1128:1128:1128)) + (PORT datab (333:333:333) (391:391:391)) + (PORT datad (2432:2432:2432) (2146:2146:2146)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~1) + (DELAY + (ABSOLUTE + (PORT datab (616:616:616) (575:575:575)) + (PORT datac (866:866:866) (814:814:814)) + (PORT datad (509:509:509) (494:494:494)) + (IOPATH datab combout (423:423:423) (391:391:391)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (304:304:304) (320:320:320)) + (PORT datab (337:337:337) (397:397:397)) + (PORT datac (227:227:227) (242:242:242)) + (PORT datad (506:506:506) (493:493:493)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (954:954:954) (845:845:845)) + (PORT datab (497:497:497) (438:438:438)) + (PORT datac (225:225:225) (240:240:240)) + (PORT datad (430:430:430) (361:361:361)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT datab (336:336:336) (398:398:398)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (402:402:402)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT datab (325:325:325) (382:382:382)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (327:327:327) (384:384:384)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (396:396:396)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (398:398:398)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (PORT sclr (844:844:844) (900:900:900)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~5) + (DELAY + (ABSOLUTE + (PORT datab (621:621:621) (585:585:585)) + (PORT datad (527:527:527) (519:519:519)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (863:863:863) (786:786:786)) + (PORT datad (803:803:803) (700:700:700)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_TRCD) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|trcd_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (547:547:547) (501:501:501)) + (PORT datab (319:319:319) (335:335:335)) + (PORT datac (549:549:549) (527:527:527)) + (PORT datad (490:490:490) (422:422:422)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_WRITE) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack\~2) + (DELAY + (ABSOLUTE + (PORT dataa (349:349:349) (420:420:420)) + (PORT datab (345:345:345) (408:408:408)) + (PORT datac (301:301:301) (373:373:373)) + (PORT datad (301:301:301) (366:366:366)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack\~3) + (DELAY + (ABSOLUTE + (PORT dataa (547:547:547) (501:501:501)) + (PORT datab (315:315:315) (331:331:331)) + (PORT datac (342:342:342) (423:423:423)) + (PORT datad (476:476:476) (402:402:402)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1309:1309:1309) (1165:1165:1165)) + (PORT datab (340:340:340) (395:395:395)) + (PORT datac (297:297:297) (360:360:360)) + (PORT datad (1229:1229:1229) (1103:1103:1103)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1233:1233:1233) (1108:1108:1108)) + (PORT datab (1539:1539:1539) (1331:1331:1331)) + (PORT datac (1131:1131:1131) (919:919:919)) + (PORT datad (228:228:228) (235:235:235)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (388:388:388) (457:457:457)) + (PORT datab (282:282:282) (294:294:294)) + (PORT datad (1235:1235:1235) (1113:1113:1113)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~12) + (DELAY + (ABSOLUTE + (PORT dataa (1335:1335:1335) (1177:1177:1177)) + (PORT datab (957:957:957) (858:858:858)) + (PORT datac (1185:1185:1185) (1060:1060:1060)) + (PORT datad (883:883:883) (800:800:800)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (PORT ena (1667:1667:1667) (1526:1526:1526)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~11) + (DELAY + (ABSOLUTE + (PORT dataa (913:913:913) (846:846:846)) + (PORT datab (1217:1217:1217) (1080:1080:1080)) + (PORT datac (1223:1223:1223) (1091:1091:1091)) + (IOPATH dataa combout (435:435:435) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (PORT ena (1033:1033:1033) (1005:1005:1005)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (325:325:325) (385:385:385)) + (PORT datac (276:276:276) (339:339:339)) + (PORT datad (877:877:877) (799:799:799)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|parity6) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (PORT ena (1667:1667:1667) (1526:1526:1526)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (868:868:868) (798:798:798)) + (PORT datab (378:378:378) (438:438:438)) + (PORT datac (317:317:317) (388:388:388)) + (PORT datad (937:937:937) (824:824:824)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (227:227:227) (235:235:235)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (271:271:271) (282:282:282)) + (PORT datab (348:348:348) (406:406:406)) + (PORT datac (1152:1152:1152) (1032:1032:1032)) + (PORT datad (936:936:936) (823:823:823)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1336:1336:1336) (1179:1179:1179)) + (PORT datab (293:293:293) (308:308:308)) + (PORT datad (882:882:882) (799:799:799)) + (IOPATH dataa combout (373:373:373) (380:380:380)) + (IOPATH datab combout (377:377:377) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT dataa (1339:1339:1339) (1183:1183:1183)) + (PORT datab (954:954:954) (854:854:854)) + (PORT datac (251:251:251) (275:275:275)) + (PORT datad (878:878:878) (795:795:795)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (423:423:423) (380:380:380)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (226:226:226) (233:233:233)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10\~0) + (DELAY + (ABSOLUTE + (PORT datab (351:351:351) (409:409:409)) + (PORT datad (233:233:233) (243:243:243)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10) + (DELAY + (ABSOLUTE + (PORT clk (1646:1646:1646) (1666:1666:1666)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1679:1679:1679) (1631:1631:1631)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1647:1647:1647) (1667:1667:1667)) + (PORT asdata (1593:1593:1593) (1471:1471:1471)) + (PORT clrn (1679:1679:1679) (1632:1632:1632)) + (PORT ena (1033:1033:1033) (1005:1005:1005)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (976:976:976) (885:885:885)) + (PORT datab (884:884:884) (818:818:818)) + (PORT datad (528:528:528) (511:511:511)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1118:1118:1118) (923:923:923)) + (PORT datab (321:321:321) (340:340:340)) + (PORT datac (307:307:307) (381:381:381)) + (PORT datad (810:810:810) (691:691:691)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datab combout (423:423:423) (391:391:391)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (270:270:270) (282:282:282)) + (PORT datab (331:331:331) (350:350:350)) + (PORT datac (446:446:446) (384:384:384)) + (PORT datad (934:934:934) (849:849:849)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (431:431:431)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1663:1663:1663)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1676:1676:1676) (1628:1628:1628)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (318:318:318) (377:377:377)) + (PORT datad (278:278:278) (333:333:333)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[0\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2044:2044:2044) (2012:2012:2012)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[1\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2044:2044:2044) (2012:2012:2012)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE rx\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (778:778:778) (803:803:803)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg1\~0) + (DELAY + (ABSOLUTE + (PORT datad (3671:3671:3671) (3716:3716:3716)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg1) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg2\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (278:278:278) (333:333:333)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg2) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg3\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (285:285:285) (343:343:343)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg3) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1670:1670:1670)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1635:1635:1635)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[7\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (877:877:877) (798:798:798)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|bit_cnt\~0) + (DELAY + (ABSOLUTE + (PORT dataa (272:272:272) (284:284:284)) + (PORT datab (353:353:353) (419:419:419)) + (PORT datad (250:250:250) (268:268:268)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1672:1672:1672)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1637:1637:1637)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always8\~0) + (DELAY + (ABSOLUTE + (PORT datab (293:293:293) (308:308:308)) + (PORT datac (310:310:310) (385:385:385)) + (PORT datad (303:303:303) (372:372:372)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1933:1933:1933) (1711:1711:1711)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT asdata (710:710:710) (775:775:775)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1933:1933:1933) (1711:1711:1711)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (285:285:285) (344:344:344)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1933:1933:1933) (1711:1711:1711)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (287:287:287) (345:345:345)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1933:1933:1933) (1711:1711:1711)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (284:284:284) (342:342:342)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1933:1933:1933) (1711:1711:1711)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (288:288:288) (347:347:347)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1933:1933:1933) (1711:1711:1711)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (288:288:288) (347:347:347)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1933:1933:1933) (1711:1711:1711)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (287:287:287) (345:345:345)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1933:1933:1933) (1711:1711:1711)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (279:279:279) (334:334:334)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1918:1918:1918) (1761:1761:1761)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|ram_address_a\[9\]) + (DELAY + (ABSOLUTE + (PORT datad (307:307:307) (366:366:366)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0\~_wirecell) + (DELAY + (ABSOLUTE + (PORT datad (1242:1242:1242) (1115:1115:1115)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT datab (1216:1216:1216) (1078:1078:1078)) + (PORT datac (866:866:866) (805:805:805)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (284:284:284) (342:342:342)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1918:1918:1918) (1761:1761:1761)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (286:286:286) (345:345:345)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1918:1918:1918) (1761:1761:1761)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (289:289:289) (348:348:348)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1918:1918:1918) (1761:1761:1761)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (286:286:286) (345:345:345)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1918:1918:1918) (1761:1761:1761)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (285:285:285) (343:343:343)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1918:1918:1918) (1761:1761:1761)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (286:286:286) (345:345:345)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1918:1918:1918) (1761:1761:1761)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1648:1648:1648) (1668:1668:1668)) + (PORT asdata (710:710:710) (775:775:775)) + (PORT clrn (1681:1681:1681) (1633:1633:1633)) + (PORT ena (1918:1918:1918) (1761:1761:1761)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (944:944:944) (885:885:885)) + (PORT d[1] (1009:1009:1009) (935:935:935)) + (PORT d[2] (957:957:957) (881:881:881)) + (PORT d[3] (940:940:940) (877:877:877)) + (PORT d[4] (968:968:968) (901:901:901)) + (PORT d[5] (969:969:969) (904:904:904)) + (PORT d[6] (957:957:957) (881:881:881)) + (PORT d[7] (935:935:935) (879:879:879)) + (PORT d[8] (587:587:587) (540:540:540)) + (PORT clk (2012:2012:2012) (2055:2055:2055)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1304:1304:1304) (1188:1188:1188)) + (PORT d[1] (1508:1508:1508) (1410:1410:1410)) + (PORT d[2] (1342:1342:1342) (1240:1240:1240)) + (PORT d[3] (1698:1698:1698) (1541:1541:1541)) + (PORT d[4] (1287:1287:1287) (1184:1184:1184)) + (PORT d[5] (1361:1361:1361) (1239:1239:1239)) + (PORT d[6] (1658:1658:1658) (1504:1504:1504)) + (PORT d[7] (1282:1282:1282) (1162:1162:1162)) + (PORT d[8] (1328:1328:1328) (1229:1229:1229)) + (PORT d[9] (1186:1186:1186) (1012:1012:1012)) + (PORT clk (2009:2009:2009) (2051:2051:2051)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (2346:2346:2346) (2035:2035:2035)) + (PORT clk (2009:2009:2009) (2051:2051:2051)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2012:2012:2012) (2055:2055:2055)) + (PORT d[0] (2968:2968:2968) (2667:2667:2667)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2013:2013:2013) (2056:2056:2056)) + (IOPATH (posedge clk) pulse (0:0:0) (2490:2490:2490)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2013:2013:2013) (2056:2056:2056)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2013:2013:2013) (2056:2056:2056)) + (IOPATH (posedge clk) pulse (0:0:0) (3129:3129:3129)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2013:2013:2013) (2056:2056:2056)) + (IOPATH (posedge clk) pulse (0:0:0) (3129:3129:3129)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1226:1226:1226) (1084:1084:1084)) + (PORT d[1] (1475:1475:1475) (1381:1381:1381)) + (PORT d[2] (1682:1682:1682) (1520:1520:1520)) + (PORT d[3] (1323:1323:1323) (1222:1222:1222)) + (PORT d[4] (1647:1647:1647) (1485:1485:1485)) + (PORT d[5] (1038:1038:1038) (976:976:976)) + (PORT d[6] (1269:1269:1269) (1160:1160:1160)) + (PORT d[7] (1272:1272:1272) (1153:1153:1153)) + (PORT d[8] (1310:1310:1310) (1218:1218:1218)) + (PORT d[9] (1190:1190:1190) (1006:1006:1006)) + (PORT clk (1965:1965:1965) (1963:1963:1963)) + (PORT aclr (2001:2001:2001) (2007:2007:2007)) + (PORT stall (1449:1449:1449) (1645:1645:1645)) + (IOPATH (posedge aclr) q (356:356:356) (356:356:356)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + (HOLD stall (posedge clk) (230:230:230)) + (HOLD aclr (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (1965:1965:1965) (1963:1963:1963)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1966:1966:1966) (1964:1964:1964)) + (IOPATH (posedge clk) pulse (0:0:0) (2891:2891:2891)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1966:1966:1966) (1964:1964:1964)) + (IOPATH (posedge clk) pulse (0:0:0) (3162:3162:3162)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1966:1966:1966) (1964:1964:1964)) + (IOPATH (posedge clk) pulse (0:0:0) (3162:3162:3162)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (1956:1956:1956) (1956:1956:1956)) + (PORT ena (2005:2005:2005) (1830:1830:1830)) + (PORT aclr (1954:1954:1954) (2017:2017:2017)) + (IOPATH (posedge clk) q (353:353:353) (353:353:353)) + (IOPATH (posedge aclr) q (393:393:393) (393:393:393)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (56:56:56)) + (SETUP ena (posedge clk) (56:56:56)) + (SETUP aclr (posedge clk) (56:56:56)) + (HOLD d (posedge clk) (190:190:190)) + (HOLD ena (posedge clk) (190:190:190)) + (HOLD aclr (posedge clk) (190:190:190)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack) + (DELAY + (ABSOLUTE + (PORT datac (1133:1133:1133) (920:920:920)) + (PORT datad (1498:1498:1498) (1292:1292:1292)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_sdram_en) + (DELAY + (ABSOLUTE + (PORT clk (1643:1643:1643) (1662:1662:1662)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1675:1675:1675) (1627:1627:1627)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1074:1074:1074) (1001:1001:1001)) + (PORT d[1] (1074:1074:1074) (1001:1001:1001)) + (PORT d[2] (1074:1074:1074) (1001:1001:1001)) + (PORT d[3] (1074:1074:1074) (1001:1001:1001)) + (PORT d[4] (1062:1062:1062) (986:986:986)) + (PORT d[5] (1062:1062:1062) (986:986:986)) + (PORT d[6] (1062:1062:1062) (986:986:986)) + (PORT clk (2006:2006:2006) (2049:2049:2049)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1820:1820:1820) (1668:1668:1668)) + (PORT d[1] (988:988:988) (928:928:928)) + (PORT d[2] (2253:2253:2253) (2067:2067:2067)) + (PORT d[3] (1324:1324:1324) (1212:1212:1212)) + (PORT d[4] (975:975:975) (925:925:925)) + (PORT d[5] (1126:1126:1126) (998:998:998)) + (PORT d[6] (1641:1641:1641) (1485:1485:1485)) + (PORT d[7] (1980:1980:1980) (1714:1714:1714)) + (PORT d[8] (1661:1661:1661) (1516:1516:1516)) + (PORT d[9] (845:845:845) (706:706:706)) + (PORT clk (2003:2003:2003) (2045:2045:2045)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (2661:2661:2661) (2314:2314:2314)) + (PORT clk (2003:2003:2003) (2045:2045:2045)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2006:2006:2006) (2049:2049:2049)) + (PORT d[0] (3283:3283:3283) (2946:2946:2946)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2007:2007:2007) (2050:2050:2050)) + (IOPATH (posedge clk) pulse (0:0:0) (2490:2490:2490)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2007:2007:2007) (2050:2050:2050)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2007:2007:2007) (2050:2050:2050)) + (IOPATH (posedge clk) pulse (0:0:0) (3129:3129:3129)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2007:2007:2007) (2050:2050:2050)) + (IOPATH (posedge clk) pulse (0:0:0) (3129:3129:3129)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (949:949:949) (838:838:838)) + (PORT d[1] (1476:1476:1476) (1378:1378:1378)) + (PORT d[2] (1676:1676:1676) (1514:1514:1514)) + (PORT d[3] (1057:1057:1057) (990:990:990)) + (PORT d[4] (962:962:962) (917:917:917)) + (PORT d[5] (977:977:977) (923:923:923)) + (PORT d[6] (971:971:971) (906:906:906)) + (PORT d[7] (1302:1302:1302) (1191:1191:1191)) + (PORT d[8] (1660:1660:1660) (1510:1510:1510)) + (PORT d[9] (1887:1887:1887) (1603:1603:1603)) + (PORT clk (1959:1959:1959) (1957:1957:1957)) + (PORT aclr (1995:1995:1995) (2001:2001:2001)) + (PORT stall (1723:1723:1723) (1961:1961:1961)) + (IOPATH (posedge aclr) q (356:356:356) (356:356:356)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + (HOLD stall (posedge clk) (230:230:230)) + (HOLD aclr (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (1959:1959:1959) (1957:1957:1957)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1960:1960:1960) (1958:1958:1958)) + (IOPATH (posedge clk) pulse (0:0:0) (2891:2891:2891)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1960:1960:1960) (1958:1958:1958)) + (IOPATH (posedge clk) pulse (0:0:0) (3162:3162:3162)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1960:1960:1960) (1958:1958:1958)) + (IOPATH (posedge clk) pulse (0:0:0) (3162:3162:3162)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (1950:1950:1950) (1950:1950:1950)) + (PORT ena (1975:1975:1975) (1792:1792:1792)) + (PORT aclr (1948:1948:1948) (2011:2011:2011)) + (IOPATH (posedge clk) q (353:353:353) (353:353:353)) + (IOPATH (posedge aclr) q (393:393:393) (393:393:393)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (56:56:56)) + (SETUP ena (posedge clk) (56:56:56)) + (SETUP aclr (posedge clk) (56:56:56)) + (HOLD d (posedge clk) (190:190:190)) + (HOLD ena (posedge clk) (190:190:190)) + (HOLD aclr (posedge clk) (190:190:190)) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE sys_clk\~inputclkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (175:175:175) (172:172:172)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (867:867:867) (793:793:793)) + (PORT datab (325:325:325) (382:382:382)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[11\]\~35) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (329:329:329) (392:392:392)) + (PORT datab (326:326:326) (383:383:383)) + (PORT datac (282:282:282) (348:348:348)) + (PORT datad (286:286:286) (344:344:344)) + (IOPATH dataa combout (392:392:392) (419:419:419)) + (IOPATH datab combout (393:393:393) (431:431:431)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[9\]\~31) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (403:403:403)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (937:937:937) (847:847:847)) + (PORT datab (938:938:938) (838:838:838)) + (PORT datac (818:818:818) (689:689:689)) + (PORT datad (927:927:927) (834:834:834)) + (IOPATH dataa combout (392:392:392) (419:419:419)) + (IOPATH datab combout (393:393:393) (431:431:431)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (333:333:333) (398:398:398)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (340:340:340) (407:407:407)) + (PORT datab (334:334:334) (394:394:394)) + (PORT datac (293:293:293) (362:362:362)) + (PORT datad (295:295:295) (358:358:358)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|tx_flag) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1677:1677:1677)) + (PORT asdata (976:976:976) (950:950:950)) + (PORT clrn (5210:5210:5210) (5193:5193:5193)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (905:905:905) (843:843:843)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datac combout (415:415:415) (429:429:429)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[1\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (388:388:388) (477:477:477)) + (PORT datab (285:285:285) (298:298:298)) + (PORT datad (274:274:274) (292:292:292)) + (IOPATH dataa combout (435:435:435) (419:419:419)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1667:1667:1667) (1686:1686:1686)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4540:4540:4540) (4423:4423:4423)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[2\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (757:757:757) (626:626:626)) + (PORT datab (287:287:287) (300:300:300)) + (PORT datad (270:270:270) (288:288:288)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1667:1667:1667) (1686:1686:1686)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4540:4540:4540) (4423:4423:4423)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (382:382:382) (470:470:470)) + (PORT datab (386:386:386) (459:459:459)) + (PORT datac (304:304:304) (378:378:378)) + (PORT datad (238:238:238) (250:250:250)) + (IOPATH dataa combout (375:375:375) (371:371:371)) + (IOPATH datab combout (384:384:384) (386:386:386)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|work_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (1323:1323:1323) (1182:1182:1182)) + (PORT datad (1230:1230:1230) (1057:1057:1057)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|work_en) + (DELAY + (ABSOLUTE + (PORT clk (1667:1667:1667) (1686:1686:1686)) + (PORT asdata (5177:5177:5177) (4374:4374:4374)) + (PORT clrn (4540:4540:4540) (4423:4423:4423)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (271:271:271) (283:283:283)) + (PORT datab (289:289:289) (297:297:297)) + (PORT datac (1371:1371:1371) (1143:1143:1143)) + (PORT datad (1137:1137:1137) (995:995:995)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT datab (334:334:334) (393:393:393)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT datab (327:327:327) (384:384:384)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (335:335:335) (395:395:395)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (325:325:325) (382:382:382)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT datad (299:299:299) (355:355:355)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1668:1668:1668) (1687:1687:1687)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4535:4535:4535) (4419:4419:4419)) + (PORT sclr (1417:1417:1417) (1340:1340:1340)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD sclr (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (338:338:338) (405:405:405)) + (PORT datab (336:336:336) (396:396:396)) + (PORT datac (290:290:290) (359:359:359)) + (PORT datad (291:291:291) (354:354:354)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (570:570:570) (477:477:477)) + (PORT datab (906:906:906) (843:843:843)) + (PORT datac (780:780:780) (660:660:660)) + (PORT datad (935:935:935) (845:845:845)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (1671:1671:1671) (1691:1691:1691)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4486:4486:4486) (4392:4392:4392)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (326:326:326) (387:387:387)) + (PORT datac (857:857:857) (800:800:800)) + (IOPATH dataa combout (420:420:420) (400:400:400)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|valid_rreq) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (405:405:405)) + (PORT datad (878:878:878) (828:828:828)) + (IOPATH dataa combout (377:377:377) (371:371:371)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[0\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (757:757:757) (781:781:781)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (4150:4150:4150) (4272:4272:4272)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_ack\~2) + (DELAY + (ABSOLUTE + (PORT dataa (969:969:969) (894:894:894)) + (PORT datab (874:874:874) (765:765:765)) + (PORT datac (805:805:805) (692:692:692)) + (PORT datad (250:250:250) (258:258:258)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT datad (860:860:860) (729:729:729)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0\~_wirecell) + (DELAY + (ABSOLUTE + (PORT datad (2009:2009:2009) (1777:1777:1777)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT datab (345:345:345) (403:403:403)) + (PORT datac (304:304:304) (370:370:370)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[1\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (757:757:757) (781:781:781)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (4075:4075:4075) (4201:4201:4201)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[1\]\~6) + (DELAY + (ABSOLUTE + (PORT datad (856:856:856) (725:725:725)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[2\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (717:717:717) (741:741:741)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (4089:4089:4089) (4173:4173:4173)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[2\]\~4) + (DELAY + (ABSOLUTE + (PORT datad (854:854:854) (723:723:723)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[3\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (747:747:747) (771:771:771)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (3873:3873:3873) (3900:3900:3900)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[3\]\~2) + (DELAY + (ABSOLUTE + (PORT datad (861:861:861) (731:731:731)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[4\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (757:757:757) (781:781:781)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (3922:3922:3922) (3924:3924:3924)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[4\]\~1) + (DELAY + (ABSOLUTE + (PORT datad (854:854:854) (723:723:723)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[5\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (737:737:737) (761:761:761)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (4158:4158:4158) (4248:4248:4248)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[5\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (857:857:857) (726:726:726)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[6\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (767:767:767) (791:791:791)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (4305:4305:4305) (4347:4347:4347)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[6\]\~3) + (DELAY + (ABSOLUTE + (PORT datad (861:861:861) (730:730:730)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[7\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (757:757:757) (781:781:781)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1664:1664:1664) (1682:1682:1682)) + (PORT asdata (4045:4045:4045) (4160:4160:4160)) + (PORT clrn (1696:1696:1696) (1647:1647:1647)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[7\]\~7) + (DELAY + (ABSOLUTE + (PORT datad (855:855:855) (724:724:724)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (929:929:929) (801:801:801)) + (PORT d[1] (853:853:853) (744:744:744)) + (PORT d[2] (852:852:852) (744:744:744)) + (PORT d[3] (926:926:926) (797:797:797)) + (PORT d[4] (856:856:856) (756:756:756)) + (PORT d[5] (853:853:853) (743:743:743)) + (PORT d[6] (874:874:874) (756:756:756)) + (PORT d[7] (890:890:890) (778:778:778)) + (PORT clk (2028:2028:2028) (2069:2069:2069)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (989:989:989) (909:909:909)) + (PORT d[1] (944:944:944) (888:888:888)) + (PORT d[2] (916:916:916) (866:866:866)) + (PORT d[3] (1695:1695:1695) (1545:1545:1545)) + (PORT d[4] (916:916:916) (865:865:865)) + (PORT d[5] (1730:1730:1730) (1544:1544:1544)) + (PORT d[6] (1647:1647:1647) (1445:1445:1445)) + (PORT d[7] (965:965:965) (904:904:904)) + (PORT d[8] (1012:1012:1012) (943:943:943)) + (PORT d[9] (904:904:904) (790:790:790)) + (PORT clk (2025:2025:2025) (2065:2065:2065)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1224:1224:1224) (1061:1061:1061)) + (PORT clk (2025:2025:2025) (2065:2065:2065)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2028:2028:2028) (2069:2069:2069)) + (PORT d[0] (1846:1846:1846) (1693:1693:1693)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2029:2029:2029) (2070:2070:2070)) + (IOPATH (posedge clk) pulse (0:0:0) (2490:2490:2490)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2029:2029:2029) (2070:2070:2070)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2029:2029:2029) (2070:2070:2070)) + (IOPATH (posedge clk) pulse (0:0:0) (3129:3129:3129)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2029:2029:2029) (2070:2070:2070)) + (IOPATH (posedge clk) pulse (0:0:0) (3129:3129:3129)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (513:513:513) (456:456:456)) + (PORT d[1] (926:926:926) (871:871:871)) + (PORT d[2] (1734:1734:1734) (1566:1566:1566)) + (PORT d[3] (1930:1930:1930) (1722:1722:1722)) + (PORT d[4] (1906:1906:1906) (1685:1685:1685)) + (PORT d[5] (1939:1939:1939) (1714:1714:1714)) + (PORT d[6] (982:982:982) (912:912:912)) + (PORT d[7] (1027:1027:1027) (954:954:954)) + (PORT d[8] (1649:1649:1649) (1462:1462:1462)) + (PORT d[9] (894:894:894) (782:782:782)) + (PORT clk (1981:1981:1981) (1977:1977:1977)) + (PORT aclr (2017:2017:2017) (2021:2021:2021)) + (PORT stall (1163:1163:1163) (1322:1322:1322)) + (IOPATH (posedge aclr) q (356:356:356) (356:356:356)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (230:230:230)) + (HOLD stall (posedge clk) (230:230:230)) + (HOLD aclr (posedge clk) (230:230:230)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (1981:1981:1981) (1977:1977:1977)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1982:1982:1982) (1978:1978:1978)) + (IOPATH (posedge clk) pulse (0:0:0) (2891:2891:2891)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1982:1982:1982) (1978:1978:1978)) + (IOPATH (posedge clk) pulse (0:0:0) (3162:3162:3162)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1982:1982:1982) (1978:1978:1978)) + (IOPATH (posedge clk) pulse (0:0:0) (3162:3162:3162)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (1972:1972:1972) (1970:1970:1970)) + (PORT ena (1676:1676:1676) (1537:1537:1537)) + (PORT aclr (1970:1970:1970) (2031:2031:2031)) + (IOPATH (posedge clk) q (353:353:353) (353:353:353)) + (IOPATH (posedge aclr) q (393:393:393) (393:393:393)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (56:56:56)) + (SETUP ena (posedge clk) (56:56:56)) + (SETUP aclr (posedge clk) (56:56:56)) + (HOLD d (posedge clk) (190:190:190)) + (HOLD ena (posedge clk) (190:190:190)) + (HOLD aclr (posedge clk) (190:190:190)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2617:2617:2617) (2315:2315:2315)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2617:2617:2617) (2315:2315:2315)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2617:2617:2617) (2315:2315:2315)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2617:2617:2617) (2315:2315:2315)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (396:396:396)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2617:2617:2617) (2315:2315:2315)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (396:396:396)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2617:2617:2617) (2315:2315:2315)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (396:396:396)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2617:2617:2617) (2315:2315:2315)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (396:396:396)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2617:2617:2617) (2315:2315:2315)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (403:403:403)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2617:2617:2617) (2315:2315:2315)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (397:397:397)) + (IOPATH datab combout (437:437:437) (451:451:451)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2617:2617:2617) (2315:2315:2315)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2202:2202:2202) (1946:1946:1946)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2202:2202:2202) (1946:1946:1946)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2202:2202:2202) (1946:1946:1946)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (396:396:396)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2202:2202:2202) (1946:1946:1946)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2202:2202:2202) (1946:1946:1946)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2202:2202:2202) (1946:1946:1946)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (403:403:403)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2202:2202:2202) (1946:1946:1946)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (395:395:395)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datab cout (497:497:497) (381:381:381)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2202:2202:2202) (1946:1946:1946)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (402:402:402)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH dataa cout (486:486:486) (375:375:375)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + (IOPATH cin cout (63:63:63) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2202:2202:2202) (1946:1946:1946)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datad (494:494:494) (481:481:481)) + (IOPATH datad combout (167:167:167) (143:143:143)) + (IOPATH cin combout (549:549:549) (519:519:519)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1660:1660:1660) (1678:1678:1678)) + (PORT d (90:90:90) (101:101:101)) + (PORT ena (2202:2202:2202) (1946:1946:1946)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~4) + (DELAY + (ABSOLUTE + (PORT dataa (384:384:384) (473:473:473)) + (PORT datab (352:352:352) (418:418:418)) + (PORT datac (713:713:713) (583:583:583)) + (PORT datad (345:345:345) (421:421:421)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~3) + (DELAY + (ABSOLUTE + (PORT dataa (907:907:907) (845:845:845)) + (PORT datad (299:299:299) (354:354:354)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~5) + (DELAY + (ABSOLUTE + (PORT dataa (801:801:801) (654:654:654)) + (PORT datab (280:280:280) (291:291:291)) + (PORT datac (1102:1102:1102) (891:891:891)) + (PORT datad (437:437:437) (372:372:372)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH datab combout (393:393:393) (431:431:431)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|tx) + (DELAY + (ABSOLUTE + (PORT clk (1667:1667:1667) (1686:1686:1686)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (4540:4540:4540) (4423:4423:4423)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[2\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2044:2044:2044) (2012:2012:2012)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT asdata (1338:1338:1338) (1267:1267:1267)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT asdata (1250:1250:1250) (1174:1174:1174)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT datab (358:358:358) (427:427:427)) + (PORT datac (1177:1177:1177) (1146:1146:1146)) + (PORT datad (1124:1124:1124) (1091:1091:1091)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT asdata (2029:2029:2029) (1853:1853:1853)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (369:369:369) (430:430:430)) + (PORT datab (386:386:386) (456:456:456)) + (PORT datad (488:488:488) (437:437:437)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (354:354:354) (380:380:380)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TRF) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1634:1634:1634)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1212:1212:1212) (997:997:997)) + (PORT datab (290:290:290) (298:298:298)) + (PORT datac (340:340:340) (418:418:418)) + (PORT datad (295:295:295) (357:357:357)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (286:286:286) (303:303:303)) + (PORT datab (387:387:387) (459:459:459)) + (PORT datac (286:286:286) (353:353:353)) + (PORT datad (226:226:226) (233:233:233)) + (IOPATH dataa combout (420:420:420) (371:371:371)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_AR) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1634:1634:1634)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1700:1700:1700) (1457:1457:1457)) + (PORT datad (1269:1269:1269) (1154:1154:1154)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1162:1162:1162) (971:971:971)) + (PORT datab (1144:1144:1144) (970:970:970)) + (PORT datad (276:276:276) (331:331:331)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (415:415:415) (431:431:431)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1163:1163:1163) (972:972:972)) + (PORT datab (315:315:315) (368:368:368)) + (PORT datad (226:226:226) (233:233:233)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~4) + (DELAY + (ABSOLUTE + (PORT datac (898:898:898) (851:851:851)) + (PORT datad (226:226:226) (233:233:233)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1646:1646:1646) (1467:1467:1467)) + (PORT datac (1165:1165:1165) (1044:1044:1044)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~17) + (DELAY + (ABSOLUTE + (PORT datab (276:276:276) (285:285:285)) + (PORT datad (569:569:569) (556:556:556)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_PRE) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1674:1674:1674)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1639:1639:1639)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|WideOr5) + (DELAY + (ABSOLUTE + (PORT dataa (1695:1695:1695) (1452:1452:1452)) + (PORT datab (1310:1310:1310) (1193:1193:1193)) + (PORT datad (1587:1587:1587) (1389:1389:1389)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (862:862:862) (784:784:784)) + (PORT datad (1204:1204:1204) (1065:1065:1065)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1159:1159:1159) (968:968:968)) + (PORT datab (316:316:316) (370:370:370)) + (PORT datac (1103:1103:1103) (938:938:938)) + (PORT datad (275:275:275) (330:330:330)) + (IOPATH dataa combout (420:420:420) (425:425:425)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (533:533:533) (510:510:510)) + (PORT datab (317:317:317) (371:371:371)) + (PORT datac (1100:1100:1100) (935:935:935)) + (PORT datad (227:227:227) (234:234:234)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (423:423:423) (451:451:451)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT datac (898:898:898) (850:850:850)) + (PORT datad (225:225:225) (232:232:232)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (510:510:510) (443:443:443)) + (PORT datab (362:362:362) (425:425:425)) + (PORT datac (345:345:345) (427:427:427)) + (PORT datad (531:531:531) (521:521:521)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT datac (1170:1170:1170) (1138:1138:1138)) + (PORT datad (1130:1130:1130) (1099:1099:1099)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (296:296:296)) + (PORT datac (308:308:308) (375:375:375)) + (PORT datad (534:534:534) (527:527:527)) + (IOPATH dataa combout (420:420:420) (400:400:400)) + (IOPATH datac combout (305:305:305) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~1) + (DELAY + (ABSOLUTE + (PORT dataa (269:269:269) (280:280:280)) + (PORT datab (526:526:526) (506:506:506)) + (PORT datac (1098:1098:1098) (923:923:923)) + (PORT datad (479:479:479) (458:458:458)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datab combout (393:393:393) (431:431:431)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~2) + (DELAY + (ABSOLUTE + (PORT dataa (268:268:268) (280:280:280)) + (PORT datac (898:898:898) (851:851:851)) + (IOPATH dataa combout (435:435:435) (425:425:425)) + (IOPATH datac combout (305:305:305) (285:285:285)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (923:923:923) (802:802:802)) + (PORT datab (887:887:887) (758:758:758)) + (PORT datac (940:940:940) (857:857:857)) + (PORT datad (902:902:902) (835:835:835)) + (IOPATH dataa combout (408:408:408) (425:425:425)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector21\~1) + (DELAY + (ABSOLUTE + (PORT dataa (272:272:272) (284:284:284)) + (PORT datab (1015:1015:1015) (918:918:918)) + (PORT datac (234:234:234) (252:252:252)) + (PORT datad (533:533:533) (525:525:525)) + (IOPATH dataa combout (428:428:428) (450:450:450)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_addr\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~6) + (DELAY + (ABSOLUTE + (PORT datad (573:573:573) (561:561:561)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[3\]\~3) + (DELAY + (ABSOLUTE + (PORT datac (1187:1187:1187) (1047:1047:1047)) + (PORT datad (569:569:569) (557:557:557)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1674:1674:1674)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1639:1639:1639)) + (PORT ena (1012:1012:1012) (982:982:982)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~5) + (DELAY + (ABSOLUTE + (PORT datab (359:359:359) (421:421:421)) + (PORT datad (572:572:572) (559:559:559)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1674:1674:1674)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1639:1639:1639)) + (PORT ena (1012:1012:1012) (982:982:982)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~4) + (DELAY + (ABSOLUTE + (PORT dataa (555:555:555) (546:546:546)) + (PORT datab (339:339:339) (399:399:399)) + (PORT datad (567:567:567) (554:554:554)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (384:384:384) (398:398:398)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1652:1652:1652) (1674:1674:1674)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1684:1684:1684) (1639:1639:1639)) + (PORT ena (1012:1012:1012) (982:982:982)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + (HOLD ena (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~15) + (DELAY + (ABSOLUTE + (PORT dataa (330:330:330) (394:394:394)) + (PORT datab (358:358:358) (420:420:420)) + (PORT datac (293:293:293) (362:362:362)) + (PORT datad (282:282:282) (339:339:339)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (529:529:529) (479:479:479)) + (PORT datab (334:334:334) (394:394:394)) + (PORT datac (342:342:342) (421:421:421)) + (PORT datad (1148:1148:1148) (950:950:950)) + (IOPATH dataa combout (351:351:351) (371:371:371)) + (IOPATH datab combout (357:357:357) (380:380:380)) + (IOPATH datac combout (301:301:301) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_MRS) + (DELAY + (ABSOLUTE + (PORT clk (1650:1650:1650) (1668:1668:1668)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1682:1682:1682) (1634:1634:1634)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_ba\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT asdata (1627:1627:1627) (1467:1467:1467)) + (PORT clrn (1687:1687:1687) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1194:1194:1194) (1039:1039:1039)) + (PORT datab (358:358:358) (427:427:427)) + (PORT datad (1123:1123:1123) (1090:1090:1090)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (423:423:423) (391:391:391)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector9\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1233:1233:1233) (1184:1184:1184)) + (PORT datab (1290:1290:1290) (1160:1160:1160)) + (PORT datac (1064:1064:1064) (1032:1032:1032)) + (PORT datad (469:469:469) (419:419:419)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (577:577:577) (493:493:493)) + (PORT datab (393:393:393) (465:465:465)) + (PORT datac (500:500:500) (459:459:459)) + (PORT datad (466:466:466) (396:396:396)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (437:437:437) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~2) + (DELAY + (ABSOLUTE + (PORT dataa (272:272:272) (283:283:283)) + (PORT datab (336:336:336) (396:396:396)) + (PORT datac (547:547:547) (525:525:525)) + (PORT datad (250:250:250) (258:258:258)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_ba\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector22\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1229:1229:1229) (1180:1180:1180)) + (PORT datab (1291:1291:1291) (1161:1161:1161)) + (PORT datac (1092:1092:1092) (964:964:964)) + (PORT datad (1130:1130:1130) (1098:1098:1098)) + (IOPATH dataa combout (428:428:428) (449:449:449)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|WideOr7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (374:374:374) (448:448:448)) + (PORT datab (620:620:620) (577:577:577)) + (PORT datac (496:496:496) (487:487:487)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (406:406:406) (453:453:453)) + (IOPATH datac combout (301:301:301) (283:283:283)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector11\~0) + (DELAY + (ABSOLUTE + (PORT dataa (282:282:282) (299:299:299)) + (PORT datab (281:281:281) (292:292:292)) + (PORT datad (533:533:533) (525:525:525)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (415:415:415) (429:429:429)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_addr\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1657:1657:1657) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (407:407:407)) + (PORT datab (328:328:328) (386:386:386)) + (PORT datad (2431:2431:2431) (2145:2145:2145)) + (IOPATH dataa combout (374:374:374) (392:392:392)) + (IOPATH datab combout (380:380:380) (380:380:380)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_ACTIVE) + (DELAY + (ABSOLUTE + (PORT clk (1658:1658:1658) (1676:1676:1676)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1690:1690:1690) (1641:1641:1641)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (846:846:846) (758:758:758)) + (PORT datab (1221:1221:1221) (1075:1075:1075)) + (PORT datac (345:345:345) (427:427:427)) + (PORT datad (319:319:319) (383:383:383)) + (IOPATH dataa combout (414:414:414) (444:444:444)) + (IOPATH datab combout (438:438:438) (455:455:455)) + (IOPATH datac combout (305:305:305) (285:285:285)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector10\~1) + (DELAY + (ABSOLUTE + (PORT dataa (578:578:578) (493:493:493)) + (PORT datab (499:499:499) (439:439:439)) + (PORT datac (350:350:350) (432:432:432)) + (PORT datad (228:228:228) (236:236:236)) + (IOPATH dataa combout (394:394:394) (400:400:400)) + (IOPATH datab combout (400:400:400) (391:391:391)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_addr\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1654:1654:1654) (1673:1673:1673)) + (PORT d (90:90:90) (101:101:101)) + (PORT clrn (1686:1686:1686) (1638:1638:1638)) + (IOPATH (posedge clk) q (240:240:240) (240:240:240)) + (IOPATH (negedge clrn) q (222:222:222) (222:222:222)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (195:195:195)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector12\~0) + (DELAY + (ABSOLUTE + (PORT dataa (317:317:317) (376:376:376)) + (PORT datab (358:358:358) (428:428:428)) + (PORT datac (805:805:805) (727:727:727)) + (PORT datad (1126:1126:1126) (1093:1093:1093)) + (IOPATH dataa combout (404:404:404) (450:450:450)) + (IOPATH datab combout (415:415:415) (425:425:425)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector12\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1231:1231:1231) (1181:1181:1181)) + (PORT datab (1104:1104:1104) (1062:1062:1062)) + (PORT datac (769:769:769) (683:683:683)) + (PORT datad (227:227:227) (235:235:235)) + (IOPATH dataa combout (435:435:435) (407:407:407)) + (IOPATH datab combout (437:437:437) (407:407:407)) + (IOPATH datac combout (301:301:301) (283:283:283)) + (IOPATH datad combout (167:167:167) (143:143:143)) + ) + ) + ) +) diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_85c_slow.vo b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_85c_slow.vo new file mode 100644 index 0000000..aa229f8 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_85c_slow.vo @@ -0,0 +1,24917 @@ +// Copyright (C) 1991-2013 Altera Corporation +// Your use of Altera Corporation's design tools, logic functions +// and other software and tools, and its AMPP partner logic +// functions, and any output files from any of the foregoing +// (including device programming or simulation files), and any +// associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License +// Subscription Agreement, Altera MegaCore Function License +// Agreement, or other applicable license agreement, including, +// without limitation, that your use is for the sole purpose of +// programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the +// applicable agreement for further details. + +// VENDOR "Altera" +// PROGRAM "Quartus II 64-Bit" +// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version" + +// DATE "06/02/2023 04:26:30" + +// +// Device: Altera EP4CE15F23C8 Package FBGA484 +// + +// +// This Verilog file should be used for ModelSim (Verilog) only +// + +`timescale 1 ps/ 1 ps + +module uart_sdram ( + sys_clk, + sys_rst_n, + rx, + tx, + sdram_clk, + sdram_cke, + sdram_cs_n, + sdram_cas_n, + sdram_ras_n, + sdram_we_n, + sdram_ba, + sdram_addr, + sdram_dqm, + sdram_dq); +input sys_clk; +input sys_rst_n; +input rx; +output tx; +output sdram_clk; +output sdram_cke; +output sdram_cs_n; +output sdram_cas_n; +output sdram_ras_n; +output sdram_we_n; +output [1:0] sdram_ba; +output [12:0] sdram_addr; +output [1:0] sdram_dqm; +inout [15:0] sdram_dq; + +// Design Ports Information +// tx => Location: PIN_U1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_clk => Location: PIN_E5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cke => Location: PIN_M1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cs_n => Location: PIN_A4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cas_n => Location: PIN_B5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ras_n => Location: PIN_D6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_we_n => Location: PIN_A5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ba[0] => Location: PIN_B4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ba[1] => Location: PIN_C4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[0] => Location: PIN_B3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[1] => Location: PIN_B1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[2] => Location: PIN_B2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[3] => Location: PIN_C1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[4] => Location: PIN_C2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[5] => Location: PIN_E1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[6] => Location: PIN_F1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[7] => Location: PIN_F2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[8] => Location: PIN_H1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[9] => Location: PIN_N2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[10] => Location: PIN_A3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[11] => Location: PIN_N1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[12] => Location: PIN_M2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dqm[0] => Location: PIN_C6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dqm[1] => Location: PIN_J2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[0] => Location: PIN_B7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[1] => Location: PIN_A7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[2] => Location: PIN_C8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[3] => Location: PIN_B8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[4] => Location: PIN_A8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[5] => Location: PIN_C7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[6] => Location: PIN_A6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[7] => Location: PIN_B6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[8] => Location: PIN_J1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[9] => Location: PIN_C3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[10] => Location: PIN_D2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[11] => Location: PIN_E3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[12] => Location: PIN_G4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[13] => Location: PIN_H2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[14] => Location: PIN_J3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[15] => Location: PIN_J4, I/O Standard: 2.5 V, Current Strength: Default +// sys_clk => Location: PIN_T22, I/O Standard: 2.5 V, Current Strength: Default +// sys_rst_n => Location: PIN_U20, I/O Standard: 2.5 V, Current Strength: Default +// rx => Location: PIN_V1, I/O Standard: 2.5 V, Current Strength: Default + + +wire gnd; +wire vcc; +wire unknown; + +assign gnd = 1'b0; +assign vcc = 1'b1; +assign unknown = 1'bx; + +tri1 devclrn; +tri1 devpor; +tri1 devoe; +// synopsys translate_off +initial $sdf_annotate("uart_sdram_8_1200mv_85c_v_slow.sdo"); +// synopsys translate_on + +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ; +wire \uart_tx_inst|baud_cnt[3]~19_combout ; +wire \uart_tx_inst|baud_cnt[4]~21_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ; +wire \fifo_read_inst|Add2~4_combout ; +wire \Add1~1 ; +wire \Add1~0_combout ; +wire \Add1~3 ; +wire \Add1~2_combout ; +wire \Add1~5 ; +wire \Add1~4_combout ; +wire \Add1~7 ; +wire \Add1~6_combout ; +wire \Add1~9 ; +wire \Add1~8_combout ; +wire \Add1~11 ; +wire \Add1~10_combout ; +wire \Add1~13 ; +wire \Add1~12_combout ; +wire \Add1~15 ; +wire \Add1~14_combout ; +wire \Add1~17 ; +wire \Add1~16_combout ; +wire \Add1~19 ; +wire \Add1~18_combout ; +wire \Add1~21 ; +wire \Add1~20_combout ; +wire \Add1~23 ; +wire \Add1~22_combout ; +wire \Add1~25 ; +wire \Add1~24_combout ; +wire \Add1~27 ; +wire \Add1~26_combout ; +wire \Add1~29 ; +wire \Add1~28_combout ; +wire \Add1~30_combout ; +wire \fifo_read_inst|baud_cnt[1]~15_combout ; +wire \fifo_read_inst|baud_cnt[4]~21_combout ; +wire \fifo_read_inst|baud_cnt[9]~31_combout ; +wire \fifo_read_inst|baud_cnt[11]~35_combout ; +wire \data_num[0]~25 ; +wire \data_num[0]~24_combout ; +wire \data_num[1]~27 ; +wire \data_num[1]~26_combout ; +wire \data_num[2]~29 ; +wire \data_num[2]~28_combout ; +wire \data_num[3]~31 ; +wire \data_num[3]~30_combout ; +wire \data_num[4]~33 ; +wire \data_num[4]~32_combout ; +wire \data_num[5]~35 ; +wire \data_num[5]~34_combout ; +wire \data_num[6]~37 ; +wire \data_num[6]~36_combout ; +wire \data_num[7]~39 ; +wire \data_num[7]~38_combout ; +wire \data_num[8]~41 ; +wire \data_num[8]~40_combout ; +wire \data_num[9]~43 ; +wire \data_num[9]~42_combout ; +wire \data_num[10]~45 ; +wire \data_num[10]~44_combout ; +wire \data_num[11]~47 ; +wire \data_num[11]~46_combout ; +wire \data_num[12]~49 ; +wire \data_num[12]~48_combout ; +wire \data_num[13]~51 ; +wire \data_num[13]~50_combout ; +wire \data_num[14]~53 ; +wire \data_num[14]~52_combout ; +wire \data_num[15]~55 ; +wire \data_num[15]~54_combout ; +wire \data_num[16]~57 ; +wire \data_num[16]~56_combout ; +wire \data_num[17]~59 ; +wire \data_num[17]~58_combout ; +wire \data_num[18]~61 ; +wire \data_num[18]~60_combout ; +wire \data_num[19]~63 ; +wire \data_num[19]~62_combout ; +wire \data_num[20]~65 ; +wire \data_num[20]~64_combout ; +wire \data_num[21]~67 ; +wire \data_num[21]~66_combout ; +wire \data_num[22]~69 ; +wire \data_num[22]~68_combout ; +wire \data_num[23]~70_combout ; +wire \uart_rx_inst|Add1~0_combout ; +wire \uart_rx_inst|Add1~5 ; +wire \uart_rx_inst|Add1~6_combout ; +wire \fifo_read_inst|cnt_read[0]~11 ; +wire \fifo_read_inst|cnt_read[0]~10_combout ; +wire \fifo_read_inst|cnt_read[1]~13 ; +wire \fifo_read_inst|cnt_read[1]~12_combout ; +wire \fifo_read_inst|cnt_read[2]~15 ; +wire \fifo_read_inst|cnt_read[2]~14_combout ; +wire \fifo_read_inst|cnt_read[3]~17 ; +wire \fifo_read_inst|cnt_read[3]~16_combout ; +wire \fifo_read_inst|cnt_read[4]~19 ; +wire \fifo_read_inst|cnt_read[4]~18_combout ; +wire \fifo_read_inst|cnt_read[5]~21 ; +wire \fifo_read_inst|cnt_read[5]~20_combout ; +wire \fifo_read_inst|cnt_read[6]~23 ; +wire \fifo_read_inst|cnt_read[6]~22_combout ; +wire \fifo_read_inst|cnt_read[7]~25 ; +wire \fifo_read_inst|cnt_read[7]~24_combout ; +wire \fifo_read_inst|cnt_read[8]~27 ; +wire \fifo_read_inst|cnt_read[8]~26_combout ; +wire \fifo_read_inst|cnt_read[9]~28_combout ; +wire \uart_rx_inst|baud_cnt[4]~21_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ; +wire \uart_tx_inst|Mux0~0_combout ; +wire \uart_tx_inst|Mux0~1_combout ; +wire \uart_tx_inst|tx~0_combout ; +wire \uart_tx_inst|tx~1_combout ; +wire \uart_tx_inst|tx~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ; +wire \uart_tx_inst|Add1~0_combout ; +wire \uart_tx_inst|Add1~1_combout ; +wire \uart_tx_inst|bit_cnt[3]~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ; +wire \read_valid~q ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ; +wire \uart_tx_inst|Equal1~3_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ; +wire \fifo_read_inst|Equal1~0_combout ; +wire \fifo_read_inst|Equal1~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ; +wire \Equal0~0_combout ; +wire \Equal0~1_combout ; +wire \Equal0~2_combout ; +wire \Equal0~3_combout ; +wire \Equal0~4_combout ; +wire \read_valid~0_combout ; +wire \read_valid~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ; +wire \fifo_read_inst|Equal1~2_combout ; +wire \fifo_read_inst|Equal5~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ; +wire \Equal1~0_combout ; +wire \Equal1~1_combout ; +wire \Equal1~2_combout ; +wire \Equal1~3_combout ; +wire \Equal1~4_combout ; +wire \Equal1~5_combout ; +wire \Equal1~6_combout ; +wire \cnt_wait[8]~0_combout ; +wire \cnt_wait[15]~1_combout ; +wire \cnt_wait[15]~2_combout ; +wire \cnt_wait[14]~3_combout ; +wire \cnt_wait[13]~4_combout ; +wire \cnt_wait[12]~5_combout ; +wire \cnt_wait[9]~6_combout ; +wire \cnt_wait[11]~7_combout ; +wire \cnt_wait[10]~8_combout ; +wire \cnt_wait[8]~9_combout ; +wire \cnt_wait[7]~10_combout ; +wire \cnt_wait[6]~11_combout ; +wire \cnt_wait[5]~12_combout ; +wire \cnt_wait[4]~13_combout ; +wire \cnt_wait[3]~14_combout ; +wire \cnt_wait[2]~15_combout ; +wire \cnt_wait[1]~16_combout ; +wire \cnt_wait[0]~17_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ; +wire \fifo_read_inst|rd_flag~q ; +wire \fifo_read_inst|Equal4~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ; +wire \fifo_read_inst|Equal2~0_combout ; +wire \fifo_read_inst|Equal2~1_combout ; +wire \fifo_read_inst|Equal2~2_combout ; +wire \fifo_read_inst|rd_flag~0_combout ; +wire \uart_rx_inst|bit_cnt~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ; +wire \uart_rx_inst|work_en~q ; +wire \uart_rx_inst|start_nedge~q ; +wire \uart_rx_inst|work_en~0_combout ; +wire \uart_rx_inst|always3~0_combout ; +wire \uart_tx_inst|bit_cnt[0]~5_combout ; +wire \sdram_dq[8]~input_o ; +wire \sdram_dq[9]~input_o ; +wire \sdram_dq[10]~input_o ; +wire \sdram_dq[11]~input_o ; +wire \sdram_dq[12]~input_o ; +wire \sdram_dq[13]~input_o ; +wire \sdram_dq[14]~input_o ; +wire \sdram_dq[15]~input_o ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ; +wire \uart_rx_inst|baud_cnt[0]~13_combout ; +wire \sys_clk~input_o ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ; +wire \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ; +wire \sys_rst_n~input_o ; +wire \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ; +wire \rst_n~0_combout ; +wire \rst_n~0clkctrl_outclk ; +wire \uart_rx_inst|baud_cnt[2]~18 ; +wire \uart_rx_inst|baud_cnt[3]~19_combout ; +wire \uart_rx_inst|baud_cnt[3]~20 ; +wire \uart_rx_inst|baud_cnt[4]~22 ; +wire \uart_rx_inst|baud_cnt[5]~23_combout ; +wire \uart_rx_inst|Equal1~1_combout ; +wire \uart_rx_inst|baud_cnt[5]~24 ; +wire \uart_rx_inst|baud_cnt[6]~25_combout ; +wire \uart_rx_inst|baud_cnt[6]~26 ; +wire \uart_rx_inst|baud_cnt[7]~27_combout ; +wire \uart_rx_inst|baud_cnt[7]~28 ; +wire \uart_rx_inst|baud_cnt[8]~29_combout ; +wire \uart_rx_inst|Equal1~0_combout ; +wire \uart_rx_inst|baud_cnt[8]~30 ; +wire \uart_rx_inst|baud_cnt[9]~31_combout ; +wire \uart_rx_inst|baud_cnt[9]~32 ; +wire \uart_rx_inst|baud_cnt[10]~34 ; +wire \uart_rx_inst|baud_cnt[11]~35_combout ; +wire \uart_rx_inst|Equal1~2_combout ; +wire \uart_rx_inst|baud_cnt[10]~33_combout ; +wire \uart_rx_inst|Equal1~3_combout ; +wire \uart_rx_inst|always5~0_combout ; +wire \uart_rx_inst|baud_cnt[0]~14 ; +wire \uart_rx_inst|baud_cnt[1]~15_combout ; +wire \uart_rx_inst|baud_cnt[1]~16 ; +wire \uart_rx_inst|baud_cnt[2]~17_combout ; +wire \uart_rx_inst|Equal2~0_combout ; +wire \uart_rx_inst|baud_cnt[11]~36 ; +wire \uart_rx_inst|baud_cnt[12]~37_combout ; +wire \uart_rx_inst|Equal2~1_combout ; +wire \uart_rx_inst|Equal2~2_combout ; +wire \uart_rx_inst|bit_flag~q ; +wire \uart_rx_inst|Add1~1 ; +wire \uart_rx_inst|Add1~3 ; +wire \uart_rx_inst|Add1~4_combout ; +wire \uart_rx_inst|Add1~2_combout ; +wire \uart_rx_inst|always4~0_combout ; +wire \uart_rx_inst|always4~1_combout ; +wire \uart_rx_inst|rx_flag~q ; +wire \uart_rx_inst|po_flag~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ; +wire \fifo_read_inst|read_en_dly~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ; +wire \fifo_read_inst|Add2~0_combout ; +wire \fifo_read_inst|Add2~1 ; +wire \fifo_read_inst|Add2~3 ; +wire \fifo_read_inst|Add2~5 ; +wire \fifo_read_inst|Add2~6_combout ; +wire \fifo_read_inst|bit_cnt~0_combout ; +wire \fifo_read_inst|baud_cnt[0]~13_combout ; +wire \fifo_read_inst|baud_cnt[5]~24 ; +wire \fifo_read_inst|baud_cnt[6]~25_combout ; +wire \fifo_read_inst|baud_cnt[6]~26 ; +wire \fifo_read_inst|baud_cnt[7]~27_combout ; +wire \fifo_read_inst|baud_cnt[7]~28 ; +wire \fifo_read_inst|baud_cnt[8]~29_combout ; +wire \fifo_read_inst|Equal4~0_combout ; +wire \fifo_read_inst|baud_cnt[3]~19_combout ; +wire \fifo_read_inst|Equal4~1_combout ; +wire \fifo_read_inst|baud_cnt[8]~30 ; +wire \fifo_read_inst|baud_cnt[9]~32 ; +wire \fifo_read_inst|baud_cnt[10]~33_combout ; +wire \fifo_read_inst|baud_cnt[10]~34 ; +wire \fifo_read_inst|baud_cnt[11]~36 ; +wire \fifo_read_inst|baud_cnt[12]~37_combout ; +wire \fifo_read_inst|Equal4~3_combout ; +wire \fifo_read_inst|baud_cnt[0]~14 ; +wire \fifo_read_inst|baud_cnt[1]~16 ; +wire \fifo_read_inst|baud_cnt[2]~17_combout ; +wire \fifo_read_inst|baud_cnt[2]~18 ; +wire \fifo_read_inst|baud_cnt[3]~20 ; +wire \fifo_read_inst|baud_cnt[4]~22 ; +wire \fifo_read_inst|baud_cnt[5]~23_combout ; +wire \fifo_read_inst|Equal5~0_combout ; +wire \fifo_read_inst|Equal5~2_combout ; +wire \fifo_read_inst|bit_flag~q ; +wire \fifo_read_inst|Add2~2_combout ; +wire \fifo_read_inst|bit_cnt~1_combout ; +wire \fifo_read_inst|always5~0_combout ; +wire \fifo_read_inst|always5~1_combout ; +wire \fifo_read_inst|rd_en~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ; +wire \Equal2~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ; +wire \fifo_read_inst|read_en~0_combout ; +wire \fifo_read_inst|read_en~1_combout ; +wire \fifo_read_inst|read_en~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ; +wire \Equal2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ; +wire \rx~input_o ; +wire \uart_rx_inst|rx_reg1~0_combout ; +wire \uart_rx_inst|rx_reg1~q ; +wire \uart_rx_inst|rx_reg2~feeder_combout ; +wire \uart_rx_inst|rx_reg2~q ; +wire \uart_rx_inst|rx_reg3~feeder_combout ; +wire \uart_rx_inst|rx_reg3~q ; +wire \uart_rx_inst|rx_data[7]~0_combout ; +wire \uart_rx_inst|bit_cnt~0_combout ; +wire \uart_rx_inst|always8~0_combout ; +wire \uart_rx_inst|rx_data[5]~feeder_combout ; +wire \uart_rx_inst|rx_data[4]~feeder_combout ; +wire \uart_rx_inst|rx_data[3]~feeder_combout ; +wire \uart_rx_inst|rx_data[2]~feeder_combout ; +wire \uart_rx_inst|rx_data[1]~feeder_combout ; +wire \uart_rx_inst|rx_data[0]~feeder_combout ; +wire \uart_rx_inst|po_data[0]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ; +wire \uart_rx_inst|po_data[1]~feeder_combout ; +wire \uart_rx_inst|po_data[2]~feeder_combout ; +wire \uart_rx_inst|po_data[3]~feeder_combout ; +wire \uart_rx_inst|po_data[4]~feeder_combout ; +wire \uart_rx_inst|po_data[5]~feeder_combout ; +wire \uart_rx_inst|po_data[6]~feeder_combout ; +wire \~GND~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ; +wire \sys_clk~inputclkctrl_outclk ; +wire \uart_tx_inst|baud_cnt[0]~13_combout ; +wire \uart_tx_inst|baud_cnt[11]~35_combout ; +wire \uart_tx_inst|Equal1~0_combout ; +wire \uart_tx_inst|baud_cnt[9]~31_combout ; +wire \uart_tx_inst|Equal1~1_combout ; +wire \uart_tx_inst|baud_cnt[1]~15_combout ; +wire \uart_tx_inst|Equal1~2_combout ; +wire \fifo_read_inst|tx_flag~q ; +wire \uart_tx_inst|always3~0_combout ; +wire \uart_tx_inst|bit_cnt[1]~2_combout ; +wire \uart_tx_inst|bit_cnt[2]~3_combout ; +wire \uart_tx_inst|always0~1_combout ; +wire \uart_tx_inst|work_en~0_combout ; +wire \uart_tx_inst|work_en~q ; +wire \uart_tx_inst|always1~0_combout ; +wire \uart_tx_inst|baud_cnt[0]~14 ; +wire \uart_tx_inst|baud_cnt[1]~16 ; +wire \uart_tx_inst|baud_cnt[2]~17_combout ; +wire \uart_tx_inst|baud_cnt[2]~18 ; +wire \uart_tx_inst|baud_cnt[3]~20 ; +wire \uart_tx_inst|baud_cnt[4]~22 ; +wire \uart_tx_inst|baud_cnt[5]~23_combout ; +wire \uart_tx_inst|baud_cnt[5]~24 ; +wire \uart_tx_inst|baud_cnt[6]~25_combout ; +wire \uart_tx_inst|baud_cnt[6]~26 ; +wire \uart_tx_inst|baud_cnt[7]~27_combout ; +wire \uart_tx_inst|baud_cnt[7]~28 ; +wire \uart_tx_inst|baud_cnt[8]~29_combout ; +wire \uart_tx_inst|baud_cnt[8]~30 ; +wire \uart_tx_inst|baud_cnt[9]~32 ; +wire \uart_tx_inst|baud_cnt[10]~33_combout ; +wire \uart_tx_inst|baud_cnt[10]~34 ; +wire \uart_tx_inst|baud_cnt[11]~36 ; +wire \uart_tx_inst|baud_cnt[12]~37_combout ; +wire \uart_tx_inst|Equal2~0_combout ; +wire \uart_tx_inst|Equal2~1_combout ; +wire \uart_tx_inst|bit_flag~q ; +wire \uart_tx_inst|always0~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ; +wire \sdram_dq[0]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ; +wire \sdram_dq[1]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ; +wire \sdram_dq[2]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout ; +wire \sdram_dq[3]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ; +wire \sdram_dq[4]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ; +wire \sdram_dq[5]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout ; +wire \sdram_dq[6]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ; +wire \sdram_dq[7]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ; +wire \uart_tx_inst|tx~4_combout ; +wire \uart_tx_inst|tx~3_combout ; +wire \uart_tx_inst|tx~5_combout ; +wire \uart_tx_inst|tx~q ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a ; +wire [15:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit ; +wire [23:0] data_num; +wire [15:0] cnt_wait; +wire [4:0] \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk ; +wire [7:0] \uart_rx_inst|rx_data ; +wire [7:0] \uart_rx_inst|po_data ; +wire [3:0] \uart_rx_inst|bit_cnt ; +wire [12:0] \uart_rx_inst|baud_cnt ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g ; +wire [9:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a ; +wire [15:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref ; +wire [2:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk ; +wire [14:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us ; +wire [2:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba ; +wire [12:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd ; +wire [12:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr ; +wire [15:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk ; +wire [9:0] \fifo_read_inst|cnt_read ; +wire [3:0] \fifo_read_inst|bit_cnt ; +wire [12:0] \fifo_read_inst|baud_cnt ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit ; +wire [7:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit ; +wire [3:0] \uart_tx_inst|bit_cnt ; +wire [12:0] \uart_tx_inst|baud_cnt ; + +wire [4:0] \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus ; +wire [8:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus ; + +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [0] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [0]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [1] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [1]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [2] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [2]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [3] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [3]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [4] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [4]; + +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [0]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [1]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [2]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [3]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [4] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [4]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [5]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [6]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [7]; + +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [6]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [7]; + +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [6]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [7]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [8] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [8]; + +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [9] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [10] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [11] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [12] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [13] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [14] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [15] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [6]; + +// Location: M9K_X25_Y18_N0 +cycloneive_ram_block \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 ( + .portawe(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .ena0(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .ena1(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({gnd,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0]}), + .portaaddr({\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk0_core_clock_enable = "ena0"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk1_core_clock_enable = "ena1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk1_input_clock_enable = "ena1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .data_interleave_offset_in_bits = 1; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .data_interleave_width_in_bits = 1; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .logical_ram_name = "fifo_read:fifo_read_inst|read_fifo:read_fifo_inst|scfifo:scfifo_component|scfifo_un21:auto_generated|a_dpfifo_5u21:dpfifo|dpram_d811:FIFOram|altsyncram_c3k1:altsyncram1|ALTSYNCRAM"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .operation_mode = "dual_port"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_address_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_address_width = 10; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_byte_enable_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_out_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_out_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_width = 9; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_first_address = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_first_bit_number = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_last_address = 1023; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_logical_ram_depth = 1024; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_logical_ram_width = 8; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_clock = "clock1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_width = 10; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_out_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_out_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_width = 9; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_first_address = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_first_bit_number = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_last_address = 1023; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_logical_ram_depth = 1024; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_logical_ram_width = 8; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_read_enable_clock = "clock1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: FF_X24_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y21_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y18_N11 +dffeas \uart_tx_inst|baud_cnt[3] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y18_N13 +dffeas \uart_tx_inst|baud_cnt[4] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0] & ((GND) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0] $ (GND))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 .lut_mask = 16'h66BB; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N10 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[3]~19 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[3]~19_combout = (\uart_tx_inst|baud_cnt [3] & (!\uart_tx_inst|baud_cnt[2]~18 )) # (!\uart_tx_inst|baud_cnt [3] & ((\uart_tx_inst|baud_cnt[2]~18 ) # (GND))) +// \uart_tx_inst|baud_cnt[3]~20 = CARRY((!\uart_tx_inst|baud_cnt[2]~18 ) # (!\uart_tx_inst|baud_cnt [3])) + + .dataa(\uart_tx_inst|baud_cnt [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[2]~18 ), + .combout(\uart_tx_inst|baud_cnt[3]~19_combout ), + .cout(\uart_tx_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[3]~19 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[4]~21 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[4]~21_combout = (\uart_tx_inst|baud_cnt [4] & (\uart_tx_inst|baud_cnt[3]~20 $ (GND))) # (!\uart_tx_inst|baud_cnt [4] & (!\uart_tx_inst|baud_cnt[3]~20 & VCC)) +// \uart_tx_inst|baud_cnt[4]~22 = CARRY((\uart_tx_inst|baud_cnt [4] & !\uart_tx_inst|baud_cnt[3]~20 )) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[3]~20 ), + .combout(\uart_tx_inst|baud_cnt[4]~21_combout ), + .cout(\uart_tx_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \uart_tx_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [13] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N8 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N7 +dffeas \fifo_read_inst|baud_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N13 +dffeas \fifo_read_inst|baud_cnt[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N23 +dffeas \fifo_read_inst|baud_cnt[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N27 +dffeas \fifo_read_inst|baud_cnt[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N12 +cycloneive_lcell_comb \fifo_read_inst|Add2~4 ( +// Equation(s): +// \fifo_read_inst|Add2~4_combout = (\fifo_read_inst|bit_cnt [2] & (\fifo_read_inst|Add2~3 $ (GND))) # (!\fifo_read_inst|bit_cnt [2] & (!\fifo_read_inst|Add2~3 & VCC)) +// \fifo_read_inst|Add2~5 = CARRY((\fifo_read_inst|bit_cnt [2] & !\fifo_read_inst|Add2~3 )) + + .dataa(\fifo_read_inst|bit_cnt [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|Add2~3 ), + .combout(\fifo_read_inst|Add2~4_combout ), + .cout(\fifo_read_inst|Add2~5 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~4 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|Add2~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y24_N9 +dffeas \data_num[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[0]~24_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[0]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[0] .is_wysiwyg = "true"; +defparam \data_num[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N13 +dffeas \data_num[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[2]~28_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[2]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[2] .is_wysiwyg = "true"; +defparam \data_num[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N11 +dffeas \data_num[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[1]~26_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[1]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[1] .is_wysiwyg = "true"; +defparam \data_num[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N15 +dffeas \data_num[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[3]~30_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[3]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[3] .is_wysiwyg = "true"; +defparam \data_num[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N17 +dffeas \data_num[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[4]~32_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[4]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[4] .is_wysiwyg = "true"; +defparam \data_num[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N19 +dffeas \data_num[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[5]~34_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[5]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[5] .is_wysiwyg = "true"; +defparam \data_num[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N21 +dffeas \data_num[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[6]~36_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[6]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[6] .is_wysiwyg = "true"; +defparam \data_num[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N23 +dffeas \data_num[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[7]~38_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[7]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[7] .is_wysiwyg = "true"; +defparam \data_num[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N25 +dffeas \data_num[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[8]~40_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[8]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[8] .is_wysiwyg = "true"; +defparam \data_num[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N27 +dffeas \data_num[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[9]~42_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[9]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[9] .is_wysiwyg = "true"; +defparam \data_num[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N29 +dffeas \data_num[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[10]~44_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[10]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[10] .is_wysiwyg = "true"; +defparam \data_num[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N31 +dffeas \data_num[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[11]~46_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[11]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[11] .is_wysiwyg = "true"; +defparam \data_num[11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N1 +dffeas \data_num[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[12]~48_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[12]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[12] .is_wysiwyg = "true"; +defparam \data_num[12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N3 +dffeas \data_num[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[13]~50_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[13]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[13] .is_wysiwyg = "true"; +defparam \data_num[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N5 +dffeas \data_num[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[14]~52_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[14]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[14] .is_wysiwyg = "true"; +defparam \data_num[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N7 +dffeas \data_num[15] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[15]~54_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[15]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[15] .is_wysiwyg = "true"; +defparam \data_num[15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N9 +dffeas \data_num[16] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[16]~56_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[16]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[16] .is_wysiwyg = "true"; +defparam \data_num[16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N11 +dffeas \data_num[17] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[17]~58_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[17]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[17] .is_wysiwyg = "true"; +defparam \data_num[17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N13 +dffeas \data_num[18] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[18]~60_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[18]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[18] .is_wysiwyg = "true"; +defparam \data_num[18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N15 +dffeas \data_num[19] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[19]~62_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[19]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[19] .is_wysiwyg = "true"; +defparam \data_num[19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N17 +dffeas \data_num[20] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[20]~64_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[20]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[20] .is_wysiwyg = "true"; +defparam \data_num[20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N19 +dffeas \data_num[21] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[21]~66_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[21]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[21] .is_wysiwyg = "true"; +defparam \data_num[21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N21 +dffeas \data_num[22] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[22]~68_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[22]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[22] .is_wysiwyg = "true"; +defparam \data_num[22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N23 +dffeas \data_num[23] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[23]~70_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[23]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[23] .is_wysiwyg = "true"; +defparam \data_num[23] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N0 +cycloneive_lcell_comb \Add1~0 ( +// Equation(s): +// \Add1~0_combout = cnt_wait[0] $ (VCC) +// \Add1~1 = CARRY(cnt_wait[0]) + + .dataa(gnd), + .datab(cnt_wait[0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\Add1~0_combout ), + .cout(\Add1~1 )); +// synopsys translate_off +defparam \Add1~0 .lut_mask = 16'h33CC; +defparam \Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N2 +cycloneive_lcell_comb \Add1~2 ( +// Equation(s): +// \Add1~2_combout = (cnt_wait[1] & (!\Add1~1 )) # (!cnt_wait[1] & ((\Add1~1 ) # (GND))) +// \Add1~3 = CARRY((!\Add1~1 ) # (!cnt_wait[1])) + + .dataa(cnt_wait[1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~1 ), + .combout(\Add1~2_combout ), + .cout(\Add1~3 )); +// synopsys translate_off +defparam \Add1~2 .lut_mask = 16'h5A5F; +defparam \Add1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N4 +cycloneive_lcell_comb \Add1~4 ( +// Equation(s): +// \Add1~4_combout = (cnt_wait[2] & (\Add1~3 $ (GND))) # (!cnt_wait[2] & (!\Add1~3 & VCC)) +// \Add1~5 = CARRY((cnt_wait[2] & !\Add1~3 )) + + .dataa(gnd), + .datab(cnt_wait[2]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~3 ), + .combout(\Add1~4_combout ), + .cout(\Add1~5 )); +// synopsys translate_off +defparam \Add1~4 .lut_mask = 16'hC30C; +defparam \Add1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N6 +cycloneive_lcell_comb \Add1~6 ( +// Equation(s): +// \Add1~6_combout = (cnt_wait[3] & (!\Add1~5 )) # (!cnt_wait[3] & ((\Add1~5 ) # (GND))) +// \Add1~7 = CARRY((!\Add1~5 ) # (!cnt_wait[3])) + + .dataa(gnd), + .datab(cnt_wait[3]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~5 ), + .combout(\Add1~6_combout ), + .cout(\Add1~7 )); +// synopsys translate_off +defparam \Add1~6 .lut_mask = 16'h3C3F; +defparam \Add1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N8 +cycloneive_lcell_comb \Add1~8 ( +// Equation(s): +// \Add1~8_combout = (cnt_wait[4] & (\Add1~7 $ (GND))) # (!cnt_wait[4] & (!\Add1~7 & VCC)) +// \Add1~9 = CARRY((cnt_wait[4] & !\Add1~7 )) + + .dataa(cnt_wait[4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~7 ), + .combout(\Add1~8_combout ), + .cout(\Add1~9 )); +// synopsys translate_off +defparam \Add1~8 .lut_mask = 16'hA50A; +defparam \Add1~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N10 +cycloneive_lcell_comb \Add1~10 ( +// Equation(s): +// \Add1~10_combout = (cnt_wait[5] & (!\Add1~9 )) # (!cnt_wait[5] & ((\Add1~9 ) # (GND))) +// \Add1~11 = CARRY((!\Add1~9 ) # (!cnt_wait[5])) + + .dataa(cnt_wait[5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~9 ), + .combout(\Add1~10_combout ), + .cout(\Add1~11 )); +// synopsys translate_off +defparam \Add1~10 .lut_mask = 16'h5A5F; +defparam \Add1~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N12 +cycloneive_lcell_comb \Add1~12 ( +// Equation(s): +// \Add1~12_combout = (cnt_wait[6] & (\Add1~11 $ (GND))) # (!cnt_wait[6] & (!\Add1~11 & VCC)) +// \Add1~13 = CARRY((cnt_wait[6] & !\Add1~11 )) + + .dataa(cnt_wait[6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~11 ), + .combout(\Add1~12_combout ), + .cout(\Add1~13 )); +// synopsys translate_off +defparam \Add1~12 .lut_mask = 16'hA50A; +defparam \Add1~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N14 +cycloneive_lcell_comb \Add1~14 ( +// Equation(s): +// \Add1~14_combout = (cnt_wait[7] & (!\Add1~13 )) # (!cnt_wait[7] & ((\Add1~13 ) # (GND))) +// \Add1~15 = CARRY((!\Add1~13 ) # (!cnt_wait[7])) + + .dataa(cnt_wait[7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~13 ), + .combout(\Add1~14_combout ), + .cout(\Add1~15 )); +// synopsys translate_off +defparam \Add1~14 .lut_mask = 16'h5A5F; +defparam \Add1~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N16 +cycloneive_lcell_comb \Add1~16 ( +// Equation(s): +// \Add1~16_combout = (cnt_wait[8] & (\Add1~15 $ (GND))) # (!cnt_wait[8] & (!\Add1~15 & VCC)) +// \Add1~17 = CARRY((cnt_wait[8] & !\Add1~15 )) + + .dataa(cnt_wait[8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~15 ), + .combout(\Add1~16_combout ), + .cout(\Add1~17 )); +// synopsys translate_off +defparam \Add1~16 .lut_mask = 16'hA50A; +defparam \Add1~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N18 +cycloneive_lcell_comb \Add1~18 ( +// Equation(s): +// \Add1~18_combout = (cnt_wait[9] & (!\Add1~17 )) # (!cnt_wait[9] & ((\Add1~17 ) # (GND))) +// \Add1~19 = CARRY((!\Add1~17 ) # (!cnt_wait[9])) + + .dataa(gnd), + .datab(cnt_wait[9]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~17 ), + .combout(\Add1~18_combout ), + .cout(\Add1~19 )); +// synopsys translate_off +defparam \Add1~18 .lut_mask = 16'h3C3F; +defparam \Add1~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N20 +cycloneive_lcell_comb \Add1~20 ( +// Equation(s): +// \Add1~20_combout = (cnt_wait[10] & (\Add1~19 $ (GND))) # (!cnt_wait[10] & (!\Add1~19 & VCC)) +// \Add1~21 = CARRY((cnt_wait[10] & !\Add1~19 )) + + .dataa(cnt_wait[10]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~19 ), + .combout(\Add1~20_combout ), + .cout(\Add1~21 )); +// synopsys translate_off +defparam \Add1~20 .lut_mask = 16'hA50A; +defparam \Add1~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N22 +cycloneive_lcell_comb \Add1~22 ( +// Equation(s): +// \Add1~22_combout = (cnt_wait[11] & (!\Add1~21 )) # (!cnt_wait[11] & ((\Add1~21 ) # (GND))) +// \Add1~23 = CARRY((!\Add1~21 ) # (!cnt_wait[11])) + + .dataa(gnd), + .datab(cnt_wait[11]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~21 ), + .combout(\Add1~22_combout ), + .cout(\Add1~23 )); +// synopsys translate_off +defparam \Add1~22 .lut_mask = 16'h3C3F; +defparam \Add1~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N24 +cycloneive_lcell_comb \Add1~24 ( +// Equation(s): +// \Add1~24_combout = (cnt_wait[12] & (\Add1~23 $ (GND))) # (!cnt_wait[12] & (!\Add1~23 & VCC)) +// \Add1~25 = CARRY((cnt_wait[12] & !\Add1~23 )) + + .dataa(gnd), + .datab(cnt_wait[12]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~23 ), + .combout(\Add1~24_combout ), + .cout(\Add1~25 )); +// synopsys translate_off +defparam \Add1~24 .lut_mask = 16'hC30C; +defparam \Add1~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N26 +cycloneive_lcell_comb \Add1~26 ( +// Equation(s): +// \Add1~26_combout = (cnt_wait[13] & (!\Add1~25 )) # (!cnt_wait[13] & ((\Add1~25 ) # (GND))) +// \Add1~27 = CARRY((!\Add1~25 ) # (!cnt_wait[13])) + + .dataa(gnd), + .datab(cnt_wait[13]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~25 ), + .combout(\Add1~26_combout ), + .cout(\Add1~27 )); +// synopsys translate_off +defparam \Add1~26 .lut_mask = 16'h3C3F; +defparam \Add1~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N28 +cycloneive_lcell_comb \Add1~28 ( +// Equation(s): +// \Add1~28_combout = (cnt_wait[14] & (\Add1~27 $ (GND))) # (!cnt_wait[14] & (!\Add1~27 & VCC)) +// \Add1~29 = CARRY((cnt_wait[14] & !\Add1~27 )) + + .dataa(cnt_wait[14]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~27 ), + .combout(\Add1~28_combout ), + .cout(\Add1~29 )); +// synopsys translate_off +defparam \Add1~28 .lut_mask = 16'hA50A; +defparam \Add1~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N30 +cycloneive_lcell_comb \Add1~30 ( +// Equation(s): +// \Add1~30_combout = \Add1~29 $ (cnt_wait[15]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(cnt_wait[15]), + .cin(\Add1~29 ), + .combout(\Add1~30_combout ), + .cout()); +// synopsys translate_off +defparam \Add1~30 .lut_mask = 16'h0FF0; +defparam \Add1~30 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N6 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[1]~15 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[1]~15_combout = (\fifo_read_inst|baud_cnt [1] & (!\fifo_read_inst|baud_cnt[0]~14 )) # (!\fifo_read_inst|baud_cnt [1] & ((\fifo_read_inst|baud_cnt[0]~14 ) # (GND))) +// \fifo_read_inst|baud_cnt[1]~16 = CARRY((!\fifo_read_inst|baud_cnt[0]~14 ) # (!\fifo_read_inst|baud_cnt [1])) + + .dataa(\fifo_read_inst|baud_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[0]~14 ), + .combout(\fifo_read_inst|baud_cnt[1]~15_combout ), + .cout(\fifo_read_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[1]~15 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N12 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[4]~21 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[4]~21_combout = (\fifo_read_inst|baud_cnt [4] & (\fifo_read_inst|baud_cnt[3]~20 $ (GND))) # (!\fifo_read_inst|baud_cnt [4] & (!\fifo_read_inst|baud_cnt[3]~20 & VCC)) +// \fifo_read_inst|baud_cnt[4]~22 = CARRY((\fifo_read_inst|baud_cnt [4] & !\fifo_read_inst|baud_cnt[3]~20 )) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[3]~20 ), + .combout(\fifo_read_inst|baud_cnt[4]~21_combout ), + .cout(\fifo_read_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N22 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[9]~31 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[9]~31_combout = (\fifo_read_inst|baud_cnt [9] & (!\fifo_read_inst|baud_cnt[8]~30 )) # (!\fifo_read_inst|baud_cnt [9] & ((\fifo_read_inst|baud_cnt[8]~30 ) # (GND))) +// \fifo_read_inst|baud_cnt[9]~32 = CARRY((!\fifo_read_inst|baud_cnt[8]~30 ) # (!\fifo_read_inst|baud_cnt [9])) + + .dataa(\fifo_read_inst|baud_cnt [9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[8]~30 ), + .combout(\fifo_read_inst|baud_cnt[9]~31_combout ), + .cout(\fifo_read_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[9]~31 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N26 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[11]~35 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[11]~35_combout = (\fifo_read_inst|baud_cnt [11] & (!\fifo_read_inst|baud_cnt[10]~34 )) # (!\fifo_read_inst|baud_cnt [11] & ((\fifo_read_inst|baud_cnt[10]~34 ) # (GND))) +// \fifo_read_inst|baud_cnt[11]~36 = CARRY((!\fifo_read_inst|baud_cnt[10]~34 ) # (!\fifo_read_inst|baud_cnt [11])) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[10]~34 ), + .combout(\fifo_read_inst|baud_cnt[11]~35_combout ), + .cout(\fifo_read_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[11]~35 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N8 +cycloneive_lcell_comb \data_num[0]~24 ( +// Equation(s): +// \data_num[0]~24_combout = (\uart_rx_inst|po_flag~q & (data_num[0] $ (VCC))) # (!\uart_rx_inst|po_flag~q & (data_num[0] & VCC)) +// \data_num[0]~25 = CARRY((\uart_rx_inst|po_flag~q & data_num[0])) + + .dataa(\uart_rx_inst|po_flag~q ), + .datab(data_num[0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\data_num[0]~24_combout ), + .cout(\data_num[0]~25 )); +// synopsys translate_off +defparam \data_num[0]~24 .lut_mask = 16'h6688; +defparam \data_num[0]~24 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N10 +cycloneive_lcell_comb \data_num[1]~26 ( +// Equation(s): +// \data_num[1]~26_combout = (data_num[1] & (!\data_num[0]~25 )) # (!data_num[1] & ((\data_num[0]~25 ) # (GND))) +// \data_num[1]~27 = CARRY((!\data_num[0]~25 ) # (!data_num[1])) + + .dataa(data_num[1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[0]~25 ), + .combout(\data_num[1]~26_combout ), + .cout(\data_num[1]~27 )); +// synopsys translate_off +defparam \data_num[1]~26 .lut_mask = 16'h5A5F; +defparam \data_num[1]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N12 +cycloneive_lcell_comb \data_num[2]~28 ( +// Equation(s): +// \data_num[2]~28_combout = (data_num[2] & (\data_num[1]~27 $ (GND))) # (!data_num[2] & (!\data_num[1]~27 & VCC)) +// \data_num[2]~29 = CARRY((data_num[2] & !\data_num[1]~27 )) + + .dataa(data_num[2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[1]~27 ), + .combout(\data_num[2]~28_combout ), + .cout(\data_num[2]~29 )); +// synopsys translate_off +defparam \data_num[2]~28 .lut_mask = 16'hA50A; +defparam \data_num[2]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N14 +cycloneive_lcell_comb \data_num[3]~30 ( +// Equation(s): +// \data_num[3]~30_combout = (data_num[3] & (!\data_num[2]~29 )) # (!data_num[3] & ((\data_num[2]~29 ) # (GND))) +// \data_num[3]~31 = CARRY((!\data_num[2]~29 ) # (!data_num[3])) + + .dataa(gnd), + .datab(data_num[3]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[2]~29 ), + .combout(\data_num[3]~30_combout ), + .cout(\data_num[3]~31 )); +// synopsys translate_off +defparam \data_num[3]~30 .lut_mask = 16'h3C3F; +defparam \data_num[3]~30 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N16 +cycloneive_lcell_comb \data_num[4]~32 ( +// Equation(s): +// \data_num[4]~32_combout = (data_num[4] & (\data_num[3]~31 $ (GND))) # (!data_num[4] & (!\data_num[3]~31 & VCC)) +// \data_num[4]~33 = CARRY((data_num[4] & !\data_num[3]~31 )) + + .dataa(gnd), + .datab(data_num[4]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[3]~31 ), + .combout(\data_num[4]~32_combout ), + .cout(\data_num[4]~33 )); +// synopsys translate_off +defparam \data_num[4]~32 .lut_mask = 16'hC30C; +defparam \data_num[4]~32 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N18 +cycloneive_lcell_comb \data_num[5]~34 ( +// Equation(s): +// \data_num[5]~34_combout = (data_num[5] & (!\data_num[4]~33 )) # (!data_num[5] & ((\data_num[4]~33 ) # (GND))) +// \data_num[5]~35 = CARRY((!\data_num[4]~33 ) # (!data_num[5])) + + .dataa(gnd), + .datab(data_num[5]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[4]~33 ), + .combout(\data_num[5]~34_combout ), + .cout(\data_num[5]~35 )); +// synopsys translate_off +defparam \data_num[5]~34 .lut_mask = 16'h3C3F; +defparam \data_num[5]~34 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N20 +cycloneive_lcell_comb \data_num[6]~36 ( +// Equation(s): +// \data_num[6]~36_combout = (data_num[6] & (\data_num[5]~35 $ (GND))) # (!data_num[6] & (!\data_num[5]~35 & VCC)) +// \data_num[6]~37 = CARRY((data_num[6] & !\data_num[5]~35 )) + + .dataa(gnd), + .datab(data_num[6]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[5]~35 ), + .combout(\data_num[6]~36_combout ), + .cout(\data_num[6]~37 )); +// synopsys translate_off +defparam \data_num[6]~36 .lut_mask = 16'hC30C; +defparam \data_num[6]~36 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N22 +cycloneive_lcell_comb \data_num[7]~38 ( +// Equation(s): +// \data_num[7]~38_combout = (data_num[7] & (!\data_num[6]~37 )) # (!data_num[7] & ((\data_num[6]~37 ) # (GND))) +// \data_num[7]~39 = CARRY((!\data_num[6]~37 ) # (!data_num[7])) + + .dataa(data_num[7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[6]~37 ), + .combout(\data_num[7]~38_combout ), + .cout(\data_num[7]~39 )); +// synopsys translate_off +defparam \data_num[7]~38 .lut_mask = 16'h5A5F; +defparam \data_num[7]~38 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N24 +cycloneive_lcell_comb \data_num[8]~40 ( +// Equation(s): +// \data_num[8]~40_combout = (data_num[8] & (\data_num[7]~39 $ (GND))) # (!data_num[8] & (!\data_num[7]~39 & VCC)) +// \data_num[8]~41 = CARRY((data_num[8] & !\data_num[7]~39 )) + + .dataa(gnd), + .datab(data_num[8]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[7]~39 ), + .combout(\data_num[8]~40_combout ), + .cout(\data_num[8]~41 )); +// synopsys translate_off +defparam \data_num[8]~40 .lut_mask = 16'hC30C; +defparam \data_num[8]~40 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N26 +cycloneive_lcell_comb \data_num[9]~42 ( +// Equation(s): +// \data_num[9]~42_combout = (data_num[9] & (!\data_num[8]~41 )) # (!data_num[9] & ((\data_num[8]~41 ) # (GND))) +// \data_num[9]~43 = CARRY((!\data_num[8]~41 ) # (!data_num[9])) + + .dataa(data_num[9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[8]~41 ), + .combout(\data_num[9]~42_combout ), + .cout(\data_num[9]~43 )); +// synopsys translate_off +defparam \data_num[9]~42 .lut_mask = 16'h5A5F; +defparam \data_num[9]~42 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N28 +cycloneive_lcell_comb \data_num[10]~44 ( +// Equation(s): +// \data_num[10]~44_combout = (data_num[10] & (\data_num[9]~43 $ (GND))) # (!data_num[10] & (!\data_num[9]~43 & VCC)) +// \data_num[10]~45 = CARRY((data_num[10] & !\data_num[9]~43 )) + + .dataa(gnd), + .datab(data_num[10]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[9]~43 ), + .combout(\data_num[10]~44_combout ), + .cout(\data_num[10]~45 )); +// synopsys translate_off +defparam \data_num[10]~44 .lut_mask = 16'hC30C; +defparam \data_num[10]~44 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N30 +cycloneive_lcell_comb \data_num[11]~46 ( +// Equation(s): +// \data_num[11]~46_combout = (data_num[11] & (!\data_num[10]~45 )) # (!data_num[11] & ((\data_num[10]~45 ) # (GND))) +// \data_num[11]~47 = CARRY((!\data_num[10]~45 ) # (!data_num[11])) + + .dataa(data_num[11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[10]~45 ), + .combout(\data_num[11]~46_combout ), + .cout(\data_num[11]~47 )); +// synopsys translate_off +defparam \data_num[11]~46 .lut_mask = 16'h5A5F; +defparam \data_num[11]~46 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N0 +cycloneive_lcell_comb \data_num[12]~48 ( +// Equation(s): +// \data_num[12]~48_combout = (data_num[12] & (\data_num[11]~47 $ (GND))) # (!data_num[12] & (!\data_num[11]~47 & VCC)) +// \data_num[12]~49 = CARRY((data_num[12] & !\data_num[11]~47 )) + + .dataa(gnd), + .datab(data_num[12]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[11]~47 ), + .combout(\data_num[12]~48_combout ), + .cout(\data_num[12]~49 )); +// synopsys translate_off +defparam \data_num[12]~48 .lut_mask = 16'hC30C; +defparam \data_num[12]~48 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N2 +cycloneive_lcell_comb \data_num[13]~50 ( +// Equation(s): +// \data_num[13]~50_combout = (data_num[13] & (!\data_num[12]~49 )) # (!data_num[13] & ((\data_num[12]~49 ) # (GND))) +// \data_num[13]~51 = CARRY((!\data_num[12]~49 ) # (!data_num[13])) + + .dataa(gnd), + .datab(data_num[13]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[12]~49 ), + .combout(\data_num[13]~50_combout ), + .cout(\data_num[13]~51 )); +// synopsys translate_off +defparam \data_num[13]~50 .lut_mask = 16'h3C3F; +defparam \data_num[13]~50 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N4 +cycloneive_lcell_comb \data_num[14]~52 ( +// Equation(s): +// \data_num[14]~52_combout = (data_num[14] & (\data_num[13]~51 $ (GND))) # (!data_num[14] & (!\data_num[13]~51 & VCC)) +// \data_num[14]~53 = CARRY((data_num[14] & !\data_num[13]~51 )) + + .dataa(gnd), + .datab(data_num[14]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[13]~51 ), + .combout(\data_num[14]~52_combout ), + .cout(\data_num[14]~53 )); +// synopsys translate_off +defparam \data_num[14]~52 .lut_mask = 16'hC30C; +defparam \data_num[14]~52 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N6 +cycloneive_lcell_comb \data_num[15]~54 ( +// Equation(s): +// \data_num[15]~54_combout = (data_num[15] & (!\data_num[14]~53 )) # (!data_num[15] & ((\data_num[14]~53 ) # (GND))) +// \data_num[15]~55 = CARRY((!\data_num[14]~53 ) # (!data_num[15])) + + .dataa(data_num[15]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[14]~53 ), + .combout(\data_num[15]~54_combout ), + .cout(\data_num[15]~55 )); +// synopsys translate_off +defparam \data_num[15]~54 .lut_mask = 16'h5A5F; +defparam \data_num[15]~54 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N8 +cycloneive_lcell_comb \data_num[16]~56 ( +// Equation(s): +// \data_num[16]~56_combout = (data_num[16] & (\data_num[15]~55 $ (GND))) # (!data_num[16] & (!\data_num[15]~55 & VCC)) +// \data_num[16]~57 = CARRY((data_num[16] & !\data_num[15]~55 )) + + .dataa(gnd), + .datab(data_num[16]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[15]~55 ), + .combout(\data_num[16]~56_combout ), + .cout(\data_num[16]~57 )); +// synopsys translate_off +defparam \data_num[16]~56 .lut_mask = 16'hC30C; +defparam \data_num[16]~56 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N10 +cycloneive_lcell_comb \data_num[17]~58 ( +// Equation(s): +// \data_num[17]~58_combout = (data_num[17] & (!\data_num[16]~57 )) # (!data_num[17] & ((\data_num[16]~57 ) # (GND))) +// \data_num[17]~59 = CARRY((!\data_num[16]~57 ) # (!data_num[17])) + + .dataa(data_num[17]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[16]~57 ), + .combout(\data_num[17]~58_combout ), + .cout(\data_num[17]~59 )); +// synopsys translate_off +defparam \data_num[17]~58 .lut_mask = 16'h5A5F; +defparam \data_num[17]~58 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N12 +cycloneive_lcell_comb \data_num[18]~60 ( +// Equation(s): +// \data_num[18]~60_combout = (data_num[18] & (\data_num[17]~59 $ (GND))) # (!data_num[18] & (!\data_num[17]~59 & VCC)) +// \data_num[18]~61 = CARRY((data_num[18] & !\data_num[17]~59 )) + + .dataa(data_num[18]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[17]~59 ), + .combout(\data_num[18]~60_combout ), + .cout(\data_num[18]~61 )); +// synopsys translate_off +defparam \data_num[18]~60 .lut_mask = 16'hA50A; +defparam \data_num[18]~60 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N14 +cycloneive_lcell_comb \data_num[19]~62 ( +// Equation(s): +// \data_num[19]~62_combout = (data_num[19] & (!\data_num[18]~61 )) # (!data_num[19] & ((\data_num[18]~61 ) # (GND))) +// \data_num[19]~63 = CARRY((!\data_num[18]~61 ) # (!data_num[19])) + + .dataa(gnd), + .datab(data_num[19]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[18]~61 ), + .combout(\data_num[19]~62_combout ), + .cout(\data_num[19]~63 )); +// synopsys translate_off +defparam \data_num[19]~62 .lut_mask = 16'h3C3F; +defparam \data_num[19]~62 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N16 +cycloneive_lcell_comb \data_num[20]~64 ( +// Equation(s): +// \data_num[20]~64_combout = (data_num[20] & (\data_num[19]~63 $ (GND))) # (!data_num[20] & (!\data_num[19]~63 & VCC)) +// \data_num[20]~65 = CARRY((data_num[20] & !\data_num[19]~63 )) + + .dataa(gnd), + .datab(data_num[20]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[19]~63 ), + .combout(\data_num[20]~64_combout ), + .cout(\data_num[20]~65 )); +// synopsys translate_off +defparam \data_num[20]~64 .lut_mask = 16'hC30C; +defparam \data_num[20]~64 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N18 +cycloneive_lcell_comb \data_num[21]~66 ( +// Equation(s): +// \data_num[21]~66_combout = (data_num[21] & (!\data_num[20]~65 )) # (!data_num[21] & ((\data_num[20]~65 ) # (GND))) +// \data_num[21]~67 = CARRY((!\data_num[20]~65 ) # (!data_num[21])) + + .dataa(gnd), + .datab(data_num[21]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[20]~65 ), + .combout(\data_num[21]~66_combout ), + .cout(\data_num[21]~67 )); +// synopsys translate_off +defparam \data_num[21]~66 .lut_mask = 16'h3C3F; +defparam \data_num[21]~66 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N20 +cycloneive_lcell_comb \data_num[22]~68 ( +// Equation(s): +// \data_num[22]~68_combout = (data_num[22] & (\data_num[21]~67 $ (GND))) # (!data_num[22] & (!\data_num[21]~67 & VCC)) +// \data_num[22]~69 = CARRY((data_num[22] & !\data_num[21]~67 )) + + .dataa(gnd), + .datab(data_num[22]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[21]~67 ), + .combout(\data_num[22]~68_combout ), + .cout(\data_num[22]~69 )); +// synopsys translate_off +defparam \data_num[22]~68 .lut_mask = 16'hC30C; +defparam \data_num[22]~68 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N22 +cycloneive_lcell_comb \data_num[23]~70 ( +// Equation(s): +// \data_num[23]~70_combout = data_num[23] $ (\data_num[22]~69 ) + + .dataa(data_num[23]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\data_num[22]~69 ), + .combout(\data_num[23]~70_combout ), + .cout()); +// synopsys translate_off +defparam \data_num[23]~70 .lut_mask = 16'h5A5A; +defparam \data_num[23]~70 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X28_Y26_N3 +dffeas \fifo_read_inst|cnt_read[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[1]~12_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N7 +dffeas \fifo_read_inst|cnt_read[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[3]~16_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N1 +dffeas \fifo_read_inst|cnt_read[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[0]~10_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N5 +dffeas \fifo_read_inst|cnt_read[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[2]~14_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N9 +dffeas \fifo_read_inst|cnt_read[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[4]~18_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N11 +dffeas \fifo_read_inst|cnt_read[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[5]~20_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N13 +dffeas \fifo_read_inst|cnt_read[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[6]~22_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N15 +dffeas \fifo_read_inst|cnt_read[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[7]~24_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N17 +dffeas \fifo_read_inst|cnt_read[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[8]~26_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N19 +dffeas \fifo_read_inst|cnt_read[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[9]~28_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N24 +cycloneive_lcell_comb \uart_rx_inst|Add1~0 ( +// Equation(s): +// \uart_rx_inst|Add1~0_combout = (\uart_rx_inst|bit_cnt [0] & (\uart_rx_inst|bit_flag~q $ (VCC))) # (!\uart_rx_inst|bit_cnt [0] & (\uart_rx_inst|bit_flag~q & VCC)) +// \uart_rx_inst|Add1~1 = CARRY((\uart_rx_inst|bit_cnt [0] & \uart_rx_inst|bit_flag~q )) + + .dataa(\uart_rx_inst|bit_cnt [0]), + .datab(\uart_rx_inst|bit_flag~q ), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_rx_inst|Add1~0_combout ), + .cout(\uart_rx_inst|Add1~1 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~0 .lut_mask = 16'h6688; +defparam \uart_rx_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N28 +cycloneive_lcell_comb \uart_rx_inst|Add1~4 ( +// Equation(s): +// \uart_rx_inst|Add1~4_combout = (\uart_rx_inst|bit_cnt [2] & (\uart_rx_inst|Add1~3 $ (GND))) # (!\uart_rx_inst|bit_cnt [2] & (!\uart_rx_inst|Add1~3 & VCC)) +// \uart_rx_inst|Add1~5 = CARRY((\uart_rx_inst|bit_cnt [2] & !\uart_rx_inst|Add1~3 )) + + .dataa(gnd), + .datab(\uart_rx_inst|bit_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|Add1~3 ), + .combout(\uart_rx_inst|Add1~4_combout ), + .cout(\uart_rx_inst|Add1~5 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~4 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|Add1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N30 +cycloneive_lcell_comb \uart_rx_inst|Add1~6 ( +// Equation(s): +// \uart_rx_inst|Add1~6_combout = \uart_rx_inst|Add1~5 $ (\uart_rx_inst|bit_cnt [3]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|bit_cnt [3]), + .cin(\uart_rx_inst|Add1~5 ), + .combout(\uart_rx_inst|Add1~6_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Add1~6 .lut_mask = 16'h0FF0; +defparam \uart_rx_inst|Add1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N11 +dffeas \uart_rx_inst|baud_cnt[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N0 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[0]~10 ( +// Equation(s): +// \fifo_read_inst|cnt_read[0]~10_combout = (\fifo_read_inst|rd_en~q & (\fifo_read_inst|cnt_read [0] $ (VCC))) # (!\fifo_read_inst|rd_en~q & (\fifo_read_inst|cnt_read [0] & VCC)) +// \fifo_read_inst|cnt_read[0]~11 = CARRY((\fifo_read_inst|rd_en~q & \fifo_read_inst|cnt_read [0])) + + .dataa(\fifo_read_inst|rd_en~q ), + .datab(\fifo_read_inst|cnt_read [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|cnt_read[0]~10_combout ), + .cout(\fifo_read_inst|cnt_read[0]~11 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[0]~10 .lut_mask = 16'h6688; +defparam \fifo_read_inst|cnt_read[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N2 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[1]~12 ( +// Equation(s): +// \fifo_read_inst|cnt_read[1]~12_combout = (\fifo_read_inst|cnt_read [1] & (!\fifo_read_inst|cnt_read[0]~11 )) # (!\fifo_read_inst|cnt_read [1] & ((\fifo_read_inst|cnt_read[0]~11 ) # (GND))) +// \fifo_read_inst|cnt_read[1]~13 = CARRY((!\fifo_read_inst|cnt_read[0]~11 ) # (!\fifo_read_inst|cnt_read [1])) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [1]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[0]~11 ), + .combout(\fifo_read_inst|cnt_read[1]~12_combout ), + .cout(\fifo_read_inst|cnt_read[1]~13 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[1]~12 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|cnt_read[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N4 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[2]~14 ( +// Equation(s): +// \fifo_read_inst|cnt_read[2]~14_combout = (\fifo_read_inst|cnt_read [2] & (\fifo_read_inst|cnt_read[1]~13 $ (GND))) # (!\fifo_read_inst|cnt_read [2] & (!\fifo_read_inst|cnt_read[1]~13 & VCC)) +// \fifo_read_inst|cnt_read[2]~15 = CARRY((\fifo_read_inst|cnt_read [2] & !\fifo_read_inst|cnt_read[1]~13 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[1]~13 ), + .combout(\fifo_read_inst|cnt_read[2]~14_combout ), + .cout(\fifo_read_inst|cnt_read[2]~15 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[2]~14 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N6 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[3]~16 ( +// Equation(s): +// \fifo_read_inst|cnt_read[3]~16_combout = (\fifo_read_inst|cnt_read [3] & (!\fifo_read_inst|cnt_read[2]~15 )) # (!\fifo_read_inst|cnt_read [3] & ((\fifo_read_inst|cnt_read[2]~15 ) # (GND))) +// \fifo_read_inst|cnt_read[3]~17 = CARRY((!\fifo_read_inst|cnt_read[2]~15 ) # (!\fifo_read_inst|cnt_read [3])) + + .dataa(\fifo_read_inst|cnt_read [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[2]~15 ), + .combout(\fifo_read_inst|cnt_read[3]~16_combout ), + .cout(\fifo_read_inst|cnt_read[3]~17 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[3]~16 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|cnt_read[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N8 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[4]~18 ( +// Equation(s): +// \fifo_read_inst|cnt_read[4]~18_combout = (\fifo_read_inst|cnt_read [4] & (\fifo_read_inst|cnt_read[3]~17 $ (GND))) # (!\fifo_read_inst|cnt_read [4] & (!\fifo_read_inst|cnt_read[3]~17 & VCC)) +// \fifo_read_inst|cnt_read[4]~19 = CARRY((\fifo_read_inst|cnt_read [4] & !\fifo_read_inst|cnt_read[3]~17 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[3]~17 ), + .combout(\fifo_read_inst|cnt_read[4]~18_combout ), + .cout(\fifo_read_inst|cnt_read[4]~19 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[4]~18 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N10 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[5]~20 ( +// Equation(s): +// \fifo_read_inst|cnt_read[5]~20_combout = (\fifo_read_inst|cnt_read [5] & (!\fifo_read_inst|cnt_read[4]~19 )) # (!\fifo_read_inst|cnt_read [5] & ((\fifo_read_inst|cnt_read[4]~19 ) # (GND))) +// \fifo_read_inst|cnt_read[5]~21 = CARRY((!\fifo_read_inst|cnt_read[4]~19 ) # (!\fifo_read_inst|cnt_read [5])) + + .dataa(\fifo_read_inst|cnt_read [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[4]~19 ), + .combout(\fifo_read_inst|cnt_read[5]~20_combout ), + .cout(\fifo_read_inst|cnt_read[5]~21 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[5]~20 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|cnt_read[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N12 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[6]~22 ( +// Equation(s): +// \fifo_read_inst|cnt_read[6]~22_combout = (\fifo_read_inst|cnt_read [6] & (\fifo_read_inst|cnt_read[5]~21 $ (GND))) # (!\fifo_read_inst|cnt_read [6] & (!\fifo_read_inst|cnt_read[5]~21 & VCC)) +// \fifo_read_inst|cnt_read[6]~23 = CARRY((\fifo_read_inst|cnt_read [6] & !\fifo_read_inst|cnt_read[5]~21 )) + + .dataa(\fifo_read_inst|cnt_read [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[5]~21 ), + .combout(\fifo_read_inst|cnt_read[6]~22_combout ), + .cout(\fifo_read_inst|cnt_read[6]~23 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[6]~22 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|cnt_read[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N14 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[7]~24 ( +// Equation(s): +// \fifo_read_inst|cnt_read[7]~24_combout = (\fifo_read_inst|cnt_read [7] & (!\fifo_read_inst|cnt_read[6]~23 )) # (!\fifo_read_inst|cnt_read [7] & ((\fifo_read_inst|cnt_read[6]~23 ) # (GND))) +// \fifo_read_inst|cnt_read[7]~25 = CARRY((!\fifo_read_inst|cnt_read[6]~23 ) # (!\fifo_read_inst|cnt_read [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[6]~23 ), + .combout(\fifo_read_inst|cnt_read[7]~24_combout ), + .cout(\fifo_read_inst|cnt_read[7]~25 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[7]~24 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|cnt_read[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N16 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[8]~26 ( +// Equation(s): +// \fifo_read_inst|cnt_read[8]~26_combout = (\fifo_read_inst|cnt_read [8] & (\fifo_read_inst|cnt_read[7]~25 $ (GND))) # (!\fifo_read_inst|cnt_read [8] & (!\fifo_read_inst|cnt_read[7]~25 & VCC)) +// \fifo_read_inst|cnt_read[8]~27 = CARRY((\fifo_read_inst|cnt_read [8] & !\fifo_read_inst|cnt_read[7]~25 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [8]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[7]~25 ), + .combout(\fifo_read_inst|cnt_read[8]~26_combout ), + .cout(\fifo_read_inst|cnt_read[8]~27 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[8]~26 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N18 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[9]~28 ( +// Equation(s): +// \fifo_read_inst|cnt_read[9]~28_combout = \fifo_read_inst|cnt_read [9] $ (\fifo_read_inst|cnt_read[8]~27 ) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|cnt_read[8]~27 ), + .combout(\fifo_read_inst|cnt_read[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[9]~28 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|cnt_read[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N10 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[4]~21 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[4]~21_combout = (\uart_rx_inst|baud_cnt [4] & (\uart_rx_inst|baud_cnt[3]~20 $ (GND))) # (!\uart_rx_inst|baud_cnt [4] & (!\uart_rx_inst|baud_cnt[3]~20 & VCC)) +// \uart_rx_inst|baud_cnt[4]~22 = CARRY((\uart_rx_inst|baud_cnt [4] & !\uart_rx_inst|baud_cnt[3]~20 )) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[3]~20 ), + .combout(\uart_rx_inst|baud_cnt[4]~21_combout ), + .cout(\uart_rx_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X22_Y22_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 .lut_mask = 16'h8C9D; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N13 +dffeas \uart_tx_inst|bit_cnt[0] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[0]~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|Mux0~0 ( +// Equation(s): +// \uart_tx_inst|Mux0~0_combout = (\uart_tx_inst|bit_cnt [1] & (((\uart_tx_inst|bit_cnt [0])))) # (!\uart_tx_inst|bit_cnt [1] & ((\uart_tx_inst|bit_cnt [0] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b +// [4])) # (!\uart_tx_inst|bit_cnt [0] & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3]))))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [4]), + .datab(\uart_tx_inst|bit_cnt [1]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3]), + .datad(\uart_tx_inst|bit_cnt [0]), + .cin(gnd), + .combout(\uart_tx_inst|Mux0~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Mux0~0 .lut_mask = 16'hEE30; +defparam \uart_tx_inst|Mux0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y15_N8 +cycloneive_lcell_comb \uart_tx_inst|Mux0~1 ( +// Equation(s): +// \uart_tx_inst|Mux0~1_combout = (\uart_tx_inst|Mux0~0_combout & (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6]) # (!\uart_tx_inst|bit_cnt [1])))) # (!\uart_tx_inst|Mux0~0_combout & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5] & ((\uart_tx_inst|bit_cnt [1])))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6]), + .datac(\uart_tx_inst|Mux0~0_combout ), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Mux0~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Mux0~1 .lut_mask = 16'hCAF0; +defparam \uart_tx_inst|Mux0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N16 +cycloneive_lcell_comb \uart_tx_inst|tx~0 ( +// Equation(s): +// \uart_tx_inst|tx~0_combout = (\uart_tx_inst|bit_cnt [0] & ((\uart_tx_inst|bit_cnt [1] & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2]))) # (!\uart_tx_inst|bit_cnt [1] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0])))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~0 .lut_mask = 16'hA088; +defparam \uart_tx_inst|tx~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N10 +cycloneive_lcell_comb \uart_tx_inst|tx~1 ( +// Equation(s): +// \uart_tx_inst|tx~1_combout = (\uart_tx_inst|tx~0_combout ) # ((!\uart_tx_inst|bit_cnt [0] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1] & \uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|tx~0_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~1 .lut_mask = 16'hDCCC; +defparam \uart_tx_inst|tx~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N22 +cycloneive_lcell_comb \uart_tx_inst|tx~2 ( +// Equation(s): +// \uart_tx_inst|tx~2_combout = (\uart_tx_inst|bit_flag~q & ((\uart_tx_inst|bit_cnt [2] & (\uart_tx_inst|Mux0~1_combout )) # (!\uart_tx_inst|bit_cnt [2] & ((\uart_tx_inst|tx~1_combout ))))) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\uart_tx_inst|Mux0~1_combout ), + .datad(\uart_tx_inst|tx~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|tx~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~2 .lut_mask = 16'hA280; +defparam \uart_tx_inst|tx~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N27 +dffeas \uart_tx_inst|bit_cnt[3] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[3]~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X21_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 .lut_mask = 16'h3111; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ) # (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 .lut_mask = 16'hAFEF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 .lut_mask = 16'h0CAE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N20 +cycloneive_lcell_comb \uart_tx_inst|Add1~0 ( +// Equation(s): +// \uart_tx_inst|Add1~0_combout = \uart_tx_inst|bit_cnt [2] $ (((\uart_tx_inst|bit_cnt [0] & \uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(gnd), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Add1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Add1~0 .lut_mask = 16'h5AF0; +defparam \uart_tx_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N30 +cycloneive_lcell_comb \uart_tx_inst|Add1~1 ( +// Equation(s): +// \uart_tx_inst|Add1~1_combout = \uart_tx_inst|bit_cnt [3] $ (((\uart_tx_inst|bit_cnt [0] & (\uart_tx_inst|bit_cnt [2] & \uart_tx_inst|bit_cnt [1])))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\uart_tx_inst|bit_cnt [3]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Add1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Add1~1 .lut_mask = 16'h78F0; +defparam \uart_tx_inst|Add1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N26 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[3]~4 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[3]~4_combout = (!\uart_tx_inst|always0~1_combout & ((\uart_tx_inst|always3~0_combout & ((\uart_tx_inst|bit_cnt [3]))) # (!\uart_tx_inst|always3~0_combout & (\uart_tx_inst|Add1~1_combout )))) + + .dataa(\uart_tx_inst|Add1~1_combout ), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [3]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[3]~4_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[3]~4 .lut_mask = 16'h00E2; +defparam \uart_tx_inst|bit_cnt[3]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 .lut_mask = 16'h0400; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N29 +dffeas read_valid( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\read_valid~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\read_valid~q ), + .prn(vcc)); +// synopsys translate_off +defparam read_valid.is_wysiwyg = "true"; +defparam read_valid.power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 .lut_mask = 16'h000F; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout = (\read_valid~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & ((\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout )))) + + .dataa(\read_valid~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 .lut_mask = 16'h8088; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|Equal1~3 ( +// Equation(s): +// \uart_tx_inst|Equal1~3_combout = (\uart_tx_inst|baud_cnt [12] & \uart_tx_inst|baud_cnt [10]) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [12]), + .datac(gnd), + .datad(\uart_tx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~3 .lut_mask = 16'hCC00; +defparam \uart_tx_inst|Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N2 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout = (\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] & !\fifo_read_inst|rd_en~q ))) + + .dataa(\fifo_read_inst|read_en_dly~q ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 .lut_mask = 16'h0080; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N0 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N13 +dffeas \fifo_read_inst|bit_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Add2~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal1~0 ( +// Equation(s): +// \fifo_read_inst|Equal1~0_combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~0 .lut_mask = 16'h0001; +defparam \fifo_read_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N2 +cycloneive_lcell_comb \fifo_read_inst|Equal1~1 ( +// Equation(s): +// \fifo_read_inst|Equal1~1_combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & (\fifo_read_inst|Equal1~0_combout & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|Equal1~0_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~1 .lut_mask = 16'h0004; +defparam \fifo_read_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .lut_mask = 16'h50F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X27_Y23_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 .lut_mask = 16'h9966; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X14_Y20_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N25 +dffeas \cnt_wait[15] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[15]~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[15]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[15] .is_wysiwyg = "true"; +defparam \cnt_wait[15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N27 +dffeas \cnt_wait[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[14]~3_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[14]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[14] .is_wysiwyg = "true"; +defparam \cnt_wait[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N21 +dffeas \cnt_wait[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[13]~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[13]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[13] .is_wysiwyg = "true"; +defparam \cnt_wait[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N23 +dffeas \cnt_wait[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[12]~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[12]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[12] .is_wysiwyg = "true"; +defparam \cnt_wait[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N8 +cycloneive_lcell_comb \Equal0~0 ( +// Equation(s): +// \Equal0~0_combout = (!cnt_wait[12] & (!cnt_wait[15] & (!cnt_wait[14] & !cnt_wait[13]))) + + .dataa(cnt_wait[12]), + .datab(cnt_wait[15]), + .datac(cnt_wait[14]), + .datad(cnt_wait[13]), + .cin(gnd), + .combout(\Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~0 .lut_mask = 16'h0001; +defparam \Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y26_N23 +dffeas \cnt_wait[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[9]~6_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[9]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[9] .is_wysiwyg = "true"; +defparam \cnt_wait[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N9 +dffeas \cnt_wait[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[11]~7_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[11]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[11] .is_wysiwyg = "true"; +defparam \cnt_wait[11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N11 +dffeas \cnt_wait[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[10]~8_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[10]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[10] .is_wysiwyg = "true"; +defparam \cnt_wait[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N5 +dffeas \cnt_wait[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[8]~9_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[8]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[8] .is_wysiwyg = "true"; +defparam \cnt_wait[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N14 +cycloneive_lcell_comb \Equal0~1 ( +// Equation(s): +// \Equal0~1_combout = (!cnt_wait[10] & (!cnt_wait[8] & (cnt_wait[9] & !cnt_wait[11]))) + + .dataa(cnt_wait[10]), + .datab(cnt_wait[8]), + .datac(cnt_wait[9]), + .datad(cnt_wait[11]), + .cin(gnd), + .combout(\Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~1 .lut_mask = 16'h0010; +defparam \Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N3 +dffeas \cnt_wait[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[7]~10_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[7]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[7] .is_wysiwyg = "true"; +defparam \cnt_wait[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N13 +dffeas \cnt_wait[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[6]~11_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[6]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[6] .is_wysiwyg = "true"; +defparam \cnt_wait[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N15 +dffeas \cnt_wait[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[5]~12_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[5]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[5] .is_wysiwyg = "true"; +defparam \cnt_wait[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N17 +dffeas \cnt_wait[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[4]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[4]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[4] .is_wysiwyg = "true"; +defparam \cnt_wait[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N10 +cycloneive_lcell_comb \Equal0~2 ( +// Equation(s): +// \Equal0~2_combout = (cnt_wait[6] & (cnt_wait[7] & (cnt_wait[5] & !cnt_wait[4]))) + + .dataa(cnt_wait[6]), + .datab(cnt_wait[7]), + .datac(cnt_wait[5]), + .datad(cnt_wait[4]), + .cin(gnd), + .combout(\Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~2 .lut_mask = 16'h0080; +defparam \Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N5 +dffeas \cnt_wait[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[3]~14_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[3]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[3] .is_wysiwyg = "true"; +defparam \cnt_wait[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N7 +dffeas \cnt_wait[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[2]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[2]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[2] .is_wysiwyg = "true"; +defparam \cnt_wait[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N1 +dffeas \cnt_wait[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[1]~16_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[1]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[1] .is_wysiwyg = "true"; +defparam \cnt_wait[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N19 +dffeas \cnt_wait[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[0]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[0]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[0] .is_wysiwyg = "true"; +defparam \cnt_wait[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N28 +cycloneive_lcell_comb \Equal0~3 ( +// Equation(s): +// \Equal0~3_combout = (!cnt_wait[0] & (cnt_wait[1] & (cnt_wait[3] & cnt_wait[2]))) + + .dataa(cnt_wait[0]), + .datab(cnt_wait[1]), + .datac(cnt_wait[3]), + .datad(cnt_wait[2]), + .cin(gnd), + .combout(\Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~3 .lut_mask = 16'h4000; +defparam \Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N30 +cycloneive_lcell_comb \Equal0~4 ( +// Equation(s): +// \Equal0~4_combout = (\Equal0~2_combout & (\Equal0~3_combout & (\Equal0~0_combout & \Equal0~1_combout ))) + + .dataa(\Equal0~2_combout ), + .datab(\Equal0~3_combout ), + .datac(\Equal0~0_combout ), + .datad(\Equal0~1_combout ), + .cin(gnd), + .combout(\Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~4 .lut_mask = 16'h8000; +defparam \Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N16 +cycloneive_lcell_comb \read_valid~0 ( +// Equation(s): +// \read_valid~0_combout = (\Equal0~4_combout ) # ((\read_valid~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ) # (!\Equal2~1_combout )))) + + .dataa(\Equal2~1_combout ), + .datab(\Equal0~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .datad(\read_valid~q ), + .cin(gnd), + .combout(\read_valid~0_combout ), + .cout()); +// synopsys translate_off +defparam \read_valid~0 .lut_mask = 16'hFDCC; +defparam \read_valid~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N28 +cycloneive_lcell_comb \read_valid~1 ( +// Equation(s): +// \read_valid~1_combout = (\read_valid~0_combout ) # ((\read_valid~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ) # (!\Equal2~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datab(\Equal2~0_combout ), + .datac(\read_valid~q ), + .datad(\read_valid~0_combout ), + .cin(gnd), + .combout(\read_valid~1_combout ), + .cout()); +// synopsys translate_off +defparam \read_valid~1 .lut_mask = 16'hFFB0; +defparam \read_valid~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 .lut_mask = 16'hECFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk +// [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3] $ (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 .lut_mask = 16'h6AAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N10 +cycloneive_lcell_comb \fifo_read_inst|Equal1~2 ( +// Equation(s): +// \fifo_read_inst|Equal1~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] & \fifo_read_inst|Equal1~1_combout )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datac(gnd), + .datad(\fifo_read_inst|Equal1~1_combout ), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~2 .lut_mask = 16'h2200; +defparam \fifo_read_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N2 +cycloneive_lcell_comb \fifo_read_inst|Equal5~1 ( +// Equation(s): +// \fifo_read_inst|Equal5~1_combout = (\fifo_read_inst|baud_cnt [11] & (!\fifo_read_inst|baud_cnt [10] & (\fifo_read_inst|baud_cnt [9] & !\fifo_read_inst|baud_cnt [6]))) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(\fifo_read_inst|baud_cnt [9]), + .datad(\fifo_read_inst|baud_cnt [6]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~1 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h4182; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'hF000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'hC000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 .lut_mask = 16'hCA0A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'h8200; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout )) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'hF5A0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'hE0C2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N0 +cycloneive_lcell_comb \Equal1~0 ( +// Equation(s): +// \Equal1~0_combout = (data_num[2]) # (((data_num[0]) # (!data_num[1])) # (!data_num[3])) + + .dataa(data_num[2]), + .datab(data_num[3]), + .datac(data_num[0]), + .datad(data_num[1]), + .cin(gnd), + .combout(\Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~0 .lut_mask = 16'hFBFF; +defparam \Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N2 +cycloneive_lcell_comb \Equal1~1 ( +// Equation(s): +// \Equal1~1_combout = (data_num[6]) # ((data_num[5]) # ((data_num[7]) # (data_num[4]))) + + .dataa(data_num[6]), + .datab(data_num[5]), + .datac(data_num[7]), + .datad(data_num[4]), + .cin(gnd), + .combout(\Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~1 .lut_mask = 16'hFFFE; +defparam \Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N4 +cycloneive_lcell_comb \Equal1~2 ( +// Equation(s): +// \Equal1~2_combout = (data_num[11]) # ((data_num[10]) # ((data_num[9]) # (data_num[8]))) + + .dataa(data_num[11]), + .datab(data_num[10]), + .datac(data_num[9]), + .datad(data_num[8]), + .cin(gnd), + .combout(\Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~2 .lut_mask = 16'hFFFE; +defparam \Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N24 +cycloneive_lcell_comb \Equal1~3 ( +// Equation(s): +// \Equal1~3_combout = (data_num[15]) # ((data_num[13]) # ((data_num[14]) # (data_num[12]))) + + .dataa(data_num[15]), + .datab(data_num[13]), + .datac(data_num[14]), + .datad(data_num[12]), + .cin(gnd), + .combout(\Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~3 .lut_mask = 16'hFFFE; +defparam \Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N6 +cycloneive_lcell_comb \Equal1~4 ( +// Equation(s): +// \Equal1~4_combout = (\Equal1~3_combout ) # ((\Equal1~1_combout ) # ((\Equal1~2_combout ) # (\Equal1~0_combout ))) + + .dataa(\Equal1~3_combout ), + .datab(\Equal1~1_combout ), + .datac(\Equal1~2_combout ), + .datad(\Equal1~0_combout ), + .cin(gnd), + .combout(\Equal1~4_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~4 .lut_mask = 16'hFFFE; +defparam \Equal1~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N26 +cycloneive_lcell_comb \Equal1~5 ( +// Equation(s): +// \Equal1~5_combout = (data_num[18]) # ((data_num[19]) # ((data_num[16]) # (data_num[17]))) + + .dataa(data_num[18]), + .datab(data_num[19]), + .datac(data_num[16]), + .datad(data_num[17]), + .cin(gnd), + .combout(\Equal1~5_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~5 .lut_mask = 16'hFFFE; +defparam \Equal1~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N28 +cycloneive_lcell_comb \Equal1~6 ( +// Equation(s): +// \Equal1~6_combout = (data_num[22]) # ((data_num[21]) # ((data_num[23]) # (data_num[20]))) + + .dataa(data_num[22]), + .datab(data_num[21]), + .datac(data_num[23]), + .datad(data_num[20]), + .cin(gnd), + .combout(\Equal1~6_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~6 .lut_mask = 16'hFFFE; +defparam \Equal1~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N18 +cycloneive_lcell_comb \cnt_wait[8]~0 ( +// Equation(s): +// \cnt_wait[8]~0_combout = (!\Equal0~4_combout & ((\Equal1~4_combout ) # ((\Equal1~5_combout ) # (\Equal1~6_combout )))) + + .dataa(\Equal1~4_combout ), + .datab(\Equal0~4_combout ), + .datac(\Equal1~5_combout ), + .datad(\Equal1~6_combout ), + .cin(gnd), + .combout(\cnt_wait[8]~0_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[8]~0 .lut_mask = 16'h3332; +defparam \cnt_wait[8]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N12 +cycloneive_lcell_comb \cnt_wait[15]~1 ( +// Equation(s): +// \cnt_wait[15]~1_combout = (\Equal1~4_combout ) # ((\Equal0~4_combout ) # ((\Equal1~5_combout ) # (\Equal1~6_combout ))) + + .dataa(\Equal1~4_combout ), + .datab(\Equal0~4_combout ), + .datac(\Equal1~5_combout ), + .datad(\Equal1~6_combout ), + .cin(gnd), + .combout(\cnt_wait[15]~1_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[15]~1 .lut_mask = 16'hFFFE; +defparam \cnt_wait[15]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N24 +cycloneive_lcell_comb \cnt_wait[15]~2 ( +// Equation(s): +// \cnt_wait[15]~2_combout = (\Add1~30_combout & (((\cnt_wait[8]~0_combout & cnt_wait[15])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~30_combout & (\cnt_wait[8]~0_combout & (cnt_wait[15]))) + + .dataa(\Add1~30_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[15]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[15]~2_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[15]~2 .lut_mask = 16'hC0EA; +defparam \cnt_wait[15]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N26 +cycloneive_lcell_comb \cnt_wait[14]~3 ( +// Equation(s): +// \cnt_wait[14]~3_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[14] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~28_combout ) # ((cnt_wait[14] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~28_combout ), + .datac(cnt_wait[14]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[14]~3_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[14]~3 .lut_mask = 16'hF444; +defparam \cnt_wait[14]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N20 +cycloneive_lcell_comb \cnt_wait[13]~4 ( +// Equation(s): +// \cnt_wait[13]~4_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[13] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~26_combout ) # ((cnt_wait[13] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~26_combout ), + .datac(cnt_wait[13]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[13]~4_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[13]~4 .lut_mask = 16'hF444; +defparam \cnt_wait[13]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N22 +cycloneive_lcell_comb \cnt_wait[12]~5 ( +// Equation(s): +// \cnt_wait[12]~5_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[12] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~24_combout ) # ((cnt_wait[12] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~24_combout ), + .datac(cnt_wait[12]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[12]~5_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[12]~5 .lut_mask = 16'hF444; +defparam \cnt_wait[12]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N22 +cycloneive_lcell_comb \cnt_wait[9]~6 ( +// Equation(s): +// \cnt_wait[9]~6_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[9] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~18_combout ) # ((cnt_wait[9] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~18_combout ), + .datac(cnt_wait[9]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[9]~6_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[9]~6 .lut_mask = 16'hF444; +defparam \cnt_wait[9]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N8 +cycloneive_lcell_comb \cnt_wait[11]~7 ( +// Equation(s): +// \cnt_wait[11]~7_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[11] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~22_combout ) # ((cnt_wait[11] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~22_combout ), + .datac(cnt_wait[11]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[11]~7_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[11]~7 .lut_mask = 16'hF444; +defparam \cnt_wait[11]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N10 +cycloneive_lcell_comb \cnt_wait[10]~8 ( +// Equation(s): +// \cnt_wait[10]~8_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[10] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~20_combout ) # ((cnt_wait[10] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~20_combout ), + .datac(cnt_wait[10]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[10]~8_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[10]~8 .lut_mask = 16'hF444; +defparam \cnt_wait[10]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N4 +cycloneive_lcell_comb \cnt_wait[8]~9 ( +// Equation(s): +// \cnt_wait[8]~9_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[8] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~16_combout ) # ((cnt_wait[8] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~16_combout ), + .datac(cnt_wait[8]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[8]~9_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[8]~9 .lut_mask = 16'hF444; +defparam \cnt_wait[8]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N2 +cycloneive_lcell_comb \cnt_wait[7]~10 ( +// Equation(s): +// \cnt_wait[7]~10_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[7] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~14_combout ) # ((cnt_wait[7] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~14_combout ), + .datac(cnt_wait[7]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[7]~10_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[7]~10 .lut_mask = 16'hF444; +defparam \cnt_wait[7]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N12 +cycloneive_lcell_comb \cnt_wait[6]~11 ( +// Equation(s): +// \cnt_wait[6]~11_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[6] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~12_combout ) # ((cnt_wait[6] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~12_combout ), + .datac(cnt_wait[6]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[6]~11_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[6]~11 .lut_mask = 16'hF444; +defparam \cnt_wait[6]~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N14 +cycloneive_lcell_comb \cnt_wait[5]~12 ( +// Equation(s): +// \cnt_wait[5]~12_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[5] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~10_combout ) # ((cnt_wait[5] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~10_combout ), + .datac(cnt_wait[5]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[5]~12_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[5]~12 .lut_mask = 16'hF444; +defparam \cnt_wait[5]~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N16 +cycloneive_lcell_comb \cnt_wait[4]~13 ( +// Equation(s): +// \cnt_wait[4]~13_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[4] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~8_combout ) # ((cnt_wait[4] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~8_combout ), + .datac(cnt_wait[4]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[4]~13_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[4]~13 .lut_mask = 16'hF444; +defparam \cnt_wait[4]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N4 +cycloneive_lcell_comb \cnt_wait[3]~14 ( +// Equation(s): +// \cnt_wait[3]~14_combout = (\Add1~6_combout & (((\cnt_wait[8]~0_combout & cnt_wait[3])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~6_combout & (\cnt_wait[8]~0_combout & (cnt_wait[3]))) + + .dataa(\Add1~6_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[3]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[3]~14_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[3]~14 .lut_mask = 16'hC0EA; +defparam \cnt_wait[3]~14 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N6 +cycloneive_lcell_comb \cnt_wait[2]~15 ( +// Equation(s): +// \cnt_wait[2]~15_combout = (\Add1~4_combout & (((\cnt_wait[8]~0_combout & cnt_wait[2])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~4_combout & (\cnt_wait[8]~0_combout & (cnt_wait[2]))) + + .dataa(\Add1~4_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[2]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[2]~15_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[2]~15 .lut_mask = 16'hC0EA; +defparam \cnt_wait[2]~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N0 +cycloneive_lcell_comb \cnt_wait[1]~16 ( +// Equation(s): +// \cnt_wait[1]~16_combout = (\Add1~2_combout & (((\cnt_wait[8]~0_combout & cnt_wait[1])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~2_combout & (\cnt_wait[8]~0_combout & (cnt_wait[1]))) + + .dataa(\Add1~2_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[1]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[1]~16_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[1]~16 .lut_mask = 16'hC0EA; +defparam \cnt_wait[1]~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N18 +cycloneive_lcell_comb \cnt_wait[0]~17 ( +// Equation(s): +// \cnt_wait[0]~17_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[0] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~0_combout ) # ((cnt_wait[0] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~0_combout ), + .datac(cnt_wait[0]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[0]~17_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[0]~17 .lut_mask = 16'hF444; +defparam \cnt_wait[0]~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h0084; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ) # +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout +// & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'hAAEA; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h4182; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'hB830; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N1 +dffeas \fifo_read_inst|rd_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|rd_flag~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|rd_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|rd_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|rd_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N30 +cycloneive_lcell_comb \fifo_read_inst|Equal4~2 ( +// Equation(s): +// \fifo_read_inst|Equal4~2_combout = (!\fifo_read_inst|baud_cnt [11] & (\fifo_read_inst|baud_cnt [10] & (!\fifo_read_inst|baud_cnt [9] & \fifo_read_inst|baud_cnt [6]))) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(\fifo_read_inst|baud_cnt [9]), + .datad(\fifo_read_inst|baud_cnt [6]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~2 .lut_mask = 16'h0400; +defparam \fifo_read_inst|Equal4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout & ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 .lut_mask = 16'h1030; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N23 +dffeas \uart_rx_inst|bit_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|bit_cnt~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal2~0 ( +// Equation(s): +// \fifo_read_inst|Equal2~0_combout = (\fifo_read_inst|cnt_read [3] & (\fifo_read_inst|cnt_read [1] & (!\fifo_read_inst|cnt_read [2] & !\fifo_read_inst|cnt_read [0]))) + + .dataa(\fifo_read_inst|cnt_read [3]), + .datab(\fifo_read_inst|cnt_read [1]), + .datac(\fifo_read_inst|cnt_read [2]), + .datad(\fifo_read_inst|cnt_read [0]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~0 .lut_mask = 16'h0008; +defparam \fifo_read_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N30 +cycloneive_lcell_comb \fifo_read_inst|Equal2~1 ( +// Equation(s): +// \fifo_read_inst|Equal2~1_combout = (!\fifo_read_inst|cnt_read [6] & (!\fifo_read_inst|cnt_read [7] & (!\fifo_read_inst|cnt_read [4] & !\fifo_read_inst|cnt_read [5]))) + + .dataa(\fifo_read_inst|cnt_read [6]), + .datab(\fifo_read_inst|cnt_read [7]), + .datac(\fifo_read_inst|cnt_read [4]), + .datad(\fifo_read_inst|cnt_read [5]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~1 .lut_mask = 16'h0001; +defparam \fifo_read_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N24 +cycloneive_lcell_comb \fifo_read_inst|Equal2~2 ( +// Equation(s): +// \fifo_read_inst|Equal2~2_combout = (\fifo_read_inst|Equal2~0_combout & (!\fifo_read_inst|cnt_read [9] & (\fifo_read_inst|Equal2~1_combout & !\fifo_read_inst|cnt_read [8]))) + + .dataa(\fifo_read_inst|Equal2~0_combout ), + .datab(\fifo_read_inst|cnt_read [9]), + .datac(\fifo_read_inst|Equal2~1_combout ), + .datad(\fifo_read_inst|cnt_read [8]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~2 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal2~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N0 +cycloneive_lcell_comb \fifo_read_inst|rd_flag~0 ( +// Equation(s): +// \fifo_read_inst|rd_flag~0_combout = (!\fifo_read_inst|Equal2~2_combout & ((\fifo_read_inst|rd_flag~q ) # ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] & +// \fifo_read_inst|Equal1~2_combout )))) + + .dataa(\fifo_read_inst|Equal2~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datac(\fifo_read_inst|rd_flag~q ), + .datad(\fifo_read_inst|Equal1~2_combout ), + .cin(gnd), + .combout(\fifo_read_inst|rd_flag~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|rd_flag~0 .lut_mask = 16'h5450; +defparam \fifo_read_inst|rd_flag~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N22 +cycloneive_lcell_comb \uart_rx_inst|bit_cnt~1 ( +// Equation(s): +// \uart_rx_inst|bit_cnt~1_combout = (\uart_rx_inst|Add1~0_combout & (((!\uart_rx_inst|always4~0_combout ) # (!\uart_rx_inst|bit_flag~q )) # (!\uart_rx_inst|bit_cnt [3]))) + + .dataa(\uart_rx_inst|bit_cnt [3]), + .datab(\uart_rx_inst|Add1~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(\uart_rx_inst|always4~0_combout ), + .cin(gnd), + .combout(\uart_rx_inst|bit_cnt~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt~1 .lut_mask = 16'h4CCC; +defparam \uart_rx_inst|bit_cnt~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N7 +dffeas \uart_rx_inst|work_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|work_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|work_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|work_en .is_wysiwyg = "true"; +defparam \uart_rx_inst|work_en .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y24_N7 +dffeas \uart_rx_inst|start_nedge ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|always3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|start_nedge~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|start_nedge .is_wysiwyg = "true"; +defparam \uart_rx_inst|start_nedge .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N6 +cycloneive_lcell_comb \uart_rx_inst|work_en~0 ( +// Equation(s): +// \uart_rx_inst|work_en~0_combout = (\uart_rx_inst|start_nedge~q ) # ((\uart_rx_inst|work_en~q & !\uart_rx_inst|always4~1_combout )) + + .dataa(gnd), + .datab(\uart_rx_inst|start_nedge~q ), + .datac(\uart_rx_inst|work_en~q ), + .datad(\uart_rx_inst|always4~1_combout ), + .cin(gnd), + .combout(\uart_rx_inst|work_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|work_en~0 .lut_mask = 16'hCCFC; +defparam \uart_rx_inst|work_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N6 +cycloneive_lcell_comb \uart_rx_inst|always3~0 ( +// Equation(s): +// \uart_rx_inst|always3~0_combout = (\uart_rx_inst|rx_reg2~q & !\uart_rx_inst|rx_reg3~q ) + + .dataa(gnd), + .datab(\uart_rx_inst|rx_reg2~q ), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg3~q ), + .cin(gnd), + .combout(\uart_rx_inst|always3~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always3~0 .lut_mask = 16'h00CC; +defparam \uart_rx_inst|always3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[0]~5 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[0]~5_combout = (!\uart_tx_inst|always0~1_combout & (\uart_tx_inst|bit_cnt [0] $ (((\uart_tx_inst|bit_flag~q & \uart_tx_inst|work_en~q ))))) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(\uart_tx_inst|always0~1_combout ), + .datac(\uart_tx_inst|bit_cnt [0]), + .datad(\uart_tx_inst|work_en~q ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[0]~5 .lut_mask = 16'h1230; +defparam \uart_tx_inst|bit_cnt[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y9_N16 +cycloneive_io_obuf \tx~output ( + .i(!\uart_tx_inst|tx~q ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(tx), + .obar()); +// synopsys translate_off +defparam \tx~output .bus_hold = "false"; +defparam \tx~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X1_Y29_N30 +cycloneive_io_obuf \sdram_clk~output ( + .i(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_clk), + .obar()); +// synopsys translate_off +defparam \sdram_clk~output .bus_hold = "false"; +defparam \sdram_clk~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y13_N23 +cycloneive_io_obuf \sdram_cke~output ( + .i(vcc), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cke), + .obar()); +// synopsys translate_off +defparam \sdram_cke~output .bus_hold = "false"; +defparam \sdram_cke~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N9 +cycloneive_io_obuf \sdram_cs_n~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cs_n), + .obar()); +// synopsys translate_off +defparam \sdram_cs_n~output .bus_hold = "false"; +defparam \sdram_cs_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X7_Y29_N16 +cycloneive_io_obuf \sdram_cas_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cas_n), + .obar()); +// synopsys translate_off +defparam \sdram_cas_n~output .bus_hold = "false"; +defparam \sdram_cas_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N16 +cycloneive_io_obuf \sdram_ras_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ras_n), + .obar()); +// synopsys translate_off +defparam \sdram_ras_n~output .bus_hold = "false"; +defparam \sdram_ras_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X7_Y29_N9 +cycloneive_io_obuf \sdram_we_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_we_n), + .obar()); +// synopsys translate_off +defparam \sdram_we_n~output .bus_hold = "false"; +defparam \sdram_we_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N16 +cycloneive_io_obuf \sdram_ba[0]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ba[0]), + .obar()); +// synopsys translate_off +defparam \sdram_ba[0]~output .bus_hold = "false"; +defparam \sdram_ba[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X1_Y29_N2 +cycloneive_io_obuf \sdram_ba[1]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ba[1]), + .obar()); +// synopsys translate_off +defparam \sdram_ba[1]~output .bus_hold = "false"; +defparam \sdram_ba[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N9 +cycloneive_io_obuf \sdram_addr[0]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[0]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[0]~output .bus_hold = "false"; +defparam \sdram_addr[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y27_N16 +cycloneive_io_obuf \sdram_addr[1]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[1]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[1]~output .bus_hold = "false"; +defparam \sdram_addr[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y27_N9 +cycloneive_io_obuf \sdram_addr[2]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[2]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[2]~output .bus_hold = "false"; +defparam \sdram_addr[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N23 +cycloneive_io_obuf \sdram_addr[3]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[3]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[3]~output .bus_hold = "false"; +defparam \sdram_addr[3]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N16 +cycloneive_io_obuf \sdram_addr[4]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[4]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[4]~output .bus_hold = "false"; +defparam \sdram_addr[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y24_N16 +cycloneive_io_obuf \sdram_addr[5]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[5]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[5]~output .bus_hold = "false"; +defparam \sdram_addr[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y23_N2 +cycloneive_io_obuf \sdram_addr[6]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[6]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[6]~output .bus_hold = "false"; +defparam \sdram_addr[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y24_N23 +cycloneive_io_obuf \sdram_addr[7]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[7]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[7]~output .bus_hold = "false"; +defparam \sdram_addr[7]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N16 +cycloneive_io_obuf \sdram_addr[8]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[8]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[8]~output .bus_hold = "false"; +defparam \sdram_addr[8]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y12_N16 +cycloneive_io_obuf \sdram_addr[9]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[9]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[9]~output .bus_hold = "false"; +defparam \sdram_addr[9]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N2 +cycloneive_io_obuf \sdram_addr[10]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[10]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[10]~output .bus_hold = "false"; +defparam \sdram_addr[10]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y12_N23 +cycloneive_io_obuf \sdram_addr[11]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[11]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[11]~output .bus_hold = "false"; +defparam \sdram_addr[11]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y13_N16 +cycloneive_io_obuf \sdram_addr[12]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[12]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[12]~output .bus_hold = "false"; +defparam \sdram_addr[12]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N2 +cycloneive_io_obuf \sdram_dqm[0]~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dqm[0]), + .obar()); +// synopsys translate_off +defparam \sdram_dqm[0]~output .bus_hold = "false"; +defparam \sdram_dqm[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y20_N2 +cycloneive_io_obuf \sdram_dqm[1]~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dqm[1]), + .obar()); +// synopsys translate_off +defparam \sdram_dqm[1]~output .bus_hold = "false"; +defparam \sdram_dqm[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N9 +cycloneive_io_obuf \sdram_dq[0]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[0]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[0]~output .bus_hold = "false"; +defparam \sdram_dq[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N2 +cycloneive_io_obuf \sdram_dq[1]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[1]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[1]~output .bus_hold = "false"; +defparam \sdram_dq[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X9_Y29_N2 +cycloneive_io_obuf \sdram_dq[2]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[2]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[2]~output .bus_hold = "false"; +defparam \sdram_dq[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X14_Y29_N30 +cycloneive_io_obuf \sdram_dq[3]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[3]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[3]~output .bus_hold = "false"; +defparam \sdram_dq[3]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X14_Y29_N23 +cycloneive_io_obuf \sdram_dq[4]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[4]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[4]~output .bus_hold = "false"; +defparam \sdram_dq[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X9_Y29_N9 +cycloneive_io_obuf \sdram_dq[5]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[5]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[5]~output .bus_hold = "false"; +defparam \sdram_dq[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N16 +cycloneive_io_obuf \sdram_dq[6]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[6]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[6]~output .bus_hold = "false"; +defparam \sdram_dq[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N23 +cycloneive_io_obuf \sdram_dq[7]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[7]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[7]~output .bus_hold = "false"; +defparam \sdram_dq[7]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y20_N9 +cycloneive_io_obuf \sdram_dq[8]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [8]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[8]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[8]~output .bus_hold = "false"; +defparam \sdram_dq[8]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N30 +cycloneive_io_obuf \sdram_dq[9]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [9]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[9]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[9]~output .bus_hold = "false"; +defparam \sdram_dq[9]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y25_N2 +cycloneive_io_obuf \sdram_dq[10]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [10]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[10]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[10]~output .bus_hold = "false"; +defparam \sdram_dq[10]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N9 +cycloneive_io_obuf \sdram_dq[11]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [11]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[11]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[11]~output .bus_hold = "false"; +defparam \sdram_dq[11]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y23_N9 +cycloneive_io_obuf \sdram_dq[12]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [12]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[12]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[12]~output .bus_hold = "false"; +defparam \sdram_dq[12]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N9 +cycloneive_io_obuf \sdram_dq[13]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [13]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[13]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[13]~output .bus_hold = "false"; +defparam \sdram_dq[13]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N23 +cycloneive_io_obuf \sdram_dq[14]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [14]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[14]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[14]~output .bus_hold = "false"; +defparam \sdram_dq[14]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N2 +cycloneive_io_obuf \sdram_dq[15]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [15]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[15]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[15]~output .bus_hold = "false"; +defparam \sdram_dq[15]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N2 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[0]~13 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[0]~13_combout = (\uart_rx_inst|work_en~q & (\uart_rx_inst|baud_cnt [0] $ (VCC))) # (!\uart_rx_inst|work_en~q & (\uart_rx_inst|baud_cnt [0] & VCC)) +// \uart_rx_inst|baud_cnt[0]~14 = CARRY((\uart_rx_inst|work_en~q & \uart_rx_inst|baud_cnt [0])) + + .dataa(\uart_rx_inst|work_en~q ), + .datab(\uart_rx_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_rx_inst|baud_cnt[0]~13_combout ), + .cout(\uart_rx_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \uart_rx_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X41_Y15_N22 +cycloneive_io_ibuf \sys_clk~input ( + .i(sys_clk), + .ibar(gnd), + .o(\sys_clk~input_o )); +// synopsys translate_off +defparam \sys_clk~input .bus_hold = "false"; +defparam \sys_clk~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: PLL_2 +cycloneive_pll \clk_gen_inst|altpll_component|auto_generated|pll1 ( + .areset(!\sys_rst_n~input_o ), + .pfdena(vcc), + .fbin(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ), + .phaseupdown(gnd), + .phasestep(gnd), + .scandata(gnd), + .scanclk(gnd), + .scanclkena(vcc), + .configupdate(gnd), + .clkswitch(gnd), + .inclk({gnd,\sys_clk~input_o }), + .phasecounterselect(3'b000), + .phasedone(), + .scandataout(), + .scandone(), + .activeclock(), + .locked(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .vcooverrange(), + .vcounderrange(), + .fbout(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ), + .clk(\clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus ), + .clkbad()); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .auto_settings = "false"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .bandwidth_type = "medium"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_high = 6; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_low = 6; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_high = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_low = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_high = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_low = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_high = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_initial = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_low = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_mode = "bypass"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_high = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_initial = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_low = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_mode = "bypass"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .charge_pump_current_bits = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_counter = "c0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_multiply_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_counter = "c1"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_multiply_by = 2; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_counter = "c2"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_multiply_by = 2; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_phase_shift = "-833"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_counter = "unused"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_counter = "unused"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .compensate_clock = "clock0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .inclk0_input_frequency = 20000; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .inclk1_input_frequency = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .loop_filter_c_bits = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .loop_filter_r_bits = 27; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m = 12; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .n = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .operation_mode = "normal"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pfd_max = 200000; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pfd_min = 3076; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pll_compensation_delay = 6891; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .self_reset_on_loss_lock = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .simulation_type = "timing"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .switch_over_type = "auto"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_center = 1538; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_frequency_control = "auto"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_max = 3333; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_min = 1538; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_phase_shift_step = 208; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_post_scale = 2; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N24 +cycloneive_lcell_comb \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder ( +// Equation(s): +// \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout = VCC + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder .lut_mask = 16'hFFFF; +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X41_Y4_N1 +cycloneive_io_ibuf \sys_rst_n~input ( + .i(sys_rst_n), + .ibar(gnd), + .o(\sys_rst_n~input_o )); +// synopsys translate_off +defparam \sys_rst_n~input .bus_hold = "false"; +defparam \sys_rst_n~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X27_Y26_N25 +dffeas \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .d(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ), + .prn(vcc)); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync .is_wysiwyg = "true"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N26 +cycloneive_lcell_comb \rst_n~0 ( +// Equation(s): +// \rst_n~0_combout = ((!\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ) # (!\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked )) # (!\sys_rst_n~input_o ) + + .dataa(\sys_rst_n~input_o ), + .datab(gnd), + .datac(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .datad(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ), + .cin(gnd), + .combout(\rst_n~0_combout ), + .cout()); +// synopsys translate_off +defparam \rst_n~0 .lut_mask = 16'h5FFF; +defparam \rst_n~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: CLKCTRL_G17 +cycloneive_clkctrl \rst_n~0clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\rst_n~0_combout }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\rst_n~0clkctrl_outclk )); +// synopsys translate_off +defparam \rst_n~0clkctrl .clock_type = "global clock"; +defparam \rst_n~0clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N6 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[2]~17 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[2]~17_combout = (\uart_rx_inst|baud_cnt [2] & (\uart_rx_inst|baud_cnt[1]~16 $ (GND))) # (!\uart_rx_inst|baud_cnt [2] & (!\uart_rx_inst|baud_cnt[1]~16 & VCC)) +// \uart_rx_inst|baud_cnt[2]~18 = CARRY((\uart_rx_inst|baud_cnt [2] & !\uart_rx_inst|baud_cnt[1]~16 )) + + .dataa(\uart_rx_inst|baud_cnt [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[1]~16 ), + .combout(\uart_rx_inst|baud_cnt[2]~17_combout ), + .cout(\uart_rx_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[2]~17 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N8 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[3]~19 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[3]~19_combout = (\uart_rx_inst|baud_cnt [3] & (!\uart_rx_inst|baud_cnt[2]~18 )) # (!\uart_rx_inst|baud_cnt [3] & ((\uart_rx_inst|baud_cnt[2]~18 ) # (GND))) +// \uart_rx_inst|baud_cnt[3]~20 = CARRY((!\uart_rx_inst|baud_cnt[2]~18 ) # (!\uart_rx_inst|baud_cnt [3])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [3]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[2]~18 ), + .combout(\uart_rx_inst|baud_cnt[3]~19_combout ), + .cout(\uart_rx_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[3]~19 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N9 +dffeas \uart_rx_inst|baud_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N12 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[5]~23 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[5]~23_combout = (\uart_rx_inst|baud_cnt [5] & (!\uart_rx_inst|baud_cnt[4]~22 )) # (!\uart_rx_inst|baud_cnt [5] & ((\uart_rx_inst|baud_cnt[4]~22 ) # (GND))) +// \uart_rx_inst|baud_cnt[5]~24 = CARRY((!\uart_rx_inst|baud_cnt[4]~22 ) # (!\uart_rx_inst|baud_cnt [5])) + + .dataa(\uart_rx_inst|baud_cnt [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[4]~22 ), + .combout(\uart_rx_inst|baud_cnt[5]~23_combout ), + .cout(\uart_rx_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[5]~23 .lut_mask = 16'h5A5F; +defparam \uart_rx_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N13 +dffeas \uart_rx_inst|baud_cnt[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N30 +cycloneive_lcell_comb \uart_rx_inst|Equal1~1 ( +// Equation(s): +// \uart_rx_inst|Equal1~1_combout = (\uart_rx_inst|baud_cnt [4] & (\uart_rx_inst|baud_cnt [2] & (!\uart_rx_inst|baud_cnt [3] & !\uart_rx_inst|baud_cnt [5]))) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(\uart_rx_inst|baud_cnt [2]), + .datac(\uart_rx_inst|baud_cnt [3]), + .datad(\uart_rx_inst|baud_cnt [5]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~1 .lut_mask = 16'h0008; +defparam \uart_rx_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N14 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[6]~25 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[6]~25_combout = (\uart_rx_inst|baud_cnt [6] & (\uart_rx_inst|baud_cnt[5]~24 $ (GND))) # (!\uart_rx_inst|baud_cnt [6] & (!\uart_rx_inst|baud_cnt[5]~24 & VCC)) +// \uart_rx_inst|baud_cnt[6]~26 = CARRY((\uart_rx_inst|baud_cnt [6] & !\uart_rx_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[5]~24 ), + .combout(\uart_rx_inst|baud_cnt[6]~25_combout ), + .cout(\uart_rx_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N15 +dffeas \uart_rx_inst|baud_cnt[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N16 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[7]~27 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[7]~27_combout = (\uart_rx_inst|baud_cnt [7] & (!\uart_rx_inst|baud_cnt[6]~26 )) # (!\uart_rx_inst|baud_cnt [7] & ((\uart_rx_inst|baud_cnt[6]~26 ) # (GND))) +// \uart_rx_inst|baud_cnt[7]~28 = CARRY((!\uart_rx_inst|baud_cnt[6]~26 ) # (!\uart_rx_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[6]~26 ), + .combout(\uart_rx_inst|baud_cnt[7]~27_combout ), + .cout(\uart_rx_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N17 +dffeas \uart_rx_inst|baud_cnt[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N18 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[8]~29 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[8]~29_combout = (\uart_rx_inst|baud_cnt [8] & (\uart_rx_inst|baud_cnt[7]~28 $ (GND))) # (!\uart_rx_inst|baud_cnt [8] & (!\uart_rx_inst|baud_cnt[7]~28 & VCC)) +// \uart_rx_inst|baud_cnt[8]~30 = CARRY((\uart_rx_inst|baud_cnt [8] & !\uart_rx_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[7]~28 ), + .combout(\uart_rx_inst|baud_cnt[8]~29_combout ), + .cout(\uart_rx_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N19 +dffeas \uart_rx_inst|baud_cnt[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N0 +cycloneive_lcell_comb \uart_rx_inst|Equal1~0 ( +// Equation(s): +// \uart_rx_inst|Equal1~0_combout = (\uart_rx_inst|baud_cnt [0] & (!\uart_rx_inst|baud_cnt [8] & (\uart_rx_inst|baud_cnt [1] & !\uart_rx_inst|baud_cnt [7]))) + + .dataa(\uart_rx_inst|baud_cnt [0]), + .datab(\uart_rx_inst|baud_cnt [8]), + .datac(\uart_rx_inst|baud_cnt [1]), + .datad(\uart_rx_inst|baud_cnt [7]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~0 .lut_mask = 16'h0020; +defparam \uart_rx_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N20 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[9]~31 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[9]~31_combout = (\uart_rx_inst|baud_cnt [9] & (!\uart_rx_inst|baud_cnt[8]~30 )) # (!\uart_rx_inst|baud_cnt [9] & ((\uart_rx_inst|baud_cnt[8]~30 ) # (GND))) +// \uart_rx_inst|baud_cnt[9]~32 = CARRY((!\uart_rx_inst|baud_cnt[8]~30 ) # (!\uart_rx_inst|baud_cnt [9])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [9]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[8]~30 ), + .combout(\uart_rx_inst|baud_cnt[9]~31_combout ), + .cout(\uart_rx_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[9]~31 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N21 +dffeas \uart_rx_inst|baud_cnt[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N22 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[10]~33 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[10]~33_combout = (\uart_rx_inst|baud_cnt [10] & (\uart_rx_inst|baud_cnt[9]~32 $ (GND))) # (!\uart_rx_inst|baud_cnt [10] & (!\uart_rx_inst|baud_cnt[9]~32 & VCC)) +// \uart_rx_inst|baud_cnt[10]~34 = CARRY((\uart_rx_inst|baud_cnt [10] & !\uart_rx_inst|baud_cnt[9]~32 )) + + .dataa(\uart_rx_inst|baud_cnt [10]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[9]~32 ), + .combout(\uart_rx_inst|baud_cnt[10]~33_combout ), + .cout(\uart_rx_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[10]~33 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N24 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[11]~35 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[11]~35_combout = (\uart_rx_inst|baud_cnt [11] & (!\uart_rx_inst|baud_cnt[10]~34 )) # (!\uart_rx_inst|baud_cnt [11] & ((\uart_rx_inst|baud_cnt[10]~34 ) # (GND))) +// \uart_rx_inst|baud_cnt[11]~36 = CARRY((!\uart_rx_inst|baud_cnt[10]~34 ) # (!\uart_rx_inst|baud_cnt [11])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[10]~34 ), + .combout(\uart_rx_inst|baud_cnt[11]~35_combout ), + .cout(\uart_rx_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[11]~35 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N25 +dffeas \uart_rx_inst|baud_cnt[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N8 +cycloneive_lcell_comb \uart_rx_inst|Equal1~2 ( +// Equation(s): +// \uart_rx_inst|Equal1~2_combout = (!\uart_rx_inst|baud_cnt [9] & \uart_rx_inst|baud_cnt [6]) + + .dataa(gnd), + .datab(gnd), + .datac(\uart_rx_inst|baud_cnt [9]), + .datad(\uart_rx_inst|baud_cnt [6]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~2 .lut_mask = 16'h0F00; +defparam \uart_rx_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y25_N23 +dffeas \uart_rx_inst|baud_cnt[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N2 +cycloneive_lcell_comb \uart_rx_inst|Equal1~3 ( +// Equation(s): +// \uart_rx_inst|Equal1~3_combout = (\uart_rx_inst|baud_cnt [12] & (!\uart_rx_inst|baud_cnt [11] & (\uart_rx_inst|Equal1~2_combout & \uart_rx_inst|baud_cnt [10]))) + + .dataa(\uart_rx_inst|baud_cnt [12]), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(\uart_rx_inst|Equal1~2_combout ), + .datad(\uart_rx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~3 .lut_mask = 16'h2000; +defparam \uart_rx_inst|Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N12 +cycloneive_lcell_comb \uart_rx_inst|always5~0 ( +// Equation(s): +// \uart_rx_inst|always5~0_combout = ((\uart_rx_inst|Equal1~1_combout & (\uart_rx_inst|Equal1~0_combout & \uart_rx_inst|Equal1~3_combout ))) # (!\uart_rx_inst|work_en~q ) + + .dataa(\uart_rx_inst|work_en~q ), + .datab(\uart_rx_inst|Equal1~1_combout ), + .datac(\uart_rx_inst|Equal1~0_combout ), + .datad(\uart_rx_inst|Equal1~3_combout ), + .cin(gnd), + .combout(\uart_rx_inst|always5~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always5~0 .lut_mask = 16'hD555; +defparam \uart_rx_inst|always5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y25_N3 +dffeas \uart_rx_inst|baud_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N4 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[1]~15 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[1]~15_combout = (\uart_rx_inst|baud_cnt [1] & (!\uart_rx_inst|baud_cnt[0]~14 )) # (!\uart_rx_inst|baud_cnt [1] & ((\uart_rx_inst|baud_cnt[0]~14 ) # (GND))) +// \uart_rx_inst|baud_cnt[1]~16 = CARRY((!\uart_rx_inst|baud_cnt[0]~14 ) # (!\uart_rx_inst|baud_cnt [1])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [1]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[0]~14 ), + .combout(\uart_rx_inst|baud_cnt[1]~15_combout ), + .cout(\uart_rx_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[1]~15 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N5 +dffeas \uart_rx_inst|baud_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y25_N7 +dffeas \uart_rx_inst|baud_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N28 +cycloneive_lcell_comb \uart_rx_inst|Equal2~0 ( +// Equation(s): +// \uart_rx_inst|Equal2~0_combout = (!\uart_rx_inst|baud_cnt [4] & (!\uart_rx_inst|baud_cnt [2] & (\uart_rx_inst|baud_cnt [3] & \uart_rx_inst|baud_cnt [5]))) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(\uart_rx_inst|baud_cnt [2]), + .datac(\uart_rx_inst|baud_cnt [3]), + .datad(\uart_rx_inst|baud_cnt [5]), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~0 .lut_mask = 16'h1000; +defparam \uart_rx_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N26 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[12]~37 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[12]~37_combout = \uart_rx_inst|baud_cnt [12] $ (!\uart_rx_inst|baud_cnt[11]~36 ) + + .dataa(\uart_rx_inst|baud_cnt [12]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\uart_rx_inst|baud_cnt[11]~36 ), + .combout(\uart_rx_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[12]~37 .lut_mask = 16'hA5A5; +defparam \uart_rx_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N27 +dffeas \uart_rx_inst|baud_cnt[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N20 +cycloneive_lcell_comb \uart_rx_inst|Equal2~1 ( +// Equation(s): +// \uart_rx_inst|Equal2~1_combout = (!\uart_rx_inst|baud_cnt [6] & (\uart_rx_inst|baud_cnt [11] & (\uart_rx_inst|baud_cnt [9] & !\uart_rx_inst|baud_cnt [10]))) + + .dataa(\uart_rx_inst|baud_cnt [6]), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(\uart_rx_inst|baud_cnt [9]), + .datad(\uart_rx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~1 .lut_mask = 16'h0040; +defparam \uart_rx_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N4 +cycloneive_lcell_comb \uart_rx_inst|Equal2~2 ( +// Equation(s): +// \uart_rx_inst|Equal2~2_combout = (\uart_rx_inst|Equal1~0_combout & (\uart_rx_inst|Equal2~0_combout & (!\uart_rx_inst|baud_cnt [12] & \uart_rx_inst|Equal2~1_combout ))) + + .dataa(\uart_rx_inst|Equal1~0_combout ), + .datab(\uart_rx_inst|Equal2~0_combout ), + .datac(\uart_rx_inst|baud_cnt [12]), + .datad(\uart_rx_inst|Equal2~1_combout ), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~2 .lut_mask = 16'h0800; +defparam \uart_rx_inst|Equal2~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N5 +dffeas \uart_rx_inst|bit_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Equal2~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N26 +cycloneive_lcell_comb \uart_rx_inst|Add1~2 ( +// Equation(s): +// \uart_rx_inst|Add1~2_combout = (\uart_rx_inst|bit_cnt [1] & (!\uart_rx_inst|Add1~1 )) # (!\uart_rx_inst|bit_cnt [1] & ((\uart_rx_inst|Add1~1 ) # (GND))) +// \uart_rx_inst|Add1~3 = CARRY((!\uart_rx_inst|Add1~1 ) # (!\uart_rx_inst|bit_cnt [1])) + + .dataa(\uart_rx_inst|bit_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|Add1~1 ), + .combout(\uart_rx_inst|Add1~2_combout ), + .cout(\uart_rx_inst|Add1~3 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~2 .lut_mask = 16'h5A5F; +defparam \uart_rx_inst|Add1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X16_Y25_N29 +dffeas \uart_rx_inst|bit_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Add1~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y25_N27 +dffeas \uart_rx_inst|bit_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Add1~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N0 +cycloneive_lcell_comb \uart_rx_inst|always4~0 ( +// Equation(s): +// \uart_rx_inst|always4~0_combout = (!\uart_rx_inst|bit_cnt [0] & (!\uart_rx_inst|bit_cnt [2] & !\uart_rx_inst|bit_cnt [1])) + + .dataa(\uart_rx_inst|bit_cnt [0]), + .datab(\uart_rx_inst|bit_cnt [2]), + .datac(\uart_rx_inst|bit_cnt [1]), + .datad(gnd), + .cin(gnd), + .combout(\uart_rx_inst|always4~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always4~0 .lut_mask = 16'h0101; +defparam \uart_rx_inst|always4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N16 +cycloneive_lcell_comb \uart_rx_inst|always4~1 ( +// Equation(s): +// \uart_rx_inst|always4~1_combout = (\uart_rx_inst|bit_cnt [3] & (\uart_rx_inst|always4~0_combout & \uart_rx_inst|bit_flag~q )) + + .dataa(\uart_rx_inst|bit_cnt [3]), + .datab(\uart_rx_inst|always4~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_rx_inst|always4~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always4~1 .lut_mask = 16'h8080; +defparam \uart_rx_inst|always4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N17 +dffeas \uart_rx_inst|rx_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|always4~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_flag .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N1 +dffeas \uart_rx_inst|po_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_flag~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .lut_mask = 16'hF0B4; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .lut_mask = 16'h0800; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .lut_mask = 16'h0100; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .lut_mask = 16'hC3F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 .lut_mask = 16'h0100; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 .lut_mask = 16'h1000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .lut_mask = 16'hE1F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'h2000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 .lut_mask = 16'h000F; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'h0F33; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q )))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .lut_mask = 16'hEEE0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X16_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 .lut_mask = 16'h00BB; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X17_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ) # +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 .lut_mask = 16'hFFFE; +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 .lut_mask = 16'hFFC8; +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9]), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & ((\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 .lut_mask = 16'hAAA8; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .lut_mask = 16'hF0B4; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .lut_mask = 16'hD2F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .lut_mask = 16'hD2D2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .lut_mask = 16'h0020; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .lut_mask = 16'hD2F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 .lut_mask = 16'h0500; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] $ (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 .lut_mask = 16'h000F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 .lut_mask = 16'h2000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 .lut_mask = 16'hCCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [5] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 .lut_mask = 16'hFF30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 .lut_mask = 16'h00F8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 .lut_mask = 16'h0088; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 .lut_mask = 16'hCCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 .lut_mask = 16'hEEFF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [0] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 .lut_mask = 16'h00FE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 .lut_mask = 16'hFFEC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y23_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [1]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 .lut_mask = 16'h5776; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .lut_mask = 16'hF0D2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .lut_mask = 16'h78F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .lut_mask = 16'h0100; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .lut_mask = 16'hA5F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2] $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .lut_mask = 16'h0008; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .lut_mask = 16'hFCFF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 .lut_mask = 16'hF05A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'hAC0C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout )))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'h59FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h0021; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout & +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout +// )) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'h1333; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y24_N25 +dffeas \fifo_read_inst|read_en_dly ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\fifo_read_inst|read_en~q ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_en_dly~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_en_dly .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_en_dly .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q & \fifo_read_inst|read_en_dly~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datab(gnd), + .datac(\fifo_read_inst|read_en_dly~q ), + .datad(gnd), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq .lut_mask = 16'h5050; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] $ (((VCC) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] $ +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 .lut_mask = 16'h5599; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y24_N7 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N8 +cycloneive_lcell_comb \fifo_read_inst|Add2~0 ( +// Equation(s): +// \fifo_read_inst|Add2~0_combout = (\fifo_read_inst|bit_flag~q & (\fifo_read_inst|bit_cnt [0] $ (VCC))) # (!\fifo_read_inst|bit_flag~q & (\fifo_read_inst|bit_cnt [0] & VCC)) +// \fifo_read_inst|Add2~1 = CARRY((\fifo_read_inst|bit_flag~q & \fifo_read_inst|bit_cnt [0])) + + .dataa(\fifo_read_inst|bit_flag~q ), + .datab(\fifo_read_inst|bit_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|Add2~0_combout ), + .cout(\fifo_read_inst|Add2~1 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~0 .lut_mask = 16'h6688; +defparam \fifo_read_inst|Add2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N9 +dffeas \fifo_read_inst|bit_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Add2~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N10 +cycloneive_lcell_comb \fifo_read_inst|Add2~2 ( +// Equation(s): +// \fifo_read_inst|Add2~2_combout = (\fifo_read_inst|bit_cnt [1] & (!\fifo_read_inst|Add2~1 )) # (!\fifo_read_inst|bit_cnt [1] & ((\fifo_read_inst|Add2~1 ) # (GND))) +// \fifo_read_inst|Add2~3 = CARRY((!\fifo_read_inst|Add2~1 ) # (!\fifo_read_inst|bit_cnt [1])) + + .dataa(\fifo_read_inst|bit_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|Add2~1 ), + .combout(\fifo_read_inst|Add2~2_combout ), + .cout(\fifo_read_inst|Add2~3 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~2 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|Add2~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N14 +cycloneive_lcell_comb \fifo_read_inst|Add2~6 ( +// Equation(s): +// \fifo_read_inst|Add2~6_combout = \fifo_read_inst|bit_cnt [3] $ (\fifo_read_inst|Add2~5 ) + + .dataa(gnd), + .datab(\fifo_read_inst|bit_cnt [3]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|Add2~5 ), + .combout(\fifo_read_inst|Add2~6_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Add2~6 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|Add2~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N4 +cycloneive_lcell_comb \fifo_read_inst|bit_cnt~0 ( +// Equation(s): +// \fifo_read_inst|bit_cnt~0_combout = (\fifo_read_inst|Add2~6_combout & ((!\fifo_read_inst|always5~0_combout ) # (!\fifo_read_inst|bit_cnt [0]))) + + .dataa(gnd), + .datab(\fifo_read_inst|bit_cnt [0]), + .datac(\fifo_read_inst|Add2~6_combout ), + .datad(\fifo_read_inst|always5~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|bit_cnt~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt~0 .lut_mask = 16'h30F0; +defparam \fifo_read_inst|bit_cnt~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N5 +dffeas \fifo_read_inst|bit_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|bit_cnt~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N4 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[0]~13 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[0]~13_combout = (\fifo_read_inst|rd_flag~q & (\fifo_read_inst|baud_cnt [0] $ (VCC))) # (!\fifo_read_inst|rd_flag~q & (\fifo_read_inst|baud_cnt [0] & VCC)) +// \fifo_read_inst|baud_cnt[0]~14 = CARRY((\fifo_read_inst|rd_flag~q & \fifo_read_inst|baud_cnt [0])) + + .dataa(\fifo_read_inst|rd_flag~q ), + .datab(\fifo_read_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|baud_cnt[0]~13_combout ), + .cout(\fifo_read_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \fifo_read_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N14 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[5]~23 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[5]~23_combout = (\fifo_read_inst|baud_cnt [5] & (!\fifo_read_inst|baud_cnt[4]~22 )) # (!\fifo_read_inst|baud_cnt [5] & ((\fifo_read_inst|baud_cnt[4]~22 ) # (GND))) +// \fifo_read_inst|baud_cnt[5]~24 = CARRY((!\fifo_read_inst|baud_cnt[4]~22 ) # (!\fifo_read_inst|baud_cnt [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[4]~22 ), + .combout(\fifo_read_inst|baud_cnt[5]~23_combout ), + .cout(\fifo_read_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[5]~23 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N16 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[6]~25 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[6]~25_combout = (\fifo_read_inst|baud_cnt [6] & (\fifo_read_inst|baud_cnt[5]~24 $ (GND))) # (!\fifo_read_inst|baud_cnt [6] & (!\fifo_read_inst|baud_cnt[5]~24 & VCC)) +// \fifo_read_inst|baud_cnt[6]~26 = CARRY((\fifo_read_inst|baud_cnt [6] & !\fifo_read_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[5]~24 ), + .combout(\fifo_read_inst|baud_cnt[6]~25_combout ), + .cout(\fifo_read_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N17 +dffeas \fifo_read_inst|baud_cnt[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N18 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[7]~27 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[7]~27_combout = (\fifo_read_inst|baud_cnt [7] & (!\fifo_read_inst|baud_cnt[6]~26 )) # (!\fifo_read_inst|baud_cnt [7] & ((\fifo_read_inst|baud_cnt[6]~26 ) # (GND))) +// \fifo_read_inst|baud_cnt[7]~28 = CARRY((!\fifo_read_inst|baud_cnt[6]~26 ) # (!\fifo_read_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[6]~26 ), + .combout(\fifo_read_inst|baud_cnt[7]~27_combout ), + .cout(\fifo_read_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N19 +dffeas \fifo_read_inst|baud_cnt[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N20 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[8]~29 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[8]~29_combout = (\fifo_read_inst|baud_cnt [8] & (\fifo_read_inst|baud_cnt[7]~28 $ (GND))) # (!\fifo_read_inst|baud_cnt [8] & (!\fifo_read_inst|baud_cnt[7]~28 & VCC)) +// \fifo_read_inst|baud_cnt[8]~30 = CARRY((\fifo_read_inst|baud_cnt [8] & !\fifo_read_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[7]~28 ), + .combout(\fifo_read_inst|baud_cnt[8]~29_combout ), + .cout(\fifo_read_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N21 +dffeas \fifo_read_inst|baud_cnt[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N0 +cycloneive_lcell_comb \fifo_read_inst|Equal4~0 ( +// Equation(s): +// \fifo_read_inst|Equal4~0_combout = (\fifo_read_inst|baud_cnt [1] & (!\fifo_read_inst|baud_cnt [8] & (\fifo_read_inst|baud_cnt [0] & !\fifo_read_inst|baud_cnt [7]))) + + .dataa(\fifo_read_inst|baud_cnt [1]), + .datab(\fifo_read_inst|baud_cnt [8]), + .datac(\fifo_read_inst|baud_cnt [0]), + .datad(\fifo_read_inst|baud_cnt [7]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~0 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N10 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[3]~19 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[3]~19_combout = (\fifo_read_inst|baud_cnt [3] & (!\fifo_read_inst|baud_cnt[2]~18 )) # (!\fifo_read_inst|baud_cnt [3] & ((\fifo_read_inst|baud_cnt[2]~18 ) # (GND))) +// \fifo_read_inst|baud_cnt[3]~20 = CARRY((!\fifo_read_inst|baud_cnt[2]~18 ) # (!\fifo_read_inst|baud_cnt [3])) + + .dataa(\fifo_read_inst|baud_cnt [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[2]~18 ), + .combout(\fifo_read_inst|baud_cnt[3]~19_combout ), + .cout(\fifo_read_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[3]~19 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N11 +dffeas \fifo_read_inst|baud_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N22 +cycloneive_lcell_comb \fifo_read_inst|Equal4~1 ( +// Equation(s): +// \fifo_read_inst|Equal4~1_combout = (\fifo_read_inst|baud_cnt [4] & (!\fifo_read_inst|baud_cnt [5] & (!\fifo_read_inst|baud_cnt [3] & \fifo_read_inst|baud_cnt [2]))) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(\fifo_read_inst|baud_cnt [3]), + .datad(\fifo_read_inst|baud_cnt [2]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~1 .lut_mask = 16'h0200; +defparam \fifo_read_inst|Equal4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N24 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[10]~33 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[10]~33_combout = (\fifo_read_inst|baud_cnt [10] & (\fifo_read_inst|baud_cnt[9]~32 $ (GND))) # (!\fifo_read_inst|baud_cnt [10] & (!\fifo_read_inst|baud_cnt[9]~32 & VCC)) +// \fifo_read_inst|baud_cnt[10]~34 = CARRY((\fifo_read_inst|baud_cnt [10] & !\fifo_read_inst|baud_cnt[9]~32 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[9]~32 ), + .combout(\fifo_read_inst|baud_cnt[10]~33_combout ), + .cout(\fifo_read_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[10]~33 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N25 +dffeas \fifo_read_inst|baud_cnt[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N28 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[12]~37 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[12]~37_combout = \fifo_read_inst|baud_cnt[11]~36 $ (!\fifo_read_inst|baud_cnt [12]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(\fifo_read_inst|baud_cnt[11]~36 ), + .combout(\fifo_read_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[12]~37 .lut_mask = 16'hF00F; +defparam \fifo_read_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N29 +dffeas \fifo_read_inst|baud_cnt[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N16 +cycloneive_lcell_comb \fifo_read_inst|Equal4~3 ( +// Equation(s): +// \fifo_read_inst|Equal4~3_combout = (\fifo_read_inst|Equal4~2_combout & (\fifo_read_inst|Equal4~0_combout & (\fifo_read_inst|Equal4~1_combout & \fifo_read_inst|baud_cnt [12]))) + + .dataa(\fifo_read_inst|Equal4~2_combout ), + .datab(\fifo_read_inst|Equal4~0_combout ), + .datac(\fifo_read_inst|Equal4~1_combout ), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~3_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~3 .lut_mask = 16'h8000; +defparam \fifo_read_inst|Equal4~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X29_Y25_N5 +dffeas \fifo_read_inst|baud_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N8 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[2]~17 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[2]~17_combout = (\fifo_read_inst|baud_cnt [2] & (\fifo_read_inst|baud_cnt[1]~16 $ (GND))) # (!\fifo_read_inst|baud_cnt [2] & (!\fifo_read_inst|baud_cnt[1]~16 & VCC)) +// \fifo_read_inst|baud_cnt[2]~18 = CARRY((\fifo_read_inst|baud_cnt [2] & !\fifo_read_inst|baud_cnt[1]~16 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[1]~16 ), + .combout(\fifo_read_inst|baud_cnt[2]~17_combout ), + .cout(\fifo_read_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[2]~17 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N9 +dffeas \fifo_read_inst|baud_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N15 +dffeas \fifo_read_inst|baud_cnt[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal5~0 ( +// Equation(s): +// \fifo_read_inst|Equal5~0_combout = (!\fifo_read_inst|baud_cnt [4] & (\fifo_read_inst|baud_cnt [5] & (\fifo_read_inst|baud_cnt [3] & !\fifo_read_inst|baud_cnt [2]))) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(\fifo_read_inst|baud_cnt [3]), + .datad(\fifo_read_inst|baud_cnt [2]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~0 .lut_mask = 16'h0040; +defparam \fifo_read_inst|Equal5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N26 +cycloneive_lcell_comb \fifo_read_inst|Equal5~2 ( +// Equation(s): +// \fifo_read_inst|Equal5~2_combout = (\fifo_read_inst|Equal5~1_combout & (\fifo_read_inst|Equal5~0_combout & (\fifo_read_inst|Equal4~0_combout & !\fifo_read_inst|baud_cnt [12]))) + + .dataa(\fifo_read_inst|Equal5~1_combout ), + .datab(\fifo_read_inst|Equal5~0_combout ), + .datac(\fifo_read_inst|Equal4~0_combout ), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~2 .lut_mask = 16'h0080; +defparam \fifo_read_inst|Equal5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N27 +dffeas \fifo_read_inst|bit_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Equal5~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N6 +cycloneive_lcell_comb \fifo_read_inst|bit_cnt~1 ( +// Equation(s): +// \fifo_read_inst|bit_cnt~1_combout = (\fifo_read_inst|Add2~2_combout & ((!\fifo_read_inst|bit_cnt [0]) # (!\fifo_read_inst|always5~0_combout ))) + + .dataa(gnd), + .datab(\fifo_read_inst|always5~0_combout ), + .datac(\fifo_read_inst|bit_cnt [0]), + .datad(\fifo_read_inst|Add2~2_combout ), + .cin(gnd), + .combout(\fifo_read_inst|bit_cnt~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt~1 .lut_mask = 16'h3F00; +defparam \fifo_read_inst|bit_cnt~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N7 +dffeas \fifo_read_inst|bit_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|bit_cnt~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N24 +cycloneive_lcell_comb \fifo_read_inst|always5~0 ( +// Equation(s): +// \fifo_read_inst|always5~0_combout = (!\fifo_read_inst|bit_cnt [2] & (\fifo_read_inst|bit_cnt [3] & (\fifo_read_inst|bit_flag~q & !\fifo_read_inst|bit_cnt [1]))) + + .dataa(\fifo_read_inst|bit_cnt [2]), + .datab(\fifo_read_inst|bit_cnt [3]), + .datac(\fifo_read_inst|bit_flag~q ), + .datad(\fifo_read_inst|bit_cnt [1]), + .cin(gnd), + .combout(\fifo_read_inst|always5~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|always5~0 .lut_mask = 16'h0040; +defparam \fifo_read_inst|always5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N0 +cycloneive_lcell_comb \fifo_read_inst|always5~1 ( +// Equation(s): +// \fifo_read_inst|always5~1_combout = (\fifo_read_inst|bit_cnt [0] & \fifo_read_inst|always5~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\fifo_read_inst|bit_cnt [0]), + .datad(\fifo_read_inst|always5~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|always5~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|always5~1 .lut_mask = 16'hF000; +defparam \fifo_read_inst|always5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N1 +dffeas \fifo_read_inst|rd_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|always5~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|rd_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|rd_en .is_wysiwyg = "true"; +defparam \fifo_read_inst|rd_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]) # +// (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # (!\fifo_read_inst|rd_en~q )) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 .lut_mask = 16'hFBFF; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ) # (\fifo_read_inst|read_en_dly~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datab(gnd), + .datac(\fifo_read_inst|read_en_dly~q ), + .datad(gnd), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 .lut_mask = 16'hFAFA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ) # +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ) # (!\fifo_read_inst|Equal1~1_combout )))) + + .dataa(\fifo_read_inst|Equal1~1_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 .lut_mask = 16'hFFD0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ) # +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q & !\fifo_read_inst|rd_en~q )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ), + .datab(gnd), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 .lut_mask = 16'hAAFA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N27 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout = (\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q $ (((!\fifo_read_inst|rd_en~q ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ))))) # (!\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & +// ((\fifo_read_inst|rd_en~q )))) + + .dataa(\fifo_read_inst|read_en_dly~q ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 .lut_mask = 16'hC60A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N9 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y25_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X26_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X26_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N10 +cycloneive_lcell_comb \Equal2~1 ( +// Equation(s): +// \Equal2~1_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cin(gnd), + .combout(\Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal2~1 .lut_mask = 16'h0040; +defparam \Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N28 +cycloneive_lcell_comb \fifo_read_inst|read_en~0 ( +// Equation(s): +// \fifo_read_inst|read_en~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout & (\Equal2~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout & +// \Equal2~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datab(\Equal2~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .datad(\Equal2~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_en~0 .lut_mask = 16'h0400; +defparam \fifo_read_inst|read_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N8 +cycloneive_lcell_comb \fifo_read_inst|read_en~1 ( +// Equation(s): +// \fifo_read_inst|read_en~1_combout = (\fifo_read_inst|read_en~0_combout ) # ((\fifo_read_inst|read_en~q & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # +// (!\fifo_read_inst|Equal1~2_combout )))) + + .dataa(\fifo_read_inst|Equal1~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datac(\fifo_read_inst|read_en~q ), + .datad(\fifo_read_inst|read_en~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_en~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_en~1 .lut_mask = 16'hFFD0; +defparam \fifo_read_inst|read_en~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N9 +dffeas \fifo_read_inst|read_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_en~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_en .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout = (\fifo_read_inst|read_en~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\fifo_read_inst|read_en~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .lut_mask = 16'hFC00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .lut_mask = 16'h0800; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N2 +cycloneive_lcell_comb \Equal2~0 ( +// Equation(s): +// \Equal2~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ), + .cin(gnd), + .combout(\Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal2~0 .lut_mask = 16'h0001; +defparam \Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 .lut_mask = 16'h55AA; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9]), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout = (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 .lut_mask = 16'h0002; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout & (\Equal2~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout & +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .datab(\Equal2~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q & (!\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 .lut_mask = 16'h0100; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 .lut_mask = 16'h5500; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & !\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 .lut_mask = 16'hFF08; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 .lut_mask = 16'h0030; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 .lut_mask = 16'hDCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 .lut_mask = 16'hFF50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 .lut_mask = 16'hF888; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 .lut_mask = 16'hFEFE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 .lut_mask = 16'h00F8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 .lut_mask = 16'h0AA0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 .lut_mask = 16'h00F0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 .lut_mask = 16'hFF50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 .lut_mask = 16'h0330; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 .lut_mask = 16'h0300; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout = ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 .lut_mask = 16'hFFD5; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 .lut_mask = 16'hFF88; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 .lut_mask = 16'h1230; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 .lut_mask = 16'h7F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 .lut_mask = 16'hFCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 .lut_mask = 16'h0007; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk +// [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ) # +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 .lut_mask = 16'hB3A0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 .lut_mask = 16'hF5F5; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 .lut_mask = 16'h2020; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 .lut_mask = 16'hFFC0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 .lut_mask = 16'h000F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 .lut_mask = 16'h003C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 .lut_mask = 16'h0C0C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 .lut_mask = 16'hEAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 .lut_mask = 16'hB800; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 .lut_mask = 16'h0055; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 .lut_mask = 16'h0004; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 .lut_mask = 16'h2AAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [9] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [11] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 $ (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 .lut_mask = 16'hF00F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 .lut_mask = 16'h0040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 .lut_mask = 16'h0020; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 .lut_mask = 16'h5000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 .lut_mask = 16'h2000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 .lut_mask = 16'hFEFF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 .lut_mask = 16'h1230; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 .lut_mask = 16'hF2F0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 .lut_mask = 16'h4040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 .lut_mask = 16'h55AA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 .lut_mask = 16'hF0FF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout = (((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 .lut_mask = 16'h777F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 .lut_mask = 16'h8C00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout = ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 .lut_mask = 16'h1F3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 .lut_mask = 16'hC840; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 $ (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 .lut_mask = 16'h0040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 .lut_mask = 16'hC000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ) # +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 .lut_mask = 16'hBA30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 .lut_mask = 16'h5450; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 .lut_mask = 16'hFFCF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 .lut_mask = 16'hF888; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 .lut_mask = 16'hFFF8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] $ (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(gnd), + .datad(gnd), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 .lut_mask = 16'h0033; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 .lut_mask = 16'hAAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout = ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 .lut_mask = 16'h5557; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .lut_mask = 16'h00A8; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .lut_mask = 16'h5400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .lut_mask = 16'h2000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .lut_mask = 16'hC3F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout +// )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'hE2C0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'hA018; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout = (\uart_rx_inst|po_flag~q & ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .datab(gnd), + .datac(\uart_rx_inst|po_flag~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .lut_mask = 16'h50F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: CLKCTRL_G8 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [0]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: CLKCTRL_G9 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [1]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y8_N1 +cycloneive_io_ibuf \rx~input ( + .i(rx), + .ibar(gnd), + .o(\rx~input_o )); +// synopsys translate_off +defparam \rx~input .bus_hold = "false"; +defparam \rx~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N12 +cycloneive_lcell_comb \uart_rx_inst|rx_reg1~0 ( +// Equation(s): +// \uart_rx_inst|rx_reg1~0_combout = !\rx~input_o + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\rx~input_o ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg1~0 .lut_mask = 16'h00FF; +defparam \uart_rx_inst|rx_reg1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N13 +dffeas \uart_rx_inst|rx_reg1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg1 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N2 +cycloneive_lcell_comb \uart_rx_inst|rx_reg2~feeder ( +// Equation(s): +// \uart_rx_inst|rx_reg2~feeder_combout = \uart_rx_inst|rx_reg1~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg1~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg2~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg2~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_reg2~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N3 +dffeas \uart_rx_inst|rx_reg2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg2~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg2 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N0 +cycloneive_lcell_comb \uart_rx_inst|rx_reg3~feeder ( +// Equation(s): +// \uart_rx_inst|rx_reg3~feeder_combout = \uart_rx_inst|rx_reg2~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg2~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg3~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg3~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_reg3~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N1 +dffeas \uart_rx_inst|rx_reg3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg3~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg3 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N14 +cycloneive_lcell_comb \uart_rx_inst|rx_data[7]~0 ( +// Equation(s): +// \uart_rx_inst|rx_data[7]~0_combout = !\uart_rx_inst|rx_reg3~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg3~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[7]~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[7]~0 .lut_mask = 16'h00FF; +defparam \uart_rx_inst|rx_data[7]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N10 +cycloneive_lcell_comb \uart_rx_inst|bit_cnt~0 ( +// Equation(s): +// \uart_rx_inst|bit_cnt~0_combout = (\uart_rx_inst|Add1~6_combout & (((!\uart_rx_inst|always4~0_combout ) # (!\uart_rx_inst|bit_cnt [3])) # (!\uart_rx_inst|bit_flag~q ))) + + .dataa(\uart_rx_inst|Add1~6_combout ), + .datab(\uart_rx_inst|bit_flag~q ), + .datac(\uart_rx_inst|bit_cnt [3]), + .datad(\uart_rx_inst|always4~0_combout ), + .cin(gnd), + .combout(\uart_rx_inst|bit_cnt~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt~0 .lut_mask = 16'h2AAA; +defparam \uart_rx_inst|bit_cnt~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N11 +dffeas \uart_rx_inst|bit_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|bit_cnt~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N18 +cycloneive_lcell_comb \uart_rx_inst|always8~0 ( +// Equation(s): +// \uart_rx_inst|always8~0_combout = (\uart_rx_inst|bit_flag~q & (\uart_rx_inst|always4~0_combout $ (!\uart_rx_inst|bit_cnt [3]))) + + .dataa(gnd), + .datab(\uart_rx_inst|always4~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(\uart_rx_inst|bit_cnt [3]), + .cin(gnd), + .combout(\uart_rx_inst|always8~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always8~0 .lut_mask = 16'hC030; +defparam \uart_rx_inst|always8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N15 +dffeas \uart_rx_inst|rx_data[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[7]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y23_N21 +dffeas \uart_rx_inst|rx_data[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_data [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N18 +cycloneive_lcell_comb \uart_rx_inst|rx_data[5]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[5]~feeder_combout = \uart_rx_inst|rx_data [6] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [6]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[5]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N19 +dffeas \uart_rx_inst|rx_data[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N0 +cycloneive_lcell_comb \uart_rx_inst|rx_data[4]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[4]~feeder_combout = \uart_rx_inst|rx_data [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [5]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[4]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N1 +dffeas \uart_rx_inst|rx_data[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N6 +cycloneive_lcell_comb \uart_rx_inst|rx_data[3]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[3]~feeder_combout = \uart_rx_inst|rx_data [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [4]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[3]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N7 +dffeas \uart_rx_inst|rx_data[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N28 +cycloneive_lcell_comb \uart_rx_inst|rx_data[2]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[2]~feeder_combout = \uart_rx_inst|rx_data [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [3]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[2]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N29 +dffeas \uart_rx_inst|rx_data[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N2 +cycloneive_lcell_comb \uart_rx_inst|rx_data[1]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[1]~feeder_combout = \uart_rx_inst|rx_data [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [2]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[1]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N3 +dffeas \uart_rx_inst|rx_data[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N24 +cycloneive_lcell_comb \uart_rx_inst|rx_data[0]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[0]~feeder_combout = \uart_rx_inst|rx_data [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [1]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[0]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N25 +dffeas \uart_rx_inst|rx_data[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N8 +cycloneive_lcell_comb \uart_rx_inst|po_data[0]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[0]~feeder_combout = \uart_rx_inst|rx_data [0] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [0]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[0]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N9 +dffeas \uart_rx_inst|po_data[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9]), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N10 +cycloneive_lcell_comb \uart_rx_inst|po_data[1]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[1]~feeder_combout = \uart_rx_inst|rx_data [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [1]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[1]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N11 +dffeas \uart_rx_inst|po_data[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N12 +cycloneive_lcell_comb \uart_rx_inst|po_data[2]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[2]~feeder_combout = \uart_rx_inst|rx_data [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [2]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[2]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N13 +dffeas \uart_rx_inst|po_data[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N30 +cycloneive_lcell_comb \uart_rx_inst|po_data[3]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[3]~feeder_combout = \uart_rx_inst|rx_data [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [3]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[3]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N31 +dffeas \uart_rx_inst|po_data[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N16 +cycloneive_lcell_comb \uart_rx_inst|po_data[4]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[4]~feeder_combout = \uart_rx_inst|rx_data [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [4]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[4]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N17 +dffeas \uart_rx_inst|po_data[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N26 +cycloneive_lcell_comb \uart_rx_inst|po_data[5]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[5]~feeder_combout = \uart_rx_inst|rx_data [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [5]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[5]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N27 +dffeas \uart_rx_inst|po_data[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N4 +cycloneive_lcell_comb \uart_rx_inst|po_data[6]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[6]~feeder_combout = \uart_rx_inst|rx_data [6] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [6]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[6]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N5 +dffeas \uart_rx_inst|po_data[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y23_N23 +dffeas \uart_rx_inst|po_data[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_data [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X12_Y23_N8 +cycloneive_lcell_comb \~GND ( +// Equation(s): +// \~GND~combout = GND + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\~GND~combout ), + .cout()); +// synopsys translate_off +defparam \~GND .lut_mask = 16'h0000; +defparam \~GND .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X13_Y23_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({\~GND~combout ,\uart_rx_inst|po_data [7],\uart_rx_inst|po_data [6],\uart_rx_inst|po_data [5],\uart_rx_inst|po_data [4],\uart_rx_inst|po_data [3],\uart_rx_inst|po_data [2],\uart_rx_inst|po_data [1],\uart_rx_inst|po_data [0]}), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:wr_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en .power_up = "low"; +// synopsys translate_on + +// Location: M9K_X13_Y21_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({gnd,gnd,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout }), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:wr_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_first_bit_number = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_first_bit_number = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: CLKCTRL_G5 +cycloneive_clkctrl \sys_clk~inputclkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\sys_clk~input_o }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\sys_clk~inputclkctrl_outclk )); +// synopsys translate_off +defparam \sys_clk~inputclkctrl .clock_type = "global clock"; +defparam \sys_clk~inputclkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N4 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[0]~13 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[0]~13_combout = (\uart_tx_inst|work_en~q & (\uart_tx_inst|baud_cnt [0] $ (VCC))) # (!\uart_tx_inst|work_en~q & (\uart_tx_inst|baud_cnt [0] & VCC)) +// \uart_tx_inst|baud_cnt[0]~14 = CARRY((\uart_tx_inst|work_en~q & \uart_tx_inst|baud_cnt [0])) + + .dataa(\uart_tx_inst|work_en~q ), + .datab(\uart_tx_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_tx_inst|baud_cnt[0]~13_combout ), + .cout(\uart_tx_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \uart_tx_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N26 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[11]~35 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[11]~35_combout = (\uart_tx_inst|baud_cnt [11] & (!\uart_tx_inst|baud_cnt[10]~34 )) # (!\uart_tx_inst|baud_cnt [11] & ((\uart_tx_inst|baud_cnt[10]~34 ) # (GND))) +// \uart_tx_inst|baud_cnt[11]~36 = CARRY((!\uart_tx_inst|baud_cnt[10]~34 ) # (!\uart_tx_inst|baud_cnt [11])) + + .dataa(\uart_tx_inst|baud_cnt [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[10]~34 ), + .combout(\uart_tx_inst|baud_cnt[11]~35_combout ), + .cout(\uart_tx_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[11]~35 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N27 +dffeas \uart_tx_inst|baud_cnt[11] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N0 +cycloneive_lcell_comb \uart_tx_inst|Equal1~0 ( +// Equation(s): +// \uart_tx_inst|Equal1~0_combout = (!\uart_tx_inst|baud_cnt [3] & (!\uart_tx_inst|baud_cnt [5] & (\uart_tx_inst|baud_cnt [0] & !\uart_tx_inst|baud_cnt [7]))) + + .dataa(\uart_tx_inst|baud_cnt [3]), + .datab(\uart_tx_inst|baud_cnt [5]), + .datac(\uart_tx_inst|baud_cnt [0]), + .datad(\uart_tx_inst|baud_cnt [7]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~0 .lut_mask = 16'h0010; +defparam \uart_tx_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N22 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[9]~31 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[9]~31_combout = (\uart_tx_inst|baud_cnt [9] & (!\uart_tx_inst|baud_cnt[8]~30 )) # (!\uart_tx_inst|baud_cnt [9] & ((\uart_tx_inst|baud_cnt[8]~30 ) # (GND))) +// \uart_tx_inst|baud_cnt[9]~32 = CARRY((!\uart_tx_inst|baud_cnt[8]~30 ) # (!\uart_tx_inst|baud_cnt [9])) + + .dataa(\uart_tx_inst|baud_cnt [9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[8]~30 ), + .combout(\uart_tx_inst|baud_cnt[9]~31_combout ), + .cout(\uart_tx_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[9]~31 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N23 +dffeas \uart_tx_inst|baud_cnt[9] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|Equal1~1 ( +// Equation(s): +// \uart_tx_inst|Equal1~1_combout = (!\uart_tx_inst|baud_cnt [8] & (!\uart_tx_inst|baud_cnt [11] & (\uart_tx_inst|Equal1~0_combout & !\uart_tx_inst|baud_cnt [9]))) + + .dataa(\uart_tx_inst|baud_cnt [8]), + .datab(\uart_tx_inst|baud_cnt [11]), + .datac(\uart_tx_inst|Equal1~0_combout ), + .datad(\uart_tx_inst|baud_cnt [9]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~1 .lut_mask = 16'h0010; +defparam \uart_tx_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[1]~15 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[1]~15_combout = (\uart_tx_inst|baud_cnt [1] & (!\uart_tx_inst|baud_cnt[0]~14 )) # (!\uart_tx_inst|baud_cnt [1] & ((\uart_tx_inst|baud_cnt[0]~14 ) # (GND))) +// \uart_tx_inst|baud_cnt[1]~16 = CARRY((!\uart_tx_inst|baud_cnt[0]~14 ) # (!\uart_tx_inst|baud_cnt [1])) + + .dataa(\uart_tx_inst|baud_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[0]~14 ), + .combout(\uart_tx_inst|baud_cnt[1]~15_combout ), + .cout(\uart_tx_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[1]~15 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N7 +dffeas \uart_tx_inst|baud_cnt[1] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N30 +cycloneive_lcell_comb \uart_tx_inst|Equal1~2 ( +// Equation(s): +// \uart_tx_inst|Equal1~2_combout = (\uart_tx_inst|baud_cnt [4] & (\uart_tx_inst|baud_cnt [6] & (\uart_tx_inst|baud_cnt [2] & \uart_tx_inst|baud_cnt [1]))) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(\uart_tx_inst|baud_cnt [2]), + .datad(\uart_tx_inst|baud_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~2 .lut_mask = 16'h8000; +defparam \uart_tx_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N19 +dffeas \fifo_read_inst|tx_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\fifo_read_inst|rd_en~q ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|tx_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|tx_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|tx_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|always3~0 ( +// Equation(s): +// \uart_tx_inst|always3~0_combout = (!\uart_tx_inst|work_en~q ) # (!\uart_tx_inst|bit_flag~q ) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(gnd), + .datac(\uart_tx_inst|work_en~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_tx_inst|always3~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always3~0 .lut_mask = 16'h5F5F; +defparam \uart_tx_inst|always3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N18 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[1]~2 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[1]~2_combout = (!\uart_tx_inst|always0~1_combout & (\uart_tx_inst|bit_cnt [1] $ (((\uart_tx_inst|bit_cnt [0] & !\uart_tx_inst|always3~0_combout ))))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [1]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[1]~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[1]~2 .lut_mask = 16'h00D2; +defparam \uart_tx_inst|bit_cnt[1]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N19 +dffeas \uart_tx_inst|bit_cnt[1] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[1]~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N4 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[2]~3 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[2]~3_combout = (!\uart_tx_inst|always0~1_combout & ((\uart_tx_inst|always3~0_combout & ((\uart_tx_inst|bit_cnt [2]))) # (!\uart_tx_inst|always3~0_combout & (\uart_tx_inst|Add1~0_combout )))) + + .dataa(\uart_tx_inst|Add1~0_combout ), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[2]~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[2]~3 .lut_mask = 16'h00E2; +defparam \uart_tx_inst|bit_cnt[2]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N5 +dffeas \uart_tx_inst|bit_cnt[2] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[2]~3_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|always0~1 ( +// Equation(s): +// \uart_tx_inst|always0~1_combout = (\uart_tx_inst|bit_cnt [0] & (!\uart_tx_inst|bit_cnt [1] & (!\uart_tx_inst|bit_cnt [2] & \uart_tx_inst|always0~0_combout ))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [1]), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|always0~0_combout ), + .cin(gnd), + .combout(\uart_tx_inst|always0~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always0~1 .lut_mask = 16'h0200; +defparam \uart_tx_inst|always0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N18 +cycloneive_lcell_comb \uart_tx_inst|work_en~0 ( +// Equation(s): +// \uart_tx_inst|work_en~0_combout = (\fifo_read_inst|tx_flag~q ) # ((\uart_tx_inst|work_en~q & !\uart_tx_inst|always0~1_combout )) + + .dataa(gnd), + .datab(\uart_tx_inst|work_en~q ), + .datac(\fifo_read_inst|tx_flag~q ), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|work_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|work_en~0 .lut_mask = 16'hF0FC; +defparam \uart_tx_inst|work_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N25 +dffeas \uart_tx_inst|work_en ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(gnd), + .asdata(\uart_tx_inst|work_en~0_combout ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|work_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|work_en .is_wysiwyg = "true"; +defparam \uart_tx_inst|work_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|always1~0 ( +// Equation(s): +// \uart_tx_inst|always1~0_combout = ((\uart_tx_inst|Equal1~3_combout & (\uart_tx_inst|Equal1~1_combout & \uart_tx_inst|Equal1~2_combout ))) # (!\uart_tx_inst|work_en~q ) + + .dataa(\uart_tx_inst|Equal1~3_combout ), + .datab(\uart_tx_inst|Equal1~1_combout ), + .datac(\uart_tx_inst|Equal1~2_combout ), + .datad(\uart_tx_inst|work_en~q ), + .cin(gnd), + .combout(\uart_tx_inst|always1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always1~0 .lut_mask = 16'h80FF; +defparam \uart_tx_inst|always1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y18_N5 +dffeas \uart_tx_inst|baud_cnt[0] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N8 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[2]~17 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[2]~17_combout = (\uart_tx_inst|baud_cnt [2] & (\uart_tx_inst|baud_cnt[1]~16 $ (GND))) # (!\uart_tx_inst|baud_cnt [2] & (!\uart_tx_inst|baud_cnt[1]~16 & VCC)) +// \uart_tx_inst|baud_cnt[2]~18 = CARRY((\uart_tx_inst|baud_cnt [2] & !\uart_tx_inst|baud_cnt[1]~16 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[1]~16 ), + .combout(\uart_tx_inst|baud_cnt[2]~17_combout ), + .cout(\uart_tx_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[2]~17 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N9 +dffeas \uart_tx_inst|baud_cnt[2] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N14 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[5]~23 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[5]~23_combout = (\uart_tx_inst|baud_cnt [5] & (!\uart_tx_inst|baud_cnt[4]~22 )) # (!\uart_tx_inst|baud_cnt [5] & ((\uart_tx_inst|baud_cnt[4]~22 ) # (GND))) +// \uart_tx_inst|baud_cnt[5]~24 = CARRY((!\uart_tx_inst|baud_cnt[4]~22 ) # (!\uart_tx_inst|baud_cnt [5])) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [5]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[4]~22 ), + .combout(\uart_tx_inst|baud_cnt[5]~23_combout ), + .cout(\uart_tx_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[5]~23 .lut_mask = 16'h3C3F; +defparam \uart_tx_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N15 +dffeas \uart_tx_inst|baud_cnt[5] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N16 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[6]~25 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[6]~25_combout = (\uart_tx_inst|baud_cnt [6] & (\uart_tx_inst|baud_cnt[5]~24 $ (GND))) # (!\uart_tx_inst|baud_cnt [6] & (!\uart_tx_inst|baud_cnt[5]~24 & VCC)) +// \uart_tx_inst|baud_cnt[6]~26 = CARRY((\uart_tx_inst|baud_cnt [6] & !\uart_tx_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[5]~24 ), + .combout(\uart_tx_inst|baud_cnt[6]~25_combout ), + .cout(\uart_tx_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N17 +dffeas \uart_tx_inst|baud_cnt[6] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N18 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[7]~27 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[7]~27_combout = (\uart_tx_inst|baud_cnt [7] & (!\uart_tx_inst|baud_cnt[6]~26 )) # (!\uart_tx_inst|baud_cnt [7] & ((\uart_tx_inst|baud_cnt[6]~26 ) # (GND))) +// \uart_tx_inst|baud_cnt[7]~28 = CARRY((!\uart_tx_inst|baud_cnt[6]~26 ) # (!\uart_tx_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[6]~26 ), + .combout(\uart_tx_inst|baud_cnt[7]~27_combout ), + .cout(\uart_tx_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \uart_tx_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N19 +dffeas \uart_tx_inst|baud_cnt[7] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N20 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[8]~29 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[8]~29_combout = (\uart_tx_inst|baud_cnt [8] & (\uart_tx_inst|baud_cnt[7]~28 $ (GND))) # (!\uart_tx_inst|baud_cnt [8] & (!\uart_tx_inst|baud_cnt[7]~28 & VCC)) +// \uart_tx_inst|baud_cnt[8]~30 = CARRY((\uart_tx_inst|baud_cnt [8] & !\uart_tx_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[7]~28 ), + .combout(\uart_tx_inst|baud_cnt[8]~29_combout ), + .cout(\uart_tx_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N21 +dffeas \uart_tx_inst|baud_cnt[8] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[10]~33 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[10]~33_combout = (\uart_tx_inst|baud_cnt [10] & (\uart_tx_inst|baud_cnt[9]~32 $ (GND))) # (!\uart_tx_inst|baud_cnt [10] & (!\uart_tx_inst|baud_cnt[9]~32 & VCC)) +// \uart_tx_inst|baud_cnt[10]~34 = CARRY((\uart_tx_inst|baud_cnt [10] & !\uart_tx_inst|baud_cnt[9]~32 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [10]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[9]~32 ), + .combout(\uart_tx_inst|baud_cnt[10]~33_combout ), + .cout(\uart_tx_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[10]~33 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N25 +dffeas \uart_tx_inst|baud_cnt[10] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N28 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[12]~37 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[12]~37_combout = \uart_tx_inst|baud_cnt[11]~36 $ (!\uart_tx_inst|baud_cnt [12]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_tx_inst|baud_cnt [12]), + .cin(\uart_tx_inst|baud_cnt[11]~36 ), + .combout(\uart_tx_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[12]~37 .lut_mask = 16'hF00F; +defparam \uart_tx_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N29 +dffeas \uart_tx_inst|baud_cnt[12] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|Equal2~0 ( +// Equation(s): +// \uart_tx_inst|Equal2~0_combout = (!\uart_tx_inst|baud_cnt [4] & (!\uart_tx_inst|baud_cnt [6] & (!\uart_tx_inst|baud_cnt [2] & !\uart_tx_inst|baud_cnt [1]))) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(\uart_tx_inst|baud_cnt [2]), + .datad(\uart_tx_inst|baud_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal2~0 .lut_mask = 16'h0001; +defparam \uart_tx_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|Equal2~1 ( +// Equation(s): +// \uart_tx_inst|Equal2~1_combout = (\uart_tx_inst|Equal1~1_combout & (!\uart_tx_inst|baud_cnt [12] & (\uart_tx_inst|Equal2~0_combout & !\uart_tx_inst|baud_cnt [10]))) + + .dataa(\uart_tx_inst|Equal1~1_combout ), + .datab(\uart_tx_inst|baud_cnt [12]), + .datac(\uart_tx_inst|Equal2~0_combout ), + .datad(\uart_tx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_tx_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal2~1 .lut_mask = 16'h0020; +defparam \uart_tx_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y18_N25 +dffeas \uart_tx_inst|bit_flag ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|Equal2~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_flag .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N28 +cycloneive_lcell_comb \uart_tx_inst|always0~0 ( +// Equation(s): +// \uart_tx_inst|always0~0_combout = (\uart_tx_inst|bit_cnt [3] & \uart_tx_inst|bit_flag~q ) + + .dataa(\uart_tx_inst|bit_cnt [3]), + .datab(gnd), + .datac(\uart_tx_inst|bit_flag~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_tx_inst|always0~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always0~0 .lut_mask = 16'hA0A0; +defparam \uart_tx_inst|always0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N30 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & \fifo_read_inst|rd_en~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq .lut_mask = 16'hAA00; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N8 +cycloneive_io_ibuf \sdram_dq[0]~input ( + .i(sdram_dq[0]), + .ibar(gnd), + .o(\sdram_dq[0]~input_o )); +// synopsys translate_off +defparam \sdram_dq[0]~input .bus_hold = "false"; +defparam \sdram_dq[0]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[0]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N1 +cycloneive_io_ibuf \sdram_dq[1]~input ( + .i(sdram_dq[1]), + .ibar(gnd), + .o(\sdram_dq[1]~input_o )); +// synopsys translate_off +defparam \sdram_dq[1]~input .bus_hold = "false"; +defparam \sdram_dq[1]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[1]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X9_Y29_N1 +cycloneive_io_ibuf \sdram_dq[2]~input ( + .i(sdram_dq[2]), + .ibar(gnd), + .o(\sdram_dq[2]~input_o )); +// synopsys translate_off +defparam \sdram_dq[2]~input .bus_hold = "false"; +defparam \sdram_dq[2]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[2]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X14_Y29_N29 +cycloneive_io_ibuf \sdram_dq[3]~input ( + .i(sdram_dq[3]), + .ibar(gnd), + .o(\sdram_dq[3]~input_o )); +// synopsys translate_off +defparam \sdram_dq[3]~input .bus_hold = "false"; +defparam \sdram_dq[3]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[3]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X14_Y29_N22 +cycloneive_io_ibuf \sdram_dq[4]~input ( + .i(sdram_dq[4]), + .ibar(gnd), + .o(\sdram_dq[4]~input_o )); +// synopsys translate_off +defparam \sdram_dq[4]~input .bus_hold = "false"; +defparam \sdram_dq[4]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[4]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X9_Y29_N8 +cycloneive_io_ibuf \sdram_dq[5]~input ( + .i(sdram_dq[5]), + .ibar(gnd), + .o(\sdram_dq[5]~input_o )); +// synopsys translate_off +defparam \sdram_dq[5]~input .bus_hold = "false"; +defparam \sdram_dq[5]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[5]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N15 +cycloneive_io_ibuf \sdram_dq[6]~input ( + .i(sdram_dq[6]), + .ibar(gnd), + .o(\sdram_dq[6]~input_o )); +// synopsys translate_off +defparam \sdram_dq[6]~input .bus_hold = "false"; +defparam \sdram_dq[6]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[6]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N22 +cycloneive_io_ibuf \sdram_dq[7]~input ( + .i(sdram_dq[7]), + .ibar(gnd), + .o(\sdram_dq[7]~input_o )); +// synopsys translate_off +defparam \sdram_dq[7]~input .bus_hold = "false"; +defparam \sdram_dq[7]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[7]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X25_Y25_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({gnd,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout , +\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout , +\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout }), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:rd_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0] $ (VCC) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 .lut_mask = 16'h55AA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N7 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N8 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N9 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0] $ (VCC) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 .lut_mask = 16'h55AA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N27 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N28 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 .lut_mask = 16'h0FF0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N29 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N14 +cycloneive_lcell_comb \uart_tx_inst|tx~4 ( +// Equation(s): +// \uart_tx_inst|tx~4_combout = (\uart_tx_inst|bit_cnt [0]) # ((\uart_tx_inst|bit_cnt [2]) # ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7]) # (\uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~4_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~4 .lut_mask = 16'hFFFE; +defparam \uart_tx_inst|tx~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N8 +cycloneive_lcell_comb \uart_tx_inst|tx~3 ( +// Equation(s): +// \uart_tx_inst|tx~3_combout = (!\uart_tx_inst|bit_flag~q & !\uart_tx_inst|tx~q ) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(gnd), + .datac(gnd), + .datad(\uart_tx_inst|tx~q ), + .cin(gnd), + .combout(\uart_tx_inst|tx~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~3 .lut_mask = 16'h0055; +defparam \uart_tx_inst|tx~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N0 +cycloneive_lcell_comb \uart_tx_inst|tx~5 ( +// Equation(s): +// \uart_tx_inst|tx~5_combout = (!\uart_tx_inst|tx~2_combout & (!\uart_tx_inst|tx~3_combout & ((!\uart_tx_inst|tx~4_combout ) # (!\uart_tx_inst|always0~0_combout )))) + + .dataa(\uart_tx_inst|tx~2_combout ), + .datab(\uart_tx_inst|always0~0_combout ), + .datac(\uart_tx_inst|tx~4_combout ), + .datad(\uart_tx_inst|tx~3_combout ), + .cin(gnd), + .combout(\uart_tx_inst|tx~5_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~5 .lut_mask = 16'h0015; +defparam \uart_tx_inst|tx~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N1 +dffeas \uart_tx_inst|tx ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|tx~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|tx~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|tx .is_wysiwyg = "true"; +defparam \uart_tx_inst|tx .power_up = "low"; +// synopsys translate_on + +// Location: CLKCTRL_G7 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [2]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: FF_X23_Y22_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 .lut_mask = 16'hF0FC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 .lut_mask = 16'hBAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 .lut_mask = 16'h4000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 .lut_mask = 16'hFF20; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 .lut_mask = 16'h8C9D; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1])))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 .lut_mask = 16'h5F22; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 .lut_mask = 16'h00CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 .lut_mask = 16'hFFEE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 .lut_mask = 16'hA1AB; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]))))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 .lut_mask = 16'h5F30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 .lut_mask = 16'h5554; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 .lut_mask = 16'hAAA0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 .lut_mask = 16'h1ABA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 .lut_mask = 16'h4055; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 .lut_mask = 16'hF0FF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 .lut_mask = 16'h3C00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 .lut_mask = 16'h7800; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 .lut_mask = 16'h0002; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS .power_up = "low"; +// synopsys translate_on + +// Location: FF_X21_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 .lut_mask = 16'h55CF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 .lut_mask = 16'hF7F2; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 .lut_mask = 16'h4CCC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0] & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (((!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 .lut_mask = 16'h0777; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 .lut_mask = 16'h0101; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 .lut_mask = 16'h2022; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 .lut_mask = 16'h4400; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 .lut_mask = 16'h5053; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 .lut_mask = 16'h008F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10])))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 .lut_mask = 16'h0FDD; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 .lut_mask = 16'hDFCE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y20_N8 +cycloneive_io_ibuf \sdram_dq[8]~input ( + .i(sdram_dq[8]), + .ibar(gnd), + .o(\sdram_dq[8]~input_o )); +// synopsys translate_off +defparam \sdram_dq[8]~input .bus_hold = "false"; +defparam \sdram_dq[8]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X3_Y29_N29 +cycloneive_io_ibuf \sdram_dq[9]~input ( + .i(sdram_dq[9]), + .ibar(gnd), + .o(\sdram_dq[9]~input_o )); +// synopsys translate_off +defparam \sdram_dq[9]~input .bus_hold = "false"; +defparam \sdram_dq[9]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y25_N1 +cycloneive_io_ibuf \sdram_dq[10]~input ( + .i(sdram_dq[10]), + .ibar(gnd), + .o(\sdram_dq[10]~input_o )); +// synopsys translate_off +defparam \sdram_dq[10]~input .bus_hold = "false"; +defparam \sdram_dq[10]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y26_N8 +cycloneive_io_ibuf \sdram_dq[11]~input ( + .i(sdram_dq[11]), + .ibar(gnd), + .o(\sdram_dq[11]~input_o )); +// synopsys translate_off +defparam \sdram_dq[11]~input .bus_hold = "false"; +defparam \sdram_dq[11]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y23_N8 +cycloneive_io_ibuf \sdram_dq[12]~input ( + .i(sdram_dq[12]), + .ibar(gnd), + .o(\sdram_dq[12]~input_o )); +// synopsys translate_off +defparam \sdram_dq[12]~input .bus_hold = "false"; +defparam \sdram_dq[12]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N8 +cycloneive_io_ibuf \sdram_dq[13]~input ( + .i(sdram_dq[13]), + .ibar(gnd), + .o(\sdram_dq[13]~input_o )); +// synopsys translate_off +defparam \sdram_dq[13]~input .bus_hold = "false"; +defparam \sdram_dq[13]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N22 +cycloneive_io_ibuf \sdram_dq[14]~input ( + .i(sdram_dq[14]), + .ibar(gnd), + .o(\sdram_dq[14]~input_o )); +// synopsys translate_off +defparam \sdram_dq[14]~input .bus_hold = "false"; +defparam \sdram_dq[14]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N1 +cycloneive_io_ibuf \sdram_dq[15]~input ( + .i(sdram_dq[15]), + .ibar(gnd), + .o(\sdram_dq[15]~input_o )); +// synopsys translate_off +defparam \sdram_dq[15]~input .bus_hold = "false"; +defparam \sdram_dq[15]~input .simulate_z_as = "z"; +// synopsys translate_on + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_85c_v_slow.sdo b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_85c_v_slow.sdo new file mode 100644 index 0000000..5006d42 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_8_1200mv_85c_v_slow.sdo @@ -0,0 +1,19618 @@ +// Copyright (C) 1991-2013 Altera Corporation +// Your use of Altera Corporation's design tools, logic functions +// and other software and tools, and its AMPP partner logic +// functions, and any output files from any of the foregoing +// (including device programming or simulation files), and any +// associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License +// Subscription Agreement, Altera MegaCore Function License +// Agreement, or other applicable license agreement, including, +// without limitation, that your use is for the sole purpose of +// programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the +// applicable agreement for further details. + + +// +// Device: Altera EP4CE15F23C8 Package FBGA484 +// + +// +// This file contains Slow Corner delays for the design using part EP4CE15F23C8, +// with speed grade 8, core voltage 1.2V, and temperature 85 Celsius +// + +// +// This SDF file should be used for ModelSim (Verilog) only +// + +(DELAYFILE + (SDFVERSION "2.1") + (DESIGN "uart_sdram") + (DATE "06/02/2023 04:26:31") + (VENDOR "Altera") + (PROGRAM "Quartus II 64-Bit") + (VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version") + (DIVIDER .) + (TIMESCALE 1 ps) + + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1692:1692:1692) (1583:1583:1583)) + (PORT d[1] (1627:1627:1627) (1518:1518:1518)) + (PORT d[2] (1737:1737:1737) (1611:1611:1611)) + (PORT d[3] (1724:1724:1724) (1602:1602:1602)) + (PORT d[4] (1667:1667:1667) (1555:1555:1555)) + (PORT d[5] (1663:1663:1663) (1554:1554:1554)) + (PORT d[6] (1729:1729:1729) (1606:1606:1606)) + (PORT d[7] (1695:1695:1695) (1579:1579:1579)) + (PORT clk (2276:2276:2276) (2303:2303:2303)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1303:1303:1303) (1270:1270:1270)) + (PORT d[1] (1383:1383:1383) (1337:1337:1337)) + (PORT d[2] (986:986:986) (980:980:980)) + (PORT d[3] (1229:1229:1229) (1175:1175:1175)) + (PORT d[4] (1022:1022:1022) (1011:1011:1011)) + (PORT d[5] (970:970:970) (967:967:967)) + (PORT d[6] (1276:1276:1276) (1208:1208:1208)) + (PORT d[7] (1337:1337:1337) (1302:1302:1302)) + (PORT d[8] (983:983:983) (981:981:981)) + (PORT d[9] (979:979:979) (977:977:977)) + (PORT clk (2272:2272:2272) (2298:2298:2298)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (2060:2060:2060) (1886:1886:1886)) + (PORT clk (2272:2272:2272) (2298:2298:2298)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2276:2276:2276) (2303:2303:2303)) + (PORT d[0] (2767:2767:2767) (2600:2600:2600)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2277:2277:2277) (2304:2304:2304)) + (IOPATH (posedge clk) pulse (0:0:0) (2750:2750:2750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2277:2277:2277) (2304:2304:2304)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2277:2277:2277) (2304:2304:2304)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2277:2277:2277) (2304:2304:2304)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (989:989:989) (979:979:979)) + (PORT d[1] (974:974:974) (952:952:952)) + (PORT d[2] (1375:1375:1375) (1321:1321:1321)) + (PORT d[3] (1735:1735:1735) (1635:1635:1635)) + (PORT d[4] (974:974:974) (965:965:965)) + (PORT d[5] (1768:1768:1768) (1761:1761:1761)) + (PORT d[6] (1757:1757:1757) (1674:1674:1674)) + (PORT d[7] (1328:1328:1328) (1287:1287:1287)) + (PORT d[8] (1003:1003:1003) (986:986:986)) + (PORT d[9] (1472:1472:1472) (1376:1376:1376)) + (PORT clk (2226:2226:2226) (2212:2212:2212)) + (PORT ena (2597:2597:2597) (2442:2442:2442)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + (HOLD ena (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (2226:2226:2226) (2212:2212:2212)) + (PORT d[0] (2597:2597:2597) (2442:2442:2442)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2227:2227:2227) (2213:2213:2213)) + (IOPATH (posedge clk) pulse (0:0:0) (3251:3251:3251)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2227:2227:2227) (2213:2213:2213)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2227:2227:2227) (2213:2213:2213)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (850:850:850) (820:820:820)) + (PORT datab (539:539:539) (560:560:560)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~14) + (DELAY + (ABSOLUTE + (PORT dataa (983:983:983) (956:956:956)) + (PORT datab (1005:1005:1005) (982:982:982)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1617:1617:1617) (1564:1564:1564)) + (PORT datab (538:538:538) (569:569:569)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~16) + (DELAY + (ABSOLUTE + (PORT dataa (532:532:532) (571:571:571)) + (PORT datab (866:866:866) (831:831:831)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (360:360:360) (462:462:462)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (361:361:361) (464:464:464)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (434:434:434)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (434:434:434)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (449:449:449)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (620:620:620) (629:629:629)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~0) + (DELAY + (ABSOLUTE + (PORT datab (863:863:863) (845:845:845)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (445:445:445)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~12) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~26) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (434:434:434)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT dataa (574:574:574) (611:611:611)) + (PORT datab (956:956:956) (934:934:934)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (449:449:449)) + (PORT datab (955:955:955) (933:933:933)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT dataa (371:371:371) (458:458:458)) + (PORT datab (955:955:955) (933:933:933)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT dataa (577:577:577) (600:600:600)) + (PORT datab (955:955:955) (932:932:932)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (614:614:614)) + (PORT datab (953:953:953) (931:931:931)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT dataa (579:579:579) (613:613:613)) + (PORT datab (953:953:953) (930:930:930)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT dataa (842:842:842) (823:823:823)) + (PORT datab (952:952:952) (929:929:929)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (446:446:446)) + (PORT datab (952:952:952) (929:929:929)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datab (362:362:362) (439:439:439)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn 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(261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + 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(HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[15\]) + (DELAY + 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(1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[18\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[19\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[20\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[21\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn 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(PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~0) + (DELAY + (ABSOLUTE + (PORT datab (542:542:542) (573:573:573)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (615:615:615) (623:623:623)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~4) + (DELAY + (ABSOLUTE + (PORT datab (566:566:566) (584:584:584)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~6) + (DELAY + (ABSOLUTE + (PORT datab (554:554:554) (584:584:584)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~8) + (DELAY + (ABSOLUTE + (PORT dataa (576:576:576) (598:598:598)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~10) + (DELAY + (ABSOLUTE + (PORT dataa (571:571:571) (598:598:598)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~12) + (DELAY + (ABSOLUTE + (PORT dataa (620:620:620) (629:629:629)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~14) + (DELAY + (ABSOLUTE + (PORT dataa (618:618:618) (627:627:627)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~16) + (DELAY + (ABSOLUTE + (PORT dataa (937:937:937) (942:942:942)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~18) + (DELAY + (ABSOLUTE + (PORT datab (1008:1008:1008) (980:980:980)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~20) + (DELAY + (ABSOLUTE + (PORT dataa (972:972:972) (958:958:958)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~22) + (DELAY + (ABSOLUTE + (PORT datab (912:912:912) (910:910:910)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~24) + (DELAY + (ABSOLUTE + (PORT datab (559:559:559) (585:585:585)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~26) + (DELAY + (ABSOLUTE + (PORT datab (614:614:614) (618:618:618)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~28) + (DELAY + (ABSOLUTE + (PORT dataa (623:623:623) (628:628:628)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~30) + (DELAY + (ABSOLUTE + (PORT datad (555:555:555) (569:569:569)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[9\]\~31) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (445:445:445)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[11\]\~35) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (448:448:448)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[0\]\~24) + (DELAY + (ABSOLUTE + (PORT dataa (1892:1892:1892) (1762:1762:1762)) + (PORT datab (341:341:341) (422:422:422)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[1\]\~26) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (430:430:430)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[2\]\~28) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (433:433:433)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[3\]\~30) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (424:424:424)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[4\]\~32) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (421:421:421)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[5\]\~34) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (423:423:423)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[6\]\~36) + (DELAY + (ABSOLUTE + (PORT datab (359:359:359) (436:436:436)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[7\]\~38) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (430:430:430)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[8\]\~40) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (419:419:419)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[9\]\~42) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (429:429:429)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[10\]\~44) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (421:421:421)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[11\]\~46) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (431:431:431)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[12\]\~48) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (418:418:418)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[13\]\~50) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (421:421:421)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[14\]\~52) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (420:420:420)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[15\]\~54) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (432:432:432)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[16\]\~56) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (421:421:421)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[17\]\~58) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (431:431:431)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[18\]\~60) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (434:434:434)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[19\]\~62) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[20\]\~64) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (422:422:422)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[21\]\~66) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[22\]\~68) + (DELAY + (ABSOLUTE + (PORT datab (361:361:361) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[23\]\~70) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (436:436:436)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (433:433:433)) + (PORT datab (369:369:369) (468:468:468)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~4) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (421:421:421)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~6) + (DELAY + (ABSOLUTE + (PORT datad (324:324:324) (411:411:411)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (908:908:908) (883:883:883)) + (PORT datab (340:340:340) (419:419:419)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (421:421:421)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (420:420:420)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (433:433:433)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (422:422:422)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (431:431:431)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (435:435:435)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (423:423:423)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT datab (344:344:344) (427:427:427)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (448:448:448)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT asdata (1686:1686:1686) (1628:1628:1628)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1174:1174:1174) (1083:1083:1083)) + (PORT datab (1182:1182:1182) (1098:1098:1098)) + (PORT datad (292:292:292) (362:362:362)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Mux0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (788:788:788) (716:716:716)) + (PORT datab (412:412:412) (512:512:512)) + (PORT datac (784:784:784) (707:707:707)) + (PORT datad (350:350:350) (465:465:465)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Mux0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (993:993:993) (923:923:923)) + (PORT datab (928:928:928) (877:877:877)) + (PORT datac (1148:1148:1148) (1069:1069:1069)) + (PORT datad (1275:1275:1275) (1239:1239:1239)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~0) + (DELAY + (ABSOLUTE + (PORT dataa (395:395:395) (523:523:523)) + (PORT datab (888:888:888) (788:788:788)) + (PORT datac (1486:1486:1486) (1370:1370:1370)) + (PORT datad (369:369:369) (468:468:468)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~1) + (DELAY + (ABSOLUTE + (PORT dataa (395:395:395) (523:523:523)) + (PORT datab (277:277:277) (302:302:302)) + (PORT datac (773:773:773) (696:696:696)) + (PORT datad (370:370:370) (470:470:470)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~2) + (DELAY + (ABSOLUTE + (PORT dataa (932:932:932) (941:941:941)) + (PORT datab (369:369:369) (470:470:470)) + (PORT datac (1111:1111:1111) (997:997:997)) + (PORT datad (238:238:238) (257:257:257)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (337:337:337) (421:421:421)) + (PORT datab (643:643:643) (658:658:658)) + (PORT datac (1220:1220:1220) (1194:1194:1194)) + (PORT datad (335:335:335) (438:438:438)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\~0) + (DELAY + (ABSOLUTE + (PORT datac (513:513:513) (554:554:554)) + (PORT datad (540:540:540) (561:561:561)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|WideOr5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1734:1734:1734) (1630:1630:1630)) + (PORT datad (1627:1627:1627) (1547:1547:1547)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (391:391:391) (494:494:494)) + (PORT datab (370:370:370) (453:453:453)) + (PORT datac (244:244:244) (275:275:275)) + (PORT datad (988:988:988) (986:986:986)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (448:448:448)) + (PORT datab (411:411:411) (519:519:519)) + (PORT datac (901:901:901) (900:900:900)) + (PORT datad (1137:1137:1137) (1084:1084:1084)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector21\~0) + (DELAY + (ABSOLUTE + (PORT dataa (390:390:390) (493:493:493)) + (PORT datab (284:284:284) (316:316:316)) + (PORT datac (328:328:328) (411:411:411)) + (PORT datad (322:322:322) (393:393:393)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (397:397:397) (525:525:525)) + (PORT datac (327:327:327) (430:430:430)) + (PORT datad (369:369:369) (468:468:468)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Add1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (398:398:398) (526:526:526)) + (PORT datab (372:372:372) (473:473:473)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (369:369:369) (468:468:468)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[3\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (292:292:292) (329:329:329)) + (PORT datad (293:293:293) (324:324:324)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT ena (1037:1037:1037) (1012:1012:1012)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (463:463:463)) + (PORT datab (369:369:369) (452:452:452)) + (PORT datac (329:329:329) (413:413:413)) + (PORT datad (330:330:330) (408:408:408)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE read_valid) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~0) + (DELAY + (ABSOLUTE + (PORT datac (245:245:245) (276:276:276)) + (PORT datad (247:247:247) (269:269:269)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1614:1614:1614) (1562:1562:1562)) + (PORT datab (1002:1002:1002) (983:983:983)) + (PORT datac (236:236:236) (261:261:261)) + (PORT datad (247:247:247) (272:272:272)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TMRD) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.IDLE\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1262:1262:1262) (1239:1239:1239)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (PORT ena (1080:1080:1080) (1064:1064:1064)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~3) + (DELAY + (ABSOLUTE + (PORT datab (937:937:937) (945:945:945)) + (PORT datad (962:962:962) (949:949:949)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~0) + (DELAY + (ABSOLUTE + (PORT dataa (569:569:569) (608:608:608)) + (PORT datab (575:575:575) (608:608:608)) + (PORT datac (914:914:914) (907:907:907)) + (PORT datad (923:923:923) (933:933:933)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~1) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (615:615:615)) + (PORT datab (369:369:369) (452:452:452)) + (PORT datac (311:311:311) (400:400:400)) + (PORT datad (330:330:330) (404:404:404)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~2) + (DELAY + (ABSOLUTE + (PORT dataa (354:354:354) (450:450:450)) + (PORT datab (368:368:368) (450:450:450)) + (PORT datac (320:320:320) (399:399:399)) + (PORT datad (329:329:329) (406:406:406)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~3) + (DELAY + (ABSOLUTE + (PORT dataa (844:844:844) (785:785:785)) + (PORT datab (873:873:873) (799:799:799)) + (PORT datac (940:940:940) (927:927:927)) + (PORT datad (239:239:239) (258:258:258)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (580:580:580) (610:610:610)) + (PORT datab (367:367:367) (450:450:450)) + (PORT datac (308:308:308) (397:397:397)) + (PORT datad (328:328:328) (401:401:401)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (447:447:447)) + (PORT datab (280:280:280) (305:305:305)) + (PORT datac (327:327:327) (411:411:411)) + (PORT datad (321:321:321) (392:392:392)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (430:430:430)) + (PORT datac (959:959:959) (952:952:952)) + (PORT datad (1282:1282:1282) (1257:1257:1257)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~2) + (DELAY + (ABSOLUTE + (PORT datac (449:449:449) (435:435:435)) + (PORT datad (313:313:313) (359:359:359)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT asdata (983:983:983) (1016:1016:1016)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (312:312:312) (400:400:400)) + (PORT datad (856:856:856) (810:810:810)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT asdata (1704:1704:1704) (1676:1676:1676)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (348:348:348) (439:439:439)) + (PORT datac (311:311:311) (399:399:399)) + (PORT datad (855:855:855) (809:809:809)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (1328:1328:1328) (1293:1293:1293)) + (PORT datab (1350:1350:1350) (1302:1302:1302)) + (PORT datac (1301:1301:1301) (1278:1278:1278)) + (PORT datad (255:255:255) (280:280:280)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datab (1320:1320:1320) (1297:1297:1297)) + (PORT datac (239:239:239) (265:265:265)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (951:951:951) (970:970:970)) + (PORT datab (968:968:968) (907:907:907)) + (PORT datad (969:969:969) (971:971:971)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datab (970:970:970) (910:910:910)) + (PORT datad (970:970:970) (972:972:972)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datab (354:354:354) (440:440:440)) + (PORT datac (322:322:322) (400:400:400)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT dataa (594:594:594) (632:632:632)) + (PORT datac (354:354:354) (440:440:440)) + (PORT datad (340:340:340) (421:421:421)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (1333:1333:1333) (1273:1273:1273)) + (PORT datac (330:330:330) (434:434:434)) + (PORT datad (257:257:257) (283:283:283)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (512:512:512) (551:551:551)) + (PORT datad (843:843:843) (794:794:794)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (958:958:958) (959:959:959)) + (PORT datab (943:943:943) (935:935:935)) + (PORT datac (501:501:501) (485:485:485)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT asdata (1737:1737:1737) (1682:1682:1682)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (2053:2053:2053) (1939:1939:1939)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (859:859:859) (858:858:858)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datac (331:331:331) (435:435:435)) + (PORT datad (258:258:258) (283:283:283)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (426:426:426)) + (PORT datac (313:313:313) (402:402:402)) + (PORT datad (526:526:526) (557:557:557)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datac (313:313:313) (402:402:402)) + (PORT datad (525:525:525) (557:557:557)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[15\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (PORT datab (360:360:360) (437:437:437)) + (PORT datac (320:320:320) (398:398:398)) + (PORT datad (320:320:320) (391:391:391)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (445:445:445)) + (PORT datab (359:359:359) (435:435:435)) + (PORT datac (319:319:319) (396:396:396)) + (PORT datad (509:509:509) (537:537:537)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (445:445:445)) + (PORT datab (358:358:358) (435:435:435)) + (PORT datac (318:318:318) (396:396:396)) + (PORT datad (320:320:320) (390:390:390)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (550:550:550) (589:589:589)) + (PORT datab (362:362:362) (439:439:439)) + (PORT datac (321:321:321) (399:399:399)) + (PORT datad (322:322:322) (392:392:392)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (282:282:282) (314:314:314)) + (PORT datab (276:276:276) (300:300:300)) + (PORT datac (239:239:239) (265:265:265)) + (PORT datad (831:831:831) (765:765:765)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE read_valid\~0) + (DELAY + (ABSOLUTE + (PORT dataa (863:863:863) (819:819:819)) + (PORT datab (838:838:838) (798:798:798)) + (PORT datac (937:937:937) (883:883:883)) + (PORT datad (322:322:322) (392:392:392)) + (IOPATH dataa combout (392:392:392) (407:407:407)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE read_valid\~1) + (DELAY + (ABSOLUTE + (PORT dataa (910:910:910) (863:863:863)) + (PORT datab (929:929:929) (864:864:864)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (605:605:605)) + (PORT datab (363:363:363) (440:440:440)) + (PORT datad (507:507:507) (489:489:489)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (634:634:634) (642:642:642)) + (PORT datab (400:400:400) (511:511:511)) + (PORT datac (361:361:361) (468:468:468)) + (PORT datad (309:309:309) (389:389:389)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (378:378:378) (468:468:468)) + (PORT datac (310:310:310) (401:401:401)) + (PORT datad (303:303:303) (376:376:376)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~2) + (DELAY + (ABSOLUTE + (PORT datab (279:279:279) (304:304:304)) + (PORT datac (348:348:348) (427:427:427)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (912:912:912) (923:923:923)) + (PORT datab (981:981:981) (963:963:963)) + (PORT datad (833:833:833) (777:777:777)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (435:435:435) (433:433:433)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (452:452:452)) + (PORT datab (353:353:353) (442:442:442)) + (PORT datac (312:312:312) (401:401:401)) + (PORT datad (312:312:312) (392:392:392)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT asdata (1997:1997:1997) (1917:1917:1917)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (PORT ena (2086:2086:2086) (1974:1974:1974)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (462:462:462)) + (PORT datab (1255:1255:1255) (1234:1234:1234)) + (PORT datad (1253:1253:1253) (1214:1214:1214)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (2163:2163:2163) (2083:2083:2083)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (584:584:584) (619:619:619)) + (PORT datab (570:570:570) (596:596:596)) + (PORT datad (331:331:331) (405:405:405)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (371:371:371) (461:461:461)) + (PORT datab (593:593:593) (620:620:620)) + (PORT datad (564:564:564) (581:581:581)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT datac (447:447:447) (431:431:431)) + (PORT datad (240:240:240) (259:259:259)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1271:1271:1271) (1244:1244:1244)) + (PORT datab (969:969:969) (963:963:963)) + (PORT datad (323:323:323) (393:393:393)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (556:556:556) (590:590:590)) + (PORT datab (360:360:360) (436:436:436)) + (PORT datad (330:330:330) (404:404:404)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (368:368:368) (458:458:458)) + (PORT datab (361:361:361) (438:438:438)) + (PORT datad (321:321:321) (392:392:392)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT datab (277:277:277) (302:302:302)) + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (814:814:814) (765:765:765)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~8) + (DELAY + (ABSOLUTE + (PORT dataa (1218:1218:1218) (1130:1130:1130)) + (PORT datab (1264:1264:1264) (1171:1171:1171)) + (PORT datac (1253:1253:1253) (1164:1164:1164)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (361:361:361) (445:445:445)) + (PORT datab (366:366:366) (449:449:449)) + (PORT datad (572:572:572) (592:592:592)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (647:647:647) (660:660:660)) + (PORT datab (368:368:368) (451:451:451)) + (PORT datad (338:338:338) (419:419:419)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (2530:2530:2530) (2385:2385:2385)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (PORT ena (1720:1720:1720) (1638:1638:1638)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (862:862:862) (772:772:772)) + (PORT datab (484:484:484) (468:468:468)) + (PORT datad (353:353:353) (427:427:427)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (395:395:395) (483:483:483)) + (PORT datab (626:626:626) (638:638:638)) + (PORT datad (564:564:564) (583:583:583)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (613:613:613)) + (PORT datab (386:386:386) (463:463:463)) + (PORT datad (560:560:560) (582:582:582)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (548:548:548) (515:515:515)) + (PORT datab (548:548:548) (586:586:586)) + (PORT datad (239:239:239) (258:258:258)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (333:333:333) (382:382:382)) + (PORT datac (780:780:780) (746:746:746)) + (PORT datad (855:855:855) (796:796:796)) + (IOPATH dataa combout (453:453:453) (446:446:446)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1358:1358:1358) (1307:1307:1307)) + (PORT datab (1780:1780:1780) (1689:1689:1689)) + (PORT datad (499:499:499) (523:523:523)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (550:550:550) (580:580:580)) + (PORT datab (947:947:947) (961:961:961)) + (PORT datad (1275:1275:1275) (1245:1245:1245)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1312:1312:1312) (1309:1309:1309)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (955:955:955) (923:923:923)) + (PORT datab (368:368:368) (451:451:451)) + (PORT datad (321:321:321) (391:391:391)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (279:279:279) (311:311:311)) + (PORT datab (976:976:976) (910:910:910)) + (PORT datad (515:515:515) (546:546:546)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1349:1349:1349) (1318:1318:1318)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (545:545:545) (584:584:584)) + (PORT datab (1039:1039:1039) (1008:1008:1008)) + (PORT datad (1278:1278:1278) (1236:1236:1236)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (372:372:372) (462:462:462)) + (PORT datab (320:320:320) (357:357:357)) + (PORT datac (337:337:337) (425:425:425)) + (PORT datad (338:338:338) (418:418:418)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (300:300:300) (384:384:384)) + (PORT datad (302:302:302) (378:378:378)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (574:574:574) (602:602:602)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (302:302:302) (386:386:386)) + (PORT datad (302:302:302) (379:379:379)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (343:343:343) (425:425:425)) + (PORT datac (302:302:302) (386:386:386)) + (PORT datad (302:302:302) (379:379:379)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~3) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (433:433:433)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (303:303:303) (380:380:380)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~4) + (DELAY + (ABSOLUTE + (PORT dataa (841:841:841) (789:789:789)) + (PORT datab (276:276:276) (300:300:300)) + (PORT datac (236:236:236) (261:261:261)) + (PORT datad (236:236:236) (254:254:254)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~5) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (435:435:435)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (303:303:303) (379:379:379)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~6) + (DELAY + (ABSOLUTE + (PORT dataa (573:573:573) (600:600:600)) + (PORT datab (341:341:341) (424:424:424)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (302:302:302) (378:378:378)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[8\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (901:901:901) (842:842:842)) + (PORT datab (837:837:837) (797:797:797)) + (PORT datac (859:859:859) (812:812:812)) + (PORT datad (849:849:849) (802:802:802)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[15\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (902:902:902) (842:842:842)) + (PORT datab (839:839:839) (799:799:799)) + (PORT datac (861:861:861) (813:813:813)) + (PORT datad (851:851:851) (803:803:803)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[15\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (552:552:552) (512:512:512)) + (PORT datab (1006:1006:1006) (986:986:986)) + (PORT datad (935:935:935) (923:923:923)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[14\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (980:980:980) (982:982:982)) + (PORT datab (486:486:486) (466:466:466)) + (PORT datad (943:943:943) (934:934:934)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[13\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (979:979:979) (980:980:980)) + (PORT datab (740:740:740) (682:682:682)) + (PORT datad (945:945:945) (936:936:936)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[12\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (979:979:979) (981:981:981)) + (PORT datab (540:540:540) (498:498:498)) + (PORT datad (944:944:944) (936:936:936)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[9\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (332:332:332) (381:381:381)) + (PORT datab (878:878:878) (805:805:805)) + (PORT datad (290:290:290) (317:317:317)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[11\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (381:381:381)) + (PORT datab (837:837:837) (790:790:790)) + (PORT datad (291:291:291) (319:319:319)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[10\]\~8) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (381:381:381)) + (PORT datab (828:828:828) (784:784:784)) + (PORT datad (291:291:291) (319:319:319)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[8\]\~9) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (381:381:381)) + (PORT datab (909:909:909) (833:833:833)) + (PORT datad (292:292:292) (319:319:319)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[7\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (974:974:974) (975:975:975)) + (PORT datab (543:543:543) (505:505:505)) + (PORT datad (950:950:950) (943:943:943)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[6\]\~11) + (DELAY + (ABSOLUTE + (PORT dataa (976:976:976) (977:977:977)) + (PORT datab (544:544:544) (507:507:507)) + (PORT datad (947:947:947) (940:940:940)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[5\]\~12) + (DELAY + (ABSOLUTE + (PORT dataa (977:977:977) (978:978:978)) + (PORT datab (489:489:489) (474:474:474)) + (PORT datad (947:947:947) (939:939:939)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[4\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (978:978:978) (979:979:979)) + (PORT datab (547:547:547) (510:510:510)) + (PORT datad (946:946:946) (938:938:938)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[3\]\~14) + (DELAY + (ABSOLUTE + (PORT dataa (492:492:492) (484:484:484)) + (PORT datab (1011:1011:1011) (993:993:993)) + (PORT datad (930:930:930) (916:916:916)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[2\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (554:554:554) (518:518:518)) + (PORT datab (1011:1011:1011) (993:993:993)) + (PORT datad (930:930:930) (917:917:917)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[1\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (492:492:492) (485:485:485)) + (PORT datab (1012:1012:1012) (995:995:995)) + (PORT datad (929:929:929) (915:915:915)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[0\]\~17) + (DELAY + (ABSOLUTE + (PORT dataa (978:978:978) (980:980:980)) + (PORT datab (548:548:548) (511:511:511)) + (PORT datad (945:945:945) (937:937:937)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1326:1326:1326) (1238:1238:1238)) + (PORT datab (1022:1022:1022) (1001:1001:1001)) + (PORT datad (569:569:569) (588:588:588)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (638:638:638) (653:653:653)) + (PORT datab (577:577:577) (606:606:606)) + (PORT datad (951:951:951) (933:933:933)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (907:907:907) (914:914:914)) + (PORT datab (588:588:588) (611:611:611)) + (PORT datac (901:901:901) (890:890:890)) + (PORT datad (878:878:878) (878:878:878)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (283:283:283) (316:316:316)) + (PORT datab (276:276:276) (301:301:301)) + (PORT datac (1650:1650:1650) (1527:1527:1527)) + (PORT datad (240:240:240) (258:258:258)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (899:899:899) (917:917:917)) + (PORT datab (987:987:987) (968:968:968)) + (PORT datad (320:320:320) (390:390:390)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb\|data_wire\[2\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (1912:1912:1912) (1751:1751:1751)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (875:875:875) (852:852:852)) + (PORT datab (1154:1154:1154) (1044:1044:1044)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (622:622:622) (632:632:632)) + (PORT datab (542:542:542) (574:574:574)) + (PORT datad (1623:1623:1623) (1547:1547:1547)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (535:535:535) (494:494:494)) + (PORT datab (279:279:279) (304:304:304)) + (PORT datac (446:446:446) (417:417:417)) + (PORT datad (298:298:298) (339:339:339)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1320:1320:1320) (1253:1253:1253)) + (PORT datab (366:366:366) (466:466:466)) + (PORT datad (909:909:909) (894:894:894)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (355:355:355) (449:449:449)) + (PORT datab (965:965:965) (948:948:948)) + (PORT datac (1383:1383:1383) (1333:1333:1333)) + (PORT datad (325:325:325) (414:414:414)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (370:370:370) (475:475:475)) + (PORT datab (368:368:368) (468:468:468)) + (PORT datac (888:888:888) (879:879:879)) + (PORT datad (881:881:881) (879:879:879)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (943:943:943) (872:872:872)) + (PORT datab (343:343:343) (386:386:386)) + (PORT datad (486:486:486) (459:459:459)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (906:906:906) (912:912:912)) + (PORT datab (553:553:553) (585:585:585)) + (PORT datad (542:542:542) (562:562:562)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (995:995:995) (971:971:971)) + (PORT datab (362:362:362) (439:439:439)) + (PORT datad (864:864:864) (838:838:838)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (369:369:369) (474:474:474)) + (PORT datab (981:981:981) (954:954:954)) + (PORT datad (874:874:874) (875:875:875)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (379:379:379) (472:472:472)) + (PORT datab (376:376:376) (466:466:466)) + (PORT datac (1231:1231:1231) (1184:1184:1184)) + (PORT datad (361:361:361) (441:441:441)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|rd_flag) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5995:5995:5995) (5789:5789:5789)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (447:447:447)) + (PORT datab (349:349:349) (438:438:438)) + (PORT datac (308:308:308) (398:398:398)) + (PORT datad (311:311:311) (391:391:391)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|cntr_cout\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1329:1329:1329) (1316:1316:1316)) + (PORT datab (922:922:922) (929:929:929)) + (PORT datac (477:477:477) (450:450:450)) + (PORT datad (304:304:304) (381:381:381)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (PORT ena (1757:1757:1757) (1679:1679:1679)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (435:435:435)) + (PORT datab (344:344:344) (426:426:426)) + (PORT datac (303:303:303) (387:387:387)) + (PORT datad (305:305:305) (382:382:382)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (343:343:343) (426:426:426)) + (PORT datac (303:303:303) (387:387:387)) + (PORT datad (304:304:304) (381:381:381)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (493:493:493) (471:471:471)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (302:302:302) (379:379:379)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|rd_flag\~0) + (DELAY + (ABSOLUTE + (PORT dataa (944:944:944) (882:882:882)) + (PORT datab (999:999:999) (985:985:985)) + (PORT datad (246:246:246) (271:271:271)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|bit_cnt\~1) + (DELAY + (ABSOLUTE + (PORT dataa (366:366:366) (464:464:464)) + (PORT datab (278:278:278) (303:303:303)) + (PORT datac (330:330:330) (432:432:432)) + (PORT datad (266:266:266) (302:302:302)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~13) + (DELAY + (ABSOLUTE + (PORT dataa (1237:1237:1237) (1198:1198:1198)) + (PORT datab (379:379:379) (469:469:469)) + (PORT datac (336:336:336) (426:426:426)) + (PORT datad (329:329:329) (407:407:407)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|work_en) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|start_nedge) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1860:1860:1860)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1851:1851:1851)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|work_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (1291:1291:1291) (1207:1207:1207)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always3\~0) + (DELAY + (ABSOLUTE + (PORT datab (345:345:345) (424:424:424)) + (PORT datad (321:321:321) (392:392:392)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (935:935:935) (945:945:945)) + (PORT datab (330:330:330) (363:363:363)) + (PORT datad (865:865:865) (859:859:859)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[7\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1504:1504:1504) (1434:1434:1434)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[7\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1180:1180:1180) (1142:1142:1142)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (323:323:323) (394:394:394)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (873:873:873) (870:870:870)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (542:542:542) (562:562:562)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE tx\~output) + (DELAY + (ABSOLUTE + (PORT i (2462:2462:2462) (2477:2477:2477)) + (IOPATH i o (3336:3336:3336) (3399:3399:3399)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_clk\~output) + (DELAY + (ABSOLUTE + (PORT i (1622:1622:1622) (1573:1573:1573)) + (IOPATH i o (3251:3251:3251) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_cas_n\~output) + (DELAY + (ABSOLUTE + (PORT i (2191:2191:2191) (2040:2040:2040)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ras_n\~output) + (DELAY + (ABSOLUTE + (PORT i (2334:2334:2334) (2117:2117:2117)) + (IOPATH i o (4708:4708:4708) (4746:4746:4746)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_we_n\~output) + (DELAY + (ABSOLUTE + (PORT i (2385:2385:2385) (2240:2240:2240)) + (IOPATH i o (3291:3291:3291) (3194:3194:3194)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ba\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3348:3348:3348) (3145:3145:3145)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ba\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3636:3636:3636) (3398:3398:3398)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2660:2660:2660) (2398:2398:2398)) + (IOPATH i o (3281:3281:3281) (3184:3184:3184)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2653:2653:2653) (2401:2401:2401)) + (IOPATH i o (3429:3429:3429) (3366:3366:3366)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[2\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2653:2653:2653) (2401:2401:2401)) + (IOPATH i o (3429:3429:3429) (3366:3366:3366)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[3\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3335:3335:3335) (3152:3152:3152)) + (IOPATH i o (3429:3429:3429) (3366:3366:3366)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[4\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3060:3060:3060) (2762:2762:2762)) + (IOPATH i o (3429:3429:3429) (3366:3366:3366)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[5\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3079:3079:3079) (2783:2783:2783)) + (IOPATH i o (3409:3409:3409) (3346:3346:3346)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[6\]\~output) + (DELAY + (ABSOLUTE + (PORT i (4466:4466:4466) (4181:4181:4181)) + (IOPATH i o (3409:3409:3409) (3346:3346:3346)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[7\]\~output) + (DELAY + (ABSOLUTE + (PORT i (4050:4050:4050) (3800:3800:3800)) + (IOPATH i o (3399:3399:3399) (3336:3336:3336)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[8\]\~output) + (DELAY + (ABSOLUTE + (PORT i (4473:4473:4473) (4187:4187:4187)) + (IOPATH i o (3409:3409:3409) (3346:3346:3346)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[9\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2666:2666:2666) (2508:2508:2508)) + (IOPATH i o (3399:3399:3399) (3336:3336:3336)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[10\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2685:2685:2685) (2509:2509:2509)) + (IOPATH i o (3291:3291:3291) (3194:3194:3194)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[11\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2666:2666:2666) (2508:2508:2508)) + (IOPATH i o (3409:3409:3409) (3346:3346:3346)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[12\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3225:3225:3225) (2988:2988:2988)) + (IOPATH i o (3399:3399:3399) (3336:3336:3336)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1550:1550:1550) (1417:1417:1417)) + (PORT oe (1648:1648:1648) (1586:1586:1586)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1491:1491:1491) (1367:1367:1367)) + (PORT oe (1648:1648:1648) (1586:1586:1586)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[2\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1577:1577:1577) (1450:1450:1450)) + (PORT oe (2036:2036:2036) (1919:1919:1919)) + (IOPATH i o (3231:3231:3231) (3134:3134:3134)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[3\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1113:1113:1113) (1003:1003:1003)) + (PORT oe (1252:1252:1252) (1208:1208:1208)) + (IOPATH i o (3261:3261:3261) (3164:3164:3164)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[4\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1135:1135:1135) (1030:1030:1030)) + (PORT oe (1252:1252:1252) (1208:1208:1208)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[5\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1522:1522:1522) (1395:1395:1395)) + (PORT oe (2036:2036:2036) (1919:1919:1919)) + (IOPATH i o (3251:3251:3251) (3154:3154:3154)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[6\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1541:1541:1541) (1413:1413:1413)) + (PORT oe (1648:1648:1648) (1586:1586:1586)) + (IOPATH i o (3281:3281:3281) (3184:3184:3184)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[7\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1200:1200:1200) (1108:1108:1108)) + (PORT oe (1648:1648:1648) (1586:1586:1586)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[8\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1637:1637:1637) (1534:1534:1534)) + (PORT oe (2662:2662:2662) (2485:2485:2485)) + (IOPATH i o (3409:3409:3409) (3346:3346:3346)) + (IOPATH oe o (3433:3433:3433) (3294:3294:3294)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[9\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1745:1745:1745) (1590:1590:1590)) + (PORT oe (2255:2255:2255) (2128:2128:2128)) + (IOPATH i o (3281:3281:3281) (3184:3184:3184)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[10\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2059:2059:2059) (1828:1828:1828)) + (PORT oe (1931:1931:1931) (1833:1833:1833)) + (IOPATH i o (3419:3419:3419) (3356:3356:3356)) + (IOPATH oe o (3433:3433:3433) (3294:3294:3294)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[11\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2200:2200:2200) (2043:2043:2043)) + (PORT oe (2276:2276:2276) (2145:2145:2145)) + (IOPATH i o (3399:3399:3399) (3336:3336:3336)) + (IOPATH oe o (3433:3433:3433) (3294:3294:3294)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[12\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1838:1838:1838) (1674:1674:1674)) + (PORT oe (2316:2316:2316) (2194:2194:2194)) + (IOPATH i o (3389:3389:3389) (3326:3326:3326)) + (IOPATH oe o (3433:3433:3433) (3294:3294:3294)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[13\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1495:1495:1495) (1364:1364:1364)) + (PORT oe (2323:2323:2323) (2202:2202:2202)) + (IOPATH i o (3399:3399:3399) (3336:3336:3336)) + (IOPATH oe o (3433:3433:3433) (3294:3294:3294)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[14\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1746:1746:1746) (1547:1547:1547)) + (PORT oe (2323:2323:2323) (2202:2202:2202)) + (IOPATH i o (4760:4760:4760) (4817:4817:4817)) + (IOPATH oe o (4805:4805:4805) (4785:4785:4785)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[15\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1655:1655:1655) (1474:1474:1474)) + (PORT oe (2323:2323:2323) (2202:2202:2202)) + (IOPATH i o (3291:3291:3291) (3218:3218:3218)) + (IOPATH oe o (3335:3335:3335) (3194:3194:3194)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (576:576:576) (609:609:609)) + (PORT datab (358:358:358) (434:434:434)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sys_clk\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (806:806:806) (852:852:852)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_pll") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|pll1) + (DELAY + (ABSOLUTE + (PORT areset (5286:5286:5286) (5286:5286:5286)) + (PORT inclk[0] (2340:2340:2340) (2340:2340:2340)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sys_rst_n\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (766:766:766) (812:812:812)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|pll_lock_sync) + (DELAY + (ABSOLUTE + (PORT clk (2135:2135:2135) (2190:2190:2190)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE rst_n\~0) + (DELAY + (ABSOLUTE + (PORT dataa (4719:4719:4719) (4925:4925:4925)) + (PORT datac (1430:1430:1430) (1466:1466:1466)) + (PORT datad (293:293:293) (362:362:362)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE rst_n\~0clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2483:2483:2483) (2391:2391:2391)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT datab (349:349:349) (435:435:435)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT dataa (354:354:354) (443:443:443)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (452:452:452)) + (PORT datab (588:588:588) (611:611:611)) + (PORT datac (312:312:312) (402:402:402)) + (PORT datad (314:314:314) (394:394:394)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (422:422:422)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (630:630:630) (636:636:636)) + (PORT datab (343:343:343) (427:427:427)) + (PORT datac (300:300:300) (384:384:384)) + (PORT datad (304:304:304) (381:381:381)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[9\]\~31) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (447:447:447)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[11\]\~35) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT datac (848:848:848) (818:818:818)) + (PORT datad (530:530:530) (558:558:558)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~3) + (DELAY + (ABSOLUTE + (PORT dataa (638:638:638) (647:647:647)) + (PORT datab (627:627:627) (636:636:636)) + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (534:534:534) (554:554:554)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (447:447:447)) + (PORT datab (475:475:475) (459:459:459)) + (PORT datac (483:483:483) (457:457:457)) + (PORT datad (237:237:237) (256:256:256)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (422:422:422)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (453:453:453)) + (PORT datab (589:589:589) (612:612:612)) + (PORT datac (312:312:312) (402:402:402)) + (PORT datad (314:314:314) (394:394:394)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (449:449:449)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (574:574:574) (613:613:613)) + (PORT datab (625:625:625) (633:633:633)) + (PORT datac (848:848:848) (817:817:817)) + (PORT datad (533:533:533) (552:552:552)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (544:544:544) (504:504:504)) + (PORT datab (534:534:534) (496:496:496)) + (PORT datac (577:577:577) (599:599:599)) + (PORT datad (240:240:240) (258:258:258)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (430:430:430)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (345:345:345) (427:427:427)) + (PORT datac (304:304:304) (388:388:388)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (461:461:461)) + (PORT datab (305:305:305) (343:343:343)) + (PORT datac (327:327:327) (429:429:429)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_flag) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_flag) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (1718:1718:1718) (1681:1681:1681)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (365:365:365) (465:465:465)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a0) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (PORT ena (2467:2467:2467) (2319:2319:2319)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (463:463:463)) + (PORT datab (2041:2041:2041) (1890:1890:1890)) + (PORT datad (561:561:561) (599:599:599)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (604:604:604) (653:653:653)) + (PORT datab (378:378:378) (467:467:467)) + (PORT datac (318:318:318) (414:414:414)) + (PORT datad (1679:1679:1679) (1566:1566:1566)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (236:236:236) (255:255:255)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (322:322:322) (360:360:360)) + (PORT datad (558:558:558) (589:589:589)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (598:598:598) (645:645:645)) + (PORT datab (380:380:380) (470:470:470)) + (PORT datac (354:354:354) (453:453:453)) + (PORT datad (560:560:560) (592:592:592)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (PORT ena (2467:2467:2467) (2319:2319:2319)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (521:521:521) (498:498:498)) + (PORT datab (397:397:397) (493:493:493)) + (PORT datad (557:557:557) (588:588:588)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (384:384:384) (480:480:480)) + (PORT datab (323:323:323) (361:361:361)) + (PORT datac (352:352:352) (451:451:451)) + (PORT datad (330:330:330) (403:403:403)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5\~0) + (DELAY + (ABSOLUTE + (PORT datad (822:822:822) (761:761:761)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (409:409:409) (521:521:521)) + (PORT datad (819:819:819) (773:773:773)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT dataa (949:949:949) (950:950:950)) + (PORT datab (369:369:369) (467:467:467)) + (PORT datac (364:364:364) (472:472:472)) + (PORT datad (357:357:357) (447:447:447)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (398:398:398) (497:497:497)) + (PORT datab (367:367:367) (465:465:465)) + (PORT datac (364:364:364) (472:472:472)) + (PORT datad (819:819:819) (773:773:773)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (432:432:432) (405:405:405)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (398:398:398) (497:497:497)) + (PORT datab (368:368:368) (466:466:466)) + (PORT datac (362:362:362) (469:469:469)) + (PORT datad (818:818:818) (772:772:772)) + (IOPATH dataa combout (392:392:392) (407:407:407)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10\~0) + (DELAY + (ABSOLUTE + (PORT datab (375:375:375) (469:469:469)) + (PORT datad (457:457:457) (426:426:426)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (498:498:498) (478:478:478)) + (PORT datad (333:333:333) (424:424:424)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT datab (372:372:372) (465:465:465)) + (PORT datac (311:311:311) (402:402:402)) + (PORT datad (790:790:790) (780:780:780)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1306:1306:1306) (1246:1246:1246)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT datab (338:338:338) (416:416:416)) + (PORT datac (898:898:898) (891:891:891)) + (PORT datad (1121:1121:1121) (1075:1075:1075)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|parity9) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (PORT ena (2467:2467:2467) (2319:2319:2319)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (601:601:601) (649:649:649)) + (PORT datab (376:376:376) (465:465:465)) + (PORT datac (317:317:317) (412:412:412)) + (PORT datad (1677:1677:1677) (1565:1565:1565)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (382:382:382) (478:478:478)) + (PORT datab (322:322:322) (360:360:360)) + (PORT datac (351:351:351) (450:450:450)) + (PORT datad (329:329:329) (403:403:403)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (410:410:410) (523:523:523)) + (PORT datab (860:860:860) (816:816:816)) + (PORT datad (356:356:356) (446:446:446)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (778:778:778) (859:859:859)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1306:1306:1306) (1246:1246:1246)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT datab (354:354:354) (449:449:449)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (431:431:431)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (432:432:432)) + (PORT datab (341:341:341) (423:423:423)) + (PORT datac (300:300:300) (384:384:384)) + (PORT datad (302:302:302) (378:378:378)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (467:467:467)) + (PORT datab (361:361:361) (458:458:458)) + (PORT datac (320:320:320) (414:414:414)) + (PORT datad (322:322:322) (405:405:405)) + (IOPATH dataa combout (392:392:392) (407:407:407)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~8) + (DELAY + (ABSOLUTE + (PORT dataa (876:876:876) (867:867:867)) + (PORT datab (589:589:589) (622:622:622)) + (PORT datac (501:501:501) (510:510:510)) + (PORT datad (498:498:498) (472:472:472)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (333:333:333) (425:425:425)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1306:1306:1306) (1246:1246:1246)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (991:991:991) (1016:1016:1016)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[8\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1148:1148:1148) (1098:1098:1098)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (789:789:789) (779:779:779)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1306:1306:1306) (1246:1246:1246)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (332:332:332) (406:406:406)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1283:1283:1283) (1215:1215:1215)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (322:322:322) (393:393:393)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1145:1145:1145) (1104:1104:1104)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (606:606:606) (617:617:617)) + (PORT datab (341:341:341) (423:423:423)) + (PORT datac (309:309:309) (398:398:398)) + (PORT datad (521:521:521) (553:553:553)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (358:358:358) (448:448:448)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (2366:2366:2366) (2261:2261:2261)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT asdata (1242:1242:1242) (1212:1212:1212)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (437:437:437)) + (PORT datab (295:295:295) (332:332:332)) + (PORT datac (312:312:312) (402:402:402)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (1372:1372:1372) (1359:1359:1359)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1256:1256:1256) (1213:1213:1213)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (332:332:332) (406:406:406)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (433:433:433)) + (PORT datab (295:295:295) (331:331:331)) + (PORT datac (312:312:312) (402:402:402)) + (PORT datad (294:294:294) (363:363:363)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (296:296:296) (334:334:334)) + (PORT datad (1292:1292:1292) (1256:1256:1256)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT asdata (803:803:803) (886:886:886)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (PORT ena (2467:2467:2467) (2319:2319:2319)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1705:1705:1705) (1625:1625:1625)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT asdata (821:821:821) (912:912:912)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (PORT ena (2467:2467:2467) (2319:2319:2319)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT asdata (1711:1711:1711) (1670:1670:1670)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (405:405:405) (502:502:502)) + (PORT datab (361:361:361) (437:437:437)) + (PORT datad (1289:1289:1289) (1253:1253:1253)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (403:403:403) (500:500:500)) + (PORT datab (294:294:294) (332:332:332)) + (PORT datac (321:321:321) (399:399:399)) + (PORT datad (1291:1291:1291) (1254:1254:1254)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5\~0) + (DELAY + (ABSOLUTE + (PORT datad (824:824:824) (767:767:767)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (827:827:827) (926:926:926)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT asdata (1943:1943:1943) (1841:1841:1841)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (984:984:984) (974:974:974)) + (PORT datab (384:384:384) (461:461:461)) + (PORT datad (328:328:328) (402:402:402)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT datad (364:364:364) (445:445:445)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (PORT ena (1757:1757:1757) (1679:1679:1679)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (662:662:662) (668:668:668)) + (PORT datab (379:379:379) (470:470:470)) + (PORT datad (964:964:964) (921:921:921)) + (IOPATH dataa combout (405:405:405) (407:407:407)) + (IOPATH datab combout (410:410:410) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (1169:1169:1169) (1119:1119:1119)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT asdata (2501:2501:2501) (2388:2388:2388)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (552:552:552) (590:590:590)) + (PORT datab (1313:1313:1313) (1280:1280:1280)) + (PORT datad (1287:1287:1287) (1255:1255:1255)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1235:1235:1235) (1166:1166:1166)) + (PORT datab (278:278:278) (304:304:304)) + (PORT datac (1178:1178:1178) (1083:1083:1083)) + (PORT datad (237:237:237) (255:255:255)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1685:1685:1685) (1617:1617:1617)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT asdata (2051:2051:2051) (1920:1920:1920)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (2053:2053:2053) (1939:1939:1939)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (889:889:889) (852:852:852)) + (PORT datab (841:841:841) (817:817:817)) + (PORT datad (1261:1261:1261) (1212:1212:1212)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (1991:1991:1991) (1909:1909:1909)) + (PORT datab (628:628:628) (636:636:636)) + (PORT datad (516:516:516) (536:536:536)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (1254:1254:1254) (1177:1177:1177)) + (PORT datac (1192:1192:1192) (1090:1090:1090)) + (PORT datad (1865:1865:1865) (1684:1684:1684)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~8) + (DELAY + (ABSOLUTE + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (487:487:487) (460:460:460)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1738:1738:1738) (1676:1676:1676)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (380:380:380) (473:473:473)) + (PORT datab (976:976:976) (960:960:960)) + (PORT datad (1553:1553:1553) (1445:1445:1445)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1391:1391:1391) (1386:1386:1386)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (794:794:794) (888:888:888)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (1260:1260:1260) (1227:1227:1227)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (487:487:487) (475:475:475)) + (PORT datab (279:279:279) (305:305:305)) + (PORT datad (886:886:886) (882:882:882)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (909:909:909) (912:912:912)) + (PORT datab (360:360:360) (437:437:437)) + (PORT datad (1175:1175:1175) (1138:1138:1138)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (313:313:313)) + (PORT datab (277:277:277) (303:303:303)) + (PORT datad (870:870:870) (877:877:877)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT datab (1169:1169:1169) (1068:1068:1068)) + (PORT datac (779:779:779) (726:726:726)) + (PORT datad (1194:1194:1194) (1114:1114:1114)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|valid_rdreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1561:1561:1561) (1410:1410:1410)) + (PORT datab (1614:1614:1614) (1540:1540:1540)) + (PORT datac (798:798:798) (776:776:776)) + (PORT datad (1245:1245:1245) (1176:1176:1176)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT asdata (2446:2446:2446) (2316:2316:2316)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (2053:2053:2053) (1939:1939:1939)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6\~0) + (DELAY + (ABSOLUTE + (PORT datab (303:303:303) (344:344:344)) + (PORT datad (1309:1309:1309) (1266:1266:1266)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1631:1631:1631) (1569:1569:1569)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (369:369:369) (474:474:474)) + (PORT datab (577:577:577) (606:606:606)) + (PORT datac (321:321:321) (399:399:399)) + (PORT datad (545:545:545) (567:567:567)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (1327:1327:1327) (1265:1265:1265)) + (PORT datab (364:364:364) (463:463:463)) + (PORT datac (321:321:321) (399:399:399)) + (PORT datad (253:253:253) (277:277:277)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (340:340:340) (429:429:429)) + (PORT datad (1151:1151:1151) (1048:1048:1048)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (1991:1991:1991) (1909:1909:1909)) + (PORT datac (337:337:337) (426:426:426)) + (PORT datad (1150:1150:1150) (1047:1047:1047)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (571:571:571) (590:590:590)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (1625:1625:1625) (1569:1569:1569)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (888:888:888) (884:884:884)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (515:515:515) (544:544:544)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (957:957:957) (958:958:958)) + (PORT datab (942:942:942) (934:934:934)) + (PORT datac (500:500:500) (484:484:484)) + (PORT datad (887:887:887) (876:876:876)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (1292:1292:1292) (1239:1239:1239)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (2053:2053:2053) (1939:1939:1939)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT asdata (1767:1767:1767) (1710:1710:1710)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (2053:2053:2053) (1939:1939:1939)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (1989:1989:1989) (1906:1906:1906)) + (PORT datab (590:590:590) (613:613:613)) + (PORT datac (338:338:338) (427:427:427)) + (PORT datad (1151:1151:1151) (1048:1048:1048)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (864:864:864) (867:867:867)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (334:334:334) (417:417:417)) + (PORT datab (966:966:966) (938:938:938)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab cout (565:565:565) (421:421:421)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1589:1589:1589) (1501:1501:1501)) + (PORT datab (934:934:934) (920:920:920)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~6) + (DELAY + (ABSOLUTE + (PORT dataa (940:940:940) (925:925:925)) + (PORT datab (931:931:931) (932:932:932)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~8) + (DELAY + (ABSOLUTE + (PORT dataa (952:952:952) (921:921:921)) + (PORT datab (839:839:839) (807:807:807)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~10) + (DELAY + (ABSOLUTE + (PORT dataa (863:863:863) (860:860:860)) + (PORT datab (866:866:866) (829:829:829)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datab (355:355:355) (441:441:441)) + (PORT datac (254:254:254) (294:294:294)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~12) + (DELAY + (ABSOLUTE + (PORT dataa (806:806:806) (785:785:785)) + (PORT datab (854:854:854) (821:821:821)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~14) + (DELAY + (ABSOLUTE + (PORT dataa (544:544:544) (574:574:574)) + (PORT datab (805:805:805) (783:783:783)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|LessThan2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (282:282:282) (314:314:314)) + (PORT datab (278:278:278) (303:303:303)) + (PORT datac (238:238:238) (265:265:265)) + (PORT datad (240:240:240) (258:258:258)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|LessThan2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (281:281:281) (313:313:313)) + (PORT datab (277:277:277) (302:302:302)) + (PORT datac (237:237:237) (264:264:264)) + (PORT datad (237:237:237) (256:256:256)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT dataa (1372:1372:1372) (1315:1315:1315)) + (PORT datab (982:982:982) (970:970:970)) + (PORT datac (260:260:260) (304:304:304)) + (PORT datad (920:920:920) (901:901:901)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9\~0) + (DELAY + (ABSOLUTE + (PORT datab (287:287:287) (316:316:316)) + (PORT datad (330:330:330) (407:407:407)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1366:1366:1366) (1359:1359:1359)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datac (339:339:339) (430:430:430)) + (PORT datad (330:330:330) (426:426:426)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (479:479:479)) + (PORT datac (338:338:338) (428:428:428)) + (PORT datad (550:550:550) (572:572:572)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~18) + (DELAY + (ABSOLUTE + (PORT dataa (598:598:598) (611:611:611)) + (PORT datad (793:793:793) (773:773:773)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_wr_req\~0) + (DELAY + (ABSOLUTE + (PORT dataa (2267:2267:2267) (2132:2132:2132)) + (PORT datab (302:302:302) (326:326:326)) + (PORT datac (265:265:265) (290:290:290)) + (PORT datad (266:266:266) (283:283:283)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_wr_req) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (846:846:846) (840:840:840)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (PORT ena (1139:1139:1139) (1151:1151:1151)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (851:851:851) (845:845:845)) + (PORT datab (337:337:337) (384:384:384)) + (PORT datad (552:552:552) (579:579:579)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~11) + (DELAY + (ABSOLUTE + (PORT dataa (1730:1730:1730) (1656:1656:1656)) + (PORT datab (1737:1737:1737) (1662:1662:1662)) + (PORT datac (949:949:949) (928:928:928)) + (PORT datad (2095:2095:2095) (1988:1988:1988)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (309:309:309) (358:358:358)) + (PORT datab (387:387:387) (473:473:473)) + (PORT datad (322:322:322) (393:393:393)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (933:933:933) (916:916:916)) + (PORT datab (1720:1720:1720) (1630:1630:1630)) + (PORT datac (905:905:905) (880:880:880)) + (PORT datad (833:833:833) (827:827:827)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (372:372:372) (463:463:463)) + (PORT datab (320:320:320) (357:357:357)) + (PORT datac (337:337:337) (426:426:426)) + (PORT datad (338:338:338) (419:419:419)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (827:827:827) (766:766:766)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1876:1876:1876)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1867:1867:1867)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (849:849:849) (807:807:807)) + (PORT datad (342:342:342) (427:427:427)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1876:1876:1876)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1867:1867:1867)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (849:849:849) (806:806:806)) + (PORT datab (384:384:384) (471:471:471)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1876:1876:1876)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1867:1867:1867)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT datab (378:378:378) (465:465:465)) + (PORT datac (331:331:331) (414:414:414)) + (PORT datad (331:331:331) (408:408:408)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1876:1876:1876)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1867:1867:1867)) + (PORT ena (1742:1742:1742) (1651:1651:1651)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT datab (337:337:337) (414:414:414)) + (PORT datac (295:295:295) (373:373:373)) + (PORT datad (1299:1299:1299) (1243:1243:1243)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|parity6) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (464:464:464)) + (PORT datab (343:343:343) (392:392:392)) + (PORT datac (800:800:800) (791:791:791)) + (PORT datad (544:544:544) (571:571:571)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (561:561:561) (607:607:607)) + (PORT datab (593:593:593) (620:620:620)) + (PORT datac (264:264:264) (309:309:309)) + (PORT datad (345:345:345) (429:429:429)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5\~0) + (DELAY + (ABSOLUTE + (PORT datab (278:278:278) (303:303:303)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (514:514:514) (501:501:501)) + (PORT datab (378:378:378) (462:462:462)) + (PORT datad (545:545:545) (574:574:574)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (918:918:918) (858:858:858)) + (PORT datab (925:925:925) (934:934:934)) + (PORT datad (340:340:340) (421:421:421)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (599:599:599) (630:630:630)) + (PORT datab (970:970:970) (978:978:978)) + (PORT datac (2000:2000:2000) (1888:1888:1888)) + (PORT datad (855:855:855) (827:827:827)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT datab (357:357:357) (447:447:447)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|rd_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (587:587:587) (645:645:645)) + (PORT datab (1212:1212:1212) (1182:1182:1182)) + (PORT datad (265:265:265) (297:297:297)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|rd_en) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT dataa (361:361:361) (453:453:453)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (465:465:465)) + (PORT datac (320:320:320) (414:414:414)) + (PORT datad (322:322:322) (405:405:405)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (376:376:376) (465:465:465)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (423:423:423)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (422:422:422)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (370:370:370) (450:450:450)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT dataa (374:374:374) (462:462:462)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~3) + (DELAY + (ABSOLUTE + (PORT datac (903:903:903) (903:903:903)) + (PORT datad (956:956:956) (947:947:947)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~5) + (DELAY + (ABSOLUTE + (PORT dataa (943:943:943) (903:903:903)) + (PORT datab (1046:1046:1046) (1032:1032:1032)) + (PORT datac (858:858:858) (814:814:814)) + (PORT datad (895:895:895) (852:852:852)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT datab (638:638:638) (651:651:651)) + (PORT datad (479:479:479) (462:462:462)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_CL) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1296:1296:1296) (1179:1179:1179)) + (PORT datab (370:370:370) (453:453:453)) + (PORT datad (478:478:478) (462:462:462)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_DATA) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (PORT datab (340:340:340) (423:423:423)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (301:301:301) (378:378:378)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~3) + (DELAY + (ABSOLUTE + (PORT dataa (938:938:938) (877:877:877)) + (PORT datab (957:957:957) (903:903:903)) + (PORT datac (349:349:349) (449:449:449)) + (PORT datad (870:870:870) (842:842:842)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_PRE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT datab (519:519:519) (506:506:506)) + (PORT datad (539:539:539) (561:561:561)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|trp_end\~1) + (DELAY + (ABSOLUTE + (PORT datab (556:556:556) (521:521:521)) + (PORT datac (581:581:581) (597:597:597)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_END) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (2564:2564:2564) (2442:2442:2442)) + (PORT datab (344:344:344) (427:427:427)) + (PORT datad (546:546:546) (593:593:593)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (2563:2563:2563) (2441:2441:2441)) + (PORT datab (345:345:345) (429:429:429)) + (PORT datad (305:305:305) (378:378:378)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_ACTIVE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT datab (556:556:556) (593:593:593)) + (PORT datad (478:478:478) (462:462:462)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_TRCD) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|trcd_end\~1) + (DELAY + (ABSOLUTE + (PORT datab (628:628:628) (635:635:635)) + (PORT datad (494:494:494) (470:470:470)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_READ) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (586:586:586) (643:643:643)) + (PORT datab (360:360:360) (436:436:436)) + (PORT datad (302:302:302) (375:375:375)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~2) + (DELAY + (ABSOLUTE + (PORT dataa (360:360:360) (462:462:462)) + (PORT datab (374:374:374) (463:463:463)) + (PORT datac (315:315:315) (408:408:408)) + (PORT datad (317:317:317) (400:400:400)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~4) + (DELAY + (ABSOLUTE + (PORT dataa (508:508:508) (497:497:497)) + (PORT datab (307:307:307) (332:332:332)) + (PORT datac (327:327:327) (412:412:412)) + (PORT datad (328:328:328) (405:405:405)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (PORT datab (362:362:362) (439:439:439)) + (PORT datac (531:531:531) (553:553:553)) + (PORT datad (988:988:988) (986:986:986)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (939:939:939) (899:899:899)) + (PORT datab (908:908:908) (851:851:851)) + (PORT datac (450:450:450) (427:427:427)) + (PORT datad (897:897:897) (854:854:854)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~3) + (DELAY + (ABSOLUTE + (PORT dataa (931:931:931) (943:943:943)) + (PORT datab (1220:1220:1220) (1113:1113:1113)) + (PORT datac (266:266:266) (293:293:293)) + (PORT datad (816:816:816) (753:753:753)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_ack\~1) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (464:464:464)) + (PORT datab (376:376:376) (466:466:466)) + (PORT datac (320:320:320) (414:414:414)) + (PORT datad (322:322:322) (405:405:405)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~1) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (862:862:862) (806:806:806)) + (PORT datac (483:483:483) (460:460:460)) + (PORT datad (858:858:858) (814:814:814)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (335:335:335) (383:383:383)) + (PORT datab (396:396:396) (494:494:494)) + (PORT datad (951:951:951) (932:932:932)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (290:290:290) (330:330:330)) + (PORT datab (398:398:398) (497:497:497)) + (PORT datad (364:364:364) (449:449:449)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (405:405:405) (492:492:492)) + (PORT datad (256:256:256) (285:285:285)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (609:609:609) (645:645:645)) + (PORT datab (370:370:370) (454:454:454)) + (PORT datac (346:346:346) (444:444:444)) + (PORT datad (251:251:251) (279:279:279)) + (IOPATH dataa combout (392:392:392) (407:407:407)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (598:598:598) (629:629:629)) + (PORT datab (970:970:970) (978:978:978)) + (PORT datac (813:813:813) (750:750:750)) + (PORT datad (854:854:854) (826:826:826)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (658:658:658) (678:678:678)) + (PORT datad (247:247:247) (269:269:269)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (657:657:657) (677:677:677)) + (PORT datad (248:248:248) (270:270:270)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (660:660:660) (680:680:680)) + (PORT datac (331:331:331) (414:414:414)) + (PORT datad (537:537:537) (564:564:564)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT dataa (391:391:391) (493:493:493)) + (PORT datab (405:405:405) (492:492:492)) + (PORT datac (363:363:363) (453:453:453)) + (PORT datad (356:356:356) (451:451:451)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1135:1135:1135) (1146:1146:1146)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT datab (337:337:337) (413:413:413)) + (PORT datac (296:296:296) (374:374:374)) + (PORT datad (844:844:844) (839:839:839)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|parity9) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT datad (951:951:951) (932:932:932)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a0) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1135:1135:1135) (1146:1146:1146)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (379:379:379)) + (PORT datab (396:396:396) (494:494:494)) + (PORT datac (562:562:562) (591:591:591)) + (PORT datad (949:949:949) (929:929:929)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (389:389:389) (490:490:490)) + (PORT datab (297:297:297) (329:329:329)) + (PORT datad (571:571:571) (598:598:598)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (292:292:292) (332:332:332)) + (PORT datab (405:405:405) (493:493:493)) + (PORT datac (360:360:360) (451:451:451)) + (PORT datad (358:358:358) (453:453:453)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (390:390:390) (491:491:491)) + (PORT datab (369:369:369) (452:452:452)) + (PORT datad (240:240:240) (259:259:259)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (921:921:921) (861:861:861)) + (PORT datad (883:883:883) (890:890:890)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (1021:1021:1021) (1040:1040:1040)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1352:1352:1352) (1327:1327:1327)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (2086:2086:2086) (1993:1993:1993)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (PORT ena (1720:1720:1720) (1638:1638:1638)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1562:1562:1562) (1479:1479:1479)) + (PORT datab (368:368:368) (452:452:452)) + (PORT datad (319:319:319) (389:389:389)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (794:794:794) (869:869:869)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1369:1369:1369) (1347:1347:1347)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~0) + (DELAY + (ABSOLUTE + (PORT datab (380:380:380) (463:463:463)) + (PORT datac (882:882:882) (879:879:879)) + (PORT datad (355:355:355) (429:429:429)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~1) + (DELAY + (ABSOLUTE + (PORT dataa (922:922:922) (863:863:863)) + (PORT datad (240:240:240) (258:258:258)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (1062:1062:1062) (1085:1085:1085)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1336:1336:1336) (1314:1314:1314)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1412:1412:1412) (1348:1348:1348)) + (PORT datab (1382:1382:1382) (1317:1317:1317)) + (PORT datad (812:812:812) (777:777:777)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (311:311:311)) + (PORT datab (277:277:277) (302:302:302)) + (PORT datac (930:930:930) (878:878:878)) + (PORT datad (237:237:237) (256:256:256)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (1213:1213:1213) (1102:1102:1102)) + (PORT datab (341:341:341) (388:388:388)) + (PORT datac (338:338:338) (426:426:426)) + (PORT datad (805:805:805) (745:745:745)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (1441:1441:1441) (1405:1405:1405)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1293:1293:1293) (1224:1224:1224)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (2168:2168:2168) (2075:2075:2075)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (534:534:534) (557:557:557)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1293:1293:1293) (1224:1224:1224)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (1769:1769:1769) (1738:1738:1738)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1679:1679:1679) (1618:1618:1618)) + (PORT datab (854:854:854) (816:816:816)) + (PORT datad (1321:1321:1321) (1278:1278:1278)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (932:932:932) (937:937:937)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (1726:1726:1726) (1674:1674:1674)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (2464:2464:2464) (2342:2342:2342)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (1438:1438:1438) (1429:1429:1429)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1642:1642:1642) (1599:1599:1599)) + (PORT datab (1950:1950:1950) (1833:1833:1833)) + (PORT datad (296:296:296) (366:366:366)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (1713:1713:1713) (1587:1587:1587)) + (PORT datac (456:456:456) (430:430:430)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (2093:2093:2093) (1986:1986:1986)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (567:567:567) (584:584:584)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1293:1293:1293) (1224:1224:1224)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (1746:1746:1746) (1717:1717:1717)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdempty_eq_comp_lsb\|data_wire\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datac (1342:1342:1342) (1286:1286:1286)) + (PORT datad (837:837:837) (827:827:827)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (1401:1401:1401) (1374:1374:1374)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1293:1293:1293) (1224:1224:1224)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (2161:2161:2161) (2076:2076:2076)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (1352:1352:1352) (1302:1302:1302)) + (PORT datab (277:277:277) (302:302:302)) + (PORT datad (1653:1653:1653) (1538:1538:1538)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (2154:2154:2154) (2068:2068:2068)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (1322:1322:1322) (1305:1305:1305)) + (PORT datab (1713:1713:1713) (1656:1656:1656)) + (PORT datad (297:297:297) (367:367:367)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (858:858:858) (770:770:770)) + (PORT datab (279:279:279) (305:305:305)) + (PORT datac (239:239:239) (265:265:265)) + (PORT datad (240:240:240) (259:259:259)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_en_dly) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1868:1868:1868)) + (PORT asdata (788:788:788) (858:858:858)) + (PORT clrn (5995:5995:5995) (5789:5789:5789)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|valid_wreq) + (DELAY + (ABSOLUTE + (PORT dataa (350:350:350) (444:444:444)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (PORT datab (956:956:956) (934:934:934)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (433:433:433)) + (PORT datab (359:359:359) (450:450:450)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (430:430:430)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~6) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (426:426:426)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|bit_cnt\~0) + (DELAY + (ABSOLUTE + (PORT datab (362:362:362) (454:454:454)) + (PORT datac (237:237:237) (264:264:264)) + (PORT datad (258:258:258) (288:288:288)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (881:881:881) (855:855:855)) + (PORT datab (341:341:341) (422:422:422)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (352:352:352) (434:434:434)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (422:422:422)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (424:424:424)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (PORT datab (344:344:344) (426:426:426)) + (PORT datac (300:300:300) (384:384:384)) + (PORT datad (304:304:304) (381:381:381)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (908:908:908) (903:903:903)) + (PORT datab (638:638:638) (646:646:646)) + (PORT datac (545:545:545) (577:577:577)) + (PORT datad (894:894:894) (882:882:882)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT datab (350:350:350) (438:438:438)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT datad (509:509:509) (540:540:540)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~3) + (DELAY + (ABSOLUTE + (PORT dataa (555:555:555) (515:515:515)) + (PORT datab (556:556:556) (523:523:523)) + (PORT datac (237:237:237) (263:263:263)) + (PORT datad (527:527:527) (559:559:559)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT datab (359:359:359) (436:436:436)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (908:908:908) (903:903:903)) + (PORT datab (638:638:638) (647:647:647)) + (PORT datac (546:546:546) (578:578:578)) + (PORT datad (895:895:895) (883:883:883)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (497:497:497) (490:490:490)) + (PORT datab (277:277:277) (302:302:302)) + (PORT datac (507:507:507) (488:488:488)) + (PORT datad (526:526:526) (559:559:559)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|bit_cnt\~1) + (DELAY + (ABSOLUTE + (PORT datab (299:299:299) (331:331:331)) + (PORT datac (320:320:320) (416:416:416)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|always5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (345:345:345) (428:428:428)) + (PORT datac (300:300:300) (384:384:384)) + (PORT datad (304:304:304) (381:381:381)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|always5\~1) + (DELAY + (ABSOLUTE + (PORT datac (320:320:320) (416:416:416)) + (PORT datad (259:259:259) (289:289:289)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|rd_en) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~1) + (DELAY + (ABSOLUTE + (PORT dataa (913:913:913) (924:924:924)) + (PORT datab (982:982:982) (965:965:965)) + (PORT datac (948:948:948) (946:946:946)) + (PORT datad (918:918:918) (930:930:930)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~0) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (450:450:450)) + (PORT datac (526:526:526) (561:561:561)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~2) + (DELAY + (ABSOLUTE + (PORT dataa (904:904:904) (837:837:837)) + (PORT datab (278:278:278) (303:303:303)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~4) + (DELAY + (ABSOLUTE + (PORT dataa (816:816:816) (738:738:738)) + (PORT datad (919:919:919) (929:929:929)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (566:566:566) (604:604:604)) + (PORT datab (577:577:577) (611:611:611)) + (PORT datac (309:309:309) (399:399:399)) + (PORT datad (919:919:919) (929:929:929)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (790:790:790) (861:861:861)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (1021:1021:1021) (1029:1029:1029)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (591:591:591) (628:628:628)) + (PORT datab (379:379:379) (462:462:462)) + (PORT datac (321:321:321) (399:399:399)) + (PORT datad (563:563:563) (582:582:582)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (948:948:948) (966:966:966)) + (PORT datab (1028:1028:1028) (1018:1018:1018)) + (PORT datac (967:967:967) (967:967:967)) + (PORT datad (909:909:909) (860:860:860)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (1300:1300:1300) (1278:1278:1278)) + (PORT datad (255:255:255) (281:281:281)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (1329:1329:1329) (1294:1294:1294)) + (PORT datac (1301:1301:1301) (1278:1278:1278)) + (PORT datad (255:255:255) (281:281:281)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (1414:1414:1414) (1385:1385:1385)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1285:1285:1285) (1241:1241:1241)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1270:1270:1270) (1242:1242:1242)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1618:1618:1618) (1524:1524:1524)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (PORT ena (2086:2086:2086) (1974:1974:1974)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT asdata (795:795:795) (871:871:871)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1818:1818:1818) (1758:1758:1758)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (PORT ena (1720:1720:1720) (1638:1638:1638)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT asdata (1403:1403:1403) (1389:1389:1389)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (2057:2057:2057) (1942:1942:1942)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (PORT ena (1720:1720:1720) (1638:1638:1638)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (899:899:899) (900:900:900)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (909:909:909) (896:896:896)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (549:549:549) (580:580:580)) + (PORT datab (340:340:340) (422:422:422)) + (PORT datac (309:309:309) (399:399:399)) + (PORT datad (535:535:535) (558:558:558)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (338:338:338) (421:421:421)) + (PORT datab (343:343:343) (425:425:425)) + (PORT datac (308:308:308) (395:395:395)) + (PORT datad (256:256:256) (281:281:281)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (437:437:437)) + (PORT datab (336:336:336) (412:412:412)) + (PORT datac (310:310:310) (398:398:398)) + (PORT datad (855:855:855) (809:809:809)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT asdata (1805:1805:1805) (1740:1740:1740)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (297:297:297) (375:375:375)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (889:889:889) (882:882:882)) + (PORT datab (850:850:850) (822:822:822)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~4) + (DELAY + (ABSOLUTE + (PORT dataa (593:593:593) (605:605:605)) + (PORT datab (901:901:901) (887:887:887)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~6) + (DELAY + (ABSOLUTE + (PORT dataa (548:548:548) (572:572:572)) + (PORT datab (937:937:937) (917:917:917)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (279:279:279) (311:311:311)) + (PORT datab (286:286:286) (314:314:314)) + (PORT datac (245:245:245) (276:276:276)) + (PORT datad (247:247:247) (269:269:269)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT datab (345:345:345) (428:428:428)) + (PORT datac (312:312:312) (402:402:402)) + (PORT datad (539:539:539) (562:562:562)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT datab (345:345:345) (428:428:428)) + (PORT datac (309:309:309) (397:397:397)) + (PORT datad (258:258:258) (283:283:283)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~8) + (DELAY + (ABSOLUTE + (PORT dataa (1263:1263:1263) (1217:1217:1217)) + (PORT datab (922:922:922) (918:918:918)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~10) + (DELAY + (ABSOLUTE + (PORT dataa (893:893:893) (903:903:903)) + (PORT datab (984:984:984) (957:957:957)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~12) + (DELAY + (ABSOLUTE + (PORT dataa (1196:1196:1196) (1143:1143:1143)) + (PORT datab (929:929:929) (925:925:925)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~16) + (DELAY + (ABSOLUTE + (PORT dataa (945:945:945) (949:949:949)) + (PORT datab (965:965:965) (942:942:942)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (905:905:905) (858:858:858)) + (PORT datab (855:855:855) (804:804:804)) + (PORT datac (932:932:932) (877:877:877)) + (PORT datad (861:861:861) (804:804:804)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_en\~1) + (DELAY + (ABSOLUTE + (PORT dataa (289:289:289) (324:324:324)) + (PORT datab (1000:1000:1000) (985:985:985)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_en) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5995:5995:5995) (5789:5789:5789)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_rdreq\~0) + (DELAY + (ABSOLUTE + (PORT datab (334:334:334) (410:410:410)) + (PORT datac (1312:1312:1312) (1277:1277:1277)) + (PORT datad (1296:1296:1296) (1256:1256:1256)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (374:374:374) (465:465:465)) + (PORT datab (341:341:341) (389:389:389)) + (PORT datac (803:803:803) (794:794:794)) + (PORT datad (548:548:548) (575:575:575)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (240:240:240) (258:258:258)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (307:307:307) (356:356:356)) + (PORT datad (347:347:347) (430:430:430)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (562:562:562) (609:609:609)) + (PORT datab (593:593:593) (620:620:620)) + (PORT datac (260:260:260) (304:304:304)) + (PORT datad (347:347:347) (430:430:430)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6\~0) + (DELAY + (ABSOLUTE + (PORT datab (320:320:320) (357:357:357)) + (PORT datad (545:545:545) (574:574:574)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (984:984:984) (964:964:964)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (PORT ena (1720:1720:1720) (1638:1638:1638)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT asdata (1406:1406:1406) (1385:1385:1385)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datac (314:314:314) (403:403:403)) + (PORT datad (254:254:254) (278:278:278)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (281:281:281) (314:314:314)) + (PORT datab (278:278:278) (304:304:304)) + (PORT datac (238:238:238) (264:264:264)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT dataa (594:594:594) (631:631:631)) + (PORT datad (335:335:335) (416:416:416)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~18) + (DELAY + (ABSOLUTE + (PORT dataa (949:949:949) (933:933:933)) + (PORT datad (889:889:889) (886:886:886)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~2) + (DELAY + (ABSOLUTE + (PORT dataa (279:279:279) (310:310:310)) + (PORT datab (1958:1958:1958) (1762:1762:1762)) + (PORT datac (1882:1882:1882) (1695:1695:1695)) + (PORT datad (267:267:267) (285:285:285)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1884:1884:1884) (1709:1709:1709)) + (PORT datab (303:303:303) (327:327:327)) + (PORT datac (265:265:265) (291:291:291)) + (PORT datad (236:236:236) (254:254:254)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1864:1864:1864)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1855:1855:1855)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1643:1643:1643) (1583:1583:1583)) + (PORT datab (921:921:921) (928:928:928)) + (PORT datac (1168:1168:1168) (1141:1141:1141)) + (PORT datad (330:330:330) (404:404:404)) + (IOPATH dataa combout (392:392:392) (407:407:407)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (583:583:583) (640:640:640)) + (PORT datad (331:331:331) (408:408:408)) + (IOPATH dataa combout (421:421:421) (428:428:428)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector3\~1) + (DELAY + (ABSOLUTE + (PORT dataa (308:308:308) (349:349:349)) + (PORT datab (1213:1213:1213) (1184:1184:1184)) + (PORT datac (1552:1552:1552) (1461:1461:1461)) + (PORT datad (241:241:241) (260:260:260)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.READ) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~7) + (DELAY + (ABSOLUTE + (PORT datab (643:643:643) (658:658:658)) + (PORT datac (503:503:503) (515:515:515)) + (PORT datad (550:550:550) (579:579:579)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (557:557:557)) + (PORT datab (383:383:383) (471:471:471)) + (PORT datad (265:265:265) (282:282:282)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_DATA) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|twrite_end\~0) + (DELAY + (ABSOLUTE + (PORT dataa (365:365:365) (468:468:468)) + (PORT datab (363:363:363) (459:459:459)) + (PORT datac (321:321:321) (416:416:416)) + (PORT datad (324:324:324) (407:407:407)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|twrite_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (549:549:549) (562:562:562)) + (PORT datab (330:330:330) (372:372:372)) + (PORT datac (369:369:369) (483:483:483)) + (PORT datad (806:806:806) (727:727:727)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_PRE) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (313:313:313) (350:350:350)) + (PORT datad (553:553:553) (578:578:578)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|trp_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (550:550:550) (563:563:563)) + (PORT datab (351:351:351) (440:440:440)) + (PORT datac (289:289:289) (335:335:335)) + (PORT datad (500:500:500) (474:474:474)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_END) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1300:1300:1300) (1273:1273:1273)) + (PORT datab (1603:1603:1603) (1500:1500:1500)) + (PORT datad (264:264:264) (295:295:295)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.WRITE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (588:588:588) (645:645:645)) + (PORT datab (368:368:368) (447:447:447)) + (PORT datac (1253:1253:1253) (1222:1222:1222)) + (PORT datad (324:324:324) (395:395:395)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (831:831:831) (793:793:793)) + (PORT datab (278:278:278) (303:303:303)) + (PORT datac (237:237:237) (263:263:263)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.ARBIT) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT datab (1162:1162:1162) (1191:1191:1191)) + (PORT datac (331:331:331) (415:415:415)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1265:1265:1265) (1242:1242:1242)) + (PORT datab (378:378:378) (485:485:485)) + (PORT datad (585:585:585) (612:612:612)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\~4) + (DELAY + (ABSOLUTE + (PORT datad (580:580:580) (615:615:615)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\~2) + (DELAY + (ABSOLUTE + (PORT dataa (651:651:651) (674:674:674)) + (PORT datad (312:312:312) (393:393:393)) + (IOPATH dataa combout (453:453:453) (446:446:446)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (PORT ena (1083:1083:1083) (1077:1077:1077)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~15) + (DELAY + (ABSOLUTE + (PORT datac (302:302:302) (384:384:384)) + (PORT datad (309:309:309) (388:388:388)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (299:299:299) (342:342:342)) + (PORT datad (569:569:569) (588:588:588)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~1) + (DELAY + (ABSOLUTE + (PORT datab (287:287:287) (318:318:318)) + (PORT datad (330:330:330) (423:423:423)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT datab (367:367:367) (463:463:463)) + (PORT datac (308:308:308) (395:395:395)) + (PORT datad (531:531:531) (572:572:572)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (648:648:648) (671:671:671)) + (PORT datab (341:341:341) (422:422:422)) + (PORT datac (254:254:254) (293:293:293)) + (PORT datad (321:321:321) (392:392:392)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (308:308:308) (357:357:357)) + (PORT datab (359:359:359) (448:448:448)) + (PORT datad (248:248:248) (270:270:270)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~0) + (DELAY + (ABSOLUTE + (PORT dataa (578:578:578) (628:628:628)) + (PORT datab (283:283:283) (314:314:314)) + (PORT datad (329:329:329) (422:422:422)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (573:573:573) (623:623:623)) + (PORT datab (369:369:369) (464:464:464)) + (PORT datac (310:310:310) (398:398:398)) + (PORT datad (320:320:320) (407:407:407)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector3\~1) + (DELAY + (ABSOLUTE + (PORT datab (279:279:279) (304:304:304)) + (PORT datac (329:329:329) (412:412:412)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_TRF) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~2) + (DELAY + (ABSOLUTE + (PORT dataa (307:307:307) (356:356:356)) + (PORT datab (362:362:362) (451:451:451)) + (PORT datad (247:247:247) (269:269:269)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|trc_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (571:571:571) (621:621:621)) + (PORT datab (368:368:368) (464:464:464)) + (PORT datac (310:310:310) (398:398:398)) + (PORT datad (320:320:320) (407:407:407)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (296:296:296) (339:339:339)) + (PORT datab (281:281:281) (307:307:307)) + (PORT datac (305:305:305) (389:389:389)) + (PORT datad (266:266:266) (306:306:306)) + (IOPATH dataa combout (453:453:453) (446:446:446)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AUTO_REF) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[1\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (649:649:649) (672:672:672)) + (PORT datac (331:331:331) (414:414:414)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (PORT ena (1083:1083:1083) (1077:1077:1077)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~17) + (DELAY + (ABSOLUTE + (PORT dataa (308:308:308) (357:357:357)) + (PORT datab (356:356:356) (439:439:439)) + (PORT datac (304:304:304) (387:387:387)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_END) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|aref_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (1162:1162:1162) (1191:1191:1191)) + (PORT datac (330:330:330) (414:414:414)) + (PORT datad (582:582:582) (608:608:608)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.AREF) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (PORT ena (1043:1043:1043) (1024:1024:1024)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~3) + (DELAY + (ABSOLUTE + (PORT datad (254:254:254) (282:282:282)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~2) + (DELAY + (ABSOLUTE + (PORT datab (406:406:406) (518:518:518)) + (PORT datad (258:258:258) (288:288:288)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~1) + (DELAY + (ABSOLUTE + (PORT datab (377:377:377) (459:459:459)) + (PORT datac (360:360:360) (466:466:466)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1242:1242:1242) (1201:1201:1201)) + (PORT datab (403:403:403) (515:515:515)) + (PORT datad (256:256:256) (284:284:284)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (437:437:437)) + (PORT datab (403:403:403) (514:514:514)) + (PORT datac (303:303:303) (386:386:386)) + (PORT datad (254:254:254) (282:282:282)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (884:884:884) (886:886:886)) + (PORT datad (329:329:329) (403:403:403)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~10) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (932:932:932) (905:905:905)) + (PORT datab (923:923:923) (892:892:892)) + (PORT datac (831:831:831) (810:810:810)) + (PORT datad (893:893:893) (884:884:884)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\~0) + (DELAY + (ABSOLUTE + (PORT dataa (862:862:862) (789:789:789)) + (PORT datab (278:278:278) (303:303:303)) + (PORT datac (238:238:238) (264:264:264)) + (PORT datad (245:245:245) (271:271:271)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~2) + (DELAY + (ABSOLUTE + (PORT datab (358:358:358) (434:434:434)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~4) + (DELAY + (ABSOLUTE + (PORT datab (359:359:359) (435:435:435)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~8) + (DELAY + (ABSOLUTE + (PORT datab (359:359:359) (436:436:436)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~14) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~16) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~18) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~20) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~22) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (433:433:433)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~24) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (422:422:422)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~28) + (DELAY + (ABSOLUTE + (PORT datad (507:507:507) (538:538:538)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (432:432:432)) + (PORT datab (544:544:544) (578:578:578)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (301:301:301) (378:378:378)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (874:874:874) (862:862:862)) + (PORT datab (908:908:908) (890:890:890)) + (PORT datac (867:867:867) (838:838:838)) + (PORT datad (894:894:894) (857:857:857)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (858:858:858) (853:853:853)) + (PORT datac (764:764:764) (706:706:706)) + (PORT datad (237:237:237) (255:255:255)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (930:930:930) (903:903:903)) + (PORT datab (920:920:920) (889:889:889)) + (PORT datac (826:826:826) (806:806:806)) + (PORT datad (894:894:894) (885:885:885)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (888:888:888) (890:890:890)) + (PORT datab (287:287:287) (316:316:316)) + (PORT datac (486:486:486) (463:463:463)) + (PORT datad (330:330:330) (404:404:404)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_IDLE\~0) + (DELAY + (ABSOLUTE + (PORT datad (246:246:246) (271:271:271)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (311:311:311)) + (PORT datab (386:386:386) (464:464:464)) + (PORT datac (239:239:239) (266:266:266)) + (PORT datad (1280:1280:1280) (1223:1223:1223)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~4) + (DELAY + (ABSOLUTE + (PORT dataa (579:579:579) (612:612:612)) + (PORT datab (295:295:295) (327:327:327)) + (PORT datad (339:339:339) (419:419:419)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT datab (403:403:403) (515:515:515)) + (PORT datad (335:335:335) (415:415:415)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_END\~0) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (437:437:437)) + (PORT datab (405:405:405) (510:510:510)) + (PORT datad (504:504:504) (485:485:485)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_END) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (367:367:367) (451:451:451)) + (PORT datab (378:378:378) (485:485:485)) + (PORT datac (1219:1219:1219) (1192:1192:1192)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_PCHA) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (628:628:628) (641:641:641)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (633:633:633) (644:644:644)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (576:576:576) (599:599:599)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~8) + (DELAY + (ABSOLUTE + (PORT datab (567:567:567) (587:587:587)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~4) + (DELAY + (ABSOLUTE + (PORT datac (492:492:492) (466:466:466)) + (PORT datad (311:311:311) (357:357:357)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[3\]\~1) + (DELAY + (ABSOLUTE + (PORT datac (1574:1574:1574) (1507:1507:1507)) + (PORT datad (318:318:318) (365:365:365)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT ena (1037:1037:1037) (1012:1012:1012)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~10) + (DELAY + (ABSOLUTE + (PORT datab (369:369:369) (450:450:450)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[5\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (588:588:588) (562:562:562)) + (PORT datab (1360:1360:1360) (1352:1352:1352)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1861:1861:1861)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~12) + (DELAY + (ABSOLUTE + (PORT datab (370:370:370) (450:450:450)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[6\]\~9) + (DELAY + (ABSOLUTE + (PORT dataa (588:588:588) (562:562:562)) + (PORT datab (1360:1360:1360) (1353:1353:1353)) + (PORT datad (239:239:239) (258:258:258)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1861:1861:1861)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~14) + (DELAY + (ABSOLUTE + (PORT dataa (371:371:371) (459:459:459)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[7\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (592:592:592) (567:567:567)) + (PORT datab (1358:1358:1358) (1349:1349:1349)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1861:1861:1861)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~0) + (DELAY + (ABSOLUTE + (PORT datac (494:494:494) (468:468:468)) + (PORT datad (315:315:315) (362:362:362)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT ena (1037:1037:1037) (1012:1012:1012)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~7) + (DELAY + (ABSOLUTE + (PORT datac (495:495:495) (469:469:469)) + (PORT datad (318:318:318) (365:365:365)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT ena (1037:1037:1037) (1012:1012:1012)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~8) + (DELAY + (ABSOLUTE + (PORT datab (356:356:356) (403:403:403)) + (PORT datad (451:451:451) (429:429:429)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT ena (1037:1037:1037) (1012:1012:1012)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (372:372:372) (459:459:459)) + (PORT datab (368:368:368) (451:451:451)) + (PORT datac (318:318:318) (396:396:396)) + (PORT datad (321:321:321) (391:391:391)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (370:370:370) (460:460:460)) + (PORT datab (628:628:628) (638:638:638)) + (PORT datac (239:239:239) (265:265:265)) + (PORT datad (569:569:569) (582:582:582)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (578:578:578) (611:611:611)) + (PORT datab (367:367:367) (448:448:448)) + (PORT datac (579:579:579) (595:595:595)) + (PORT datad (236:236:236) (254:254:254)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~16) + (DELAY + (ABSOLUTE + (PORT datab (558:558:558) (589:589:589)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[8\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1618:1618:1618) (1555:1555:1555)) + (PORT datab (353:353:353) (400:400:400)) + (PORT datad (483:483:483) (451:451:451)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~18) + (DELAY + (ABSOLUTE + (PORT datad (332:332:332) (410:410:410)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[9\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (588:588:588) (562:562:562)) + (PORT datab (1361:1361:1361) (1353:1353:1353)) + (PORT datad (240:240:240) (259:259:259)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1861:1861:1861)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (631:631:631) (641:641:641)) + (PORT datab (372:372:372) (453:453:453)) + (PORT datac (326:326:326) (411:411:411)) + (PORT datad (560:560:560) (584:584:584)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT datab (276:276:276) (301:301:301)) + (PORT datac (330:330:330) (416:416:416)) + (PORT datad (332:332:332) (410:410:410)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_req\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1177:1177:1177) (1090:1090:1090)) + (PORT datab (364:364:364) (441:441:441)) + (PORT datad (1115:1115:1115) (1021:1021:1021)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_req) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT datac (879:879:879) (890:890:890)) + (PORT datad (330:330:330) (404:404:404)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|wr_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1301:1301:1301) (1273:1273:1273)) + (PORT datab (1604:1604:1604) (1500:1500:1500)) + (PORT datad (264:264:264) (296:296:296)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|wr_en) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1297:1297:1297) (1269:1269:1269)) + (PORT datab (349:349:349) (433:433:433)) + (PORT datad (2523:2523:2523) (2391:2391:2391)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~1) + (DELAY + (ABSOLUTE + (PORT datab (636:636:636) (650:650:650)) + (PORT datac (907:907:907) (907:907:907)) + (PORT datad (530:530:530) (554:554:554)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (316:316:316) (354:354:354)) + (PORT datab (352:352:352) (441:441:441)) + (PORT datac (238:238:238) (264:264:264)) + (PORT datad (527:527:527) (548:548:548)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (980:980:980) (952:952:952)) + (PORT datab (507:507:507) (492:492:492)) + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (435:435:435) (409:409:409)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT datab (356:356:356) (442:442:442)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (356:356:356) (446:446:446)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (422:422:422)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (361:361:361) (438:438:438)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT datab (363:363:363) (440:440:440)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~5) + (DELAY + (ABSOLUTE + (PORT datab (641:641:641) (656:656:656)) + (PORT datad (548:548:548) (578:578:578)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (892:892:892) (883:883:883)) + (PORT datad (831:831:831) (784:784:784)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_TRCD) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|trcd_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (550:550:550) (563:563:563)) + (PORT datab (331:331:331) (373:373:373)) + (PORT datac (560:560:560) (591:591:591)) + (PORT datad (500:500:500) (474:474:474)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_WRITE) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack\~2) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (465:465:465)) + (PORT datab (359:359:359) (455:455:455)) + (PORT datac (319:319:319) (413:413:413)) + (PORT datad (321:321:321) (404:404:404)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack\~3) + (DELAY + (ABSOLUTE + (PORT dataa (549:549:549) (563:563:563)) + (PORT datab (328:328:328) (369:369:369)) + (PORT datac (363:363:363) (475:475:475)) + (PORT datad (483:483:483) (451:451:451)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1356:1356:1356) (1312:1312:1312)) + (PORT datab (360:360:360) (437:437:437)) + (PORT datac (319:319:319) (397:397:397)) + (PORT datad (1274:1274:1274) (1238:1238:1238)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1276:1276:1276) (1244:1244:1244)) + (PORT datab (1567:1567:1567) (1494:1494:1494)) + (PORT datac (1139:1139:1139) (1039:1039:1039)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (421:421:421) (428:428:428)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (408:408:408) (506:506:506)) + (PORT datab (290:290:290) (327:327:327)) + (PORT datad (1289:1289:1289) (1252:1252:1252)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~12) + (DELAY + (ABSOLUTE + (PORT dataa (1374:1374:1374) (1316:1316:1316)) + (PORT datab (982:982:982) (971:971:971)) + (PORT datac (1232:1232:1232) (1185:1185:1185)) + (PORT datad (921:921:921) (901:901:901)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (PORT ena (1757:1757:1757) (1679:1679:1679)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~11) + (DELAY + (ABSOLUTE + (PORT dataa (943:943:943) (948:948:948)) + (PORT datab (1259:1259:1259) (1212:1212:1212)) + (PORT datac (1271:1271:1271) (1218:1218:1218)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (341:341:341) (426:426:426)) + (PORT datac (295:295:295) (373:373:373)) + (PORT datad (903:903:903) (893:893:893)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|parity6) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (PORT ena (1757:1757:1757) (1679:1679:1679)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (897:897:897) (901:901:901)) + (PORT datab (402:402:402) (486:486:486)) + (PORT datac (338:338:338) (428:428:428)) + (PORT datad (967:967:967) (924:924:924)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (238:238:238) (257:257:257)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (369:369:369) (449:449:449)) + (PORT datac (1193:1193:1193) (1150:1150:1150)) + (PORT datad (966:966:966) (923:923:923)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1375:1375:1375) (1318:1318:1318)) + (PORT datab (302:302:302) (342:342:342)) + (PORT datad (921:921:921) (901:901:901)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT dataa (1378:1378:1378) (1322:1322:1322)) + (PORT datab (979:979:979) (967:967:967)) + (PORT datac (261:261:261) (305:305:305)) + (PORT datad (916:916:916) (896:896:896)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (237:237:237) (255:255:255)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10\~0) + (DELAY + (ABSOLUTE + (PORT datab (372:372:372) (453:453:453)) + (PORT datad (243:243:243) (268:268:268)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1675:1675:1675) (1632:1632:1632)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1003:1003:1003) (991:991:991)) + (PORT datab (913:913:913) (914:914:914)) + (PORT datad (548:548:548) (570:570:570)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1138:1138:1138) (1041:1041:1041)) + (PORT datab (337:337:337) (379:379:379)) + (PORT datac (324:324:324) (425:425:425)) + (PORT datad (832:832:832) (775:775:775)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (279:279:279) (311:311:311)) + (PORT datab (345:345:345) (389:389:389)) + (PORT datac (454:454:454) (431:431:431)) + (PORT datad (964:964:964) (952:952:952)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (334:334:334) (417:417:417)) + (PORT datad (296:296:296) (366:366:366)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[0\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2339:2339:2339) (2308:2308:2308)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[1\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2339:2339:2339) (2308:2308:2308)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE rx\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (796:796:796) (842:842:842)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg1\~0) + (DELAY + (ABSOLUTE + (PORT datad (4105:4105:4105) (4296:4296:4296)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg1) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1860:1860:1860)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1851:1851:1851)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg2\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (296:296:296) (366:366:366)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg2) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1860:1860:1860)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1851:1851:1851)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg3\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (303:303:303) (379:379:379)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg3) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1860:1860:1860)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1851:1851:1851)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[7\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (906:906:906) (895:895:895)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|bit_cnt\~0) + (DELAY + (ABSOLUTE + (PORT dataa (281:281:281) (314:314:314)) + (PORT datab (368:368:368) (467:467:467)) + (PORT datad (262:262:262) (297:297:297)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always8\~0) + (DELAY + (ABSOLUTE + (PORT datab (304:304:304) (342:342:342)) + (PORT datac (327:327:327) (428:428:428)) + (PORT datad (321:321:321) (409:409:409)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT asdata (770:770:770) (844:844:844)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (304:304:304) (378:378:378)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (306:306:306) (380:380:380)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (303:303:303) (376:376:376)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (308:308:308) (382:382:382)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (307:307:307) (381:381:381)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (306:306:306) (380:380:380)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (297:297:297) (367:367:367)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|ram_address_a\[9\]) + (DELAY + (ABSOLUTE + (PORT datad (330:330:330) (404:404:404)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0\~_wirecell) + (DELAY + (ABSOLUTE + (PORT datad (1285:1285:1285) (1253:1253:1253)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT datab (1258:1258:1258) (1210:1210:1210)) + (PORT datac (897:897:897) (898:898:898)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (303:303:303) (377:377:377)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (305:305:305) (380:380:380)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (308:308:308) (383:383:383)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (306:306:306) (379:379:379)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (304:304:304) (378:378:378)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (306:306:306) (379:379:379)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT asdata (770:770:770) (844:844:844)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (972:972:972) (971:971:971)) + (PORT d[1] (1038:1038:1038) (1027:1027:1027)) + (PORT d[2] (985:985:985) (968:968:968)) + (PORT d[3] (970:970:970) (964:964:964)) + (PORT d[4] (997:997:997) (990:990:990)) + (PORT d[5] (1000:1000:1000) (994:994:994)) + (PORT d[6] (985:985:985) (968:968:968)) + (PORT d[7] (963:963:963) (964:964:964)) + (PORT d[8] (607:607:607) (590:590:590)) + (PORT clk (2261:2261:2261) (2289:2289:2289)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1350:1350:1350) (1313:1313:1313)) + (PORT d[1] (1573:1573:1573) (1549:1549:1549)) + (PORT d[2] (1399:1399:1399) (1369:1369:1369)) + (PORT d[3] (1767:1767:1767) (1706:1706:1706)) + (PORT d[4] (1342:1342:1342) (1310:1310:1310)) + (PORT d[5] (1406:1406:1406) (1368:1368:1368)) + (PORT d[6] (1726:1726:1726) (1667:1667:1667)) + (PORT d[7] (1330:1330:1330) (1286:1286:1286)) + (PORT d[8] (1374:1374:1374) (1352:1352:1352)) + (PORT d[9] (1214:1214:1214) (1122:1122:1122)) + (PORT clk (2257:2257:2257) (2284:2284:2284)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (2463:2463:2463) (2259:2259:2259)) + (PORT clk (2257:2257:2257) (2284:2284:2284)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2261:2261:2261) (2289:2289:2289)) + (PORT d[0] (3170:3170:3170) (2973:2973:2973)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2262:2262:2262) (2290:2290:2290)) + (IOPATH (posedge clk) pulse (0:0:0) (2750:2750:2750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2262:2262:2262) (2290:2290:2290)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2262:2262:2262) (2290:2290:2290)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2262:2262:2262) (2290:2290:2290)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1267:1267:1267) (1201:1201:1201)) + (PORT d[1] (1547:1547:1547) (1522:1522:1522)) + (PORT d[2] (1753:1753:1753) (1686:1686:1686)) + (PORT d[3] (1380:1380:1380) (1348:1348:1348)) + (PORT d[4] (1715:1715:1715) (1647:1647:1647)) + (PORT d[5] (1078:1078:1078) (1070:1070:1070)) + (PORT d[6] (1320:1320:1320) (1285:1285:1285)) + (PORT d[7] (1320:1320:1320) (1279:1279:1279)) + (PORT d[8] (1365:1365:1365) (1347:1347:1347)) + (PORT d[9] (1215:1215:1215) (1118:1118:1118)) + (PORT clk (2211:2211:2211) (2198:2198:2198)) + (PORT aclr (2253:2253:2253) (2246:2246:2246)) + (PORT stall (1610:1610:1610) (1736:1736:1736)) + (IOPATH (posedge aclr) q (396:396:396) (396:396:396)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + (HOLD stall (posedge clk) (254:254:254)) + (HOLD aclr (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (2211:2211:2211) (2198:2198:2198)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2212:2212:2212) (2199:2199:2199)) + (IOPATH (posedge clk) pulse (0:0:0) (3182:3182:3182)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2212:2212:2212) (2199:2199:2199)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2212:2212:2212) (2199:2199:2199)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (2203:2203:2203) (2194:2194:2194)) + (PORT ena (2164:2164:2164) (2043:2043:2043)) + (PORT aclr (2204:2204:2204) (2258:2258:2258)) + (IOPATH (posedge clk) q (392:392:392) (392:392:392)) + (IOPATH (posedge aclr) q (440:440:440) (440:440:440)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (64:64:64)) + (SETUP ena (posedge clk) (64:64:64)) + (SETUP aclr (posedge clk) (64:64:64)) + (HOLD d (posedge clk) (211:211:211)) + (HOLD ena (posedge clk) (211:211:211)) + (HOLD aclr (posedge clk) (211:211:211)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack) + (DELAY + (ABSOLUTE + (PORT datac (1140:1140:1140) (1040:1040:1040)) + (PORT datad (1527:1527:1527) (1450:1450:1450)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_sdram_en) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1129:1129:1129) (1098:1098:1098)) + (PORT d[1] (1129:1129:1129) (1098:1098:1098)) + (PORT d[2] (1129:1129:1129) (1098:1098:1098)) + (PORT d[3] (1129:1129:1129) (1098:1098:1098)) + (PORT d[4] (1114:1114:1114) (1082:1082:1082)) + (PORT d[5] (1114:1114:1114) (1082:1082:1082)) + (PORT d[6] (1114:1114:1114) (1082:1082:1082)) + (PORT clk (2255:2255:2255) (2284:2284:2284)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1902:1902:1902) (1840:1840:1840)) + (PORT d[1] (1020:1020:1020) (1022:1022:1022)) + (PORT d[2] (2363:2363:2363) (2282:2282:2282)) + (PORT d[3] (1372:1372:1372) (1343:1343:1343)) + (PORT d[4] (1012:1012:1012) (1017:1017:1017)) + (PORT d[5] (1163:1163:1163) (1110:1110:1110)) + (PORT d[6] (1709:1709:1709) (1649:1649:1649)) + (PORT d[7] (2052:2052:2052) (1907:1907:1907)) + (PORT d[8] (1724:1724:1724) (1675:1675:1675)) + (PORT d[9] (857:857:857) (781:781:781)) + (PORT clk (2251:2251:2251) (2279:2279:2279)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (2799:2799:2799) (2566:2566:2566)) + (PORT clk (2251:2251:2251) (2279:2279:2279)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2255:2255:2255) (2284:2284:2284)) + (PORT d[0] (3506:3506:3506) (3280:3280:3280)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2256:2256:2256) (2285:2285:2285)) + (IOPATH (posedge clk) pulse (0:0:0) (2750:2750:2750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2256:2256:2256) (2285:2285:2285)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2256:2256:2256) (2285:2285:2285)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2256:2256:2256) (2285:2285:2285)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (972:972:972) (925:925:925)) + (PORT d[1] (1550:1550:1550) (1515:1515:1515)) + (PORT d[2] (1747:1747:1747) (1679:1679:1679)) + (PORT d[3] (1090:1090:1090) (1090:1090:1090)) + (PORT d[4] (1003:1003:1003) (1011:1011:1011)) + (PORT d[5] (1020:1020:1020) (1014:1014:1014)) + (PORT d[6] (1007:1007:1007) (999:999:999)) + (PORT d[7] (1350:1350:1350) (1322:1322:1322)) + (PORT d[8] (1734:1734:1734) (1675:1675:1675)) + (PORT d[9] (1946:1946:1946) (1784:1784:1784)) + (PORT clk (2205:2205:2205) (2193:2193:2193)) + (PORT aclr (2247:2247:2247) (2241:2241:2241)) + (PORT stall (1917:1917:1917) (2070:2070:2070)) + (IOPATH (posedge aclr) q (396:396:396) (396:396:396)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + (HOLD stall (posedge clk) (254:254:254)) + (HOLD aclr (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (2205:2205:2205) (2193:2193:2193)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2206:2206:2206) (2194:2194:2194)) + (IOPATH (posedge clk) pulse (0:0:0) (3182:3182:3182)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2206:2206:2206) (2194:2194:2194)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2206:2206:2206) (2194:2194:2194)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (2197:2197:2197) (2189:2189:2189)) + (PORT ena (2131:2131:2131) (2004:2004:2004)) + (PORT aclr (2198:2198:2198) (2253:2253:2253)) + (IOPATH (posedge clk) q (392:392:392) (392:392:392)) + (IOPATH (posedge aclr) q (440:440:440) (440:440:440)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (64:64:64)) + (SETUP ena (posedge clk) (64:64:64)) + (SETUP aclr (posedge clk) (64:64:64)) + (HOLD d (posedge clk) (211:211:211)) + (HOLD ena (posedge clk) (211:211:211)) + (HOLD aclr (posedge clk) (211:211:211)) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE sys_clk\~inputclkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (200:200:200) (189:189:189)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (893:893:893) (894:894:894)) + (PORT datab (341:341:341) (422:422:422)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[11\]\~35) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (300:300:300) (383:383:383)) + (PORT datad (303:303:303) (380:380:380)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[9\]\~31) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (447:447:447)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (959:959:959) (947:947:947)) + (PORT datab (960:960:960) (941:941:941)) + (PORT datac (826:826:826) (767:767:767)) + (PORT datad (953:953:953) (936:936:936)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (441:441:441)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (354:354:354) (450:450:450)) + (PORT datab (350:350:350) (439:439:439)) + (PORT datac (311:311:311) (400:400:400)) + (PORT datad (313:313:313) (393:393:393)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|tx_flag) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT asdata (1030:1030:1030) (1048:1048:1048)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (932:932:932) (942:942:942)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[1\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (399:399:399) (527:527:527)) + (PORT datab (293:293:293) (331:331:331)) + (PORT datad (292:292:292) (322:322:322)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[2\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (774:774:774) (707:707:707)) + (PORT datab (295:295:295) (333:333:333)) + (PORT datad (288:288:288) (318:318:318)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (393:393:393) (520:520:520)) + (PORT datab (412:412:412) (513:513:513)) + (PORT datac (321:321:321) (422:422:422)) + (PORT datad (248:248:248) (275:275:275)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|work_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (1371:1371:1371) (1321:1321:1321)) + (PORT datad (1269:1269:1269) (1180:1180:1180)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|work_en) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT asdata (5350:5350:5350) (4891:4891:4891)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (303:303:303) (327:327:327)) + (PORT datac (1403:1403:1403) (1288:1288:1288)) + (PORT datad (1160:1160:1160) (1121:1121:1121)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT datab (350:350:350) (435:435:435)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (350:350:350) (440:440:440)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (422:422:422)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT datad (321:321:321) (391:391:391)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (448:448:448)) + (PORT datab (351:351:351) (440:440:440)) + (PORT datac (308:308:308) (397:397:397)) + (PORT datad (310:310:310) (389:389:389)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (575:575:575) (540:540:540)) + (PORT datab (936:936:936) (944:944:944)) + (PORT datac (794:794:794) (741:741:741)) + (PORT datad (962:962:962) (949:949:949)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (1874:1874:1874) (1885:1885:1885)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5141:5141:5141) (4901:4901:4901)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (430:430:430)) + (PORT datac (886:886:886) (891:891:891)) + (IOPATH dataa combout (453:453:453) (446:446:446)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|valid_rreq) + (DELAY + (ABSOLUTE + (PORT dataa (365:365:365) (449:449:449)) + (PORT datad (915:915:915) (927:927:927)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[0\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (774:774:774) (821:821:821)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4629:4629:4629) (4901:4901:4901)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_ack\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1001:1001:1001) (997:997:997)) + (PORT datab (897:897:897) (855:855:855)) + (PORT datac (824:824:824) (772:772:772)) + (PORT datad (265:265:265) (282:282:282)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT datad (882:882:882) (824:824:824)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0\~_wirecell) + (DELAY + (ABSOLUTE + (PORT datad (2096:2096:2096) (1989:1989:1989)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT datab (367:367:367) (447:447:447)) + (PORT datac (326:326:326) (409:409:409)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[1\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (774:774:774) (821:821:821)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4552:4552:4552) (4818:4818:4818)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[1\]\~6) + (DELAY + (ABSOLUTE + (PORT datad (878:878:878) (820:820:820)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[2\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (734:734:734) (781:781:781)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4558:4558:4558) (4795:4795:4795)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[2\]\~4) + (DELAY + (ABSOLUTE + (PORT datad (877:877:877) (819:819:819)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[3\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (764:764:764) (811:811:811)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4349:4349:4349) (4485:4485:4485)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[3\]\~2) + (DELAY + (ABSOLUTE + (PORT datad (883:883:883) (826:826:826)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[4\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (774:774:774) (821:821:821)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4391:4391:4391) (4517:4517:4517)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[4\]\~1) + (DELAY + (ABSOLUTE + (PORT datad (876:876:876) (818:818:818)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[5\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (754:754:754) (801:801:801)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4641:4641:4641) (4868:4868:4868)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[5\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (879:879:879) (822:822:822)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[6\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (784:784:784) (831:831:831)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4805:4805:4805) (4978:4978:4978)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[6\]\~3) + (DELAY + (ABSOLUTE + (PORT datad (883:883:883) (826:826:826)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[7\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (774:774:774) (821:821:821)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4521:4521:4521) (4777:4777:4777)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[7\]\~7) + (DELAY + (ABSOLUTE + (PORT datad (877:877:877) (820:820:820)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (956:956:956) (879:879:879)) + (PORT d[1] (882:882:882) (817:817:817)) + (PORT d[2] (880:880:880) (816:816:816)) + (PORT d[3] (953:953:953) (875:875:875)) + (PORT d[4] (888:888:888) (833:833:833)) + (PORT d[5] (881:881:881) (816:816:816)) + (PORT d[6] (901:901:901) (830:830:830)) + (PORT d[7] (919:919:919) (853:853:853)) + (PORT clk (2277:2277:2277) (2305:2305:2305)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1036:1036:1036) (999:999:999)) + (PORT d[1] (984:984:984) (978:978:978)) + (PORT d[2] (955:955:955) (950:950:950)) + (PORT d[3] (1769:1769:1769) (1707:1707:1707)) + (PORT d[4] (944:944:944) (948:948:948)) + (PORT d[5] (1792:1792:1792) (1709:1709:1709)) + (PORT d[6] (1702:1702:1702) (1604:1604:1604)) + (PORT d[7] (999:999:999) (996:996:996)) + (PORT d[8] (1048:1048:1048) (1035:1035:1035)) + (PORT d[9] (921:921:921) (865:865:865)) + (PORT clk (2273:2273:2273) (2300:2300:2300)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1312:1312:1312) (1167:1167:1167)) + (PORT clk (2273:2273:2273) (2300:2300:2300)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2277:2277:2277) (2305:2305:2305)) + (PORT d[0] (2019:2019:2019) (1881:1881:1881)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2278:2278:2278) (2306:2306:2306)) + (IOPATH (posedge clk) pulse (0:0:0) (2750:2750:2750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2278:2278:2278) (2306:2306:2306)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2278:2278:2278) (2306:2306:2306)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2278:2278:2278) (2306:2306:2306)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (530:530:530) (500:500:500)) + (PORT d[1] (973:973:973) (958:958:958)) + (PORT d[2] (1808:1808:1808) (1728:1728:1728)) + (PORT d[3] (2013:2013:2013) (1906:1906:1906)) + (PORT d[4] (1980:1980:1980) (1869:1869:1869)) + (PORT d[5] (2026:2026:2026) (1902:1902:1902)) + (PORT d[6] (1028:1028:1028) (1005:1005:1005)) + (PORT d[7] (1068:1068:1068) (1048:1048:1048)) + (PORT d[8] (1714:1714:1714) (1625:1625:1625)) + (PORT d[9] (922:922:922) (860:860:860)) + (PORT clk (2227:2227:2227) (2214:2214:2214)) + (PORT aclr (2269:2269:2269) (2262:2262:2262)) + (PORT stall (1288:1288:1288) (1407:1407:1407)) + (IOPATH (posedge aclr) q (396:396:396) (396:396:396)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + (HOLD stall (posedge clk) (254:254:254)) + (HOLD aclr (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (2227:2227:2227) (2214:2214:2214)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2228:2228:2228) (2215:2215:2215)) + (IOPATH (posedge clk) pulse (0:0:0) (3182:3182:3182)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2228:2228:2228) (2215:2215:2215)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2228:2228:2228) (2215:2215:2215)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (2219:2219:2219) (2210:2210:2210)) + (PORT ena (1830:1830:1830) (1713:1713:1713)) + (PORT aclr (2220:2220:2220) (2274:2274:2274)) + (IOPATH (posedge clk) q (392:392:392) (392:392:392)) + (IOPATH (posedge aclr) q (440:440:440) (440:440:440)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (64:64:64)) + (SETUP ena (posedge clk) (64:64:64)) + (SETUP aclr (posedge clk) (64:64:64)) + (HOLD d (posedge clk) (211:211:211)) + (HOLD ena (posedge clk) (211:211:211)) + (HOLD aclr (posedge clk) (211:211:211)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (436:436:436)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT datab (361:361:361) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT datab (361:361:361) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT datab (361:361:361) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (447:447:447)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datab (362:362:362) (439:439:439)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (447:447:447)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datad (507:507:507) (538:538:538)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~4) + (DELAY + (ABSOLUTE + (PORT dataa (396:396:396) (523:523:523)) + (PORT datab (367:367:367) (467:467:467)) + (PORT datac (740:740:740) (662:662:662)) + (PORT datad (370:370:370) (470:470:470)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~3) + (DELAY + (ABSOLUTE + (PORT dataa (934:934:934) (943:943:943)) + (PORT datad (321:321:321) (391:391:391)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~5) + (DELAY + (ABSOLUTE + (PORT dataa (811:811:811) (734:734:734)) + (PORT datab (291:291:291) (320:320:320)) + (PORT datac (1119:1119:1119) (1006:1006:1006)) + (PORT datad (441:441:441) (420:420:420)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|tx) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[2\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2339:2339:2339) (2308:2308:2308)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT asdata (1416:1416:1416) (1405:1405:1405)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT asdata (1329:1329:1329) (1301:1301:1301)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT datab (373:373:373) (479:479:479)) + (PORT datac (1230:1230:1230) (1271:1271:1271)) + (PORT datad (1186:1186:1186) (1214:1214:1214)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT asdata (2130:2130:2130) (2054:2054:2054)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (391:391:391) (476:476:476)) + (PORT datab (406:406:406) (510:510:510)) + (PORT datad (506:506:506) (487:487:487)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TRF) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1236:1236:1236) (1124:1124:1124)) + (PORT datab (304:304:304) (328:328:328)) + (PORT datac (361:361:361) (467:467:467)) + (PORT datad (314:314:314) (394:394:394)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (298:298:298) (336:336:336)) + (PORT datab (405:405:405) (516:516:516)) + (PORT datac (304:304:304) (388:388:388)) + (PORT datad (237:237:237) (255:255:255)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_AR) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1735:1735:1735) (1631:1631:1631)) + (PORT datad (1315:1315:1315) (1286:1286:1286)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1178:1178:1178) (1088:1088:1088)) + (PORT datab (1181:1181:1181) (1095:1095:1095)) + (PORT datad (294:294:294) (363:363:363)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1179:1179:1179) (1090:1090:1090)) + (PORT datab (331:331:331) (406:406:406)) + (PORT datad (237:237:237) (255:255:255)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~4) + (DELAY + (ABSOLUTE + (PORT datac (941:941:941) (948:948:948)) + (PORT datad (236:236:236) (254:254:254)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1706:1706:1706) (1642:1642:1642)) + (PORT datac (1220:1220:1220) (1172:1172:1172)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~17) + (DELAY + (ABSOLUTE + (PORT datab (286:286:286) (314:314:314)) + (PORT datad (592:592:592) (621:621:621)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_PRE) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|WideOr5) + (DELAY + (ABSOLUTE + (PORT dataa (1731:1731:1731) (1627:1627:1627)) + (PORT datab (1355:1355:1355) (1330:1330:1330)) + (PORT datad (1628:1628:1628) (1549:1549:1549)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (891:891:891) (882:882:882)) + (PORT datad (1254:1254:1254) (1195:1195:1195)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1175:1175:1175) (1085:1085:1085)) + (PORT datab (332:332:332) (408:408:408)) + (PORT datac (1140:1140:1140) (1060:1060:1060)) + (PORT datad (293:293:293) (363:363:363)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (549:549:549) (573:573:573)) + (PORT datab (333:333:333) (409:409:409)) + (PORT datac (1138:1138:1138) (1057:1057:1057)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT datac (941:941:941) (948:948:948)) + (PORT datad (236:236:236) (253:253:253)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (520:520:520) (497:497:497)) + (PORT datab (383:383:383) (472:472:472)) + (PORT datac (366:366:366) (479:479:479)) + (PORT datad (559:559:559) (584:584:584)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT datac (1223:1223:1223) (1263:1263:1263)) + (PORT datad (1193:1193:1193) (1222:1222:1222)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT dataa (289:289:289) (328:328:328)) + (PORT datac (330:330:330) (414:414:414)) + (PORT datad (563:563:563) (588:588:588)) + (IOPATH dataa combout (453:453:453) (446:446:446)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~1) + (DELAY + (ABSOLUTE + (PORT dataa (278:278:278) (310:310:310)) + (PORT datab (537:537:537) (566:566:566)) + (PORT datac (1112:1112:1112) (1034:1034:1034)) + (PORT datad (493:493:493) (514:514:514)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~2) + (DELAY + (ABSOLUTE + (PORT dataa (278:278:278) (309:309:309)) + (PORT datac (941:941:941) (948:948:948)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (941:941:941) (900:900:900)) + (PORT datab (908:908:908) (851:851:851)) + (PORT datac (969:969:969) (962:962:962)) + (PORT datad (936:936:936) (935:935:935)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector21\~1) + (DELAY + (ABSOLUTE + (PORT dataa (282:282:282) (314:314:314)) + (PORT datab (1047:1047:1047) (1032:1032:1032)) + (PORT datac (245:245:245) (276:276:276)) + (PORT datad (561:561:561) (587:587:587)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_addr\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~6) + (DELAY + (ABSOLUTE + (PORT datad (597:597:597) (626:626:626)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[3\]\~3) + (DELAY + (ABSOLUTE + (PORT datac (1238:1238:1238) (1166:1166:1166)) + (PORT datad (593:593:593) (622:622:622)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (PORT ena (1080:1080:1080) (1064:1064:1064)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~5) + (DELAY + (ABSOLUTE + (PORT datab (379:379:379) (469:469:469)) + (PORT datad (596:596:596) (624:624:624)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (PORT ena (1080:1080:1080) (1064:1064:1064)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~4) + (DELAY + (ABSOLUTE + (PORT dataa (573:573:573) (610:610:610)) + (PORT datab (355:355:355) (442:442:442)) + (PORT datad (591:591:591) (619:619:619)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (PORT ena (1080:1080:1080) (1064:1064:1064)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~15) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (378:378:378) (468:468:468)) + (PORT datac (310:310:310) (400:400:400)) + (PORT datad (301:301:301) (374:374:374)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (547:547:547) (538:538:538)) + (PORT datab (353:353:353) (436:436:436)) + (PORT datac (363:363:363) (470:470:470)) + (PORT datad (1169:1169:1169) (1069:1069:1069)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_MRS) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_ba\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT asdata (1691:1691:1691) (1629:1629:1629)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1226:1226:1226) (1171:1171:1171)) + (PORT datab (373:373:373) (479:479:479)) + (PORT datad (1186:1186:1186) (1214:1214:1214)) + (IOPATH dataa combout (421:421:421) (428:428:428)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector9\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1291:1291:1291) (1315:1315:1315)) + (PORT datab (1336:1336:1336) (1298:1298:1298)) + (PORT datac (1117:1117:1117) (1149:1149:1149)) + (PORT datad (481:481:481) (471:471:471)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (578:578:578) (552:552:552)) + (PORT datab (412:412:412) (520:520:520)) + (PORT datac (503:503:503) (514:514:514)) + (PORT datad (478:478:478) (443:443:443)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~2) + (DELAY + (ABSOLUTE + (PORT dataa (281:281:281) (313:313:313)) + (PORT datab (351:351:351) (441:441:441)) + (PORT datac (559:559:559) (589:589:589)) + (PORT datad (265:265:265) (282:282:282)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_ba\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector22\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1287:1287:1287) (1310:1310:1310)) + (PORT datab (1337:1337:1337) (1299:1299:1299)) + (PORT datac (1130:1130:1130) (1085:1085:1085)) + (PORT datad (1193:1193:1193) (1221:1221:1221)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|WideOr7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (392:392:392) (495:495:495)) + (PORT datab (638:638:638) (652:652:652)) + (PORT datac (508:508:508) (548:548:548)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector11\~0) + (DELAY + (ABSOLUTE + (PORT dataa (291:291:291) (330:330:330)) + (PORT datab (290:290:290) (322:322:322)) + (PORT datad (561:561:561) (586:586:586)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_addr\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (367:367:367) (452:452:452)) + (PORT datab (344:344:344) (427:427:427)) + (PORT datad (2522:2522:2522) (2390:2390:2390)) + (IOPATH dataa combout (421:421:421) (428:428:428)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_ACTIVE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (871:871:871) (856:856:856)) + (PORT datab (1264:1264:1264) (1204:1204:1204)) + (PORT datac (366:366:366) (479:479:479)) + (PORT datad (340:340:340) (426:426:426)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector10\~1) + (DELAY + (ABSOLUTE + (PORT dataa (578:578:578) (552:552:552)) + (PORT datab (511:511:511) (489:489:489)) + (PORT datac (370:370:370) (484:484:484)) + (PORT datad (239:239:239) (258:258:258)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_addr\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector12\~0) + (DELAY + (ABSOLUTE + (PORT dataa (334:334:334) (416:416:416)) + (PORT datab (373:373:373) (480:480:480)) + (PORT datac (830:830:830) (817:817:817)) + (PORT datad (1188:1188:1188) (1216:1216:1216)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector12\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1289:1289:1289) (1312:1312:1312)) + (PORT datab (1157:1157:1157) (1184:1184:1184)) + (PORT datac (790:790:790) (769:769:769)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) +) diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_min_1200mv_0c_fast.vo b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_min_1200mv_0c_fast.vo new file mode 100644 index 0000000..303316b --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_min_1200mv_0c_fast.vo @@ -0,0 +1,24917 @@ +// Copyright (C) 1991-2013 Altera Corporation +// Your use of Altera Corporation's design tools, logic functions +// and other software and tools, and its AMPP partner logic +// functions, and any output files from any of the foregoing +// (including device programming or simulation files), and any +// associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License +// Subscription Agreement, Altera MegaCore Function License +// Agreement, or other applicable license agreement, including, +// without limitation, that your use is for the sole purpose of +// programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the +// applicable agreement for further details. + +// VENDOR "Altera" +// PROGRAM "Quartus II 64-Bit" +// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version" + +// DATE "06/02/2023 04:26:31" + +// +// Device: Altera EP4CE15F23C8 Package FBGA484 +// + +// +// This Verilog file should be used for ModelSim (Verilog) only +// + +`timescale 1 ps/ 1 ps + +module uart_sdram ( + sys_clk, + sys_rst_n, + rx, + tx, + sdram_clk, + sdram_cke, + sdram_cs_n, + sdram_cas_n, + sdram_ras_n, + sdram_we_n, + sdram_ba, + sdram_addr, + sdram_dqm, + sdram_dq); +input sys_clk; +input sys_rst_n; +input rx; +output tx; +output sdram_clk; +output sdram_cke; +output sdram_cs_n; +output sdram_cas_n; +output sdram_ras_n; +output sdram_we_n; +output [1:0] sdram_ba; +output [12:0] sdram_addr; +output [1:0] sdram_dqm; +inout [15:0] sdram_dq; + +// Design Ports Information +// tx => Location: PIN_U1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_clk => Location: PIN_E5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cke => Location: PIN_M1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cs_n => Location: PIN_A4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_cas_n => Location: PIN_B5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ras_n => Location: PIN_D6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_we_n => Location: PIN_A5, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ba[0] => Location: PIN_B4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_ba[1] => Location: PIN_C4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[0] => Location: PIN_B3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[1] => Location: PIN_B1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[2] => Location: PIN_B2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[3] => Location: PIN_C1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[4] => Location: PIN_C2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[5] => Location: PIN_E1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[6] => Location: PIN_F1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[7] => Location: PIN_F2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[8] => Location: PIN_H1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[9] => Location: PIN_N2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[10] => Location: PIN_A3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[11] => Location: PIN_N1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_addr[12] => Location: PIN_M2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dqm[0] => Location: PIN_C6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dqm[1] => Location: PIN_J2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[0] => Location: PIN_B7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[1] => Location: PIN_A7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[2] => Location: PIN_C8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[3] => Location: PIN_B8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[4] => Location: PIN_A8, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[5] => Location: PIN_C7, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[6] => Location: PIN_A6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[7] => Location: PIN_B6, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[8] => Location: PIN_J1, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[9] => Location: PIN_C3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[10] => Location: PIN_D2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[11] => Location: PIN_E3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[12] => Location: PIN_G4, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[13] => Location: PIN_H2, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[14] => Location: PIN_J3, I/O Standard: 2.5 V, Current Strength: Default +// sdram_dq[15] => Location: PIN_J4, I/O Standard: 2.5 V, Current Strength: Default +// sys_clk => Location: PIN_T22, I/O Standard: 2.5 V, Current Strength: Default +// sys_rst_n => Location: PIN_U20, I/O Standard: 2.5 V, Current Strength: Default +// rx => Location: PIN_V1, I/O Standard: 2.5 V, Current Strength: Default + + +wire gnd; +wire vcc; +wire unknown; + +assign gnd = 1'b0; +assign vcc = 1'b1; +assign unknown = 1'bx; + +tri1 devclrn; +tri1 devpor; +tri1 devoe; +// synopsys translate_off +initial $sdf_annotate("uart_sdram_min_1200mv_0c_v_fast.sdo"); +// synopsys translate_on + +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ; +wire \uart_tx_inst|baud_cnt[3]~19_combout ; +wire \uart_tx_inst|baud_cnt[4]~21_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ; +wire \fifo_read_inst|Add2~4_combout ; +wire \Add1~1 ; +wire \Add1~0_combout ; +wire \Add1~3 ; +wire \Add1~2_combout ; +wire \Add1~5 ; +wire \Add1~4_combout ; +wire \Add1~7 ; +wire \Add1~6_combout ; +wire \Add1~9 ; +wire \Add1~8_combout ; +wire \Add1~11 ; +wire \Add1~10_combout ; +wire \Add1~13 ; +wire \Add1~12_combout ; +wire \Add1~15 ; +wire \Add1~14_combout ; +wire \Add1~17 ; +wire \Add1~16_combout ; +wire \Add1~19 ; +wire \Add1~18_combout ; +wire \Add1~21 ; +wire \Add1~20_combout ; +wire \Add1~23 ; +wire \Add1~22_combout ; +wire \Add1~25 ; +wire \Add1~24_combout ; +wire \Add1~27 ; +wire \Add1~26_combout ; +wire \Add1~29 ; +wire \Add1~28_combout ; +wire \Add1~30_combout ; +wire \fifo_read_inst|baud_cnt[1]~15_combout ; +wire \fifo_read_inst|baud_cnt[4]~21_combout ; +wire \fifo_read_inst|baud_cnt[9]~31_combout ; +wire \fifo_read_inst|baud_cnt[11]~35_combout ; +wire \data_num[0]~25 ; +wire \data_num[0]~24_combout ; +wire \data_num[1]~27 ; +wire \data_num[1]~26_combout ; +wire \data_num[2]~29 ; +wire \data_num[2]~28_combout ; +wire \data_num[3]~31 ; +wire \data_num[3]~30_combout ; +wire \data_num[4]~33 ; +wire \data_num[4]~32_combout ; +wire \data_num[5]~35 ; +wire \data_num[5]~34_combout ; +wire \data_num[6]~37 ; +wire \data_num[6]~36_combout ; +wire \data_num[7]~39 ; +wire \data_num[7]~38_combout ; +wire \data_num[8]~41 ; +wire \data_num[8]~40_combout ; +wire \data_num[9]~43 ; +wire \data_num[9]~42_combout ; +wire \data_num[10]~45 ; +wire \data_num[10]~44_combout ; +wire \data_num[11]~47 ; +wire \data_num[11]~46_combout ; +wire \data_num[12]~49 ; +wire \data_num[12]~48_combout ; +wire \data_num[13]~51 ; +wire \data_num[13]~50_combout ; +wire \data_num[14]~53 ; +wire \data_num[14]~52_combout ; +wire \data_num[15]~55 ; +wire \data_num[15]~54_combout ; +wire \data_num[16]~57 ; +wire \data_num[16]~56_combout ; +wire \data_num[17]~59 ; +wire \data_num[17]~58_combout ; +wire \data_num[18]~61 ; +wire \data_num[18]~60_combout ; +wire \data_num[19]~63 ; +wire \data_num[19]~62_combout ; +wire \data_num[20]~65 ; +wire \data_num[20]~64_combout ; +wire \data_num[21]~67 ; +wire \data_num[21]~66_combout ; +wire \data_num[22]~69 ; +wire \data_num[22]~68_combout ; +wire \data_num[23]~70_combout ; +wire \uart_rx_inst|Add1~0_combout ; +wire \uart_rx_inst|Add1~5 ; +wire \uart_rx_inst|Add1~6_combout ; +wire \fifo_read_inst|cnt_read[0]~11 ; +wire \fifo_read_inst|cnt_read[0]~10_combout ; +wire \fifo_read_inst|cnt_read[1]~13 ; +wire \fifo_read_inst|cnt_read[1]~12_combout ; +wire \fifo_read_inst|cnt_read[2]~15 ; +wire \fifo_read_inst|cnt_read[2]~14_combout ; +wire \fifo_read_inst|cnt_read[3]~17 ; +wire \fifo_read_inst|cnt_read[3]~16_combout ; +wire \fifo_read_inst|cnt_read[4]~19 ; +wire \fifo_read_inst|cnt_read[4]~18_combout ; +wire \fifo_read_inst|cnt_read[5]~21 ; +wire \fifo_read_inst|cnt_read[5]~20_combout ; +wire \fifo_read_inst|cnt_read[6]~23 ; +wire \fifo_read_inst|cnt_read[6]~22_combout ; +wire \fifo_read_inst|cnt_read[7]~25 ; +wire \fifo_read_inst|cnt_read[7]~24_combout ; +wire \fifo_read_inst|cnt_read[8]~27 ; +wire \fifo_read_inst|cnt_read[8]~26_combout ; +wire \fifo_read_inst|cnt_read[9]~28_combout ; +wire \uart_rx_inst|baud_cnt[4]~21_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ; +wire \uart_tx_inst|Mux0~0_combout ; +wire \uart_tx_inst|Mux0~1_combout ; +wire \uart_tx_inst|tx~0_combout ; +wire \uart_tx_inst|tx~1_combout ; +wire \uart_tx_inst|tx~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ; +wire \uart_tx_inst|Add1~0_combout ; +wire \uart_tx_inst|Add1~1_combout ; +wire \uart_tx_inst|bit_cnt[3]~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ; +wire \read_valid~q ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ; +wire \uart_tx_inst|Equal1~3_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ; +wire \fifo_read_inst|Equal1~0_combout ; +wire \fifo_read_inst|Equal1~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ; +wire \Equal0~0_combout ; +wire \Equal0~1_combout ; +wire \Equal0~2_combout ; +wire \Equal0~3_combout ; +wire \Equal0~4_combout ; +wire \read_valid~0_combout ; +wire \read_valid~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ; +wire \fifo_read_inst|Equal1~2_combout ; +wire \fifo_read_inst|Equal5~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ; +wire \Equal1~0_combout ; +wire \Equal1~1_combout ; +wire \Equal1~2_combout ; +wire \Equal1~3_combout ; +wire \Equal1~4_combout ; +wire \Equal1~5_combout ; +wire \Equal1~6_combout ; +wire \cnt_wait[8]~0_combout ; +wire \cnt_wait[15]~1_combout ; +wire \cnt_wait[15]~2_combout ; +wire \cnt_wait[14]~3_combout ; +wire \cnt_wait[13]~4_combout ; +wire \cnt_wait[12]~5_combout ; +wire \cnt_wait[9]~6_combout ; +wire \cnt_wait[11]~7_combout ; +wire \cnt_wait[10]~8_combout ; +wire \cnt_wait[8]~9_combout ; +wire \cnt_wait[7]~10_combout ; +wire \cnt_wait[6]~11_combout ; +wire \cnt_wait[5]~12_combout ; +wire \cnt_wait[4]~13_combout ; +wire \cnt_wait[3]~14_combout ; +wire \cnt_wait[2]~15_combout ; +wire \cnt_wait[1]~16_combout ; +wire \cnt_wait[0]~17_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ; +wire \fifo_read_inst|rd_flag~q ; +wire \fifo_read_inst|Equal4~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ; +wire \fifo_read_inst|Equal2~0_combout ; +wire \fifo_read_inst|Equal2~1_combout ; +wire \fifo_read_inst|Equal2~2_combout ; +wire \fifo_read_inst|rd_flag~0_combout ; +wire \uart_rx_inst|bit_cnt~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ; +wire \uart_rx_inst|work_en~q ; +wire \uart_rx_inst|start_nedge~q ; +wire \uart_rx_inst|work_en~0_combout ; +wire \uart_rx_inst|always3~0_combout ; +wire \uart_tx_inst|bit_cnt[0]~5_combout ; +wire \sdram_dq[8]~input_o ; +wire \sdram_dq[9]~input_o ; +wire \sdram_dq[10]~input_o ; +wire \sdram_dq[11]~input_o ; +wire \sdram_dq[12]~input_o ; +wire \sdram_dq[13]~input_o ; +wire \sdram_dq[14]~input_o ; +wire \sdram_dq[15]~input_o ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ; +wire \uart_rx_inst|baud_cnt[0]~13_combout ; +wire \sys_clk~input_o ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ; +wire \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ; +wire \sys_rst_n~input_o ; +wire \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ; +wire \rst_n~0_combout ; +wire \rst_n~0clkctrl_outclk ; +wire \uart_rx_inst|baud_cnt[2]~18 ; +wire \uart_rx_inst|baud_cnt[3]~19_combout ; +wire \uart_rx_inst|baud_cnt[3]~20 ; +wire \uart_rx_inst|baud_cnt[4]~22 ; +wire \uart_rx_inst|baud_cnt[5]~23_combout ; +wire \uart_rx_inst|Equal1~1_combout ; +wire \uart_rx_inst|baud_cnt[5]~24 ; +wire \uart_rx_inst|baud_cnt[6]~25_combout ; +wire \uart_rx_inst|baud_cnt[6]~26 ; +wire \uart_rx_inst|baud_cnt[7]~27_combout ; +wire \uart_rx_inst|baud_cnt[7]~28 ; +wire \uart_rx_inst|baud_cnt[8]~29_combout ; +wire \uart_rx_inst|Equal1~0_combout ; +wire \uart_rx_inst|baud_cnt[8]~30 ; +wire \uart_rx_inst|baud_cnt[9]~31_combout ; +wire \uart_rx_inst|baud_cnt[9]~32 ; +wire \uart_rx_inst|baud_cnt[10]~34 ; +wire \uart_rx_inst|baud_cnt[11]~35_combout ; +wire \uart_rx_inst|Equal1~2_combout ; +wire \uart_rx_inst|baud_cnt[10]~33_combout ; +wire \uart_rx_inst|Equal1~3_combout ; +wire \uart_rx_inst|always5~0_combout ; +wire \uart_rx_inst|baud_cnt[0]~14 ; +wire \uart_rx_inst|baud_cnt[1]~15_combout ; +wire \uart_rx_inst|baud_cnt[1]~16 ; +wire \uart_rx_inst|baud_cnt[2]~17_combout ; +wire \uart_rx_inst|Equal2~0_combout ; +wire \uart_rx_inst|baud_cnt[11]~36 ; +wire \uart_rx_inst|baud_cnt[12]~37_combout ; +wire \uart_rx_inst|Equal2~1_combout ; +wire \uart_rx_inst|Equal2~2_combout ; +wire \uart_rx_inst|bit_flag~q ; +wire \uart_rx_inst|Add1~1 ; +wire \uart_rx_inst|Add1~3 ; +wire \uart_rx_inst|Add1~4_combout ; +wire \uart_rx_inst|Add1~2_combout ; +wire \uart_rx_inst|always4~0_combout ; +wire \uart_rx_inst|always4~1_combout ; +wire \uart_rx_inst|rx_flag~q ; +wire \uart_rx_inst|po_flag~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ; +wire \fifo_read_inst|read_en_dly~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ; +wire \fifo_read_inst|Add2~0_combout ; +wire \fifo_read_inst|Add2~1 ; +wire \fifo_read_inst|Add2~3 ; +wire \fifo_read_inst|Add2~5 ; +wire \fifo_read_inst|Add2~6_combout ; +wire \fifo_read_inst|bit_cnt~0_combout ; +wire \fifo_read_inst|baud_cnt[0]~13_combout ; +wire \fifo_read_inst|baud_cnt[5]~24 ; +wire \fifo_read_inst|baud_cnt[6]~25_combout ; +wire \fifo_read_inst|baud_cnt[6]~26 ; +wire \fifo_read_inst|baud_cnt[7]~27_combout ; +wire \fifo_read_inst|baud_cnt[7]~28 ; +wire \fifo_read_inst|baud_cnt[8]~29_combout ; +wire \fifo_read_inst|Equal4~0_combout ; +wire \fifo_read_inst|baud_cnt[3]~19_combout ; +wire \fifo_read_inst|Equal4~1_combout ; +wire \fifo_read_inst|baud_cnt[8]~30 ; +wire \fifo_read_inst|baud_cnt[9]~32 ; +wire \fifo_read_inst|baud_cnt[10]~33_combout ; +wire \fifo_read_inst|baud_cnt[10]~34 ; +wire \fifo_read_inst|baud_cnt[11]~36 ; +wire \fifo_read_inst|baud_cnt[12]~37_combout ; +wire \fifo_read_inst|Equal4~3_combout ; +wire \fifo_read_inst|baud_cnt[0]~14 ; +wire \fifo_read_inst|baud_cnt[1]~16 ; +wire \fifo_read_inst|baud_cnt[2]~17_combout ; +wire \fifo_read_inst|baud_cnt[2]~18 ; +wire \fifo_read_inst|baud_cnt[3]~20 ; +wire \fifo_read_inst|baud_cnt[4]~22 ; +wire \fifo_read_inst|baud_cnt[5]~23_combout ; +wire \fifo_read_inst|Equal5~0_combout ; +wire \fifo_read_inst|Equal5~2_combout ; +wire \fifo_read_inst|bit_flag~q ; +wire \fifo_read_inst|Add2~2_combout ; +wire \fifo_read_inst|bit_cnt~1_combout ; +wire \fifo_read_inst|always5~0_combout ; +wire \fifo_read_inst|always5~1_combout ; +wire \fifo_read_inst|rd_en~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ; +wire \Equal2~1_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ; +wire \fifo_read_inst|read_en~0_combout ; +wire \fifo_read_inst|read_en~1_combout ; +wire \fifo_read_inst|read_en~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ; +wire \Equal2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ; +wire \rx~input_o ; +wire \uart_rx_inst|rx_reg1~0_combout ; +wire \uart_rx_inst|rx_reg1~q ; +wire \uart_rx_inst|rx_reg2~feeder_combout ; +wire \uart_rx_inst|rx_reg2~q ; +wire \uart_rx_inst|rx_reg3~feeder_combout ; +wire \uart_rx_inst|rx_reg3~q ; +wire \uart_rx_inst|rx_data[7]~0_combout ; +wire \uart_rx_inst|bit_cnt~0_combout ; +wire \uart_rx_inst|always8~0_combout ; +wire \uart_rx_inst|rx_data[5]~feeder_combout ; +wire \uart_rx_inst|rx_data[4]~feeder_combout ; +wire \uart_rx_inst|rx_data[3]~feeder_combout ; +wire \uart_rx_inst|rx_data[2]~feeder_combout ; +wire \uart_rx_inst|rx_data[1]~feeder_combout ; +wire \uart_rx_inst|rx_data[0]~feeder_combout ; +wire \uart_rx_inst|po_data[0]~feeder_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ; +wire \uart_rx_inst|po_data[1]~feeder_combout ; +wire \uart_rx_inst|po_data[2]~feeder_combout ; +wire \uart_rx_inst|po_data[3]~feeder_combout ; +wire \uart_rx_inst|po_data[4]~feeder_combout ; +wire \uart_rx_inst|po_data[5]~feeder_combout ; +wire \uart_rx_inst|po_data[6]~feeder_combout ; +wire \~GND~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ; +wire \sys_clk~inputclkctrl_outclk ; +wire \uart_tx_inst|baud_cnt[0]~13_combout ; +wire \uart_tx_inst|baud_cnt[11]~35_combout ; +wire \uart_tx_inst|Equal1~0_combout ; +wire \uart_tx_inst|baud_cnt[9]~31_combout ; +wire \uart_tx_inst|Equal1~1_combout ; +wire \uart_tx_inst|baud_cnt[1]~15_combout ; +wire \uart_tx_inst|Equal1~2_combout ; +wire \fifo_read_inst|tx_flag~q ; +wire \uart_tx_inst|always3~0_combout ; +wire \uart_tx_inst|bit_cnt[1]~2_combout ; +wire \uart_tx_inst|bit_cnt[2]~3_combout ; +wire \uart_tx_inst|always0~1_combout ; +wire \uart_tx_inst|work_en~0_combout ; +wire \uart_tx_inst|work_en~q ; +wire \uart_tx_inst|always1~0_combout ; +wire \uart_tx_inst|baud_cnt[0]~14 ; +wire \uart_tx_inst|baud_cnt[1]~16 ; +wire \uart_tx_inst|baud_cnt[2]~17_combout ; +wire \uart_tx_inst|baud_cnt[2]~18 ; +wire \uart_tx_inst|baud_cnt[3]~20 ; +wire \uart_tx_inst|baud_cnt[4]~22 ; +wire \uart_tx_inst|baud_cnt[5]~23_combout ; +wire \uart_tx_inst|baud_cnt[5]~24 ; +wire \uart_tx_inst|baud_cnt[6]~25_combout ; +wire \uart_tx_inst|baud_cnt[6]~26 ; +wire \uart_tx_inst|baud_cnt[7]~27_combout ; +wire \uart_tx_inst|baud_cnt[7]~28 ; +wire \uart_tx_inst|baud_cnt[8]~29_combout ; +wire \uart_tx_inst|baud_cnt[8]~30 ; +wire \uart_tx_inst|baud_cnt[9]~32 ; +wire \uart_tx_inst|baud_cnt[10]~33_combout ; +wire \uart_tx_inst|baud_cnt[10]~34 ; +wire \uart_tx_inst|baud_cnt[11]~36 ; +wire \uart_tx_inst|baud_cnt[12]~37_combout ; +wire \uart_tx_inst|Equal2~0_combout ; +wire \uart_tx_inst|Equal2~1_combout ; +wire \uart_tx_inst|bit_flag~q ; +wire \uart_tx_inst|always0~0_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ; +wire \sdram_dq[0]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ; +wire \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ; +wire \sdram_dq[1]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ; +wire \sdram_dq[2]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout ; +wire \sdram_dq[3]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ; +wire \sdram_dq[4]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ; +wire \sdram_dq[5]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout ; +wire \sdram_dq[6]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ; +wire \sdram_dq[7]~input_o ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT ; +wire \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ; +wire \uart_tx_inst|tx~4_combout ; +wire \uart_tx_inst|tx~3_combout ; +wire \uart_tx_inst|tx~5_combout ; +wire \uart_tx_inst|tx~q ; +wire \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ; +wire \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a ; +wire [15:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit ; +wire [23:0] data_num; +wire [15:0] cnt_wait; +wire [4:0] \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk ; +wire [7:0] \uart_rx_inst|rx_data ; +wire [7:0] \uart_rx_inst|po_data ; +wire [3:0] \uart_rx_inst|bit_cnt ; +wire [12:0] \uart_rx_inst|baud_cnt ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g ; +wire [9:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a ; +wire [2:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a ; +wire [15:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a ; +wire [10:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref ; +wire [2:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk ; +wire [14:0] \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us ; +wire [2:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd ; +wire [1:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba ; +wire [12:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk ; +wire [3:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd ; +wire [12:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr ; +wire [15:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg ; +wire [9:0] \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk ; +wire [9:0] \fifo_read_inst|cnt_read ; +wire [3:0] \fifo_read_inst|bit_cnt ; +wire [12:0] \fifo_read_inst|baud_cnt ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit ; +wire [7:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b ; +wire [9:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit ; +wire [3:0] \uart_tx_inst|bit_cnt ; +wire [12:0] \uart_tx_inst|baud_cnt ; + +wire [4:0] \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus ; +wire [8:0] \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus ; +wire [8:0] \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus ; + +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [0] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [0]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [1] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [1]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [2] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [2]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [3] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [3]; +assign \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [4] = \clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus [4]; + +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [0]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [1]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [2]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [3]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [4] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [4]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [5]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [6]; +assign \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7] = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus [7]; + +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [6]; +assign \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7] = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [7]; + +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [6]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [7]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [8] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus [8]; + +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [9] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [0]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [10] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [1]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [11] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [2]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [12] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [3]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [13] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [4]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [14] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [5]; +assign \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [15] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus [6]; + +// Location: M9K_X25_Y18_N0 +cycloneive_ram_block \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 ( + .portawe(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .ena0(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .ena1(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({gnd,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0]}), + .portaaddr({\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2], +\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1],\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk0_core_clock_enable = "ena0"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk1_core_clock_enable = "ena1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .clk1_input_clock_enable = "ena1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .data_interleave_offset_in_bits = 1; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .data_interleave_width_in_bits = 1; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .logical_ram_name = "fifo_read:fifo_read_inst|read_fifo:read_fifo_inst|scfifo:scfifo_component|scfifo_un21:auto_generated|a_dpfifo_5u21:dpfifo|dpram_d811:FIFOram|altsyncram_c3k1:altsyncram1|ALTSYNCRAM"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .operation_mode = "dual_port"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_address_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_address_width = 10; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_byte_enable_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_out_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_out_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_data_width = 9; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_first_address = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_first_bit_number = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_last_address = 1023; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_logical_ram_depth = 1024; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_logical_ram_width = 8; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_clock = "clock1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_address_width = 10; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_out_clear = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_out_clock = "none"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_data_width = 9; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_first_address = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_first_bit_number = 0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_last_address = 1023; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_logical_ram_depth = 1024; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_logical_ram_width = 8; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .port_b_read_enable_clock = "clock1"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: FF_X24_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y21_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y18_N11 +dffeas \uart_tx_inst|baud_cnt[3] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y18_N13 +dffeas \uart_tx_inst|baud_cnt[4] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0] & ((GND) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0] $ (GND))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 .lut_mask = 16'h66BB; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N10 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[3]~19 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[3]~19_combout = (\uart_tx_inst|baud_cnt [3] & (!\uart_tx_inst|baud_cnt[2]~18 )) # (!\uart_tx_inst|baud_cnt [3] & ((\uart_tx_inst|baud_cnt[2]~18 ) # (GND))) +// \uart_tx_inst|baud_cnt[3]~20 = CARRY((!\uart_tx_inst|baud_cnt[2]~18 ) # (!\uart_tx_inst|baud_cnt [3])) + + .dataa(\uart_tx_inst|baud_cnt [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[2]~18 ), + .combout(\uart_tx_inst|baud_cnt[3]~19_combout ), + .cout(\uart_tx_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[3]~19 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[4]~21 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[4]~21_combout = (\uart_tx_inst|baud_cnt [4] & (\uart_tx_inst|baud_cnt[3]~20 $ (GND))) # (!\uart_tx_inst|baud_cnt [4] & (!\uart_tx_inst|baud_cnt[3]~20 & VCC)) +// \uart_tx_inst|baud_cnt[4]~22 = CARRY((\uart_tx_inst|baud_cnt [4] & !\uart_tx_inst|baud_cnt[3]~20 )) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[3]~20 ), + .combout(\uart_tx_inst|baud_cnt[4]~21_combout ), + .cout(\uart_tx_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \uart_tx_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [13] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N8 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7] $ (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ) # (VCC))))) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]) # ((GND)))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 .lut_mask = 16'h5A6F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & ((VCC)))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] $ (((VCC) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] $ (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 .lut_mask = 16'hA509; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N7 +dffeas \fifo_read_inst|baud_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N13 +dffeas \fifo_read_inst|baud_cnt[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N23 +dffeas \fifo_read_inst|baud_cnt[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N27 +dffeas \fifo_read_inst|baud_cnt[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N12 +cycloneive_lcell_comb \fifo_read_inst|Add2~4 ( +// Equation(s): +// \fifo_read_inst|Add2~4_combout = (\fifo_read_inst|bit_cnt [2] & (\fifo_read_inst|Add2~3 $ (GND))) # (!\fifo_read_inst|bit_cnt [2] & (!\fifo_read_inst|Add2~3 & VCC)) +// \fifo_read_inst|Add2~5 = CARRY((\fifo_read_inst|bit_cnt [2] & !\fifo_read_inst|Add2~3 )) + + .dataa(\fifo_read_inst|bit_cnt [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|Add2~3 ), + .combout(\fifo_read_inst|Add2~4_combout ), + .cout(\fifo_read_inst|Add2~5 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~4 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|Add2~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y24_N9 +dffeas \data_num[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[0]~24_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[0]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[0] .is_wysiwyg = "true"; +defparam \data_num[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N13 +dffeas \data_num[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[2]~28_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[2]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[2] .is_wysiwyg = "true"; +defparam \data_num[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N11 +dffeas \data_num[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[1]~26_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[1]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[1] .is_wysiwyg = "true"; +defparam \data_num[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N15 +dffeas \data_num[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[3]~30_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[3]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[3] .is_wysiwyg = "true"; +defparam \data_num[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N17 +dffeas \data_num[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[4]~32_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[4]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[4] .is_wysiwyg = "true"; +defparam \data_num[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N19 +dffeas \data_num[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[5]~34_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[5]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[5] .is_wysiwyg = "true"; +defparam \data_num[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N21 +dffeas \data_num[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[6]~36_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[6]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[6] .is_wysiwyg = "true"; +defparam \data_num[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N23 +dffeas \data_num[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[7]~38_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[7]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[7] .is_wysiwyg = "true"; +defparam \data_num[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N25 +dffeas \data_num[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[8]~40_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[8]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[8] .is_wysiwyg = "true"; +defparam \data_num[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N27 +dffeas \data_num[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[9]~42_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[9]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[9] .is_wysiwyg = "true"; +defparam \data_num[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N29 +dffeas \data_num[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[10]~44_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[10]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[10] .is_wysiwyg = "true"; +defparam \data_num[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y24_N31 +dffeas \data_num[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[11]~46_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[11]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[11] .is_wysiwyg = "true"; +defparam \data_num[11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N1 +dffeas \data_num[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[12]~48_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[12]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[12] .is_wysiwyg = "true"; +defparam \data_num[12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N3 +dffeas \data_num[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[13]~50_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[13]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[13] .is_wysiwyg = "true"; +defparam \data_num[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N5 +dffeas \data_num[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[14]~52_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[14]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[14] .is_wysiwyg = "true"; +defparam \data_num[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N7 +dffeas \data_num[15] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[15]~54_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[15]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[15] .is_wysiwyg = "true"; +defparam \data_num[15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N9 +dffeas \data_num[16] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[16]~56_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[16]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[16] .is_wysiwyg = "true"; +defparam \data_num[16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N11 +dffeas \data_num[17] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[17]~58_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[17]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[17] .is_wysiwyg = "true"; +defparam \data_num[17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N13 +dffeas \data_num[18] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[18]~60_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[18]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[18] .is_wysiwyg = "true"; +defparam \data_num[18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N15 +dffeas \data_num[19] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[19]~62_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[19]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[19] .is_wysiwyg = "true"; +defparam \data_num[19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N17 +dffeas \data_num[20] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[20]~64_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[20]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[20] .is_wysiwyg = "true"; +defparam \data_num[20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N19 +dffeas \data_num[21] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[21]~66_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[21]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[21] .is_wysiwyg = "true"; +defparam \data_num[21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N21 +dffeas \data_num[22] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[22]~68_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[22]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[22] .is_wysiwyg = "true"; +defparam \data_num[22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y23_N23 +dffeas \data_num[23] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\data_num[23]~70_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\read_valid~q ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(data_num[23]), + .prn(vcc)); +// synopsys translate_off +defparam \data_num[23] .is_wysiwyg = "true"; +defparam \data_num[23] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N0 +cycloneive_lcell_comb \Add1~0 ( +// Equation(s): +// \Add1~0_combout = cnt_wait[0] $ (VCC) +// \Add1~1 = CARRY(cnt_wait[0]) + + .dataa(gnd), + .datab(cnt_wait[0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\Add1~0_combout ), + .cout(\Add1~1 )); +// synopsys translate_off +defparam \Add1~0 .lut_mask = 16'h33CC; +defparam \Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N2 +cycloneive_lcell_comb \Add1~2 ( +// Equation(s): +// \Add1~2_combout = (cnt_wait[1] & (!\Add1~1 )) # (!cnt_wait[1] & ((\Add1~1 ) # (GND))) +// \Add1~3 = CARRY((!\Add1~1 ) # (!cnt_wait[1])) + + .dataa(cnt_wait[1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~1 ), + .combout(\Add1~2_combout ), + .cout(\Add1~3 )); +// synopsys translate_off +defparam \Add1~2 .lut_mask = 16'h5A5F; +defparam \Add1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N4 +cycloneive_lcell_comb \Add1~4 ( +// Equation(s): +// \Add1~4_combout = (cnt_wait[2] & (\Add1~3 $ (GND))) # (!cnt_wait[2] & (!\Add1~3 & VCC)) +// \Add1~5 = CARRY((cnt_wait[2] & !\Add1~3 )) + + .dataa(gnd), + .datab(cnt_wait[2]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~3 ), + .combout(\Add1~4_combout ), + .cout(\Add1~5 )); +// synopsys translate_off +defparam \Add1~4 .lut_mask = 16'hC30C; +defparam \Add1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N6 +cycloneive_lcell_comb \Add1~6 ( +// Equation(s): +// \Add1~6_combout = (cnt_wait[3] & (!\Add1~5 )) # (!cnt_wait[3] & ((\Add1~5 ) # (GND))) +// \Add1~7 = CARRY((!\Add1~5 ) # (!cnt_wait[3])) + + .dataa(gnd), + .datab(cnt_wait[3]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~5 ), + .combout(\Add1~6_combout ), + .cout(\Add1~7 )); +// synopsys translate_off +defparam \Add1~6 .lut_mask = 16'h3C3F; +defparam \Add1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N8 +cycloneive_lcell_comb \Add1~8 ( +// Equation(s): +// \Add1~8_combout = (cnt_wait[4] & (\Add1~7 $ (GND))) # (!cnt_wait[4] & (!\Add1~7 & VCC)) +// \Add1~9 = CARRY((cnt_wait[4] & !\Add1~7 )) + + .dataa(cnt_wait[4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~7 ), + .combout(\Add1~8_combout ), + .cout(\Add1~9 )); +// synopsys translate_off +defparam \Add1~8 .lut_mask = 16'hA50A; +defparam \Add1~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N10 +cycloneive_lcell_comb \Add1~10 ( +// Equation(s): +// \Add1~10_combout = (cnt_wait[5] & (!\Add1~9 )) # (!cnt_wait[5] & ((\Add1~9 ) # (GND))) +// \Add1~11 = CARRY((!\Add1~9 ) # (!cnt_wait[5])) + + .dataa(cnt_wait[5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~9 ), + .combout(\Add1~10_combout ), + .cout(\Add1~11 )); +// synopsys translate_off +defparam \Add1~10 .lut_mask = 16'h5A5F; +defparam \Add1~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N12 +cycloneive_lcell_comb \Add1~12 ( +// Equation(s): +// \Add1~12_combout = (cnt_wait[6] & (\Add1~11 $ (GND))) # (!cnt_wait[6] & (!\Add1~11 & VCC)) +// \Add1~13 = CARRY((cnt_wait[6] & !\Add1~11 )) + + .dataa(cnt_wait[6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~11 ), + .combout(\Add1~12_combout ), + .cout(\Add1~13 )); +// synopsys translate_off +defparam \Add1~12 .lut_mask = 16'hA50A; +defparam \Add1~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N14 +cycloneive_lcell_comb \Add1~14 ( +// Equation(s): +// \Add1~14_combout = (cnt_wait[7] & (!\Add1~13 )) # (!cnt_wait[7] & ((\Add1~13 ) # (GND))) +// \Add1~15 = CARRY((!\Add1~13 ) # (!cnt_wait[7])) + + .dataa(cnt_wait[7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~13 ), + .combout(\Add1~14_combout ), + .cout(\Add1~15 )); +// synopsys translate_off +defparam \Add1~14 .lut_mask = 16'h5A5F; +defparam \Add1~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N16 +cycloneive_lcell_comb \Add1~16 ( +// Equation(s): +// \Add1~16_combout = (cnt_wait[8] & (\Add1~15 $ (GND))) # (!cnt_wait[8] & (!\Add1~15 & VCC)) +// \Add1~17 = CARRY((cnt_wait[8] & !\Add1~15 )) + + .dataa(cnt_wait[8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~15 ), + .combout(\Add1~16_combout ), + .cout(\Add1~17 )); +// synopsys translate_off +defparam \Add1~16 .lut_mask = 16'hA50A; +defparam \Add1~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N18 +cycloneive_lcell_comb \Add1~18 ( +// Equation(s): +// \Add1~18_combout = (cnt_wait[9] & (!\Add1~17 )) # (!cnt_wait[9] & ((\Add1~17 ) # (GND))) +// \Add1~19 = CARRY((!\Add1~17 ) # (!cnt_wait[9])) + + .dataa(gnd), + .datab(cnt_wait[9]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~17 ), + .combout(\Add1~18_combout ), + .cout(\Add1~19 )); +// synopsys translate_off +defparam \Add1~18 .lut_mask = 16'h3C3F; +defparam \Add1~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N20 +cycloneive_lcell_comb \Add1~20 ( +// Equation(s): +// \Add1~20_combout = (cnt_wait[10] & (\Add1~19 $ (GND))) # (!cnt_wait[10] & (!\Add1~19 & VCC)) +// \Add1~21 = CARRY((cnt_wait[10] & !\Add1~19 )) + + .dataa(cnt_wait[10]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~19 ), + .combout(\Add1~20_combout ), + .cout(\Add1~21 )); +// synopsys translate_off +defparam \Add1~20 .lut_mask = 16'hA50A; +defparam \Add1~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N22 +cycloneive_lcell_comb \Add1~22 ( +// Equation(s): +// \Add1~22_combout = (cnt_wait[11] & (!\Add1~21 )) # (!cnt_wait[11] & ((\Add1~21 ) # (GND))) +// \Add1~23 = CARRY((!\Add1~21 ) # (!cnt_wait[11])) + + .dataa(gnd), + .datab(cnt_wait[11]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~21 ), + .combout(\Add1~22_combout ), + .cout(\Add1~23 )); +// synopsys translate_off +defparam \Add1~22 .lut_mask = 16'h3C3F; +defparam \Add1~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N24 +cycloneive_lcell_comb \Add1~24 ( +// Equation(s): +// \Add1~24_combout = (cnt_wait[12] & (\Add1~23 $ (GND))) # (!cnt_wait[12] & (!\Add1~23 & VCC)) +// \Add1~25 = CARRY((cnt_wait[12] & !\Add1~23 )) + + .dataa(gnd), + .datab(cnt_wait[12]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~23 ), + .combout(\Add1~24_combout ), + .cout(\Add1~25 )); +// synopsys translate_off +defparam \Add1~24 .lut_mask = 16'hC30C; +defparam \Add1~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N26 +cycloneive_lcell_comb \Add1~26 ( +// Equation(s): +// \Add1~26_combout = (cnt_wait[13] & (!\Add1~25 )) # (!cnt_wait[13] & ((\Add1~25 ) # (GND))) +// \Add1~27 = CARRY((!\Add1~25 ) # (!cnt_wait[13])) + + .dataa(gnd), + .datab(cnt_wait[13]), + .datac(gnd), + .datad(vcc), + .cin(\Add1~25 ), + .combout(\Add1~26_combout ), + .cout(\Add1~27 )); +// synopsys translate_off +defparam \Add1~26 .lut_mask = 16'h3C3F; +defparam \Add1~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N28 +cycloneive_lcell_comb \Add1~28 ( +// Equation(s): +// \Add1~28_combout = (cnt_wait[14] & (\Add1~27 $ (GND))) # (!cnt_wait[14] & (!\Add1~27 & VCC)) +// \Add1~29 = CARRY((cnt_wait[14] & !\Add1~27 )) + + .dataa(cnt_wait[14]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\Add1~27 ), + .combout(\Add1~28_combout ), + .cout(\Add1~29 )); +// synopsys translate_off +defparam \Add1~28 .lut_mask = 16'hA50A; +defparam \Add1~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y26_N30 +cycloneive_lcell_comb \Add1~30 ( +// Equation(s): +// \Add1~30_combout = \Add1~29 $ (cnt_wait[15]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(cnt_wait[15]), + .cin(\Add1~29 ), + .combout(\Add1~30_combout ), + .cout()); +// synopsys translate_off +defparam \Add1~30 .lut_mask = 16'h0FF0; +defparam \Add1~30 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N6 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[1]~15 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[1]~15_combout = (\fifo_read_inst|baud_cnt [1] & (!\fifo_read_inst|baud_cnt[0]~14 )) # (!\fifo_read_inst|baud_cnt [1] & ((\fifo_read_inst|baud_cnt[0]~14 ) # (GND))) +// \fifo_read_inst|baud_cnt[1]~16 = CARRY((!\fifo_read_inst|baud_cnt[0]~14 ) # (!\fifo_read_inst|baud_cnt [1])) + + .dataa(\fifo_read_inst|baud_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[0]~14 ), + .combout(\fifo_read_inst|baud_cnt[1]~15_combout ), + .cout(\fifo_read_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[1]~15 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N12 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[4]~21 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[4]~21_combout = (\fifo_read_inst|baud_cnt [4] & (\fifo_read_inst|baud_cnt[3]~20 $ (GND))) # (!\fifo_read_inst|baud_cnt [4] & (!\fifo_read_inst|baud_cnt[3]~20 & VCC)) +// \fifo_read_inst|baud_cnt[4]~22 = CARRY((\fifo_read_inst|baud_cnt [4] & !\fifo_read_inst|baud_cnt[3]~20 )) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[3]~20 ), + .combout(\fifo_read_inst|baud_cnt[4]~21_combout ), + .cout(\fifo_read_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N22 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[9]~31 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[9]~31_combout = (\fifo_read_inst|baud_cnt [9] & (!\fifo_read_inst|baud_cnt[8]~30 )) # (!\fifo_read_inst|baud_cnt [9] & ((\fifo_read_inst|baud_cnt[8]~30 ) # (GND))) +// \fifo_read_inst|baud_cnt[9]~32 = CARRY((!\fifo_read_inst|baud_cnt[8]~30 ) # (!\fifo_read_inst|baud_cnt [9])) + + .dataa(\fifo_read_inst|baud_cnt [9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[8]~30 ), + .combout(\fifo_read_inst|baud_cnt[9]~31_combout ), + .cout(\fifo_read_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[9]~31 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N26 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[11]~35 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[11]~35_combout = (\fifo_read_inst|baud_cnt [11] & (!\fifo_read_inst|baud_cnt[10]~34 )) # (!\fifo_read_inst|baud_cnt [11] & ((\fifo_read_inst|baud_cnt[10]~34 ) # (GND))) +// \fifo_read_inst|baud_cnt[11]~36 = CARRY((!\fifo_read_inst|baud_cnt[10]~34 ) # (!\fifo_read_inst|baud_cnt [11])) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[10]~34 ), + .combout(\fifo_read_inst|baud_cnt[11]~35_combout ), + .cout(\fifo_read_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[11]~35 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N8 +cycloneive_lcell_comb \data_num[0]~24 ( +// Equation(s): +// \data_num[0]~24_combout = (\uart_rx_inst|po_flag~q & (data_num[0] $ (VCC))) # (!\uart_rx_inst|po_flag~q & (data_num[0] & VCC)) +// \data_num[0]~25 = CARRY((\uart_rx_inst|po_flag~q & data_num[0])) + + .dataa(\uart_rx_inst|po_flag~q ), + .datab(data_num[0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\data_num[0]~24_combout ), + .cout(\data_num[0]~25 )); +// synopsys translate_off +defparam \data_num[0]~24 .lut_mask = 16'h6688; +defparam \data_num[0]~24 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N10 +cycloneive_lcell_comb \data_num[1]~26 ( +// Equation(s): +// \data_num[1]~26_combout = (data_num[1] & (!\data_num[0]~25 )) # (!data_num[1] & ((\data_num[0]~25 ) # (GND))) +// \data_num[1]~27 = CARRY((!\data_num[0]~25 ) # (!data_num[1])) + + .dataa(data_num[1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[0]~25 ), + .combout(\data_num[1]~26_combout ), + .cout(\data_num[1]~27 )); +// synopsys translate_off +defparam \data_num[1]~26 .lut_mask = 16'h5A5F; +defparam \data_num[1]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N12 +cycloneive_lcell_comb \data_num[2]~28 ( +// Equation(s): +// \data_num[2]~28_combout = (data_num[2] & (\data_num[1]~27 $ (GND))) # (!data_num[2] & (!\data_num[1]~27 & VCC)) +// \data_num[2]~29 = CARRY((data_num[2] & !\data_num[1]~27 )) + + .dataa(data_num[2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[1]~27 ), + .combout(\data_num[2]~28_combout ), + .cout(\data_num[2]~29 )); +// synopsys translate_off +defparam \data_num[2]~28 .lut_mask = 16'hA50A; +defparam \data_num[2]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N14 +cycloneive_lcell_comb \data_num[3]~30 ( +// Equation(s): +// \data_num[3]~30_combout = (data_num[3] & (!\data_num[2]~29 )) # (!data_num[3] & ((\data_num[2]~29 ) # (GND))) +// \data_num[3]~31 = CARRY((!\data_num[2]~29 ) # (!data_num[3])) + + .dataa(gnd), + .datab(data_num[3]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[2]~29 ), + .combout(\data_num[3]~30_combout ), + .cout(\data_num[3]~31 )); +// synopsys translate_off +defparam \data_num[3]~30 .lut_mask = 16'h3C3F; +defparam \data_num[3]~30 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N16 +cycloneive_lcell_comb \data_num[4]~32 ( +// Equation(s): +// \data_num[4]~32_combout = (data_num[4] & (\data_num[3]~31 $ (GND))) # (!data_num[4] & (!\data_num[3]~31 & VCC)) +// \data_num[4]~33 = CARRY((data_num[4] & !\data_num[3]~31 )) + + .dataa(gnd), + .datab(data_num[4]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[3]~31 ), + .combout(\data_num[4]~32_combout ), + .cout(\data_num[4]~33 )); +// synopsys translate_off +defparam \data_num[4]~32 .lut_mask = 16'hC30C; +defparam \data_num[4]~32 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N18 +cycloneive_lcell_comb \data_num[5]~34 ( +// Equation(s): +// \data_num[5]~34_combout = (data_num[5] & (!\data_num[4]~33 )) # (!data_num[5] & ((\data_num[4]~33 ) # (GND))) +// \data_num[5]~35 = CARRY((!\data_num[4]~33 ) # (!data_num[5])) + + .dataa(gnd), + .datab(data_num[5]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[4]~33 ), + .combout(\data_num[5]~34_combout ), + .cout(\data_num[5]~35 )); +// synopsys translate_off +defparam \data_num[5]~34 .lut_mask = 16'h3C3F; +defparam \data_num[5]~34 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N20 +cycloneive_lcell_comb \data_num[6]~36 ( +// Equation(s): +// \data_num[6]~36_combout = (data_num[6] & (\data_num[5]~35 $ (GND))) # (!data_num[6] & (!\data_num[5]~35 & VCC)) +// \data_num[6]~37 = CARRY((data_num[6] & !\data_num[5]~35 )) + + .dataa(gnd), + .datab(data_num[6]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[5]~35 ), + .combout(\data_num[6]~36_combout ), + .cout(\data_num[6]~37 )); +// synopsys translate_off +defparam \data_num[6]~36 .lut_mask = 16'hC30C; +defparam \data_num[6]~36 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N22 +cycloneive_lcell_comb \data_num[7]~38 ( +// Equation(s): +// \data_num[7]~38_combout = (data_num[7] & (!\data_num[6]~37 )) # (!data_num[7] & ((\data_num[6]~37 ) # (GND))) +// \data_num[7]~39 = CARRY((!\data_num[6]~37 ) # (!data_num[7])) + + .dataa(data_num[7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[6]~37 ), + .combout(\data_num[7]~38_combout ), + .cout(\data_num[7]~39 )); +// synopsys translate_off +defparam \data_num[7]~38 .lut_mask = 16'h5A5F; +defparam \data_num[7]~38 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N24 +cycloneive_lcell_comb \data_num[8]~40 ( +// Equation(s): +// \data_num[8]~40_combout = (data_num[8] & (\data_num[7]~39 $ (GND))) # (!data_num[8] & (!\data_num[7]~39 & VCC)) +// \data_num[8]~41 = CARRY((data_num[8] & !\data_num[7]~39 )) + + .dataa(gnd), + .datab(data_num[8]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[7]~39 ), + .combout(\data_num[8]~40_combout ), + .cout(\data_num[8]~41 )); +// synopsys translate_off +defparam \data_num[8]~40 .lut_mask = 16'hC30C; +defparam \data_num[8]~40 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N26 +cycloneive_lcell_comb \data_num[9]~42 ( +// Equation(s): +// \data_num[9]~42_combout = (data_num[9] & (!\data_num[8]~41 )) # (!data_num[9] & ((\data_num[8]~41 ) # (GND))) +// \data_num[9]~43 = CARRY((!\data_num[8]~41 ) # (!data_num[9])) + + .dataa(data_num[9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[8]~41 ), + .combout(\data_num[9]~42_combout ), + .cout(\data_num[9]~43 )); +// synopsys translate_off +defparam \data_num[9]~42 .lut_mask = 16'h5A5F; +defparam \data_num[9]~42 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N28 +cycloneive_lcell_comb \data_num[10]~44 ( +// Equation(s): +// \data_num[10]~44_combout = (data_num[10] & (\data_num[9]~43 $ (GND))) # (!data_num[10] & (!\data_num[9]~43 & VCC)) +// \data_num[10]~45 = CARRY((data_num[10] & !\data_num[9]~43 )) + + .dataa(gnd), + .datab(data_num[10]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[9]~43 ), + .combout(\data_num[10]~44_combout ), + .cout(\data_num[10]~45 )); +// synopsys translate_off +defparam \data_num[10]~44 .lut_mask = 16'hC30C; +defparam \data_num[10]~44 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N30 +cycloneive_lcell_comb \data_num[11]~46 ( +// Equation(s): +// \data_num[11]~46_combout = (data_num[11] & (!\data_num[10]~45 )) # (!data_num[11] & ((\data_num[10]~45 ) # (GND))) +// \data_num[11]~47 = CARRY((!\data_num[10]~45 ) # (!data_num[11])) + + .dataa(data_num[11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[10]~45 ), + .combout(\data_num[11]~46_combout ), + .cout(\data_num[11]~47 )); +// synopsys translate_off +defparam \data_num[11]~46 .lut_mask = 16'h5A5F; +defparam \data_num[11]~46 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N0 +cycloneive_lcell_comb \data_num[12]~48 ( +// Equation(s): +// \data_num[12]~48_combout = (data_num[12] & (\data_num[11]~47 $ (GND))) # (!data_num[12] & (!\data_num[11]~47 & VCC)) +// \data_num[12]~49 = CARRY((data_num[12] & !\data_num[11]~47 )) + + .dataa(gnd), + .datab(data_num[12]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[11]~47 ), + .combout(\data_num[12]~48_combout ), + .cout(\data_num[12]~49 )); +// synopsys translate_off +defparam \data_num[12]~48 .lut_mask = 16'hC30C; +defparam \data_num[12]~48 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N2 +cycloneive_lcell_comb \data_num[13]~50 ( +// Equation(s): +// \data_num[13]~50_combout = (data_num[13] & (!\data_num[12]~49 )) # (!data_num[13] & ((\data_num[12]~49 ) # (GND))) +// \data_num[13]~51 = CARRY((!\data_num[12]~49 ) # (!data_num[13])) + + .dataa(gnd), + .datab(data_num[13]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[12]~49 ), + .combout(\data_num[13]~50_combout ), + .cout(\data_num[13]~51 )); +// synopsys translate_off +defparam \data_num[13]~50 .lut_mask = 16'h3C3F; +defparam \data_num[13]~50 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N4 +cycloneive_lcell_comb \data_num[14]~52 ( +// Equation(s): +// \data_num[14]~52_combout = (data_num[14] & (\data_num[13]~51 $ (GND))) # (!data_num[14] & (!\data_num[13]~51 & VCC)) +// \data_num[14]~53 = CARRY((data_num[14] & !\data_num[13]~51 )) + + .dataa(gnd), + .datab(data_num[14]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[13]~51 ), + .combout(\data_num[14]~52_combout ), + .cout(\data_num[14]~53 )); +// synopsys translate_off +defparam \data_num[14]~52 .lut_mask = 16'hC30C; +defparam \data_num[14]~52 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N6 +cycloneive_lcell_comb \data_num[15]~54 ( +// Equation(s): +// \data_num[15]~54_combout = (data_num[15] & (!\data_num[14]~53 )) # (!data_num[15] & ((\data_num[14]~53 ) # (GND))) +// \data_num[15]~55 = CARRY((!\data_num[14]~53 ) # (!data_num[15])) + + .dataa(data_num[15]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[14]~53 ), + .combout(\data_num[15]~54_combout ), + .cout(\data_num[15]~55 )); +// synopsys translate_off +defparam \data_num[15]~54 .lut_mask = 16'h5A5F; +defparam \data_num[15]~54 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N8 +cycloneive_lcell_comb \data_num[16]~56 ( +// Equation(s): +// \data_num[16]~56_combout = (data_num[16] & (\data_num[15]~55 $ (GND))) # (!data_num[16] & (!\data_num[15]~55 & VCC)) +// \data_num[16]~57 = CARRY((data_num[16] & !\data_num[15]~55 )) + + .dataa(gnd), + .datab(data_num[16]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[15]~55 ), + .combout(\data_num[16]~56_combout ), + .cout(\data_num[16]~57 )); +// synopsys translate_off +defparam \data_num[16]~56 .lut_mask = 16'hC30C; +defparam \data_num[16]~56 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N10 +cycloneive_lcell_comb \data_num[17]~58 ( +// Equation(s): +// \data_num[17]~58_combout = (data_num[17] & (!\data_num[16]~57 )) # (!data_num[17] & ((\data_num[16]~57 ) # (GND))) +// \data_num[17]~59 = CARRY((!\data_num[16]~57 ) # (!data_num[17])) + + .dataa(data_num[17]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[16]~57 ), + .combout(\data_num[17]~58_combout ), + .cout(\data_num[17]~59 )); +// synopsys translate_off +defparam \data_num[17]~58 .lut_mask = 16'h5A5F; +defparam \data_num[17]~58 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N12 +cycloneive_lcell_comb \data_num[18]~60 ( +// Equation(s): +// \data_num[18]~60_combout = (data_num[18] & (\data_num[17]~59 $ (GND))) # (!data_num[18] & (!\data_num[17]~59 & VCC)) +// \data_num[18]~61 = CARRY((data_num[18] & !\data_num[17]~59 )) + + .dataa(data_num[18]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\data_num[17]~59 ), + .combout(\data_num[18]~60_combout ), + .cout(\data_num[18]~61 )); +// synopsys translate_off +defparam \data_num[18]~60 .lut_mask = 16'hA50A; +defparam \data_num[18]~60 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N14 +cycloneive_lcell_comb \data_num[19]~62 ( +// Equation(s): +// \data_num[19]~62_combout = (data_num[19] & (!\data_num[18]~61 )) # (!data_num[19] & ((\data_num[18]~61 ) # (GND))) +// \data_num[19]~63 = CARRY((!\data_num[18]~61 ) # (!data_num[19])) + + .dataa(gnd), + .datab(data_num[19]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[18]~61 ), + .combout(\data_num[19]~62_combout ), + .cout(\data_num[19]~63 )); +// synopsys translate_off +defparam \data_num[19]~62 .lut_mask = 16'h3C3F; +defparam \data_num[19]~62 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N16 +cycloneive_lcell_comb \data_num[20]~64 ( +// Equation(s): +// \data_num[20]~64_combout = (data_num[20] & (\data_num[19]~63 $ (GND))) # (!data_num[20] & (!\data_num[19]~63 & VCC)) +// \data_num[20]~65 = CARRY((data_num[20] & !\data_num[19]~63 )) + + .dataa(gnd), + .datab(data_num[20]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[19]~63 ), + .combout(\data_num[20]~64_combout ), + .cout(\data_num[20]~65 )); +// synopsys translate_off +defparam \data_num[20]~64 .lut_mask = 16'hC30C; +defparam \data_num[20]~64 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N18 +cycloneive_lcell_comb \data_num[21]~66 ( +// Equation(s): +// \data_num[21]~66_combout = (data_num[21] & (!\data_num[20]~65 )) # (!data_num[21] & ((\data_num[20]~65 ) # (GND))) +// \data_num[21]~67 = CARRY((!\data_num[20]~65 ) # (!data_num[21])) + + .dataa(gnd), + .datab(data_num[21]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[20]~65 ), + .combout(\data_num[21]~66_combout ), + .cout(\data_num[21]~67 )); +// synopsys translate_off +defparam \data_num[21]~66 .lut_mask = 16'h3C3F; +defparam \data_num[21]~66 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N20 +cycloneive_lcell_comb \data_num[22]~68 ( +// Equation(s): +// \data_num[22]~68_combout = (data_num[22] & (\data_num[21]~67 $ (GND))) # (!data_num[22] & (!\data_num[21]~67 & VCC)) +// \data_num[22]~69 = CARRY((data_num[22] & !\data_num[21]~67 )) + + .dataa(gnd), + .datab(data_num[22]), + .datac(gnd), + .datad(vcc), + .cin(\data_num[21]~67 ), + .combout(\data_num[22]~68_combout ), + .cout(\data_num[22]~69 )); +// synopsys translate_off +defparam \data_num[22]~68 .lut_mask = 16'hC30C; +defparam \data_num[22]~68 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N22 +cycloneive_lcell_comb \data_num[23]~70 ( +// Equation(s): +// \data_num[23]~70_combout = data_num[23] $ (\data_num[22]~69 ) + + .dataa(data_num[23]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\data_num[22]~69 ), + .combout(\data_num[23]~70_combout ), + .cout()); +// synopsys translate_off +defparam \data_num[23]~70 .lut_mask = 16'h5A5A; +defparam \data_num[23]~70 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X28_Y26_N3 +dffeas \fifo_read_inst|cnt_read[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[1]~12_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N7 +dffeas \fifo_read_inst|cnt_read[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[3]~16_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N1 +dffeas \fifo_read_inst|cnt_read[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[0]~10_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N5 +dffeas \fifo_read_inst|cnt_read[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[2]~14_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N9 +dffeas \fifo_read_inst|cnt_read[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[4]~18_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N11 +dffeas \fifo_read_inst|cnt_read[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[5]~20_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N13 +dffeas \fifo_read_inst|cnt_read[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[6]~22_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N15 +dffeas \fifo_read_inst|cnt_read[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[7]~24_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N17 +dffeas \fifo_read_inst|cnt_read[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[8]~26_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y26_N19 +dffeas \fifo_read_inst|cnt_read[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|cnt_read[9]~28_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal2~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|cnt_read [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|cnt_read[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N24 +cycloneive_lcell_comb \uart_rx_inst|Add1~0 ( +// Equation(s): +// \uart_rx_inst|Add1~0_combout = (\uart_rx_inst|bit_cnt [0] & (\uart_rx_inst|bit_flag~q $ (VCC))) # (!\uart_rx_inst|bit_cnt [0] & (\uart_rx_inst|bit_flag~q & VCC)) +// \uart_rx_inst|Add1~1 = CARRY((\uart_rx_inst|bit_cnt [0] & \uart_rx_inst|bit_flag~q )) + + .dataa(\uart_rx_inst|bit_cnt [0]), + .datab(\uart_rx_inst|bit_flag~q ), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_rx_inst|Add1~0_combout ), + .cout(\uart_rx_inst|Add1~1 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~0 .lut_mask = 16'h6688; +defparam \uart_rx_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N28 +cycloneive_lcell_comb \uart_rx_inst|Add1~4 ( +// Equation(s): +// \uart_rx_inst|Add1~4_combout = (\uart_rx_inst|bit_cnt [2] & (\uart_rx_inst|Add1~3 $ (GND))) # (!\uart_rx_inst|bit_cnt [2] & (!\uart_rx_inst|Add1~3 & VCC)) +// \uart_rx_inst|Add1~5 = CARRY((\uart_rx_inst|bit_cnt [2] & !\uart_rx_inst|Add1~3 )) + + .dataa(gnd), + .datab(\uart_rx_inst|bit_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|Add1~3 ), + .combout(\uart_rx_inst|Add1~4_combout ), + .cout(\uart_rx_inst|Add1~5 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~4 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|Add1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N30 +cycloneive_lcell_comb \uart_rx_inst|Add1~6 ( +// Equation(s): +// \uart_rx_inst|Add1~6_combout = \uart_rx_inst|Add1~5 $ (\uart_rx_inst|bit_cnt [3]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|bit_cnt [3]), + .cin(\uart_rx_inst|Add1~5 ), + .combout(\uart_rx_inst|Add1~6_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Add1~6 .lut_mask = 16'h0FF0; +defparam \uart_rx_inst|Add1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N11 +dffeas \uart_rx_inst|baud_cnt[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[4]~21_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N0 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[0]~10 ( +// Equation(s): +// \fifo_read_inst|cnt_read[0]~10_combout = (\fifo_read_inst|rd_en~q & (\fifo_read_inst|cnt_read [0] $ (VCC))) # (!\fifo_read_inst|rd_en~q & (\fifo_read_inst|cnt_read [0] & VCC)) +// \fifo_read_inst|cnt_read[0]~11 = CARRY((\fifo_read_inst|rd_en~q & \fifo_read_inst|cnt_read [0])) + + .dataa(\fifo_read_inst|rd_en~q ), + .datab(\fifo_read_inst|cnt_read [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|cnt_read[0]~10_combout ), + .cout(\fifo_read_inst|cnt_read[0]~11 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[0]~10 .lut_mask = 16'h6688; +defparam \fifo_read_inst|cnt_read[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N2 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[1]~12 ( +// Equation(s): +// \fifo_read_inst|cnt_read[1]~12_combout = (\fifo_read_inst|cnt_read [1] & (!\fifo_read_inst|cnt_read[0]~11 )) # (!\fifo_read_inst|cnt_read [1] & ((\fifo_read_inst|cnt_read[0]~11 ) # (GND))) +// \fifo_read_inst|cnt_read[1]~13 = CARRY((!\fifo_read_inst|cnt_read[0]~11 ) # (!\fifo_read_inst|cnt_read [1])) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [1]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[0]~11 ), + .combout(\fifo_read_inst|cnt_read[1]~12_combout ), + .cout(\fifo_read_inst|cnt_read[1]~13 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[1]~12 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|cnt_read[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N4 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[2]~14 ( +// Equation(s): +// \fifo_read_inst|cnt_read[2]~14_combout = (\fifo_read_inst|cnt_read [2] & (\fifo_read_inst|cnt_read[1]~13 $ (GND))) # (!\fifo_read_inst|cnt_read [2] & (!\fifo_read_inst|cnt_read[1]~13 & VCC)) +// \fifo_read_inst|cnt_read[2]~15 = CARRY((\fifo_read_inst|cnt_read [2] & !\fifo_read_inst|cnt_read[1]~13 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[1]~13 ), + .combout(\fifo_read_inst|cnt_read[2]~14_combout ), + .cout(\fifo_read_inst|cnt_read[2]~15 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[2]~14 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N6 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[3]~16 ( +// Equation(s): +// \fifo_read_inst|cnt_read[3]~16_combout = (\fifo_read_inst|cnt_read [3] & (!\fifo_read_inst|cnt_read[2]~15 )) # (!\fifo_read_inst|cnt_read [3] & ((\fifo_read_inst|cnt_read[2]~15 ) # (GND))) +// \fifo_read_inst|cnt_read[3]~17 = CARRY((!\fifo_read_inst|cnt_read[2]~15 ) # (!\fifo_read_inst|cnt_read [3])) + + .dataa(\fifo_read_inst|cnt_read [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[2]~15 ), + .combout(\fifo_read_inst|cnt_read[3]~16_combout ), + .cout(\fifo_read_inst|cnt_read[3]~17 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[3]~16 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|cnt_read[3]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N8 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[4]~18 ( +// Equation(s): +// \fifo_read_inst|cnt_read[4]~18_combout = (\fifo_read_inst|cnt_read [4] & (\fifo_read_inst|cnt_read[3]~17 $ (GND))) # (!\fifo_read_inst|cnt_read [4] & (!\fifo_read_inst|cnt_read[3]~17 & VCC)) +// \fifo_read_inst|cnt_read[4]~19 = CARRY((\fifo_read_inst|cnt_read [4] & !\fifo_read_inst|cnt_read[3]~17 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[3]~17 ), + .combout(\fifo_read_inst|cnt_read[4]~18_combout ), + .cout(\fifo_read_inst|cnt_read[4]~19 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[4]~18 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N10 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[5]~20 ( +// Equation(s): +// \fifo_read_inst|cnt_read[5]~20_combout = (\fifo_read_inst|cnt_read [5] & (!\fifo_read_inst|cnt_read[4]~19 )) # (!\fifo_read_inst|cnt_read [5] & ((\fifo_read_inst|cnt_read[4]~19 ) # (GND))) +// \fifo_read_inst|cnt_read[5]~21 = CARRY((!\fifo_read_inst|cnt_read[4]~19 ) # (!\fifo_read_inst|cnt_read [5])) + + .dataa(\fifo_read_inst|cnt_read [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[4]~19 ), + .combout(\fifo_read_inst|cnt_read[5]~20_combout ), + .cout(\fifo_read_inst|cnt_read[5]~21 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[5]~20 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|cnt_read[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N12 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[6]~22 ( +// Equation(s): +// \fifo_read_inst|cnt_read[6]~22_combout = (\fifo_read_inst|cnt_read [6] & (\fifo_read_inst|cnt_read[5]~21 $ (GND))) # (!\fifo_read_inst|cnt_read [6] & (!\fifo_read_inst|cnt_read[5]~21 & VCC)) +// \fifo_read_inst|cnt_read[6]~23 = CARRY((\fifo_read_inst|cnt_read [6] & !\fifo_read_inst|cnt_read[5]~21 )) + + .dataa(\fifo_read_inst|cnt_read [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[5]~21 ), + .combout(\fifo_read_inst|cnt_read[6]~22_combout ), + .cout(\fifo_read_inst|cnt_read[6]~23 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[6]~22 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|cnt_read[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N14 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[7]~24 ( +// Equation(s): +// \fifo_read_inst|cnt_read[7]~24_combout = (\fifo_read_inst|cnt_read [7] & (!\fifo_read_inst|cnt_read[6]~23 )) # (!\fifo_read_inst|cnt_read [7] & ((\fifo_read_inst|cnt_read[6]~23 ) # (GND))) +// \fifo_read_inst|cnt_read[7]~25 = CARRY((!\fifo_read_inst|cnt_read[6]~23 ) # (!\fifo_read_inst|cnt_read [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[6]~23 ), + .combout(\fifo_read_inst|cnt_read[7]~24_combout ), + .cout(\fifo_read_inst|cnt_read[7]~25 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[7]~24 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|cnt_read[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N16 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[8]~26 ( +// Equation(s): +// \fifo_read_inst|cnt_read[8]~26_combout = (\fifo_read_inst|cnt_read [8] & (\fifo_read_inst|cnt_read[7]~25 $ (GND))) # (!\fifo_read_inst|cnt_read [8] & (!\fifo_read_inst|cnt_read[7]~25 & VCC)) +// \fifo_read_inst|cnt_read[8]~27 = CARRY((\fifo_read_inst|cnt_read [8] & !\fifo_read_inst|cnt_read[7]~25 )) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [8]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|cnt_read[7]~25 ), + .combout(\fifo_read_inst|cnt_read[8]~26_combout ), + .cout(\fifo_read_inst|cnt_read[8]~27 )); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[8]~26 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|cnt_read[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N18 +cycloneive_lcell_comb \fifo_read_inst|cnt_read[9]~28 ( +// Equation(s): +// \fifo_read_inst|cnt_read[9]~28_combout = \fifo_read_inst|cnt_read [9] $ (\fifo_read_inst|cnt_read[8]~27 ) + + .dataa(gnd), + .datab(\fifo_read_inst|cnt_read [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|cnt_read[8]~27 ), + .combout(\fifo_read_inst|cnt_read[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|cnt_read[9]~28 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|cnt_read[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N10 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[4]~21 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[4]~21_combout = (\uart_rx_inst|baud_cnt [4] & (\uart_rx_inst|baud_cnt[3]~20 $ (GND))) # (!\uart_rx_inst|baud_cnt [4] & (!\uart_rx_inst|baud_cnt[3]~20 & VCC)) +// \uart_rx_inst|baud_cnt[4]~22 = CARRY((\uart_rx_inst|baud_cnt [4] & !\uart_rx_inst|baud_cnt[3]~20 )) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[3]~20 ), + .combout(\uart_rx_inst|baud_cnt[4]~21_combout ), + .cout(\uart_rx_inst|baud_cnt[4]~22 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[4]~21 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[4]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X22_Y22_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 .lut_mask = 16'h8C9D; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N13 +dffeas \uart_tx_inst|bit_cnt[0] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[0]~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|Mux0~0 ( +// Equation(s): +// \uart_tx_inst|Mux0~0_combout = (\uart_tx_inst|bit_cnt [1] & (((\uart_tx_inst|bit_cnt [0])))) # (!\uart_tx_inst|bit_cnt [1] & ((\uart_tx_inst|bit_cnt [0] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b +// [4])) # (!\uart_tx_inst|bit_cnt [0] & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3]))))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [4]), + .datab(\uart_tx_inst|bit_cnt [1]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [3]), + .datad(\uart_tx_inst|bit_cnt [0]), + .cin(gnd), + .combout(\uart_tx_inst|Mux0~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Mux0~0 .lut_mask = 16'hEE30; +defparam \uart_tx_inst|Mux0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y15_N8 +cycloneive_lcell_comb \uart_tx_inst|Mux0~1 ( +// Equation(s): +// \uart_tx_inst|Mux0~1_combout = (\uart_tx_inst|Mux0~0_combout & (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6]) # (!\uart_tx_inst|bit_cnt [1])))) # (!\uart_tx_inst|Mux0~0_combout & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5] & ((\uart_tx_inst|bit_cnt [1])))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [6]), + .datac(\uart_tx_inst|Mux0~0_combout ), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Mux0~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Mux0~1 .lut_mask = 16'hCAF0; +defparam \uart_tx_inst|Mux0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N16 +cycloneive_lcell_comb \uart_tx_inst|tx~0 ( +// Equation(s): +// \uart_tx_inst|tx~0_combout = (\uart_tx_inst|bit_cnt [0] & ((\uart_tx_inst|bit_cnt [1] & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2]))) # (!\uart_tx_inst|bit_cnt [1] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0])))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [0]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [2]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~0 .lut_mask = 16'hA088; +defparam \uart_tx_inst|tx~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N10 +cycloneive_lcell_comb \uart_tx_inst|tx~1 ( +// Equation(s): +// \uart_tx_inst|tx~1_combout = (\uart_tx_inst|tx~0_combout ) # ((!\uart_tx_inst|bit_cnt [0] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1] & \uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|tx~0_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [1]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~1 .lut_mask = 16'hDCCC; +defparam \uart_tx_inst|tx~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N22 +cycloneive_lcell_comb \uart_tx_inst|tx~2 ( +// Equation(s): +// \uart_tx_inst|tx~2_combout = (\uart_tx_inst|bit_flag~q & ((\uart_tx_inst|bit_cnt [2] & (\uart_tx_inst|Mux0~1_combout )) # (!\uart_tx_inst|bit_cnt [2] & ((\uart_tx_inst|tx~1_combout ))))) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\uart_tx_inst|Mux0~1_combout ), + .datad(\uart_tx_inst|tx~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|tx~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~2 .lut_mask = 16'hA280; +defparam \uart_tx_inst|tx~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N27 +dffeas \uart_tx_inst|bit_cnt[3] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[3]~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X21_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 .lut_mask = 16'h3111; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ) # (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 .lut_mask = 16'hAFEF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 .lut_mask = 16'h0CAE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N20 +cycloneive_lcell_comb \uart_tx_inst|Add1~0 ( +// Equation(s): +// \uart_tx_inst|Add1~0_combout = \uart_tx_inst|bit_cnt [2] $ (((\uart_tx_inst|bit_cnt [0] & \uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(gnd), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Add1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Add1~0 .lut_mask = 16'h5AF0; +defparam \uart_tx_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N30 +cycloneive_lcell_comb \uart_tx_inst|Add1~1 ( +// Equation(s): +// \uart_tx_inst|Add1~1_combout = \uart_tx_inst|bit_cnt [3] $ (((\uart_tx_inst|bit_cnt [0] & (\uart_tx_inst|bit_cnt [2] & \uart_tx_inst|bit_cnt [1])))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\uart_tx_inst|bit_cnt [3]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Add1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Add1~1 .lut_mask = 16'h78F0; +defparam \uart_tx_inst|Add1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N26 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[3]~4 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[3]~4_combout = (!\uart_tx_inst|always0~1_combout & ((\uart_tx_inst|always3~0_combout & ((\uart_tx_inst|bit_cnt [3]))) # (!\uart_tx_inst|always3~0_combout & (\uart_tx_inst|Add1~1_combout )))) + + .dataa(\uart_tx_inst|Add1~1_combout ), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [3]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[3]~4_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[3]~4 .lut_mask = 16'h00E2; +defparam \uart_tx_inst|bit_cnt[3]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 .lut_mask = 16'h0400; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N29 +dffeas read_valid( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\read_valid~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\read_valid~q ), + .prn(vcc)); +// synopsys translate_off +defparam read_valid.is_wysiwyg = "true"; +defparam read_valid.power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 .lut_mask = 16'h000F; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout = (\read_valid~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & ((\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout )))) + + .dataa(\read_valid~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 .lut_mask = 16'h8088; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|Equal1~3 ( +// Equation(s): +// \uart_tx_inst|Equal1~3_combout = (\uart_tx_inst|baud_cnt [12] & \uart_tx_inst|baud_cnt [10]) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [12]), + .datac(gnd), + .datad(\uart_tx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~3 .lut_mask = 16'hCC00; +defparam \uart_tx_inst|Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N2 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout = (\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] & !\fifo_read_inst|rd_en~q ))) + + .dataa(\fifo_read_inst|read_en_dly~q ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 .lut_mask = 16'h0080; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N0 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y24_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] & +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 .lut_mask = 16'h8000; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N13 +dffeas \fifo_read_inst|bit_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Add2~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal1~0 ( +// Equation(s): +// \fifo_read_inst|Equal1~0_combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6] & (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [9]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [6]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [8]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [7]), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~0 .lut_mask = 16'h0001; +defparam \fifo_read_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N2 +cycloneive_lcell_comb \fifo_read_inst|Equal1~1 ( +// Equation(s): +// \fifo_read_inst|Equal1~1_combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2] & (\fifo_read_inst|Equal1~0_combout & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4] & !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]))) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [2]), + .datab(\fifo_read_inst|Equal1~0_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [4]), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [5]), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~1 .lut_mask = 16'h0004; +defparam \fifo_read_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .lut_mask = 16'h50F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X27_Y23_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 .lut_mask = 16'h9966; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X14_Y20_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N25 +dffeas \cnt_wait[15] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[15]~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[15]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[15] .is_wysiwyg = "true"; +defparam \cnt_wait[15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N27 +dffeas \cnt_wait[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[14]~3_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[14]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[14] .is_wysiwyg = "true"; +defparam \cnt_wait[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N21 +dffeas \cnt_wait[13] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[13]~4_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[13]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[13] .is_wysiwyg = "true"; +defparam \cnt_wait[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N23 +dffeas \cnt_wait[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[12]~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[12]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[12] .is_wysiwyg = "true"; +defparam \cnt_wait[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N8 +cycloneive_lcell_comb \Equal0~0 ( +// Equation(s): +// \Equal0~0_combout = (!cnt_wait[12] & (!cnt_wait[15] & (!cnt_wait[14] & !cnt_wait[13]))) + + .dataa(cnt_wait[12]), + .datab(cnt_wait[15]), + .datac(cnt_wait[14]), + .datad(cnt_wait[13]), + .cin(gnd), + .combout(\Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~0 .lut_mask = 16'h0001; +defparam \Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y26_N23 +dffeas \cnt_wait[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[9]~6_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[9]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[9] .is_wysiwyg = "true"; +defparam \cnt_wait[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N9 +dffeas \cnt_wait[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[11]~7_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[11]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[11] .is_wysiwyg = "true"; +defparam \cnt_wait[11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N11 +dffeas \cnt_wait[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[10]~8_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[10]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[10] .is_wysiwyg = "true"; +defparam \cnt_wait[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y26_N5 +dffeas \cnt_wait[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[8]~9_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[8]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[8] .is_wysiwyg = "true"; +defparam \cnt_wait[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N14 +cycloneive_lcell_comb \Equal0~1 ( +// Equation(s): +// \Equal0~1_combout = (!cnt_wait[10] & (!cnt_wait[8] & (cnt_wait[9] & !cnt_wait[11]))) + + .dataa(cnt_wait[10]), + .datab(cnt_wait[8]), + .datac(cnt_wait[9]), + .datad(cnt_wait[11]), + .cin(gnd), + .combout(\Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~1 .lut_mask = 16'h0010; +defparam \Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N3 +dffeas \cnt_wait[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[7]~10_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[7]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[7] .is_wysiwyg = "true"; +defparam \cnt_wait[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N13 +dffeas \cnt_wait[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[6]~11_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[6]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[6] .is_wysiwyg = "true"; +defparam \cnt_wait[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N15 +dffeas \cnt_wait[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[5]~12_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[5]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[5] .is_wysiwyg = "true"; +defparam \cnt_wait[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N17 +dffeas \cnt_wait[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[4]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[4]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[4] .is_wysiwyg = "true"; +defparam \cnt_wait[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N10 +cycloneive_lcell_comb \Equal0~2 ( +// Equation(s): +// \Equal0~2_combout = (cnt_wait[6] & (cnt_wait[7] & (cnt_wait[5] & !cnt_wait[4]))) + + .dataa(cnt_wait[6]), + .datab(cnt_wait[7]), + .datac(cnt_wait[5]), + .datad(cnt_wait[4]), + .cin(gnd), + .combout(\Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~2 .lut_mask = 16'h0080; +defparam \Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y26_N5 +dffeas \cnt_wait[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[3]~14_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[3]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[3] .is_wysiwyg = "true"; +defparam \cnt_wait[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N7 +dffeas \cnt_wait[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[2]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[2]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[2] .is_wysiwyg = "true"; +defparam \cnt_wait[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N1 +dffeas \cnt_wait[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[1]~16_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[1]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[1] .is_wysiwyg = "true"; +defparam \cnt_wait[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y26_N19 +dffeas \cnt_wait[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\cnt_wait[0]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(cnt_wait[0]), + .prn(vcc)); +// synopsys translate_off +defparam \cnt_wait[0] .is_wysiwyg = "true"; +defparam \cnt_wait[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N28 +cycloneive_lcell_comb \Equal0~3 ( +// Equation(s): +// \Equal0~3_combout = (!cnt_wait[0] & (cnt_wait[1] & (cnt_wait[3] & cnt_wait[2]))) + + .dataa(cnt_wait[0]), + .datab(cnt_wait[1]), + .datac(cnt_wait[3]), + .datad(cnt_wait[2]), + .cin(gnd), + .combout(\Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~3 .lut_mask = 16'h4000; +defparam \Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N30 +cycloneive_lcell_comb \Equal0~4 ( +// Equation(s): +// \Equal0~4_combout = (\Equal0~2_combout & (\Equal0~3_combout & (\Equal0~0_combout & \Equal0~1_combout ))) + + .dataa(\Equal0~2_combout ), + .datab(\Equal0~3_combout ), + .datac(\Equal0~0_combout ), + .datad(\Equal0~1_combout ), + .cin(gnd), + .combout(\Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \Equal0~4 .lut_mask = 16'h8000; +defparam \Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N16 +cycloneive_lcell_comb \read_valid~0 ( +// Equation(s): +// \read_valid~0_combout = (\Equal0~4_combout ) # ((\read_valid~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ) # (!\Equal2~1_combout )))) + + .dataa(\Equal2~1_combout ), + .datab(\Equal0~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .datad(\read_valid~q ), + .cin(gnd), + .combout(\read_valid~0_combout ), + .cout()); +// synopsys translate_off +defparam \read_valid~0 .lut_mask = 16'hFDCC; +defparam \read_valid~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N28 +cycloneive_lcell_comb \read_valid~1 ( +// Equation(s): +// \read_valid~1_combout = (\read_valid~0_combout ) # ((\read_valid~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ) # (!\Equal2~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datab(\Equal2~0_combout ), + .datac(\read_valid~q ), + .datad(\read_valid~0_combout ), + .cin(gnd), + .combout(\read_valid~1_combout ), + .cout()); +// synopsys translate_off +defparam \read_valid~1 .lut_mask = 16'hFFB0; +defparam \read_valid~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 .lut_mask = 16'hECFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk +// [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3] $ (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 .lut_mask = 16'h6AAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N10 +cycloneive_lcell_comb \fifo_read_inst|Equal1~2 ( +// Equation(s): +// \fifo_read_inst|Equal1~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] & \fifo_read_inst|Equal1~1_combout )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datac(gnd), + .datad(\fifo_read_inst|Equal1~1_combout ), + .cin(gnd), + .combout(\fifo_read_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal1~2 .lut_mask = 16'h2200; +defparam \fifo_read_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N2 +cycloneive_lcell_comb \fifo_read_inst|Equal5~1 ( +// Equation(s): +// \fifo_read_inst|Equal5~1_combout = (\fifo_read_inst|baud_cnt [11] & (!\fifo_read_inst|baud_cnt [10] & (\fifo_read_inst|baud_cnt [9] & !\fifo_read_inst|baud_cnt [6]))) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(\fifo_read_inst|baud_cnt [9]), + .datad(\fifo_read_inst|baud_cnt [6]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~1 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h4182; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'hF000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'hC000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 .lut_mask = 16'hCA0A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'h8200; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout )) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'hF5A0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'hE0C2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N0 +cycloneive_lcell_comb \Equal1~0 ( +// Equation(s): +// \Equal1~0_combout = (data_num[2]) # (((data_num[0]) # (!data_num[1])) # (!data_num[3])) + + .dataa(data_num[2]), + .datab(data_num[3]), + .datac(data_num[0]), + .datad(data_num[1]), + .cin(gnd), + .combout(\Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~0 .lut_mask = 16'hFBFF; +defparam \Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N2 +cycloneive_lcell_comb \Equal1~1 ( +// Equation(s): +// \Equal1~1_combout = (data_num[6]) # ((data_num[5]) # ((data_num[7]) # (data_num[4]))) + + .dataa(data_num[6]), + .datab(data_num[5]), + .datac(data_num[7]), + .datad(data_num[4]), + .cin(gnd), + .combout(\Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~1 .lut_mask = 16'hFFFE; +defparam \Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N4 +cycloneive_lcell_comb \Equal1~2 ( +// Equation(s): +// \Equal1~2_combout = (data_num[11]) # ((data_num[10]) # ((data_num[9]) # (data_num[8]))) + + .dataa(data_num[11]), + .datab(data_num[10]), + .datac(data_num[9]), + .datad(data_num[8]), + .cin(gnd), + .combout(\Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~2 .lut_mask = 16'hFFFE; +defparam \Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N24 +cycloneive_lcell_comb \Equal1~3 ( +// Equation(s): +// \Equal1~3_combout = (data_num[15]) # ((data_num[13]) # ((data_num[14]) # (data_num[12]))) + + .dataa(data_num[15]), + .datab(data_num[13]), + .datac(data_num[14]), + .datad(data_num[12]), + .cin(gnd), + .combout(\Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~3 .lut_mask = 16'hFFFE; +defparam \Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y24_N6 +cycloneive_lcell_comb \Equal1~4 ( +// Equation(s): +// \Equal1~4_combout = (\Equal1~3_combout ) # ((\Equal1~1_combout ) # ((\Equal1~2_combout ) # (\Equal1~0_combout ))) + + .dataa(\Equal1~3_combout ), + .datab(\Equal1~1_combout ), + .datac(\Equal1~2_combout ), + .datad(\Equal1~0_combout ), + .cin(gnd), + .combout(\Equal1~4_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~4 .lut_mask = 16'hFFFE; +defparam \Equal1~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N26 +cycloneive_lcell_comb \Equal1~5 ( +// Equation(s): +// \Equal1~5_combout = (data_num[18]) # ((data_num[19]) # ((data_num[16]) # (data_num[17]))) + + .dataa(data_num[18]), + .datab(data_num[19]), + .datac(data_num[16]), + .datad(data_num[17]), + .cin(gnd), + .combout(\Equal1~5_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~5 .lut_mask = 16'hFFFE; +defparam \Equal1~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y23_N28 +cycloneive_lcell_comb \Equal1~6 ( +// Equation(s): +// \Equal1~6_combout = (data_num[22]) # ((data_num[21]) # ((data_num[23]) # (data_num[20]))) + + .dataa(data_num[22]), + .datab(data_num[21]), + .datac(data_num[23]), + .datad(data_num[20]), + .cin(gnd), + .combout(\Equal1~6_combout ), + .cout()); +// synopsys translate_off +defparam \Equal1~6 .lut_mask = 16'hFFFE; +defparam \Equal1~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N18 +cycloneive_lcell_comb \cnt_wait[8]~0 ( +// Equation(s): +// \cnt_wait[8]~0_combout = (!\Equal0~4_combout & ((\Equal1~4_combout ) # ((\Equal1~5_combout ) # (\Equal1~6_combout )))) + + .dataa(\Equal1~4_combout ), + .datab(\Equal0~4_combout ), + .datac(\Equal1~5_combout ), + .datad(\Equal1~6_combout ), + .cin(gnd), + .combout(\cnt_wait[8]~0_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[8]~0 .lut_mask = 16'h3332; +defparam \cnt_wait[8]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N12 +cycloneive_lcell_comb \cnt_wait[15]~1 ( +// Equation(s): +// \cnt_wait[15]~1_combout = (\Equal1~4_combout ) # ((\Equal0~4_combout ) # ((\Equal1~5_combout ) # (\Equal1~6_combout ))) + + .dataa(\Equal1~4_combout ), + .datab(\Equal0~4_combout ), + .datac(\Equal1~5_combout ), + .datad(\Equal1~6_combout ), + .cin(gnd), + .combout(\cnt_wait[15]~1_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[15]~1 .lut_mask = 16'hFFFE; +defparam \cnt_wait[15]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N24 +cycloneive_lcell_comb \cnt_wait[15]~2 ( +// Equation(s): +// \cnt_wait[15]~2_combout = (\Add1~30_combout & (((\cnt_wait[8]~0_combout & cnt_wait[15])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~30_combout & (\cnt_wait[8]~0_combout & (cnt_wait[15]))) + + .dataa(\Add1~30_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[15]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[15]~2_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[15]~2 .lut_mask = 16'hC0EA; +defparam \cnt_wait[15]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N26 +cycloneive_lcell_comb \cnt_wait[14]~3 ( +// Equation(s): +// \cnt_wait[14]~3_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[14] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~28_combout ) # ((cnt_wait[14] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~28_combout ), + .datac(cnt_wait[14]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[14]~3_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[14]~3 .lut_mask = 16'hF444; +defparam \cnt_wait[14]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N20 +cycloneive_lcell_comb \cnt_wait[13]~4 ( +// Equation(s): +// \cnt_wait[13]~4_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[13] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~26_combout ) # ((cnt_wait[13] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~26_combout ), + .datac(cnt_wait[13]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[13]~4_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[13]~4 .lut_mask = 16'hF444; +defparam \cnt_wait[13]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N22 +cycloneive_lcell_comb \cnt_wait[12]~5 ( +// Equation(s): +// \cnt_wait[12]~5_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[12] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~24_combout ) # ((cnt_wait[12] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~24_combout ), + .datac(cnt_wait[12]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[12]~5_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[12]~5 .lut_mask = 16'hF444; +defparam \cnt_wait[12]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N22 +cycloneive_lcell_comb \cnt_wait[9]~6 ( +// Equation(s): +// \cnt_wait[9]~6_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[9] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~18_combout ) # ((cnt_wait[9] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~18_combout ), + .datac(cnt_wait[9]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[9]~6_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[9]~6 .lut_mask = 16'hF444; +defparam \cnt_wait[9]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N8 +cycloneive_lcell_comb \cnt_wait[11]~7 ( +// Equation(s): +// \cnt_wait[11]~7_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[11] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~22_combout ) # ((cnt_wait[11] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~22_combout ), + .datac(cnt_wait[11]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[11]~7_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[11]~7 .lut_mask = 16'hF444; +defparam \cnt_wait[11]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N10 +cycloneive_lcell_comb \cnt_wait[10]~8 ( +// Equation(s): +// \cnt_wait[10]~8_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[10] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~20_combout ) # ((cnt_wait[10] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~20_combout ), + .datac(cnt_wait[10]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[10]~8_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[10]~8 .lut_mask = 16'hF444; +defparam \cnt_wait[10]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N4 +cycloneive_lcell_comb \cnt_wait[8]~9 ( +// Equation(s): +// \cnt_wait[8]~9_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[8] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~16_combout ) # ((cnt_wait[8] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~16_combout ), + .datac(cnt_wait[8]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[8]~9_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[8]~9 .lut_mask = 16'hF444; +defparam \cnt_wait[8]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N2 +cycloneive_lcell_comb \cnt_wait[7]~10 ( +// Equation(s): +// \cnt_wait[7]~10_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[7] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~14_combout ) # ((cnt_wait[7] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~14_combout ), + .datac(cnt_wait[7]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[7]~10_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[7]~10 .lut_mask = 16'hF444; +defparam \cnt_wait[7]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N12 +cycloneive_lcell_comb \cnt_wait[6]~11 ( +// Equation(s): +// \cnt_wait[6]~11_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[6] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~12_combout ) # ((cnt_wait[6] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~12_combout ), + .datac(cnt_wait[6]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[6]~11_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[6]~11 .lut_mask = 16'hF444; +defparam \cnt_wait[6]~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N14 +cycloneive_lcell_comb \cnt_wait[5]~12 ( +// Equation(s): +// \cnt_wait[5]~12_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[5] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~10_combout ) # ((cnt_wait[5] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~10_combout ), + .datac(cnt_wait[5]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[5]~12_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[5]~12 .lut_mask = 16'hF444; +defparam \cnt_wait[5]~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N16 +cycloneive_lcell_comb \cnt_wait[4]~13 ( +// Equation(s): +// \cnt_wait[4]~13_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[4] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~8_combout ) # ((cnt_wait[4] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~8_combout ), + .datac(cnt_wait[4]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[4]~13_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[4]~13 .lut_mask = 16'hF444; +defparam \cnt_wait[4]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N4 +cycloneive_lcell_comb \cnt_wait[3]~14 ( +// Equation(s): +// \cnt_wait[3]~14_combout = (\Add1~6_combout & (((\cnt_wait[8]~0_combout & cnt_wait[3])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~6_combout & (\cnt_wait[8]~0_combout & (cnt_wait[3]))) + + .dataa(\Add1~6_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[3]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[3]~14_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[3]~14 .lut_mask = 16'hC0EA; +defparam \cnt_wait[3]~14 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N6 +cycloneive_lcell_comb \cnt_wait[2]~15 ( +// Equation(s): +// \cnt_wait[2]~15_combout = (\Add1~4_combout & (((\cnt_wait[8]~0_combout & cnt_wait[2])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~4_combout & (\cnt_wait[8]~0_combout & (cnt_wait[2]))) + + .dataa(\Add1~4_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[2]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[2]~15_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[2]~15 .lut_mask = 16'hC0EA; +defparam \cnt_wait[2]~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N0 +cycloneive_lcell_comb \cnt_wait[1]~16 ( +// Equation(s): +// \cnt_wait[1]~16_combout = (\Add1~2_combout & (((\cnt_wait[8]~0_combout & cnt_wait[1])) # (!\cnt_wait[15]~1_combout ))) # (!\Add1~2_combout & (\cnt_wait[8]~0_combout & (cnt_wait[1]))) + + .dataa(\Add1~2_combout ), + .datab(\cnt_wait[8]~0_combout ), + .datac(cnt_wait[1]), + .datad(\cnt_wait[15]~1_combout ), + .cin(gnd), + .combout(\cnt_wait[1]~16_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[1]~16 .lut_mask = 16'hC0EA; +defparam \cnt_wait[1]~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y26_N18 +cycloneive_lcell_comb \cnt_wait[0]~17 ( +// Equation(s): +// \cnt_wait[0]~17_combout = (\cnt_wait[15]~1_combout & (((cnt_wait[0] & \cnt_wait[8]~0_combout )))) # (!\cnt_wait[15]~1_combout & ((\Add1~0_combout ) # ((cnt_wait[0] & \cnt_wait[8]~0_combout )))) + + .dataa(\cnt_wait[15]~1_combout ), + .datab(\Add1~0_combout ), + .datac(cnt_wait[0]), + .datad(\cnt_wait[8]~0_combout ), + .cin(gnd), + .combout(\cnt_wait[0]~17_combout ), + .cout()); +// synopsys translate_off +defparam \cnt_wait[0]~17 .lut_mask = 16'hF444; +defparam \cnt_wait[0]~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h0084; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ) # +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout +// & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'hAAEA; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h4812; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h4182; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'hB830; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N1 +dffeas \fifo_read_inst|rd_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|rd_flag~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|rd_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|rd_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|rd_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N30 +cycloneive_lcell_comb \fifo_read_inst|Equal4~2 ( +// Equation(s): +// \fifo_read_inst|Equal4~2_combout = (!\fifo_read_inst|baud_cnt [11] & (\fifo_read_inst|baud_cnt [10] & (!\fifo_read_inst|baud_cnt [9] & \fifo_read_inst|baud_cnt [6]))) + + .dataa(\fifo_read_inst|baud_cnt [11]), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(\fifo_read_inst|baud_cnt [9]), + .datad(\fifo_read_inst|baud_cnt [6]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~2 .lut_mask = 16'h0400; +defparam \fifo_read_inst|Equal4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout & ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 .lut_mask = 16'h1030; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N23 +dffeas \uart_rx_inst|bit_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|bit_cnt~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal2~0 ( +// Equation(s): +// \fifo_read_inst|Equal2~0_combout = (\fifo_read_inst|cnt_read [3] & (\fifo_read_inst|cnt_read [1] & (!\fifo_read_inst|cnt_read [2] & !\fifo_read_inst|cnt_read [0]))) + + .dataa(\fifo_read_inst|cnt_read [3]), + .datab(\fifo_read_inst|cnt_read [1]), + .datac(\fifo_read_inst|cnt_read [2]), + .datad(\fifo_read_inst|cnt_read [0]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~0 .lut_mask = 16'h0008; +defparam \fifo_read_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N30 +cycloneive_lcell_comb \fifo_read_inst|Equal2~1 ( +// Equation(s): +// \fifo_read_inst|Equal2~1_combout = (!\fifo_read_inst|cnt_read [6] & (!\fifo_read_inst|cnt_read [7] & (!\fifo_read_inst|cnt_read [4] & !\fifo_read_inst|cnt_read [5]))) + + .dataa(\fifo_read_inst|cnt_read [6]), + .datab(\fifo_read_inst|cnt_read [7]), + .datac(\fifo_read_inst|cnt_read [4]), + .datad(\fifo_read_inst|cnt_read [5]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~1 .lut_mask = 16'h0001; +defparam \fifo_read_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y26_N24 +cycloneive_lcell_comb \fifo_read_inst|Equal2~2 ( +// Equation(s): +// \fifo_read_inst|Equal2~2_combout = (\fifo_read_inst|Equal2~0_combout & (!\fifo_read_inst|cnt_read [9] & (\fifo_read_inst|Equal2~1_combout & !\fifo_read_inst|cnt_read [8]))) + + .dataa(\fifo_read_inst|Equal2~0_combout ), + .datab(\fifo_read_inst|cnt_read [9]), + .datac(\fifo_read_inst|Equal2~1_combout ), + .datad(\fifo_read_inst|cnt_read [8]), + .cin(gnd), + .combout(\fifo_read_inst|Equal2~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal2~2 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal2~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N0 +cycloneive_lcell_comb \fifo_read_inst|rd_flag~0 ( +// Equation(s): +// \fifo_read_inst|rd_flag~0_combout = (!\fifo_read_inst|Equal2~2_combout & ((\fifo_read_inst|rd_flag~q ) # ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1] & +// \fifo_read_inst|Equal1~2_combout )))) + + .dataa(\fifo_read_inst|Equal2~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datac(\fifo_read_inst|rd_flag~q ), + .datad(\fifo_read_inst|Equal1~2_combout ), + .cin(gnd), + .combout(\fifo_read_inst|rd_flag~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|rd_flag~0 .lut_mask = 16'h5450; +defparam \fifo_read_inst|rd_flag~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N22 +cycloneive_lcell_comb \uart_rx_inst|bit_cnt~1 ( +// Equation(s): +// \uart_rx_inst|bit_cnt~1_combout = (\uart_rx_inst|Add1~0_combout & (((!\uart_rx_inst|always4~0_combout ) # (!\uart_rx_inst|bit_flag~q )) # (!\uart_rx_inst|bit_cnt [3]))) + + .dataa(\uart_rx_inst|bit_cnt [3]), + .datab(\uart_rx_inst|Add1~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(\uart_rx_inst|always4~0_combout ), + .cin(gnd), + .combout(\uart_rx_inst|bit_cnt~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt~1 .lut_mask = 16'h4CCC; +defparam \uart_rx_inst|bit_cnt~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N7 +dffeas \uart_rx_inst|work_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|work_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|work_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|work_en .is_wysiwyg = "true"; +defparam \uart_rx_inst|work_en .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y24_N7 +dffeas \uart_rx_inst|start_nedge ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|always3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|start_nedge~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|start_nedge .is_wysiwyg = "true"; +defparam \uart_rx_inst|start_nedge .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N6 +cycloneive_lcell_comb \uart_rx_inst|work_en~0 ( +// Equation(s): +// \uart_rx_inst|work_en~0_combout = (\uart_rx_inst|start_nedge~q ) # ((\uart_rx_inst|work_en~q & !\uart_rx_inst|always4~1_combout )) + + .dataa(gnd), + .datab(\uart_rx_inst|start_nedge~q ), + .datac(\uart_rx_inst|work_en~q ), + .datad(\uart_rx_inst|always4~1_combout ), + .cin(gnd), + .combout(\uart_rx_inst|work_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|work_en~0 .lut_mask = 16'hCCFC; +defparam \uart_rx_inst|work_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N6 +cycloneive_lcell_comb \uart_rx_inst|always3~0 ( +// Equation(s): +// \uart_rx_inst|always3~0_combout = (\uart_rx_inst|rx_reg2~q & !\uart_rx_inst|rx_reg3~q ) + + .dataa(gnd), + .datab(\uart_rx_inst|rx_reg2~q ), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg3~q ), + .cin(gnd), + .combout(\uart_rx_inst|always3~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always3~0 .lut_mask = 16'h00CC; +defparam \uart_rx_inst|always3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N12 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[0]~5 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[0]~5_combout = (!\uart_tx_inst|always0~1_combout & (\uart_tx_inst|bit_cnt [0] $ (((\uart_tx_inst|bit_flag~q & \uart_tx_inst|work_en~q ))))) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(\uart_tx_inst|always0~1_combout ), + .datac(\uart_tx_inst|bit_cnt [0]), + .datad(\uart_tx_inst|work_en~q ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[0]~5 .lut_mask = 16'h1230; +defparam \uart_tx_inst|bit_cnt[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y9_N16 +cycloneive_io_obuf \tx~output ( + .i(!\uart_tx_inst|tx~q ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(tx), + .obar()); +// synopsys translate_off +defparam \tx~output .bus_hold = "false"; +defparam \tx~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X1_Y29_N30 +cycloneive_io_obuf \sdram_clk~output ( + .i(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_clk), + .obar()); +// synopsys translate_off +defparam \sdram_clk~output .bus_hold = "false"; +defparam \sdram_clk~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y13_N23 +cycloneive_io_obuf \sdram_cke~output ( + .i(vcc), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cke), + .obar()); +// synopsys translate_off +defparam \sdram_cke~output .bus_hold = "false"; +defparam \sdram_cke~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N9 +cycloneive_io_obuf \sdram_cs_n~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cs_n), + .obar()); +// synopsys translate_off +defparam \sdram_cs_n~output .bus_hold = "false"; +defparam \sdram_cs_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X7_Y29_N16 +cycloneive_io_obuf \sdram_cas_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_cas_n), + .obar()); +// synopsys translate_off +defparam \sdram_cas_n~output .bus_hold = "false"; +defparam \sdram_cas_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N16 +cycloneive_io_obuf \sdram_ras_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ras_n), + .obar()); +// synopsys translate_off +defparam \sdram_ras_n~output .bus_hold = "false"; +defparam \sdram_ras_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X7_Y29_N9 +cycloneive_io_obuf \sdram_we_n~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_we_n), + .obar()); +// synopsys translate_off +defparam \sdram_we_n~output .bus_hold = "false"; +defparam \sdram_we_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N16 +cycloneive_io_obuf \sdram_ba[0]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ba[0]), + .obar()); +// synopsys translate_off +defparam \sdram_ba[0]~output .bus_hold = "false"; +defparam \sdram_ba[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X1_Y29_N2 +cycloneive_io_obuf \sdram_ba[1]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_ba[1]), + .obar()); +// synopsys translate_off +defparam \sdram_ba[1]~output .bus_hold = "false"; +defparam \sdram_ba[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N9 +cycloneive_io_obuf \sdram_addr[0]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[0]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[0]~output .bus_hold = "false"; +defparam \sdram_addr[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y27_N16 +cycloneive_io_obuf \sdram_addr[1]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[1]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[1]~output .bus_hold = "false"; +defparam \sdram_addr[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y27_N9 +cycloneive_io_obuf \sdram_addr[2]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[2]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[2]~output .bus_hold = "false"; +defparam \sdram_addr[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N23 +cycloneive_io_obuf \sdram_addr[3]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[3]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[3]~output .bus_hold = "false"; +defparam \sdram_addr[3]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N16 +cycloneive_io_obuf \sdram_addr[4]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[4]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[4]~output .bus_hold = "false"; +defparam \sdram_addr[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y24_N16 +cycloneive_io_obuf \sdram_addr[5]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[5]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[5]~output .bus_hold = "false"; +defparam \sdram_addr[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y23_N2 +cycloneive_io_obuf \sdram_addr[6]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[6]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[6]~output .bus_hold = "false"; +defparam \sdram_addr[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y24_N23 +cycloneive_io_obuf \sdram_addr[7]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[7]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[7]~output .bus_hold = "false"; +defparam \sdram_addr[7]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N16 +cycloneive_io_obuf \sdram_addr[8]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[8]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[8]~output .bus_hold = "false"; +defparam \sdram_addr[8]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y12_N16 +cycloneive_io_obuf \sdram_addr[9]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[9]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[9]~output .bus_hold = "false"; +defparam \sdram_addr[9]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N2 +cycloneive_io_obuf \sdram_addr[10]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[10]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[10]~output .bus_hold = "false"; +defparam \sdram_addr[10]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y12_N23 +cycloneive_io_obuf \sdram_addr[11]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[11]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[11]~output .bus_hold = "false"; +defparam \sdram_addr[11]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y13_N16 +cycloneive_io_obuf \sdram_addr[12]~output ( + .i(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_addr[12]), + .obar()); +// synopsys translate_off +defparam \sdram_addr[12]~output .bus_hold = "false"; +defparam \sdram_addr[12]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X5_Y29_N2 +cycloneive_io_obuf \sdram_dqm[0]~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dqm[0]), + .obar()); +// synopsys translate_off +defparam \sdram_dqm[0]~output .bus_hold = "false"; +defparam \sdram_dqm[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y20_N2 +cycloneive_io_obuf \sdram_dqm[1]~output ( + .i(gnd), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dqm[1]), + .obar()); +// synopsys translate_off +defparam \sdram_dqm[1]~output .bus_hold = "false"; +defparam \sdram_dqm[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N9 +cycloneive_io_obuf \sdram_dq[0]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [0]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[0]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[0]~output .bus_hold = "false"; +defparam \sdram_dq[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N2 +cycloneive_io_obuf \sdram_dq[1]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [1]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[1]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[1]~output .bus_hold = "false"; +defparam \sdram_dq[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X9_Y29_N2 +cycloneive_io_obuf \sdram_dq[2]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [2]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[2]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[2]~output .bus_hold = "false"; +defparam \sdram_dq[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X14_Y29_N30 +cycloneive_io_obuf \sdram_dq[3]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [3]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[3]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[3]~output .bus_hold = "false"; +defparam \sdram_dq[3]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X14_Y29_N23 +cycloneive_io_obuf \sdram_dq[4]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [4]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[4]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[4]~output .bus_hold = "false"; +defparam \sdram_dq[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X9_Y29_N9 +cycloneive_io_obuf \sdram_dq[5]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [5]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[5]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[5]~output .bus_hold = "false"; +defparam \sdram_dq[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N16 +cycloneive_io_obuf \sdram_dq[6]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [6]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[6]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[6]~output .bus_hold = "false"; +defparam \sdram_dq[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X11_Y29_N23 +cycloneive_io_obuf \sdram_dq[7]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [7]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[7]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[7]~output .bus_hold = "false"; +defparam \sdram_dq[7]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y20_N9 +cycloneive_io_obuf \sdram_dq[8]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [8]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[8]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[8]~output .bus_hold = "false"; +defparam \sdram_dq[8]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X3_Y29_N30 +cycloneive_io_obuf \sdram_dq[9]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [9]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[9]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[9]~output .bus_hold = "false"; +defparam \sdram_dq[9]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y25_N2 +cycloneive_io_obuf \sdram_dq[10]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [10]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[10]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[10]~output .bus_hold = "false"; +defparam \sdram_dq[10]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y26_N9 +cycloneive_io_obuf \sdram_dq[11]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [11]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[11]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[11]~output .bus_hold = "false"; +defparam \sdram_dq[11]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y23_N9 +cycloneive_io_obuf \sdram_dq[12]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [12]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[12]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[12]~output .bus_hold = "false"; +defparam \sdram_dq[12]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N9 +cycloneive_io_obuf \sdram_dq[13]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [13]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[13]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[13]~output .bus_hold = "false"; +defparam \sdram_dq[13]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N23 +cycloneive_io_obuf \sdram_dq[14]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [14]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[14]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[14]~output .bus_hold = "false"; +defparam \sdram_dq[14]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y21_N2 +cycloneive_io_obuf \sdram_dq[15]~output ( + .i(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|q_b [15]), + .oe(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(sdram_dq[15]), + .obar()); +// synopsys translate_off +defparam \sdram_dq[15]~output .bus_hold = "false"; +defparam \sdram_dq[15]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N2 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[0]~13 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[0]~13_combout = (\uart_rx_inst|work_en~q & (\uart_rx_inst|baud_cnt [0] $ (VCC))) # (!\uart_rx_inst|work_en~q & (\uart_rx_inst|baud_cnt [0] & VCC)) +// \uart_rx_inst|baud_cnt[0]~14 = CARRY((\uart_rx_inst|work_en~q & \uart_rx_inst|baud_cnt [0])) + + .dataa(\uart_rx_inst|work_en~q ), + .datab(\uart_rx_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_rx_inst|baud_cnt[0]~13_combout ), + .cout(\uart_rx_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \uart_rx_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X41_Y15_N22 +cycloneive_io_ibuf \sys_clk~input ( + .i(sys_clk), + .ibar(gnd), + .o(\sys_clk~input_o )); +// synopsys translate_off +defparam \sys_clk~input .bus_hold = "false"; +defparam \sys_clk~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: PLL_2 +cycloneive_pll \clk_gen_inst|altpll_component|auto_generated|pll1 ( + .areset(!\sys_rst_n~input_o ), + .pfdena(vcc), + .fbin(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ), + .phaseupdown(gnd), + .phasestep(gnd), + .scandata(gnd), + .scanclk(gnd), + .scanclkena(vcc), + .configupdate(gnd), + .clkswitch(gnd), + .inclk({gnd,\sys_clk~input_o }), + .phasecounterselect(3'b000), + .phasedone(), + .scandataout(), + .scandone(), + .activeclock(), + .locked(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .vcooverrange(), + .vcounderrange(), + .fbout(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_fbout ), + .clk(\clk_gen_inst|altpll_component|auto_generated|pll1_CLK_bus ), + .clkbad()); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .auto_settings = "false"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .bandwidth_type = "medium"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_high = 6; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_low = 6; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c0_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_high = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_low = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c1_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_high = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_low = 3; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_mode = "even"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c2_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_high = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_initial = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_low = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_mode = "bypass"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c3_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_high = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_initial = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_low = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_mode = "bypass"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_ph = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .c4_use_casc_in = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .charge_pump_current_bits = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_counter = "c0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_multiply_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk0_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_counter = "c1"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_multiply_by = 2; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk1_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_counter = "c2"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_divide_by = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_multiply_by = 2; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk2_phase_shift = "-833"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_counter = "unused"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk3_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_counter = "unused"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_duty_cycle = 50; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .clk4_phase_shift = "0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .compensate_clock = "clock0"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .inclk0_input_frequency = 20000; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .inclk1_input_frequency = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .loop_filter_c_bits = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .loop_filter_r_bits = 27; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m = 12; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m_initial = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .m_ph = 4; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .n = 1; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .operation_mode = "normal"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pfd_max = 200000; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pfd_min = 3076; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .pll_compensation_delay = 3334; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .self_reset_on_loss_lock = "off"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .simulation_type = "timing"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .switch_over_type = "auto"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_center = 1538; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_divide_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_frequency_control = "auto"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_max = 3333; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_min = 1538; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_multiply_by = 0; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_phase_shift_step = 208; +defparam \clk_gen_inst|altpll_component|auto_generated|pll1 .vco_post_scale = 2; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N24 +cycloneive_lcell_comb \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder ( +// Equation(s): +// \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout = VCC + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder .lut_mask = 16'hFFFF; +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X41_Y4_N1 +cycloneive_io_ibuf \sys_rst_n~input ( + .i(sys_rst_n), + .ibar(gnd), + .o(\sys_rst_n~input_o )); +// synopsys translate_off +defparam \sys_rst_n~input .bus_hold = "false"; +defparam \sys_rst_n~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X27_Y26_N25 +dffeas \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .d(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ), + .prn(vcc)); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync .is_wysiwyg = "true"; +defparam \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y26_N26 +cycloneive_lcell_comb \rst_n~0 ( +// Equation(s): +// \rst_n~0_combout = ((!\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ) # (!\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked )) # (!\sys_rst_n~input_o ) + + .dataa(\sys_rst_n~input_o ), + .datab(gnd), + .datac(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_locked ), + .datad(\clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~q ), + .cin(gnd), + .combout(\rst_n~0_combout ), + .cout()); +// synopsys translate_off +defparam \rst_n~0 .lut_mask = 16'h5FFF; +defparam \rst_n~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: CLKCTRL_G17 +cycloneive_clkctrl \rst_n~0clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\rst_n~0_combout }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\rst_n~0clkctrl_outclk )); +// synopsys translate_off +defparam \rst_n~0clkctrl .clock_type = "global clock"; +defparam \rst_n~0clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N6 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[2]~17 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[2]~17_combout = (\uart_rx_inst|baud_cnt [2] & (\uart_rx_inst|baud_cnt[1]~16 $ (GND))) # (!\uart_rx_inst|baud_cnt [2] & (!\uart_rx_inst|baud_cnt[1]~16 & VCC)) +// \uart_rx_inst|baud_cnt[2]~18 = CARRY((\uart_rx_inst|baud_cnt [2] & !\uart_rx_inst|baud_cnt[1]~16 )) + + .dataa(\uart_rx_inst|baud_cnt [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[1]~16 ), + .combout(\uart_rx_inst|baud_cnt[2]~17_combout ), + .cout(\uart_rx_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[2]~17 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N8 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[3]~19 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[3]~19_combout = (\uart_rx_inst|baud_cnt [3] & (!\uart_rx_inst|baud_cnt[2]~18 )) # (!\uart_rx_inst|baud_cnt [3] & ((\uart_rx_inst|baud_cnt[2]~18 ) # (GND))) +// \uart_rx_inst|baud_cnt[3]~20 = CARRY((!\uart_rx_inst|baud_cnt[2]~18 ) # (!\uart_rx_inst|baud_cnt [3])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [3]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[2]~18 ), + .combout(\uart_rx_inst|baud_cnt[3]~19_combout ), + .cout(\uart_rx_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[3]~19 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N9 +dffeas \uart_rx_inst|baud_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N12 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[5]~23 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[5]~23_combout = (\uart_rx_inst|baud_cnt [5] & (!\uart_rx_inst|baud_cnt[4]~22 )) # (!\uart_rx_inst|baud_cnt [5] & ((\uart_rx_inst|baud_cnt[4]~22 ) # (GND))) +// \uart_rx_inst|baud_cnt[5]~24 = CARRY((!\uart_rx_inst|baud_cnt[4]~22 ) # (!\uart_rx_inst|baud_cnt [5])) + + .dataa(\uart_rx_inst|baud_cnt [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[4]~22 ), + .combout(\uart_rx_inst|baud_cnt[5]~23_combout ), + .cout(\uart_rx_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[5]~23 .lut_mask = 16'h5A5F; +defparam \uart_rx_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N13 +dffeas \uart_rx_inst|baud_cnt[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N30 +cycloneive_lcell_comb \uart_rx_inst|Equal1~1 ( +// Equation(s): +// \uart_rx_inst|Equal1~1_combout = (\uart_rx_inst|baud_cnt [4] & (\uart_rx_inst|baud_cnt [2] & (!\uart_rx_inst|baud_cnt [3] & !\uart_rx_inst|baud_cnt [5]))) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(\uart_rx_inst|baud_cnt [2]), + .datac(\uart_rx_inst|baud_cnt [3]), + .datad(\uart_rx_inst|baud_cnt [5]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~1 .lut_mask = 16'h0008; +defparam \uart_rx_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N14 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[6]~25 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[6]~25_combout = (\uart_rx_inst|baud_cnt [6] & (\uart_rx_inst|baud_cnt[5]~24 $ (GND))) # (!\uart_rx_inst|baud_cnt [6] & (!\uart_rx_inst|baud_cnt[5]~24 & VCC)) +// \uart_rx_inst|baud_cnt[6]~26 = CARRY((\uart_rx_inst|baud_cnt [6] & !\uart_rx_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[5]~24 ), + .combout(\uart_rx_inst|baud_cnt[6]~25_combout ), + .cout(\uart_rx_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N15 +dffeas \uart_rx_inst|baud_cnt[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N16 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[7]~27 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[7]~27_combout = (\uart_rx_inst|baud_cnt [7] & (!\uart_rx_inst|baud_cnt[6]~26 )) # (!\uart_rx_inst|baud_cnt [7] & ((\uart_rx_inst|baud_cnt[6]~26 ) # (GND))) +// \uart_rx_inst|baud_cnt[7]~28 = CARRY((!\uart_rx_inst|baud_cnt[6]~26 ) # (!\uart_rx_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[6]~26 ), + .combout(\uart_rx_inst|baud_cnt[7]~27_combout ), + .cout(\uart_rx_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N17 +dffeas \uart_rx_inst|baud_cnt[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N18 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[8]~29 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[8]~29_combout = (\uart_rx_inst|baud_cnt [8] & (\uart_rx_inst|baud_cnt[7]~28 $ (GND))) # (!\uart_rx_inst|baud_cnt [8] & (!\uart_rx_inst|baud_cnt[7]~28 & VCC)) +// \uart_rx_inst|baud_cnt[8]~30 = CARRY((\uart_rx_inst|baud_cnt [8] & !\uart_rx_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[7]~28 ), + .combout(\uart_rx_inst|baud_cnt[8]~29_combout ), + .cout(\uart_rx_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \uart_rx_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N19 +dffeas \uart_rx_inst|baud_cnt[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N0 +cycloneive_lcell_comb \uart_rx_inst|Equal1~0 ( +// Equation(s): +// \uart_rx_inst|Equal1~0_combout = (\uart_rx_inst|baud_cnt [0] & (!\uart_rx_inst|baud_cnt [8] & (\uart_rx_inst|baud_cnt [1] & !\uart_rx_inst|baud_cnt [7]))) + + .dataa(\uart_rx_inst|baud_cnt [0]), + .datab(\uart_rx_inst|baud_cnt [8]), + .datac(\uart_rx_inst|baud_cnt [1]), + .datad(\uart_rx_inst|baud_cnt [7]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~0 .lut_mask = 16'h0020; +defparam \uart_rx_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N20 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[9]~31 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[9]~31_combout = (\uart_rx_inst|baud_cnt [9] & (!\uart_rx_inst|baud_cnt[8]~30 )) # (!\uart_rx_inst|baud_cnt [9] & ((\uart_rx_inst|baud_cnt[8]~30 ) # (GND))) +// \uart_rx_inst|baud_cnt[9]~32 = CARRY((!\uart_rx_inst|baud_cnt[8]~30 ) # (!\uart_rx_inst|baud_cnt [9])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [9]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[8]~30 ), + .combout(\uart_rx_inst|baud_cnt[9]~31_combout ), + .cout(\uart_rx_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[9]~31 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N21 +dffeas \uart_rx_inst|baud_cnt[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N22 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[10]~33 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[10]~33_combout = (\uart_rx_inst|baud_cnt [10] & (\uart_rx_inst|baud_cnt[9]~32 $ (GND))) # (!\uart_rx_inst|baud_cnt [10] & (!\uart_rx_inst|baud_cnt[9]~32 & VCC)) +// \uart_rx_inst|baud_cnt[10]~34 = CARRY((\uart_rx_inst|baud_cnt [10] & !\uart_rx_inst|baud_cnt[9]~32 )) + + .dataa(\uart_rx_inst|baud_cnt [10]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[9]~32 ), + .combout(\uart_rx_inst|baud_cnt[10]~33_combout ), + .cout(\uart_rx_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[10]~33 .lut_mask = 16'hA50A; +defparam \uart_rx_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N24 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[11]~35 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[11]~35_combout = (\uart_rx_inst|baud_cnt [11] & (!\uart_rx_inst|baud_cnt[10]~34 )) # (!\uart_rx_inst|baud_cnt [11] & ((\uart_rx_inst|baud_cnt[10]~34 ) # (GND))) +// \uart_rx_inst|baud_cnt[11]~36 = CARRY((!\uart_rx_inst|baud_cnt[10]~34 ) # (!\uart_rx_inst|baud_cnt [11])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[10]~34 ), + .combout(\uart_rx_inst|baud_cnt[11]~35_combout ), + .cout(\uart_rx_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[11]~35 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N25 +dffeas \uart_rx_inst|baud_cnt[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N8 +cycloneive_lcell_comb \uart_rx_inst|Equal1~2 ( +// Equation(s): +// \uart_rx_inst|Equal1~2_combout = (!\uart_rx_inst|baud_cnt [9] & \uart_rx_inst|baud_cnt [6]) + + .dataa(gnd), + .datab(gnd), + .datac(\uart_rx_inst|baud_cnt [9]), + .datad(\uart_rx_inst|baud_cnt [6]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~2 .lut_mask = 16'h0F00; +defparam \uart_rx_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y25_N23 +dffeas \uart_rx_inst|baud_cnt[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N2 +cycloneive_lcell_comb \uart_rx_inst|Equal1~3 ( +// Equation(s): +// \uart_rx_inst|Equal1~3_combout = (\uart_rx_inst|baud_cnt [12] & (!\uart_rx_inst|baud_cnt [11] & (\uart_rx_inst|Equal1~2_combout & \uart_rx_inst|baud_cnt [10]))) + + .dataa(\uart_rx_inst|baud_cnt [12]), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(\uart_rx_inst|Equal1~2_combout ), + .datad(\uart_rx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_rx_inst|Equal1~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal1~3 .lut_mask = 16'h2000; +defparam \uart_rx_inst|Equal1~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N12 +cycloneive_lcell_comb \uart_rx_inst|always5~0 ( +// Equation(s): +// \uart_rx_inst|always5~0_combout = ((\uart_rx_inst|Equal1~1_combout & (\uart_rx_inst|Equal1~0_combout & \uart_rx_inst|Equal1~3_combout ))) # (!\uart_rx_inst|work_en~q ) + + .dataa(\uart_rx_inst|work_en~q ), + .datab(\uart_rx_inst|Equal1~1_combout ), + .datac(\uart_rx_inst|Equal1~0_combout ), + .datad(\uart_rx_inst|Equal1~3_combout ), + .cin(gnd), + .combout(\uart_rx_inst|always5~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always5~0 .lut_mask = 16'hD555; +defparam \uart_rx_inst|always5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y25_N3 +dffeas \uart_rx_inst|baud_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N4 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[1]~15 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[1]~15_combout = (\uart_rx_inst|baud_cnt [1] & (!\uart_rx_inst|baud_cnt[0]~14 )) # (!\uart_rx_inst|baud_cnt [1] & ((\uart_rx_inst|baud_cnt[0]~14 ) # (GND))) +// \uart_rx_inst|baud_cnt[1]~16 = CARRY((!\uart_rx_inst|baud_cnt[0]~14 ) # (!\uart_rx_inst|baud_cnt [1])) + + .dataa(gnd), + .datab(\uart_rx_inst|baud_cnt [1]), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|baud_cnt[0]~14 ), + .combout(\uart_rx_inst|baud_cnt[1]~15_combout ), + .cout(\uart_rx_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[1]~15 .lut_mask = 16'h3C3F; +defparam \uart_rx_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N5 +dffeas \uart_rx_inst|baud_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y25_N7 +dffeas \uart_rx_inst|baud_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N28 +cycloneive_lcell_comb \uart_rx_inst|Equal2~0 ( +// Equation(s): +// \uart_rx_inst|Equal2~0_combout = (!\uart_rx_inst|baud_cnt [4] & (!\uart_rx_inst|baud_cnt [2] & (\uart_rx_inst|baud_cnt [3] & \uart_rx_inst|baud_cnt [5]))) + + .dataa(\uart_rx_inst|baud_cnt [4]), + .datab(\uart_rx_inst|baud_cnt [2]), + .datac(\uart_rx_inst|baud_cnt [3]), + .datad(\uart_rx_inst|baud_cnt [5]), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~0 .lut_mask = 16'h1000; +defparam \uart_rx_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y25_N26 +cycloneive_lcell_comb \uart_rx_inst|baud_cnt[12]~37 ( +// Equation(s): +// \uart_rx_inst|baud_cnt[12]~37_combout = \uart_rx_inst|baud_cnt [12] $ (!\uart_rx_inst|baud_cnt[11]~36 ) + + .dataa(\uart_rx_inst|baud_cnt [12]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\uart_rx_inst|baud_cnt[11]~36 ), + .combout(\uart_rx_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[12]~37 .lut_mask = 16'hA5A5; +defparam \uart_rx_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X15_Y25_N27 +dffeas \uart_rx_inst|baud_cnt[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\uart_rx_inst|always5~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \uart_rx_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N20 +cycloneive_lcell_comb \uart_rx_inst|Equal2~1 ( +// Equation(s): +// \uart_rx_inst|Equal2~1_combout = (!\uart_rx_inst|baud_cnt [6] & (\uart_rx_inst|baud_cnt [11] & (\uart_rx_inst|baud_cnt [9] & !\uart_rx_inst|baud_cnt [10]))) + + .dataa(\uart_rx_inst|baud_cnt [6]), + .datab(\uart_rx_inst|baud_cnt [11]), + .datac(\uart_rx_inst|baud_cnt [9]), + .datad(\uart_rx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~1 .lut_mask = 16'h0040; +defparam \uart_rx_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N4 +cycloneive_lcell_comb \uart_rx_inst|Equal2~2 ( +// Equation(s): +// \uart_rx_inst|Equal2~2_combout = (\uart_rx_inst|Equal1~0_combout & (\uart_rx_inst|Equal2~0_combout & (!\uart_rx_inst|baud_cnt [12] & \uart_rx_inst|Equal2~1_combout ))) + + .dataa(\uart_rx_inst|Equal1~0_combout ), + .datab(\uart_rx_inst|Equal2~0_combout ), + .datac(\uart_rx_inst|baud_cnt [12]), + .datad(\uart_rx_inst|Equal2~1_combout ), + .cin(gnd), + .combout(\uart_rx_inst|Equal2~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|Equal2~2 .lut_mask = 16'h0800; +defparam \uart_rx_inst|Equal2~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N5 +dffeas \uart_rx_inst|bit_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Equal2~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N26 +cycloneive_lcell_comb \uart_rx_inst|Add1~2 ( +// Equation(s): +// \uart_rx_inst|Add1~2_combout = (\uart_rx_inst|bit_cnt [1] & (!\uart_rx_inst|Add1~1 )) # (!\uart_rx_inst|bit_cnt [1] & ((\uart_rx_inst|Add1~1 ) # (GND))) +// \uart_rx_inst|Add1~3 = CARRY((!\uart_rx_inst|Add1~1 ) # (!\uart_rx_inst|bit_cnt [1])) + + .dataa(\uart_rx_inst|bit_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_rx_inst|Add1~1 ), + .combout(\uart_rx_inst|Add1~2_combout ), + .cout(\uart_rx_inst|Add1~3 )); +// synopsys translate_off +defparam \uart_rx_inst|Add1~2 .lut_mask = 16'h5A5F; +defparam \uart_rx_inst|Add1~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X16_Y25_N29 +dffeas \uart_rx_inst|bit_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Add1~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y25_N27 +dffeas \uart_rx_inst|bit_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|Add1~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N0 +cycloneive_lcell_comb \uart_rx_inst|always4~0 ( +// Equation(s): +// \uart_rx_inst|always4~0_combout = (!\uart_rx_inst|bit_cnt [0] & (!\uart_rx_inst|bit_cnt [2] & !\uart_rx_inst|bit_cnt [1])) + + .dataa(\uart_rx_inst|bit_cnt [0]), + .datab(\uart_rx_inst|bit_cnt [2]), + .datac(\uart_rx_inst|bit_cnt [1]), + .datad(gnd), + .cin(gnd), + .combout(\uart_rx_inst|always4~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always4~0 .lut_mask = 16'h0101; +defparam \uart_rx_inst|always4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N16 +cycloneive_lcell_comb \uart_rx_inst|always4~1 ( +// Equation(s): +// \uart_rx_inst|always4~1_combout = (\uart_rx_inst|bit_cnt [3] & (\uart_rx_inst|always4~0_combout & \uart_rx_inst|bit_flag~q )) + + .dataa(\uart_rx_inst|bit_cnt [3]), + .datab(\uart_rx_inst|always4~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_rx_inst|always4~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always4~1 .lut_mask = 16'h8080; +defparam \uart_rx_inst|always4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N17 +dffeas \uart_rx_inst|rx_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|always4~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_flag .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N1 +dffeas \uart_rx_inst|po_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_flag~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_flag .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .lut_mask = 16'hF0B4; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .lut_mask = 16'h0800; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .lut_mask = 16'h0100; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .lut_mask = 16'hC3F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .lut_mask = 16'h0004; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 .lut_mask = 16'hA50A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [5]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 .lut_mask = 16'h0100; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 .lut_mask = 16'h1000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [9]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y20_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .lut_mask = 16'hE1F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .lut_mask = 16'h0990; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'h2000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 .lut_mask = 16'h000F; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X16_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y21_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7] $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8008; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'h0F33; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q )))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .lut_mask = 16'hEEE0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X16_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4~combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y20_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X15_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y21_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [0]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1_cout )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 .lut_mask = 16'h00BB; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~3 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [3]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~5 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~7 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & +// ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5] & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~9 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7~combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y20_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout = ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~11 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X17_Y20_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )))) +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 = CARRY((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7] & !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7] & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~13 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~15 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ) # +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 .lut_mask = 16'hFFFE; +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout & +// ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ) # (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 .lut_mask = 16'hFFC8; +defparam \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a [9]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a [9]), + .cin(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~17 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X15_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & ((\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ) # ((\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 .lut_mask = 16'hAAA8; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X15_Y20_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .lut_mask = 16'hF0B4; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .lut_mask = 16'hD2F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .lut_mask = 16'hD2D2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y26_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .lut_mask = 16'h0020; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .lut_mask = 16'hD2F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 .lut_mask = 16'h33CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 .lut_mask = 16'h0500; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] $ (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 .lut_mask = 16'h5A5A; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X23_Y23_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 .lut_mask = 16'h000F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 .lut_mask = 16'h2000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 .lut_mask = 16'hCCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [5] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 .lut_mask = 16'hFF30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 .lut_mask = 16'h00F8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 .lut_mask = 16'h0088; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 .lut_mask = 16'hCCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 .lut_mask = 16'hEEFF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [0] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 .lut_mask = 16'h00FE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 .lut_mask = 16'hFFEC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y23_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y23_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y23_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk +// [1]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]) # (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 .lut_mask = 16'h5776; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .lut_mask = 16'hF0D2; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .lut_mask = 16'h78F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .lut_mask = 16'h0100; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .lut_mask = 16'hA5F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .lut_mask = 16'h9669; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2] $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .lut_mask = 16'h3CC3; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .lut_mask = 16'h0008; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [9]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .lut_mask = 16'hFCFF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 .lut_mask = 16'hF05A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'h8241; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout +// )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .lut_mask = 16'hAC0C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout )))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'h59FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y25_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .lut_mask = 16'h9009; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [5]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [4]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [0]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .lut_mask = 16'h0021; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y25_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] $ +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [2]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .lut_mask = 16'h8421; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout & +// (((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout +// )) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .lut_mask = 16'h1333; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y24_N25 +dffeas \fifo_read_inst|read_en_dly ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\fifo_read_inst|read_en~q ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_en_dly~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_en_dly .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_en_dly .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout = (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q & \fifo_read_inst|read_en_dly~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datab(gnd), + .datac(\fifo_read_inst|read_en_dly~q ), + .datad(gnd), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq .lut_mask = 16'h5050; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y24_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] $ (((VCC) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0] $ +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 .lut_mask = 16'h5599; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y24_N7 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N8 +cycloneive_lcell_comb \fifo_read_inst|Add2~0 ( +// Equation(s): +// \fifo_read_inst|Add2~0_combout = (\fifo_read_inst|bit_flag~q & (\fifo_read_inst|bit_cnt [0] $ (VCC))) # (!\fifo_read_inst|bit_flag~q & (\fifo_read_inst|bit_cnt [0] & VCC)) +// \fifo_read_inst|Add2~1 = CARRY((\fifo_read_inst|bit_flag~q & \fifo_read_inst|bit_cnt [0])) + + .dataa(\fifo_read_inst|bit_flag~q ), + .datab(\fifo_read_inst|bit_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|Add2~0_combout ), + .cout(\fifo_read_inst|Add2~1 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~0 .lut_mask = 16'h6688; +defparam \fifo_read_inst|Add2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N9 +dffeas \fifo_read_inst|bit_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Add2~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N10 +cycloneive_lcell_comb \fifo_read_inst|Add2~2 ( +// Equation(s): +// \fifo_read_inst|Add2~2_combout = (\fifo_read_inst|bit_cnt [1] & (!\fifo_read_inst|Add2~1 )) # (!\fifo_read_inst|bit_cnt [1] & ((\fifo_read_inst|Add2~1 ) # (GND))) +// \fifo_read_inst|Add2~3 = CARRY((!\fifo_read_inst|Add2~1 ) # (!\fifo_read_inst|bit_cnt [1])) + + .dataa(\fifo_read_inst|bit_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|Add2~1 ), + .combout(\fifo_read_inst|Add2~2_combout ), + .cout(\fifo_read_inst|Add2~3 )); +// synopsys translate_off +defparam \fifo_read_inst|Add2~2 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|Add2~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N14 +cycloneive_lcell_comb \fifo_read_inst|Add2~6 ( +// Equation(s): +// \fifo_read_inst|Add2~6_combout = \fifo_read_inst|bit_cnt [3] $ (\fifo_read_inst|Add2~5 ) + + .dataa(gnd), + .datab(\fifo_read_inst|bit_cnt [3]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|Add2~5 ), + .combout(\fifo_read_inst|Add2~6_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Add2~6 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|Add2~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N4 +cycloneive_lcell_comb \fifo_read_inst|bit_cnt~0 ( +// Equation(s): +// \fifo_read_inst|bit_cnt~0_combout = (\fifo_read_inst|Add2~6_combout & ((!\fifo_read_inst|always5~0_combout ) # (!\fifo_read_inst|bit_cnt [0]))) + + .dataa(gnd), + .datab(\fifo_read_inst|bit_cnt [0]), + .datac(\fifo_read_inst|Add2~6_combout ), + .datad(\fifo_read_inst|always5~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|bit_cnt~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt~0 .lut_mask = 16'h30F0; +defparam \fifo_read_inst|bit_cnt~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N5 +dffeas \fifo_read_inst|bit_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|bit_cnt~0_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N4 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[0]~13 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[0]~13_combout = (\fifo_read_inst|rd_flag~q & (\fifo_read_inst|baud_cnt [0] $ (VCC))) # (!\fifo_read_inst|rd_flag~q & (\fifo_read_inst|baud_cnt [0] & VCC)) +// \fifo_read_inst|baud_cnt[0]~14 = CARRY((\fifo_read_inst|rd_flag~q & \fifo_read_inst|baud_cnt [0])) + + .dataa(\fifo_read_inst|rd_flag~q ), + .datab(\fifo_read_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|baud_cnt[0]~13_combout ), + .cout(\fifo_read_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \fifo_read_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N14 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[5]~23 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[5]~23_combout = (\fifo_read_inst|baud_cnt [5] & (!\fifo_read_inst|baud_cnt[4]~22 )) # (!\fifo_read_inst|baud_cnt [5] & ((\fifo_read_inst|baud_cnt[4]~22 ) # (GND))) +// \fifo_read_inst|baud_cnt[5]~24 = CARRY((!\fifo_read_inst|baud_cnt[4]~22 ) # (!\fifo_read_inst|baud_cnt [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[4]~22 ), + .combout(\fifo_read_inst|baud_cnt[5]~23_combout ), + .cout(\fifo_read_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[5]~23 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N16 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[6]~25 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[6]~25_combout = (\fifo_read_inst|baud_cnt [6] & (\fifo_read_inst|baud_cnt[5]~24 $ (GND))) # (!\fifo_read_inst|baud_cnt [6] & (!\fifo_read_inst|baud_cnt[5]~24 & VCC)) +// \fifo_read_inst|baud_cnt[6]~26 = CARRY((\fifo_read_inst|baud_cnt [6] & !\fifo_read_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[5]~24 ), + .combout(\fifo_read_inst|baud_cnt[6]~25_combout ), + .cout(\fifo_read_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N17 +dffeas \fifo_read_inst|baud_cnt[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N18 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[7]~27 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[7]~27_combout = (\fifo_read_inst|baud_cnt [7] & (!\fifo_read_inst|baud_cnt[6]~26 )) # (!\fifo_read_inst|baud_cnt [7] & ((\fifo_read_inst|baud_cnt[6]~26 ) # (GND))) +// \fifo_read_inst|baud_cnt[7]~28 = CARRY((!\fifo_read_inst|baud_cnt[6]~26 ) # (!\fifo_read_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[6]~26 ), + .combout(\fifo_read_inst|baud_cnt[7]~27_combout ), + .cout(\fifo_read_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N19 +dffeas \fifo_read_inst|baud_cnt[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N20 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[8]~29 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[8]~29_combout = (\fifo_read_inst|baud_cnt [8] & (\fifo_read_inst|baud_cnt[7]~28 $ (GND))) # (!\fifo_read_inst|baud_cnt [8] & (!\fifo_read_inst|baud_cnt[7]~28 & VCC)) +// \fifo_read_inst|baud_cnt[8]~30 = CARRY((\fifo_read_inst|baud_cnt [8] & !\fifo_read_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[7]~28 ), + .combout(\fifo_read_inst|baud_cnt[8]~29_combout ), + .cout(\fifo_read_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N21 +dffeas \fifo_read_inst|baud_cnt[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N0 +cycloneive_lcell_comb \fifo_read_inst|Equal4~0 ( +// Equation(s): +// \fifo_read_inst|Equal4~0_combout = (\fifo_read_inst|baud_cnt [1] & (!\fifo_read_inst|baud_cnt [8] & (\fifo_read_inst|baud_cnt [0] & !\fifo_read_inst|baud_cnt [7]))) + + .dataa(\fifo_read_inst|baud_cnt [1]), + .datab(\fifo_read_inst|baud_cnt [8]), + .datac(\fifo_read_inst|baud_cnt [0]), + .datad(\fifo_read_inst|baud_cnt [7]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~0 .lut_mask = 16'h0020; +defparam \fifo_read_inst|Equal4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N10 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[3]~19 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[3]~19_combout = (\fifo_read_inst|baud_cnt [3] & (!\fifo_read_inst|baud_cnt[2]~18 )) # (!\fifo_read_inst|baud_cnt [3] & ((\fifo_read_inst|baud_cnt[2]~18 ) # (GND))) +// \fifo_read_inst|baud_cnt[3]~20 = CARRY((!\fifo_read_inst|baud_cnt[2]~18 ) # (!\fifo_read_inst|baud_cnt [3])) + + .dataa(\fifo_read_inst|baud_cnt [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[2]~18 ), + .combout(\fifo_read_inst|baud_cnt[3]~19_combout ), + .cout(\fifo_read_inst|baud_cnt[3]~20 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[3]~19 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|baud_cnt[3]~19 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N11 +dffeas \fifo_read_inst|baud_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[3]~19_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N22 +cycloneive_lcell_comb \fifo_read_inst|Equal4~1 ( +// Equation(s): +// \fifo_read_inst|Equal4~1_combout = (\fifo_read_inst|baud_cnt [4] & (!\fifo_read_inst|baud_cnt [5] & (!\fifo_read_inst|baud_cnt [3] & \fifo_read_inst|baud_cnt [2]))) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(\fifo_read_inst|baud_cnt [3]), + .datad(\fifo_read_inst|baud_cnt [2]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~1 .lut_mask = 16'h0200; +defparam \fifo_read_inst|Equal4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N24 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[10]~33 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[10]~33_combout = (\fifo_read_inst|baud_cnt [10] & (\fifo_read_inst|baud_cnt[9]~32 $ (GND))) # (!\fifo_read_inst|baud_cnt [10] & (!\fifo_read_inst|baud_cnt[9]~32 & VCC)) +// \fifo_read_inst|baud_cnt[10]~34 = CARRY((\fifo_read_inst|baud_cnt [10] & !\fifo_read_inst|baud_cnt[9]~32 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [10]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[9]~32 ), + .combout(\fifo_read_inst|baud_cnt[10]~33_combout ), + .cout(\fifo_read_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[10]~33 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N25 +dffeas \fifo_read_inst|baud_cnt[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N28 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[12]~37 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[12]~37_combout = \fifo_read_inst|baud_cnt[11]~36 $ (!\fifo_read_inst|baud_cnt [12]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(\fifo_read_inst|baud_cnt[11]~36 ), + .combout(\fifo_read_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[12]~37 .lut_mask = 16'hF00F; +defparam \fifo_read_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N29 +dffeas \fifo_read_inst|baud_cnt[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N16 +cycloneive_lcell_comb \fifo_read_inst|Equal4~3 ( +// Equation(s): +// \fifo_read_inst|Equal4~3_combout = (\fifo_read_inst|Equal4~2_combout & (\fifo_read_inst|Equal4~0_combout & (\fifo_read_inst|Equal4~1_combout & \fifo_read_inst|baud_cnt [12]))) + + .dataa(\fifo_read_inst|Equal4~2_combout ), + .datab(\fifo_read_inst|Equal4~0_combout ), + .datac(\fifo_read_inst|Equal4~1_combout ), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(gnd), + .combout(\fifo_read_inst|Equal4~3_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal4~3 .lut_mask = 16'h8000; +defparam \fifo_read_inst|Equal4~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X29_Y25_N5 +dffeas \fifo_read_inst|baud_cnt[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y25_N8 +cycloneive_lcell_comb \fifo_read_inst|baud_cnt[2]~17 ( +// Equation(s): +// \fifo_read_inst|baud_cnt[2]~17_combout = (\fifo_read_inst|baud_cnt [2] & (\fifo_read_inst|baud_cnt[1]~16 $ (GND))) # (!\fifo_read_inst|baud_cnt [2] & (!\fifo_read_inst|baud_cnt[1]~16 & VCC)) +// \fifo_read_inst|baud_cnt[2]~18 = CARRY((\fifo_read_inst|baud_cnt [2] & !\fifo_read_inst|baud_cnt[1]~16 )) + + .dataa(gnd), + .datab(\fifo_read_inst|baud_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|baud_cnt[1]~16 ), + .combout(\fifo_read_inst|baud_cnt[2]~17_combout ), + .cout(\fifo_read_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[2]~17 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y25_N9 +dffeas \fifo_read_inst|baud_cnt[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y25_N15 +dffeas \fifo_read_inst|baud_cnt[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\fifo_read_inst|Equal4~3_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N28 +cycloneive_lcell_comb \fifo_read_inst|Equal5~0 ( +// Equation(s): +// \fifo_read_inst|Equal5~0_combout = (!\fifo_read_inst|baud_cnt [4] & (\fifo_read_inst|baud_cnt [5] & (\fifo_read_inst|baud_cnt [3] & !\fifo_read_inst|baud_cnt [2]))) + + .dataa(\fifo_read_inst|baud_cnt [4]), + .datab(\fifo_read_inst|baud_cnt [5]), + .datac(\fifo_read_inst|baud_cnt [3]), + .datad(\fifo_read_inst|baud_cnt [2]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~0 .lut_mask = 16'h0040; +defparam \fifo_read_inst|Equal5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N26 +cycloneive_lcell_comb \fifo_read_inst|Equal5~2 ( +// Equation(s): +// \fifo_read_inst|Equal5~2_combout = (\fifo_read_inst|Equal5~1_combout & (\fifo_read_inst|Equal5~0_combout & (\fifo_read_inst|Equal4~0_combout & !\fifo_read_inst|baud_cnt [12]))) + + .dataa(\fifo_read_inst|Equal5~1_combout ), + .datab(\fifo_read_inst|Equal5~0_combout ), + .datac(\fifo_read_inst|Equal4~0_combout ), + .datad(\fifo_read_inst|baud_cnt [12]), + .cin(gnd), + .combout(\fifo_read_inst|Equal5~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|Equal5~2 .lut_mask = 16'h0080; +defparam \fifo_read_inst|Equal5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N27 +dffeas \fifo_read_inst|bit_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|Equal5~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N6 +cycloneive_lcell_comb \fifo_read_inst|bit_cnt~1 ( +// Equation(s): +// \fifo_read_inst|bit_cnt~1_combout = (\fifo_read_inst|Add2~2_combout & ((!\fifo_read_inst|bit_cnt [0]) # (!\fifo_read_inst|always5~0_combout ))) + + .dataa(gnd), + .datab(\fifo_read_inst|always5~0_combout ), + .datac(\fifo_read_inst|bit_cnt [0]), + .datad(\fifo_read_inst|Add2~2_combout ), + .cin(gnd), + .combout(\fifo_read_inst|bit_cnt~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt~1 .lut_mask = 16'h3F00; +defparam \fifo_read_inst|bit_cnt~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N7 +dffeas \fifo_read_inst|bit_cnt[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|bit_cnt~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N24 +cycloneive_lcell_comb \fifo_read_inst|always5~0 ( +// Equation(s): +// \fifo_read_inst|always5~0_combout = (!\fifo_read_inst|bit_cnt [2] & (\fifo_read_inst|bit_cnt [3] & (\fifo_read_inst|bit_flag~q & !\fifo_read_inst|bit_cnt [1]))) + + .dataa(\fifo_read_inst|bit_cnt [2]), + .datab(\fifo_read_inst|bit_cnt [3]), + .datac(\fifo_read_inst|bit_flag~q ), + .datad(\fifo_read_inst|bit_cnt [1]), + .cin(gnd), + .combout(\fifo_read_inst|always5~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|always5~0 .lut_mask = 16'h0040; +defparam \fifo_read_inst|always5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N0 +cycloneive_lcell_comb \fifo_read_inst|always5~1 ( +// Equation(s): +// \fifo_read_inst|always5~1_combout = (\fifo_read_inst|bit_cnt [0] & \fifo_read_inst|always5~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\fifo_read_inst|bit_cnt [0]), + .datad(\fifo_read_inst|always5~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|always5~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|always5~1 .lut_mask = 16'hF000; +defparam \fifo_read_inst|always5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N1 +dffeas \fifo_read_inst|rd_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|always5~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|rd_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|rd_en .is_wysiwyg = "true"; +defparam \fifo_read_inst|rd_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]) # +// (((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # (!\fifo_read_inst|rd_en~q )) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [3]), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [0]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 .lut_mask = 16'hFBFF; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ) # (\fifo_read_inst|read_en_dly~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datab(gnd), + .datac(\fifo_read_inst|read_en_dly~q ), + .datad(gnd), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 .lut_mask = 16'hFAFA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ) # +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ) # (!\fifo_read_inst|Equal1~1_combout )))) + + .dataa(\fifo_read_inst|Equal1~1_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1_combout ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 .lut_mask = 16'hFFD0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ) # +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q & !\fifo_read_inst|rd_en~q )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3_combout ), + .datab(gnd), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 .lut_mask = 16'hAAFA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N27 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout = (\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q $ (((!\fifo_read_inst|rd_en~q ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ))))) # (!\fifo_read_inst|read_en_dly~q & (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & +// ((\fifo_read_inst|rd_en~q )))) + + .dataa(\fifo_read_inst|read_en_dly~q ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~q ), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 .lut_mask = 16'hC60A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y24_N9 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 .lut_mask = 16'hA55A; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y21_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X24_Y25_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [1]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [3]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [5]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X26_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N3 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] .x_on_violation = "off"; +// synopsys translate_on + +// Location: FF_X26_Y25_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [7]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [1]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [3]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N13 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y22_N23 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [0]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [0]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y22_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [1]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~1 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [2]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~3 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ) # (GND))))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 & VCC)) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [3]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [3]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~5 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 .lut_mask = 16'h692B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N10 +cycloneive_lcell_comb \Equal2~1 ( +// Equation(s): +// \Equal2~1_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4_combout ), + .cin(gnd), + .combout(\Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \Equal2~1 .lut_mask = 16'h0040; +defparam \Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9])) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [8]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout )) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [5]), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 .lut_mask = 16'hC33C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X26_Y21_N17 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [4]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~7 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 .lut_mask = 16'h964D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N22 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 & VCC)))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & +// ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ) # (GND))) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )))) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5] & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5] & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [5]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~9 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 .lut_mask = 16'h694D; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [6]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~11 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~13 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout = ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8] $ (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 )))) # (GND) +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 = CARRY((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] & +// ((!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ) # (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]))) # +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8] & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8] & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~15 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .cout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 .lut_mask = 16'h962B; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N28 +cycloneive_lcell_comb \fifo_read_inst|read_en~0 ( +// Equation(s): +// \fifo_read_inst|read_en~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout & (\Equal2~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout & +// \Equal2~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datab(\Equal2~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .datad(\Equal2~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_en~0 .lut_mask = 16'h0400; +defparam \fifo_read_inst|read_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N8 +cycloneive_lcell_comb \fifo_read_inst|read_en~1 ( +// Equation(s): +// \fifo_read_inst|read_en~1_combout = (\fifo_read_inst|read_en~0_combout ) # ((\fifo_read_inst|read_en~q & ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]) # +// (!\fifo_read_inst|Equal1~2_combout )))) + + .dataa(\fifo_read_inst|Equal1~2_combout ), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit [1]), + .datac(\fifo_read_inst|read_en~q ), + .datad(\fifo_read_inst|read_en~0_combout ), + .cin(gnd), + .combout(\fifo_read_inst|read_en~1_combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_en~1 .lut_mask = 16'hFFD0; +defparam \fifo_read_inst|read_en~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y24_N9 +dffeas \fifo_read_inst|read_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_en~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_en .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout = (\fifo_read_inst|read_en~q & ((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\fifo_read_inst|read_en~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .lut_mask = 16'hFC00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .lut_mask = 16'h0800; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .lut_mask = 16'h5AF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N11 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & +// !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .lut_mask = 16'h0010; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout & \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .lut_mask = 16'h3CF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y25_N25 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y25_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder .lut_mask = 16'hFF00; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X26_Y25_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y23_N31 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g [6]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .power_up = "low"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] .x_on_violation = "off"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y23_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a [6]), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7~combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y23_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N2 +cycloneive_lcell_comb \Equal2~0 ( +// Equation(s): +// \Equal2~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8_combout ), + .cin(gnd), + .combout(\Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \Equal2~0 .lut_mask = 16'h0001; +defparam \Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 .lut_mask = 16'h55AA; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y25_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9] $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 $ (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a [9]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a [9]), + .cin(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~17 ), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout = (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout & (!\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout & !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|LessThan2~1_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 .lut_mask = 16'h0002; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout = (!\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout & (\Equal2~0_combout & (!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout & +// \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|LessThan2~0_combout ), + .datab(\Equal2~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 .lut_mask = 16'h0400; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout = (!\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q & (!\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 .lut_mask = 16'h0100; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 .lut_mask = 16'h5500; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q & !\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 .lut_mask = 16'hFF08; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 .lut_mask = 16'h0030; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 .lut_mask = 16'hDCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 .lut_mask = 16'hFF50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q & +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 .lut_mask = 16'hF888; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1_combout ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 .lut_mask = 16'hFEFE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 .lut_mask = 16'hC0C0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 .lut_mask = 16'h00F8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 .lut_mask = 16'h0AA0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 .lut_mask = 16'h00F0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ) # ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 .lut_mask = 16'hFF50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 .lut_mask = 16'h0330; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 .lut_mask = 16'h0300; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout = ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 .lut_mask = 16'hFFD5; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 .lut_mask = 16'hFF88; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 .lut_mask = 16'h1230; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 .lut_mask = 16'h7F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 .lut_mask = 16'hFCFC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 .lut_mask = 16'h0007; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk +// [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ) # +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 .lut_mask = 16'hB3A0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 .lut_mask = 16'hF5F5; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref [1]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 .lut_mask = 16'h2020; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 .lut_mask = 16'hFFC0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 .lut_mask = 16'h000F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 .lut_mask = 16'h003C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 .lut_mask = 16'h0C0C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 .lut_mask = 16'hEAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 .lut_mask = 16'hB800; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 .lut_mask = 16'h0055; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 .lut_mask = 16'h0004; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 .lut_mask = 16'h2AAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~1 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~3 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~5 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~7 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~9 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [9] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~19 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us +// [11] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~21 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 $ (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 .lut_mask = 16'hF00F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X29_Y20_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X29_Y20_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X29_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [13]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [14]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [11]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [12]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 .lut_mask = 16'h0040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [9]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [7]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 .lut_mask = 16'h0020; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [6]), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 .lut_mask = 16'h5000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [5]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [4]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 .lut_mask = 16'h2000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 .lut_mask = 16'hFEFF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 .lut_mask = 16'h1230; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 .lut_mask = 16'hF2F0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 .lut_mask = 16'h4040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0] $ (VCC) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 = CARRY(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 .lut_mask = 16'h55AA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~1 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~3 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [3] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~5 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~7 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 .lut_mask = 16'hF0FF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref +// [5] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~9 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7])) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 .lut_mask = 16'h5A5F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 .lut_mask = 16'hCC00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout = (((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [3]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 .lut_mask = 16'h777F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [4]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 .lut_mask = 16'h8C00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout = ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 .lut_mask = 16'h1F3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~15 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y19_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 .lut_mask = 16'hC840; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y19_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 $ (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 .lut_mask = 16'hA820; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y19_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1] & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7] & !\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [9]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 .lut_mask = 16'h0040; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y19_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref [6]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 .lut_mask = 16'hC000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ) # +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 .lut_mask = 16'hBA30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & (\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ) # +// ((\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q & \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 .lut_mask = 16'hDC50; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 .lut_mask = 16'h5450; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 .lut_mask = 16'hFFCF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout & +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 .lut_mask = 16'hF888; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 .lut_mask = 16'hFFF8; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~11 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N3 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~13 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~15 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~17 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~19 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7] & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ) # (GND))) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 = CARRY((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7])) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~23 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 .lut_mask = 16'h3C3F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 $ (GND))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 & VCC)) +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 = CARRY((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .datac(gnd), + .datad(vcc), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~25 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ), + .cout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 )); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 .lut_mask = 16'hC30C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout = \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] $ (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(gnd), + .datad(gnd), + .cin(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~27 ), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X24_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9] & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [9]), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [8]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 .lut_mask = 16'h0033; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 .lut_mask = 16'hAAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y21_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout = ((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2] & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 .lut_mask = 16'h5557; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ) # +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .lut_mask = 16'h00A8; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .lut_mask = 16'h5400; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .lut_mask = 16'hF078; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 .lut_mask = 16'h6996; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N5 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q )) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .lut_mask = 16'h9696; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X17_Y20_N15 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1] $ (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2])) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [0]), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [1]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a [2]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .lut_mask = 16'h5AA5; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N1 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .lut_mask = 16'h2000; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N21 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q & (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .lut_mask = 16'h0200; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .lut_mask = 16'hB4F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N9 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N24 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout = (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout & +// !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .lut_mask = 16'h0040; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N19 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q & \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ))) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .lut_mask = 16'hC3F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y22_N7 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 .power_up = "low"; +// synopsys translate_on + +// Location: FF_X17_Y20_N27 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8] & +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8] & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8]), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [8]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .lut_mask = 16'h2814; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q )))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout & ((\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout +// )))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .lut_mask = 16'hE2C0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout = (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) # (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout & +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout & (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout $ +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7])))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5_combout ), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2_combout ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g [7]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .lut_mask = 16'hA018; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y21_N29 +dffeas \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .is_wysiwyg = "true"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout = (\uart_rx_inst|po_flag~q & ((!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ) # +// (!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ))) + + .dataa(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg~q ), + .datab(gnd), + .datac(\uart_rx_inst|po_flag~q ), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .lut_mask = 16'h50F0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: CLKCTRL_G8 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [0]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: CLKCTRL_G9 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [1]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y8_N1 +cycloneive_io_ibuf \rx~input ( + .i(rx), + .ibar(gnd), + .o(\rx~input_o )); +// synopsys translate_off +defparam \rx~input .bus_hold = "false"; +defparam \rx~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N12 +cycloneive_lcell_comb \uart_rx_inst|rx_reg1~0 ( +// Equation(s): +// \uart_rx_inst|rx_reg1~0_combout = !\rx~input_o + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\rx~input_o ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg1~0 .lut_mask = 16'h00FF; +defparam \uart_rx_inst|rx_reg1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N13 +dffeas \uart_rx_inst|rx_reg1 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg1~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg1 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg1 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N2 +cycloneive_lcell_comb \uart_rx_inst|rx_reg2~feeder ( +// Equation(s): +// \uart_rx_inst|rx_reg2~feeder_combout = \uart_rx_inst|rx_reg1~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg1~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg2~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg2~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_reg2~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N3 +dffeas \uart_rx_inst|rx_reg2 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg2~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg2 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y24_N0 +cycloneive_lcell_comb \uart_rx_inst|rx_reg3~feeder ( +// Equation(s): +// \uart_rx_inst|rx_reg3~feeder_combout = \uart_rx_inst|rx_reg2~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg2~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_reg3~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg3~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_reg3~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y24_N1 +dffeas \uart_rx_inst|rx_reg3 ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_reg3~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_reg3~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_reg3 .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_reg3 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N14 +cycloneive_lcell_comb \uart_rx_inst|rx_data[7]~0 ( +// Equation(s): +// \uart_rx_inst|rx_data[7]~0_combout = !\uart_rx_inst|rx_reg3~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_reg3~q ), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[7]~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[7]~0 .lut_mask = 16'h00FF; +defparam \uart_rx_inst|rx_data[7]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N10 +cycloneive_lcell_comb \uart_rx_inst|bit_cnt~0 ( +// Equation(s): +// \uart_rx_inst|bit_cnt~0_combout = (\uart_rx_inst|Add1~6_combout & (((!\uart_rx_inst|always4~0_combout ) # (!\uart_rx_inst|bit_cnt [3])) # (!\uart_rx_inst|bit_flag~q ))) + + .dataa(\uart_rx_inst|Add1~6_combout ), + .datab(\uart_rx_inst|bit_flag~q ), + .datac(\uart_rx_inst|bit_cnt [3]), + .datad(\uart_rx_inst|always4~0_combout ), + .cin(gnd), + .combout(\uart_rx_inst|bit_cnt~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt~0 .lut_mask = 16'h2AAA; +defparam \uart_rx_inst|bit_cnt~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X16_Y25_N11 +dffeas \uart_rx_inst|bit_cnt[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|bit_cnt~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|bit_cnt [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|bit_cnt[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|bit_cnt[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X16_Y25_N18 +cycloneive_lcell_comb \uart_rx_inst|always8~0 ( +// Equation(s): +// \uart_rx_inst|always8~0_combout = (\uart_rx_inst|bit_flag~q & (\uart_rx_inst|always4~0_combout $ (!\uart_rx_inst|bit_cnt [3]))) + + .dataa(gnd), + .datab(\uart_rx_inst|always4~0_combout ), + .datac(\uart_rx_inst|bit_flag~q ), + .datad(\uart_rx_inst|bit_cnt [3]), + .cin(gnd), + .combout(\uart_rx_inst|always8~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|always8~0 .lut_mask = 16'hC030; +defparam \uart_rx_inst|always8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N15 +dffeas \uart_rx_inst|rx_data[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[7]~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y23_N21 +dffeas \uart_rx_inst|rx_data[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_data [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N18 +cycloneive_lcell_comb \uart_rx_inst|rx_data[5]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[5]~feeder_combout = \uart_rx_inst|rx_data [6] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [6]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[5]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N19 +dffeas \uart_rx_inst|rx_data[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N0 +cycloneive_lcell_comb \uart_rx_inst|rx_data[4]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[4]~feeder_combout = \uart_rx_inst|rx_data [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [5]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[4]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N1 +dffeas \uart_rx_inst|rx_data[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N6 +cycloneive_lcell_comb \uart_rx_inst|rx_data[3]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[3]~feeder_combout = \uart_rx_inst|rx_data [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [4]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[3]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N7 +dffeas \uart_rx_inst|rx_data[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N28 +cycloneive_lcell_comb \uart_rx_inst|rx_data[2]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[2]~feeder_combout = \uart_rx_inst|rx_data [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [3]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[2]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N29 +dffeas \uart_rx_inst|rx_data[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N2 +cycloneive_lcell_comb \uart_rx_inst|rx_data[1]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[1]~feeder_combout = \uart_rx_inst|rx_data [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [2]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[1]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N3 +dffeas \uart_rx_inst|rx_data[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N24 +cycloneive_lcell_comb \uart_rx_inst|rx_data[0]~feeder ( +// Equation(s): +// \uart_rx_inst|rx_data[0]~feeder_combout = \uart_rx_inst|rx_data [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [1]), + .cin(gnd), + .combout(\uart_rx_inst|rx_data[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[0]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|rx_data[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N25 +dffeas \uart_rx_inst|rx_data[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|rx_data[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|always8~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|rx_data [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|rx_data[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|rx_data[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N8 +cycloneive_lcell_comb \uart_rx_inst|po_data[0]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[0]~feeder_combout = \uart_rx_inst|rx_data [0] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [0]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[0]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N9 +dffeas \uart_rx_inst|po_data[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[0]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[0] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9] = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10] $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [10]), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [9]), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9]), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] .lut_mask = 16'h0FF0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout = !\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X17_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout = \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N10 +cycloneive_lcell_comb \uart_rx_inst|po_data[1]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[1]~feeder_combout = \uart_rx_inst|rx_data [1] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [1]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[1]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N11 +dffeas \uart_rx_inst|po_data[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[1] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N12 +cycloneive_lcell_comb \uart_rx_inst|po_data[2]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[2]~feeder_combout = \uart_rx_inst|rx_data [2] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [2]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[2]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N13 +dffeas \uart_rx_inst|po_data[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[2] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N30 +cycloneive_lcell_comb \uart_rx_inst|po_data[3]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[3]~feeder_combout = \uart_rx_inst|rx_data [3] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [3]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[3]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N31 +dffeas \uart_rx_inst|po_data[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[3]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [3]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[3] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N16 +cycloneive_lcell_comb \uart_rx_inst|po_data[4]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[4]~feeder_combout = \uart_rx_inst|rx_data [4] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [4]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[4]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N17 +dffeas \uart_rx_inst|po_data[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [4]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[4] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N26 +cycloneive_lcell_comb \uart_rx_inst|po_data[5]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[5]~feeder_combout = \uart_rx_inst|rx_data [5] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [5]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[5]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N27 +dffeas \uart_rx_inst|po_data[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[5]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[5] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y23_N4 +cycloneive_lcell_comb \uart_rx_inst|po_data[6]~feeder ( +// Equation(s): +// \uart_rx_inst|po_data[6]~feeder_combout = \uart_rx_inst|rx_data [6] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_rx_inst|rx_data [6]), + .cin(gnd), + .combout(\uart_rx_inst|po_data[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \uart_rx_inst|po_data[6]~feeder .lut_mask = 16'hFF00; +defparam \uart_rx_inst|po_data[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y23_N5 +dffeas \uart_rx_inst|po_data[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\uart_rx_inst|po_data[6]~feeder_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[6] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X14_Y23_N23 +dffeas \uart_rx_inst|po_data[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\uart_rx_inst|rx_data [7]), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\uart_rx_inst|rx_flag~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_rx_inst|po_data [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_rx_inst|po_data[7] .is_wysiwyg = "true"; +defparam \uart_rx_inst|po_data[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X12_Y23_N8 +cycloneive_lcell_comb \~GND ( +// Equation(s): +// \~GND~combout = GND + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\~GND~combout ), + .cout()); +// synopsys translate_off +defparam \~GND .lut_mask = 16'h0000; +defparam \~GND .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X13_Y23_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({\~GND~combout ,\uart_rx_inst|po_data [7],\uart_rx_inst|po_data [6],\uart_rx_inst|po_data [5],\uart_rx_inst|po_data [4],\uart_rx_inst|po_data [3],\uart_rx_inst|po_data [2],\uart_rx_inst|po_data [1],\uart_rx_inst|po_data [0]}), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:wr_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X14_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X14_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en .power_up = "low"; +// synopsys translate_on + +// Location: M9K_X13_Y21_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({gnd,gnd,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout ,\~GND~combout }), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a [9],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:wr_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_first_bit_number = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_first_bit_number = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: CLKCTRL_G5 +cycloneive_clkctrl \sys_clk~inputclkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\sys_clk~input_o }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\sys_clk~inputclkctrl_outclk )); +// synopsys translate_off +defparam \sys_clk~inputclkctrl .clock_type = "global clock"; +defparam \sys_clk~inputclkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N4 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[0]~13 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[0]~13_combout = (\uart_tx_inst|work_en~q & (\uart_tx_inst|baud_cnt [0] $ (VCC))) # (!\uart_tx_inst|work_en~q & (\uart_tx_inst|baud_cnt [0] & VCC)) +// \uart_tx_inst|baud_cnt[0]~14 = CARRY((\uart_tx_inst|work_en~q & \uart_tx_inst|baud_cnt [0])) + + .dataa(\uart_tx_inst|work_en~q ), + .datab(\uart_tx_inst|baud_cnt [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\uart_tx_inst|baud_cnt[0]~13_combout ), + .cout(\uart_tx_inst|baud_cnt[0]~14 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[0]~13 .lut_mask = 16'h6688; +defparam \uart_tx_inst|baud_cnt[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N26 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[11]~35 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[11]~35_combout = (\uart_tx_inst|baud_cnt [11] & (!\uart_tx_inst|baud_cnt[10]~34 )) # (!\uart_tx_inst|baud_cnt [11] & ((\uart_tx_inst|baud_cnt[10]~34 ) # (GND))) +// \uart_tx_inst|baud_cnt[11]~36 = CARRY((!\uart_tx_inst|baud_cnt[10]~34 ) # (!\uart_tx_inst|baud_cnt [11])) + + .dataa(\uart_tx_inst|baud_cnt [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[10]~34 ), + .combout(\uart_tx_inst|baud_cnt[11]~35_combout ), + .cout(\uart_tx_inst|baud_cnt[11]~36 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[11]~35 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[11]~35 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N27 +dffeas \uart_tx_inst|baud_cnt[11] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[11]~35_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [11]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[11] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N0 +cycloneive_lcell_comb \uart_tx_inst|Equal1~0 ( +// Equation(s): +// \uart_tx_inst|Equal1~0_combout = (!\uart_tx_inst|baud_cnt [3] & (!\uart_tx_inst|baud_cnt [5] & (\uart_tx_inst|baud_cnt [0] & !\uart_tx_inst|baud_cnt [7]))) + + .dataa(\uart_tx_inst|baud_cnt [3]), + .datab(\uart_tx_inst|baud_cnt [5]), + .datac(\uart_tx_inst|baud_cnt [0]), + .datad(\uart_tx_inst|baud_cnt [7]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~0 .lut_mask = 16'h0010; +defparam \uart_tx_inst|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N22 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[9]~31 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[9]~31_combout = (\uart_tx_inst|baud_cnt [9] & (!\uart_tx_inst|baud_cnt[8]~30 )) # (!\uart_tx_inst|baud_cnt [9] & ((\uart_tx_inst|baud_cnt[8]~30 ) # (GND))) +// \uart_tx_inst|baud_cnt[9]~32 = CARRY((!\uart_tx_inst|baud_cnt[8]~30 ) # (!\uart_tx_inst|baud_cnt [9])) + + .dataa(\uart_tx_inst|baud_cnt [9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[8]~30 ), + .combout(\uart_tx_inst|baud_cnt[9]~31_combout ), + .cout(\uart_tx_inst|baud_cnt[9]~32 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[9]~31 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[9]~31 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N23 +dffeas \uart_tx_inst|baud_cnt[9] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[9]~31_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [9]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[9] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|Equal1~1 ( +// Equation(s): +// \uart_tx_inst|Equal1~1_combout = (!\uart_tx_inst|baud_cnt [8] & (!\uart_tx_inst|baud_cnt [11] & (\uart_tx_inst|Equal1~0_combout & !\uart_tx_inst|baud_cnt [9]))) + + .dataa(\uart_tx_inst|baud_cnt [8]), + .datab(\uart_tx_inst|baud_cnt [11]), + .datac(\uart_tx_inst|Equal1~0_combout ), + .datad(\uart_tx_inst|baud_cnt [9]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~1 .lut_mask = 16'h0010; +defparam \uart_tx_inst|Equal1~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[1]~15 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[1]~15_combout = (\uart_tx_inst|baud_cnt [1] & (!\uart_tx_inst|baud_cnt[0]~14 )) # (!\uart_tx_inst|baud_cnt [1] & ((\uart_tx_inst|baud_cnt[0]~14 ) # (GND))) +// \uart_tx_inst|baud_cnt[1]~16 = CARRY((!\uart_tx_inst|baud_cnt[0]~14 ) # (!\uart_tx_inst|baud_cnt [1])) + + .dataa(\uart_tx_inst|baud_cnt [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[0]~14 ), + .combout(\uart_tx_inst|baud_cnt[1]~15_combout ), + .cout(\uart_tx_inst|baud_cnt[1]~16 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[1]~15 .lut_mask = 16'h5A5F; +defparam \uart_tx_inst|baud_cnt[1]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N7 +dffeas \uart_tx_inst|baud_cnt[1] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[1]~15_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[1] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N30 +cycloneive_lcell_comb \uart_tx_inst|Equal1~2 ( +// Equation(s): +// \uart_tx_inst|Equal1~2_combout = (\uart_tx_inst|baud_cnt [4] & (\uart_tx_inst|baud_cnt [6] & (\uart_tx_inst|baud_cnt [2] & \uart_tx_inst|baud_cnt [1]))) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(\uart_tx_inst|baud_cnt [2]), + .datad(\uart_tx_inst|baud_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Equal1~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal1~2 .lut_mask = 16'h8000; +defparam \uart_tx_inst|Equal1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y25_N19 +dffeas \fifo_read_inst|tx_flag ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\fifo_read_inst|rd_en~q ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|tx_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|tx_flag .is_wysiwyg = "true"; +defparam \fifo_read_inst|tx_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|always3~0 ( +// Equation(s): +// \uart_tx_inst|always3~0_combout = (!\uart_tx_inst|work_en~q ) # (!\uart_tx_inst|bit_flag~q ) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(gnd), + .datac(\uart_tx_inst|work_en~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_tx_inst|always3~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always3~0 .lut_mask = 16'h5F5F; +defparam \uart_tx_inst|always3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N18 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[1]~2 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[1]~2_combout = (!\uart_tx_inst|always0~1_combout & (\uart_tx_inst|bit_cnt [1] $ (((\uart_tx_inst|bit_cnt [0] & !\uart_tx_inst|always3~0_combout ))))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [1]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[1]~2_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[1]~2 .lut_mask = 16'h00D2; +defparam \uart_tx_inst|bit_cnt[1]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N19 +dffeas \uart_tx_inst|bit_cnt[1] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[1]~2_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N4 +cycloneive_lcell_comb \uart_tx_inst|bit_cnt[2]~3 ( +// Equation(s): +// \uart_tx_inst|bit_cnt[2]~3_combout = (!\uart_tx_inst|always0~1_combout & ((\uart_tx_inst|always3~0_combout & ((\uart_tx_inst|bit_cnt [2]))) # (!\uart_tx_inst|always3~0_combout & (\uart_tx_inst|Add1~0_combout )))) + + .dataa(\uart_tx_inst|Add1~0_combout ), + .datab(\uart_tx_inst|always3~0_combout ), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|bit_cnt[2]~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[2]~3 .lut_mask = 16'h00E2; +defparam \uart_tx_inst|bit_cnt[2]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N5 +dffeas \uart_tx_inst|bit_cnt[2] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|bit_cnt[2]~3_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|always0~1 ( +// Equation(s): +// \uart_tx_inst|always0~1_combout = (\uart_tx_inst|bit_cnt [0] & (!\uart_tx_inst|bit_cnt [1] & (!\uart_tx_inst|bit_cnt [2] & \uart_tx_inst|always0~0_combout ))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [1]), + .datac(\uart_tx_inst|bit_cnt [2]), + .datad(\uart_tx_inst|always0~0_combout ), + .cin(gnd), + .combout(\uart_tx_inst|always0~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always0~1 .lut_mask = 16'h0200; +defparam \uart_tx_inst|always0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y25_N18 +cycloneive_lcell_comb \uart_tx_inst|work_en~0 ( +// Equation(s): +// \uart_tx_inst|work_en~0_combout = (\fifo_read_inst|tx_flag~q ) # ((\uart_tx_inst|work_en~q & !\uart_tx_inst|always0~1_combout )) + + .dataa(gnd), + .datab(\uart_tx_inst|work_en~q ), + .datac(\fifo_read_inst|tx_flag~q ), + .datad(\uart_tx_inst|always0~1_combout ), + .cin(gnd), + .combout(\uart_tx_inst|work_en~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|work_en~0 .lut_mask = 16'hF0FC; +defparam \uart_tx_inst|work_en~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N25 +dffeas \uart_tx_inst|work_en ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(gnd), + .asdata(\uart_tx_inst|work_en~0_combout ), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|work_en~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|work_en .is_wysiwyg = "true"; +defparam \uart_tx_inst|work_en .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N6 +cycloneive_lcell_comb \uart_tx_inst|always1~0 ( +// Equation(s): +// \uart_tx_inst|always1~0_combout = ((\uart_tx_inst|Equal1~3_combout & (\uart_tx_inst|Equal1~1_combout & \uart_tx_inst|Equal1~2_combout ))) # (!\uart_tx_inst|work_en~q ) + + .dataa(\uart_tx_inst|Equal1~3_combout ), + .datab(\uart_tx_inst|Equal1~1_combout ), + .datac(\uart_tx_inst|Equal1~2_combout ), + .datad(\uart_tx_inst|work_en~q ), + .cin(gnd), + .combout(\uart_tx_inst|always1~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always1~0 .lut_mask = 16'h80FF; +defparam \uart_tx_inst|always1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X27_Y18_N5 +dffeas \uart_tx_inst|baud_cnt[0] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[0]~13_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[0] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N8 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[2]~17 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[2]~17_combout = (\uart_tx_inst|baud_cnt [2] & (\uart_tx_inst|baud_cnt[1]~16 $ (GND))) # (!\uart_tx_inst|baud_cnt [2] & (!\uart_tx_inst|baud_cnt[1]~16 & VCC)) +// \uart_tx_inst|baud_cnt[2]~18 = CARRY((\uart_tx_inst|baud_cnt [2] & !\uart_tx_inst|baud_cnt[1]~16 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [2]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[1]~16 ), + .combout(\uart_tx_inst|baud_cnt[2]~17_combout ), + .cout(\uart_tx_inst|baud_cnt[2]~18 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[2]~17 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[2]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N9 +dffeas \uart_tx_inst|baud_cnt[2] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[2]~17_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[2] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N14 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[5]~23 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[5]~23_combout = (\uart_tx_inst|baud_cnt [5] & (!\uart_tx_inst|baud_cnt[4]~22 )) # (!\uart_tx_inst|baud_cnt [5] & ((\uart_tx_inst|baud_cnt[4]~22 ) # (GND))) +// \uart_tx_inst|baud_cnt[5]~24 = CARRY((!\uart_tx_inst|baud_cnt[4]~22 ) # (!\uart_tx_inst|baud_cnt [5])) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [5]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[4]~22 ), + .combout(\uart_tx_inst|baud_cnt[5]~23_combout ), + .cout(\uart_tx_inst|baud_cnt[5]~24 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[5]~23 .lut_mask = 16'h3C3F; +defparam \uart_tx_inst|baud_cnt[5]~23 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N15 +dffeas \uart_tx_inst|baud_cnt[5] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[5]~23_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [5]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[5] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N16 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[6]~25 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[6]~25_combout = (\uart_tx_inst|baud_cnt [6] & (\uart_tx_inst|baud_cnt[5]~24 $ (GND))) # (!\uart_tx_inst|baud_cnt [6] & (!\uart_tx_inst|baud_cnt[5]~24 & VCC)) +// \uart_tx_inst|baud_cnt[6]~26 = CARRY((\uart_tx_inst|baud_cnt [6] & !\uart_tx_inst|baud_cnt[5]~24 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[5]~24 ), + .combout(\uart_tx_inst|baud_cnt[6]~25_combout ), + .cout(\uart_tx_inst|baud_cnt[6]~26 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[6]~25 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[6]~25 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N17 +dffeas \uart_tx_inst|baud_cnt[6] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[6]~25_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [6]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[6] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N18 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[7]~27 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[7]~27_combout = (\uart_tx_inst|baud_cnt [7] & (!\uart_tx_inst|baud_cnt[6]~26 )) # (!\uart_tx_inst|baud_cnt [7] & ((\uart_tx_inst|baud_cnt[6]~26 ) # (GND))) +// \uart_tx_inst|baud_cnt[7]~28 = CARRY((!\uart_tx_inst|baud_cnt[6]~26 ) # (!\uart_tx_inst|baud_cnt [7])) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [7]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[6]~26 ), + .combout(\uart_tx_inst|baud_cnt[7]~27_combout ), + .cout(\uart_tx_inst|baud_cnt[7]~28 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[7]~27 .lut_mask = 16'h3C3F; +defparam \uart_tx_inst|baud_cnt[7]~27 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N19 +dffeas \uart_tx_inst|baud_cnt[7] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[7]~27_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [7]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[7] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N20 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[8]~29 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[8]~29_combout = (\uart_tx_inst|baud_cnt [8] & (\uart_tx_inst|baud_cnt[7]~28 $ (GND))) # (!\uart_tx_inst|baud_cnt [8] & (!\uart_tx_inst|baud_cnt[7]~28 & VCC)) +// \uart_tx_inst|baud_cnt[8]~30 = CARRY((\uart_tx_inst|baud_cnt [8] & !\uart_tx_inst|baud_cnt[7]~28 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [8]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[7]~28 ), + .combout(\uart_tx_inst|baud_cnt[8]~29_combout ), + .cout(\uart_tx_inst|baud_cnt[8]~30 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[8]~29 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[8]~29 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N21 +dffeas \uart_tx_inst|baud_cnt[8] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[8]~29_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [8]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[8] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[10]~33 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[10]~33_combout = (\uart_tx_inst|baud_cnt [10] & (\uart_tx_inst|baud_cnt[9]~32 $ (GND))) # (!\uart_tx_inst|baud_cnt [10] & (!\uart_tx_inst|baud_cnt[9]~32 & VCC)) +// \uart_tx_inst|baud_cnt[10]~34 = CARRY((\uart_tx_inst|baud_cnt [10] & !\uart_tx_inst|baud_cnt[9]~32 )) + + .dataa(gnd), + .datab(\uart_tx_inst|baud_cnt [10]), + .datac(gnd), + .datad(vcc), + .cin(\uart_tx_inst|baud_cnt[9]~32 ), + .combout(\uart_tx_inst|baud_cnt[10]~33_combout ), + .cout(\uart_tx_inst|baud_cnt[10]~34 )); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[10]~33 .lut_mask = 16'hC30C; +defparam \uart_tx_inst|baud_cnt[10]~33 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N25 +dffeas \uart_tx_inst|baud_cnt[10] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[10]~33_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [10]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[10] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N28 +cycloneive_lcell_comb \uart_tx_inst|baud_cnt[12]~37 ( +// Equation(s): +// \uart_tx_inst|baud_cnt[12]~37_combout = \uart_tx_inst|baud_cnt[11]~36 $ (!\uart_tx_inst|baud_cnt [12]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\uart_tx_inst|baud_cnt [12]), + .cin(\uart_tx_inst|baud_cnt[11]~36 ), + .combout(\uart_tx_inst|baud_cnt[12]~37_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[12]~37 .lut_mask = 16'hF00F; +defparam \uart_tx_inst|baud_cnt[12]~37 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X27_Y18_N29 +dffeas \uart_tx_inst|baud_cnt[12] ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|baud_cnt[12]~37_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(\uart_tx_inst|always1~0_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|baud_cnt [12]), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|baud_cnt[12] .is_wysiwyg = "true"; +defparam \uart_tx_inst|baud_cnt[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y18_N2 +cycloneive_lcell_comb \uart_tx_inst|Equal2~0 ( +// Equation(s): +// \uart_tx_inst|Equal2~0_combout = (!\uart_tx_inst|baud_cnt [4] & (!\uart_tx_inst|baud_cnt [6] & (!\uart_tx_inst|baud_cnt [2] & !\uart_tx_inst|baud_cnt [1]))) + + .dataa(\uart_tx_inst|baud_cnt [4]), + .datab(\uart_tx_inst|baud_cnt [6]), + .datac(\uart_tx_inst|baud_cnt [2]), + .datad(\uart_tx_inst|baud_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|Equal2~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal2~0 .lut_mask = 16'h0001; +defparam \uart_tx_inst|Equal2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y18_N24 +cycloneive_lcell_comb \uart_tx_inst|Equal2~1 ( +// Equation(s): +// \uart_tx_inst|Equal2~1_combout = (\uart_tx_inst|Equal1~1_combout & (!\uart_tx_inst|baud_cnt [12] & (\uart_tx_inst|Equal2~0_combout & !\uart_tx_inst|baud_cnt [10]))) + + .dataa(\uart_tx_inst|Equal1~1_combout ), + .datab(\uart_tx_inst|baud_cnt [12]), + .datac(\uart_tx_inst|Equal2~0_combout ), + .datad(\uart_tx_inst|baud_cnt [10]), + .cin(gnd), + .combout(\uart_tx_inst|Equal2~1_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|Equal2~1 .lut_mask = 16'h0020; +defparam \uart_tx_inst|Equal2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X24_Y18_N25 +dffeas \uart_tx_inst|bit_flag ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|Equal2~1_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|bit_flag~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|bit_flag .is_wysiwyg = "true"; +defparam \uart_tx_inst|bit_flag .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N28 +cycloneive_lcell_comb \uart_tx_inst|always0~0 ( +// Equation(s): +// \uart_tx_inst|always0~0_combout = (\uart_tx_inst|bit_cnt [3] & \uart_tx_inst|bit_flag~q ) + + .dataa(\uart_tx_inst|bit_cnt [3]), + .datab(gnd), + .datac(\uart_tx_inst|bit_flag~q ), + .datad(gnd), + .cin(gnd), + .combout(\uart_tx_inst|always0~0_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|always0~0 .lut_mask = 16'hA0A0; +defparam \uart_tx_inst|always0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X27_Y24_N30 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q & \fifo_read_inst|rd_en~q ) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~q ), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|rd_en~q ), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq .lut_mask = 16'hAA00; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N8 +cycloneive_io_ibuf \sdram_dq[0]~input ( + .i(sdram_dq[0]), + .ibar(gnd), + .o(\sdram_dq[0]~input_o )); +// synopsys translate_off +defparam \sdram_dq[0]~input .bus_hold = "false"; +defparam \sdram_dq[0]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[0]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X24_Y25_N10 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout = !\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~q ), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .lut_mask = 16'h00FF; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y26_N30 +cycloneive_lcell_comb \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 ( +// Equation(s): +// \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout = \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q $ +// (\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~q ), + .datac(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .lut_mask = 16'h3C3C; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N1 +cycloneive_io_ibuf \sdram_dq[1]~input ( + .i(sdram_dq[1]), + .ibar(gnd), + .o(\sdram_dq[1]~input_o )); +// synopsys translate_off +defparam \sdram_dq[1]~input .bus_hold = "false"; +defparam \sdram_dq[1]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[1]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X9_Y29_N1 +cycloneive_io_ibuf \sdram_dq[2]~input ( + .i(sdram_dq[2]), + .ibar(gnd), + .o(\sdram_dq[2]~input_o )); +// synopsys translate_off +defparam \sdram_dq[2]~input .bus_hold = "false"; +defparam \sdram_dq[2]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[2]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X14_Y29_N29 +cycloneive_io_ibuf \sdram_dq[3]~input ( + .i(sdram_dq[3]), + .ibar(gnd), + .o(\sdram_dq[3]~input_o )); +// synopsys translate_off +defparam \sdram_dq[3]~input .bus_hold = "false"; +defparam \sdram_dq[3]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N5 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[3]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [3]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X14_Y29_N22 +cycloneive_io_ibuf \sdram_dq[4]~input ( + .i(sdram_dq[4]), + .ibar(gnd), + .o(\sdram_dq[4]~input_o )); +// synopsys translate_off +defparam \sdram_dq[4]~input .bus_hold = "false"; +defparam \sdram_dq[4]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N27 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[4]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [4]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X9_Y29_N8 +cycloneive_io_ibuf \sdram_dq[5]~input ( + .i(sdram_dq[5]), + .ibar(gnd), + .o(\sdram_dq[5]~input_o )); +// synopsys translate_off +defparam \sdram_dq[5]~input .bus_hold = "false"; +defparam \sdram_dq[5]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N17 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[5]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [5]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N15 +cycloneive_io_ibuf \sdram_dq[6]~input ( + .i(sdram_dq[6]), + .ibar(gnd), + .o(\sdram_dq[6]~input_o )); +// synopsys translate_off +defparam \sdram_dq[6]~input .bus_hold = "false"; +defparam \sdram_dq[6]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[6]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [6]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X11_Y29_N22 +cycloneive_io_ibuf \sdram_dq[7]~input ( + .i(sdram_dq[7]), + .ibar(gnd), + .o(\sdram_dq[7]~input_o )); +// synopsys translate_off +defparam \sdram_dq[7]~input .bus_hold = "false"; +defparam \sdram_dq[7]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X21_Y25_N23 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_dq[7]~input_o ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y25_N22 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7] & \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg [7]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 .lut_mask = 16'hF000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X25_Y25_N0 +cycloneive_ram_block \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 ( + .portawe(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(!\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .clk0(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .clk1(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .ena0(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1_combout ), + .ena1(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(\rst_n~0clkctrl_outclk ), + .portadatain({gnd,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0_combout , +\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4_combout , +\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6_combout ,\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5_combout }), + .portaaddr({\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9~combout ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [8], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [7],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [6],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [5], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [4],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [3],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [2], +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [1],\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g [0]}), + .portabyteenamasks(1'b1), + .portbdatain(9'b000000000), + .portbaddr({\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0_combout ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~q , +\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~q ,\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell_combout }), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(), + .portbdataout(\sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk0_core_clock_enable = "ena0"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .clk1_output_clock_enable = "ena1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_offset_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .data_interleave_width_in_bits = 1; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .logical_ram_name = "sdram_top:sdram_top_inst|fifo_ctrl:fifo_ctrl_inst|fifo_data:rd_fifo_data|dcfifo:dcfifo_component|dcfifo_3fk1:auto_generated|altsyncram_em31:fifo_ram|ALTSYNCRAM"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .operation_mode = "dual_port"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_byte_enable_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clear = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_out_clock = "none"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_address_width = 10; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clear = "clear1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_out_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_data_width = 9; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_address = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_first_bit_number = 0; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_last_address = 1023; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_depth = 1024; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_logical_ram_width = 16; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .port_b_read_enable_clock = "clock1"; +defparam \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N6 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0] $ (VCC) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 .lut_mask = 16'h55AA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N7 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N8 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N9 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y19_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9] $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9]), + .datac(gnd), + .datad(gnd), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 .lut_mask = 16'h3C3C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y19_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N10 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0] $ (VCC) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT = CARRY(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 .lut_mask = 16'h55AA; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N11 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [0]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N12 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1])) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 .lut_mask = 16'h5A5F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N13 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [1]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N14 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N15 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [2]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N16 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N17 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [3]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N18 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT )) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 .lut_mask = 16'hC30C; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N19 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [4]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N20 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N21 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [5]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N22 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N23 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [6]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N24 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT )) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7] & +// ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ) # (GND))) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT = CARRY((!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ) # +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7])) + + .dataa(gnd), + .datab(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7]), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 .lut_mask = 16'h3C3F; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N25 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [7]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N26 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout = (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT $ (GND))) # (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// (!\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT & VCC)) +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT = CARRY((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8] & +// !\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT )) + + .dataa(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ), + .cout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT )); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 .lut_mask = 16'hA50A; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N27 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [8]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X26_Y18_N28 +cycloneive_lcell_comb \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 ( +// Equation(s): +// \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout = \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT $ +// (\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]), + .cin(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8~COUT ), + .combout(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ), + .cout()); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 .lut_mask = 16'h0FF0; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X26_Y18_N29 +dffeas \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9~combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit [9]), + .prn(vcc)); +// synopsys translate_off +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] .is_wysiwyg = "true"; +defparam \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N14 +cycloneive_lcell_comb \uart_tx_inst|tx~4 ( +// Equation(s): +// \uart_tx_inst|tx~4_combout = (\uart_tx_inst|bit_cnt [0]) # ((\uart_tx_inst|bit_cnt [2]) # ((\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7]) # (\uart_tx_inst|bit_cnt [1]))) + + .dataa(\uart_tx_inst|bit_cnt [0]), + .datab(\uart_tx_inst|bit_cnt [2]), + .datac(\fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|q_b [7]), + .datad(\uart_tx_inst|bit_cnt [1]), + .cin(gnd), + .combout(\uart_tx_inst|tx~4_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~4 .lut_mask = 16'hFFFE; +defparam \uart_tx_inst|tx~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N8 +cycloneive_lcell_comb \uart_tx_inst|tx~3 ( +// Equation(s): +// \uart_tx_inst|tx~3_combout = (!\uart_tx_inst|bit_flag~q & !\uart_tx_inst|tx~q ) + + .dataa(\uart_tx_inst|bit_flag~q ), + .datab(gnd), + .datac(gnd), + .datad(\uart_tx_inst|tx~q ), + .cin(gnd), + .combout(\uart_tx_inst|tx~3_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~3 .lut_mask = 16'h0055; +defparam \uart_tx_inst|tx~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y18_N0 +cycloneive_lcell_comb \uart_tx_inst|tx~5 ( +// Equation(s): +// \uart_tx_inst|tx~5_combout = (!\uart_tx_inst|tx~2_combout & (!\uart_tx_inst|tx~3_combout & ((!\uart_tx_inst|tx~4_combout ) # (!\uart_tx_inst|always0~0_combout )))) + + .dataa(\uart_tx_inst|tx~2_combout ), + .datab(\uart_tx_inst|always0~0_combout ), + .datac(\uart_tx_inst|tx~4_combout ), + .datad(\uart_tx_inst|tx~3_combout ), + .cin(gnd), + .combout(\uart_tx_inst|tx~5_combout ), + .cout()); +// synopsys translate_off +defparam \uart_tx_inst|tx~5 .lut_mask = 16'h0015; +defparam \uart_tx_inst|tx~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y18_N1 +dffeas \uart_tx_inst|tx ( + .clk(\sys_clk~inputclkctrl_outclk ), + .d(\uart_tx_inst|tx~5_combout ), + .asdata(vcc), + .clrn(\sys_rst_n~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\uart_tx_inst|tx~q ), + .prn(vcc)); +// synopsys translate_off +defparam \uart_tx_inst|tx .is_wysiwyg = "true"; +defparam \uart_tx_inst|tx .power_up = "low"; +// synopsys translate_on + +// Location: CLKCTRL_G7 +cycloneive_clkctrl \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk [2]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl_outclk )); +// synopsys translate_off +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl .clock_type = "global clock"; +defparam \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: FF_X23_Y22_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y22_N7 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q )) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 .lut_mask = 16'hF0FC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 .lut_mask = 16'hBAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 .lut_mask = 16'h4000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 .lut_mask = 16'hFF20; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout )) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [1]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 .lut_mask = 16'h8C9D; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1])))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 .lut_mask = 16'h5F22; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF~q ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N24 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1_combout ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 .lut_mask = 16'h00CC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N25 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 .lut_mask = 16'hFFEE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N12 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datab(gnd), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 .lut_mask = 16'hFFAA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y22_N13 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 .lut_mask = 16'hA1AB; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout & ((!\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]))))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [2]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 .lut_mask = 16'h5F30; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N4 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ) # +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 .lut_mask = 16'h5554; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N1 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 .lut_mask = 16'hFFF0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout & ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ) # +// (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 .lut_mask = 16'hAAA0; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout )))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0] & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd [0]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 .lut_mask = 16'h1ABA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y22_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ) # (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1_combout ), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 .lut_mask = 16'hFAFA; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8] & !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [8]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [9]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 .lut_mask = 16'h0008; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2] & +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk [2]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 .lut_mask = 16'h4055; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N8 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 .lut_mask = 16'h0F00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 .lut_mask = 16'hF0FF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N9 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N14 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] $ +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]))) + + .dataa(gnd), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 .lut_mask = 16'h3C00; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N15 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N28 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2] $ +// (((\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]))))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 .lut_mask = 16'h7800; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X31_Y20_N29 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y20_N26 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3] & (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0] & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1] & !\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [3]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref [2]), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 .lut_mask = 16'h0002; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X28_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout & (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q & +// (\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2] & \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk [2]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 .lut_mask = 16'h8000; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X28_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS .power_up = "low"; +// synopsys translate_on + +// Location: FF_X21_Y21_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(gnd), + .asdata(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS~q ), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 .lut_mask = 16'h55CF; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 .lut_mask = 16'hF7F2; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N16 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4_combout ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 .lut_mask = 16'h4CCC; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N18 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 .lut_mask = 16'h0001; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N19 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N2 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0] & +// ((!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])))) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (((!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1])))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [0]), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba [1]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 .lut_mask = 16'h0777; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N0 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q & +// !\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE~q ), + .datad(gnd), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 .lut_mask = 16'h0101; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X22_Y22_N30 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout & (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout & +// ((\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 .lut_mask = 16'h2022; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X22_Y22_N31 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y22_N10 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q & (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q & +// \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q )) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~q ), + .datac(gnd), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 .lut_mask = 16'h4400; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X21_Y22_N11 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10])) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q & !\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 .lut_mask = 16'h5053; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X23_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout = (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout & (((\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout & +// \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0_combout ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7_combout ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA~q ), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 .lut_mask = 16'h008F; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X23_Y21_N21 +dffeas \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] ( + .clk(\clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl_outclk ), + .d(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1_combout ), + .asdata(vcc), + .clrn(!\rst_n~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .prn(vcc)); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] .is_wysiwyg = "true"; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N20 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((!\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10])))) # +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q & (((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q )) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba [1]), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE~q ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 .lut_mask = 16'h0FDD; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X21_Y21_N6 +cycloneive_lcell_comb \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 ( +// Equation(s): +// \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout = (\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ) # ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & +// (!\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10])) # (!\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q & ((\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout )))) + + .dataa(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ~q ), + .datab(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT~q ), + .datac(\sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr [10]), + .datad(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0_combout ), + .cin(gnd), + .combout(\sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1_combout ), + .cout()); +// synopsys translate_off +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 .lut_mask = 16'hDFCE; +defparam \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y20_N8 +cycloneive_io_ibuf \sdram_dq[8]~input ( + .i(sdram_dq[8]), + .ibar(gnd), + .o(\sdram_dq[8]~input_o )); +// synopsys translate_off +defparam \sdram_dq[8]~input .bus_hold = "false"; +defparam \sdram_dq[8]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X3_Y29_N29 +cycloneive_io_ibuf \sdram_dq[9]~input ( + .i(sdram_dq[9]), + .ibar(gnd), + .o(\sdram_dq[9]~input_o )); +// synopsys translate_off +defparam \sdram_dq[9]~input .bus_hold = "false"; +defparam \sdram_dq[9]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y25_N1 +cycloneive_io_ibuf \sdram_dq[10]~input ( + .i(sdram_dq[10]), + .ibar(gnd), + .o(\sdram_dq[10]~input_o )); +// synopsys translate_off +defparam \sdram_dq[10]~input .bus_hold = "false"; +defparam \sdram_dq[10]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y26_N8 +cycloneive_io_ibuf \sdram_dq[11]~input ( + .i(sdram_dq[11]), + .ibar(gnd), + .o(\sdram_dq[11]~input_o )); +// synopsys translate_off +defparam \sdram_dq[11]~input .bus_hold = "false"; +defparam \sdram_dq[11]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y23_N8 +cycloneive_io_ibuf \sdram_dq[12]~input ( + .i(sdram_dq[12]), + .ibar(gnd), + .o(\sdram_dq[12]~input_o )); +// synopsys translate_off +defparam \sdram_dq[12]~input .bus_hold = "false"; +defparam \sdram_dq[12]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N8 +cycloneive_io_ibuf \sdram_dq[13]~input ( + .i(sdram_dq[13]), + .ibar(gnd), + .o(\sdram_dq[13]~input_o )); +// synopsys translate_off +defparam \sdram_dq[13]~input .bus_hold = "false"; +defparam \sdram_dq[13]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N22 +cycloneive_io_ibuf \sdram_dq[14]~input ( + .i(sdram_dq[14]), + .ibar(gnd), + .o(\sdram_dq[14]~input_o )); +// synopsys translate_off +defparam \sdram_dq[14]~input .bus_hold = "false"; +defparam \sdram_dq[14]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y21_N1 +cycloneive_io_ibuf \sdram_dq[15]~input ( + .i(sdram_dq[15]), + .ibar(gnd), + .o(\sdram_dq[15]~input_o )); +// synopsys translate_off +defparam \sdram_dq[15]~input .bus_hold = "false"; +defparam \sdram_dq[15]~input .simulate_z_as = "z"; +// synopsys translate_on + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_min_1200mv_0c_v_fast.sdo b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_min_1200mv_0c_v_fast.sdo new file mode 100644 index 0000000..cc7d6fb --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_min_1200mv_0c_v_fast.sdo @@ -0,0 +1,19618 @@ +// Copyright (C) 1991-2013 Altera Corporation +// Your use of Altera Corporation's design tools, logic functions +// and other software and tools, and its AMPP partner logic +// functions, and any output files from any of the foregoing +// (including device programming or simulation files), and any +// associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License +// Subscription Agreement, Altera MegaCore Function License +// Agreement, or other applicable license agreement, including, +// without limitation, that your use is for the sole purpose of +// programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the +// applicable agreement for further details. + + +// +// Device: Altera EP4CE15F23C8 Package FBGA484 +// + +// +// This file contains Fast Corner delays for the design using part EP4CE15F23C8, +// with speed grade M, core voltage 1.2V, and temperature 0 Celsius +// + +// +// This SDF file should be used for ModelSim (Verilog) only +// + +(DELAYFILE + (SDFVERSION "2.1") + (DESIGN "uart_sdram") + (DATE "06/02/2023 04:26:31") + (VENDOR "Altera") + (PROGRAM "Quartus II 64-Bit") + (VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version") + (DIVIDER .) + (TIMESCALE 1 ps) + + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (718:718:718) (815:815:815)) + (PORT d[1] (691:691:691) (783:783:783)) + (PORT d[2] (728:728:728) (837:837:837)) + (PORT d[3] (725:725:725) (826:826:826)) + (PORT d[4] (705:705:705) (799:799:799)) + (PORT d[5] (709:709:709) (803:803:803)) + (PORT d[6] (725:725:725) (828:828:828)) + (PORT d[7] (718:718:718) (819:819:819)) + (PORT clk (1066:1066:1066) (1085:1085:1085)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (532:532:532) (624:624:624)) + (PORT d[1] (559:559:559) (655:655:655)) + (PORT d[2] (395:395:395) (470:470:470)) + (PORT d[3] (483:483:483) (562:562:562)) + (PORT d[4] (405:405:405) (485:485:485)) + (PORT d[5] (388:388:388) (463:463:463)) + (PORT d[6] (496:496:496) (578:578:578)) + (PORT d[7] (543:543:543) (639:639:639)) + (PORT d[8] (395:395:395) (470:470:470)) + (PORT d[9] (392:392:392) (468:468:468)) + (PORT clk (1064:1064:1064) (1083:1083:1083)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (864:864:864) (932:932:932)) + (PORT clk (1064:1064:1064) (1083:1083:1083)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (1066:1066:1066) (1085:1085:1085)) + (PORT d[0] (1148:1148:1148) (1225:1225:1225)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1067:1067:1067) (1086:1086:1086)) + (IOPATH (posedge clk) pulse (0:0:0) (987:987:987)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1067:1067:1067) (1086:1086:1086)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1067:1067:1067) (1086:1086:1086)) + (IOPATH (posedge clk) pulse (0:0:0) (1207:1207:1207)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1067:1067:1067) (1086:1086:1086)) + (IOPATH (posedge clk) pulse (0:0:0) (1207:1207:1207)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (399:399:399) (473:473:473)) + (PORT d[1] (396:396:396) (461:461:461)) + (PORT d[2] (561:561:561) (656:656:656)) + (PORT d[3] (695:695:695) (809:809:809)) + (PORT d[4] (397:397:397) (469:469:469)) + (PORT d[5] (749:749:749) (898:898:898)) + (PORT d[6] (691:691:691) (809:809:809)) + (PORT d[7] (549:549:549) (638:638:638)) + (PORT d[8] (403:403:403) (479:479:479)) + (PORT d[9] (577:577:577) (667:667:667)) + (PORT clk (1023:1023:1023) (1044:1044:1044)) + (PORT ena (1058:1058:1058) (1126:1126:1126)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + (HOLD ena (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (1023:1023:1023) (1044:1044:1044)) + (PORT d[0] (1058:1058:1058) (1126:1126:1126)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1024:1024:1024) (1045:1045:1045)) + (IOPATH (posedge clk) pulse (0:0:0) (1145:1145:1145)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1024:1024:1024) (1045:1045:1045)) + (IOPATH (posedge clk) pulse (0:0:0) (1222:1222:1222)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1024:1024:1024) (1045:1045:1045)) + (IOPATH (posedge clk) pulse (0:0:0) (1222:1222:1222)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (313:313:313) (377:377:377)) + (PORT datab (198:198:198) (251:251:251)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (167:167:167) (158:158:158)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~14) + (DELAY + (ABSOLUTE + (PORT dataa (369:369:369) (449:449:449)) + (PORT datab (385:385:385) (469:469:469)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (167:167:167) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (636:636:636) (753:753:753)) + (PORT datab (200:200:200) (257:257:257)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (167:167:167) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~16) + (DELAY + (ABSOLUTE + (PORT dataa (199:199:199) (257:257:257)) + (PORT datab (318:318:318) (387:387:387)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (146:146:146) (204:204:204)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (188:188:188)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (147:147:147) (204:204:204)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (188:188:188)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT dataa (137:137:137) (189:189:189)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (141:141:141) (195:195:195)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (227:227:227) (281:281:281)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~0) + (DELAY + (ABSOLUTE + (PORT datab (331:331:331) (396:396:396)) + (IOPATH datab combout (192:192:192) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (142:142:142) (193:193:193)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~12) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~26) + (DELAY + (ABSOLUTE + (PORT dataa (137:137:137) (189:189:189)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT dataa (216:216:216) (275:275:275)) + (PORT datab (390:390:390) (462:462:462)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT dataa (142:142:142) (196:196:196)) + (PORT datab (389:389:389) (461:461:461)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT dataa (147:147:147) (198:198:198)) + (PORT datab (389:389:389) (461:461:461)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT dataa (214:214:214) (268:268:268)) + (PORT datab (388:388:388) (460:460:460)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT dataa (219:219:219) (276:276:276)) + (PORT datab (387:387:387) (458:458:458)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT dataa (216:216:216) (276:276:276)) + (PORT datab (386:386:386) (458:458:458)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT dataa (312:312:312) (376:376:376)) + (PORT datab (386:386:386) (457:457:457)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (141:141:141) (194:194:194)) + (PORT datab (385:385:385) (456:456:456)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~4) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (188:188:188)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2934:2934:2934) (2626:2626:2626)) + (PORT sclr (620:620:620) (738:738:738)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2934:2934:2934) (2626:2626:2626)) + (PORT sclr (620:620:620) (738:738:738)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2934:2934:2934) (2626:2626:2626)) + (PORT sclr (620:620:620) (738:738:738)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2934:2934:2934) (2626:2626:2626)) + (PORT sclr (620:620:620) (738:738:738)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2934:2934:2934) (2626:2626:2626)) + (PORT sclr (620:620:620) (738:738:738)) + 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(84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2934:2934:2934) (2626:2626:2626)) + (PORT sclr (620:620:620) (738:738:738)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2934:2934:2934) (2626:2626:2626)) + (PORT sclr (620:620:620) (738:738:738)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE 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(IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[18\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2940:2940:2940) (2632:2632:2632)) + (PORT sclr (610:610:610) (719:719:719)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[19\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2940:2940:2940) (2632:2632:2632)) + (PORT sclr (610:610:610) (719:719:719)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[20\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2940:2940:2940) (2632:2632:2632)) + (PORT sclr (610:610:610) (719:719:719)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[21\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2940:2940:2940) (2632:2632:2632)) + (PORT sclr (610:610:610) (719:719:719)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[22\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2940:2940:2940) (2632:2632:2632)) + (PORT sclr (610:610:610) (719:719:719)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[23\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2940:2940:2940) (2632:2632:2632)) + (PORT sclr (610:610:610) (719:719:719)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE 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cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~6) + (DELAY + (ABSOLUTE + (PORT datab (208:208:208) (262:262:262)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~8) + (DELAY + (ABSOLUTE + (PORT dataa (213:213:213) (268:268:268)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~10) + (DELAY + (ABSOLUTE + (PORT dataa (212:212:212) (267:267:267)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~12) + (DELAY + (ABSOLUTE + (PORT dataa (227:227:227) (281:281:281)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~14) + (DELAY + (ABSOLUTE + (PORT dataa (226:226:226) (280:280:280)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE 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datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~22) + (DELAY + (ABSOLUTE + (PORT datab (364:364:364) (439:439:439)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~24) + (DELAY + (ABSOLUTE + (PORT datab (209:209:209) (263:263:263)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~26) + (DELAY + (ABSOLUTE + (PORT datab (224:224:224) (277:277:277)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~28) + (DELAY + (ABSOLUTE + (PORT dataa (227:227:227) (280:280:280)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~30) + (DELAY + (ABSOLUTE + (PORT datad (206:206:206) (252:252:252)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (189:189:189)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[9\]\~31) + (DELAY + (ABSOLUTE + (PORT dataa (141:141:141) (195:195:195)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[11\]\~35) + (DELAY + (ABSOLUTE + (PORT dataa (141:141:141) (197:197:197)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[0\]\~24) + (DELAY + (ABSOLUTE + (PORT dataa (751:751:751) (873:873:873)) + (PORT datab (135:135:135) (184:184:184)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[1\]\~26) + (DELAY + (ABSOLUTE + (PORT dataa (135:135:135) (186:186:186)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[2\]\~28) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (187:187:187)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[3\]\~30) + (DELAY + (ABSOLUTE + (PORT datab (134:134:134) (184:184:184)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[4\]\~32) + (DELAY + (ABSOLUTE + (PORT datab (133:133:133) (183:183:183)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[5\]\~34) + (DELAY + (ABSOLUTE + (PORT datab (134:134:134) (184:184:184)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[6\]\~36) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (189:189:189)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[7\]\~38) + (DELAY + (ABSOLUTE + (PORT dataa (135:135:135) (186:186:186)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[8\]\~40) + (DELAY + (ABSOLUTE + (PORT datab (133:133:133) (182:182:182)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[9\]\~42) + (DELAY + (ABSOLUTE + (PORT dataa (134:134:134) (187:187:187)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[10\]\~44) + (DELAY + (ABSOLUTE + (PORT datab (133:133:133) (183:183:183)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[11\]\~46) + (DELAY + (ABSOLUTE + (PORT dataa (134:134:134) (187:187:187)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[12\]\~48) + (DELAY + (ABSOLUTE + (PORT datab (132:132:132) (182:182:182)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[13\]\~50) + (DELAY + (ABSOLUTE + (PORT datab (133:133:133) (183:183:183)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[14\]\~52) + (DELAY + (ABSOLUTE + (PORT datab (134:134:134) (184:184:184)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[15\]\~54) + (DELAY + (ABSOLUTE + (PORT dataa (135:135:135) (188:188:188)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[16\]\~56) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (184:184:184)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[17\]\~58) + (DELAY + (ABSOLUTE + (PORT dataa (135:135:135) (186:186:186)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[18\]\~60) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (188:188:188)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[19\]\~62) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[20\]\~64) + (DELAY + (ABSOLUTE + (PORT datab (134:134:134) (184:184:184)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[21\]\~66) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[22\]\~68) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[23\]\~70) + (DELAY + (ABSOLUTE + (PORT dataa (137:137:137) (188:188:188)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2783:2783:2783) (2483:2483:2483)) + (PORT sclr (331:331:331) (381:381:381)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2783:2783:2783) (2483:2483:2483)) + (PORT sclr (331:331:331) (381:381:381)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2783:2783:2783) (2483:2483:2483)) + (PORT sclr (331:331:331) (381:381:381)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2783:2783:2783) (2483:2483:2483)) + (PORT sclr (331:331:331) (381:381:381)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2783:2783:2783) (2483:2483:2483)) + (PORT sclr (331:331:331) (381:381:381)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2783:2783:2783) (2483:2483:2483)) + (PORT sclr (331:331:331) (381:381:381)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2783:2783:2783) (2483:2483:2483)) + (PORT sclr (331:331:331) (381:381:381)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2783:2783:2783) (2483:2483:2483)) + (PORT sclr (331:331:331) (381:381:381)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2783:2783:2783) (2483:2483:2483)) + (PORT sclr (331:331:331) (381:381:381)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2783:2783:2783) (2483:2483:2483)) + (PORT sclr (331:331:331) (381:381:381)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (187:187:187)) + (PORT datab (154:154:154) (210:210:210)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~4) + (DELAY + (ABSOLUTE + (PORT datab (133:133:133) (184:184:184)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~6) + (DELAY + (ABSOLUTE + (PORT datad (135:135:135) (179:179:179)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (336:336:336) (407:407:407)) + (PORT datab (132:132:132) (182:182:182)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT datab (133:133:133) (183:183:183)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (134:134:134) (184:184:184)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (189:189:189)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT dataa (135:135:135) (187:187:187)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (188:188:188)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (134:134:134) (184:184:184)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (141:141:141) (196:196:196)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT asdata (652:652:652) (728:728:728)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (450:450:450) (527:527:527)) + (PORT datab (456:456:456) (526:526:526)) + (PORT datad (117:117:117) (153:153:153)) + (IOPATH dataa combout (181:181:181) (193:193:193)) + (IOPATH datab combout (190:190:190) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (891:891:891)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2554:2554:2554) (2301:2301:2301)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Mux0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (303:303:303) (345:345:345)) + (PORT datab (170:170:170) (227:227:227)) + (PORT datac (300:300:300) (342:342:342)) + (PORT datad (151:151:151) (203:203:203)) + (IOPATH dataa combout (166:166:166) (159:159:159)) + (IOPATH datab combout (167:167:167) (158:158:158)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Mux0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (395:395:395) (462:462:462)) + (PORT datab (377:377:377) (443:443:443)) + (PORT datac (458:458:458) (523:523:523)) + (PORT datad (509:509:509) (598:598:598)) + (IOPATH dataa combout (165:165:165) (163:163:163)) + (IOPATH datab combout (167:167:167) (167:167:167)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~0) + (DELAY + (ABSOLUTE + (PORT dataa (167:167:167) (233:233:233)) + (PORT datab (331:331:331) (381:381:381)) + (PORT datac (597:597:597) (683:683:683)) + (PORT datad (154:154:154) (202:202:202)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~1) + (DELAY + (ABSOLUTE + (PORT dataa (167:167:167) (229:229:229)) + (PORT datab (103:103:103) (132:132:132)) + (PORT datac (296:296:296) (338:338:338)) + (PORT datad (155:155:155) (204:204:204)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~2) + (DELAY + (ABSOLUTE + (PORT dataa (374:374:374) (452:452:452)) + (PORT datab (154:154:154) (210:210:210)) + (PORT datac (428:428:428) (483:483:483)) + (PORT datad (91:91:91) (109:109:109)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (182:182:182) (177:177:177)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (891:891:891)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2554:2554:2554) (2301:2301:2301)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.IDLE) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (862:862:862)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (133:133:133) (184:184:184)) + (PORT datab (240:240:240) (299:299:299)) + (PORT datac (494:494:494) (577:577:577)) + (PORT datad (140:140:140) (186:186:186)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\~0) + (DELAY + (ABSOLUTE + (PORT datac (196:196:196) (248:248:248)) + (PORT datad (204:204:204) (249:249:249)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|WideOr5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (672:672:672) (798:798:798)) + (PORT datad (651:651:651) (768:768:768)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (163:163:163) (222:222:222)) + (PORT datab (148:148:148) (199:199:199)) + (PORT datac (94:94:94) (117:117:117)) + (PORT datad (385:385:385) (466:466:466)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT dataa (144:144:144) (196:196:196)) + (PORT datab (173:173:173) (233:233:233)) + (PORT datac (365:365:365) (430:430:430)) + (PORT datad (425:425:425) (498:498:498)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector21\~0) + (DELAY + (ABSOLUTE + (PORT dataa (162:162:162) (221:221:221)) + (PORT datab (108:108:108) (140:140:140)) + (PORT datac (133:133:133) (176:176:176)) + (PORT datad (131:131:131) (169:169:169)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (168:168:168) (234:234:234)) + (PORT datac (137:137:137) (186:186:186)) + (PORT datad (154:154:154) (201:201:201)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Add1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (171:171:171) (235:235:235)) + (PORT datab (155:155:155) (212:212:212)) + (PORT datac (121:121:121) (164:164:164)) + (PORT datad (154:154:154) (202:202:202)) + (IOPATH dataa combout (158:158:158) (173:173:173)) + (IOPATH datab combout (160:160:160) (176:176:176)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[3\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (104:104:104) (136:136:136)) + (PORT datab (112:112:112) (145:145:145)) + (PORT datad (119:119:119) (143:143:143)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT ena (407:407:407) (424:424:424)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (150:150:150) (204:204:204)) + (PORT datab (147:147:147) (197:197:197)) + (PORT datac (135:135:135) (179:179:179)) + (PORT datad (136:136:136) (176:176:176)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE read_valid) + (DELAY + (ABSOLUTE + (PORT clk (881:881:881) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2773:2773:2773) (2476:2476:2476)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~0) + (DELAY + (ABSOLUTE + (PORT datac (95:95:95) (118:118:118)) + (PORT datad (95:95:95) (115:115:115)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~1) + (DELAY + (ABSOLUTE + (PORT dataa (647:647:647) (762:762:762)) + (PORT datab (388:388:388) (463:463:463)) + (PORT datac (89:89:89) (111:111:111)) + (PORT datad (96:96:96) (116:116:116)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TMRD) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (853:853:853) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.IDLE\~0) + (DELAY + (ABSOLUTE + (PORT dataa (507:507:507) (599:599:599)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datac combout (190:190:190) (195:195:195)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (873:873:873) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (857:857:857) (863:863:863)) + (PORT ena (421:421:421) (449:449:449)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~3) + (DELAY + (ABSOLUTE + (PORT datab (376:376:376) (453:453:453)) + (PORT datad (377:377:377) (453:453:453)) + (IOPATH datab combout (167:167:167) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (882:882:882) (887:887:887)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (633:633:633) (678:678:678)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~0) + (DELAY + (ABSOLUTE + (PORT dataa (216:216:216) (278:278:278)) + (PORT datab (216:216:216) (274:274:274)) + (PORT datac (364:364:364) (433:433:433)) + (PORT datad (367:367:367) (445:445:445)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (882:882:882) (887:887:887)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (633:633:633) (678:678:678)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (882:882:882) (887:887:887)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (633:633:633) (678:678:678)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (882:882:882) (887:887:887)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (633:633:633) (678:678:678)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (882:882:882) (887:887:887)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (633:633:633) (678:678:678)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~1) + (DELAY + (ABSOLUTE + (PORT dataa (219:219:219) (276:276:276)) + (PORT datab (148:148:148) (199:199:199)) + (PORT datac (128:128:128) (174:174:174)) + (PORT datad (135:135:135) (174:174:174)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (882:882:882) (887:887:887)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (633:633:633) (678:678:678)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (882:882:882) (887:887:887)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (633:633:633) (678:678:678)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (882:882:882) (887:887:887)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (633:633:633) (678:678:678)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~2) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (198:198:198)) + (PORT datab (147:147:147) (197:197:197)) + (PORT datac (130:130:130) (171:171:171)) + (PORT datad (135:135:135) (175:175:175)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~3) + (DELAY + (ABSOLUTE + (PORT dataa (330:330:330) (381:381:381)) + (PORT datab (339:339:339) (388:388:388)) + (PORT datac (374:374:374) (441:441:441)) + (PORT datad (92:92:92) (110:110:110)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2935:2935:2935) (2627:2627:2627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (217:217:217) (274:274:274)) + (PORT datab (146:146:146) (196:196:196)) + (PORT datac (125:125:125) (170:170:170)) + (PORT datad (133:133:133) (171:171:171)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (141:141:141) (196:196:196)) + (PORT datab (106:106:106) (136:136:136)) + (PORT datac (133:133:133) (176:176:176)) + (PORT datad (130:130:130) (168:168:168)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (134:134:134) (186:186:186)) + (PORT datac (382:382:382) (456:456:456)) + (PORT datad (521:521:521) (617:617:617)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~2) + (DELAY + (ABSOLUTE + (PORT datac (162:162:162) (195:195:195)) + (PORT datad (128:128:128) (157:157:157)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT asdata (372:372:372) (426:426:426)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (127:127:127) (173:173:173)) + (PORT datad (333:333:333) (388:388:388)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT asdata (687:687:687) (776:776:776)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (139:139:139) (193:193:193)) + (PORT datac (126:126:126) (171:171:171)) + (PORT datad (332:332:332) (387:387:387)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (541:541:541) (639:639:639)) + (PORT datab (541:541:541) (642:642:642)) + (PORT datac (539:539:539) (631:631:631)) + (PORT datad (99:99:99) (119:119:119)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datab (542:542:542) (639:639:639)) + (PORT datac (92:92:92) (114:114:114)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (383:383:383) (468:468:468)) + (PORT datab (373:373:373) (443:443:443)) + (PORT datad (390:390:390) (463:463:463)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (192:192:192)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datab (375:375:375) (445:445:445)) + (PORT datad (390:390:390) (464:464:464)) + (IOPATH datab combout (192:192:192) (181:181:181)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (194:194:194)) + (PORT datac (129:129:129) (170:170:170)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT dataa (225:225:225) (285:285:285)) + (PORT datac (146:146:146) (189:189:189)) + (PORT datad (140:140:140) (182:182:182)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (511:511:511) (610:610:610)) + (PORT datac (138:138:138) (187:187:187)) + (PORT datad (101:101:101) (123:123:123)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (192:192:192) (247:247:247)) + (PORT datad (324:324:324) (377:377:377)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (372:372:372) (455:455:455)) + (PORT datab (364:364:364) (440:440:440)) + (PORT datac (185:185:185) (224:224:224)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT asdata (676:676:676) (756:756:756)) + (PORT clrn (851:851:851) (855:855:855)) + (PORT ena (801:801:801) (879:879:879)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (89:89:89) (111:111:111)) + (PORT datad (336:336:336) (404:404:404)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datac (139:139:139) (188:188:188)) + (PORT datad (101:101:101) (123:123:123)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (186:186:186)) + (PORT datac (129:129:129) (177:177:177)) + (PORT datad (201:201:201) (250:250:250)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datac (129:129:129) (176:176:176)) + (PORT datad (200:200:200) (250:250:250)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[15\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (144:144:144) (195:195:195)) + (PORT datab (143:143:143) (192:192:192)) + (PORT datac (130:130:130) (171:171:171)) + (PORT datad (130:130:130) (167:167:167)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (881:881:881) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2773:2773:2773) (2476:2476:2476)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (881:881:881) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2773:2773:2773) (2476:2476:2476)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (881:881:881) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2773:2773:2773) (2476:2476:2476)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (881:881:881) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2773:2773:2773) (2476:2476:2476)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (142:142:142) (193:193:193)) + (PORT datab (142:142:142) (190:190:190)) + (PORT datac (128:128:128) (169:169:169)) + (PORT datad (192:192:192) (240:240:240)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (142:142:142) (192:192:192)) + (PORT datab (142:142:142) (190:190:190)) + (PORT datac (128:128:128) (168:168:168)) + (PORT datad (129:129:129) (166:166:166)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (889:889:889)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2666:2666:2666) (2397:2397:2397)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (203:203:203) (266:266:266)) + (PORT datab (145:145:145) (194:194:194)) + (PORT datac (131:131:131) (172:172:172)) + (PORT datad (131:131:131) (169:169:169)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (167:167:167) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (106:106:106) (138:138:138)) + (PORT datab (102:102:102) (131:131:131)) + (PORT datac (92:92:92) (114:114:114)) + (PORT datad (324:324:324) (370:370:370)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE read_valid\~0) + (DELAY + (ABSOLUTE + (PORT dataa (337:337:337) (397:397:397)) + (PORT datab (332:332:332) (385:385:385)) + (PORT datac (362:362:362) (427:427:427)) + (PORT datad (130:130:130) (168:168:168)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE read_valid\~1) + (DELAY + (ABSOLUTE + (PORT dataa (361:361:361) (422:422:422)) + (PORT datab (362:362:362) (422:422:422)) + (PORT datad (91:91:91) (108:108:108)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (215:215:215) (270:270:270)) + (PORT datab (143:143:143) (191:191:191)) + (PORT datad (192:192:192) (223:223:223)) + (IOPATH dataa combout (166:166:166) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (234:234:234) (290:290:290)) + (PORT datab (165:165:165) (223:223:223)) + (PORT datac (152:152:152) (206:206:206)) + (PORT datad (125:125:125) (166:166:166)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (137:137:137) (191:191:191)) + (PORT datab (153:153:153) (206:206:206)) + (PORT datac (125:125:125) (172:172:172)) + (PORT datad (122:122:122) (161:161:161)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH datab combout (167:167:167) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~2) + (DELAY + (ABSOLUTE + (PORT datab (104:104:104) (133:133:133)) + (PORT datac (143:143:143) (184:184:184)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (366:366:366) (439:439:439)) + (PORT datab (388:388:388) (461:461:461)) + (PORT datad (327:327:327) (376:376:376)) + (IOPATH dataa combout (166:166:166) (159:159:159)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (145:145:145) (201:201:201)) + (PORT datab (143:143:143) (196:196:196)) + (PORT datac (128:128:128) (175:175:175)) + (PORT datad (127:127:127) (168:168:168)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT asdata (791:791:791) (889:889:889)) + (PORT clrn (859:859:859) (863:863:863)) + (PORT ena (834:834:834) (919:919:919)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (149:149:149) (203:203:203)) + (PORT datab (512:512:512) (605:605:605)) + (PORT datad (511:511:511) (593:593:593)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT asdata (863:863:863) (978:978:978)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (655:655:655) (712:712:712)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (222:222:222) (278:278:278)) + (PORT datab (214:214:214) (268:268:268)) + (PORT datad (136:136:136) (175:175:175)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (150:150:150) (204:204:204)) + (PORT datab (225:225:225) (281:281:281)) + (PORT datad (212:212:212) (259:259:259)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH datab combout (182:182:182) (193:193:193)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT datac (163:163:163) (195:195:195)) + (PORT datad (93:93:93) (111:111:111)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (496:496:496) (592:592:592)) + (PORT datab (378:378:378) (461:461:461)) + (PORT datad (132:132:132) (169:169:169)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (207:207:207) (266:266:266)) + (PORT datab (142:142:142) (190:190:190)) + (PORT datad (135:135:135) (175:175:175)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (146:146:146) (200:200:200)) + (PORT datab (144:144:144) (192:192:192)) + (PORT datad (130:130:130) (168:168:168)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT datab (103:103:103) (131:131:131)) + (PORT datac (90:90:90) (112:112:112)) + (PORT datad (319:319:319) (367:367:367)) + (IOPATH datab combout (167:167:167) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~8) + (DELAY + (ABSOLUTE + (PORT dataa (490:490:490) (561:561:561)) + (PORT datab (502:502:502) (578:578:578)) + (PORT datac (500:500:500) (578:578:578)) + (PORT datad (91:91:91) (109:109:109)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (167:167:167) (167:167:167)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (142:142:142) (193:193:193)) + (PORT datab (146:146:146) (195:195:195)) + (PORT datad (213:213:213) (264:264:264)) + (IOPATH dataa combout (181:181:181) (184:184:184)) + (IOPATH datab combout (182:182:182) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (240:240:240) (300:300:300)) + (PORT datab (148:148:148) (197:197:197)) + (PORT datad (139:139:139) (181:181:181)) + (IOPATH dataa combout (192:192:192) (184:184:184)) + (IOPATH datab combout (167:167:167) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (996:996:996) (1109:1109:1109)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (688:688:688) (745:745:745)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (305:305:305) (353:353:353)) + (PORT datab (179:179:179) (216:216:216)) + (PORT datad (145:145:145) (183:183:183)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (160:160:160) (213:213:213)) + (PORT datab (230:230:230) (287:287:287)) + (PORT datad (211:211:211) (260:260:260)) + (IOPATH dataa combout (166:166:166) (173:173:173)) + (IOPATH datab combout (191:191:191) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (218:218:218) (276:276:276)) + (PORT datab (155:155:155) (203:203:203)) + (PORT datad (209:209:209) (258:258:258)) + (IOPATH dataa combout (181:181:181) (184:184:184)) + (IOPATH datab combout (182:182:182) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (194:194:194) (231:231:231)) + (PORT datab (206:206:206) (266:266:266)) + (PORT datad (92:92:92) (110:110:110)) + (IOPATH dataa combout (165:165:165) (163:163:163)) + (IOPATH datab combout (161:161:161) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (133:133:133) (171:171:171)) + (PORT datac (309:309:309) (360:360:360)) + (PORT datad (330:330:330) (385:385:385)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (549:549:549) (639:639:639)) + (PORT datab (714:714:714) (838:838:838)) + (PORT datad (186:186:186) (233:233:233)) + (IOPATH dataa combout (166:166:166) (173:173:173)) + (IOPATH datab combout (191:191:191) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (204:204:204) (262:262:262)) + (PORT datab (378:378:378) (460:460:460)) + (PORT datad (500:500:500) (596:596:596)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (499:499:499) (561:561:561)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (418:418:418)) + (PORT datab (148:148:148) (199:199:199)) + (PORT datad (131:131:131) (169:169:169)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (104:104:104) (135:135:135)) + (PORT datab (385:385:385) (444:444:444)) + (PORT datad (194:194:194) (245:245:245)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (188:188:188) (193:193:193)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (509:509:509) (567:567:567)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (204:204:204) (264:264:264)) + (PORT datab (403:403:403) (481:481:481)) + (PORT datad (510:510:510) (597:597:597)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (149:149:149) (203:203:203)) + (PORT datab (125:125:125) (158:158:158)) + (PORT datac (139:139:139) (186:186:186)) + (PORT datad (139:139:139) (181:181:181)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (189:189:189)) + (PORT datab (135:135:135) (185:185:185)) + (PORT datac (121:121:121) (163:163:163)) + (PORT datad (122:122:122) (161:161:161)) + (IOPATH dataa combout (158:158:158) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (214:214:214) (270:270:270)) + (PORT datab (136:136:136) (186:186:186)) + (PORT datac (123:123:123) (167:167:167)) + (PORT datad (123:123:123) (162:162:162)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (139:139:139) (193:193:193)) + (PORT datab (137:137:137) (188:188:188)) + (PORT datac (123:123:123) (167:167:167)) + (PORT datad (123:123:123) (163:163:163)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~3) + (DELAY + (ABSOLUTE + (PORT dataa (137:137:137) (191:191:191)) + (PORT datab (137:137:137) (187:187:187)) + (PORT datac (122:122:122) (166:166:166)) + (PORT datad (124:124:124) (164:164:164)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~4) + (DELAY + (ABSOLUTE + (PORT dataa (322:322:322) (378:378:378)) + (PORT datab (102:102:102) (131:131:131)) + (PORT datac (89:89:89) (111:111:111)) + (PORT datad (90:90:90) (108:108:108)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~5) + (DELAY + (ABSOLUTE + (PORT dataa (137:137:137) (190:190:190)) + (PORT datab (136:136:136) (185:185:185)) + (PORT datac (122:122:122) (166:166:166)) + (PORT datad (123:123:123) (163:163:163)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~6) + (DELAY + (ABSOLUTE + (PORT dataa (213:213:213) (268:268:268)) + (PORT datab (135:135:135) (185:185:185)) + (PORT datac (121:121:121) (164:164:164)) + (PORT datad (122:122:122) (161:161:161)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout 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+ ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[15\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (194:194:194) (233:233:233)) + (PORT datab (408:408:408) (485:485:485)) + (PORT datad (389:389:389) (448:448:448)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[14\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (405:405:405) (479:479:479)) + (PORT datab (175:175:175) (214:214:214)) + (PORT datad (387:387:387) (456:456:456)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[13\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (404:404:404) (477:477:477)) + (PORT datab (272:272:272) (318:318:318)) + (PORT datad (389:389:389) (458:458:458)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[12\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (404:404:404) (478:478:478)) + (PORT datab (189:189:189) (227:227:227)) + (PORT datad (389:389:389) (458:458:458)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[9\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (133:133:133) (171:171:171)) + (PORT datab (339:339:339) (389:389:389)) + (PORT datad (114:114:114) (135:135:135)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[11\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (132:132:132) (169:169:169)) + (PORT datab (329:329:329) (383:383:383)) + (PORT datad (116:116:116) (139:139:139)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[10\]\~8) + (DELAY + (ABSOLUTE + (PORT dataa (132:132:132) (168:168:168)) + (PORT datab (325:325:325) (379:379:379)) + (PORT datad (115:115:115) (138:138:138)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[8\]\~9) + (DELAY + (ABSOLUTE + (PORT dataa (133:133:133) (169:169:169)) + (PORT datab (345:345:345) (402:402:402)) + (PORT datad (116:116:116) (139:139:139)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[7\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (399:399:399) (471:471:471)) + (PORT datab (190:190:190) (230:230:230)) + (PORT datad (395:395:395) (465:465:465)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[6\]\~11) + (DELAY + (ABSOLUTE + (PORT dataa (401:401:401) (474:474:474)) + (PORT datab (190:190:190) (230:230:230)) + (PORT datad (392:392:392) (462:462:462)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[5\]\~12) + (DELAY + (ABSOLUTE + (PORT dataa (402:402:402) (475:475:475)) + (PORT datab (176:176:176) (216:216:216)) + (PORT datad (392:392:392) (461:461:461)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[4\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (403:403:403) (476:476:476)) + (PORT datab (192:192:192) (233:233:233)) + (PORT datad (390:390:390) (460:460:460)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[3\]\~14) + (DELAY + (ABSOLUTE + (PORT dataa (176:176:176) (219:219:219)) + (PORT datab (414:414:414) (493:493:493)) + (PORT datad (384:384:384) (442:442:442)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[2\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (194:194:194) (234:234:234)) + (PORT datab (414:414:414) (492:492:492)) + (PORT datad (384:384:384) (442:442:442)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[1\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (176:176:176) (219:219:219)) + (PORT datab (416:416:416) (494:494:494)) + (PORT datad (383:383:383) (440:440:440)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[0\]\~17) + (DELAY + (ABSOLUTE + (PORT dataa (403:403:403) (477:477:477)) + (PORT datab (193:193:193) (233:233:233)) + (PORT datad (390:390:390) (459:459:459)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (497:497:497) (590:590:590)) + (PORT datab (388:388:388) (470:470:470)) + (PORT datad (212:212:212) (262:262:262)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (238:238:238) (296:296:296)) + (PORT datab (215:215:215) (274:274:274)) + (PORT datad (365:365:365) (437:437:437)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (420:420:420)) + (PORT datab (220:220:220) (275:275:275)) + (PORT datac (354:354:354) (420:420:420)) + (PORT datad (346:346:346) (411:411:411)) + (IOPATH dataa combout (192:192:192) (184:184:184)) + (IOPATH datab combout (167:167:167) (176:176:176)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (107:107:107) (140:140:140)) + (PORT datab (102:102:102) (131:131:131)) + (PORT datac (651:651:651) (755:755:755)) + (PORT datad (93:93:93) (111:111:111)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (434:434:434)) + (PORT datab (379:379:379) (457:457:457)) + (PORT datad (129:129:129) (166:166:166)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb\|data_wire\[2\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (739:739:739) (850:850:850)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (325:325:325) (390:390:390)) + (PORT datab (437:437:437) (501:501:501)) + (PORT datad (91:91:91) (108:108:108)) + (IOPATH dataa combout (181:181:181) (193:193:193)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (229:229:229) (283:283:283)) + (PORT datab (203:203:203) (260:260:260)) + (PORT datad (641:641:641) (748:748:748)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (188:188:188) (223:223:223)) + (PORT datab (104:104:104) (133:133:133)) + (PORT datac (161:161:161) (188:188:188)) + (PORT datad (120:120:120) (145:145:145)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (496:496:496) (593:593:593)) + (PORT datab (150:150:150) (206:206:206)) + (PORT datad (349:349:349) (419:419:419)) + (IOPATH dataa combout (181:181:181) (184:184:184)) + (IOPATH datab combout (182:182:182) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (144:144:144) (201:201:201)) + (PORT datab (370:370:370) (445:445:445)) + (PORT datac (548:548:548) (653:653:653)) + (PORT datad (131:131:131) (175:175:175)) + (IOPATH dataa combout (192:192:192) (184:184:184)) + (IOPATH datab combout (167:167:167) (176:176:176)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (152:152:152) (211:211:211)) + (PORT datab (153:153:153) (209:209:209)) + (PORT datac (347:347:347) (411:411:411)) + (PORT datad (343:343:343) (412:412:412)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH datab combout (182:182:182) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (350:350:350) (414:414:414)) + (PORT datab (140:140:140) (175:175:175)) + (PORT datad (174:174:174) (207:207:207)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (160:160:160) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (341:341:341) (418:418:418)) + (PORT datab (207:207:207) (267:267:267)) + (PORT datad (202:202:202) (253:253:253)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (374:374:374) (458:458:458)) + (PORT datab (144:144:144) (193:193:193)) + (PORT datad (326:326:326) (386:386:386)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (151:151:151) (209:209:209)) + (PORT datab (367:367:367) (450:450:450)) + (PORT datad (344:344:344) (411:411:411)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (154:154:154) (211:211:211)) + (PORT datab (152:152:152) (204:204:204)) + (PORT datac (479:479:479) (558:558:558)) + (PORT datad (150:150:150) (192:192:192)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|rd_flag) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2962:2962:2962) (2645:2645:2645)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (140:140:140) (196:196:196)) + (PORT datab (139:139:139) (191:191:191)) + (PORT datac (126:126:126) (171:171:171)) + (PORT datad (126:126:126) (167:167:167)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|cntr_cout\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (539:539:539) (648:648:648)) + (PORT datab (370:370:370) (445:445:445)) + (PORT datac (175:175:175) (202:202:202)) + (PORT datad (125:125:125) (164:164:164)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (PORT ena (694:694:694) (759:759:759)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (138:138:138) (192:192:192)) + (PORT datab (138:138:138) (188:188:188)) + (PORT datac (123:123:123) (167:167:167)) + (PORT datad (125:125:125) (165:165:165)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (138:138:138) (191:191:191)) + (PORT datab (137:137:137) (187:187:187)) + (PORT datac (123:123:123) (167:167:167)) + (PORT datad (124:124:124) (164:164:164)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (177:177:177) (215:215:215)) + (PORT datab (135:135:135) (185:185:185)) + (PORT datac (89:89:89) (111:111:111)) + (PORT datad (122:122:122) (161:161:161)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|rd_flag\~0) + (DELAY + (ABSOLUTE + (PORT dataa (366:366:366) (426:426:426)) + (PORT datab (396:396:396) (472:472:472)) + (PORT datad (96:96:96) (116:116:116)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|bit_cnt\~1) + (DELAY + (ABSOLUTE + (PORT dataa (147:147:147) (204:204:204)) + (PORT datab (104:104:104) (132:132:132)) + (PORT datac (138:138:138) (187:187:187)) + (PORT datad (107:107:107) (132:132:132)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~13) + (DELAY + (ABSOLUTE + (PORT dataa (485:485:485) (570:570:570)) + (PORT datab (152:152:152) (204:204:204)) + (PORT datac (137:137:137) (183:183:183)) + (PORT datad (134:134:134) (172:172:172)) + (IOPATH dataa combout (188:188:188) (203:203:203)) + (IOPATH datab combout (190:190:190) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|work_en) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|start_nedge) + (DELAY + (ABSOLUTE + (PORT clk (875:875:875) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|work_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (482:482:482) (574:574:574)) + (PORT datad (91:91:91) (109:109:109)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always3\~0) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (PORT datad (129:129:129) (166:166:166)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (375:375:375) (453:453:453)) + (PORT datab (129:129:129) (163:163:163)) + (PORT datad (323:323:323) (387:387:387)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[7\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (584:584:584) (678:678:678)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[7\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (461:461:461) (547:547:547)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (130:130:130) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (324:324:324) (393:393:393)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (200:200:200) (250:250:250)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE tx\~output) + (DELAY + (ABSOLUTE + (PORT i (1210:1210:1210) (1044:1044:1044)) + (IOPATH i o (1755:1755:1755) (1782:1782:1782)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_clk\~output) + (DELAY + (ABSOLUTE + (PORT i (745:745:745) (776:776:776)) + (IOPATH i o (1647:1647:1647) (1627:1627:1627)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_cas_n\~output) + (DELAY + (ABSOLUTE + (PORT i (897:897:897) (1012:1012:1012)) + (IOPATH i o (1667:1667:1667) (1647:1647:1647)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ras_n\~output) + (DELAY + (ABSOLUTE + (PORT i (932:932:932) (1051:1051:1051)) + (IOPATH i o (2582:2582:2582) (2667:2667:2667)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_we_n\~output) + (DELAY + (ABSOLUTE + (PORT i (998:998:998) (1147:1147:1147)) + (IOPATH i o (1687:1687:1687) (1667:1667:1667)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ba\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1395:1395:1395) (1583:1583:1583)) + (IOPATH i o (1667:1667:1667) (1647:1647:1647)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ba\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1501:1501:1501) (1711:1711:1711)) + (IOPATH i o (1667:1667:1667) (1647:1647:1647)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1069:1069:1069) (1198:1198:1198)) + (IOPATH i o (1677:1677:1677) (1657:1657:1657)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1066:1066:1066) (1201:1201:1201)) + (IOPATH i o (1812:1812:1812) (1785:1785:1785)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[2\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1066:1066:1066) (1201:1201:1201)) + (IOPATH i o (1812:1812:1812) (1785:1785:1785)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[3\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1396:1396:1396) (1581:1581:1581)) + (IOPATH i o (1812:1812:1812) (1785:1785:1785)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[4\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1229:1229:1229) (1382:1382:1382)) + (IOPATH i o (1812:1812:1812) (1785:1785:1785)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[5\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1244:1244:1244) (1399:1399:1399)) + (IOPATH i o (1792:1792:1792) (1765:1765:1765)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[6\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1855:1855:1855) (2120:2120:2120)) + (IOPATH i o (1792:1792:1792) (1765:1765:1765)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[7\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1681:1681:1681) (1925:1925:1925)) + (IOPATH i o (1782:1782:1782) (1755:1755:1755)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[8\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1861:1861:1861) (2127:2127:2127)) + (IOPATH i o (1792:1792:1792) (1765:1765:1765)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[9\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1114:1114:1114) (1261:1261:1261)) + (IOPATH i o (1782:1782:1782) (1755:1755:1755)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[10\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1136:1136:1136) (1301:1301:1301)) + (IOPATH i o (1687:1687:1687) (1667:1667:1667)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[11\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1114:1114:1114) (1261:1261:1261)) + (IOPATH i o (1792:1792:1792) (1765:1765:1765)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[12\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1322:1322:1322) (1498:1498:1498)) + (IOPATH i o (1782:1782:1782) (1755:1755:1755)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (652:652:652) (729:729:729)) + (PORT oe (688:688:688) (799:799:799)) + (IOPATH i o (1667:1667:1667) (1647:1647:1647)) + (IOPATH oe o (1686:1686:1686) (1644:1644:1644)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (629:629:629) (700:700:700)) + (PORT oe (688:688:688) (799:799:799)) + (IOPATH i o (1667:1667:1667) (1647:1647:1647)) + (IOPATH oe o (1686:1686:1686) (1644:1644:1644)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[2\]\~output) + (DELAY + (ABSOLUTE + (PORT i (671:671:671) (747:747:747)) + (PORT oe (828:828:828) (970:970:970)) + (IOPATH i o (1627:1627:1627) (1607:1607:1607)) + (IOPATH oe o (1686:1686:1686) (1644:1644:1644)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[3\]\~output) + (DELAY + (ABSOLUTE + (PORT i (458:458:458) (507:507:507)) + (PORT oe (510:510:510) (593:593:593)) + (IOPATH i o (1657:1657:1657) (1637:1637:1637)) + (IOPATH oe o (1686:1686:1686) (1644:1644:1644)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[4\]\~output) + (DELAY + (ABSOLUTE + (PORT i (470:470:470) (521:521:521)) + (PORT oe (510:510:510) (593:593:593)) + (IOPATH i o (1667:1667:1667) (1647:1647:1647)) + (IOPATH oe o (1686:1686:1686) (1644:1644:1644)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[5\]\~output) + (DELAY + (ABSOLUTE + (PORT i (644:644:644) (716:716:716)) + (PORT oe (828:828:828) (970:970:970)) + (IOPATH i o (1647:1647:1647) (1627:1627:1627)) + (IOPATH oe o (1686:1686:1686) (1644:1644:1644)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[6\]\~output) + (DELAY + (ABSOLUTE + (PORT i (650:650:650) (724:724:724)) + (PORT oe (688:688:688) (799:799:799)) + (IOPATH i o (1677:1677:1677) (1657:1657:1657)) + (IOPATH oe o (1686:1686:1686) (1644:1644:1644)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[7\]\~output) + (DELAY + (ABSOLUTE + (PORT i (503:503:503) (567:567:567)) + (PORT oe (688:688:688) (799:799:799)) + (IOPATH i o (1667:1667:1667) (1647:1647:1647)) + (IOPATH oe o (1686:1686:1686) (1644:1644:1644)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[8\]\~output) + (DELAY + (ABSOLUTE + (PORT i (699:699:699) (794:794:794)) + (PORT oe (1083:1083:1083) (1251:1251:1251)) + (IOPATH i o (1792:1792:1792) (1765:1765:1765)) + (IOPATH oe o (1810:1810:1810) (1750:1750:1750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[9\]\~output) + (DELAY + (ABSOLUTE + (PORT i (719:719:719) (806:806:806)) + (PORT oe (920:920:920) (1067:1067:1067)) + (IOPATH i o (1677:1677:1677) (1657:1657:1657)) + (IOPATH oe o (1686:1686:1686) (1644:1644:1644)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[10\]\~output) + (DELAY + (ABSOLUTE + (PORT i (828:828:828) (929:929:929)) + (PORT oe (781:781:781) (910:910:910)) + (IOPATH i o (1802:1802:1802) (1775:1775:1775)) + (IOPATH oe o (1810:1810:1810) (1750:1750:1750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[11\]\~output) + (DELAY + (ABSOLUTE + (PORT i (926:926:926) (1044:1044:1044)) + (PORT oe (923:923:923) (1070:1070:1070)) + (IOPATH i o (1782:1782:1782) (1755:1755:1755)) + (IOPATH oe o (1810:1810:1810) (1750:1750:1750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[12\]\~output) + (DELAY + (ABSOLUTE + (PORT i (756:756:756) (853:853:853)) + (PORT oe (946:946:946) (1102:1102:1102)) + (IOPATH i o (1772:1772:1772) (1745:1745:1745)) + (IOPATH oe o (1810:1810:1810) (1750:1750:1750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[13\]\~output) + (DELAY + (ABSOLUTE + (PORT i (613:613:613) (689:689:689)) + (PORT oe (954:954:954) (1111:1111:1111)) + (IOPATH i o (1782:1782:1782) (1755:1755:1755)) + (IOPATH oe o (1810:1810:1810) (1750:1750:1750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[14\]\~output) + (DELAY + (ABSOLUTE + (PORT i (697:697:697) (778:778:778)) + (PORT oe (954:954:954) (1111:1111:1111)) + (IOPATH i o (2596:2596:2596) (2713:2713:2713)) + (IOPATH oe o (2634:2634:2634) (2717:2717:2717)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[15\]\~output) + (DELAY + (ABSOLUTE + (PORT i (670:670:670) (746:746:746)) + (PORT oe (954:954:954) (1111:1111:1111)) + (IOPATH i o (1675:1675:1675) (1683:1683:1683)) + (IOPATH oe o (1714:1714:1714) (1688:1688:1688)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (214:214:214) (273:273:273)) + (PORT datab (141:141:141) (189:189:189)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sys_clk\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (358:358:358) (738:738:738)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_pll") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|pll1) + (DELAY + (ABSOLUTE + (PORT areset (2369:2369:2369) (2369:2369:2369)) + (PORT inclk[0] (1104:1104:1104) (1104:1104:1104)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sys_rst_n\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (318:318:318) (698:698:698)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|pll_lock_sync) + (DELAY + (ABSOLUTE + (PORT clk (1030:1030:1030) (907:907:907)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2773:2773:2773) (2476:2476:2476)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE rst_n\~0) + (DELAY + (ABSOLUTE + (PORT dataa (2202:2202:2202) (2492:2492:2492)) + (PORT datac (715:715:715) (598:598:598)) + (PORT datad (117:117:117) (153:153:153)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE rst_n\~0clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (1056:1056:1056) (1177:1177:1177)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT datab (140:140:140) (191:191:191)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT dataa (139:139:139) (192:192:192)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (145:145:145) (201:201:201)) + (PORT datab (222:222:222) (277:277:277)) + (PORT datac (129:129:129) (176:176:176)) + (PORT datad (129:129:129) (171:171:171)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (134:134:134) (184:184:184)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (230:230:230) (284:284:284)) + (PORT datab (137:137:137) (188:188:188)) + (PORT datac (121:121:121) (164:164:164)) + (PORT datad (124:124:124) (163:163:163)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[9\]\~31) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[11\]\~35) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT datac (318:318:318) (373:373:373)) + (PORT datad (203:203:203) (249:249:249)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~3) + (DELAY + (ABSOLUTE + (PORT dataa (238:238:238) (294:294:294)) + (PORT datab (233:233:233) (289:289:289)) + (PORT datac (90:90:90) (111:111:111)) + (PORT datad (203:203:203) (248:248:248)) + (IOPATH dataa combout (166:166:166) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (194:194:194)) + (PORT datab (171:171:171) (209:209:209)) + (PORT datac (172:172:172) (208:208:208)) + (PORT datad (91:91:91) (109:109:109)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (145:145:145) (201:201:201)) + (PORT datab (222:222:222) (277:277:277)) + (PORT datac (129:129:129) (175:175:175)) + (PORT datad (129:129:129) (170:170:170)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (194:194:194)) + (IOPATH dataa combout (188:188:188) (193:193:193)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (PORT sclr (404:404:404) (473:473:473)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (217:217:217) (276:276:276)) + (PORT datab (231:231:231) (285:285:285)) + (PORT datac (316:316:316) (371:371:371)) + (PORT datad (201:201:201) (245:245:245)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (194:194:194) (230:230:230)) + (PORT datab (189:189:189) (226:226:226)) + (PORT datac (215:215:215) (270:270:270)) + (PORT datad (92:92:92) (110:110:110)) + (IOPATH dataa combout (158:158:158) (163:163:163)) + (IOPATH datab combout (160:160:160) (167:167:167)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (135:135:135) (188:188:188)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (139:139:139) (192:192:192)) + (PORT datab (139:139:139) (189:189:189)) + (PORT datac (124:124:124) (169:169:169)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (146:146:146) (203:203:203)) + (PORT datab (120:120:120) (155:155:155)) + (PORT datac (137:137:137) (186:186:186)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_flag) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_flag) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT asdata (680:680:680) (771:771:771)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (149:149:149) (207:207:207)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH datac combout (190:190:190) (195:195:195)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a0) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (PORT ena (987:987:987) (1095:1095:1095)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (147:147:147) (203:203:203)) + (PORT datab (807:807:807) (936:936:936)) + (PORT datad (217:217:217) (267:267:267)) + (IOPATH dataa combout (181:181:181) (193:193:193)) + (IOPATH datab combout (191:191:191) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (234:234:234) (299:299:299)) + (PORT datab (152:152:152) (204:204:204)) + (PORT datac (130:130:130) (178:178:178)) + (PORT datad (676:676:676) (784:784:784)) + (IOPATH dataa combout (158:158:158) (163:163:163)) + (IOPATH datab combout (160:160:160) (167:167:167)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (89:89:89) (107:107:107)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (128:128:128) (162:162:162)) + (PORT datad (215:215:215) (265:265:265)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (226:226:226) (290:290:290)) + (PORT datab (154:154:154) (207:207:207)) + (PORT datac (147:147:147) (197:197:197)) + (PORT datad (218:218:218) (268:268:268)) + (IOPATH dataa combout (188:188:188) (203:203:203)) + (IOPATH datab combout (190:190:190) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (PORT ena (987:987:987) (1095:1095:1095)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (190:190:190) (227:227:227)) + (PORT datab (163:163:163) (219:219:219)) + (PORT datad (214:214:214) (264:264:264)) + (IOPATH dataa combout (188:188:188) (203:203:203)) + (IOPATH datab combout (190:190:190) (205:205:205)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (158:158:158) (216:216:216)) + (PORT datab (129:129:129) (163:163:163)) + (PORT datac (147:147:147) (197:197:197)) + (PORT datad (134:134:134) (172:172:172)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5\~0) + (DELAY + (ABSOLUTE + (PORT datad (312:312:312) (362:362:362)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (172:172:172) (235:235:235)) + (PORT datad (320:320:320) (369:369:369)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT dataa (371:371:371) (448:448:448)) + (PORT datab (151:151:151) (207:207:207)) + (PORT datac (154:154:154) (210:210:210)) + (PORT datad (147:147:147) (192:192:192)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (455:455:455) (491:491:491)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (162:162:162) (219:219:219)) + (PORT datab (151:151:151) (206:206:206)) + (PORT datac (155:155:155) (211:211:211)) + (PORT datad (320:320:320) (369:369:369)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (157:157:157) (182:182:182)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (162:162:162) (220:220:220)) + (PORT datab (152:152:152) (208:208:208)) + (PORT datac (154:154:154) (209:209:209)) + (PORT datad (319:319:319) (369:369:369)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10\~0) + (DELAY + (ABSOLUTE + (PORT datab (154:154:154) (209:209:209)) + (PORT datad (167:167:167) (193:193:193)) + (IOPATH datab combout (167:167:167) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (180:180:180) (218:218:218)) + (PORT datad (139:139:139) (183:183:183)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT datab (152:152:152) (207:207:207)) + (PORT datac (127:127:127) (173:173:173)) + (PORT datad (297:297:297) (355:355:355)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (503:503:503) (535:535:535)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT datab (133:133:133) (182:182:182)) + (PORT datac (345:345:345) (419:419:419)) + (PORT datad (437:437:437) (513:513:513)) + (IOPATH datab combout (188:188:188) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|parity9) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (PORT ena (987:987:987) (1095:1095:1095)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (232:232:232) (297:297:297)) + (PORT datab (152:152:152) (203:203:203)) + (PORT datac (130:130:130) (177:177:177)) + (PORT datad (674:674:674) (782:782:782)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (157:157:157) (214:214:214)) + (PORT datab (128:128:128) (162:162:162)) + (PORT datac (147:147:147) (196:196:196)) + (PORT datad (134:134:134) (172:172:172)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (173:173:173) (236:236:236)) + (PORT datab (334:334:334) (393:393:393)) + (PORT datad (147:147:147) (192:192:192)) + (IOPATH dataa combout (159:159:159) (173:173:173)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT asdata (305:305:305) (351:351:351)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (503:503:503) (535:535:535)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT datab (141:141:141) (196:196:196)) + (IOPATH datab combout (192:192:192) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT dataa (135:135:135) (187:187:187)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (189:189:189)) + (PORT datab (135:135:135) (184:184:184)) + (PORT datac (121:121:121) (164:164:164)) + (PORT datad (122:122:122) (162:162:162)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (150:150:150) (209:209:209)) + (PORT datab (149:149:149) (204:204:204)) + (PORT datac (133:133:133) (182:182:182)) + (PORT datad (133:133:133) (177:177:177)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~8) + (DELAY + (ABSOLUTE + (PORT dataa (328:328:328) (396:396:396)) + (PORT datab (222:222:222) (282:282:282)) + (PORT datac (192:192:192) (237:237:237)) + (PORT datad (180:180:180) (215:215:215)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (139:139:139) (183:183:183)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (503:503:503) (535:535:535)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT asdata (375:375:375) (425:425:425)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[8\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (444:444:444) (523:523:523)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (296:296:296) (354:354:354)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (503:503:503) (535:535:535)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (135:135:135) (174:174:174)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (488:488:488) (578:578:578)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (129:129:129) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (448:448:448) (523:523:523)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (221:221:221) (277:277:277)) + (PORT datab (136:136:136) (187:187:187)) + (PORT datac (128:128:128) (175:175:175)) + (PORT datad (199:199:199) (248:248:248)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (149:149:149) (193:193:193)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (455:455:455) (491:491:491)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT asdata (929:929:929) (1047:1047:1047)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT asdata (466:466:466) (523:523:523)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (137:137:137) (190:190:190)) + (PORT datab (114:114:114) (147:147:147)) + (PORT datac (127:127:127) (174:174:174)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT asdata (532:532:532) (598:598:598)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (455:455:455) (491:491:491)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (491:491:491) (572:572:572)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (135:135:135) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (189:189:189)) + (PORT datab (115:115:115) (147:147:147)) + (PORT datac (129:129:129) (176:176:176)) + (PORT datad (117:117:117) (154:154:154)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (116:116:116) (150:150:150)) + (PORT datad (510:510:510) (601:601:601)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT asdata (316:316:316) (362:362:362)) + (PORT clrn (854:854:854) (858:858:858)) + (PORT ena (987:987:987) (1095:1095:1095)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (670:670:670) (783:783:783)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT asdata (326:326:326) (375:375:375)) + (PORT clrn (854:854:854) (858:858:858)) + (PORT ena (987:987:987) (1095:1095:1095)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT asdata (659:659:659) (748:748:748)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (167:167:167) (223:223:223)) + (PORT datab (143:143:143) (192:192:192)) + (PORT datad (508:508:508) (599:599:599)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (166:166:166) (221:221:221)) + (PORT datab (115:115:115) (148:148:148)) + (PORT datac (130:130:130) (172:172:172)) + (PORT datad (509:509:509) (600:600:600)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5\~0) + (DELAY + (ABSOLUTE + (PORT datad (316:316:316) (364:364:364)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT asdata (329:329:329) (382:382:382)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (455:455:455) (491:491:491)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT asdata (749:749:749) (834:834:834)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (379:379:379) (459:459:459)) + (PORT datab (154:154:154) (202:202:202)) + (PORT datad (133:133:133) (172:172:172)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT datad (152:152:152) (193:193:193)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (PORT ena (694:694:694) (759:759:759)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (246:246:246) (301:301:301)) + (PORT datab (153:153:153) (205:205:205)) + (PORT datad (376:376:376) (443:443:443)) + (IOPATH dataa combout (166:166:166) (157:157:157)) + (IOPATH datab combout (167:167:167) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (453:453:453) (526:526:526)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (455:455:455) (491:491:491)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT asdata (973:973:973) (1108:1108:1108)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (204:204:204) (268:268:268)) + (PORT datab (507:507:507) (605:605:605)) + (PORT datad (512:512:512) (601:601:601)) + (IOPATH dataa combout (181:181:181) (184:184:184)) + (IOPATH datab combout (182:182:182) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (484:484:484) (560:560:560)) + (PORT datab (104:104:104) (133:133:133)) + (PORT datac (449:449:449) (510:510:510)) + (PORT datad (90:90:90) (108:108:108)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (649:649:649) (722:722:722)) + (PORT clrn (855:855:855) (858:858:858)) + (PORT ena (435:435:435) (462:462:462)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT asdata (782:782:782) (875:875:875)) + (PORT clrn (851:851:851) (855:855:855)) + (PORT ena (801:801:801) (879:879:879)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (393:393:393)) + (PORT datab (318:318:318) (378:378:378)) + (PORT datad (486:486:486) (580:580:580)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (808:808:808) (944:944:944)) + (PORT datab (231:231:231) (286:286:286)) + (PORT datad (195:195:195) (239:239:239)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (104:104:104) (135:135:135)) + (PORT datab (485:485:485) (563:563:563)) + (PORT datac (449:449:449) (517:517:517)) + (PORT datad (713:713:713) (807:807:807)) + (IOPATH dataa combout (166:166:166) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~8) + (DELAY + (ABSOLUTE + (PORT datac (89:89:89) (110:110:110)) + (PORT datad (175:175:175) (208:208:208)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (672:672:672) (757:757:757)) + (PORT clrn (855:855:855) (858:858:858)) + (PORT ena (435:435:435) (462:462:462)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (155:155:155) (211:211:211)) + (PORT datab (375:375:375) (451:451:451)) + (PORT datad (606:606:606) (697:697:697)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (542:542:542) (618:618:618)) + (PORT clrn (855:855:855) (858:858:858)) + (PORT ena (435:435:435) (462:462:462)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT asdata (315:315:315) (361:361:361)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (455:455:455) (491:491:491)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT asdata (473:473:473) (524:524:524)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (177:177:177) (219:219:219)) + (PORT datab (106:106:106) (135:135:135)) + (PORT datad (343:343:343) (413:413:413)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (431:431:431)) + (PORT datab (142:142:142) (190:190:190)) + (PORT datad (461:461:461) (539:539:539)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (106:106:106) (139:139:139)) + (PORT datab (103:103:103) (133:133:133)) + (PORT datad (345:345:345) (415:415:415)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT datab (447:447:447) (518:518:518)) + (PORT datac (295:295:295) (338:338:338)) + (PORT datad (471:471:471) (534:534:534)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|valid_rdreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (595:595:595) (689:689:689)) + (PORT datab (640:640:640) (751:751:751)) + (PORT datac (303:303:303) (356:356:356)) + (PORT datad (475:475:475) (558:558:558)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT asdata (958:958:958) (1072:1072:1072)) + (PORT clrn (851:851:851) (855:855:855)) + (PORT ena (801:801:801) (879:879:879)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6\~0) + (DELAY + (ABSOLUTE + (PORT datab (120:120:120) (154:154:154)) + (PORT datad (515:515:515) (609:609:609)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (630:630:630) (697:697:697)) + (PORT clrn (855:855:855) (858:858:858)) + (PORT ena (435:435:435) (462:462:462)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (151:151:151) (209:209:209)) + (PORT datab (216:216:216) (275:275:275)) + (PORT datac (131:131:131) (173:173:173)) + (PORT datad (207:207:207) (252:252:252)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (505:505:505) (603:603:603)) + (PORT datab (148:148:148) (203:203:203)) + (PORT datac (130:130:130) (172:172:172)) + (PORT datad (97:97:97) (118:118:118)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (140:140:140) (187:187:187)) + (PORT datad (438:438:438) (503:503:503)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (807:807:807) (943:943:943)) + (PORT datac (138:138:138) (184:184:184)) + (PORT datad (437:437:437) (502:502:502)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (214:214:214) (262:262:262)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT asdata (627:627:627) (696:696:696)) + (PORT clrn (852:852:852) (856:856:856)) + (PORT ena (455:455:455) (491:491:491)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (334:334:334) (402:402:402)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (194:194:194) (243:243:243)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (372:372:372) (455:455:455)) + (PORT datab (364:364:364) (441:441:441)) + (PORT datac (184:184:184) (223:223:223)) + (PORT datad (341:341:341) (411:411:411)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (501:501:501) (585:585:585)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (PORT ena (801:801:801) (879:879:879)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT asdata (678:678:678) (767:767:767)) + (PORT clrn (851:851:851) (855:855:855)) + (PORT ena (801:801:801) (879:879:879)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (805:805:805) (941:941:941)) + (PORT datab (221:221:221) (276:276:276)) + (PORT datac (140:140:140) (187:187:187)) + (PORT datad (437:437:437) (503:503:503)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (326:326:326) (394:394:394)) + (PORT datad (90:90:90) (108:108:108)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (130:130:130) (180:180:180)) + (PORT datab (363:363:363) (442:442:442)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab cout (227:227:227) (175:175:175)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~4) + (DELAY + (ABSOLUTE + (PORT dataa (615:615:615) (721:721:721)) + (PORT datab (358:358:358) (432:432:432)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~6) + (DELAY + (ABSOLUTE + (PORT dataa (359:359:359) (433:433:433)) + (PORT datab (357:357:357) (440:440:440)) + (IOPATH dataa combout (166:166:166) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~8) + (DELAY + (ABSOLUTE + (PORT dataa (349:349:349) (424:424:424)) + (PORT datab (311:311:311) (371:371:371)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~10) + (DELAY + (ABSOLUTE + (PORT dataa (325:325:325) (394:394:394)) + (PORT datab (315:315:315) (380:380:380)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (167:167:167) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datab (143:143:143) (196:196:196)) + (PORT datac (99:99:99) (126:126:126)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~12) + (DELAY + (ABSOLUTE + (PORT dataa (297:297:297) (363:363:363)) + (PORT datab (313:313:313) (378:378:378)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~14) + (DELAY + (ABSOLUTE + (PORT dataa (201:201:201) (257:257:257)) + (PORT datab (300:300:300) (363:363:363)) + (IOPATH dataa combout (166:166:166) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|LessThan2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (107:107:107) (139:139:139)) + (PORT datab (105:105:105) (134:134:134)) + (PORT datac (92:92:92) (114:114:114)) + (PORT datad (93:93:93) (111:111:111)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|LessThan2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (106:106:106) (137:137:137)) + (PORT datab (104:104:104) (132:132:132)) + (PORT datac (91:91:91) (112:112:112)) + (PORT datad (91:91:91) (108:108:108)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT dataa (531:531:531) (629:629:629)) + (PORT datab (367:367:367) (447:447:447)) + (PORT datac (103:103:103) (130:130:130)) + (PORT datad (346:346:346) (413:413:413)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9\~0) + (DELAY + (ABSOLUTE + (PORT datab (110:110:110) (140:140:140)) + (PORT datad (134:134:134) (173:173:173)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (536:536:536) (608:608:608)) + (PORT clrn (855:855:855) (858:858:858)) + (PORT ena (435:435:435) (462:462:462)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datac (140:140:140) (188:188:188)) + (PORT datad (137:137:137) (183:183:183)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT dataa (152:152:152) (212:212:212)) + (PORT datac (139:139:139) (185:185:185)) + (PORT datad (209:209:209) (255:255:255)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~18) + (DELAY + (ABSOLUTE + (PORT dataa (218:218:218) (275:275:275)) + (PORT datad (297:297:297) (356:356:356)) + (IOPATH dataa combout (188:188:188) (193:193:193)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_wr_req\~0) + (DELAY + (ABSOLUTE + (PORT dataa (902:902:902) (1055:1055:1055)) + (PORT datab (115:115:115) (144:144:144)) + (PORT datac (104:104:104) (126:126:126)) + (PORT datad (105:105:105) (123:123:123)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_wr_req) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (319:319:319) (392:392:392)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH datac combout (190:190:190) (195:195:195)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (455:455:455) (491:491:491)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (323:323:323) (397:397:397)) + (PORT datab (134:134:134) (170:170:170)) + (PORT datad (212:212:212) (259:259:259)) + (IOPATH dataa combout (181:181:181) (193:193:193)) + (IOPATH datab combout (191:191:191) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~11) + (DELAY + (ABSOLUTE + (PORT dataa (698:698:698) (815:815:815)) + (PORT datab (700:700:700) (822:822:822)) + (PORT datac (354:354:354) (426:426:426)) + (PORT datad (849:849:849) (983:983:983)) + (IOPATH dataa combout (188:188:188) (203:203:203)) + (IOPATH datab combout (190:190:190) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (655:655:655) (712:712:712)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (124:124:124) (163:163:163)) + (PORT datab (154:154:154) (208:208:208)) + (PORT datad (129:129:129) (166:166:166)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (161:161:161) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (358:358:358) (426:426:426)) + (PORT datab (681:681:681) (794:794:794)) + (PORT datac (337:337:337) (401:401:401)) + (PORT datad (317:317:317) (378:378:378)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (655:655:655) (712:712:712)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (150:150:150) (204:204:204)) + (PORT datab (126:126:126) (158:158:158)) + (PORT datac (140:140:140) (187:187:187)) + (PORT datad (139:139:139) (181:181:181)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (312:312:312) (365:365:365)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (890:890:890)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (868:868:868) (872:872:872)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (326:326:326) (384:384:384)) + (PORT datad (142:142:142) (185:185:185)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (890:890:890)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (868:868:868) (872:872:872)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (326:326:326) (384:384:384)) + (PORT datab (156:156:156) (209:209:209)) + (IOPATH dataa combout (192:192:192) (184:184:184)) + (IOPATH datab combout (182:182:182) (193:193:193)) + (IOPATH datac combout (190:190:190) (195:195:195)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (890:890:890)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (868:868:868) (872:872:872)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT datab (151:151:151) (204:204:204)) + (PORT datac (135:135:135) (179:179:179)) + (PORT datad (136:136:136) (176:176:176)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (885:885:885) (890:890:890)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (868:868:868) (872:872:872)) + (PORT ena (674:674:674) (741:741:741)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT datab (131:131:131) (179:179:179)) + (PORT datac (117:117:117) (157:157:157)) + (PORT datad (496:496:496) (586:586:586)) + (IOPATH datab combout (188:188:188) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|parity6) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (655:655:655) (712:712:712)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (151:151:151) (205:205:205)) + (PORT datab (141:141:141) (177:177:177)) + (PORT datac (302:302:302) (366:366:366)) + (PORT datad (207:207:207) (253:253:253)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (211:211:211) (276:276:276)) + (PORT datab (223:223:223) (280:280:280)) + (PORT datac (108:108:108) (137:137:137)) + (PORT datad (142:142:142) (185:185:185)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5\~0) + (DELAY + (ABSOLUTE + (PORT datab (104:104:104) (133:133:133)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (190:190:190) (195:195:195)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (186:186:186) (227:227:227)) + (PORT datab (150:150:150) (201:201:201)) + (PORT datad (208:208:208) (256:256:256)) + (IOPATH dataa combout (188:188:188) (203:203:203)) + (IOPATH datab combout (190:190:190) (205:205:205)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (416:416:416)) + (PORT datab (373:373:373) (452:452:452)) + (PORT datad (139:139:139) (180:180:180)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (161:161:161) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (225:225:225) (284:284:284)) + (PORT datab (389:389:389) (475:475:475)) + (PORT datac (808:808:808) (927:927:927)) + (PORT datad (323:323:323) (378:378:378)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT datab (144:144:144) (198:198:198)) + (IOPATH datab combout (192:192:192) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|rd_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (226:226:226) (294:294:294)) + (PORT datab (482:482:482) (573:573:573)) + (PORT datad (104:104:104) (128:128:128)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|rd_en) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (199:199:199)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (149:149:149) (207:207:207)) + (PORT datac (133:133:133) (182:182:182)) + (PORT datad (133:133:133) (176:176:176)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (152:152:152) (204:204:204)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT datab (134:134:134) (184:184:184)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (147:147:147) (196:196:196)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT dataa (148:148:148) (200:200:200)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~3) + (DELAY + (ABSOLUTE + (PORT datac (360:360:360) (428:428:428)) + (PORT datad (373:373:373) (449:449:449)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~5) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (435:435:435)) + (PORT datab (401:401:401) (487:487:487)) + (PORT datac (332:332:332) (391:391:391)) + (PORT datad (357:357:357) (414:414:414)) + (IOPATH dataa combout (166:166:166) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT datab (236:236:236) (294:294:294)) + (PORT datad (179:179:179) (211:211:211)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_CL) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (485:485:485) (564:564:564)) + (PORT datab (147:147:147) (197:197:197)) + (PORT datad (179:179:179) (210:210:210)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_DATA) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (137:137:137) (190:190:190)) + (PORT datab (135:135:135) (184:184:184)) + (PORT datac (121:121:121) (164:164:164)) + (PORT datad (122:122:122) (160:160:160)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~3) + (DELAY + (ABSOLUTE + (PORT dataa (357:357:357) (416:416:416)) + (PORT datab (377:377:377) (440:440:440)) + (PORT datac (146:146:146) (196:196:196)) + (PORT datad (339:339:339) (404:404:404)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_PRE) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT datab (194:194:194) (235:235:235)) + (PORT datad (204:204:204) (248:248:248)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_TRP) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|trp_end\~1) + (DELAY + (ABSOLUTE + (PORT datab (200:200:200) (241:241:241)) + (PORT datac (213:213:213) (266:266:266)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_END) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1058:1058:1058) (1232:1232:1232)) + (PORT datab (135:135:135) (185:185:185)) + (PORT datad (212:212:212) (269:269:269)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (1057:1057:1057) (1231:1231:1231)) + (PORT datab (136:136:136) (187:187:187)) + (PORT datad (123:123:123) (162:162:162)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_ACTIVE) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT datab (212:212:212) (271:271:271)) + (PORT datad (179:179:179) (210:210:210)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_TRCD) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|trcd_end\~1) + (DELAY + (ABSOLUTE + (PORT datab (228:228:228) (284:284:284)) + (PORT datad (180:180:180) (214:214:214)) + (IOPATH datab combout (167:167:167) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_READ) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (227:227:227) (295:295:295)) + (PORT datab (142:142:142) (190:190:190)) + (PORT datad (121:121:121) (158:158:158)) + (IOPATH dataa combout (166:166:166) (159:159:159)) + (IOPATH datab combout (167:167:167) (158:158:158)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~2) + (DELAY + (ABSOLUTE + (PORT dataa (146:146:146) (203:203:203)) + (PORT datab (151:151:151) (203:203:203)) + (PORT datac (128:128:128) (176:176:176)) + (PORT datad (128:128:128) (172:172:172)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~4) + (DELAY + (ABSOLUTE + (PORT dataa (186:186:186) (228:228:228)) + (PORT datab (119:119:119) (149:149:149)) + (PORT datac (133:133:133) (177:177:177)) + (PORT datad (134:134:134) (173:173:173)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (194:194:194)) + (PORT datab (144:144:144) (193:193:193)) + (PORT datac (200:200:200) (246:246:246)) + (PORT datad (385:385:385) (465:465:465)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (361:361:361) (430:430:430)) + (PORT datab (349:349:349) (410:410:410)) + (PORT datac (161:161:161) (190:190:190)) + (PORT datad (359:359:359) (416:416:416)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~3) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (445:445:445)) + (PORT datab (462:462:462) (533:533:533)) + (PORT datac (105:105:105) (128:128:128)) + (PORT datad (309:309:309) (359:359:359)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_ack\~1) + (DELAY + (ABSOLUTE + (PORT dataa (149:149:149) (207:207:207)) + (PORT datab (153:153:153) (206:206:206)) + (PORT datac (133:133:133) (182:182:182)) + (PORT datad (133:133:133) (176:176:176)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (192:192:192)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~1) + (DELAY + (ABSOLUTE + (PORT dataa (104:104:104) (134:134:134)) + (PORT datab (335:335:335) (392:392:392)) + (PORT datac (179:179:179) (207:207:207)) + (PORT datad (337:337:337) (394:394:394)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (671:671:671) (730:730:730)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (134:134:134) (173:173:173)) + (PORT datab (161:161:161) (215:215:215)) + (PORT datad (379:379:379) (445:445:445)) + (IOPATH dataa combout (192:192:192) (184:184:184)) + (IOPATH datab combout (182:182:182) (193:193:193)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (112:112:112) (148:148:148)) + (PORT datab (163:163:163) (219:219:219)) + (PORT datad (152:152:152) (194:194:194)) + (IOPATH dataa combout (158:158:158) (173:173:173)) + (IOPATH datab combout (160:160:160) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (166:166:166) (219:219:219)) + (PORT datad (102:102:102) (124:124:124)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (232:232:232) (292:292:292)) + (PORT datab (150:150:150) (201:201:201)) + (PORT datac (145:145:145) (195:195:195)) + (PORT datad (97:97:97) (118:118:118)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (225:225:225) (284:284:284)) + (PORT datab (389:389:389) (475:475:475)) + (PORT datac (322:322:322) (365:365:365)) + (PORT datad (323:323:323) (378:378:378)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (245:245:245) (308:308:308)) + (PORT datad (95:95:95) (115:115:115)) + (IOPATH dataa combout (166:166:166) (173:173:173)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (244:244:244) (307:307:307)) + (PORT datad (97:97:97) (116:116:116)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (248:248:248) (311:311:311)) + (PORT datac (134:134:134) (178:178:178)) + (PORT datad (206:206:206) (252:252:252)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (671:671:671) (730:730:730)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT dataa (160:160:160) (218:218:218)) + (PORT datab (164:164:164) (216:216:216)) + (PORT datac (150:150:150) (196:196:196)) + (PORT datad (148:148:148) (192:192:192)) + (IOPATH dataa combout (188:188:188) (203:203:203)) + (IOPATH datab combout (190:190:190) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (452:452:452) (491:491:491)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT datab (130:130:130) (178:178:178)) + (PORT datac (117:117:117) (157:157:157)) + (PORT datad (338:338:338) (398:398:398)) + (IOPATH datab combout (188:188:188) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|parity9) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (671:671:671) (730:730:730)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT datad (379:379:379) (445:445:445)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a0) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (452:452:452) (491:491:491)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (131:131:131) (169:169:169)) + (PORT datab (164:164:164) (219:219:219)) + (PORT datac (214:214:214) (266:266:266)) + (PORT datad (378:378:378) (444:444:444)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (158:158:158) (215:215:215)) + (PORT datab (115:115:115) (148:148:148)) + (PORT datad (222:222:222) (269:269:269)) + (IOPATH dataa combout (188:188:188) (203:203:203)) + (IOPATH datab combout (190:190:190) (205:205:205)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (114:114:114) (149:149:149)) + (PORT datab (166:166:166) (218:218:218)) + (PORT datac (149:149:149) (194:194:194)) + (PORT datad (151:151:151) (195:195:195)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (159:159:159) (215:215:215)) + (PORT datab (146:146:146) (197:197:197)) + (PORT datad (93:93:93) (112:112:112)) + (IOPATH dataa combout (159:159:159) (173:173:173)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (359:359:359) (419:419:419)) + (PORT datad (359:359:359) (427:427:427)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (387:387:387) (435:435:435)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (671:671:671) (730:730:730)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (514:514:514) (571:571:571)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (828:828:828) (919:919:919)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (688:688:688) (745:745:745)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (601:601:601) (707:707:707)) + (PORT datab (147:147:147) (197:197:197)) + (PORT datad (129:129:129) (166:166:166)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (310:310:310) (350:350:350)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (671:671:671) (730:730:730)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (516:516:516) (580:580:580)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~0) + (DELAY + (ABSOLUTE + (PORT datab (151:151:151) (203:203:203)) + (PORT datac (357:357:357) (423:423:423)) + (PORT datad (146:146:146) (184:184:184)) + (IOPATH datab combout (166:166:166) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~1) + (DELAY + (ABSOLUTE + (PORT dataa (361:361:361) (422:422:422)) + (PORT datad (92:92:92) (110:110:110)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (399:399:399) (459:459:459)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (671:671:671) (730:730:730)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (505:505:505) (559:559:559)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (555:555:555) (653:653:653)) + (PORT datab (546:546:546) (640:640:640)) + (PORT datad (298:298:298) (353:353:353)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (105:105:105) (137:137:137)) + (PORT datab (104:104:104) (133:133:133)) + (PORT datac (372:372:372) (430:430:430)) + (PORT datad (90:90:90) (107:107:107)) + (IOPATH dataa combout (166:166:166) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (461:461:461) (532:532:532)) + (PORT datab (139:139:139) (175:175:175)) + (PORT datac (139:139:139) (185:185:185)) + (PORT datad (320:320:320) (363:363:363)) + (IOPATH dataa combout (158:158:158) (173:173:173)) + (IOPATH datab combout (160:160:160) (167:167:167)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT asdata (542:542:542) (611:611:611)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (499:499:499) (527:527:527)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (865:865:865) (977:977:977)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (202:202:202) (247:247:247)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (499:499:499) (527:527:527)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (718:718:718) (808:808:808)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (684:684:684) (804:804:804)) + (PORT datab (313:313:313) (376:376:376)) + (PORT datad (541:541:541) (632:632:632)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (377:377:377) (453:453:453)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (671:671:671) (730:730:730)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (667:667:667) (755:755:755)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (983:983:983) (1099:1099:1099)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (671:671:671) (730:730:730)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (560:560:560) (645:645:645)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (676:676:676) (791:791:791)) + (PORT datab (778:778:778) (902:902:902)) + (PORT datad (120:120:120) (157:157:157)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (104:104:104) (135:135:135)) + (PORT datab (695:695:695) (796:796:796)) + (PORT datac (167:167:167) (196:196:196)) + (PORT datad (92:92:92) (110:110:110)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (847:847:847) (981:981:981)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (655:655:655) (712:712:712)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (212:212:212) (260:260:260)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (499:499:499) (527:527:527)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (705:705:705) (793:793:793)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdempty_eq_comp_lsb\|data_wire\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datac (545:545:545) (633:633:633)) + (PORT datad (311:311:311) (372:372:372)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT asdata (533:533:533) (594:594:594)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (499:499:499) (527:527:527)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (862:862:862) (977:977:977)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (547:547:547) (637:637:637)) + (PORT datab (103:103:103) (132:132:132)) + (PORT datad (677:677:677) (771:771:771)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT asdata (861:861:861) (967:967:967)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (655:655:655) (712:712:712)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (537:537:537) (644:644:644)) + (PORT datab (700:700:700) (822:822:822)) + (PORT datad (120:120:120) (158:158:158)) + (IOPATH dataa combout (188:188:188) (179:179:179)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (305:305:305) (354:354:354)) + (PORT datab (106:106:106) (135:135:135)) + (PORT datac (92:92:92) (114:114:114)) + (PORT datad (93:93:93) (111:111:111)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_en_dly) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (883:883:883)) + (PORT asdata (307:307:307) (347:347:347)) + (PORT clrn (2962:2962:2962) (2645:2645:2645)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|valid_wreq) + (DELAY + (ABSOLUTE + (PORT dataa (140:140:140) (195:195:195)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datac combout (190:190:190) (195:195:195)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (PORT datab (391:391:391) (462:462:462)) + (IOPATH dataa combout (188:188:188) (196:196:196)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (197:197:197)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (882:882:882) (887:887:887)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (633:633:633) (678:678:678)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (138:138:138) (191:191:191)) + (PORT datab (146:146:146) (199:199:199)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2935:2935:2935) (2627:2627:2627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (135:135:135) (187:187:187)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~6) + (DELAY + (ABSOLUTE + (PORT datab (136:136:136) (187:187:187)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|bit_cnt\~0) + (DELAY + (ABSOLUTE + (PORT datab (146:146:146) (200:200:200)) + (PORT datac (90:90:90) (111:111:111)) + (PORT datad (102:102:102) (125:125:125)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2935:2935:2935) (2627:2627:2627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (330:330:330) (399:399:399)) + (PORT datab (135:135:135) (185:185:185)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (138:138:138) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (134:134:134) (184:184:184)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (184:184:184)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (189:189:189)) + (PORT datab (137:137:137) (188:188:188)) + (PORT datac (121:121:121) (164:164:164)) + (PORT datad (124:124:124) (163:163:163)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (341:341:341) (410:410:410)) + (PORT datab (235:235:235) (293:293:293)) + (PORT datac (207:207:207) (259:259:259)) + (PORT datad (350:350:350) (417:417:417)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT datab (140:140:140) (191:191:191)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT datad (192:192:192) (240:240:240)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~3) + (DELAY + (ABSOLUTE + (PORT dataa (196:196:196) (235:235:235)) + (PORT datab (199:199:199) (241:241:241)) + (PORT datac (90:90:90) (111:111:111)) + (PORT datad (200:200:200) (251:251:251)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (3047:3047:3047) (2733:2733:2733)) + (PORT sclr (391:391:391) (452:452:452)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (410:410:410)) + (PORT datab (236:236:236) (294:294:294)) + (PORT datac (208:208:208) (260:260:260)) + (PORT datad (350:350:350) (418:418:418)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (181:181:181) (225:225:225)) + (PORT datab (103:103:103) (132:132:132)) + (PORT datac (184:184:184) (224:224:224)) + (PORT datad (198:198:198) (250:250:250)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2935:2935:2935) (2627:2627:2627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|bit_cnt\~1) + (DELAY + (ABSOLUTE + (PORT datab (115:115:115) (149:149:149)) + (PORT datac (131:131:131) (178:178:178)) + (PORT datad (91:91:91) (108:108:108)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2935:2935:2935) (2627:2627:2627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|always5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (138:138:138) (191:191:191)) + (PORT datab (138:138:138) (189:189:189)) + (PORT datac (121:121:121) (164:164:164)) + (PORT datad (124:124:124) (164:164:164)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|always5\~1) + (DELAY + (ABSOLUTE + (PORT datac (131:131:131) (178:178:178)) + (PORT datad (103:103:103) (126:126:126)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|rd_en) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2935:2935:2935) (2627:2627:2627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~1) + (DELAY + (ABSOLUTE + (PORT dataa (367:367:367) (440:440:440)) + (PORT datab (389:389:389) (462:462:462)) + (PORT datac (380:380:380) (454:454:454)) + (PORT datad (364:364:364) (442:442:442)) + (IOPATH dataa combout (158:158:158) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~0) + (DELAY + (ABSOLUTE + (PORT dataa (144:144:144) (200:200:200)) + (PORT datac (200:200:200) (253:253:253)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~2) + (DELAY + (ABSOLUTE + (PORT dataa (350:350:350) (405:405:405)) + (PORT datab (104:104:104) (133:133:133)) + (PORT datad (91:91:91) (109:109:109)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~4) + (DELAY + (ABSOLUTE + (PORT dataa (295:295:295) (342:342:342)) + (PORT datad (362:362:362) (439:439:439)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (212:212:212) (274:274:274)) + (PORT datab (218:218:218) (276:276:276)) + (PORT datac (126:126:126) (172:172:172)) + (PORT datad (363:363:363) (440:440:440)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH datab combout (167:167:167) (174:174:174)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (882:882:882) (887:887:887)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (633:633:633) (678:678:678)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (309:309:309) (349:349:349)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (671:671:671) (730:730:730)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (386:386:386) (428:428:428)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (671:671:671) (730:730:730)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (224:224:224) (283:283:283)) + (PORT datab (154:154:154) (206:206:206)) + (PORT datac (130:130:130) (172:172:172)) + (PORT datad (213:213:213) (260:260:260)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (380:380:380) (465:465:465)) + (PORT datab (408:408:408) (488:488:488)) + (PORT datac (379:379:379) (465:465:465)) + (PORT datad (356:356:356) (419:419:419)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (539:539:539) (631:631:631)) + (PORT datad (98:98:98) (119:119:119)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (542:542:542) (640:640:640)) + (PORT datac (539:539:539) (631:631:631)) + (PORT datad (99:99:99) (119:119:119)) + (IOPATH dataa combout (195:195:195) (203:203:203)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (883:883:883) (888:888:888)) + (PORT asdata (530:530:530) (600:600:600)) + (PORT clrn (867:867:867) (871:871:871)) + (PORT ena (655:655:655) (712:712:712)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (524:524:524) (608:608:608)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (524:524:524) (610:610:610)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (644:644:644) (744:744:744)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (PORT ena (834:834:834) (919:919:919)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT asdata (311:311:311) (352:352:352)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (710:710:710) (805:805:805)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (688:688:688) (745:745:745)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT asdata (544:544:544) (616:616:616)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT asdata (803:803:803) (893:893:893)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (688:688:688) (745:745:745)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (359:359:359) (427:427:427)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (362:362:362) (426:426:426)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (204:204:204) (262:262:262)) + (PORT datab (134:134:134) (184:184:184)) + (PORT datac (126:126:126) (171:171:171)) + (PORT datad (201:201:201) (248:248:248)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (132:132:132) (184:184:184)) + (PORT datab (136:136:136) (186:186:186)) + (PORT datac (125:125:125) (171:171:171)) + (PORT datad (101:101:101) (122:122:122)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (138:138:138) (193:193:193)) + (PORT datab (132:132:132) (181:181:181)) + (PORT datac (126:126:126) (171:171:171)) + (PORT datad (332:332:332) (387:387:387)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT asdata (718:718:718) (804:804:804)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (118:118:118) (160:160:160)) + (PORT datad (91:91:91) (107:107:107)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (415:415:415)) + (PORT datab (312:312:312) (378:378:378)) + (IOPATH dataa combout (166:166:166) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~4) + (DELAY + (ABSOLUTE + (PORT dataa (215:215:215) (271:271:271)) + (PORT datab (347:347:347) (420:420:420)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~6) + (DELAY + (ABSOLUTE + (PORT dataa (200:200:200) (257:257:257)) + (PORT datab (356:356:356) (431:431:431)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (167:167:167) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (104:104:104) (134:134:134)) + (PORT datab (108:108:108) (139:139:139)) + (PORT datac (94:94:94) (117:117:117)) + (PORT datad (95:95:95) (114:114:114)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT datab (137:137:137) (188:188:188)) + (PORT datac (125:125:125) (171:171:171)) + (PORT datad (203:203:203) (250:250:250)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT datab (136:136:136) (186:186:186)) + (PORT datac (124:124:124) (171:171:171)) + (PORT datad (101:101:101) (123:123:123)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~8) + (DELAY + (ABSOLUTE + (PORT dataa (480:480:480) (568:568:568)) + (PORT datab (353:353:353) (434:434:434)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~10) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (426:426:426)) + (PORT datab (369:369:369) (450:450:450)) + (IOPATH dataa combout (166:166:166) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~12) + (DELAY + (ABSOLUTE + (PORT dataa (456:456:456) (544:544:544)) + (PORT datab (356:356:356) (437:437:437)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~16) + (DELAY + (ABSOLUTE + (PORT dataa (367:367:367) (454:454:454)) + (PORT datab (364:364:364) (443:443:443)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (166:166:166) (174:174:174)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (357:357:357) (417:417:417)) + (PORT datab (332:332:332) (389:389:389)) + (PORT datac (357:357:357) (421:421:421)) + (PORT datad (335:335:335) (387:387:387)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_en\~1) + (DELAY + (ABSOLUTE + (PORT dataa (109:109:109) (141:141:141)) + (PORT datab (397:397:397) (473:473:473)) + (PORT datad (92:92:92) (111:111:111)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_en) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2962:2962:2962) (2645:2645:2645)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_rdreq\~0) + (DELAY + (ABSOLUTE + (PORT datab (131:131:131) (179:179:179)) + (PORT datac (529:529:529) (630:630:630)) + (PORT datad (515:515:515) (610:610:610)) + (IOPATH datab combout (166:166:166) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (150:150:150) (205:205:205)) + (PORT datab (140:140:140) (175:175:175)) + (PORT datac (305:305:305) (369:369:369)) + (PORT datad (209:209:209) (256:256:256)) + (IOPATH dataa combout (158:158:158) (163:163:163)) + (IOPATH datab combout (160:160:160) (167:167:167)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (93:93:93) (110:110:110)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (123:123:123) (162:162:162)) + (PORT datad (142:142:142) (186:186:186)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (213:213:213) (278:278:278)) + (PORT datab (223:223:223) (280:280:280)) + (PORT datac (104:104:104) (132:132:132)) + (PORT datad (145:145:145) (188:188:188)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6\~0) + (DELAY + (ABSOLUTE + (PORT datab (125:125:125) (157:157:157)) + (PORT datad (208:208:208) (256:256:256)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (388:388:388) (460:460:460)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (PORT ena (688:688:688) (745:745:745)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT asdata (546:546:546) (613:613:613)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datac (129:129:129) (176:176:176)) + (PORT datad (97:97:97) (119:119:119)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (106:106:106) (138:138:138)) + (PORT datab (105:105:105) (135:135:135)) + (PORT datac (91:91:91) (113:113:113)) + (PORT datad (92:92:92) (110:110:110)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT dataa (226:226:226) (286:286:286)) + (PORT datad (136:136:136) (179:179:179)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (880:880:880) (885:885:885)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (864:864:864) (868:868:868)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~18) + (DELAY + (ABSOLUTE + (PORT dataa (360:360:360) (437:437:437)) + (PORT datad (352:352:352) (425:425:425)) + (IOPATH dataa combout (188:188:188) (193:193:193)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~2) + (DELAY + (ABSOLUTE + (PORT dataa (103:103:103) (135:135:135)) + (PORT datab (773:773:773) (880:880:880)) + (PORT datac (751:751:751) (846:846:846)) + (PORT datad (106:106:106) (124:124:124)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~3) + (DELAY + (ABSOLUTE + (PORT dataa (751:751:751) (854:854:854)) + (PORT datab (115:115:115) (144:144:144)) + (PORT datac (104:104:104) (127:127:127)) + (PORT datad (90:90:90) (108:108:108)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req) + (DELAY + (ABSOLUTE + (PORT clk (873:873:873) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (857:857:857) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (666:666:666) (787:787:787)) + (PORT datab (361:361:361) (438:438:438)) + (PORT datac (465:465:465) (549:549:549)) + (PORT datad (133:133:133) (172:172:172)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (223:223:223) (291:291:291)) + (PORT datad (136:136:136) (176:176:176)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector3\~1) + (DELAY + (ABSOLUTE + (PORT dataa (119:119:119) (155:155:155)) + (PORT datab (484:484:484) (575:575:575)) + (PORT datac (616:616:616) (715:715:715)) + (PORT datad (93:93:93) (111:111:111)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.READ) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~7) + (DELAY + (ABSOLUTE + (PORT datab (240:240:240) (299:299:299)) + (PORT datac (194:194:194) (239:239:239)) + (PORT datad (209:209:209) (259:259:259)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (212:212:212) (260:260:260)) + (PORT datab (155:155:155) (209:209:209)) + (PORT datad (103:103:103) (120:120:120)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_DATA) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|twrite_end\~0) + (DELAY + (ABSOLUTE + (PORT dataa (151:151:151) (210:210:210)) + (PORT datab (150:150:150) (205:205:205)) + (PORT datac (134:134:134) (183:183:183)) + (PORT datad (134:134:134) (178:178:178)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|twrite_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (210:210:210) (262:262:262)) + (PORT datab (132:132:132) (167:167:167)) + (PORT datac (159:159:159) (215:215:215)) + (PORT datad (291:291:291) (335:335:335)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_PRE) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (120:120:120) (154:154:154)) + (PORT datad (207:207:207) (256:256:256)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_TRP) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|trp_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (211:211:211) (263:263:263)) + (PORT datab (140:140:140) (193:193:193)) + (PORT datac (117:117:117) (145:145:145)) + (PORT datad (182:182:182) (216:216:216)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_END) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (511:511:511) (614:614:614)) + (PORT datab (634:634:634) (735:735:735)) + (PORT datad (104:104:104) (127:127:127)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.WRITE) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (228:228:228) (297:297:297)) + (PORT datab (145:145:145) (196:196:196)) + (PORT datac (492:492:492) (586:586:586)) + (PORT datad (132:132:132) (170:170:170)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (319:319:319) (379:379:379)) + (PORT datab (103:103:103) (132:132:132)) + (PORT datac (90:90:90) (112:112:112)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.ARBIT) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT datab (490:490:490) (592:592:592)) + (PORT datac (134:134:134) (178:178:178)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (510:510:510) (602:602:602)) + (PORT datab (154:154:154) (212:212:212)) + (PORT datad (222:222:222) (275:275:275)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (862:862:862)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\~4) + (DELAY + (ABSOLUTE + (PORT datad (219:219:219) (276:276:276)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\~2) + (DELAY + (ABSOLUTE + (PORT dataa (243:243:243) (305:305:305)) + (PORT datad (127:127:127) (169:169:169)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT ena (423:423:423) (455:455:455)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~15) + (DELAY + (ABSOLUTE + (PORT datac (121:121:121) (164:164:164)) + (PORT datad (124:124:124) (165:165:165)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (117:117:117) (154:154:154)) + (PORT datad (213:213:213) (262:262:262)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_TRP) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~1) + (DELAY + (ABSOLUTE + (PORT datab (111:111:111) (142:142:142)) + (PORT datad (136:136:136) (182:182:182)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT datab (149:149:149) (203:203:203)) + (PORT datac (125:125:125) (172:172:172)) + (PORT datad (205:205:205) (257:257:257)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (242:242:242) (305:305:305)) + (PORT datab (135:135:135) (186:186:186)) + (PORT datac (101:101:101) (128:128:128)) + (PORT datad (131:131:131) (168:168:168)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (122:122:122) (160:160:160)) + (PORT datab (144:144:144) (197:197:197)) + (PORT datad (97:97:97) (116:116:116)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~0) + (DELAY + (ABSOLUTE + (PORT dataa (221:221:221) (288:288:288)) + (PORT datab (106:106:106) (137:137:137)) + (PORT datad (135:135:135) (180:180:180)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (218:218:218) (285:285:285)) + (PORT datab (149:149:149) (204:204:204)) + (PORT datac (127:127:127) (174:174:174)) + (PORT datad (131:131:131) (174:174:174)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector3\~1) + (DELAY + (ABSOLUTE + (PORT datab (104:104:104) (133:133:133)) + (PORT datac (133:133:133) (176:176:176)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_TRF) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~2) + (DELAY + (ABSOLUTE + (PORT dataa (120:120:120) (159:159:159)) + (PORT datab (144:144:144) (197:197:197)) + (PORT datad (95:95:95) (115:115:115)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|trc_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (216:216:216) (283:283:283)) + (PORT datab (149:149:149) (205:205:205)) + (PORT datac (128:128:128) (175:175:175)) + (PORT datad (131:131:131) (175:175:175)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (114:114:114) (149:149:149)) + (PORT datab (107:107:107) (136:136:136)) + (PORT datac (123:123:123) (167:167:167)) + (PORT datad (108:108:108) (134:134:134)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AUTO_REF) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[1\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (243:243:243) (305:305:305)) + (PORT datac (135:135:135) (180:180:180)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT ena (423:423:423) (455:455:455)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~17) + (DELAY + (ABSOLUTE + (PORT dataa (122:122:122) (160:160:160)) + (PORT datab (142:142:142) (194:194:194)) + (PORT datac (122:122:122) (165:165:165)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_END) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|aref_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (491:491:491) (592:592:592)) + (PORT datac (135:135:135) (179:179:179)) + (PORT datad (219:219:219) (272:272:272)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.AREF) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (862:862:862)) + (PORT ena (408:408:408) (428:428:428)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~3) + (DELAY + (ABSOLUTE + (PORT datad (99:99:99) (122:122:122)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (853:853:853) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~2) + (DELAY + (ABSOLUTE + (PORT datab (170:170:170) (228:228:228)) + (PORT datad (103:103:103) (126:126:126)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (853:853:853) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~1) + (DELAY + (ABSOLUTE + (PORT datab (152:152:152) (204:204:204)) + (PORT datac (150:150:150) (202:202:202)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (486:486:486) (578:578:578)) + (PORT datab (166:166:166) (222:222:222)) + (PORT datad (100:100:100) (122:122:122)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (167:167:167) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TRP) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (853:853:853) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (139:139:139) (194:194:194)) + (PORT datab (168:168:168) (226:226:226)) + (PORT datac (123:123:123) (167:167:167)) + (PORT datad (99:99:99) (120:120:120)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (160:160:160) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (417:417:417)) + (PORT datad (133:133:133) (172:172:172)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~10) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (424:424:424)) + (PORT datab (354:354:354) (420:420:420)) + (PORT datac (321:321:321) (378:378:378)) + (PORT datad (352:352:352) (416:416:416)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\~0) + (DELAY + (ABSOLUTE + (PORT dataa (325:325:325) (378:378:378)) + (PORT datab (104:104:104) (133:133:133)) + (PORT datac (91:91:91) (113:113:113)) + (PORT datad (96:96:96) (116:116:116)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (873:873:873) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (857:857:857) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~2) + (DELAY + (ABSOLUTE + (PORT datab (141:141:141) (189:189:189)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~4) + (DELAY + (ABSOLUTE + (PORT datab (141:141:141) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~8) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~14) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~16) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~18) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~20) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~22) + (DELAY + (ABSOLUTE + (PORT dataa (137:137:137) (188:188:188)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~24) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (184:184:184)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~28) + (DELAY + (ABSOLUTE + (PORT datad (191:191:191) (238:238:238)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (878:878:878) (886:886:886)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (862:862:862) (869:869:869)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (188:188:188)) + (PORT datab (204:204:204) (260:260:260)) + (PORT datac (121:121:121) (164:164:164)) + (PORT datad (121:121:121) (160:160:160)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (338:338:338) (403:403:403)) + (PORT datab (346:346:346) (418:418:418)) + (PORT datac (333:333:333) (391:391:391)) + (PORT datad (339:339:339) (400:400:400)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (398:398:398)) + (PORT datac (296:296:296) (337:337:337)) + (PORT datad (90:90:90) (107:107:107)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (354:354:354) (422:422:422)) + (PORT datab (351:351:351) (417:417:417)) + (PORT datac (317:317:317) (374:374:374)) + (PORT datad (354:354:354) (418:418:418)) + (IOPATH dataa combout (166:166:166) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (420:420:420)) + (PORT datab (110:110:110) (141:141:141)) + (PORT datac (175:175:175) (209:209:209)) + (PORT datad (134:134:134) (173:173:173)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_IDLE\~0) + (DELAY + (ABSOLUTE + (PORT datad (96:96:96) (115:115:115)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (873:873:873) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (857:857:857) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (104:104:104) (135:135:135)) + (PORT datab (155:155:155) (203:203:203)) + (PORT datac (92:92:92) (114:114:114)) + (PORT datad (502:502:502) (588:588:588)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~4) + (DELAY + (ABSOLUTE + (PORT dataa (215:215:215) (275:275:275)) + (PORT datab (114:114:114) (147:147:147)) + (PORT datad (139:139:139) (181:181:181)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (853:853:853) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT datab (169:169:169) (227:227:227)) + (PORT datad (137:137:137) (178:178:178)) + (IOPATH datab combout (167:167:167) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_END\~0) + (DELAY + (ABSOLUTE + (PORT dataa (138:138:138) (192:192:192)) + (PORT datab (166:166:166) (226:226:226)) + (PORT datad (188:188:188) (219:219:219)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_END) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (853:853:853) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (144:144:144) (196:196:196)) + (PORT datab (154:154:154) (210:210:210)) + (PORT datac (492:492:492) (575:575:575)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_PCHA) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (862:862:862)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (232:232:232) (287:287:287)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (233:233:233) (290:290:290)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (213:213:213) (268:268:268)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~8) + (DELAY + (ABSOLUTE + (PORT datab (211:211:211) (263:263:263)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~4) + (DELAY + (ABSOLUTE + (PORT datac (174:174:174) (210:210:210)) + (PORT datad (127:127:127) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[3\]\~1) + (DELAY + (ABSOLUTE + (PORT datac (641:641:641) (741:741:741)) + (PORT datad (133:133:133) (162:162:162)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT ena (407:407:407) (424:424:424)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~10) + (DELAY + (ABSOLUTE + (PORT datab (148:148:148) (199:199:199)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[5\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (214:214:214) (257:257:257)) + (PORT datab (564:564:564) (664:664:664)) + (PORT datad (91:91:91) (109:109:109)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~12) + (DELAY + (ABSOLUTE + (PORT datab (148:148:148) (199:199:199)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[6\]\~9) + (DELAY + (ABSOLUTE + (PORT dataa (213:213:213) (257:257:257)) + (PORT datab (564:564:564) (665:665:665)) + (PORT datad (92:92:92) (110:110:110)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~14) + (DELAY + (ABSOLUTE + (PORT dataa (148:148:148) (201:201:201)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[7\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (218:218:218) (262:262:262)) + (PORT datab (561:561:561) (662:662:662)) + (PORT datad (91:91:91) (108:108:108)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~0) + (DELAY + (ABSOLUTE + (PORT datac (175:175:175) (211:211:211)) + (PORT datad (131:131:131) (160:160:160)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT ena (407:407:407) (424:424:424)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~7) + (DELAY + (ABSOLUTE + (PORT datac (176:176:176) (213:213:213)) + (PORT datad (133:133:133) (162:162:162)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT ena (407:407:407) (424:424:424)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~8) + (DELAY + (ABSOLUTE + (PORT datab (143:143:143) (181:181:181)) + (PORT datad (163:163:163) (192:192:192)) + (IOPATH datab combout (167:167:167) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (PORT ena (407:407:407) (424:424:424)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (148:148:148) (201:201:201)) + (PORT datab (147:147:147) (197:197:197)) + (PORT datac (128:128:128) (169:169:169)) + (PORT datad (130:130:130) (167:167:167)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (147:147:147) (201:201:201)) + (PORT datab (232:232:232) (289:289:289)) + (PORT datac (92:92:92) (114:114:114)) + (PORT datad (210:210:210) (259:259:259)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (166:166:166) (167:167:167)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (215:215:215) (274:274:274)) + (PORT datab (146:146:146) (196:196:196)) + (PORT datac (213:213:213) (266:266:266)) + (PORT datad (89:89:89) (107:107:107)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~16) + (DELAY + (ABSOLUTE + (PORT datab (211:211:211) (265:265:265)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[8\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (657:657:657) (766:766:766)) + (PORT datab (141:141:141) (178:178:178)) + (PORT datad (174:174:174) (205:205:205)) + (IOPATH dataa combout (158:158:158) (173:173:173)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~18) + (DELAY + (ABSOLUTE + (PORT datad (137:137:137) (178:178:178)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[9\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (213:213:213) (257:257:257)) + (PORT datab (564:564:564) (665:665:665)) + (PORT datad (93:93:93) (111:111:111)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (883:883:883)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (863:863:863) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (231:231:231) (287:287:287)) + (PORT datab (150:150:150) (201:201:201)) + (PORT datac (132:132:132) (176:176:176)) + (PORT datad (211:211:211) (260:260:260)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT datab (102:102:102) (131:131:131)) + (PORT datac (136:136:136) (181:181:181)) + (PORT datad (138:138:138) (178:178:178)) + (IOPATH datab combout (167:167:167) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_req\~0) + (DELAY + (ABSOLUTE + (PORT dataa (451:451:451) (529:529:529)) + (PORT datab (144:144:144) (193:193:193)) + (PORT datad (435:435:435) (497:497:497)) + (IOPATH dataa combout (165:165:165) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_req) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (862:862:862)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT datac (346:346:346) (416:416:416)) + (PORT datad (133:133:133) (173:173:173)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|wr_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (511:511:511) (614:614:614)) + (PORT datab (634:634:634) (735:735:735)) + (PORT datad (104:104:104) (127:127:127)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|wr_en) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (508:508:508) (610:610:610)) + (PORT datab (139:139:139) (191:191:191)) + (PORT datad (1045:1045:1045) (1207:1207:1207)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~1) + (DELAY + (ABSOLUTE + (PORT datab (236:236:236) (294:294:294)) + (PORT datac (370:370:370) (435:435:435)) + (PORT datad (201:201:201) (247:247:247)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (124:124:124) (159:159:159)) + (PORT datab (143:143:143) (196:196:196)) + (PORT datac (91:91:91) (114:114:114)) + (PORT datad (198:198:198) (243:243:243)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (440:440:440)) + (PORT datab (186:186:186) (224:224:224)) + (PORT datac (89:89:89) (111:111:111)) + (PORT datad (159:159:159) (185:185:185)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT datab (140:140:140) (194:194:194)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (143:143:143) (198:198:198)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (191:191:191)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (878:878:878)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (PORT sclr (319:319:319) (370:370:370)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~5) + (DELAY + (ABSOLUTE + (PORT datab (238:238:238) (298:298:298)) + (PORT datad (209:209:209) (258:258:258)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (339:339:339) (408:408:408)) + (PORT datad (325:325:325) (373:373:373)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_TRCD) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|trcd_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (211:211:211) (263:263:263)) + (PORT datab (132:132:132) (167:167:167)) + (PORT datac (212:212:212) (269:269:269)) + (PORT datad (181:181:181) (216:216:216)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_WRITE) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack\~2) + (DELAY + (ABSOLUTE + (PORT dataa (149:149:149) (208:208:208)) + (PORT datab (148:148:148) (203:203:203)) + (PORT datac (132:132:132) (181:181:181)) + (PORT datad (132:132:132) (176:176:176)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack\~3) + (DELAY + (ABSOLUTE + (PORT dataa (212:212:212) (263:263:263)) + (PORT datab (130:130:130) (164:164:164)) + (PORT datac (153:153:153) (208:208:208)) + (PORT datad (173:173:173) (205:205:205)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (534:534:534) (628:628:628)) + (PORT datab (144:144:144) (192:192:192)) + (PORT datac (129:129:129) (171:171:171)) + (PORT datad (496:496:496) (584:584:584)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (504:504:504) (593:593:593)) + (PORT datab (612:612:612) (728:728:728)) + (PORT datac (433:433:433) (505:505:505)) + (PORT datad (91:91:91) (109:109:109)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (169:169:169) (225:225:225)) + (PORT datab (111:111:111) (144:144:144)) + (PORT datad (507:507:507) (598:598:598)) + (IOPATH dataa combout (188:188:188) (203:203:203)) + (IOPATH datab combout (190:190:190) (205:205:205)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~12) + (DELAY + (ABSOLUTE + (PORT dataa (532:532:532) (630:630:630)) + (PORT datab (367:367:367) (447:447:447)) + (PORT datac (479:479:479) (559:559:559)) + (PORT datad (346:346:346) (412:412:412)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (PORT ena (694:694:694) (759:759:759)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~11) + (DELAY + (ABSOLUTE + (PORT dataa (374:374:374) (457:457:457)) + (PORT datab (489:489:489) (580:580:580)) + (PORT datac (494:494:494) (582:582:582)) + (IOPATH dataa combout (195:195:195) (193:193:193)) + (IOPATH datab combout (196:196:196) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (855:855:855) (858:858:858)) + (PORT ena (435:435:435) (462:462:462)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (134:134:134) (185:185:185)) + (PORT datac (116:116:116) (157:157:157)) + (PORT datad (350:350:350) (423:423:423)) + (IOPATH dataa combout (188:188:188) (193:193:193)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|parity6) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (PORT ena (694:694:694) (759:759:759)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (337:337:337) (410:410:410)) + (PORT datab (163:163:163) (215:215:215)) + (PORT datac (140:140:140) (187:187:187)) + (PORT datad (380:380:380) (447:447:447)) + (IOPATH dataa combout (166:166:166) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (91:91:91) (109:109:109)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (104:104:104) (135:135:135)) + (PORT datab (147:147:147) (197:197:197)) + (PORT datac (471:471:471) (546:546:546)) + (PORT datad (379:379:379) (446:446:446)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (533:533:533) (631:631:631)) + (PORT datab (118:118:118) (151:151:151)) + (PORT datad (345:345:345) (412:412:412)) + (IOPATH dataa combout (159:159:159) (173:173:173)) + (IOPATH datab combout (166:166:166) (158:158:158)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT dataa (537:537:537) (636:636:636)) + (PORT datab (364:364:364) (444:444:444)) + (PORT datac (103:103:103) (132:132:132)) + (PORT datad (342:342:342) (408:408:408)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (90:90:90) (107:107:107)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10\~0) + (DELAY + (ABSOLUTE + (PORT datab (147:147:147) (198:198:198)) + (PORT datad (93:93:93) (113:113:113)) + (IOPATH datab combout (167:167:167) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (854:854:854) (858:858:858)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (871:871:871) (876:876:876)) + (PORT asdata (649:649:649) (736:736:736)) + (PORT clrn (855:855:855) (858:858:858)) + (PORT ena (435:435:435) (462:462:462)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (384:384:384) (469:469:469)) + (PORT datab (356:356:356) (430:430:430)) + (PORT datad (209:209:209) (255:255:255)) + (IOPATH dataa combout (166:166:166) (173:173:173)) + (IOPATH datab combout (191:191:191) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (431:431:431) (502:502:502)) + (PORT datab (133:133:133) (168:168:168)) + (PORT datac (133:133:133) (183:183:183)) + (PORT datad (319:319:319) (370:370:370)) + (IOPATH dataa combout (166:166:166) (159:159:159)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (104:104:104) (135:135:135)) + (PORT datab (141:141:141) (177:177:177)) + (PORT datac (165:165:165) (194:194:194)) + (PORT datad (370:370:370) (444:444:444)) + (IOPATH dataa combout (188:188:188) (184:184:184)) + (IOPATH datab combout (190:190:190) (188:188:188)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (868:868:868) (873:873:873)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (852:852:852) (856:856:856)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (130:130:130) (180:180:180)) + (PORT datad (120:120:120) (157:157:157)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[0\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (1120:1120:1120) (1119:1119:1119)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[1\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (1120:1120:1120) (1119:1119:1119)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE rx\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (348:348:348) (728:728:728)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg1\~0) + (DELAY + (ABSOLUTE + (PORT datad (1944:1944:1944) (2173:2173:2173)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg1) + (DELAY + (ABSOLUTE + (PORT clk (875:875:875) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg2\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (118:118:118) (154:154:154)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg2) + (DELAY + (ABSOLUTE + (PORT clk (875:875:875) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg3\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (121:121:121) (160:160:160)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg3) + (DELAY + (ABSOLUTE + (PORT clk (875:875:875) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (859:859:859) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[7\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (348:348:348) (419:419:419)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|bit_cnt\~0) + (DELAY + (ABSOLUTE + (PORT dataa (106:106:106) (139:139:139)) + (PORT datab (150:150:150) (206:206:206)) + (PORT datad (104:104:104) (129:129:129)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (882:882:882)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (865:865:865)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always8\~0) + (DELAY + (ABSOLUTE + (PORT datab (120:120:120) (155:155:155)) + (PORT datac (137:137:137) (186:186:186)) + (PORT datad (132:132:132) (177:177:177)) + (IOPATH datab combout (167:167:167) (174:174:174)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (790:790:790) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT asdata (299:299:299) (340:340:340)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (790:790:790) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (121:121:121) (159:159:159)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (790:790:790) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (123:123:123) (162:162:162)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (790:790:790) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (121:121:121) (160:160:160)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (790:790:790) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (125:125:125) (164:164:164)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (790:790:790) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (125:125:125) (164:164:164)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (790:790:790) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (124:124:124) (163:163:163)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (790:790:790) (866:866:866)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (119:119:119) (157:157:157)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (795:795:795) (881:881:881)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|ram_address_a\[9\]) + (DELAY + (ABSOLUTE + (PORT datad (134:134:134) (174:174:174)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0\~_wirecell) + (DELAY + (ABSOLUTE + (PORT datad (510:510:510) (599:599:599)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT datab (488:488:488) (579:579:579)) + (PORT datac (357:357:357) (430:430:430)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (121:121:121) (160:160:160)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (795:795:795) (881:881:881)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (123:123:123) (163:163:163)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (795:795:795) (881:881:881)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (125:125:125) (165:165:165)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (795:795:795) (881:881:881)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (123:123:123) (163:163:163)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (795:795:795) (881:881:881)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (121:121:121) (160:160:160)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (795:795:795) (881:881:881)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (123:123:123) (162:162:162)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (795:795:795) (881:881:881)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (872:872:872) (876:876:876)) + (PORT asdata (299:299:299) (341:341:341)) + (PORT clrn (856:856:856) (859:859:859)) + (PORT ena (795:795:795) (881:881:881)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (396:396:396) (471:471:471)) + (PORT d[1] (413:413:413) (494:494:494)) + (PORT d[2] (401:401:401) (468:468:468)) + (PORT d[3] (393:393:393) (466:466:466)) + (PORT d[4] (401:401:401) (477:477:477)) + (PORT d[5] (404:404:404) (480:480:480)) + (PORT d[6] (401:401:401) (468:468:468)) + (PORT d[7] (390:390:390) (464:464:464)) + (PORT d[8] (238:238:238) (279:279:279)) + (PORT clk (1057:1057:1057) (1074:1074:1074)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (556:556:556) (659:659:659)) + (PORT d[1] (669:669:669) (792:792:792)) + (PORT d[2] (578:578:578) (680:680:680)) + (PORT d[3] (725:725:725) (849:849:849)) + (PORT d[4] (547:547:547) (640:640:640)) + (PORT d[5] (574:574:574) (683:683:683)) + (PORT d[6] (702:702:702) (823:823:823)) + (PORT d[7] (535:535:535) (632:632:632)) + (PORT d[8] (567:567:567) (675:675:675)) + (PORT d[9] (482:482:482) (556:556:556)) + (PORT clk (1055:1055:1055) (1072:1072:1072)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1018:1018:1018) (1115:1115:1115)) + (PORT clk (1055:1055:1055) (1072:1072:1072)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (1057:1057:1057) (1074:1074:1074)) + (PORT d[0] (1302:1302:1302) (1408:1408:1408)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1058:1058:1058) (1075:1075:1075)) + (IOPATH (posedge clk) pulse (0:0:0) (987:987:987)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1058:1058:1058) (1075:1075:1075)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1058:1058:1058) (1075:1075:1075)) + (IOPATH (posedge clk) pulse (0:0:0) (1207:1207:1207)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1058:1058:1058) (1075:1075:1075)) + (IOPATH (posedge clk) pulse (0:0:0) (1207:1207:1207)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (522:522:522) (600:600:600)) + (PORT d[1] (653:653:653) (768:768:768)) + (PORT d[2] (725:725:725) (844:844:844)) + (PORT d[3] (574:574:574) (670:670:670)) + (PORT d[4] (702:702:702) (817:817:817)) + (PORT d[5] (441:441:441) (522:522:522)) + (PORT d[6] (536:536:536) (625:625:625)) + (PORT d[7] (526:526:526) (622:622:622)) + (PORT d[8] (568:568:568) (669:669:669)) + (PORT d[9] (484:484:484) (553:553:553)) + (PORT clk (1014:1014:1014) (1033:1033:1033)) + (PORT aclr (1040:1040:1040) (1045:1045:1045)) + (PORT stall (801:801:801) (757:757:757)) + (IOPATH (posedge aclr) q (152:152:152) (152:152:152)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + (HOLD stall (posedge clk) (104:104:104)) + (HOLD aclr (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (1014:1014:1014) (1033:1033:1033)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1015:1015:1015) (1034:1034:1034)) + (IOPATH (posedge clk) pulse (0:0:0) (1120:1120:1120)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1015:1015:1015) (1034:1034:1034)) + (IOPATH (posedge clk) pulse (0:0:0) (1222:1222:1222)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1015:1015:1015) (1034:1034:1034)) + (IOPATH (posedge clk) pulse (0:0:0) (1222:1222:1222)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (1013:1013:1013) (1032:1032:1032)) + (PORT ena (881:881:881) (933:933:933)) + (PORT aclr (1014:1014:1014) (1045:1045:1045)) + (IOPATH (posedge clk) q (164:164:164) (166:166:166)) + (IOPATH (posedge aclr) q (184:184:184) (186:186:186)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (25:25:25)) + (SETUP ena (posedge clk) (25:25:25)) + (SETUP aclr (posedge clk) (25:25:25)) + (HOLD d (posedge clk) (90:90:90)) + (HOLD ena (posedge clk) (90:90:90)) + (HOLD aclr (posedge clk) (90:90:90)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack) + (DELAY + (ABSOLUTE + (PORT datac (434:434:434) (506:506:506)) + (PORT datad (599:599:599) (705:705:705)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_sdram_en) + (DELAY + (ABSOLUTE + (PORT clk (867:867:867) (872:872:872)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (851:851:851) (855:855:855)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (479:479:479) (558:558:558)) + (PORT d[1] (479:479:479) (558:558:558)) + (PORT d[2] (479:479:479) (558:558:558)) + (PORT d[3] (479:479:479) (558:558:558)) + (PORT d[4] (472:472:472) (550:550:550)) + (PORT d[5] (472:472:472) (550:550:550)) + (PORT d[6] (472:472:472) (550:550:550)) + (PORT clk (1051:1051:1051) (1069:1069:1069)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (803:803:803) (944:944:944)) + (PORT d[1] (420:420:420) (505:505:505)) + (PORT d[2] (1013:1013:1013) (1178:1178:1178)) + (PORT d[3] (565:565:565) (668:668:668)) + (PORT d[4] (421:421:421) (498:498:498)) + (PORT d[5] (454:454:454) (530:530:530)) + (PORT d[6] (686:686:686) (806:806:806)) + (PORT d[7] (802:802:802) (930:930:930)) + (PORT d[8] (708:708:708) (832:832:832)) + (PORT d[9] (328:328:328) (377:377:377)) + (PORT clk (1049:1049:1049) (1067:1067:1067)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1164:1164:1164) (1275:1275:1275)) + (PORT clk (1049:1049:1049) (1067:1067:1067)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (1051:1051:1051) (1069:1069:1069)) + (PORT d[0] (1448:1448:1448) (1568:1568:1568)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1052:1052:1052) (1070:1070:1070)) + (IOPATH (posedge clk) pulse (0:0:0) (987:987:987)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1052:1052:1052) (1070:1070:1070)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1052:1052:1052) (1070:1070:1070)) + (IOPATH (posedge clk) pulse (0:0:0) (1207:1207:1207)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1052:1052:1052) (1070:1070:1070)) + (IOPATH (posedge clk) pulse (0:0:0) (1207:1207:1207)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (389:389:389) (455:455:455)) + (PORT d[1] (651:651:651) (767:767:767)) + (PORT d[2] (719:719:719) (837:837:837)) + (PORT d[3] (442:442:442) (528:528:528)) + (PORT d[4] (414:414:414) (495:495:495)) + (PORT d[5] (411:411:411) (484:484:484)) + (PORT d[6] (408:408:408) (485:485:485)) + (PORT d[7] (544:544:544) (641:641:641)) + (PORT d[8] (703:703:703) (821:821:821)) + (PORT d[9] (774:774:774) (884:884:884)) + (PORT clk (1008:1008:1008) (1028:1028:1028)) + (PORT aclr (1034:1034:1034) (1040:1040:1040)) + (PORT stall (951:951:951) (891:891:891)) + (IOPATH (posedge aclr) q (152:152:152) (152:152:152)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + (HOLD stall (posedge clk) (104:104:104)) + (HOLD aclr (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (1008:1008:1008) (1028:1028:1028)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1009:1009:1009) (1029:1029:1029)) + (IOPATH (posedge clk) pulse (0:0:0) (1120:1120:1120)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1009:1009:1009) (1029:1029:1029)) + (IOPATH (posedge clk) pulse (0:0:0) (1222:1222:1222)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1009:1009:1009) (1029:1029:1029)) + (IOPATH (posedge clk) pulse (0:0:0) (1222:1222:1222)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (1007:1007:1007) (1027:1027:1027)) + (PORT ena (855:855:855) (904:904:904)) + (PORT aclr (1008:1008:1008) (1040:1040:1040)) + (IOPATH (posedge clk) q (164:164:164) (166:166:166)) + (IOPATH (posedge aclr) q (184:184:184) (186:186:186)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (25:25:25)) + (SETUP ena (posedge clk) (25:25:25)) + (SETUP aclr (posedge clk) (25:25:25)) + (HOLD d (posedge clk) (90:90:90)) + (HOLD ena (posedge clk) (90:90:90)) + (HOLD aclr (posedge clk) (90:90:90)) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE sys_clk\~inputclkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (97:97:97) (82:82:82)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (339:339:339) (413:413:413)) + (PORT datab (135:135:135) (185:185:185)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datab combout (190:190:190) (181:181:181)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[11\]\~35) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (194:194:194)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (136:136:136) (189:189:189)) + (PORT datab (136:136:136) (185:185:185)) + (PORT datac (120:120:120) (163:163:163)) + (PORT datad (123:123:123) (163:163:163)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[9\]\~31) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (377:377:377) (453:453:453)) + (PORT datab (377:377:377) (450:450:450)) + (PORT datac (320:320:320) (369:369:369)) + (PORT datad (373:373:373) (445:445:445)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (139:139:139) (193:193:193)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (199:199:199)) + (PORT datab (140:140:140) (192:192:192)) + (PORT datac (128:128:128) (173:173:173)) + (PORT datad (129:129:129) (170:170:170)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|tx_flag) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT asdata (387:387:387) (443:443:443)) + (PORT clrn (2935:2935:2935) (2627:2627:2627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (374:374:374) (452:452:452)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datac combout (190:190:190) (195:195:195)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[1\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (168:168:168) (234:234:234)) + (PORT datab (114:114:114) (146:146:146)) + (PORT datad (118:118:118) (142:142:142)) + (IOPATH dataa combout (192:192:192) (184:184:184)) + (IOPATH datab combout (182:182:182) (193:193:193)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (891:891:891)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2554:2554:2554) (2301:2301:2301)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[2\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (283:283:283) (328:328:328)) + (PORT datab (116:116:116) (149:149:149)) + (PORT datad (114:114:114) (137:137:137)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (188:188:188) (177:177:177)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (891:891:891)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2554:2554:2554) (2301:2301:2301)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (166:166:166) (229:229:229)) + (PORT datab (170:170:170) (227:227:227)) + (PORT datac (131:131:131) (179:179:179)) + (PORT datad (98:98:98) (119:119:119)) + (IOPATH dataa combout (165:165:165) (159:159:159)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|work_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (547:547:547) (651:651:651)) + (PORT datad (512:512:512) (587:587:587)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|work_en) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (891:891:891)) + (PORT asdata (2151:2151:2151) (2399:2399:2399)) + (PORT clrn (2554:2554:2554) (2301:2301:2301)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (104:104:104) (135:135:135)) + (PORT datab (115:115:115) (144:144:144)) + (PORT datac (555:555:555) (626:626:626)) + (PORT datad (460:460:460) (537:537:537)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT datab (140:140:140) (192:192:192)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT datab (135:135:135) (185:185:185)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (139:139:139) (192:192:192)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (134:134:134) (184:184:184)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT datad (128:128:128) (166:166:166)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (892:892:892)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2551:2551:2551) (2299:2299:2299)) + (PORT sclr (545:545:545) (627:627:627)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD sclr (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (142:142:142) (197:197:197)) + (PORT datab (141:141:141) (193:193:193)) + (PORT datac (125:125:125) (170:170:170)) + (PORT datad (125:125:125) (167:167:167)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (208:208:208) (245:245:245)) + (PORT datab (374:374:374) (451:451:451)) + (PORT datac (314:314:314) (360:360:360)) + (PORT datad (376:376:376) (452:452:452)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (891:891:891) (896:896:896)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2512:2512:2512) (2252:2252:2252)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (135:135:135) (187:187:187)) + (PORT datac (356:356:356) (424:424:424)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|valid_rreq) + (DELAY + (ABSOLUTE + (PORT dataa (145:145:145) (196:196:196)) + (PORT datad (361:361:361) (438:438:438)) + (IOPATH dataa combout (166:166:166) (163:163:163)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[0\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (328:328:328) (707:707:707)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT asdata (2160:2160:2160) (2435:2435:2435)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_ack\~2) + (DELAY + (ABSOLUTE + (PORT dataa (395:395:395) (478:478:478)) + (PORT datab (348:348:348) (415:415:415)) + (PORT datac (325:325:325) (375:375:375)) + (PORT datad (103:103:103) (120:120:120)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT datad (333:333:333) (388:388:388)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0\~_wirecell) + (DELAY + (ABSOLUTE + (PORT datad (850:850:850) (984:984:984)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT datab (145:145:145) (195:195:195)) + (PORT datac (132:132:132) (175:175:175)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[1\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (328:328:328) (707:707:707)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT asdata (2132:2132:2132) (2408:2408:2408)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[1\]\~6) + (DELAY + (ABSOLUTE + (PORT datad (329:329:329) (384:384:384)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[2\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (288:288:288) (667:667:667)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT asdata (2107:2107:2107) (2373:2373:2373)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[2\]\~4) + (DELAY + (ABSOLUTE + (PORT datad (328:328:328) (382:382:382)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[3\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (318:318:318) (697:697:697)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT asdata (2013:2013:2013) (2214:2214:2214)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[3\]\~2) + (DELAY + (ABSOLUTE + (PORT datad (335:335:335) (389:389:389)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[4\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (328:328:328) (707:707:707)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT asdata (2021:2021:2021) (2229:2229:2229)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[4\]\~1) + (DELAY + (ABSOLUTE + (PORT datad (327:327:327) (382:382:382)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[5\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (308:308:308) (687:687:687)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT asdata (2162:2162:2162) (2423:2423:2423)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[5\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (330:330:330) (385:385:385)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[6\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (338:338:338) (717:717:717)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT asdata (2221:2221:2221) (2482:2482:2482)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[6\]\~3) + (DELAY + (ABSOLUTE + (PORT datad (334:334:334) (389:389:389)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[7\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (328:328:328) (707:707:707)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (884:884:884) (888:888:888)) + (PORT asdata (2100:2100:2100) (2364:2364:2364)) + (PORT clrn (867:867:867) (871:871:871)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[7\]\~7) + (DELAY + (ABSOLUTE + (PORT datad (328:328:328) (383:383:383)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (379:379:379) (431:431:431)) + (PORT d[1] (352:352:352) (399:399:399)) + (PORT d[2] (351:351:351) (399:399:399)) + (PORT d[3] (377:377:377) (429:429:429)) + (PORT d[4] (358:358:358) (408:408:408)) + (PORT d[5] (352:352:352) (399:399:399)) + (PORT d[6] (357:357:357) (405:405:405)) + (PORT d[7] (367:367:367) (417:417:417)) + (PORT clk (1068:1068:1068) (1086:1086:1086)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (418:418:418) (487:487:487)) + (PORT d[1] (401:401:401) (475:475:475)) + (PORT d[2] (391:391:391) (466:466:466)) + (PORT d[3] (741:741:741) (860:860:860)) + (PORT d[4] (385:385:385) (463:463:463)) + (PORT d[5] (719:719:719) (846:846:846)) + (PORT d[6] (688:688:688) (794:794:794)) + (PORT d[7] (405:405:405) (483:483:483)) + (PORT d[8] (424:424:424) (505:505:505)) + (PORT d[9] (367:367:367) (428:428:428)) + (PORT clk (1066:1066:1066) (1084:1084:1084)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (539:539:539) (551:551:551)) + (PORT clk (1066:1066:1066) (1084:1084:1084)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (1068:1068:1068) (1086:1086:1086)) + (PORT d[0] (823:823:823) (844:844:844)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1069:1069:1069) (1087:1087:1087)) + (IOPATH (posedge clk) pulse (0:0:0) (987:987:987)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1069:1069:1069) (1087:1087:1087)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1069:1069:1069) (1087:1087:1087)) + (IOPATH (posedge clk) pulse (0:0:0) (1207:1207:1207)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (1069:1069:1069) (1087:1087:1087)) + (IOPATH (posedge clk) pulse (0:0:0) (1207:1207:1207)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (204:204:204) (237:237:237)) + (PORT d[1] (396:396:396) (465:465:465)) + (PORT d[2] (752:752:752) (872:872:872)) + (PORT d[3] (835:835:835) (958:958:958)) + (PORT d[4] (809:809:809) (931:931:931)) + (PORT d[5] (824:824:824) (946:946:946)) + (PORT d[6] (415:415:415) (488:488:488)) + (PORT d[7] (432:432:432) (510:510:510)) + (PORT d[8] (693:693:693) (800:800:800)) + (PORT d[9] (373:373:373) (425:425:425)) + (PORT clk (1025:1025:1025) (1045:1045:1045)) + (PORT aclr (1051:1051:1051) (1056:1056:1056)) + (PORT stall (630:630:630) (606:606:606)) + (IOPATH (posedge aclr) q (152:152:152) (152:152:152)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (104:104:104)) + (HOLD stall (posedge clk) (104:104:104)) + (HOLD aclr (posedge clk) (104:104:104)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (1025:1025:1025) (1045:1045:1045)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1026:1026:1026) (1046:1046:1046)) + (IOPATH (posedge clk) pulse (0:0:0) (1120:1120:1120)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1026:1026:1026) (1046:1046:1046)) + (IOPATH (posedge clk) pulse (0:0:0) (1222:1222:1222)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (1026:1026:1026) (1046:1046:1046)) + (IOPATH (posedge clk) pulse (0:0:0) (1222:1222:1222)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (1024:1024:1024) (1044:1044:1044)) + (PORT ena (729:729:729) (759:759:759)) + (PORT aclr (1025:1025:1025) (1056:1056:1056)) + (IOPATH (posedge clk) q (164:164:164) (166:166:166)) + (IOPATH (posedge aclr) q (184:184:184) (186:186:186)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (25:25:25)) + (SETUP ena (posedge clk) (25:25:25)) + (SETUP aclr (posedge clk) (25:25:25)) + (HOLD d (posedge clk) (90:90:90)) + (HOLD ena (posedge clk) (90:90:90)) + (HOLD aclr (posedge clk) (90:90:90)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (1120:1120:1120) (1226:1226:1226)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (1120:1120:1120) (1226:1226:1226)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (1120:1120:1120) (1226:1226:1226)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (1120:1120:1120) (1226:1226:1226)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (1120:1120:1120) (1226:1226:1226)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (1120:1120:1120) (1226:1226:1226)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (1120:1120:1120) (1226:1226:1226)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (1120:1120:1120) (1226:1226:1226)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (1120:1120:1120) (1226:1226:1226)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (196:196:196) (205:205:205)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (876:876:876) (880:880:880)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (1120:1120:1120) (1226:1226:1226)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (920:920:920) (999:999:999)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (165:165:165) (173:173:173)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (920:920:920) (999:999:999)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (920:920:920) (999:999:999)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (920:920:920) (999:999:999)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (192:192:192) (177:177:177)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (920:920:920) (999:999:999)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (920:920:920) (999:999:999)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (193:193:193)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (920:920:920) (999:999:999)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT datab (142:142:142) (190:190:190)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datab cout (227:227:227) (175:175:175)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (920:920:920) (999:999:999)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (143:143:143) (194:194:194)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH dataa cout (226:226:226) (171:171:171)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + (IOPATH cin cout (34:34:34) (34:34:34)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (920:920:920) (999:999:999)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datad (192:192:192) (239:239:239)) + (IOPATH datad combout (68:68:68) (63:63:63)) + (IOPATH cin combout (187:187:187) (204:204:204)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (879:879:879) (884:884:884)) + (PORT d (37:37:37) (50:50:50)) + (PORT ena (920:920:920) (999:999:999)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~4) + (DELAY + (ABSOLUTE + (PORT dataa (167:167:167) (232:232:232)) + (PORT datab (151:151:151) (207:207:207)) + (PORT datac (286:286:286) (322:322:322)) + (PORT datad (154:154:154) (203:203:203)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~3) + (DELAY + (ABSOLUTE + (PORT dataa (376:376:376) (454:454:454)) + (PORT datad (129:129:129) (167:167:167)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~5) + (DELAY + (ABSOLUTE + (PORT dataa (294:294:294) (340:340:340)) + (PORT datab (112:112:112) (144:144:144)) + (PORT datac (421:421:421) (485:485:485)) + (PORT datad (161:161:161) (187:187:187)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|tx) + (DELAY + (ABSOLUTE + (PORT clk (887:887:887) (891:891:891)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (2554:2554:2554) (2301:2301:2301)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[2\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (1120:1120:1120) (1119:1119:1119)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT asdata (546:546:546) (620:620:620)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT asdata (505:505:505) (561:561:561)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT datab (153:153:153) (209:209:209)) + (PORT datac (517:517:517) (641:641:641)) + (PORT datad (500:500:500) (607:607:607)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT asdata (847:847:847) (959:959:959)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (157:157:157) (208:208:208)) + (PORT datab (168:168:168) (227:227:227)) + (PORT datad (191:191:191) (221:221:221)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TRF) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (853:853:853) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (470:470:470) (545:545:545)) + (PORT datab (115:115:115) (144:144:144)) + (PORT datac (151:151:151) (204:204:204)) + (PORT datad (128:128:128) (170:170:170)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (167:167:167) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (113:113:113) (146:146:146)) + (PORT datab (167:167:167) (226:226:226)) + (PORT datac (123:123:123) (167:167:167)) + (PORT datad (91:91:91) (109:109:109)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_AR) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (853:853:853) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (673:673:673) (799:799:799)) + (PORT datad (532:532:532) (625:625:625)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~2) + (DELAY + (ABSOLUTE + (PORT dataa (454:454:454) (532:532:532)) + (PORT datab (454:454:454) (523:523:523)) + (PORT datad (118:118:118) (156:156:156)) + (IOPATH dataa combout (181:181:181) (193:193:193)) + (IOPATH datab combout (190:190:190) (188:188:188)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~3) + (DELAY + (ABSOLUTE + (PORT dataa (455:455:455) (533:533:533)) + (PORT datab (129:129:129) (177:177:177)) + (PORT datad (90:90:90) (107:107:107)) + (IOPATH dataa combout (186:186:186) (180:180:180)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~4) + (DELAY + (ABSOLUTE + (PORT datac (378:378:378) (457:457:457)) + (PORT datad (90:90:90) (107:107:107)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (684:684:684) (807:807:807)) + (PORT datac (475:475:475) (553:553:553)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~17) + (DELAY + (ABSOLUTE + (PORT datab (108:108:108) (137:137:137)) + (PORT datad (229:229:229) (277:277:277)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_PRE) + (DELAY + (ABSOLUTE + (PORT clk (873:873:873) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (857:857:857) (863:863:863)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|WideOr5) + (DELAY + (ABSOLUTE + (PORT dataa (669:669:669) (795:795:795)) + (PORT datab (546:546:546) (649:649:649)) + (PORT datad (652:652:652) (769:769:769)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (338:338:338) (406:406:406)) + (PORT datad (476:476:476) (554:554:554)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (451:451:451) (529:529:529)) + (PORT datab (129:129:129) (177:177:177)) + (PORT datac (440:440:440) (503:503:503)) + (PORT datad (117:117:117) (154:154:154)) + (IOPATH dataa combout (170:170:170) (165:165:165)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (201:201:201) (257:257:257)) + (PORT datab (131:131:131) (179:179:179)) + (PORT datac (437:437:437) (501:501:501)) + (PORT datad (91:91:91) (109:109:109)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT datac (378:378:378) (457:457:457)) + (PORT datad (89:89:89) (107:107:107)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (190:190:190) (227:227:227)) + (PORT datab (156:156:156) (209:209:209)) + (PORT datac (153:153:153) (208:208:208)) + (PORT datad (212:212:212) (262:262:262)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT datac (510:510:510) (632:632:632)) + (PORT datad (507:507:507) (615:615:615)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT dataa (111:111:111) (145:145:145)) + (PORT datac (134:134:134) (178:178:178)) + (PORT datad (212:212:212) (263:263:263)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~1) + (DELAY + (ABSOLUTE + (PORT dataa (103:103:103) (134:134:134)) + (PORT datab (199:199:199) (255:255:255)) + (PORT datac (426:426:426) (502:502:502)) + (PORT datad (184:184:184) (228:228:228)) + (IOPATH dataa combout (172:172:172) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~2) + (DELAY + (ABSOLUTE + (PORT dataa (103:103:103) (134:134:134)) + (PORT datac (378:378:378) (457:457:457)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datac combout (119:119:119) (124:124:124)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (432:432:432)) + (PORT datab (349:349:349) (410:410:410)) + (PORT datac (371:371:371) (451:451:451)) + (PORT datad (364:364:364) (438:438:438)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector21\~1) + (DELAY + (ABSOLUTE + (PORT dataa (106:106:106) (138:138:138)) + (PORT datab (401:401:401) (487:487:487)) + (PORT datac (95:95:95) (119:119:119)) + (PORT datad (211:211:211) (262:262:262)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (167:167:167) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_addr\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~6) + (DELAY + (ABSOLUTE + (PORT datad (233:233:233) (282:282:282)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[3\]\~3) + (DELAY + (ABSOLUTE + (PORT datac (485:485:485) (558:558:558)) + (PORT datad (230:230:230) (278:278:278)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (873:873:873) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (857:857:857) (863:863:863)) + (PORT ena (421:421:421) (449:449:449)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~5) + (DELAY + (ABSOLUTE + (PORT datab (153:153:153) (206:206:206)) + (PORT datad (232:232:232) (280:280:280)) + (IOPATH datab combout (166:166:166) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (873:873:873) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (857:857:857) (863:863:863)) + (PORT ena (421:421:421) (449:449:449)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~4) + (DELAY + (ABSOLUTE + (PORT dataa (214:214:214) (274:274:274)) + (PORT datab (143:143:143) (195:195:195)) + (PORT datad (228:228:228) (276:276:276)) + (IOPATH dataa combout (158:158:158) (173:173:173)) + (IOPATH datab combout (160:160:160) (176:176:176)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (873:873:873) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (857:857:857) (863:863:863)) + (PORT ena (421:421:421) (449:449:449)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + (HOLD ena (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~15) + (DELAY + (ABSOLUTE + (PORT dataa (138:138:138) (191:191:191)) + (PORT datab (154:154:154) (207:207:207)) + (PORT datac (127:127:127) (173:173:173)) + (PORT datad (120:120:120) (159:159:159)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (204:204:204) (249:249:249)) + (PORT datab (139:139:139) (190:190:190)) + (PORT datac (151:151:151) (205:205:205)) + (PORT datad (450:450:450) (520:520:520)) + (IOPATH dataa combout (159:159:159) (163:163:163)) + (IOPATH datab combout (161:161:161) (167:167:167)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_MRS) + (DELAY + (ABSOLUTE + (PORT clk (870:870:870) (875:875:875)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (853:853:853) (857:857:857)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_ba\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT asdata (655:655:655) (741:741:741)) + (PORT clrn (858:858:858) (862:862:862)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (463:463:463) (545:545:545)) + (PORT datab (153:153:153) (209:209:209)) + (PORT datad (499:499:499) (606:606:606)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector9\~1) + (DELAY + (ABSOLUTE + (PORT dataa (537:537:537) (660:660:660)) + (PORT datab (531:531:531) (625:625:625)) + (PORT datac (473:473:473) (567:567:567)) + (PORT datad (188:188:188) (218:218:218)) + (IOPATH dataa combout (186:186:186) (175:175:175)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (208:208:208) (256:256:256)) + (PORT datab (175:175:175) (236:236:236)) + (PORT datac (194:194:194) (238:238:238)) + (PORT datad (175:175:175) (197:197:197)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~2) + (DELAY + (ABSOLUTE + (PORT dataa (105:105:105) (137:137:137)) + (PORT datab (141:141:141) (194:194:194)) + (PORT datac (211:211:211) (268:268:268)) + (PORT datad (103:103:103) (120:120:120)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_ba\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector22\~0) + (DELAY + (ABSOLUTE + (PORT dataa (533:533:533) (655:655:655)) + (PORT datab (532:532:532) (627:627:627)) + (PORT datac (432:432:432) (503:503:503)) + (PORT datad (507:507:507) (614:614:614)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|WideOr7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (164:164:164) (223:223:223)) + (PORT datab (239:239:239) (298:298:298)) + (PORT datac (192:192:192) (244:244:244)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (125:125:125)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector11\~0) + (DELAY + (ABSOLUTE + (PORT dataa (113:113:113) (147:147:147)) + (PORT datab (113:113:113) (145:145:145)) + (PORT datad (211:211:211) (262:262:262)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (190:190:190) (195:195:195)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_addr\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (145:145:145) (198:198:198)) + (PORT datab (135:135:135) (187:187:187)) + (PORT datad (1044:1044:1044) (1206:1206:1206)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (167:167:167) (158:158:158)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_ACTIVE) + (DELAY + (ABSOLUTE + (PORT clk (877:877:877) (881:881:881)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (861:861:861) (864:864:864)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (326:326:326) (392:392:392)) + (PORT datab (485:485:485) (567:567:567)) + (PORT datac (155:155:155) (210:210:210)) + (PORT datad (141:141:141) (185:185:185)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (160:160:160) (156:156:156)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector10\~1) + (DELAY + (ABSOLUTE + (PORT dataa (208:208:208) (255:255:255)) + (PORT datab (187:187:187) (224:224:224)) + (PORT datac (158:158:158) (215:215:215)) + (PORT datad (92:92:92) (110:110:110)) + (IOPATH dataa combout (170:170:170) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (124:124:124)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_addr\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (874:874:874) (879:879:879)) + (PORT d (37:37:37) (50:50:50)) + (PORT clrn (858:858:858) (861:861:861)) + (IOPATH (posedge clk) q (105:105:105) (105:105:105)) + (IOPATH (negedge clrn) q (110:110:110) (110:110:110)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (84:84:84)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector12\~0) + (DELAY + (ABSOLUTE + (PORT dataa (130:130:130) (181:181:181)) + (PORT datab (152:152:152) (208:208:208)) + (PORT datac (316:316:316) (373:373:373)) + (PORT datad (502:502:502) (609:609:609)) + (IOPATH dataa combout (158:158:158) (157:157:157)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (119:119:119) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector12\~1) + (DELAY + (ABSOLUTE + (PORT dataa (534:534:534) (657:657:657)) + (PORT datab (486:486:486) (586:586:586)) + (PORT datac (294:294:294) (351:351:351)) + (PORT datad (91:91:91) (109:109:109)) + (IOPATH dataa combout (172:172:172) (163:163:163)) + (IOPATH datab combout (168:168:168) (167:167:167)) + (IOPATH datac combout (120:120:120) (125:125:125)) + (IOPATH datad combout (68:68:68) (63:63:63)) + ) + ) + ) +) diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_modelsim.xrf b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_modelsim.xrf new file mode 100644 index 0000000..4aec183 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_modelsim.xrf @@ -0,0 +1,1341 @@ +vendor_name = ModelSim +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/fifo_read.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/sdram/sdram_write.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/sdram/sdram_top.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/sdram/sdram_read.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/sdram/sdram_init.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/sdram/sdram_ctrl.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/sdram/sdram_arbit.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/sdram/sdram_a_ref.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/sdram/fifo_ctrl.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data.qip +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/ip_core/fifo_data/fifo_data.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.qip +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/ip_core/clk_gen/clk_gen.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/uart_tx.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/uart_sdram.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/rtl/uart_rx.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo.qip +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/ip_core/read_fifo/read_fifo.v +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/uart_sdram.cbx.xml +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/altpll.tdf +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/aglobal130.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/stratix_pll.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/stratixii_pll.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/cycloneii_pll.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/cbx.lst +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/clk_gen_altpll.v +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/dcfifo.tdf +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_counter.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_add_sub.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/altdpram.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/a_graycounter.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/a_fefifo.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/a_gray2bin.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/dffpipe.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/alt_sync_fifo.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_compare.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/altsyncram_fifo.inc +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/dcfifo_3fk1.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/a_gray2bin_7ib.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/a_graycounter_677.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/a_graycounter_2lc.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/altsyncram_em31.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/dffpipe_pe9.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/alt_synch_pipe_vd8.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/dffpipe_qe9.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/alt_synch_pipe_0e8.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/dffpipe_re9.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/cmpr_c66.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/cmpr_b66.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/mux_j28.tdf +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/scfifo.tdf +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/a_regfifo.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/a_dpfifo.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/a_i2fifo.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/a_fffifo.inc +source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/a_f2fifo.inc +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/scfifo_un21.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/a_dpfifo_5u21.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/a_fefifo_jaf.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/cntr_op7.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/dpram_d811.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/altsyncram_c3k1.tdf +source_file = 1, E:/simiao/lc/A415/08_uart_sdram/uart_sdram/project/db/cntr_cpb.tdf +design_name = uart_sdram +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1|ram_block2a0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3], uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[3] , uart_tx_inst|baud_cnt[3], uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[4] , uart_tx_inst|baud_cnt[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~14, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~16, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[3]~16, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[5]~20, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[3]~16, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[4]~18, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[3]~19 , uart_tx_inst|baud_cnt[3]~19, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[4]~21 , uart_tx_inst|baud_cnt[4]~21, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~12, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~26, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita1, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita2, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita3, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita4, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita5, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita6, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita7, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita8, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita9, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[1] , fifo_read_inst|baud_cnt[1], uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[4] , fifo_read_inst|baud_cnt[4], uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[9] , fifo_read_inst|baud_cnt[9], uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[11] , fifo_read_inst|baud_cnt[11], uart_sdram, 1 +instance = comp, \fifo_read_inst|Add2~4 , fifo_read_inst|Add2~4, uart_sdram, 1 +instance = comp, \data_num[0] , data_num[0], uart_sdram, 1 +instance = comp, \data_num[2] , data_num[2], uart_sdram, 1 +instance = comp, \data_num[1] , data_num[1], uart_sdram, 1 +instance = comp, \data_num[3] , data_num[3], uart_sdram, 1 +instance = comp, \data_num[4] , data_num[4], uart_sdram, 1 +instance = comp, \data_num[5] , data_num[5], uart_sdram, 1 +instance = comp, \data_num[6] , data_num[6], uart_sdram, 1 +instance = comp, \data_num[7] , data_num[7], uart_sdram, 1 +instance = comp, \data_num[8] , data_num[8], uart_sdram, 1 +instance = comp, \data_num[9] , data_num[9], uart_sdram, 1 +instance = comp, \data_num[10] , data_num[10], uart_sdram, 1 +instance = comp, \data_num[11] , data_num[11], uart_sdram, 1 +instance = comp, \data_num[12] , data_num[12], uart_sdram, 1 +instance = comp, \data_num[13] , data_num[13], uart_sdram, 1 +instance = comp, \data_num[14] , data_num[14], uart_sdram, 1 +instance = comp, \data_num[15] , data_num[15], uart_sdram, 1 +instance = comp, \data_num[16] , data_num[16], uart_sdram, 1 +instance = comp, \data_num[17] , data_num[17], uart_sdram, 1 +instance = comp, \data_num[18] , data_num[18], uart_sdram, 1 +instance = comp, \data_num[19] , data_num[19], uart_sdram, 1 +instance = comp, \data_num[20] , data_num[20], uart_sdram, 1 +instance = comp, \data_num[21] , data_num[21], uart_sdram, 1 +instance = comp, \data_num[22] , data_num[22], uart_sdram, 1 +instance = comp, \data_num[23] , data_num[23], uart_sdram, 1 +instance = comp, \Add1~0 , Add1~0, uart_sdram, 1 +instance = comp, \Add1~2 , Add1~2, uart_sdram, 1 +instance = comp, \Add1~4 , Add1~4, uart_sdram, 1 +instance = comp, \Add1~6 , Add1~6, uart_sdram, 1 +instance = comp, \Add1~8 , Add1~8, uart_sdram, 1 +instance = comp, \Add1~10 , Add1~10, uart_sdram, 1 +instance = comp, \Add1~12 , Add1~12, uart_sdram, 1 +instance = comp, \Add1~14 , Add1~14, uart_sdram, 1 +instance = comp, \Add1~16 , Add1~16, uart_sdram, 1 +instance = comp, \Add1~18 , Add1~18, uart_sdram, 1 +instance = comp, \Add1~20 , Add1~20, uart_sdram, 1 +instance = comp, \Add1~22 , Add1~22, uart_sdram, 1 +instance = comp, \Add1~24 , Add1~24, uart_sdram, 1 +instance = comp, \Add1~26 , Add1~26, uart_sdram, 1 +instance = comp, \Add1~28 , Add1~28, uart_sdram, 1 +instance = comp, \Add1~30 , Add1~30, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[1]~15 , fifo_read_inst|baud_cnt[1]~15, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[4]~21 , fifo_read_inst|baud_cnt[4]~21, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[9]~31 , fifo_read_inst|baud_cnt[9]~31, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[11]~35 , fifo_read_inst|baud_cnt[11]~35, uart_sdram, 1 +instance = comp, \data_num[0]~24 , data_num[0]~24, uart_sdram, 1 +instance = comp, \data_num[1]~26 , data_num[1]~26, uart_sdram, 1 +instance = comp, \data_num[2]~28 , data_num[2]~28, uart_sdram, 1 +instance = comp, \data_num[3]~30 , data_num[3]~30, uart_sdram, 1 +instance = comp, \data_num[4]~32 , data_num[4]~32, uart_sdram, 1 +instance = comp, \data_num[5]~34 , data_num[5]~34, uart_sdram, 1 +instance = comp, \data_num[6]~36 , data_num[6]~36, uart_sdram, 1 +instance = comp, \data_num[7]~38 , data_num[7]~38, uart_sdram, 1 +instance = comp, \data_num[8]~40 , data_num[8]~40, uart_sdram, 1 +instance = comp, \data_num[9]~42 , data_num[9]~42, uart_sdram, 1 +instance = comp, \data_num[10]~44 , data_num[10]~44, uart_sdram, 1 +instance = comp, \data_num[11]~46 , data_num[11]~46, uart_sdram, 1 +instance = comp, \data_num[12]~48 , data_num[12]~48, uart_sdram, 1 +instance = comp, \data_num[13]~50 , data_num[13]~50, uart_sdram, 1 +instance = comp, \data_num[14]~52 , data_num[14]~52, uart_sdram, 1 +instance = comp, \data_num[15]~54 , data_num[15]~54, uart_sdram, 1 +instance = comp, \data_num[16]~56 , data_num[16]~56, uart_sdram, 1 +instance = comp, \data_num[17]~58 , data_num[17]~58, uart_sdram, 1 +instance = comp, \data_num[18]~60 , data_num[18]~60, uart_sdram, 1 +instance = comp, \data_num[19]~62 , data_num[19]~62, uart_sdram, 1 +instance = comp, \data_num[20]~64 , data_num[20]~64, uart_sdram, 1 +instance = comp, \data_num[21]~66 , data_num[21]~66, uart_sdram, 1 +instance = comp, \data_num[22]~68 , data_num[22]~68, uart_sdram, 1 +instance = comp, \data_num[23]~70 , data_num[23]~70, uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[1] , fifo_read_inst|cnt_read[1], uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[3] , fifo_read_inst|cnt_read[3], uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[0] , fifo_read_inst|cnt_read[0], uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[2] , fifo_read_inst|cnt_read[2], uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[4] , fifo_read_inst|cnt_read[4], uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[5] , fifo_read_inst|cnt_read[5], uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[6] , fifo_read_inst|cnt_read[6], uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[7] , fifo_read_inst|cnt_read[7], uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[8] , fifo_read_inst|cnt_read[8], uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[9] , fifo_read_inst|cnt_read[9], uart_sdram, 1 +instance = comp, \uart_rx_inst|Add1~0 , uart_rx_inst|Add1~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|Add1~4 , uart_rx_inst|Add1~4, uart_sdram, 1 +instance = comp, \uart_rx_inst|Add1~6 , uart_rx_inst|Add1~6, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[4] , uart_rx_inst|baud_cnt[4], uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[0]~10 , fifo_read_inst|cnt_read[0]~10, uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[1]~12 , fifo_read_inst|cnt_read[1]~12, uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[2]~14 , fifo_read_inst|cnt_read[2]~14, uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[3]~16 , fifo_read_inst|cnt_read[3]~16, uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[4]~18 , fifo_read_inst|cnt_read[4]~18, uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[5]~20 , fifo_read_inst|cnt_read[5]~20, uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[6]~22 , fifo_read_inst|cnt_read[6]~22, uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[7]~24 , fifo_read_inst|cnt_read[7]~24, uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[8]~26 , fifo_read_inst|cnt_read[8]~26, uart_sdram, 1 +instance = comp, \fifo_read_inst|cnt_read[9]~28 , fifo_read_inst|cnt_read[9]~28, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[4]~21 , uart_rx_inst|baud_cnt[4]~21, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|bit_cnt[0] , uart_tx_inst|bit_cnt[0], uart_sdram, 1 +instance = comp, \uart_tx_inst|Mux0~0 , uart_tx_inst|Mux0~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|Mux0~1 , uart_tx_inst|Mux0~1, uart_sdram, 1 +instance = comp, \uart_tx_inst|tx~0 , uart_tx_inst|tx~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|tx~1 , uart_tx_inst|tx~1, uart_sdram, 1 +instance = comp, \uart_tx_inst|tx~2 , uart_tx_inst|tx~2, uart_sdram, 1 +instance = comp, \uart_tx_inst|bit_cnt[3] , uart_tx_inst|bit_cnt[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|Add1~0 , uart_tx_inst|Add1~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|Add1~1 , uart_tx_inst|Add1~1, uart_sdram, 1 +instance = comp, \uart_tx_inst|bit_cnt[3]~4 , uart_tx_inst|bit_cnt[3]~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0 , sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1 , sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TMRD, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.IDLE~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[13], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[3], uart_sdram, 1 +instance = comp, \uart_tx_inst|Equal1~3 , uart_tx_inst|Equal1~3, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[9], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[8], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[7], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[6], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[5], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~1, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[4], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[3], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[2], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~2, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~3, uart_sdram, 1 +instance = comp, \fifo_read_inst|bit_cnt[2] , fifo_read_inst|bit_cnt[2], uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal1~0 , fifo_read_inst|Equal1~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal1~1 , fifo_read_inst|Equal1~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor9, uart_sdram, 1 +instance = comp, \cnt_wait[15] , cnt_wait[15], uart_sdram, 1 +instance = comp, \cnt_wait[14] , cnt_wait[14], uart_sdram, 1 +instance = comp, \cnt_wait[13] , cnt_wait[13], uart_sdram, 1 +instance = comp, \cnt_wait[12] , cnt_wait[12], uart_sdram, 1 +instance = comp, \Equal0~0 , Equal0~0, uart_sdram, 1 +instance = comp, \cnt_wait[9] , cnt_wait[9], uart_sdram, 1 +instance = comp, \cnt_wait[11] , cnt_wait[11], uart_sdram, 1 +instance = comp, \cnt_wait[10] , cnt_wait[10], uart_sdram, 1 +instance = comp, \cnt_wait[8] , cnt_wait[8], uart_sdram, 1 +instance = comp, \Equal0~1 , Equal0~1, uart_sdram, 1 +instance = comp, \cnt_wait[7] , cnt_wait[7], uart_sdram, 1 +instance = comp, \cnt_wait[6] , cnt_wait[6], uart_sdram, 1 +instance = comp, \cnt_wait[5] , cnt_wait[5], uart_sdram, 1 +instance = comp, \cnt_wait[4] , cnt_wait[4], uart_sdram, 1 +instance = comp, \Equal0~2 , Equal0~2, uart_sdram, 1 +instance = comp, \cnt_wait[3] , cnt_wait[3], uart_sdram, 1 +instance = comp, \cnt_wait[2] , cnt_wait[2], uart_sdram, 1 +instance = comp, \cnt_wait[1] , cnt_wait[1], uart_sdram, 1 +instance = comp, \cnt_wait[0] , cnt_wait[0], uart_sdram, 1 +instance = comp, \Equal0~3 , Equal0~3, uart_sdram, 1 +instance = comp, \Equal0~4 , Equal0~4, uart_sdram, 1 +instance = comp, \read_valid~0 , read_valid~0, uart_sdram, 1 +instance = comp, \read_valid~1 , read_valid~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector4~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux_reg, uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal1~2 , fifo_read_inst|Equal1~2, uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal5~1 , fifo_read_inst|Equal5~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7, uart_sdram, 1 +instance = comp, \Equal1~0 , Equal1~0, uart_sdram, 1 +instance = comp, \Equal1~1 , Equal1~1, uart_sdram, 1 +instance = comp, \Equal1~2 , Equal1~2, uart_sdram, 1 +instance = comp, \Equal1~3 , Equal1~3, uart_sdram, 1 +instance = comp, \Equal1~4 , Equal1~4, uart_sdram, 1 +instance = comp, \Equal1~5 , Equal1~5, uart_sdram, 1 +instance = comp, \Equal1~6 , Equal1~6, uart_sdram, 1 +instance = comp, \cnt_wait[8]~0 , cnt_wait[8]~0, uart_sdram, 1 +instance = comp, \cnt_wait[15]~1 , cnt_wait[15]~1, uart_sdram, 1 +instance = comp, \cnt_wait[15]~2 , cnt_wait[15]~2, uart_sdram, 1 +instance = comp, \cnt_wait[14]~3 , cnt_wait[14]~3, uart_sdram, 1 +instance = comp, \cnt_wait[13]~4 , cnt_wait[13]~4, uart_sdram, 1 +instance = comp, \cnt_wait[12]~5 , cnt_wait[12]~5, uart_sdram, 1 +instance = comp, \cnt_wait[9]~6 , cnt_wait[9]~6, uart_sdram, 1 +instance = comp, \cnt_wait[11]~7 , cnt_wait[11]~7, uart_sdram, 1 +instance = comp, \cnt_wait[10]~8 , cnt_wait[10]~8, uart_sdram, 1 +instance = comp, \cnt_wait[8]~9 , cnt_wait[8]~9, uart_sdram, 1 +instance = comp, \cnt_wait[7]~10 , cnt_wait[7]~10, uart_sdram, 1 +instance = comp, \cnt_wait[6]~11 , cnt_wait[6]~11, uart_sdram, 1 +instance = comp, \cnt_wait[5]~12 , cnt_wait[5]~12, uart_sdram, 1 +instance = comp, \cnt_wait[4]~13 , cnt_wait[4]~13, uart_sdram, 1 +instance = comp, \cnt_wait[3]~14 , cnt_wait[3]~14, uart_sdram, 1 +instance = comp, \cnt_wait[2]~15 , cnt_wait[2]~15, uart_sdram, 1 +instance = comp, \cnt_wait[1]~16 , cnt_wait[1]~16, uart_sdram, 1 +instance = comp, \cnt_wait[0]~17 , cnt_wait[0]~17, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb|data_wire[2]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_lsb_mux|result_node[0]~7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6, uart_sdram, 1 +instance = comp, \fifo_read_inst|rd_flag , fifo_read_inst|rd_flag, uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal4~2 , fifo_read_inst|Equal4~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|cntr_cout[0]~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|bit_cnt[0] , uart_rx_inst|bit_cnt[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0], uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal2~0 , fifo_read_inst|Equal2~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal2~1 , fifo_read_inst|Equal2~1, uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal2~2 , fifo_read_inst|Equal2~2, uart_sdram, 1 +instance = comp, \fifo_read_inst|rd_flag~0 , fifo_read_inst|rd_flag~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|bit_cnt~1 , uart_rx_inst|bit_cnt~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~13, uart_sdram, 1 +instance = comp, \uart_rx_inst|work_en , uart_rx_inst|work_en, uart_sdram, 1 +instance = comp, \uart_rx_inst|start_nedge , uart_rx_inst|start_nedge, uart_sdram, 1 +instance = comp, \uart_rx_inst|work_en~0 , uart_rx_inst|work_en~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|always3~0 , uart_rx_inst|always3~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|bit_cnt[0]~5 , uart_tx_inst|bit_cnt[0]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[7]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[7]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[5]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[3]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[0]~feeder, uart_sdram, 1 +instance = comp, \tx~output , tx~output, uart_sdram, 1 +instance = comp, \sdram_clk~output , sdram_clk~output, uart_sdram, 1 +instance = comp, \sdram_cke~output , sdram_cke~output, uart_sdram, 1 +instance = comp, \sdram_cs_n~output , sdram_cs_n~output, uart_sdram, 1 +instance = comp, \sdram_cas_n~output , sdram_cas_n~output, uart_sdram, 1 +instance = comp, \sdram_ras_n~output , sdram_ras_n~output, uart_sdram, 1 +instance = comp, \sdram_we_n~output , sdram_we_n~output, uart_sdram, 1 +instance = comp, \sdram_ba[0]~output , sdram_ba[0]~output, uart_sdram, 1 +instance = comp, \sdram_ba[1]~output , sdram_ba[1]~output, uart_sdram, 1 +instance = comp, \sdram_addr[0]~output , sdram_addr[0]~output, uart_sdram, 1 +instance = comp, \sdram_addr[1]~output , sdram_addr[1]~output, uart_sdram, 1 +instance = comp, \sdram_addr[2]~output , sdram_addr[2]~output, uart_sdram, 1 +instance = comp, \sdram_addr[3]~output , sdram_addr[3]~output, uart_sdram, 1 +instance = comp, \sdram_addr[4]~output , sdram_addr[4]~output, uart_sdram, 1 +instance = comp, \sdram_addr[5]~output , sdram_addr[5]~output, uart_sdram, 1 +instance = comp, \sdram_addr[6]~output , sdram_addr[6]~output, uart_sdram, 1 +instance = comp, \sdram_addr[7]~output , sdram_addr[7]~output, uart_sdram, 1 +instance = comp, \sdram_addr[8]~output , sdram_addr[8]~output, uart_sdram, 1 +instance = comp, \sdram_addr[9]~output , sdram_addr[9]~output, uart_sdram, 1 +instance = comp, \sdram_addr[10]~output , sdram_addr[10]~output, uart_sdram, 1 +instance = comp, \sdram_addr[11]~output , sdram_addr[11]~output, uart_sdram, 1 +instance = comp, \sdram_addr[12]~output , sdram_addr[12]~output, uart_sdram, 1 +instance = comp, \sdram_dqm[0]~output , sdram_dqm[0]~output, uart_sdram, 1 +instance = comp, \sdram_dqm[1]~output , sdram_dqm[1]~output, uart_sdram, 1 +instance = comp, \sdram_dq[0]~output , sdram_dq[0]~output, uart_sdram, 1 +instance = comp, \sdram_dq[1]~output , sdram_dq[1]~output, uart_sdram, 1 +instance = comp, \sdram_dq[2]~output , sdram_dq[2]~output, uart_sdram, 1 +instance = comp, \sdram_dq[3]~output , sdram_dq[3]~output, uart_sdram, 1 +instance = comp, \sdram_dq[4]~output , sdram_dq[4]~output, uart_sdram, 1 +instance = comp, \sdram_dq[5]~output , sdram_dq[5]~output, uart_sdram, 1 +instance = comp, \sdram_dq[6]~output , sdram_dq[6]~output, uart_sdram, 1 +instance = comp, \sdram_dq[7]~output , sdram_dq[7]~output, uart_sdram, 1 +instance = comp, \sdram_dq[8]~output , sdram_dq[8]~output, uart_sdram, 1 +instance = comp, \sdram_dq[9]~output , sdram_dq[9]~output, uart_sdram, 1 +instance = comp, \sdram_dq[10]~output , sdram_dq[10]~output, uart_sdram, 1 +instance = comp, \sdram_dq[11]~output , sdram_dq[11]~output, uart_sdram, 1 +instance = comp, \sdram_dq[12]~output , sdram_dq[12]~output, uart_sdram, 1 +instance = comp, \sdram_dq[13]~output , sdram_dq[13]~output, uart_sdram, 1 +instance = comp, \sdram_dq[14]~output , sdram_dq[14]~output, uart_sdram, 1 +instance = comp, \sdram_dq[15]~output , sdram_dq[15]~output, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[0]~13 , uart_rx_inst|baud_cnt[0]~13, uart_sdram, 1 +instance = comp, \sys_clk~input , sys_clk~input, uart_sdram, 1 +instance = comp, \clk_gen_inst|altpll_component|auto_generated|pll1 , clk_gen_inst|altpll_component|auto_generated|pll1, uart_sdram, 1 +instance = comp, \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder , clk_gen_inst|altpll_component|auto_generated|pll_lock_sync~feeder, uart_sdram, 1 +instance = comp, \sys_rst_n~input , sys_rst_n~input, uart_sdram, 1 +instance = comp, \clk_gen_inst|altpll_component|auto_generated|pll_lock_sync , clk_gen_inst|altpll_component|auto_generated|pll_lock_sync, uart_sdram, 1 +instance = comp, \rst_n~0 , rst_n~0, uart_sdram, 1 +instance = comp, \rst_n~0clkctrl , rst_n~0clkctrl, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[2]~17 , uart_rx_inst|baud_cnt[2]~17, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[3]~19 , uart_rx_inst|baud_cnt[3]~19, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[3] , uart_rx_inst|baud_cnt[3], uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[5]~23 , uart_rx_inst|baud_cnt[5]~23, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[5] , uart_rx_inst|baud_cnt[5], uart_sdram, 1 +instance = comp, \uart_rx_inst|Equal1~1 , uart_rx_inst|Equal1~1, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[6]~25 , uart_rx_inst|baud_cnt[6]~25, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[6] , uart_rx_inst|baud_cnt[6], uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[7]~27 , uart_rx_inst|baud_cnt[7]~27, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[7] , uart_rx_inst|baud_cnt[7], uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[8]~29 , uart_rx_inst|baud_cnt[8]~29, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[8] , uart_rx_inst|baud_cnt[8], uart_sdram, 1 +instance = comp, \uart_rx_inst|Equal1~0 , uart_rx_inst|Equal1~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[9]~31 , uart_rx_inst|baud_cnt[9]~31, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[9] , uart_rx_inst|baud_cnt[9], uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[10]~33 , uart_rx_inst|baud_cnt[10]~33, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[11]~35 , uart_rx_inst|baud_cnt[11]~35, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[11] , uart_rx_inst|baud_cnt[11], uart_sdram, 1 +instance = comp, \uart_rx_inst|Equal1~2 , uart_rx_inst|Equal1~2, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[10] , uart_rx_inst|baud_cnt[10], uart_sdram, 1 +instance = comp, \uart_rx_inst|Equal1~3 , uart_rx_inst|Equal1~3, uart_sdram, 1 +instance = comp, \uart_rx_inst|always5~0 , uart_rx_inst|always5~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[0] , uart_rx_inst|baud_cnt[0], uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[1]~15 , uart_rx_inst|baud_cnt[1]~15, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[1] , uart_rx_inst|baud_cnt[1], uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[2] , uart_rx_inst|baud_cnt[2], uart_sdram, 1 +instance = comp, \uart_rx_inst|Equal2~0 , uart_rx_inst|Equal2~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[12]~37 , uart_rx_inst|baud_cnt[12]~37, uart_sdram, 1 +instance = comp, \uart_rx_inst|baud_cnt[12] , uart_rx_inst|baud_cnt[12], uart_sdram, 1 +instance = comp, \uart_rx_inst|Equal2~1 , uart_rx_inst|Equal2~1, uart_sdram, 1 +instance = comp, \uart_rx_inst|Equal2~2 , uart_rx_inst|Equal2~2, uart_sdram, 1 +instance = comp, \uart_rx_inst|bit_flag , uart_rx_inst|bit_flag, uart_sdram, 1 +instance = comp, \uart_rx_inst|Add1~2 , uart_rx_inst|Add1~2, uart_sdram, 1 +instance = comp, \uart_rx_inst|bit_cnt[2] , uart_rx_inst|bit_cnt[2], uart_sdram, 1 +instance = comp, \uart_rx_inst|bit_cnt[1] , uart_rx_inst|bit_cnt[1], uart_sdram, 1 +instance = comp, \uart_rx_inst|always4~0 , uart_rx_inst|always4~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|always4~1 , uart_rx_inst|always4~1, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_flag , uart_rx_inst|rx_flag, uart_sdram, 1 +instance = comp, \uart_rx_inst|po_flag , uart_rx_inst|po_flag, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~10, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0]~10, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6]~22, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrptr_g[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp|dffpipe13|dffe14a[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~10, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_dgwp_gray2bin|xor6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_bwp|dffe12a[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~12, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~14, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|LessThan2~0 , sdram_top_inst|fifo_ctrl_inst|LessThan2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|LessThan2~1 , sdram_top_inst|fifo_ctrl_inst|LessThan2~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g_gray2bin|xor8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rs_brp|dffe12a[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|op_1~18, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0 , sdram_top_inst|fifo_ctrl_inst|sdram_wr_req~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|sdram_wr_req , sdram_top_inst|fifo_ctrl_inst|sdram_wr_req, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~7, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0]~10, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|rd_en, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1]~12, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2]~14, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5]~20, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6]~22, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7]~24, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8]~26, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9]~28, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_CL, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector3~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_DATA, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_PRE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector4~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRP, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trp_end~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_END, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector0~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_IDLE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state~16, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_ACTIVE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_TRCD, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|trcd_end~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_state.RD_READ, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|tread_end~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector5~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|cnt_clk[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_wrreq~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a10, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|sub_parity10a[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|parity9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|_~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g1p|counter8a8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_mux|result_node[0]~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_msb_aeb, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdempty_eq_comp_lsb|data_wire[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|delayed_wrptr_g[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_mux|result_node[0]~7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdemp_eq_comp_lsb_aeb, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_en_dly , fifo_read_inst|read_en_dly, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_wreq, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_comb_bita0, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[0], uart_sdram, 1 +instance = comp, \fifo_read_inst|Add2~0 , fifo_read_inst|Add2~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|bit_cnt[0] , fifo_read_inst|bit_cnt[0], uart_sdram, 1 +instance = comp, \fifo_read_inst|Add2~2 , fifo_read_inst|Add2~2, uart_sdram, 1 +instance = comp, \fifo_read_inst|Add2~6 , fifo_read_inst|Add2~6, uart_sdram, 1 +instance = comp, \fifo_read_inst|bit_cnt~0 , fifo_read_inst|bit_cnt~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|bit_cnt[3] , fifo_read_inst|bit_cnt[3], uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[0]~13 , fifo_read_inst|baud_cnt[0]~13, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[5]~23 , fifo_read_inst|baud_cnt[5]~23, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[6]~25 , fifo_read_inst|baud_cnt[6]~25, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[6] , fifo_read_inst|baud_cnt[6], uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[7]~27 , fifo_read_inst|baud_cnt[7]~27, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[7] , fifo_read_inst|baud_cnt[7], uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[8]~29 , fifo_read_inst|baud_cnt[8]~29, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[8] , fifo_read_inst|baud_cnt[8], uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal4~0 , fifo_read_inst|Equal4~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[3]~19 , fifo_read_inst|baud_cnt[3]~19, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[3] , fifo_read_inst|baud_cnt[3], uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal4~1 , fifo_read_inst|Equal4~1, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[10]~33 , fifo_read_inst|baud_cnt[10]~33, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[10] , fifo_read_inst|baud_cnt[10], uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[12]~37 , fifo_read_inst|baud_cnt[12]~37, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[12] , fifo_read_inst|baud_cnt[12], uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal4~3 , fifo_read_inst|Equal4~3, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[0] , fifo_read_inst|baud_cnt[0], uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[2]~17 , fifo_read_inst|baud_cnt[2]~17, uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[2] , fifo_read_inst|baud_cnt[2], uart_sdram, 1 +instance = comp, \fifo_read_inst|baud_cnt[5] , fifo_read_inst|baud_cnt[5], uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal5~0 , fifo_read_inst|Equal5~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|Equal5~2 , fifo_read_inst|Equal5~2, uart_sdram, 1 +instance = comp, \fifo_read_inst|bit_flag , fifo_read_inst|bit_flag, uart_sdram, 1 +instance = comp, \fifo_read_inst|bit_cnt~1 , fifo_read_inst|bit_cnt~1, uart_sdram, 1 +instance = comp, \fifo_read_inst|bit_cnt[1] , fifo_read_inst|bit_cnt[1], uart_sdram, 1 +instance = comp, \fifo_read_inst|always5~0 , fifo_read_inst|always5~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|always5~1 , fifo_read_inst|always5~1, uart_sdram, 1 +instance = comp, \fifo_read_inst|rd_en , fifo_read_inst|rd_en, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~1, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty~2, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_non_empty, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full~4, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|b_full, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|_~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw|counter_reg_bit[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~6, uart_sdram, 1 +instance = comp, \Equal2~1 , Equal2~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~10, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~12, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~16, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_en~0 , fifo_read_inst|read_en~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_en~1 , fifo_read_inst|read_en~1, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_en , fifo_read_inst|read_en, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|valid_rdreq~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6]~feeder, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp|dffpipe15|dffe16a[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_dgrp_gray2bin|xor6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_brp|dffe12a[6], uart_sdram, 1 +instance = comp, \Equal2~0 , Equal2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|wrptr_g_gray2bin|xor9, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9] , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|ws_bwp|dffe12a[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|op_2~18, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2 , sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3 , sdram_top_inst|fifo_ctrl_inst|sdram_rd_req~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|sdram_rd_req , sdram_top_inst|fifo_ctrl_inst|sdram_rd_req, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector3~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.READ, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~7, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_DATA, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|twrite_end~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_PRE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector3~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRP, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trp_end~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_END, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.WRITE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector0~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.ARBIT, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector0~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_IDLE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~15, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRP, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector4~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector3~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_TRF, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_clk[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|trc_end~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Selector1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AUTO_REF, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[1]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref_aref[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~17, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_END, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|aref_en~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|state.AREF, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRP, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~10, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~14, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~16, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~18, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~20, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~22, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~24, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[12], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add0~28, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[14], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_200us[11], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal0~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Equal1~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_IDLE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector5~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_clk[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Add1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_END, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state~16, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_state.AREF_PCHA, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3]~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~10, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5]~10, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~12, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6]~9, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~14, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7]~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~7, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|LessThan0~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~16, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Add0~18, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|cnt_aref[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|Equal0~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_req, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|wr_en, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector0~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_IDLE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector4~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1]~12, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2]~14, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4]~18, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7]~24, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8]~26, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[8], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9]~28, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|cnt_clk[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Equal0~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector1~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_TRCD, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|trcd_end~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_WRITE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a4, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~12, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~11, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|sub_parity7a[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~10, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|parity6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a8, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a10, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux|result_node[0]~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|wrfull_eq_comp_msb_mux_reg, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|valid_wrreq~0, uart_sdram, 1 +instance = comp, \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl , clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl, uart_sdram, 1 +instance = comp, \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl , clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl, uart_sdram, 1 +instance = comp, \rx~input , rx~input, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_reg1~0 , uart_rx_inst|rx_reg1~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_reg1 , uart_rx_inst|rx_reg1, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_reg2~feeder , uart_rx_inst|rx_reg2~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_reg2 , uart_rx_inst|rx_reg2, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_reg3~feeder , uart_rx_inst|rx_reg3~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_reg3 , uart_rx_inst|rx_reg3, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[7]~0 , uart_rx_inst|rx_data[7]~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|bit_cnt~0 , uart_rx_inst|bit_cnt~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|bit_cnt[3] , uart_rx_inst|bit_cnt[3], uart_sdram, 1 +instance = comp, \uart_rx_inst|always8~0 , uart_rx_inst|always8~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[7] , uart_rx_inst|rx_data[7], uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[6] , uart_rx_inst|rx_data[6], uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[5]~feeder , uart_rx_inst|rx_data[5]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[5] , uart_rx_inst|rx_data[5], uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[4]~feeder , uart_rx_inst|rx_data[4]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[4] , uart_rx_inst|rx_data[4], uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[3]~feeder , uart_rx_inst|rx_data[3]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[3] , uart_rx_inst|rx_data[3], uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[2]~feeder , uart_rx_inst|rx_data[2]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[2] , uart_rx_inst|rx_data[2], uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[1]~feeder , uart_rx_inst|rx_data[1]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[1] , uart_rx_inst|rx_data[1], uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[0]~feeder , uart_rx_inst|rx_data[0]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|rx_data[0] , uart_rx_inst|rx_data[0], uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[0]~feeder , uart_rx_inst|po_data[0]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[0] , uart_rx_inst|po_data[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9] , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|ram_address_a[9], uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0, uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[1]~feeder , uart_rx_inst|po_data[1]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[1] , uart_rx_inst|po_data[1], uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[2]~feeder , uart_rx_inst|po_data[2]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[2] , uart_rx_inst|po_data[2], uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[3]~feeder , uart_rx_inst|po_data[3]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[3] , uart_rx_inst|po_data[3], uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[4]~feeder , uart_rx_inst|po_data[4]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[4] , uart_rx_inst|po_data[4], uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[5]~feeder , uart_rx_inst|po_data[5]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[5] , uart_rx_inst|po_data[5], uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[6]~feeder , uart_rx_inst|po_data[6]~feeder, uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[6] , uart_rx_inst|po_data[6], uart_sdram, 1 +instance = comp, \uart_rx_inst|po_data[7] , uart_rx_inst|po_data[7], uart_sdram, 1 +instance = comp, \~GND , ~GND, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_ack, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|wr_sdram_en, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9 , sdram_top_inst|fifo_ctrl_inst|wr_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a9, uart_sdram, 1 +instance = comp, \sys_clk~inputclkctrl , sys_clk~inputclkctrl, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[0]~13 , uart_tx_inst|baud_cnt[0]~13, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[11]~35 , uart_tx_inst|baud_cnt[11]~35, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[11] , uart_tx_inst|baud_cnt[11], uart_sdram, 1 +instance = comp, \uart_tx_inst|Equal1~0 , uart_tx_inst|Equal1~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[9]~31 , uart_tx_inst|baud_cnt[9]~31, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[9] , uart_tx_inst|baud_cnt[9], uart_sdram, 1 +instance = comp, \uart_tx_inst|Equal1~1 , uart_tx_inst|Equal1~1, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[1]~15 , uart_tx_inst|baud_cnt[1]~15, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[1] , uart_tx_inst|baud_cnt[1], uart_sdram, 1 +instance = comp, \uart_tx_inst|Equal1~2 , uart_tx_inst|Equal1~2, uart_sdram, 1 +instance = comp, \fifo_read_inst|tx_flag , fifo_read_inst|tx_flag, uart_sdram, 1 +instance = comp, \uart_tx_inst|always3~0 , uart_tx_inst|always3~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|bit_cnt[1]~2 , uart_tx_inst|bit_cnt[1]~2, uart_sdram, 1 +instance = comp, \uart_tx_inst|bit_cnt[1] , uart_tx_inst|bit_cnt[1], uart_sdram, 1 +instance = comp, \uart_tx_inst|bit_cnt[2]~3 , uart_tx_inst|bit_cnt[2]~3, uart_sdram, 1 +instance = comp, \uart_tx_inst|bit_cnt[2] , uart_tx_inst|bit_cnt[2], uart_sdram, 1 +instance = comp, \uart_tx_inst|always0~1 , uart_tx_inst|always0~1, uart_sdram, 1 +instance = comp, \uart_tx_inst|work_en~0 , uart_tx_inst|work_en~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|work_en , uart_tx_inst|work_en, uart_sdram, 1 +instance = comp, \uart_tx_inst|always1~0 , uart_tx_inst|always1~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[0] , uart_tx_inst|baud_cnt[0], uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[2]~17 , uart_tx_inst|baud_cnt[2]~17, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[2] , uart_tx_inst|baud_cnt[2], uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[5]~23 , uart_tx_inst|baud_cnt[5]~23, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[5] , uart_tx_inst|baud_cnt[5], uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[6]~25 , uart_tx_inst|baud_cnt[6]~25, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[6] , uart_tx_inst|baud_cnt[6], uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[7]~27 , uart_tx_inst|baud_cnt[7]~27, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[7] , uart_tx_inst|baud_cnt[7], uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[8]~29 , uart_tx_inst|baud_cnt[8]~29, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[8] , uart_tx_inst|baud_cnt[8], uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[10]~33 , uart_tx_inst|baud_cnt[10]~33, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[10] , uart_tx_inst|baud_cnt[10], uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[12]~37 , uart_tx_inst|baud_cnt[12]~37, uart_sdram, 1 +instance = comp, \uart_tx_inst|baud_cnt[12] , uart_tx_inst|baud_cnt[12], uart_sdram, 1 +instance = comp, \uart_tx_inst|Equal2~0 , uart_tx_inst|Equal2~0, uart_sdram, 1 +instance = comp, \uart_tx_inst|Equal2~1 , uart_tx_inst|Equal2~1, uart_sdram, 1 +instance = comp, \uart_tx_inst|bit_flag , uart_tx_inst|bit_flag, uart_sdram, 1 +instance = comp, \uart_tx_inst|always0~0 , uart_tx_inst|always0~0, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|valid_rreq, uart_sdram, 1 +instance = comp, \sdram_dq[0]~input , sdram_dq[0]~input, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_ack~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[0]~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|counter5a0~_wirecell, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|rdptr_g1p|_~0, uart_sdram, 1 +instance = comp, \sdram_dq[1]~input , sdram_dq[1]~input, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[1]~6, uart_sdram, 1 +instance = comp, \sdram_dq[2]~input , sdram_dq[2]~input, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[2]~4, uart_sdram, 1 +instance = comp, \sdram_dq[3]~input , sdram_dq[3]~input, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[3], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[3]~2, uart_sdram, 1 +instance = comp, \sdram_dq[4]~input , sdram_dq[4]~input, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[4], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[4]~1, uart_sdram, 1 +instance = comp, \sdram_dq[5]~input , sdram_dq[5]~input, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[5], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[5]~0, uart_sdram, 1 +instance = comp, \sdram_dq[6]~input , sdram_dq[6]~input, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[6], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[6]~3, uart_sdram, 1 +instance = comp, \sdram_dq[7]~input , sdram_dq[7]~input, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_data_reg[7], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|rd_sdram_data[7]~7, uart_sdram, 1 +instance = comp, \sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0 , sdram_top_inst|fifo_ctrl_inst|rd_fifo_data|dcfifo_component|auto_generated|fifo_ram|ram_block11a0, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita0, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[0], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita1, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[1], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita2, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[2], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita3, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[3], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita4, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[4], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita5, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[5], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita6, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[6], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita7, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[7], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita8, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[8], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_comb_bita9, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|wr_ptr|counter_reg_bit[9], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita0, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[0], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita1, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[1], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita2, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[2], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita3, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[3], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita4, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[4], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita5, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[5], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita6, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[6], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita7, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[7], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita8, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[8], uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9 , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_comb_bita9, uart_sdram, 1 +instance = comp, \fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9] , fifo_read_inst|read_fifo_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count|counter_reg_bit[9], uart_sdram, 1 +instance = comp, \uart_tx_inst|tx~4 , uart_tx_inst|tx~4, uart_sdram, 1 +instance = comp, \uart_tx_inst|tx~3 , uart_tx_inst|tx~3, uart_sdram, 1 +instance = comp, \uart_tx_inst|tx~5 , uart_tx_inst|tx~5, uart_sdram, 1 +instance = comp, \uart_tx_inst|tx , uart_tx_inst|tx, uart_sdram, 1 +instance = comp, \clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl , clk_gen_inst|altpll_component|auto_generated|wire_pll1_clk[2]~clkctrl, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector2~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_TRF, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|Selector0~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_AR, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0 , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2] , sdram_top_inst|sdram_ctrl_inst|sdram_a_ref_inst|aref_cmd[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~17, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_PRE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|WideOr5, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_cmd[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector5~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector5~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_cmd[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector6~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector6~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_cmd[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector7~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Equal0~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector21~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~6, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[3]~3, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[0], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~5, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref~4, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|cnt_init_aref[2], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~15, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16 , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state~16, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_state.INIT_MRS, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1] , sdram_top_inst|sdram_ctrl_inst|sdram_init_inst|init_ba[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector9~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector6~2, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_ba[1], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector22~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|WideOr7~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0 , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|Selector11~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10] , sdram_top_inst|sdram_ctrl_inst|sdram_read_inst|read_addr[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state~16, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_state.WR_ACTIVE, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1 , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|Selector10~1, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10] , sdram_top_inst|sdram_ctrl_inst|sdram_write_inst|write_addr[10], uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~0, uart_sdram, 1 +instance = comp, \sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1 , sdram_top_inst|sdram_ctrl_inst|sdram_arbit_inst|Selector12~1, uart_sdram, 1 +instance = comp, \sdram_dq[8]~input , sdram_dq[8]~input, uart_sdram, 1 +instance = comp, \sdram_dq[9]~input , sdram_dq[9]~input, uart_sdram, 1 +instance = comp, \sdram_dq[10]~input , sdram_dq[10]~input, uart_sdram, 1 +instance = comp, \sdram_dq[11]~input , sdram_dq[11]~input, uart_sdram, 1 +instance = comp, \sdram_dq[12]~input , sdram_dq[12]~input, uart_sdram, 1 +instance = comp, \sdram_dq[13]~input , sdram_dq[13]~input, uart_sdram, 1 +instance = comp, \sdram_dq[14]~input , sdram_dq[14]~input, uart_sdram, 1 +instance = comp, \sdram_dq[15]~input , sdram_dq[15]~input, uart_sdram, 1 diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_v.sdo b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_v.sdo new file mode 100644 index 0000000..5006d42 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/simulation/modelsim/uart_sdram_v.sdo @@ -0,0 +1,19618 @@ +// Copyright (C) 1991-2013 Altera Corporation +// Your use of Altera Corporation's design tools, logic functions +// and other software and tools, and its AMPP partner logic +// functions, and any output files from any of the foregoing +// (including device programming or simulation files), and any +// associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License +// Subscription Agreement, Altera MegaCore Function License +// Agreement, or other applicable license agreement, including, +// without limitation, that your use is for the sole purpose of +// programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the +// applicable agreement for further details. + + +// +// Device: Altera EP4CE15F23C8 Package FBGA484 +// + +// +// This file contains Slow Corner delays for the design using part EP4CE15F23C8, +// with speed grade 8, core voltage 1.2V, and temperature 85 Celsius +// + +// +// This SDF file should be used for ModelSim (Verilog) only +// + +(DELAYFILE + (SDFVERSION "2.1") + (DESIGN "uart_sdram") + (DATE "06/02/2023 04:26:31") + (VENDOR "Altera") + (PROGRAM "Quartus II 64-Bit") + (VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version") + (DIVIDER .) + (TIMESCALE 1 ps) + + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1692:1692:1692) (1583:1583:1583)) + (PORT d[1] (1627:1627:1627) (1518:1518:1518)) + (PORT d[2] (1737:1737:1737) (1611:1611:1611)) + (PORT d[3] (1724:1724:1724) (1602:1602:1602)) + (PORT d[4] (1667:1667:1667) (1555:1555:1555)) + (PORT d[5] (1663:1663:1663) (1554:1554:1554)) + (PORT d[6] (1729:1729:1729) (1606:1606:1606)) + (PORT d[7] (1695:1695:1695) (1579:1579:1579)) + (PORT clk (2276:2276:2276) (2303:2303:2303)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1303:1303:1303) (1270:1270:1270)) + (PORT d[1] (1383:1383:1383) (1337:1337:1337)) + (PORT d[2] (986:986:986) (980:980:980)) + (PORT d[3] (1229:1229:1229) (1175:1175:1175)) + (PORT d[4] (1022:1022:1022) (1011:1011:1011)) + (PORT d[5] (970:970:970) (967:967:967)) + (PORT d[6] (1276:1276:1276) (1208:1208:1208)) + (PORT d[7] (1337:1337:1337) (1302:1302:1302)) + (PORT d[8] (983:983:983) (981:981:981)) + (PORT d[9] (979:979:979) (977:977:977)) + (PORT clk (2272:2272:2272) (2298:2298:2298)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (2060:2060:2060) (1886:1886:1886)) + (PORT clk (2272:2272:2272) (2298:2298:2298)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2276:2276:2276) (2303:2303:2303)) + (PORT d[0] (2767:2767:2767) (2600:2600:2600)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2277:2277:2277) (2304:2304:2304)) + (IOPATH (posedge clk) pulse (0:0:0) (2750:2750:2750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2277:2277:2277) (2304:2304:2304)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2277:2277:2277) (2304:2304:2304)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2277:2277:2277) (2304:2304:2304)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (989:989:989) (979:979:979)) + (PORT d[1] (974:974:974) (952:952:952)) + (PORT d[2] (1375:1375:1375) (1321:1321:1321)) + (PORT d[3] (1735:1735:1735) (1635:1635:1635)) + (PORT d[4] (974:974:974) (965:965:965)) + (PORT d[5] (1768:1768:1768) (1761:1761:1761)) + (PORT d[6] (1757:1757:1757) (1674:1674:1674)) + (PORT d[7] (1328:1328:1328) (1287:1287:1287)) + (PORT d[8] (1003:1003:1003) (986:986:986)) + (PORT d[9] (1472:1472:1472) (1376:1376:1376)) + (PORT clk (2226:2226:2226) (2212:2212:2212)) + (PORT ena (2597:2597:2597) (2442:2442:2442)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + (HOLD ena (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (2226:2226:2226) (2212:2212:2212)) + (PORT d[0] (2597:2597:2597) (2442:2442:2442)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2227:2227:2227) (2213:2213:2213)) + (IOPATH (posedge clk) pulse (0:0:0) (3251:3251:3251)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2227:2227:2227) (2213:2213:2213)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|FIFOram\|altsyncram1\|ram_block2a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2227:2227:2227) (2213:2213:2213)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (850:850:850) (820:820:820)) + (PORT datab (539:539:539) (560:560:560)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~14) + (DELAY + (ABSOLUTE + (PORT dataa (983:983:983) (956:956:956)) + (PORT datab (1005:1005:1005) (982:982:982)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1617:1617:1617) (1564:1564:1564)) + (PORT datab (538:538:538) (569:569:569)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~16) + (DELAY + (ABSOLUTE + (PORT dataa (532:532:532) (571:571:571)) + (PORT datab (866:866:866) (831:831:831)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (360:360:360) (462:462:462)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (361:361:361) (464:464:464)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (434:434:434)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (434:434:434)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (449:449:449)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (620:620:620) (629:629:629)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~0) + (DELAY + (ABSOLUTE + (PORT datab (863:863:863) (845:845:845)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (445:445:445)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~12) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~26) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (434:434:434)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT dataa (574:574:574) (611:611:611)) + (PORT datab (956:956:956) (934:934:934)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (449:449:449)) + (PORT datab (955:955:955) (933:933:933)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT dataa (371:371:371) (458:458:458)) + (PORT datab (955:955:955) (933:933:933)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT dataa (577:577:577) (600:600:600)) + (PORT datab (955:955:955) (932:932:932)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (614:614:614)) + (PORT datab (953:953:953) (931:931:931)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT dataa (579:579:579) (613:613:613)) + (PORT datab (953:953:953) (930:930:930)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT dataa (842:842:842) (823:823:823)) + (PORT datab (952:952:952) (929:929:929)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (446:446:446)) + (PORT datab (952:952:952) (929:929:929)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datab (362:362:362) (439:439:439)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~4) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (434:434:434)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5937:5937:5937) (5718:5718:5718)) + (PORT sclr (1663:1663:1663) (1715:1715:1715)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[15\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[16\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[17\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[18\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5942:5942:5942) (5724:5724:5724)) + (PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE data_num\[19\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) 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(PORT sclr (1618:1618:1618) (1666:1666:1666)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~0) + (DELAY + (ABSOLUTE + (PORT datab (542:542:542) (573:573:573)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (615:615:615) (623:623:623)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE 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(IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~10) + (DELAY + (ABSOLUTE + (PORT dataa (571:571:571) (598:598:598)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~12) + (DELAY + (ABSOLUTE + (PORT dataa (620:620:620) (629:629:629)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~14) + (DELAY + (ABSOLUTE + (PORT dataa (618:618:618) (627:627:627)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~16) + (DELAY + (ABSOLUTE + (PORT dataa (937:937:937) (942:942:942)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~18) + (DELAY + (ABSOLUTE + (PORT datab (1008:1008:1008) (980:980:980)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~20) + (DELAY + (ABSOLUTE + (PORT dataa (972:972:972) (958:958:958)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~22) + (DELAY + (ABSOLUTE + (PORT datab (912:912:912) (910:910:910)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~24) + (DELAY + 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(IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Add1\~30) + (DELAY + (ABSOLUTE + (PORT datad (555:555:555) (569:569:569)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout 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(73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[0\]\~24) + (DELAY + (ABSOLUTE + (PORT dataa (1892:1892:1892) (1762:1762:1762)) + (PORT datab (341:341:341) (422:422:422)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[1\]\~26) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (430:430:430)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[2\]\~28) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (433:433:433)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[3\]\~30) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (424:424:424)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[4\]\~32) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (421:421:421)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[5\]\~34) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (423:423:423)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[6\]\~36) + (DELAY + (ABSOLUTE + (PORT datab (359:359:359) (436:436:436)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[7\]\~38) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (430:430:430)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[8\]\~40) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (419:419:419)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[9\]\~42) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (429:429:429)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[10\]\~44) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (421:421:421)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[11\]\~46) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (431:431:431)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[12\]\~48) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (418:418:418)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[13\]\~50) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (421:421:421)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[14\]\~52) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (420:420:420)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[15\]\~54) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (432:432:432)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[16\]\~56) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (421:421:421)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[17\]\~58) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (431:431:431)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[18\]\~60) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (434:434:434)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[19\]\~62) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[20\]\~64) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (422:422:422)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[21\]\~66) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[22\]\~68) + (DELAY + (ABSOLUTE + (PORT datab (361:361:361) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE data_num\[23\]\~70) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (436:436:436)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|cnt_read\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5651:5651:5651) (5409:5409:5409)) + (PORT sclr (930:930:930) (992:992:992)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (433:433:433)) + (PORT datab (369:369:369) (468:468:468)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~4) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (421:421:421)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~6) + (DELAY + (ABSOLUTE + (PORT datad (324:324:324) (411:411:411)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (908:908:908) (883:883:883)) + (PORT datab (340:340:340) (419:419:419)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT datab (339:339:339) (421:421:421)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (340:340:340) (420:420:420)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[3\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (433:433:433)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (422:422:422)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (431:431:431)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (435:435:435)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (423:423:423)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|cnt_read\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT datab (344:344:344) (427:427:427)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[4\]\~21) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (448:448:448)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT asdata (1686:1686:1686) (1628:1628:1628)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1174:1174:1174) (1083:1083:1083)) + (PORT datab (1182:1182:1182) (1098:1098:1098)) + (PORT datad (292:292:292) (362:362:362)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Mux0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (788:788:788) (716:716:716)) + (PORT datab (412:412:412) (512:512:512)) + (PORT datac (784:784:784) (707:707:707)) + (PORT datad (350:350:350) (465:465:465)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Mux0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (993:993:993) (923:923:923)) + (PORT datab (928:928:928) (877:877:877)) + (PORT datac (1148:1148:1148) (1069:1069:1069)) + (PORT datad (1275:1275:1275) (1239:1239:1239)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~0) + (DELAY + (ABSOLUTE + (PORT dataa (395:395:395) (523:523:523)) + (PORT datab (888:888:888) (788:788:788)) + (PORT datac (1486:1486:1486) (1370:1370:1370)) + (PORT datad (369:369:369) (468:468:468)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~1) + (DELAY + (ABSOLUTE + (PORT dataa (395:395:395) (523:523:523)) + (PORT datab (277:277:277) (302:302:302)) + (PORT datac (773:773:773) (696:696:696)) + (PORT datad (370:370:370) (470:470:470)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~2) + (DELAY + (ABSOLUTE + (PORT dataa (932:932:932) (941:941:941)) + (PORT datab (369:369:369) (470:470:470)) + (PORT datac (1111:1111:1111) (997:997:997)) + (PORT datad (238:238:238) (257:257:257)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (337:337:337) (421:421:421)) + (PORT datab (643:643:643) (658:658:658)) + (PORT datac (1220:1220:1220) (1194:1194:1194)) + (PORT datad (335:335:335) (438:438:438)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\~0) + (DELAY + (ABSOLUTE + (PORT datac (513:513:513) (554:554:554)) + (PORT datad (540:540:540) (561:561:561)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|WideOr5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1734:1734:1734) (1630:1630:1630)) + (PORT datad (1627:1627:1627) (1547:1547:1547)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (391:391:391) (494:494:494)) + (PORT datab (370:370:370) (453:453:453)) + (PORT datac (244:244:244) (275:275:275)) + (PORT datad (988:988:988) (986:986:986)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (448:448:448)) + (PORT datab (411:411:411) (519:519:519)) + (PORT datac (901:901:901) (900:900:900)) + (PORT datad (1137:1137:1137) (1084:1084:1084)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector21\~0) + (DELAY + (ABSOLUTE + (PORT dataa (390:390:390) (493:493:493)) + (PORT datab (284:284:284) (316:316:316)) + (PORT datac (328:328:328) (411:411:411)) + (PORT datad (322:322:322) (393:393:393)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (397:397:397) (525:525:525)) + (PORT datac (327:327:327) (430:430:430)) + (PORT datad (369:369:369) (468:468:468)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Add1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (398:398:398) (526:526:526)) + (PORT datab (372:372:372) (473:473:473)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (369:369:369) (468:468:468)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[3\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (292:292:292) (329:329:329)) + (PORT datad (293:293:293) (324:324:324)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT ena (1037:1037:1037) (1012:1012:1012)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (463:463:463)) + (PORT datab (369:369:369) (452:452:452)) + (PORT datac (329:329:329) (413:413:413)) + (PORT datad (330:330:330) (408:408:408)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE read_valid) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~0) + (DELAY + (ABSOLUTE + (PORT datac (245:245:245) (276:276:276)) + (PORT datad (247:247:247) (269:269:269)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1614:1614:1614) (1562:1562:1562)) + (PORT datab (1002:1002:1002) (983:983:983)) + (PORT datac (236:236:236) (261:261:261)) + (PORT datad (247:247:247) (272:272:272)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TMRD) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.IDLE\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1262:1262:1262) (1239:1239:1239)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (PORT ena (1080:1080:1080) (1064:1064:1064)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~3) + (DELAY + (ABSOLUTE + (PORT datab (937:937:937) (945:945:945)) + (PORT datad (962:962:962) (949:949:949)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~0) + (DELAY + (ABSOLUTE + (PORT dataa (569:569:569) (608:608:608)) + (PORT datab (575:575:575) (608:608:608)) + (PORT datac (914:914:914) (907:907:907)) + (PORT datad (923:923:923) (933:933:933)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~1) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (615:615:615)) + (PORT datab (369:369:369) (452:452:452)) + (PORT datac (311:311:311) (400:400:400)) + (PORT datad (330:330:330) (404:404:404)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~2) + (DELAY + (ABSOLUTE + (PORT dataa (354:354:354) (450:450:450)) + (PORT datab (368:368:368) (450:450:450)) + (PORT datac (320:320:320) (399:399:399)) + (PORT datad (329:329:329) (406:406:406)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~3) + (DELAY + (ABSOLUTE + (PORT dataa (844:844:844) (785:785:785)) + (PORT datab (873:873:873) (799:799:799)) + (PORT datac (940:940:940) (927:927:927)) + (PORT datad (239:239:239) (258:258:258)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (580:580:580) (610:610:610)) + (PORT datab (367:367:367) (450:450:450)) + (PORT datac (308:308:308) (397:397:397)) + (PORT datad (328:328:328) (401:401:401)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (447:447:447)) + (PORT datab (280:280:280) (305:305:305)) + (PORT datac (327:327:327) (411:411:411)) + (PORT datad (321:321:321) (392:392:392)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (430:430:430)) + (PORT datac (959:959:959) (952:952:952)) + (PORT datad (1282:1282:1282) (1257:1257:1257)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~2) + (DELAY + (ABSOLUTE + (PORT datac (449:449:449) (435:435:435)) + (PORT datad (313:313:313) (359:359:359)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT asdata (983:983:983) (1016:1016:1016)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (312:312:312) (400:400:400)) + (PORT datad (856:856:856) (810:810:810)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT asdata (1704:1704:1704) (1676:1676:1676)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (348:348:348) (439:439:439)) + (PORT datac (311:311:311) (399:399:399)) + (PORT datad (855:855:855) (809:809:809)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (1328:1328:1328) (1293:1293:1293)) + (PORT datab (1350:1350:1350) (1302:1302:1302)) + (PORT datac (1301:1301:1301) (1278:1278:1278)) + (PORT datad (255:255:255) (280:280:280)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datab (1320:1320:1320) (1297:1297:1297)) + (PORT datac (239:239:239) (265:265:265)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (951:951:951) (970:970:970)) + (PORT datab (968:968:968) (907:907:907)) + (PORT datad (969:969:969) (971:971:971)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datab (970:970:970) (910:910:910)) + (PORT datad (970:970:970) (972:972:972)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datab (354:354:354) (440:440:440)) + (PORT datac (322:322:322) (400:400:400)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT dataa (594:594:594) (632:632:632)) + (PORT datac (354:354:354) (440:440:440)) + (PORT datad (340:340:340) (421:421:421)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (1333:1333:1333) (1273:1273:1273)) + (PORT datac (330:330:330) (434:434:434)) + (PORT datad (257:257:257) (283:283:283)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (512:512:512) (551:551:551)) + (PORT datad (843:843:843) (794:794:794)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (958:958:958) (959:959:959)) + (PORT datab (943:943:943) (935:935:935)) + (PORT datac (501:501:501) (485:485:485)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT asdata (1737:1737:1737) (1682:1682:1682)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (2053:2053:2053) (1939:1939:1939)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (859:859:859) (858:858:858)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datac (331:331:331) (435:435:435)) + (PORT datad (258:258:258) (283:283:283)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (426:426:426)) + (PORT datac (313:313:313) (402:402:402)) + (PORT datad (526:526:526) (557:557:557)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datac (313:313:313) (402:402:402)) + (PORT datad (525:525:525) (557:557:557)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[15\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[13\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (PORT datab (360:360:360) (437:437:437)) + (PORT datac (320:320:320) (398:398:398)) + (PORT datad (320:320:320) (391:391:391)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (445:445:445)) + (PORT datab (359:359:359) (435:435:435)) + (PORT datac (319:319:319) (396:396:396)) + (PORT datad (509:509:509) (537:537:537)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (445:445:445)) + (PORT datab (358:358:358) (435:435:435)) + (PORT datac (318:318:318) (396:396:396)) + (PORT datad (320:320:320) (390:390:390)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE cnt_wait\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1875:1875:1875)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5452:5452:5452) (5229:5229:5229)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (550:550:550) (589:589:589)) + (PORT datab (362:362:362) (439:439:439)) + (PORT datac (321:321:321) (399:399:399)) + (PORT datad (322:322:322) (392:392:392)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (282:282:282) (314:314:314)) + (PORT datab (276:276:276) (300:300:300)) + (PORT datac (239:239:239) (265:265:265)) + (PORT datad (831:831:831) (765:765:765)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE read_valid\~0) + (DELAY + (ABSOLUTE + (PORT dataa (863:863:863) (819:819:819)) + (PORT datab (838:838:838) (798:798:798)) + (PORT datac (937:937:937) (883:883:883)) + (PORT datad (322:322:322) (392:392:392)) + (IOPATH dataa combout (392:392:392) (407:407:407)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE read_valid\~1) + (DELAY + (ABSOLUTE + (PORT dataa (910:910:910) (863:863:863)) + (PORT datab (929:929:929) (864:864:864)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (605:605:605)) + (PORT datab (363:363:363) (440:440:440)) + (PORT datad (507:507:507) (489:489:489)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (634:634:634) (642:642:642)) + (PORT datab (400:400:400) (511:511:511)) + (PORT datac (361:361:361) (468:468:468)) + (PORT datad (309:309:309) (389:389:389)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (378:378:378) (468:468:468)) + (PORT datac (310:310:310) (401:401:401)) + (PORT datad (303:303:303) (376:376:376)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~2) + (DELAY + (ABSOLUTE + (PORT datab (279:279:279) (304:304:304)) + (PORT datac (348:348:348) (427:427:427)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (912:912:912) (923:923:923)) + (PORT datab (981:981:981) (963:963:963)) + (PORT datad (833:833:833) (777:777:777)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (435:435:435) (433:433:433)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (452:452:452)) + (PORT datab (353:353:353) (442:442:442)) + (PORT datac (312:312:312) (401:401:401)) + (PORT datad (312:312:312) (392:392:392)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT asdata (1997:1997:1997) (1917:1917:1917)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (PORT ena (2086:2086:2086) (1974:1974:1974)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (462:462:462)) + (PORT datab (1255:1255:1255) (1234:1234:1234)) + (PORT datad (1253:1253:1253) (1214:1214:1214)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (2163:2163:2163) (2083:2083:2083)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (584:584:584) (619:619:619)) + (PORT datab (570:570:570) (596:596:596)) + (PORT datad (331:331:331) (405:405:405)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (371:371:371) (461:461:461)) + (PORT datab (593:593:593) (620:620:620)) + (PORT datad (564:564:564) (581:581:581)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT datac (447:447:447) (431:431:431)) + (PORT datad (240:240:240) (259:259:259)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1271:1271:1271) (1244:1244:1244)) + (PORT datab (969:969:969) (963:963:963)) + (PORT datad (323:323:323) (393:393:393)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (556:556:556) (590:590:590)) + (PORT datab (360:360:360) (436:436:436)) + (PORT datad (330:330:330) (404:404:404)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (368:368:368) (458:458:458)) + (PORT datab (361:361:361) (438:438:438)) + (PORT datad (321:321:321) (392:392:392)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT datab (277:277:277) (302:302:302)) + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (814:814:814) (765:765:765)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~8) + (DELAY + (ABSOLUTE + (PORT dataa (1218:1218:1218) (1130:1130:1130)) + (PORT datab (1264:1264:1264) (1171:1171:1171)) + (PORT datac (1253:1253:1253) (1164:1164:1164)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (361:361:361) (445:445:445)) + (PORT datab (366:366:366) (449:449:449)) + (PORT datad (572:572:572) (592:592:592)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (647:647:647) (660:660:660)) + (PORT datab (368:368:368) (451:451:451)) + (PORT datad (338:338:338) (419:419:419)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (2530:2530:2530) (2385:2385:2385)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (PORT ena (1720:1720:1720) (1638:1638:1638)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (862:862:862) (772:772:772)) + (PORT datab (484:484:484) (468:468:468)) + (PORT datad (353:353:353) (427:427:427)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (395:395:395) (483:483:483)) + (PORT datab (626:626:626) (638:638:638)) + (PORT datad (564:564:564) (583:583:583)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (613:613:613)) + (PORT datab (386:386:386) (463:463:463)) + (PORT datad (560:560:560) (582:582:582)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (548:548:548) (515:515:515)) + (PORT datab (548:548:548) (586:586:586)) + (PORT datad (239:239:239) (258:258:258)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (333:333:333) (382:382:382)) + (PORT datac (780:780:780) (746:746:746)) + (PORT datad (855:855:855) (796:796:796)) + (IOPATH dataa combout (453:453:453) (446:446:446)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1358:1358:1358) (1307:1307:1307)) + (PORT datab (1780:1780:1780) (1689:1689:1689)) + (PORT datad (499:499:499) (523:523:523)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (550:550:550) (580:580:580)) + (PORT datab (947:947:947) (961:961:961)) + (PORT datad (1275:1275:1275) (1245:1245:1245)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1312:1312:1312) (1309:1309:1309)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (955:955:955) (923:923:923)) + (PORT datab (368:368:368) (451:451:451)) + (PORT datad (321:321:321) (391:391:391)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (279:279:279) (311:311:311)) + (PORT datab (976:976:976) (910:910:910)) + (PORT datad (515:515:515) (546:546:546)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1349:1349:1349) (1318:1318:1318)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (545:545:545) (584:584:584)) + (PORT datab (1039:1039:1039) (1008:1008:1008)) + (PORT datad (1278:1278:1278) (1236:1236:1236)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (372:372:372) (462:462:462)) + (PORT datab (320:320:320) (357:357:357)) + (PORT datac (337:337:337) (425:425:425)) + (PORT datad (338:338:338) (418:418:418)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (300:300:300) (384:384:384)) + (PORT datad (302:302:302) (378:378:378)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (574:574:574) (602:602:602)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (302:302:302) (386:386:386)) + (PORT datad (302:302:302) (379:379:379)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (343:343:343) (425:425:425)) + (PORT datac (302:302:302) (386:386:386)) + (PORT datad (302:302:302) (379:379:379)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~3) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (433:433:433)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (303:303:303) (380:380:380)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~4) + (DELAY + (ABSOLUTE + (PORT dataa (841:841:841) (789:789:789)) + (PORT datab (276:276:276) (300:300:300)) + (PORT datac (236:236:236) (261:261:261)) + (PORT datad (236:236:236) (254:254:254)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~5) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (435:435:435)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (303:303:303) (379:379:379)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal1\~6) + (DELAY + (ABSOLUTE + (PORT dataa (573:573:573) (600:600:600)) + (PORT datab (341:341:341) (424:424:424)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (302:302:302) (378:378:378)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[8\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (901:901:901) (842:842:842)) + (PORT datab (837:837:837) (797:797:797)) + (PORT datac (859:859:859) (812:812:812)) + (PORT datad (849:849:849) (802:802:802)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[15\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (902:902:902) (842:842:842)) + (PORT datab (839:839:839) (799:799:799)) + (PORT datac (861:861:861) (813:813:813)) + (PORT datad (851:851:851) (803:803:803)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[15\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (552:552:552) (512:512:512)) + (PORT datab (1006:1006:1006) (986:986:986)) + (PORT datad (935:935:935) (923:923:923)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[14\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (980:980:980) (982:982:982)) + (PORT datab (486:486:486) (466:466:466)) + (PORT datad (943:943:943) (934:934:934)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[13\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (979:979:979) (980:980:980)) + (PORT datab (740:740:740) (682:682:682)) + (PORT datad (945:945:945) (936:936:936)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[12\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (979:979:979) (981:981:981)) + (PORT datab (540:540:540) (498:498:498)) + (PORT datad (944:944:944) (936:936:936)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[9\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (332:332:332) (381:381:381)) + (PORT datab (878:878:878) (805:805:805)) + (PORT datad (290:290:290) (317:317:317)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[11\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (381:381:381)) + (PORT datab (837:837:837) (790:790:790)) + (PORT datad (291:291:291) (319:319:319)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[10\]\~8) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (381:381:381)) + (PORT datab (828:828:828) (784:784:784)) + (PORT datad (291:291:291) (319:319:319)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[8\]\~9) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (381:381:381)) + (PORT datab (909:909:909) (833:833:833)) + (PORT datad (292:292:292) (319:319:319)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[7\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (974:974:974) (975:975:975)) + (PORT datab (543:543:543) (505:505:505)) + (PORT datad (950:950:950) (943:943:943)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[6\]\~11) + (DELAY + (ABSOLUTE + (PORT dataa (976:976:976) (977:977:977)) + (PORT datab (544:544:544) (507:507:507)) + (PORT datad (947:947:947) (940:940:940)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[5\]\~12) + (DELAY + (ABSOLUTE + (PORT dataa (977:977:977) (978:978:978)) + (PORT datab (489:489:489) (474:474:474)) + (PORT datad (947:947:947) (939:939:939)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[4\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (978:978:978) (979:979:979)) + (PORT datab (547:547:547) (510:510:510)) + (PORT datad (946:946:946) (938:938:938)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[3\]\~14) + (DELAY + (ABSOLUTE + (PORT dataa (492:492:492) (484:484:484)) + (PORT datab (1011:1011:1011) (993:993:993)) + (PORT datad (930:930:930) (916:916:916)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[2\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (554:554:554) (518:518:518)) + (PORT datab (1011:1011:1011) (993:993:993)) + (PORT datad (930:930:930) (917:917:917)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[1\]\~16) + (DELAY + (ABSOLUTE + (PORT dataa (492:492:492) (485:485:485)) + (PORT datab (1012:1012:1012) (995:995:995)) + (PORT datad (929:929:929) (915:915:915)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE cnt_wait\[0\]\~17) + (DELAY + (ABSOLUTE + (PORT dataa (978:978:978) (980:980:980)) + (PORT datab (548:548:548) (511:511:511)) + (PORT datad (945:945:945) (937:937:937)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1326:1326:1326) (1238:1238:1238)) + (PORT datab (1022:1022:1022) (1001:1001:1001)) + (PORT datad (569:569:569) (588:588:588)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (638:638:638) (653:653:653)) + (PORT datab (577:577:577) (606:606:606)) + (PORT datad (951:951:951) (933:933:933)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (907:907:907) (914:914:914)) + (PORT datab (588:588:588) (611:611:611)) + (PORT datac (901:901:901) (890:890:890)) + (PORT datad (878:878:878) (878:878:878)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (283:283:283) (316:316:316)) + (PORT datab (276:276:276) (301:301:301)) + (PORT datac (1650:1650:1650) (1527:1527:1527)) + (PORT datad (240:240:240) (258:258:258)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (899:899:899) (917:917:917)) + (PORT datab (987:987:987) (968:968:968)) + (PORT datad (320:320:320) (390:390:390)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb\|data_wire\[2\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (1912:1912:1912) (1751:1751:1751)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (875:875:875) (852:852:852)) + (PORT datab (1154:1154:1154) (1044:1044:1044)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (622:622:622) (632:632:632)) + (PORT datab (542:542:542) (574:574:574)) + (PORT datad (1623:1623:1623) (1547:1547:1547)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (535:535:535) (494:494:494)) + (PORT datab (279:279:279) (304:304:304)) + (PORT datac (446:446:446) (417:417:417)) + (PORT datad (298:298:298) (339:339:339)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1320:1320:1320) (1253:1253:1253)) + (PORT datab (366:366:366) (466:466:466)) + (PORT datad (909:909:909) (894:894:894)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (355:355:355) (449:449:449)) + (PORT datab (965:965:965) (948:948:948)) + (PORT datac (1383:1383:1383) (1333:1333:1333)) + (PORT datad (325:325:325) (414:414:414)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (370:370:370) (475:475:475)) + (PORT datab (368:368:368) (468:468:468)) + (PORT datac (888:888:888) (879:879:879)) + (PORT datad (881:881:881) (879:879:879)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (943:943:943) (872:872:872)) + (PORT datab (343:343:343) (386:386:386)) + (PORT datad (486:486:486) (459:459:459)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (906:906:906) (912:912:912)) + (PORT datab (553:553:553) (585:585:585)) + (PORT datad (542:542:542) (562:562:562)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (995:995:995) (971:971:971)) + (PORT datab (362:362:362) (439:439:439)) + (PORT datad (864:864:864) (838:838:838)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (369:369:369) (474:474:474)) + (PORT datab (981:981:981) (954:954:954)) + (PORT datad (874:874:874) (875:875:875)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (379:379:379) (472:472:472)) + (PORT datab (376:376:376) (466:466:466)) + (PORT datac (1231:1231:1231) (1184:1184:1184)) + (PORT datad (361:361:361) (441:441:441)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|rd_flag) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5995:5995:5995) (5789:5789:5789)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (447:447:447)) + (PORT datab (349:349:349) (438:438:438)) + (PORT datac (308:308:308) (398:398:398)) + (PORT datad (311:311:311) (391:391:391)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|cntr_cout\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1329:1329:1329) (1316:1316:1316)) + (PORT datab (922:922:922) (929:929:929)) + (PORT datac (477:477:477) (450:450:450)) + (PORT datad (304:304:304) (381:381:381)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (PORT ena (1757:1757:1757) (1679:1679:1679)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (435:435:435)) + (PORT datab (344:344:344) (426:426:426)) + (PORT datac (303:303:303) (387:387:387)) + (PORT datad (305:305:305) (382:382:382)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (343:343:343) (426:426:426)) + (PORT datac (303:303:303) (387:387:387)) + (PORT datad (304:304:304) (381:381:381)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (493:493:493) (471:471:471)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (302:302:302) (379:379:379)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|rd_flag\~0) + (DELAY + (ABSOLUTE + (PORT dataa (944:944:944) (882:882:882)) + (PORT datab (999:999:999) (985:985:985)) + (PORT datad (246:246:246) (271:271:271)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|bit_cnt\~1) + (DELAY + (ABSOLUTE + (PORT dataa (366:366:366) (464:464:464)) + (PORT datab (278:278:278) (303:303:303)) + (PORT datac (330:330:330) (432:432:432)) + (PORT datad (266:266:266) (302:302:302)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~13) + (DELAY + (ABSOLUTE + (PORT dataa (1237:1237:1237) (1198:1198:1198)) + (PORT datab (379:379:379) (469:469:469)) + (PORT datac (336:336:336) (426:426:426)) + (PORT datad (329:329:329) (407:407:407)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|work_en) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|start_nedge) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1860:1860:1860)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1851:1851:1851)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|work_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (1291:1291:1291) (1207:1207:1207)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always3\~0) + (DELAY + (ABSOLUTE + (PORT datab (345:345:345) (424:424:424)) + (PORT datad (321:321:321) (392:392:392)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (935:935:935) (945:945:945)) + (PORT datab (330:330:330) (363:363:363)) + (PORT datad (865:865:865) (859:859:859)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[7\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1504:1504:1504) (1434:1434:1434)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[7\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1180:1180:1180) (1142:1142:1142)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (323:323:323) (394:394:394)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (873:873:873) (870:870:870)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (542:542:542) (562:562:562)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE tx\~output) + (DELAY + (ABSOLUTE + (PORT i (2462:2462:2462) (2477:2477:2477)) + (IOPATH i o (3336:3336:3336) (3399:3399:3399)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_clk\~output) + (DELAY + (ABSOLUTE + (PORT i (1622:1622:1622) (1573:1573:1573)) + (IOPATH i o (3251:3251:3251) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_cas_n\~output) + (DELAY + (ABSOLUTE + (PORT i (2191:2191:2191) (2040:2040:2040)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ras_n\~output) + (DELAY + (ABSOLUTE + (PORT i (2334:2334:2334) (2117:2117:2117)) + (IOPATH i o (4708:4708:4708) (4746:4746:4746)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_we_n\~output) + (DELAY + (ABSOLUTE + (PORT i (2385:2385:2385) (2240:2240:2240)) + (IOPATH i o (3291:3291:3291) (3194:3194:3194)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ba\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3348:3348:3348) (3145:3145:3145)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_ba\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3636:3636:3636) (3398:3398:3398)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2660:2660:2660) (2398:2398:2398)) + (IOPATH i o (3281:3281:3281) (3184:3184:3184)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2653:2653:2653) (2401:2401:2401)) + (IOPATH i o (3429:3429:3429) (3366:3366:3366)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[2\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2653:2653:2653) (2401:2401:2401)) + (IOPATH i o (3429:3429:3429) (3366:3366:3366)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[3\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3335:3335:3335) (3152:3152:3152)) + (IOPATH i o (3429:3429:3429) (3366:3366:3366)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[4\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3060:3060:3060) (2762:2762:2762)) + (IOPATH i o (3429:3429:3429) (3366:3366:3366)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[5\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3079:3079:3079) (2783:2783:2783)) + (IOPATH i o (3409:3409:3409) (3346:3346:3346)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[6\]\~output) + (DELAY + (ABSOLUTE + (PORT i (4466:4466:4466) (4181:4181:4181)) + (IOPATH i o (3409:3409:3409) (3346:3346:3346)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[7\]\~output) + (DELAY + (ABSOLUTE + (PORT i (4050:4050:4050) (3800:3800:3800)) + (IOPATH i o (3399:3399:3399) (3336:3336:3336)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[8\]\~output) + (DELAY + (ABSOLUTE + (PORT i (4473:4473:4473) (4187:4187:4187)) + (IOPATH i o (3409:3409:3409) (3346:3346:3346)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[9\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2666:2666:2666) (2508:2508:2508)) + (IOPATH i o (3399:3399:3399) (3336:3336:3336)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[10\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2685:2685:2685) (2509:2509:2509)) + (IOPATH i o (3291:3291:3291) (3194:3194:3194)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[11\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2666:2666:2666) (2508:2508:2508)) + (IOPATH i o (3409:3409:3409) (3346:3346:3346)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_addr\[12\]\~output) + (DELAY + (ABSOLUTE + (PORT i (3225:3225:3225) (2988:2988:2988)) + (IOPATH i o (3399:3399:3399) (3336:3336:3336)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[0\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1550:1550:1550) (1417:1417:1417)) + (PORT oe (1648:1648:1648) (1586:1586:1586)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[1\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1491:1491:1491) (1367:1367:1367)) + (PORT oe (1648:1648:1648) (1586:1586:1586)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[2\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1577:1577:1577) (1450:1450:1450)) + (PORT oe (2036:2036:2036) (1919:1919:1919)) + (IOPATH i o (3231:3231:3231) (3134:3134:3134)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[3\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1113:1113:1113) (1003:1003:1003)) + (PORT oe (1252:1252:1252) (1208:1208:1208)) + (IOPATH i o (3261:3261:3261) (3164:3164:3164)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[4\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1135:1135:1135) (1030:1030:1030)) + (PORT oe (1252:1252:1252) (1208:1208:1208)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[5\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1522:1522:1522) (1395:1395:1395)) + (PORT oe (2036:2036:2036) (1919:1919:1919)) + (IOPATH i o (3251:3251:3251) (3154:3154:3154)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[6\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1541:1541:1541) (1413:1413:1413)) + (PORT oe (1648:1648:1648) (1586:1586:1586)) + (IOPATH i o (3281:3281:3281) (3184:3184:3184)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[7\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1200:1200:1200) (1108:1108:1108)) + (PORT oe (1648:1648:1648) (1586:1586:1586)) + (IOPATH i o (3271:3271:3271) (3174:3174:3174)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[8\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1637:1637:1637) (1534:1534:1534)) + (PORT oe (2662:2662:2662) (2485:2485:2485)) + (IOPATH i o (3409:3409:3409) (3346:3346:3346)) + (IOPATH oe o (3433:3433:3433) (3294:3294:3294)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[9\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1745:1745:1745) (1590:1590:1590)) + (PORT oe (2255:2255:2255) (2128:2128:2128)) + (IOPATH i o (3281:3281:3281) (3184:3184:3184)) + (IOPATH oe o (3324:3324:3324) (3154:3154:3154)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[10\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2059:2059:2059) (1828:1828:1828)) + (PORT oe (1931:1931:1931) (1833:1833:1833)) + (IOPATH i o (3419:3419:3419) (3356:3356:3356)) + (IOPATH oe o (3433:3433:3433) (3294:3294:3294)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[11\]\~output) + (DELAY + (ABSOLUTE + (PORT i (2200:2200:2200) (2043:2043:2043)) + (PORT oe (2276:2276:2276) (2145:2145:2145)) + (IOPATH i o (3399:3399:3399) (3336:3336:3336)) + (IOPATH oe o (3433:3433:3433) (3294:3294:3294)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[12\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1838:1838:1838) (1674:1674:1674)) + (PORT oe (2316:2316:2316) (2194:2194:2194)) + (IOPATH i o (3389:3389:3389) (3326:3326:3326)) + (IOPATH oe o (3433:3433:3433) (3294:3294:3294)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[13\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1495:1495:1495) (1364:1364:1364)) + (PORT oe (2323:2323:2323) (2202:2202:2202)) + (IOPATH i o (3399:3399:3399) (3336:3336:3336)) + (IOPATH oe o (3433:3433:3433) (3294:3294:3294)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[14\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1746:1746:1746) (1547:1547:1547)) + (PORT oe (2323:2323:2323) (2202:2202:2202)) + (IOPATH i o (4760:4760:4760) (4817:4817:4817)) + (IOPATH oe o (4805:4805:4805) (4785:4785:4785)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_obuf") + (INSTANCE sdram_dq\[15\]\~output) + (DELAY + (ABSOLUTE + (PORT i (1655:1655:1655) (1474:1474:1474)) + (PORT oe (2323:2323:2323) (2202:2202:2202)) + (IOPATH i o (3291:3291:3291) (3218:3218:3218)) + (IOPATH oe o (3335:3335:3335) (3194:3194:3194)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (576:576:576) (609:609:609)) + (PORT datab (358:358:358) (434:434:434)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sys_clk\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (806:806:806) (852:852:852)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_pll") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|pll1) + (DELAY + (ABSOLUTE + (PORT areset (5286:5286:5286) (5286:5286:5286)) + (PORT inclk[0] (2340:2340:2340) (2340:2340:2340)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sys_rst_n\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (766:766:766) (812:812:812)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|pll_lock_sync) + (DELAY + (ABSOLUTE + (PORT clk (2135:2135:2135) (2190:2190:2190)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5631:5631:5631) (5380:5380:5380)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE rst_n\~0) + (DELAY + (ABSOLUTE + (PORT dataa (4719:4719:4719) (4925:4925:4925)) + (PORT datac (1430:1430:1430) (1466:1466:1466)) + (PORT datad (293:293:293) (362:362:362)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE rst_n\~0clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2483:2483:2483) (2391:2391:2391)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT datab (349:349:349) (435:435:435)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT dataa (354:354:354) (443:443:443)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (452:452:452)) + (PORT datab (588:588:588) (611:611:611)) + (PORT datac (312:312:312) (402:402:402)) + (PORT datad (314:314:314) (394:394:394)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (422:422:422)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (630:630:630) (636:636:636)) + (PORT datab (343:343:343) (427:427:427)) + (PORT datac (300:300:300) (384:384:384)) + (PORT datad (304:304:304) (381:381:381)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[9\]\~31) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (447:447:447)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[11\]\~35) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT datac (848:848:848) (818:818:818)) + (PORT datad (530:530:530) (558:558:558)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal1\~3) + (DELAY + (ABSOLUTE + (PORT dataa (638:638:638) (647:647:647)) + (PORT datab (627:627:627) (636:636:636)) + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (534:534:534) (554:554:554)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (447:447:447)) + (PORT datab (475:475:475) (459:459:459)) + (PORT datac (483:483:483) (457:457:457)) + (PORT datad (237:237:237) (256:256:256)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (422:422:422)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (453:453:453)) + (PORT datab (589:589:589) (612:612:612)) + (PORT datac (312:312:312) (402:402:402)) + (PORT datad (314:314:314) (394:394:394)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (449:449:449)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1883:1883:1883) (1854:1854:1854)) + (PORT sclr (1155:1155:1155) (1183:1183:1183)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (574:574:574) (613:613:613)) + (PORT datab (625:625:625) (633:633:633)) + (PORT datac (848:848:848) (817:817:817)) + (PORT datad (533:533:533) (552:552:552)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Equal2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (544:544:544) (504:504:504)) + (PORT datab (534:534:534) (496:496:496)) + (PORT datac (577:577:577) (599:599:599)) + (PORT datad (240:240:240) (258:258:258)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|Add1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (430:430:430)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (345:345:345) (427:427:427)) + (PORT datac (304:304:304) (388:388:388)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (461:461:461)) + (PORT datab (305:305:305) (343:343:343)) + (PORT datac (327:327:327) (429:429:429)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_flag) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_flag) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (1718:1718:1718) (1681:1681:1681)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (365:365:365) (465:465:465)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a0) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (PORT ena (2467:2467:2467) (2319:2319:2319)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (364:364:364) (463:463:463)) + (PORT datab (2041:2041:2041) (1890:1890:1890)) + (PORT datad (561:561:561) (599:599:599)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (604:604:604) (653:653:653)) + (PORT datab (378:378:378) (467:467:467)) + (PORT datac (318:318:318) (414:414:414)) + (PORT datad (1679:1679:1679) (1566:1566:1566)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (236:236:236) (255:255:255)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (322:322:322) (360:360:360)) + (PORT datad (558:558:558) (589:589:589)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (598:598:598) (645:645:645)) + (PORT datab (380:380:380) (470:470:470)) + (PORT datac (354:354:354) (453:453:453)) + (PORT datad (560:560:560) (592:592:592)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (PORT ena (2467:2467:2467) (2319:2319:2319)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (521:521:521) (498:498:498)) + (PORT datab (397:397:397) (493:493:493)) + (PORT datad (557:557:557) (588:588:588)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (384:384:384) (480:480:480)) + (PORT datab (323:323:323) (361:361:361)) + (PORT datac (352:352:352) (451:451:451)) + (PORT datad (330:330:330) (403:403:403)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5\~0) + (DELAY + (ABSOLUTE + (PORT datad (822:822:822) (761:761:761)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (409:409:409) (521:521:521)) + (PORT datad (819:819:819) (773:773:773)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT dataa (949:949:949) (950:950:950)) + (PORT datab (369:369:369) (467:467:467)) + (PORT datac (364:364:364) (472:472:472)) + (PORT datad (357:357:357) (447:447:447)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (398:398:398) (497:497:497)) + (PORT datab (367:367:367) (465:465:465)) + (PORT datac (364:364:364) (472:472:472)) + (PORT datad (819:819:819) (773:773:773)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (432:432:432) (405:405:405)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (398:398:398) (497:497:497)) + (PORT datab (368:368:368) (466:466:466)) + (PORT datac (362:362:362) (469:469:469)) + (PORT datad (818:818:818) (772:772:772)) + (IOPATH dataa combout (392:392:392) (407:407:407)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10\~0) + (DELAY + (ABSOLUTE + (PORT datab (375:375:375) (469:469:469)) + (PORT datad (457:457:457) (426:426:426)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (498:498:498) (478:478:478)) + (PORT datad (333:333:333) (424:424:424)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT datab (372:372:372) (465:465:465)) + (PORT datac (311:311:311) (402:402:402)) + (PORT datad (790:790:790) (780:780:780)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1306:1306:1306) (1246:1246:1246)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT datab (338:338:338) (416:416:416)) + (PORT datac (898:898:898) (891:891:891)) + (PORT datad (1121:1121:1121) (1075:1075:1075)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|parity9) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (PORT ena (2467:2467:2467) (2319:2319:2319)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (601:601:601) (649:649:649)) + (PORT datab (376:376:376) (465:465:465)) + (PORT datac (317:317:317) (412:412:412)) + (PORT datad (1677:1677:1677) (1565:1565:1565)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (382:382:382) (478:478:478)) + (PORT datab (322:322:322) (360:360:360)) + (PORT datac (351:351:351) (450:450:450)) + (PORT datad (329:329:329) (403:403:403)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (410:410:410) (523:523:523)) + (PORT datab (860:860:860) (816:816:816)) + (PORT datad (356:356:356) (446:446:446)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (778:778:778) (859:859:859)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1306:1306:1306) (1246:1246:1246)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT datab (354:354:354) (449:449:449)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (431:431:431)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (432:432:432)) + (PORT datab (341:341:341) (423:423:423)) + (PORT datac (300:300:300) (384:384:384)) + (PORT datad (302:302:302) (378:378:378)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (467:467:467)) + (PORT datab (361:361:361) (458:458:458)) + (PORT datac (320:320:320) (414:414:414)) + (PORT datad (322:322:322) (405:405:405)) + (IOPATH dataa combout (392:392:392) (407:407:407)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~8) + (DELAY + (ABSOLUTE + (PORT dataa (876:876:876) (867:867:867)) + (PORT datab (589:589:589) (622:622:622)) + (PORT datac (501:501:501) (510:510:510)) + (PORT datad (498:498:498) (472:472:472)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (333:333:333) (425:425:425)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1306:1306:1306) (1246:1246:1246)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (991:991:991) (1016:1016:1016)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[8\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1148:1148:1148) (1098:1098:1098)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (789:789:789) (779:779:779)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1306:1306:1306) (1246:1246:1246)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (332:332:332) (406:406:406)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1283:1283:1283) (1215:1215:1215)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (322:322:322) (393:393:393)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1145:1145:1145) (1104:1104:1104)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (606:606:606) (617:617:617)) + (PORT datab (341:341:341) (423:423:423)) + (PORT datac (309:309:309) (398:398:398)) + (PORT datad (521:521:521) (553:553:553)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (358:358:358) (448:448:448)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (2366:2366:2366) (2261:2261:2261)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT asdata (1242:1242:1242) (1212:1212:1212)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (437:437:437)) + (PORT datab (295:295:295) (332:332:332)) + (PORT datac (312:312:312) (402:402:402)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (1372:1372:1372) (1359:1359:1359)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1256:1256:1256) (1213:1213:1213)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (332:332:332) (406:406:406)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (433:433:433)) + (PORT datab (295:295:295) (331:331:331)) + (PORT datac (312:312:312) (402:402:402)) + (PORT datad (294:294:294) (363:363:363)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (296:296:296) (334:334:334)) + (PORT datad (1292:1292:1292) (1256:1256:1256)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT asdata (803:803:803) (886:886:886)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (PORT ena (2467:2467:2467) (2319:2319:2319)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1705:1705:1705) (1625:1625:1625)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT asdata (821:821:821) (912:912:912)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (PORT ena (2467:2467:2467) (2319:2319:2319)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT asdata (1711:1711:1711) (1670:1670:1670)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (405:405:405) (502:502:502)) + (PORT datab (361:361:361) (437:437:437)) + (PORT datad (1289:1289:1289) (1253:1253:1253)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (403:403:403) (500:500:500)) + (PORT datab (294:294:294) (332:332:332)) + (PORT datac (321:321:321) (399:399:399)) + (PORT datad (1291:1291:1291) (1254:1254:1254)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5\~0) + (DELAY + (ABSOLUTE + (PORT datad (824:824:824) (767:767:767)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (827:827:827) (926:926:926)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT asdata (1943:1943:1943) (1841:1841:1841)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (984:984:984) (974:974:974)) + (PORT datab (384:384:384) (461:461:461)) + (PORT datad (328:328:328) (402:402:402)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT datad (364:364:364) (445:445:445)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (PORT ena (1757:1757:1757) (1679:1679:1679)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (662:662:662) (668:668:668)) + (PORT datab (379:379:379) (470:470:470)) + (PORT datad (964:964:964) (921:921:921)) + (IOPATH dataa combout (405:405:405) (407:407:407)) + (IOPATH datab combout (410:410:410) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (1169:1169:1169) (1119:1119:1119)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT asdata (2501:2501:2501) (2388:2388:2388)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (552:552:552) (590:590:590)) + (PORT datab (1313:1313:1313) (1280:1280:1280)) + (PORT datad (1287:1287:1287) (1255:1255:1255)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1235:1235:1235) (1166:1166:1166)) + (PORT datab (278:278:278) (304:304:304)) + (PORT datac (1178:1178:1178) (1083:1083:1083)) + (PORT datad (237:237:237) (255:255:255)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1685:1685:1685) (1617:1617:1617)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT asdata (2051:2051:2051) (1920:1920:1920)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (2053:2053:2053) (1939:1939:1939)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (889:889:889) (852:852:852)) + (PORT datab (841:841:841) (817:817:817)) + (PORT datad (1261:1261:1261) (1212:1212:1212)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (1991:1991:1991) (1909:1909:1909)) + (PORT datab (628:628:628) (636:636:636)) + (PORT datad (516:516:516) (536:536:536)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (1254:1254:1254) (1177:1177:1177)) + (PORT datac (1192:1192:1192) (1090:1090:1090)) + (PORT datad (1865:1865:1865) (1684:1684:1684)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~8) + (DELAY + (ABSOLUTE + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (487:487:487) (460:460:460)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1738:1738:1738) (1676:1676:1676)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (380:380:380) (473:473:473)) + (PORT datab (976:976:976) (960:960:960)) + (PORT datad (1553:1553:1553) (1445:1445:1445)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1391:1391:1391) (1386:1386:1386)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (794:794:794) (888:888:888)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (1260:1260:1260) (1227:1227:1227)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (487:487:487) (475:475:475)) + (PORT datab (279:279:279) (305:305:305)) + (PORT datad (886:886:886) (882:882:882)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (909:909:909) (912:912:912)) + (PORT datab (360:360:360) (437:437:437)) + (PORT datad (1175:1175:1175) (1138:1138:1138)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (313:313:313)) + (PORT datab (277:277:277) (303:303:303)) + (PORT datad (870:870:870) (877:877:877)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT datab (1169:1169:1169) (1068:1068:1068)) + (PORT datac (779:779:779) (726:726:726)) + (PORT datad (1194:1194:1194) (1114:1114:1114)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|valid_rdreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1561:1561:1561) (1410:1410:1410)) + (PORT datab (1614:1614:1614) (1540:1540:1540)) + (PORT datac (798:798:798) (776:776:776)) + (PORT datad (1245:1245:1245) (1176:1176:1176)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT asdata (2446:2446:2446) (2316:2316:2316)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (2053:2053:2053) (1939:1939:1939)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6\~0) + (DELAY + (ABSOLUTE + (PORT datab (303:303:303) (344:344:344)) + (PORT datad (1309:1309:1309) (1266:1266:1266)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1631:1631:1631) (1569:1569:1569)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (369:369:369) (474:474:474)) + (PORT datab (577:577:577) (606:606:606)) + (PORT datac (321:321:321) (399:399:399)) + (PORT datad (545:545:545) (567:567:567)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (1327:1327:1327) (1265:1265:1265)) + (PORT datab (364:364:364) (463:463:463)) + (PORT datac (321:321:321) (399:399:399)) + (PORT datad (253:253:253) (277:277:277)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (340:340:340) (429:429:429)) + (PORT datad (1151:1151:1151) (1048:1048:1048)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (1991:1991:1991) (1909:1909:1909)) + (PORT datac (337:337:337) (426:426:426)) + (PORT datad (1150:1150:1150) (1047:1047:1047)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (571:571:571) (590:590:590)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT asdata (1625:1625:1625) (1569:1569:1569)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (1141:1141:1141) (1149:1149:1149)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (888:888:888) (884:884:884)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (515:515:515) (544:544:544)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp\|dffpipe13\|dffe14a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (957:957:957) (958:958:958)) + (PORT datab (942:942:942) (934:934:934)) + (PORT datac (500:500:500) (484:484:484)) + (PORT datad (887:887:887) (876:876:876)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (1292:1292:1292) (1239:1239:1239)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (2053:2053:2053) (1939:1939:1939)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT asdata (1767:1767:1767) (1710:1710:1710)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (PORT ena (2053:2053:2053) (1939:1939:1939)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (1989:1989:1989) (1906:1906:1906)) + (PORT datab (590:590:590) (613:613:613)) + (PORT datac (338:338:338) (427:427:427)) + (PORT datad (1151:1151:1151) (1048:1048:1048)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (864:864:864) (867:867:867)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (334:334:334) (417:417:417)) + (PORT datab (966:966:966) (938:938:938)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab cout (565:565:565) (421:421:421)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1589:1589:1589) (1501:1501:1501)) + (PORT datab (934:934:934) (920:920:920)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~6) + (DELAY + (ABSOLUTE + (PORT dataa (940:940:940) (925:925:925)) + (PORT datab (931:931:931) (932:932:932)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~8) + (DELAY + (ABSOLUTE + (PORT dataa (952:952:952) (921:921:921)) + (PORT datab (839:839:839) (807:807:807)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~10) + (DELAY + (ABSOLUTE + (PORT dataa (863:863:863) (860:860:860)) + (PORT datab (866:866:866) (829:829:829)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_dgwp_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datab (355:355:355) (441:441:441)) + (PORT datac (254:254:254) (294:294:294)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_bwp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1843:1843:1843) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~12) + (DELAY + (ABSOLUTE + (PORT dataa (806:806:806) (785:785:785)) + (PORT datab (854:854:854) (821:821:821)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~14) + (DELAY + (ABSOLUTE + (PORT dataa (544:544:544) (574:574:574)) + (PORT datab (805:805:805) (783:783:783)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|LessThan2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (282:282:282) (314:314:314)) + (PORT datab (278:278:278) (303:303:303)) + (PORT datac (238:238:238) (265:265:265)) + (PORT datad (240:240:240) (258:258:258)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|LessThan2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (281:281:281) (313:313:313)) + (PORT datab (277:277:277) (302:302:302)) + (PORT datac (237:237:237) (264:264:264)) + (PORT datad (237:237:237) (256:256:256)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT dataa (1372:1372:1372) (1315:1315:1315)) + (PORT datab (982:982:982) (970:970:970)) + (PORT datac (260:260:260) (304:304:304)) + (PORT datad (920:920:920) (901:901:901)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9\~0) + (DELAY + (ABSOLUTE + (PORT datab (287:287:287) (316:316:316)) + (PORT datad (330:330:330) (407:407:407)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1366:1366:1366) (1359:1359:1359)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT datac (339:339:339) (430:430:430)) + (PORT datad (330:330:330) (426:426:426)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (479:479:479)) + (PORT datac (338:338:338) (428:428:428)) + (PORT datad (550:550:550) (572:572:572)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rs_brp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|op_1\~18) + (DELAY + (ABSOLUTE + (PORT dataa (598:598:598) (611:611:611)) + (PORT datad (793:793:793) (773:773:773)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_wr_req\~0) + (DELAY + (ABSOLUTE + (PORT dataa (2267:2267:2267) (2132:2132:2132)) + (PORT datab (302:302:302) (326:326:326)) + (PORT datac (265:265:265) (290:290:290)) + (PORT datad (266:266:266) (283:283:283)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_wr_req) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1856:1856:1856)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1847:1847:1847)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (846:846:846) (840:840:840)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (PORT ena (1139:1139:1139) (1151:1151:1151)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (851:851:851) (845:845:845)) + (PORT datab (337:337:337) (384:384:384)) + (PORT datad (552:552:552) (579:579:579)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a1) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~11) + (DELAY + (ABSOLUTE + (PORT dataa (1730:1730:1730) (1656:1656:1656)) + (PORT datab (1737:1737:1737) (1662:1662:1662)) + (PORT datac (949:949:949) (928:928:928)) + (PORT datad (2095:2095:2095) (1988:1988:1988)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (309:309:309) (358:358:358)) + (PORT datab (387:387:387) (473:473:473)) + (PORT datad (322:322:322) (393:393:393)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (933:933:933) (916:916:916)) + (PORT datab (1720:1720:1720) (1630:1630:1630)) + (PORT datac (905:905:905) (880:880:880)) + (PORT datad (833:833:833) (827:827:827)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (372:372:372) (463:463:463)) + (PORT datab (320:320:320) (357:357:357)) + (PORT datac (337:337:337) (426:426:426)) + (PORT datad (338:338:338) (419:419:419)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (827:827:827) (766:766:766)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1876:1876:1876)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1867:1867:1867)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (849:849:849) (807:807:807)) + (PORT datad (342:342:342) (427:427:427)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a9) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1876:1876:1876)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1867:1867:1867)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (849:849:849) (806:806:806)) + (PORT datab (384:384:384) (471:471:471)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1876:1876:1876)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1867:1867:1867)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~9) + (DELAY + (ABSOLUTE + (PORT datab (378:378:378) (465:465:465)) + (PORT datac (331:331:331) (414:414:414)) + (PORT datad (331:331:331) (408:408:408)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1876:1876:1876)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1867:1867:1867)) + (PORT ena (1742:1742:1742) (1651:1651:1651)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT datab (337:337:337) (414:414:414)) + (PORT datac (295:295:295) (373:373:373)) + (PORT datad (1299:1299:1299) (1243:1243:1243)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|parity6) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (373:373:373) (464:464:464)) + (PORT datab (343:343:343) (392:392:392)) + (PORT datac (800:800:800) (791:791:791)) + (PORT datad (544:544:544) (571:571:571)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (561:561:561) (607:607:607)) + (PORT datab (593:593:593) (620:620:620)) + (PORT datac (264:264:264) (309:309:309)) + (PORT datad (345:345:345) (429:429:429)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5\~0) + (DELAY + (ABSOLUTE + (PORT datab (278:278:278) (303:303:303)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a5) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (514:514:514) (501:501:501)) + (PORT datab (378:378:378) (462:462:462)) + (PORT datad (545:545:545) (574:574:574)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (918:918:918) (858:858:858)) + (PORT datab (925:925:925) (934:934:934)) + (PORT datad (340:340:340) (421:421:421)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a7) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (599:599:599) (630:630:630)) + (PORT datab (970:970:970) (978:978:978)) + (PORT datac (2000:2000:2000) (1888:1888:1888)) + (PORT datad (855:855:855) (827:827:827)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[0\]\~10) + (DELAY + (ABSOLUTE + (PORT datab (357:357:357) (447:447:447)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|rd_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (587:587:587) (645:645:645)) + (PORT datab (1212:1212:1212) (1182:1182:1182)) + (PORT datad (265:265:265) (297:297:297)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|rd_en) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT dataa (361:361:361) (453:453:453)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (465:465:465)) + (PORT datac (320:320:320) (414:414:414)) + (PORT datad (322:322:322) (405:405:405)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (376:376:376) (465:465:465)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[5\]\~20) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (423:423:423)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[6\]\~22) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (422:422:422)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (370:370:370) (450:450:450)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT dataa (374:374:374) (462:462:462)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~3) + (DELAY + (ABSOLUTE + (PORT datac (903:903:903) (903:903:903)) + (PORT datad (956:956:956) (947:947:947)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~5) + (DELAY + (ABSOLUTE + (PORT dataa (943:943:943) (903:903:903)) + (PORT datab (1046:1046:1046) (1032:1032:1032)) + (PORT datac (858:858:858) (814:814:814)) + (PORT datad (895:895:895) (852:852:852)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT datab (638:638:638) (651:651:651)) + (PORT datad (479:479:479) (462:462:462)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_CL) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1296:1296:1296) (1179:1179:1179)) + (PORT datab (370:370:370) (453:453:453)) + (PORT datad (478:478:478) (462:462:462)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_DATA) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (PORT datab (340:340:340) (423:423:423)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (301:301:301) (378:378:378)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~3) + (DELAY + (ABSOLUTE + (PORT dataa (938:938:938) (877:877:877)) + (PORT datab (957:957:957) (903:903:903)) + (PORT datac (349:349:349) (449:449:449)) + (PORT datad (870:870:870) (842:842:842)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_PRE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT datab (519:519:519) (506:506:506)) + (PORT datad (539:539:539) (561:561:561)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|trp_end\~1) + (DELAY + (ABSOLUTE + (PORT datab (556:556:556) (521:521:521)) + (PORT datac (581:581:581) (597:597:597)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_END) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (2564:2564:2564) (2442:2442:2442)) + (PORT datab (344:344:344) (427:427:427)) + (PORT datad (546:546:546) (593:593:593)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (2563:2563:2563) (2441:2441:2441)) + (PORT datab (345:345:345) (429:429:429)) + (PORT datad (305:305:305) (378:378:378)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_ACTIVE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT datab (556:556:556) (593:593:593)) + (PORT datad (478:478:478) (462:462:462)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_TRCD) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|trcd_end\~1) + (DELAY + (ABSOLUTE + (PORT datab (628:628:628) (635:635:635)) + (PORT datad (494:494:494) (470:470:470)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_state\.RD_READ) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (586:586:586) (643:643:643)) + (PORT datab (360:360:360) (436:436:436)) + (PORT datad (302:302:302) (375:375:375)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~2) + (DELAY + (ABSOLUTE + (PORT dataa (360:360:360) (462:462:462)) + (PORT datab (374:374:374) (463:463:463)) + (PORT datac (315:315:315) (408:408:408)) + (PORT datad (317:317:317) (400:400:400)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|tread_end\~4) + (DELAY + (ABSOLUTE + (PORT dataa (508:508:508) (497:497:497)) + (PORT datab (307:307:307) (332:332:332)) + (PORT datac (327:327:327) (412:412:412)) + (PORT datad (328:328:328) (405:405:405)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (PORT datab (362:362:362) (439:439:439)) + (PORT datac (531:531:531) (553:553:553)) + (PORT datad (988:988:988) (986:986:986)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (939:939:939) (899:899:899)) + (PORT datab (908:908:908) (851:851:851)) + (PORT datac (450:450:450) (427:427:427)) + (PORT datad (897:897:897) (854:854:854)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector5\~3) + (DELAY + (ABSOLUTE + (PORT dataa (931:931:931) (943:943:943)) + (PORT datab (1220:1220:1220) (1113:1113:1113)) + (PORT datac (266:266:266) (293:293:293)) + (PORT datad (816:816:816) (753:753:753)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_ack\~1) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (464:464:464)) + (PORT datab (376:376:376) (466:466:466)) + (PORT datac (320:320:320) (414:414:414)) + (PORT datad (322:322:322) (405:405:405)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~1) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (862:862:862) (806:806:806)) + (PORT datac (483:483:483) (460:460:460)) + (PORT datad (858:858:858) (814:814:814)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (335:335:335) (383:383:383)) + (PORT datab (396:396:396) (494:494:494)) + (PORT datad (951:951:951) (932:932:932)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a1) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (290:290:290) (330:330:330)) + (PORT datab (398:398:398) (497:497:497)) + (PORT datad (364:364:364) (449:449:449)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a2) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3\~0) + (DELAY + (ABSOLUTE + (PORT datab (405:405:405) (492:492:492)) + (PORT datad (256:256:256) (285:285:285)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a3) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (609:609:609) (645:645:645)) + (PORT datab (370:370:370) (454:454:454)) + (PORT datac (346:346:346) (444:444:444)) + (PORT datad (251:251:251) (279:279:279)) + (IOPATH dataa combout (392:392:392) (407:407:407)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (598:598:598) (629:629:629)) + (PORT datab (970:970:970) (978:978:978)) + (PORT datac (813:813:813) (750:750:750)) + (PORT datad (854:854:854) (826:826:826)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (658:658:658) (678:678:678)) + (PORT datad (247:247:247) (269:269:269)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a10) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (657:657:657) (677:677:677)) + (PORT datad (248:248:248) (270:270:270)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a9) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~6) + (DELAY + (ABSOLUTE + (PORT dataa (660:660:660) (680:680:680)) + (PORT datac (331:331:331) (414:414:414)) + (PORT datad (537:537:537) (564:564:564)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT dataa (391:391:391) (493:493:493)) + (PORT datab (405:405:405) (492:492:492)) + (PORT datac (363:363:363) (453:453:453)) + (PORT datad (356:356:356) (451:451:451)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|sub_parity10a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1135:1135:1135) (1146:1146:1146)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT datab (337:337:337) (413:413:413)) + (PORT datac (296:296:296) (374:374:374)) + (PORT datad (844:844:844) (839:839:839)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|parity9) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT datad (951:951:951) (932:932:932)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a0) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1135:1135:1135) (1146:1146:1146)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~1) + (DELAY + (ABSOLUTE + (PORT dataa (331:331:331) (379:379:379)) + (PORT datab (396:396:396) (494:494:494)) + (PORT datac (562:562:562) (591:591:591)) + (PORT datad (949:949:949) (929:929:929)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (389:389:389) (490:490:490)) + (PORT datab (297:297:297) (329:329:329)) + (PORT datad (571:571:571) (598:598:598)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a4) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (292:292:292) (332:332:332)) + (PORT datab (405:405:405) (493:493:493)) + (PORT datac (360:360:360) (451:451:451)) + (PORT datad (358:358:358) (453:453:453)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (390:390:390) (491:491:491)) + (PORT datab (369:369:369) (452:452:452)) + (PORT datad (240:240:240) (259:259:259)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a5) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (921:921:921) (861:861:861)) + (PORT datad (883:883:883) (890:890:890)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a6) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (1021:1021:1021) (1040:1040:1040)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1352:1352:1352) (1327:1327:1327)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (2086:2086:2086) (1993:1993:1993)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (PORT ena (1720:1720:1720) (1638:1638:1638)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1562:1562:1562) (1479:1479:1479)) + (PORT datab (368:368:368) (452:452:452)) + (PORT datad (319:319:319) (389:389:389)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (794:794:794) (869:869:869)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1369:1369:1369) (1347:1347:1347)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~0) + (DELAY + (ABSOLUTE + (PORT datab (380:380:380) (463:463:463)) + (PORT datac (882:882:882) (879:879:879)) + (PORT datad (355:355:355) (429:429:429)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8\~1) + (DELAY + (ABSOLUTE + (PORT dataa (922:922:922) (863:863:863)) + (PORT datad (240:240:240) (258:258:258)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g1p\|counter8a8) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (1062:1062:1062) (1085:1085:1085)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1336:1336:1336) (1314:1314:1314)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1412:1412:1412) (1348:1348:1348)) + (PORT datab (1382:1382:1382) (1317:1317:1317)) + (PORT datad (812:812:812) (777:777:777)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (311:311:311)) + (PORT datab (277:277:277) (302:302:302)) + (PORT datac (930:930:930) (878:878:878)) + (PORT datad (237:237:237) (256:256:256)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (1213:1213:1213) (1102:1102:1102)) + (PORT datab (341:341:341) (388:388:388)) + (PORT datac (338:338:338) (426:426:426)) + (PORT datad (805:805:805) (745:745:745)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_msb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (1441:1441:1441) (1405:1405:1405)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1293:1293:1293) (1224:1224:1224)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (2168:2168:2168) (2075:2075:2075)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (534:534:534) (557:557:557)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1293:1293:1293) (1224:1224:1224)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (1769:1769:1769) (1738:1738:1738)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1679:1679:1679) (1618:1618:1618)) + (PORT datab (854:854:854) (816:816:816)) + (PORT datad (1321:1321:1321) (1278:1278:1278)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (932:932:932) (937:937:937)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (1726:1726:1726) (1674:1674:1674)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (2464:2464:2464) (2342:2342:2342)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (1438:1438:1438) (1429:1429:1429)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1642:1642:1642) (1599:1599:1599)) + (PORT datab (1950:1950:1950) (1833:1833:1833)) + (PORT datad (296:296:296) (366:366:366)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (1713:1713:1713) (1587:1587:1587)) + (PORT datac (456:456:456) (430:430:430)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (2093:2093:2093) (1986:1986:1986)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (567:567:567) (584:584:584)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1293:1293:1293) (1224:1224:1224)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (1746:1746:1746) (1717:1717:1717)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdempty_eq_comp_lsb\|data_wire\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT datac (1342:1342:1342) (1286:1286:1286)) + (PORT datad (837:837:837) (827:827:827)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (1401:1401:1401) (1374:1374:1374)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1293:1293:1293) (1224:1224:1224)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|delayed_wrptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT asdata (2161:2161:2161) (2076:2076:2076)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (1352:1352:1352) (1302:1302:1302)) + (PORT datab (277:277:277) (302:302:302)) + (PORT datad (1653:1653:1653) (1538:1538:1538)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (2154:2154:2154) (2068:2068:2068)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (1322:1322:1322) (1305:1305:1305)) + (PORT datab (1713:1713:1713) (1656:1656:1656)) + (PORT datad (297:297:297) (367:367:367)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_mux\|result_node\[0\]\~7) + (DELAY + (ABSOLUTE + (PORT dataa (858:858:858) (770:770:770)) + (PORT datab (279:279:279) (305:305:305)) + (PORT datac (239:239:239) (265:265:265)) + (PORT datad (240:240:240) (259:259:259)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdemp_eq_comp_lsb_aeb) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_en_dly) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1868:1868:1868)) + (PORT asdata (788:788:788) (858:858:858)) + (PORT clrn (5995:5995:5995) (5789:5789:5789)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|valid_wreq) + (DELAY + (ABSOLUTE + (PORT dataa (350:350:350) (444:444:444)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (PORT datab (956:956:956) (934:934:934)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (433:433:433)) + (PORT datab (359:359:359) (450:450:450)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (430:430:430)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Add2\~6) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (426:426:426)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|bit_cnt\~0) + (DELAY + (ABSOLUTE + (PORT datab (362:362:362) (454:454:454)) + (PORT datac (237:237:237) (264:264:264)) + (PORT datad (258:258:258) (288:288:288)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (881:881:881) (855:855:855)) + (PORT datab (341:341:341) (422:422:422)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (352:352:352) (434:434:434)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (422:422:422)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (424:424:424)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (PORT datab (344:344:344) (426:426:426)) + (PORT datac (300:300:300) (384:384:384)) + (PORT datad (304:304:304) (381:381:381)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[3\]\~19) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (908:908:908) (903:903:903)) + (PORT datab (638:638:638) (646:646:646)) + (PORT datac (545:545:545) (577:577:577)) + (PORT datad (894:894:894) (882:882:882)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT datab (350:350:350) (438:438:438)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT datad (509:509:509) (540:540:540)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal4\~3) + (DELAY + (ABSOLUTE + (PORT dataa (555:555:555) (515:515:515)) + (PORT datab (556:556:556) (523:523:523)) + (PORT datac (237:237:237) (263:263:263)) + (PORT datad (527:527:527) (559:559:559)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT datab (359:359:359) (436:436:436)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1858:1858:1858) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (6180:6180:6180) (6010:6010:6010)) + (PORT sclr (1121:1121:1121) (1138:1138:1138)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (908:908:908) (903:903:903)) + (PORT datab (638:638:638) (647:647:647)) + (PORT datac (546:546:546) (578:578:578)) + (PORT datad (895:895:895) (883:883:883)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|Equal5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (497:497:497) (490:490:490)) + (PORT datab (277:277:277) (302:302:302)) + (PORT datac (507:507:507) (488:488:488)) + (PORT datad (526:526:526) (559:559:559)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|bit_cnt\~1) + (DELAY + (ABSOLUTE + (PORT datab (299:299:299) (331:331:331)) + (PORT datac (320:320:320) (416:416:416)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|always5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (345:345:345) (428:428:428)) + (PORT datac (300:300:300) (384:384:384)) + (PORT datad (304:304:304) (381:381:381)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|always5\~1) + (DELAY + (ABSOLUTE + (PORT datac (320:320:320) (416:416:416)) + (PORT datad (259:259:259) (289:289:289)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|rd_en) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~1) + (DELAY + (ABSOLUTE + (PORT dataa (913:913:913) (924:924:924)) + (PORT datab (982:982:982) (965:965:965)) + (PORT datac (948:948:948) (946:946:946)) + (PORT datad (918:918:918) (930:930:930)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~0) + (DELAY + (ABSOLUTE + (PORT dataa (356:356:356) (450:450:450)) + (PORT datac (526:526:526) (561:561:561)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty\~2) + (DELAY + (ABSOLUTE + (PORT dataa (904:904:904) (837:837:837)) + (PORT datab (278:278:278) (303:303:303)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_non_empty) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full\~4) + (DELAY + (ABSOLUTE + (PORT dataa (816:816:816) (738:738:738)) + (PORT datad (919:919:919) (929:929:929)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|b_full) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|_\~0) + (DELAY + (ABSOLUTE + (PORT dataa (566:566:566) (604:604:604)) + (PORT datab (577:577:577) (611:611:611)) + (PORT datac (309:309:309) (399:399:399)) + (PORT datad (919:919:919) (929:929:929)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|fifo_state\|count_usedw\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1862:1862:1862) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (1606:1606:1606) (1509:1509:1509)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (790:790:790) (861:861:861)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT asdata (1021:1021:1021) (1029:1029:1029)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (PORT ena (1689:1689:1689) (1611:1611:1611)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (591:591:591) (628:628:628)) + (PORT datab (379:379:379) (462:462:462)) + (PORT datac (321:321:321) (399:399:399)) + (PORT datad (563:563:563) (582:582:582)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (948:948:948) (966:966:966)) + (PORT datab (1028:1028:1028) (1018:1018:1018)) + (PORT datac (967:967:967) (967:967:967)) + (PORT datad (909:909:909) (860:860:860)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor3) + (DELAY + (ABSOLUTE + (PORT datac (1300:1300:1300) (1278:1278:1278)) + (PORT datad (255:255:255) (281:281:281)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor2) + (DELAY + (ABSOLUTE + (PORT dataa (1329:1329:1329) (1294:1294:1294)) + (PORT datac (1301:1301:1301) (1278:1278:1278)) + (PORT datad (255:255:255) (281:281:281)) + (IOPATH dataa combout (471:471:471) (481:481:481)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (1414:1414:1414) (1385:1385:1385)) + (PORT clrn (1895:1895:1895) (1865:1865:1865)) + (PORT ena (1708:1708:1708) (1615:1615:1615)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1285:1285:1285) (1241:1241:1241)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1270:1270:1270) (1242:1242:1242)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (1618:1618:1618) (1524:1524:1524)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (PORT ena (2086:2086:2086) (1974:1974:1974)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT asdata (795:795:795) (871:871:871)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (1818:1818:1818) (1758:1758:1758)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (PORT ena (1720:1720:1720) (1638:1638:1638)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT asdata (1403:1403:1403) (1389:1389:1389)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT asdata (2057:2057:2057) (1942:1942:1942)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (PORT ena (1720:1720:1720) (1638:1638:1638)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[10\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (899:899:899) (900:900:900)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[9\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (909:909:909) (896:896:896)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor7) + (DELAY + (ABSOLUTE + (PORT dataa (549:549:549) (580:580:580)) + (PORT datab (340:340:340) (422:422:422)) + (PORT datac (309:309:309) (399:399:399)) + (PORT datad (535:535:535) (558:558:558)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor4) + (DELAY + (ABSOLUTE + (PORT dataa (338:338:338) (421:421:421)) + (PORT datab (343:343:343) (425:425:425)) + (PORT datac (308:308:308) (395:395:395)) + (PORT datad (256:256:256) (281:281:281)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor1) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (437:437:437)) + (PORT datab (336:336:336) (412:412:412)) + (PORT datac (310:310:310) (398:398:398)) + (PORT datad (855:855:855) (809:809:809)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT asdata (1805:1805:1805) (1740:1740:1740)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor0) + (DELAY + (ABSOLUTE + (PORT datac (297:297:297) (375:375:375)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~2) + (DELAY + (ABSOLUTE + (PORT dataa (889:889:889) (882:882:882)) + (PORT datab (850:850:850) (822:822:822)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~4) + (DELAY + (ABSOLUTE + (PORT dataa (593:593:593) (605:605:605)) + (PORT datab (901:901:901) (887:887:887)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~6) + (DELAY + (ABSOLUTE + (PORT dataa (548:548:548) (572:572:572)) + (PORT datab (937:937:937) (917:917:917)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (279:279:279) (311:311:311)) + (PORT datab (286:286:286) (314:314:314)) + (PORT datac (245:245:245) (276:276:276)) + (PORT datad (247:247:247) (269:269:269)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor8) + (DELAY + (ABSOLUTE + (PORT datab (345:345:345) (428:428:428)) + (PORT datac (312:312:312) (402:402:402)) + (PORT datad (539:539:539) (562:562:562)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor5) + (DELAY + (ABSOLUTE + (PORT datab (345:345:345) (428:428:428)) + (PORT datac (309:309:309) (397:397:397)) + (PORT datad (258:258:258) (283:283:283)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1862:1862:1862)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1853:1853:1853)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~8) + (DELAY + (ABSOLUTE + (PORT dataa (1263:1263:1263) (1217:1217:1217)) + (PORT datab (922:922:922) (918:918:918)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~10) + (DELAY + (ABSOLUTE + (PORT dataa (893:893:893) (903:903:903)) + (PORT datab (984:984:984) (957:957:957)) + (IOPATH dataa combout (461:461:461) (486:486:486)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (455:455:455) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~12) + (DELAY + (ABSOLUTE + (PORT dataa (1196:1196:1196) (1143:1143:1143)) + (PORT datab (929:929:929) (925:925:925)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~16) + (DELAY + (ABSOLUTE + (PORT dataa (945:945:945) (949:949:949)) + (PORT datab (965:965:965) (942:942:942)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (473:473:473) (489:489:489)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (905:905:905) (858:858:858)) + (PORT datab (855:855:855) (804:804:804)) + (PORT datac (932:932:932) (877:877:877)) + (PORT datad (861:861:861) (804:804:804)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_en\~1) + (DELAY + (ABSOLUTE + (PORT dataa (289:289:289) (324:324:324)) + (PORT datab (1000:1000:1000) (985:985:985)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_en) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5995:5995:5995) (5789:5789:5789)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|valid_rdreq\~0) + (DELAY + (ABSOLUTE + (PORT datab (334:334:334) (410:410:410)) + (PORT datac (1312:1312:1312) (1277:1277:1277)) + (PORT datad (1296:1296:1296) (1256:1256:1256)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (374:374:374) (465:465:465)) + (PORT datab (341:341:341) (389:389:389)) + (PORT datac (803:803:803) (794:794:794)) + (PORT datad (548:548:548) (575:575:575)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (240:240:240) (258:258:258)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (307:307:307) (356:356:356)) + (PORT datad (347:347:347) (430:430:430)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a3) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~5) + (DELAY + (ABSOLUTE + (PORT dataa (562:562:562) (609:609:609)) + (PORT datab (593:593:593) (620:620:620)) + (PORT datac (260:260:260) (304:304:304)) + (PORT datad (347:347:347) (430:430:430)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6\~0) + (DELAY + (ABSOLUTE + (PORT datab (320:320:320) (357:357:357)) + (PORT datad (545:545:545) (574:574:574)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a6) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (984:984:984) (964:964:964)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1872:1872:1872)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1863:1863:1863)) + (PORT ena (1720:1720:1720) (1638:1638:1638)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp\|dffpipe15\|dffe16a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT asdata (1406:1406:1406) (1385:1385:1385)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_dgrp_gray2bin\|xor6) + (DELAY + (ABSOLUTE + (PORT datac (314:314:314) (403:403:403)) + (PORT datad (254:254:254) (278:278:278)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_brp\|dffe12a\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1858:1858:1858)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (281:281:281) (314:314:314)) + (PORT datab (278:278:278) (304:304:304)) + (PORT datac (238:238:238) (264:264:264)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|wrptr_g_gray2bin\|xor9) + (DELAY + (ABSOLUTE + (PORT dataa (594:594:594) (631:631:631)) + (PORT datad (335:335:335) (416:416:416)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|ws_bwp\|dffe12a\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1891:1891:1891) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|op_2\~18) + (DELAY + (ABSOLUTE + (PORT dataa (949:949:949) (933:933:933)) + (PORT datad (889:889:889) (886:886:886)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~2) + (DELAY + (ABSOLUTE + (PORT dataa (279:279:279) (310:310:310)) + (PORT datab (1958:1958:1958) (1762:1762:1762)) + (PORT datac (1882:1882:1882) (1695:1695:1695)) + (PORT datad (267:267:267) (285:285:285)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1884:1884:1884) (1709:1709:1709)) + (PORT datab (303:303:303) (327:327:327)) + (PORT datac (265:265:265) (291:291:291)) + (PORT datad (236:236:236) (254:254:254)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|sdram_rd_req) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1864:1864:1864)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1855:1855:1855)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1643:1643:1643) (1583:1583:1583)) + (PORT datab (921:921:921) (928:928:928)) + (PORT datac (1168:1168:1168) (1141:1141:1141)) + (PORT datad (330:330:330) (404:404:404)) + (IOPATH dataa combout (392:392:392) (407:407:407)) + (IOPATH datab combout (393:393:393) (412:412:412)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (583:583:583) (640:640:640)) + (PORT datad (331:331:331) (408:408:408)) + (IOPATH dataa combout (421:421:421) (428:428:428)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector3\~1) + (DELAY + (ABSOLUTE + (PORT dataa (308:308:308) (349:349:349)) + (PORT datab (1213:1213:1213) (1184:1184:1184)) + (PORT datac (1552:1552:1552) (1461:1461:1461)) + (PORT datad (241:241:241) (260:260:260)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.READ) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~7) + (DELAY + (ABSOLUTE + (PORT datab (643:643:643) (658:658:658)) + (PORT datac (503:503:503) (515:515:515)) + (PORT datad (550:550:550) (579:579:579)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (582:582:582) (557:557:557)) + (PORT datab (383:383:383) (471:471:471)) + (PORT datad (265:265:265) (282:282:282)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_DATA) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|twrite_end\~0) + (DELAY + (ABSOLUTE + (PORT dataa (365:365:365) (468:468:468)) + (PORT datab (363:363:363) (459:459:459)) + (PORT datac (321:321:321) (416:416:416)) + (PORT datad (324:324:324) (407:407:407)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|twrite_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (549:549:549) (562:562:562)) + (PORT datab (330:330:330) (372:372:372)) + (PORT datac (369:369:369) (483:483:483)) + (PORT datad (806:806:806) (727:727:727)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_PRE) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (313:313:313) (350:350:350)) + (PORT datad (553:553:553) (578:578:578)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|trp_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (550:550:550) (563:563:563)) + (PORT datab (351:351:351) (440:440:440)) + (PORT datac (289:289:289) (335:335:335)) + (PORT datad (500:500:500) (474:474:474)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_END) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1300:1300:1300) (1273:1273:1273)) + (PORT datab (1603:1603:1603) (1500:1500:1500)) + (PORT datad (264:264:264) (295:295:295)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.WRITE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (588:588:588) (645:645:645)) + (PORT datab (368:368:368) (447:447:447)) + (PORT datac (1253:1253:1253) (1222:1222:1222)) + (PORT datad (324:324:324) (395:395:395)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (831:831:831) (793:793:793)) + (PORT datab (278:278:278) (303:303:303)) + (PORT datac (237:237:237) (263:263:263)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.ARBIT) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT datab (1162:1162:1162) (1191:1191:1191)) + (PORT datac (331:331:331) (415:415:415)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1265:1265:1265) (1242:1242:1242)) + (PORT datab (378:378:378) (485:485:485)) + (PORT datad (585:585:585) (612:612:612)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\~4) + (DELAY + (ABSOLUTE + (PORT datad (580:580:580) (615:615:615)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\~2) + (DELAY + (ABSOLUTE + (PORT dataa (651:651:651) (674:674:674)) + (PORT datad (312:312:312) (393:393:393)) + (IOPATH dataa combout (453:453:453) (446:446:446)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (PORT ena (1083:1083:1083) (1077:1077:1077)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~15) + (DELAY + (ABSOLUTE + (PORT datac (302:302:302) (384:384:384)) + (PORT datad (309:309:309) (388:388:388)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (299:299:299) (342:342:342)) + (PORT datad (569:569:569) (588:588:588)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~1) + (DELAY + (ABSOLUTE + (PORT datab (287:287:287) (318:318:318)) + (PORT datad (330:330:330) (423:423:423)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT datab (367:367:367) (463:463:463)) + (PORT datac (308:308:308) (395:395:395)) + (PORT datad (531:531:531) (572:572:572)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~1) + (DELAY + (ABSOLUTE + (PORT dataa (648:648:648) (671:671:671)) + (PORT datab (341:341:341) (422:422:422)) + (PORT datac (254:254:254) (293:293:293)) + (PORT datad (321:321:321) (392:392:392)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (308:308:308) (357:357:357)) + (PORT datab (359:359:359) (448:448:448)) + (PORT datad (248:248:248) (270:270:270)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~0) + (DELAY + (ABSOLUTE + (PORT dataa (578:578:578) (628:628:628)) + (PORT datab (283:283:283) (314:314:314)) + (PORT datad (329:329:329) (422:422:422)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (573:573:573) (623:623:623)) + (PORT datab (369:369:369) (464:464:464)) + (PORT datac (310:310:310) (398:398:398)) + (PORT datad (320:320:320) (407:407:407)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector3\~1) + (DELAY + (ABSOLUTE + (PORT datab (279:279:279) (304:304:304)) + (PORT datac (329:329:329) (412:412:412)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_TRF) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\~2) + (DELAY + (ABSOLUTE + (PORT dataa (307:307:307) (356:356:356)) + (PORT datab (362:362:362) (451:451:451)) + (PORT datad (247:247:247) (269:269:269)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|trc_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (571:571:571) (621:621:621)) + (PORT datab (368:368:368) (464:464:464)) + (PORT datac (310:310:310) (398:398:398)) + (PORT datad (320:320:320) (407:407:407)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (296:296:296) (339:339:339)) + (PORT datab (281:281:281) (307:307:307)) + (PORT datac (305:305:305) (389:389:389)) + (PORT datad (266:266:266) (306:306:306)) + (IOPATH dataa combout (453:453:453) (446:446:446)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AUTO_REF) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[1\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (649:649:649) (672:672:672)) + (PORT datac (331:331:331) (414:414:414)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (PORT ena (1083:1083:1083) (1077:1077:1077)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~17) + (DELAY + (ABSOLUTE + (PORT dataa (308:308:308) (357:357:357)) + (PORT datab (356:356:356) (439:439:439)) + (PORT datac (304:304:304) (387:387:387)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_END) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|aref_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (1162:1162:1162) (1191:1191:1191)) + (PORT datac (330:330:330) (414:414:414)) + (PORT datad (582:582:582) (608:608:608)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|state\.AREF) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (PORT ena (1043:1043:1043) (1024:1024:1024)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~3) + (DELAY + (ABSOLUTE + (PORT datad (254:254:254) (282:282:282)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~2) + (DELAY + (ABSOLUTE + (PORT datab (406:406:406) (518:518:518)) + (PORT datad (258:258:258) (288:288:288)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~1) + (DELAY + (ABSOLUTE + (PORT datab (377:377:377) (459:459:459)) + (PORT datac (360:360:360) (466:466:466)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1242:1242:1242) (1201:1201:1201)) + (PORT datab (403:403:403) (515:515:515)) + (PORT datad (256:256:256) (284:284:284)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TRP) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (437:437:437)) + (PORT datab (403:403:403) (514:514:514)) + (PORT datac (303:303:303) (386:386:386)) + (PORT datad (254:254:254) (282:282:282)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~3) + (DELAY + (ABSOLUTE + (PORT dataa (884:884:884) (886:886:886)) + (PORT datad (329:329:329) (403:403:403)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~10) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~4) + (DELAY + (ABSOLUTE + (PORT dataa (932:932:932) (905:905:905)) + (PORT datab (923:923:923) (892:892:892)) + (PORT datac (831:831:831) (810:810:810)) + (PORT datad (893:893:893) (884:884:884)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\~0) + (DELAY + (ABSOLUTE + (PORT dataa (862:862:862) (789:789:789)) + (PORT datab (278:278:278) (303:303:303)) + (PORT datac (238:238:238) (264:264:264)) + (PORT datad (245:245:245) (271:271:271)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~2) + (DELAY + (ABSOLUTE + (PORT datab (358:358:358) (434:434:434)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~4) + (DELAY + (ABSOLUTE + (PORT datab (359:359:359) (435:435:435)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~8) + (DELAY + (ABSOLUTE + (PORT datab (359:359:359) (436:436:436)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~14) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~16) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~18) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~20) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~22) + (DELAY + (ABSOLUTE + (PORT dataa (345:345:345) (433:433:433)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~24) + (DELAY + (ABSOLUTE + (PORT datab (343:343:343) (422:422:422)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add0\~28) + (DELAY + (ABSOLUTE + (PORT datad (507:507:507) (538:538:538)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[14\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_200us\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1879:1879:1879)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1895:1895:1895) (1870:1870:1870)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (343:343:343) (432:432:432)) + (PORT datab (544:544:544) (578:578:578)) + (PORT datac (301:301:301) (385:385:385)) + (PORT datad (301:301:301) (378:378:378)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (874:874:874) (862:862:862)) + (PORT datab (908:908:908) (890:890:890)) + (PORT datac (867:867:867) (838:838:838)) + (PORT datad (894:894:894) (857:857:857)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (858:858:858) (853:853:853)) + (PORT datac (764:764:764) (706:706:706)) + (PORT datad (237:237:237) (255:255:255)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (930:930:930) (903:903:903)) + (PORT datab (920:920:920) (889:889:889)) + (PORT datac (826:826:826) (806:806:806)) + (PORT datad (894:894:894) (885:885:885)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (888:888:888) (890:890:890)) + (PORT datab (287:287:287) (316:316:316)) + (PORT datac (486:486:486) (463:463:463)) + (PORT datad (330:330:330) (404:404:404)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_IDLE\~0) + (DELAY + (ABSOLUTE + (PORT datad (246:246:246) (271:271:271)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (311:311:311)) + (PORT datab (386:386:386) (464:464:464)) + (PORT datac (239:239:239) (266:266:266)) + (PORT datad (1280:1280:1280) (1223:1223:1223)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\~4) + (DELAY + (ABSOLUTE + (PORT dataa (579:579:579) (612:612:612)) + (PORT datab (295:295:295) (327:327:327)) + (PORT datad (339:339:339) (419:419:419)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Add1\~0) + (DELAY + (ABSOLUTE + (PORT datab (403:403:403) (515:515:515)) + (PORT datad (335:335:335) (415:415:415)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_END\~0) + (DELAY + (ABSOLUTE + (PORT dataa (347:347:347) (437:437:437)) + (PORT datab (405:405:405) (510:510:510)) + (PORT datad (504:504:504) (485:485:485)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_END) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (367:367:367) (451:451:451)) + (PORT datab (378:378:378) (485:485:485)) + (PORT datac (1219:1219:1219) (1192:1192:1192)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_state\.AREF_PCHA) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (628:628:628) (641:641:641)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (633:633:633) (644:644:644)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (576:576:576) (599:599:599)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~8) + (DELAY + (ABSOLUTE + (PORT datab (567:567:567) (587:587:587)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~4) + (DELAY + (ABSOLUTE + (PORT datac (492:492:492) (466:466:466)) + (PORT datad (311:311:311) (357:357:357)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[3\]\~1) + (DELAY + (ABSOLUTE + (PORT datac (1574:1574:1574) (1507:1507:1507)) + (PORT datad (318:318:318) (365:365:365)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT ena (1037:1037:1037) (1012:1012:1012)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~10) + (DELAY + (ABSOLUTE + (PORT datab (369:369:369) (450:450:450)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[5\]\~10) + (DELAY + (ABSOLUTE + (PORT dataa (588:588:588) (562:562:562)) + (PORT datab (1360:1360:1360) (1352:1352:1352)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1861:1861:1861)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~12) + (DELAY + (ABSOLUTE + (PORT datab (370:370:370) (450:450:450)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[6\]\~9) + (DELAY + (ABSOLUTE + (PORT dataa (588:588:588) (562:562:562)) + (PORT datab (1360:1360:1360) (1353:1353:1353)) + (PORT datad (239:239:239) (258:258:258)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1861:1861:1861)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~14) + (DELAY + (ABSOLUTE + (PORT dataa (371:371:371) (459:459:459)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[7\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (592:592:592) (567:567:567)) + (PORT datab (1358:1358:1358) (1349:1349:1349)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1861:1861:1861)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~0) + (DELAY + (ABSOLUTE + (PORT datac (494:494:494) (468:468:468)) + (PORT datad (315:315:315) (362:362:362)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT ena (1037:1037:1037) (1012:1012:1012)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~7) + (DELAY + (ABSOLUTE + (PORT datac (495:495:495) (469:469:469)) + (PORT datad (318:318:318) (365:365:365)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT ena (1037:1037:1037) (1012:1012:1012)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\~8) + (DELAY + (ABSOLUTE + (PORT datab (356:356:356) (403:403:403)) + (PORT datad (451:451:451) (429:429:429)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (PORT ena (1037:1037:1037) (1012:1012:1012)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (372:372:372) (459:459:459)) + (PORT datab (368:368:368) (451:451:451)) + (PORT datac (318:318:318) (396:396:396)) + (PORT datad (321:321:321) (391:391:391)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (370:370:370) (460:460:460)) + (PORT datab (628:628:628) (638:638:638)) + (PORT datac (239:239:239) (265:265:265)) + (PORT datad (569:569:569) (582:582:582)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|LessThan0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (578:578:578) (611:611:611)) + (PORT datab (367:367:367) (448:448:448)) + (PORT datac (579:579:579) (595:595:595)) + (PORT datad (236:236:236) (254:254:254)) + (IOPATH dataa combout (393:393:393) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~16) + (DELAY + (ABSOLUTE + (PORT datab (558:558:558) (589:589:589)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[8\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1618:1618:1618) (1555:1555:1555)) + (PORT datab (353:353:353) (400:400:400)) + (PORT datad (483:483:483) (451:451:451)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1860:1860:1860) (1871:1871:1871)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1862:1862:1862)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Add0\~18) + (DELAY + (ABSOLUTE + (PORT datad (332:332:332) (410:410:410)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[9\]\~5) + (DELAY + (ABSOLUTE + (PORT dataa (588:588:588) (562:562:562)) + (PORT datab (1361:1361:1361) (1353:1353:1353)) + (PORT datad (240:240:240) (259:259:259)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|cnt_aref\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1892:1892:1892) (1861:1861:1861)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (631:631:631) (641:641:641)) + (PORT datab (372:372:372) (453:453:453)) + (PORT datac (326:326:326) (411:411:411)) + (PORT datad (560:560:560) (584:584:584)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|Equal0\~2) + (DELAY + (ABSOLUTE + (PORT datab (276:276:276) (301:301:301)) + (PORT datac (330:330:330) (416:416:416)) + (PORT datad (332:332:332) (410:410:410)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_req\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1177:1177:1177) (1090:1090:1090)) + (PORT datab (364:364:364) (441:441:441)) + (PORT datad (1115:1115:1115) (1021:1021:1021)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_req) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT datac (879:879:879) (890:890:890)) + (PORT datad (330:330:330) (404:404:404)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|wr_en\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1301:1301:1301) (1273:1273:1273)) + (PORT datab (1604:1604:1604) (1500:1500:1500)) + (PORT datad (264:264:264) (296:296:296)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|wr_en) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1297:1297:1297) (1269:1269:1269)) + (PORT datab (349:349:349) (433:433:433)) + (PORT datad (2523:2523:2523) (2391:2391:2391)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_IDLE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~1) + (DELAY + (ABSOLUTE + (PORT datab (636:636:636) (650:650:650)) + (PORT datac (907:907:907) (907:907:907)) + (PORT datad (530:530:530) (554:554:554)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (316:316:316) (354:354:354)) + (PORT datab (352:352:352) (441:441:441)) + (PORT datac (238:238:238) (264:264:264)) + (PORT datad (527:527:527) (548:548:548)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector4\~2) + (DELAY + (ABSOLUTE + (PORT dataa (980:980:980) (952:952:952)) + (PORT datab (507:507:507) (492:492:492)) + (PORT datac (236:236:236) (262:262:262)) + (PORT datad (435:435:435) (409:409:409)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[1\]\~12) + (DELAY + (ABSOLUTE + (PORT datab (356:356:356) (442:442:442)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[2\]\~14) + (DELAY + (ABSOLUTE + (PORT datab (356:356:356) (446:446:446)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[4\]\~18) + (DELAY + (ABSOLUTE + (PORT datab (341:341:341) (422:422:422)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[7\]\~24) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[8\]\~26) + (DELAY + (ABSOLUTE + (PORT datab (361:361:361) (438:438:438)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[9\]\~28) + (DELAY + (ABSOLUTE + (PORT datab (363:363:363) (440:440:440)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|cnt_clk\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1853:1853:1853) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (PORT sclr (903:903:903) (965:965:965)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Equal0\~5) + (DELAY + (ABSOLUTE + (PORT datab (641:641:641) (656:656:656)) + (PORT datad (548:548:548) (578:578:578)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (892:892:892) (883:883:883)) + (PORT datad (831:831:831) (784:784:784)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_TRCD) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|trcd_end\~1) + (DELAY + (ABSOLUTE + (PORT dataa (550:550:550) (563:563:563)) + (PORT datab (331:331:331) (373:373:373)) + (PORT datac (560:560:560) (591:591:591)) + (PORT datad (500:500:500) (474:474:474)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_WRITE) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack\~2) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (465:465:465)) + (PORT datab (359:359:359) (455:455:455)) + (PORT datac (319:319:319) (413:413:413)) + (PORT datad (321:321:321) (404:404:404)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack\~3) + (DELAY + (ABSOLUTE + (PORT dataa (549:549:549) (563:563:563)) + (PORT datab (328:328:328) (369:369:369)) + (PORT datac (363:363:363) (475:475:475)) + (PORT datad (483:483:483) (451:451:451)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1356:1356:1356) (1312:1312:1312)) + (PORT datab (360:360:360) (437:437:437)) + (PORT datac (319:319:319) (397:397:397)) + (PORT datad (1274:1274:1274) (1238:1238:1238)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~4) + (DELAY + (ABSOLUTE + (PORT dataa (1276:1276:1276) (1244:1244:1244)) + (PORT datab (1567:1567:1567) (1494:1494:1494)) + (PORT datac (1139:1139:1139) (1039:1039:1039)) + (PORT datad (239:239:239) (257:257:257)) + (IOPATH dataa combout (421:421:421) (428:428:428)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4\~0) + (DELAY + (ABSOLUTE + (PORT dataa (408:408:408) (506:506:506)) + (PORT datab (290:290:290) (327:327:327)) + (PORT datad (1289:1289:1289) (1252:1252:1252)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a4) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~12) + (DELAY + (ABSOLUTE + (PORT dataa (1374:1374:1374) (1316:1316:1316)) + (PORT datab (982:982:982) (971:971:971)) + (PORT datac (1232:1232:1232) (1185:1185:1185)) + (PORT datad (921:921:921) (901:901:901)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (PORT ena (1757:1757:1757) (1679:1679:1679)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~11) + (DELAY + (ABSOLUTE + (PORT dataa (943:943:943) (948:948:948)) + (PORT datab (1259:1259:1259) (1212:1212:1212)) + (PORT datac (1271:1271:1271) (1218:1218:1218)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|sub_parity7a\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~10) + (DELAY + (ABSOLUTE + (PORT dataa (341:341:341) (426:426:426)) + (PORT datac (295:295:295) (373:373:373)) + (PORT datad (903:903:903) (893:893:893)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|parity6) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (PORT ena (1757:1757:1757) (1679:1679:1679)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~2) + (DELAY + (ABSOLUTE + (PORT dataa (897:897:897) (901:901:901)) + (PORT datab (402:402:402) (486:486:486)) + (PORT datac (338:338:338) (428:428:428)) + (PORT datad (967:967:967) (924:924:924)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2\~0) + (DELAY + (ABSOLUTE + (PORT datad (238:238:238) (257:257:257)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a2) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~7) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (369:369:369) (449:449:449)) + (PORT datac (1193:1193:1193) (1150:1150:1150)) + (PORT datad (966:966:966) (923:923:923)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1375:1375:1375) (1318:1318:1318)) + (PORT datab (302:302:302) (342:342:342)) + (PORT datad (921:921:921) (901:901:901)) + (IOPATH dataa combout (421:421:421) (418:418:418)) + (IOPATH datab combout (407:407:407) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a7) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~8) + (DELAY + (ABSOLUTE + (PORT dataa (1378:1378:1378) (1322:1322:1322)) + (PORT datab (979:979:979) (967:967:967)) + (PORT datac (261:261:261) (305:305:305)) + (PORT datad (916:916:916) (896:896:896)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (455:455:455) (412:412:412)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8\~0) + (DELAY + (ABSOLUTE + (PORT datad (237:237:237) (255:255:255)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a8) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10\~0) + (DELAY + (ABSOLUTE + (PORT datab (372:372:372) (453:453:453)) + (PORT datad (243:243:243) (268:268:268)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a10) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1876:1876:1876) (1848:1848:1848)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1844:1844:1844) (1857:1857:1857)) + (PORT asdata (1675:1675:1675) (1632:1632:1632)) + (PORT clrn (1877:1877:1877) (1848:1848:1848)) + (PORT ena (1106:1106:1106) (1090:1090:1090)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1003:1003:1003) (991:991:991)) + (PORT datab (913:913:913) (914:914:914)) + (PORT datad (548:548:548) (570:570:570)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (462:462:462)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1138:1138:1138) (1041:1041:1041)) + (PORT datab (337:337:337) (379:379:379)) + (PORT datac (324:324:324) (425:425:425)) + (PORT datad (832:832:832) (775:775:775)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux\|result_node\[0\]\~6) + (DELAY + (ABSOLUTE + (PORT dataa (279:279:279) (311:311:311)) + (PORT datab (345:345:345) (389:389:389)) + (PORT datac (454:454:454) (431:431:431)) + (PORT datad (964:964:964) (952:952:952)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|wrfull_eq_comp_msb_mux_reg) + (DELAY + (ABSOLUTE + (PORT clk (1842:1842:1842) (1854:1854:1854)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1845:1845:1845)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|valid_wrreq\~0) + (DELAY + (ABSOLUTE + (PORT dataa (334:334:334) (417:417:417)) + (PORT datad (296:296:296) (366:366:366)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[0\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2339:2339:2339) (2308:2308:2308)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[1\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2339:2339:2339) (2308:2308:2308)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE rx\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (796:796:796) (842:842:842)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg1\~0) + (DELAY + (ABSOLUTE + (PORT datad (4105:4105:4105) (4296:4296:4296)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg1) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1860:1860:1860)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1851:1851:1851)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg2\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (296:296:296) (366:366:366)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg2) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1860:1860:1860)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1851:1851:1851)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_reg3\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (303:303:303) (379:379:379)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_reg3) + (DELAY + (ABSOLUTE + (PORT clk (1850:1850:1850) (1860:1860:1860)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1882:1882:1882) (1851:1851:1851)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[7\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (906:906:906) (895:895:895)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|bit_cnt\~0) + (DELAY + (ABSOLUTE + (PORT dataa (281:281:281) (314:314:314)) + (PORT datab (368:368:368) (467:467:467)) + (PORT datad (262:262:262) (297:297:297)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|bit_cnt\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1851:1851:1851) (1863:1863:1863)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1854:1854:1854)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|always8\~0) + (DELAY + (ABSOLUTE + (PORT datab (304:304:304) (342:342:342)) + (PORT datac (327:327:327) (428:428:428)) + (PORT datad (321:321:321) (409:409:409)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT asdata (770:770:770) (844:844:844)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (304:304:304) (378:378:378)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (306:306:306) (380:380:380)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (303:303:303) (376:376:376)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (308:308:308) (382:382:382)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (307:307:307) (381:381:381)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|rx_data\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (306:306:306) (380:380:380)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|rx_data\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2013:2013:2013) (1892:1892:1892)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[0\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (297:297:297) (367:367:367)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|ram_address_a\[9\]) + (DELAY + (ABSOLUTE + (PORT datad (330:330:330) (404:404:404)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0\~_wirecell) + (DELAY + (ABSOLUTE + (PORT datad (1285:1285:1285) (1253:1253:1253)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT datab (1258:1258:1258) (1210:1210:1210)) + (PORT datac (897:897:897) (898:898:898)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[1\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (303:303:303) (377:377:377)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[2\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (305:305:305) (380:380:380)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[3\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (308:308:308) (383:383:383)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[4\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (306:306:306) (379:379:379)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[5\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (304:304:304) (378:378:378)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_rx_inst\|po_data\[6\]\~feeder) + (DELAY + (ABSOLUTE + (PORT datad (306:306:306) (379:379:379)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_rx_inst\|po_data\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1848:1848:1848) (1858:1858:1858)) + (PORT asdata (770:770:770) (844:844:844)) + (PORT clrn (1880:1880:1880) (1849:1849:1849)) + (PORT ena (2016:2016:2016) (1942:1942:1942)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (972:972:972) (971:971:971)) + (PORT d[1] (1038:1038:1038) (1027:1027:1027)) + (PORT d[2] (985:985:985) (968:968:968)) + (PORT d[3] (970:970:970) (964:964:964)) + (PORT d[4] (997:997:997) (990:990:990)) + (PORT d[5] (1000:1000:1000) (994:994:994)) + (PORT d[6] (985:985:985) (968:968:968)) + (PORT d[7] (963:963:963) (964:964:964)) + (PORT d[8] (607:607:607) (590:590:590)) + (PORT clk (2261:2261:2261) (2289:2289:2289)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1350:1350:1350) (1313:1313:1313)) + (PORT d[1] (1573:1573:1573) (1549:1549:1549)) + (PORT d[2] (1399:1399:1399) (1369:1369:1369)) + (PORT d[3] (1767:1767:1767) (1706:1706:1706)) + (PORT d[4] (1342:1342:1342) (1310:1310:1310)) + (PORT d[5] (1406:1406:1406) (1368:1368:1368)) + (PORT d[6] (1726:1726:1726) (1667:1667:1667)) + (PORT d[7] (1330:1330:1330) (1286:1286:1286)) + (PORT d[8] (1374:1374:1374) (1352:1352:1352)) + (PORT d[9] (1214:1214:1214) (1122:1122:1122)) + (PORT clk (2257:2257:2257) (2284:2284:2284)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (2463:2463:2463) (2259:2259:2259)) + (PORT clk (2257:2257:2257) (2284:2284:2284)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2261:2261:2261) (2289:2289:2289)) + (PORT d[0] (3170:3170:3170) (2973:2973:2973)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2262:2262:2262) (2290:2290:2290)) + (IOPATH (posedge clk) pulse (0:0:0) (2750:2750:2750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2262:2262:2262) (2290:2290:2290)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2262:2262:2262) (2290:2290:2290)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2262:2262:2262) (2290:2290:2290)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1267:1267:1267) (1201:1201:1201)) + (PORT d[1] (1547:1547:1547) (1522:1522:1522)) + (PORT d[2] (1753:1753:1753) (1686:1686:1686)) + (PORT d[3] (1380:1380:1380) (1348:1348:1348)) + (PORT d[4] (1715:1715:1715) (1647:1647:1647)) + (PORT d[5] (1078:1078:1078) (1070:1070:1070)) + (PORT d[6] (1320:1320:1320) (1285:1285:1285)) + (PORT d[7] (1320:1320:1320) (1279:1279:1279)) + (PORT d[8] (1365:1365:1365) (1347:1347:1347)) + (PORT d[9] (1215:1215:1215) (1118:1118:1118)) + (PORT clk (2211:2211:2211) (2198:2198:2198)) + (PORT aclr (2253:2253:2253) (2246:2246:2246)) + (PORT stall (1610:1610:1610) (1736:1736:1736)) + (IOPATH (posedge aclr) q (396:396:396) (396:396:396)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + (HOLD stall (posedge clk) (254:254:254)) + (HOLD aclr (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (2211:2211:2211) (2198:2198:2198)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2212:2212:2212) (2199:2199:2199)) + (IOPATH (posedge clk) pulse (0:0:0) (3182:3182:3182)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2212:2212:2212) (2199:2199:2199)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2212:2212:2212) (2199:2199:2199)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (2203:2203:2203) (2194:2194:2194)) + (PORT ena (2164:2164:2164) (2043:2043:2043)) + (PORT aclr (2204:2204:2204) (2258:2258:2258)) + (IOPATH (posedge clk) q (392:392:392) (392:392:392)) + (IOPATH (posedge aclr) q (440:440:440) (440:440:440)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (64:64:64)) + (SETUP ena (posedge clk) (64:64:64)) + (SETUP aclr (posedge clk) (64:64:64)) + (HOLD d (posedge clk) (211:211:211)) + (HOLD ena (posedge clk) (211:211:211)) + (HOLD aclr (posedge clk) (211:211:211)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_ack) + (DELAY + (ABSOLUTE + (PORT datac (1140:1140:1140) (1040:1040:1040)) + (PORT datad (1527:1527:1527) (1450:1450:1450)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|wr_sdram_en) + (DELAY + (ABSOLUTE + (PORT clk (1841:1841:1841) (1853:1853:1853)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1874:1874:1874) (1844:1844:1844)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1129:1129:1129) (1098:1098:1098)) + (PORT d[1] (1129:1129:1129) (1098:1098:1098)) + (PORT d[2] (1129:1129:1129) (1098:1098:1098)) + (PORT d[3] (1129:1129:1129) (1098:1098:1098)) + (PORT d[4] (1114:1114:1114) (1082:1082:1082)) + (PORT d[5] (1114:1114:1114) (1082:1082:1082)) + (PORT d[6] (1114:1114:1114) (1082:1082:1082)) + (PORT clk (2255:2255:2255) (2284:2284:2284)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1902:1902:1902) (1840:1840:1840)) + (PORT d[1] (1020:1020:1020) (1022:1022:1022)) + (PORT d[2] (2363:2363:2363) (2282:2282:2282)) + (PORT d[3] (1372:1372:1372) (1343:1343:1343)) + (PORT d[4] (1012:1012:1012) (1017:1017:1017)) + (PORT d[5] (1163:1163:1163) (1110:1110:1110)) + (PORT d[6] (1709:1709:1709) (1649:1649:1649)) + (PORT d[7] (2052:2052:2052) (1907:1907:1907)) + (PORT d[8] (1724:1724:1724) (1675:1675:1675)) + (PORT d[9] (857:857:857) (781:781:781)) + (PORT clk (2251:2251:2251) (2279:2279:2279)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (2799:2799:2799) (2566:2566:2566)) + (PORT clk (2251:2251:2251) (2279:2279:2279)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2255:2255:2255) (2284:2284:2284)) + (PORT d[0] (3506:3506:3506) (3280:3280:3280)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2256:2256:2256) (2285:2285:2285)) + (IOPATH (posedge clk) pulse (0:0:0) (2750:2750:2750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2256:2256:2256) (2285:2285:2285)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2256:2256:2256) (2285:2285:2285)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2256:2256:2256) (2285:2285:2285)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (972:972:972) (925:925:925)) + (PORT d[1] (1550:1550:1550) (1515:1515:1515)) + (PORT d[2] (1747:1747:1747) (1679:1679:1679)) + (PORT d[3] (1090:1090:1090) (1090:1090:1090)) + (PORT d[4] (1003:1003:1003) (1011:1011:1011)) + (PORT d[5] (1020:1020:1020) (1014:1014:1014)) + (PORT d[6] (1007:1007:1007) (999:999:999)) + (PORT d[7] (1350:1350:1350) (1322:1322:1322)) + (PORT d[8] (1734:1734:1734) (1675:1675:1675)) + (PORT d[9] (1946:1946:1946) (1784:1784:1784)) + (PORT clk (2205:2205:2205) (2193:2193:2193)) + (PORT aclr (2247:2247:2247) (2241:2241:2241)) + (PORT stall (1917:1917:1917) (2070:2070:2070)) + (IOPATH (posedge aclr) q (396:396:396) (396:396:396)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + (HOLD stall (posedge clk) (254:254:254)) + (HOLD aclr (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (2205:2205:2205) (2193:2193:2193)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2206:2206:2206) (2194:2194:2194)) + (IOPATH (posedge clk) pulse (0:0:0) (3182:3182:3182)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2206:2206:2206) (2194:2194:2194)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2206:2206:2206) (2194:2194:2194)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|wr_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a9.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (2197:2197:2197) (2189:2189:2189)) + (PORT ena (2131:2131:2131) (2004:2004:2004)) + (PORT aclr (2198:2198:2198) (2253:2253:2253)) + (IOPATH (posedge clk) q (392:392:392) (392:392:392)) + (IOPATH (posedge aclr) q (440:440:440) (440:440:440)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (64:64:64)) + (SETUP ena (posedge clk) (64:64:64)) + (SETUP aclr (posedge clk) (64:64:64)) + (HOLD d (posedge clk) (211:211:211)) + (HOLD ena (posedge clk) (211:211:211)) + (HOLD aclr (posedge clk) (211:211:211)) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE sys_clk\~inputclkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (200:200:200) (189:189:189)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[0\]\~13) + (DELAY + (ABSOLUTE + (PORT dataa (893:893:893) (894:894:894)) + (PORT datab (341:341:341) (422:422:422)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[11\]\~35) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[11\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (344:344:344) (434:434:434)) + (PORT datab (342:342:342) (424:424:424)) + (PORT datac (300:300:300) (383:383:383)) + (PORT datad (303:303:303) (380:380:380)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[9\]\~31) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (447:447:447)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~1) + (DELAY + (ABSOLUTE + (PORT dataa (959:959:959) (947:947:947)) + (PORT datab (960:960:960) (941:941:941)) + (PORT datac (826:826:826) (767:767:767)) + (PORT datad (953:953:953) (936:936:936)) + (IOPATH dataa combout (438:438:438) (448:448:448)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[1\]\~15) + (DELAY + (ABSOLUTE + (PORT dataa (352:352:352) (441:441:441)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal1\~2) + (DELAY + (ABSOLUTE + (PORT dataa (354:354:354) (450:450:450)) + (PORT datab (350:350:350) (439:439:439)) + (PORT datac (311:311:311) (400:400:400)) + (PORT datad (313:313:313) (393:393:393)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|tx_flag) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1870:1870:1870)) + (PORT asdata (1030:1030:1030) (1048:1048:1048)) + (PORT clrn (5949:5949:5949) (5747:5747:5747)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always3\~0) + (DELAY + (ABSOLUTE + (PORT dataa (932:932:932) (942:942:942)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datac combout (462:462:462) (482:482:482)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[1\]\~2) + (DELAY + (ABSOLUTE + (PORT dataa (399:399:399) (527:527:527)) + (PORT datab (293:293:293) (331:331:331)) + (PORT datad (292:292:292) (322:322:322)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|bit_cnt\[2\]\~3) + (DELAY + (ABSOLUTE + (PORT dataa (774:774:774) (707:707:707)) + (PORT datab (295:295:295) (333:333:333)) + (PORT datad (288:288:288) (318:318:318)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always0\~1) + (DELAY + (ABSOLUTE + (PORT dataa (393:393:393) (520:520:520)) + (PORT datab (412:412:412) (513:513:513)) + (PORT datac (321:321:321) (422:422:422)) + (PORT datad (248:248:248) (275:275:275)) + (IOPATH dataa combout (404:404:404) (398:398:398)) + (IOPATH datab combout (435:435:435) (424:424:424)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|work_en\~0) + (DELAY + (ABSOLUTE + (PORT datab (1371:1371:1371) (1321:1321:1321)) + (PORT datad (1269:1269:1269) (1180:1180:1180)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|work_en) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT asdata (5350:5350:5350) (4891:4891:4891)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always1\~0) + (DELAY + (ABSOLUTE + (PORT dataa (280:280:280) (312:312:312)) + (PORT datab (303:303:303) (327:327:327)) + (PORT datac (1403:1403:1403) (1288:1288:1288)) + (PORT datad (1160:1160:1160) (1121:1121:1121)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[2\]\~17) + (DELAY + (ABSOLUTE + (PORT datab (350:350:350) (435:435:435)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[5\]\~23) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (425:425:425)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[6\]\~25) + (DELAY + (ABSOLUTE + (PORT datab (350:350:350) (440:440:440)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[7\]\~27) + (DELAY + (ABSOLUTE + (PORT datab (342:342:342) (422:422:422)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[8\]\~29) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[10\]\~33) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|baud_cnt\[12\]\~37) + (DELAY + (ABSOLUTE + (PORT datad (321:321:321) (391:391:391)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|baud_cnt\[12\]) + (DELAY + (ABSOLUTE + (PORT clk (1871:1871:1871) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5187:5187:5187) (4944:4944:4944)) + (PORT sclr (1487:1487:1487) (1466:1466:1466)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD sclr (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (353:353:353) (448:448:448)) + (PORT datab (351:351:351) (440:440:440)) + (PORT datac (308:308:308) (397:397:397)) + (PORT datad (310:310:310) (389:389:389)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|Equal2\~1) + (DELAY + (ABSOLUTE + (PORT dataa (575:575:575) (540:540:540)) + (PORT datab (936:936:936) (944:944:944)) + (PORT datac (794:794:794) (741:741:741)) + (PORT datad (962:962:962) (949:949:949)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|bit_flag) + (DELAY + (ABSOLUTE + (PORT clk (1874:1874:1874) (1885:1885:1885)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5141:5141:5141) (4901:4901:4901)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|always0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (342:342:342) (430:430:430)) + (PORT datac (886:886:886) (891:891:891)) + (IOPATH dataa combout (453:453:453) (446:446:446)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|valid_rreq) + (DELAY + (ABSOLUTE + (PORT dataa (365:365:365) (449:449:449)) + (PORT datad (915:915:915) (927:927:927)) + (IOPATH dataa combout (405:405:405) (398:398:398)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[0\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (774:774:774) (821:821:821)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4629:4629:4629) (4901:4901:4901)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_ack\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1001:1001:1001) (997:997:997)) + (PORT datab (897:897:897) (855:855:855)) + (PORT datac (824:824:824) (772:772:772)) + (PORT datad (265:265:265) (282:282:282)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[0\]\~5) + (DELAY + (ABSOLUTE + (PORT datad (882:882:882) (824:824:824)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|counter5a0\~_wirecell) + (DELAY + (ABSOLUTE + (PORT datad (2096:2096:2096) (1989:1989:1989)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|rdptr_g1p\|_\~0) + (DELAY + (ABSOLUTE + (PORT datab (367:367:367) (447:447:447)) + (PORT datac (326:326:326) (409:409:409)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[1\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (774:774:774) (821:821:821)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4552:4552:4552) (4818:4818:4818)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[1\]\~6) + (DELAY + (ABSOLUTE + (PORT datad (878:878:878) (820:820:820)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[2\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (734:734:734) (781:781:781)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4558:4558:4558) (4795:4795:4795)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[2\]\~4) + (DELAY + (ABSOLUTE + (PORT datad (877:877:877) (819:819:819)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[3\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (764:764:764) (811:811:811)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4349:4349:4349) (4485:4485:4485)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[3\]\~2) + (DELAY + (ABSOLUTE + (PORT datad (883:883:883) (826:826:826)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[4\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (774:774:774) (821:821:821)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4391:4391:4391) (4517:4517:4517)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[4\]\~1) + (DELAY + (ABSOLUTE + (PORT datad (876:876:876) (818:818:818)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[5\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (754:754:754) (801:801:801)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4641:4641:4641) (4868:4868:4868)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[5\]\~0) + (DELAY + (ABSOLUTE + (PORT datad (879:879:879) (822:822:822)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[6\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (784:784:784) (831:831:831)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4805:4805:4805) (4978:4978:4978)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[6\]\~3) + (DELAY + (ABSOLUTE + (PORT datad (883:883:883) (826:826:826)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_io_ibuf") + (INSTANCE sdram_dq\[7\]\~input) + (DELAY + (ABSOLUTE + (IOPATH i o (774:774:774) (821:821:821)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_data_reg\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1863:1863:1863) (1874:1874:1874)) + (PORT asdata (4521:4521:4521) (4777:4777:4777)) + (PORT clrn (1895:1895:1895) (1866:1866:1866)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|rd_sdram_data\[7\]\~7) + (DELAY + (ABSOLUTE + (PORT datad (877:877:877) (820:820:820)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.datain_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (956:956:956) (879:879:879)) + (PORT d[1] (882:882:882) (817:817:817)) + (PORT d[2] (880:880:880) (816:816:816)) + (PORT d[3] (953:953:953) (875:875:875)) + (PORT d[4] (888:888:888) (833:833:833)) + (PORT d[5] (881:881:881) (816:816:816)) + (PORT d[6] (901:901:901) (830:830:830)) + (PORT d[7] (919:919:919) (853:853:853)) + (PORT clk (2277:2277:2277) (2305:2305:2305)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1036:1036:1036) (999:999:999)) + (PORT d[1] (984:984:984) (978:978:978)) + (PORT d[2] (955:955:955) (950:950:950)) + (PORT d[3] (1769:1769:1769) (1707:1707:1707)) + (PORT d[4] (944:944:944) (948:948:948)) + (PORT d[5] (1792:1792:1792) (1709:1709:1709)) + (PORT d[6] (1702:1702:1702) (1604:1604:1604)) + (PORT d[7] (999:999:999) (996:996:996)) + (PORT d[8] (1048:1048:1048) (1035:1035:1035)) + (PORT d[9] (921:921:921) (865:865:865)) + (PORT clk (2273:2273:2273) (2300:2300:2300)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.we_a_register) + (DELAY + (ABSOLUTE + (PORT d[0] (1312:1312:1312) (1167:1167:1167)) + (PORT clk (2273:2273:2273) (2300:2300:2300)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_a) + (DELAY + (ABSOLUTE + (PORT clk (2277:2277:2277) (2305:2305:2305)) + (PORT d[0] (2019:2019:2019) (1881:1881:1881)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.wpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2278:2278:2278) (2306:2306:2306)) + (IOPATH (posedge clk) pulse (0:0:0) (2750:2750:2750)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2278:2278:2278) (2306:2306:2306)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2278:2278:2278) (2306:2306:2306)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_a) + (DELAY + (ABSOLUTE + (PORT clk (2278:2278:2278) (2306:2306:2306)) + (IOPATH (posedge clk) pulse (0:0:0) (3428:3428:3428)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.addr_b_register) + (DELAY + (ABSOLUTE + (PORT d[0] (530:530:530) (500:500:500)) + (PORT d[1] (973:973:973) (958:958:958)) + (PORT d[2] (1808:1808:1808) (1728:1728:1728)) + (PORT d[3] (2013:2013:2013) (1906:1906:1906)) + (PORT d[4] (1980:1980:1980) (1869:1869:1869)) + (PORT d[5] (2026:2026:2026) (1902:1902:1902)) + (PORT d[6] (1028:1028:1028) (1005:1005:1005)) + (PORT d[7] (1068:1068:1068) (1048:1048:1048)) + (PORT d[8] (1714:1714:1714) (1625:1625:1625)) + (PORT d[9] (922:922:922) (860:860:860)) + (PORT clk (2227:2227:2227) (2214:2214:2214)) + (PORT aclr (2269:2269:2269) (2262:2262:2262)) + (PORT stall (1288:1288:1288) (1407:1407:1407)) + (IOPATH (posedge aclr) q (396:396:396) (396:396:396)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (254:254:254)) + (HOLD stall (posedge clk) (254:254:254)) + (HOLD aclr (posedge clk) (254:254:254)) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.active_core_port_b) + (DELAY + (ABSOLUTE + (PORT clk (2227:2227:2227) (2214:2214:2214)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2228:2228:2228) (2215:2215:2215)) + (IOPATH (posedge clk) pulse (0:0:0) (3182:3182:3182)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.ftpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2228:2228:2228) (2215:2215:2215)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_pulse_generator") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.rwpgen_b) + (DELAY + (ABSOLUTE + (PORT clk (2228:2228:2228) (2215:2215:2215)) + (IOPATH (posedge clk) pulse (0:0:0) (3469:3469:3469)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_ram_register") + (INSTANCE sdram_top_inst\|fifo_ctrl_inst\|rd_fifo_data\|dcfifo_component\|auto_generated\|fifo_ram\|ram_block11a0.dataout_b_register) + (DELAY + (ABSOLUTE + (PORT clk (2219:2219:2219) (2210:2210:2210)) + (PORT ena (1830:1830:1830) (1713:1713:1713)) + (PORT aclr (2220:2220:2220) (2274:2274:2274)) + (IOPATH (posedge clk) q (392:392:392) (392:392:392)) + (IOPATH (posedge aclr) q (440:440:440) (440:440:440)) + ) + ) + (TIMINGCHECK + (SETUP d (posedge clk) (64:64:64)) + (SETUP ena (posedge clk) (64:64:64)) + (SETUP aclr (posedge clk) (64:64:64)) + (HOLD d (posedge clk) (211:211:211)) + (HOLD ena (posedge clk) (211:211:211)) + (HOLD aclr (posedge clk) (211:211:211)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (436:436:436)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT datab (361:361:361) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT datab (361:361:361) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT datab (361:361:361) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (447:447:447)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datab (362:362:362) (439:439:439)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|wr_ptr\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1857:1857:1857) (1867:1867:1867)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2742:2742:2742) (2554:2554:2554)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita0) + (DELAY + (ABSOLUTE + (PORT dataa (362:362:362) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita1) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita2) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita3) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[3\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita4) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[4\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita5) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[5\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita6) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (447:447:447)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[6\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita7) + (DELAY + (ABSOLUTE + (PORT datab (360:360:360) (437:437:437)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datab cout (565:565:565) (421:421:421)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[7\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita8) + (DELAY + (ABSOLUTE + (PORT dataa (363:363:363) (446:446:446)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH dataa cout (552:552:552) (416:416:416)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + (IOPATH cin cout (73:73:73) (73:73:73)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[8\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_comb_bita9) + (DELAY + (ABSOLUTE + (PORT datad (507:507:507) (538:538:538)) + (IOPATH datad combout (177:177:177) (155:155:155)) + (IOPATH cin combout (607:607:607) (577:577:577)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE fifo_read_inst\|read_fifo_inst\|scfifo_component\|auto_generated\|dpfifo\|rd_ptr_count\|counter_reg_bit\[9\]) + (DELAY + (ABSOLUTE + (PORT clk (1859:1859:1859) (1869:1869:1869)) + (PORT d (99:99:99) (115:115:115)) + (PORT ena (2307:2307:2307) (2153:2153:2153)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~4) + (DELAY + (ABSOLUTE + (PORT dataa (396:396:396) (523:523:523)) + (PORT datab (367:367:367) (467:467:467)) + (PORT datac (740:740:740) (662:662:662)) + (PORT datad (370:370:370) (470:470:470)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~3) + (DELAY + (ABSOLUTE + (PORT dataa (934:934:934) (943:943:943)) + (PORT datad (321:321:321) (391:391:391)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE uart_tx_inst\|tx\~5) + (DELAY + (ABSOLUTE + (PORT dataa (811:811:811) (734:734:734)) + (PORT datab (291:291:291) (320:320:320)) + (PORT datac (1119:1119:1119) (1006:1006:1006)) + (PORT datad (441:441:441) (420:420:420)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE uart_tx_inst\|tx) + (DELAY + (ABSOLUTE + (PORT clk (1870:1870:1870) (1881:1881:1881)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (5192:5192:5192) (4949:4949:4949)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_clkctrl") + (INSTANCE clk_gen_inst\|altpll_component\|auto_generated\|wire_pll1_clk\[2\]\~clkctrl) + (DELAY + (ABSOLUTE + (PORT inclk[0] (2339:2339:2339) (2308:2308:2308)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT asdata (1416:1416:1416) (1405:1405:1405)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT asdata (1329:1329:1329) (1301:1301:1301)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT datab (373:373:373) (479:479:479)) + (PORT datac (1230:1230:1230) (1271:1271:1271)) + (PORT datad (1186:1186:1186) (1214:1214:1214)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT asdata (2130:2130:2130) (2054:2054:2054)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector2\~0) + (DELAY + (ABSOLUTE + (PORT dataa (391:391:391) (476:476:476)) + (PORT datab (406:406:406) (510:510:510)) + (PORT datad (506:506:506) (487:487:487)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_TRF) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1236:1236:1236) (1124:1124:1124)) + (PORT datab (304:304:304) (328:328:328)) + (PORT datac (361:361:361) (467:467:467)) + (PORT datad (314:314:314) (394:394:394)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|Selector0\~2) + (DELAY + (ABSOLUTE + (PORT dataa (298:298:298) (336:336:336)) + (PORT datab (405:405:405) (516:516:516)) + (PORT datac (304:304:304) (388:388:388)) + (PORT datad (237:237:237) (255:255:255)) + (IOPATH dataa combout (453:453:453) (413:413:413)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_AR) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1735:1735:1735) (1631:1631:1631)) + (PORT datad (1315:1315:1315) (1286:1286:1286)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~2) + (DELAY + (ABSOLUTE + (PORT dataa (1178:1178:1178) (1088:1088:1088)) + (PORT datab (1181:1181:1181) (1095:1095:1095)) + (PORT datad (294:294:294) (363:363:363)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~3) + (DELAY + (ABSOLUTE + (PORT dataa (1179:1179:1179) (1090:1090:1090)) + (PORT datab (331:331:331) (406:406:406)) + (PORT datad (237:237:237) (255:255:255)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~4) + (DELAY + (ABSOLUTE + (PORT datac (941:941:941) (948:948:948)) + (PORT datad (236:236:236) (254:254:254)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1706:1706:1706) (1642:1642:1642)) + (PORT datac (1220:1220:1220) (1172:1172:1172)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_a_ref_inst\|aref_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~17) + (DELAY + (ABSOLUTE + (PORT datab (286:286:286) (314:314:314)) + (PORT datad (592:592:592) (621:621:621)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_PRE) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|WideOr5) + (DELAY + (ABSOLUTE + (PORT dataa (1731:1731:1731) (1627:1627:1627)) + (PORT datab (1355:1355:1355) (1330:1330:1330)) + (PORT datad (1628:1628:1628) (1549:1549:1549)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\~0) + (DELAY + (ABSOLUTE + (PORT dataa (891:891:891) (882:882:882)) + (PORT datad (1254:1254:1254) (1195:1195:1195)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1175:1175:1175) (1085:1085:1085)) + (PORT datab (332:332:332) (408:408:408)) + (PORT datac (1140:1140:1140) (1060:1060:1060)) + (PORT datad (293:293:293) (363:363:363)) + (IOPATH dataa combout (453:453:453) (472:472:472)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~1) + (DELAY + (ABSOLUTE + (PORT dataa (549:549:549) (573:573:573)) + (PORT datab (333:333:333) (409:409:409)) + (PORT datac (1138:1138:1138) (1057:1057:1057)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (473:473:473) (487:487:487)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector5\~2) + (DELAY + (ABSOLUTE + (PORT datac (941:941:941) (948:948:948)) + (PORT datad (236:236:236) (253:253:253)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector5\~0) + (DELAY + (ABSOLUTE + (PORT dataa (520:520:520) (497:497:497)) + (PORT datab (383:383:383) (472:472:472)) + (PORT datac (366:366:366) (479:479:479)) + (PORT datad (559:559:559) (584:584:584)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT datac (1223:1223:1223) (1263:1263:1263)) + (PORT datad (1193:1193:1193) (1222:1222:1222)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector6\~1) + (DELAY + (ABSOLUTE + (PORT dataa (289:289:289) (328:328:328)) + (PORT datac (330:330:330) (414:414:414)) + (PORT datad (563:563:563) (588:588:588)) + (IOPATH dataa combout (453:453:453) (446:446:446)) + (IOPATH datac combout (327:327:327) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_cmd\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~1) + (DELAY + (ABSOLUTE + (PORT dataa (278:278:278) (310:310:310)) + (PORT datab (537:537:537) (566:566:566)) + (PORT datac (1112:1112:1112) (1034:1034:1034)) + (PORT datad (493:493:493) (514:514:514)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datab combout (440:440:440) (462:462:462)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector7\~2) + (DELAY + (ABSOLUTE + (PORT dataa (278:278:278) (309:309:309)) + (PORT datac (941:941:941) (948:948:948)) + (IOPATH dataa combout (471:471:471) (472:472:472)) + (IOPATH datac combout (327:327:327) (316:316:316)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Equal0\~6) + (DELAY + (ABSOLUTE + (PORT dataa (941:941:941) (900:900:900)) + (PORT datab (908:908:908) (851:851:851)) + (PORT datac (969:969:969) (962:962:962)) + (PORT datad (936:936:936) (935:935:935)) + (IOPATH dataa combout (448:448:448) (472:472:472)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector21\~1) + (DELAY + (ABSOLUTE + (PORT dataa (282:282:282) (314:314:314)) + (PORT datab (1047:1047:1047) (1032:1032:1032)) + (PORT datac (245:245:245) (276:276:276)) + (PORT datad (561:561:561) (587:587:587)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_addr\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~6) + (DELAY + (ABSOLUTE + (PORT datad (597:597:597) (626:626:626)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[3\]\~3) + (DELAY + (ABSOLUTE + (PORT datac (1238:1238:1238) (1166:1166:1166)) + (PORT datad (593:593:593) (622:622:622)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[0\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (PORT ena (1080:1080:1080) (1064:1064:1064)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~5) + (DELAY + (ABSOLUTE + (PORT datab (379:379:379) (469:469:469)) + (PORT datad (596:596:596) (624:624:624)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (PORT ena (1080:1080:1080) (1064:1064:1064)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\~4) + (DELAY + (ABSOLUTE + (PORT dataa (573:573:573) (610:610:610)) + (PORT datab (355:355:355) (442:442:442)) + (PORT datad (591:591:591) (619:619:619)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (432:432:432) (433:433:433)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|cnt_init_aref\[2\]) + (DELAY + (ABSOLUTE + (PORT clk (1852:1852:1852) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1884:1884:1884) (1859:1859:1859)) + (PORT ena (1080:1080:1080) (1064:1064:1064)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + (HOLD ena (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~15) + (DELAY + (ABSOLUTE + (PORT dataa (346:346:346) (436:436:436)) + (PORT datab (378:378:378) (468:468:468)) + (PORT datac (310:310:310) (400:400:400)) + (PORT datad (301:301:301) (374:374:374)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (547:547:547) (538:538:538)) + (PORT datab (353:353:353) (436:436:436)) + (PORT datac (363:363:363) (470:470:470)) + (PORT datad (1169:1169:1169) (1069:1069:1069)) + (IOPATH dataa combout (392:392:392) (398:398:398)) + (IOPATH datab combout (393:393:393) (408:408:408)) + (IOPATH datac combout (324:324:324) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_state\.INIT_MRS) + (DELAY + (ABSOLUTE + (PORT clk (1849:1849:1849) (1861:1861:1861)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1881:1881:1881) (1852:1852:1852)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_init_inst\|init_ba\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT asdata (1691:1691:1691) (1629:1629:1629)) + (PORT clrn (1886:1886:1886) (1857:1857:1857)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD asdata (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector9\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1226:1226:1226) (1171:1171:1171)) + (PORT datab (373:373:373) (479:479:479)) + (PORT datad (1186:1186:1186) (1214:1214:1214)) + (IOPATH dataa combout (421:421:421) (428:428:428)) + (IOPATH datab combout (455:455:455) (436:436:436)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector9\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1291:1291:1291) (1315:1315:1315)) + (PORT datab (1336:1336:1336) (1298:1298:1298)) + (PORT datac (1117:1117:1117) (1149:1149:1149)) + (PORT datad (481:481:481) (471:471:471)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~0) + (DELAY + (ABSOLUTE + (PORT dataa (578:578:578) (552:552:552)) + (PORT datab (412:412:412) (520:520:520)) + (PORT datac (503:503:503) (514:514:514)) + (PORT datad (478:478:478) (443:443:443)) + (IOPATH dataa combout (420:420:420) (428:428:428)) + (IOPATH datab combout (472:472:472) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector6\~2) + (DELAY + (ABSOLUTE + (PORT dataa (281:281:281) (313:313:313)) + (PORT datab (351:351:351) (441:441:441)) + (PORT datac (559:559:559) (589:589:589)) + (PORT datad (265:265:265) (282:282:282)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_ba\[1\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector22\~0) + (DELAY + (ABSOLUTE + (PORT dataa (1287:1287:1287) (1310:1310:1310)) + (PORT datab (1337:1337:1337) (1299:1299:1299)) + (PORT datac (1130:1130:1130) (1085:1085:1085)) + (PORT datad (1193:1193:1193) (1221:1221:1221)) + (IOPATH dataa combout (481:481:481) (491:491:491)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|WideOr7\~0) + (DELAY + (ABSOLUTE + (PORT dataa (392:392:392) (495:495:495)) + (PORT datab (638:638:638) (652:652:652)) + (PORT datac (508:508:508) (548:548:548)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (457:457:457) (489:489:489)) + (IOPATH datac combout (324:324:324) (315:315:315)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|Selector11\~0) + (DELAY + (ABSOLUTE + (PORT dataa (291:291:291) (330:330:330)) + (PORT datab (290:290:290) (322:322:322)) + (PORT datad (561:561:561) (586:586:586)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (462:462:462) (482:482:482)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_read_inst\|read_addr\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\~16) + (DELAY + (ABSOLUTE + (PORT dataa (367:367:367) (452:452:452)) + (PORT datab (344:344:344) (427:427:427)) + (PORT datad (2522:2522:2522) (2390:2390:2390)) + (IOPATH dataa combout (421:421:421) (428:428:428)) + (IOPATH datab combout (410:410:410) (408:408:408)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_state\.WR_ACTIVE) + (DELAY + (ABSOLUTE + (PORT clk (1856:1856:1856) (1868:1868:1868)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1888:1888:1888) (1859:1859:1859)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector10\~0) + (DELAY + (ABSOLUTE + (PORT dataa (871:871:871) (856:856:856)) + (PORT datab (1264:1264:1264) (1204:1204:1204)) + (PORT datac (366:366:366) (479:479:479)) + (PORT datad (340:340:340) (426:426:426)) + (IOPATH dataa combout (461:461:461) (481:481:481)) + (IOPATH datab combout (494:494:494) (496:496:496)) + (IOPATH datac combout (327:327:327) (316:316:316)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|Selector10\~1) + (DELAY + (ABSOLUTE + (PORT dataa (578:578:578) (552:552:552)) + (PORT datab (511:511:511) (489:489:489)) + (PORT datac (370:370:370) (484:484:484)) + (PORT datad (239:239:239) (258:258:258)) + (IOPATH dataa combout (432:432:432) (446:446:446)) + (IOPATH datab combout (437:437:437) (436:436:436)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "dffeas") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_write_inst\|write_addr\[10\]) + (DELAY + (ABSOLUTE + (PORT clk (1854:1854:1854) (1865:1865:1865)) + (PORT d (99:99:99) (115:115:115)) + (PORT clrn (1886:1886:1886) (1856:1856:1856)) + (IOPATH (posedge clk) q (261:261:261) (261:261:261)) + (IOPATH (negedge clrn) q (247:247:247) (247:247:247)) + ) + ) + (TIMINGCHECK + (HOLD d (posedge clk) (212:212:212)) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector12\~0) + (DELAY + (ABSOLUTE + (PORT dataa (334:334:334) (416:416:416)) + (PORT datab (373:373:373) (480:480:480)) + (PORT datac (830:830:830) (817:817:817)) + (PORT datad (1188:1188:1188) (1216:1216:1216)) + (IOPATH dataa combout (456:456:456) (486:486:486)) + (IOPATH datab combout (454:454:454) (473:473:473)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) + (CELL + (CELLTYPE "cycloneive_lcell_comb") + (INSTANCE sdram_top_inst\|sdram_ctrl_inst\|sdram_arbit_inst\|Selector12\~1) + (DELAY + (ABSOLUTE + (PORT dataa (1289:1289:1289) (1312:1312:1312)) + (PORT datab (1157:1157:1157) (1184:1184:1184)) + (PORT datac (790:790:790) (769:769:769)) + (PORT datad (238:238:238) (256:256:256)) + (IOPATH dataa combout (471:471:471) (453:453:453)) + (IOPATH datab combout (472:472:472) (452:452:452)) + (IOPATH datac combout (324:324:324) (315:315:315)) + (IOPATH datad combout (177:177:177) (155:155:155)) + ) + ) + ) +) diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/uart_sdram.qpf b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/uart_sdram.qpf new file mode 100644 index 0000000..7b4a7ed --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/uart_sdram.qpf @@ -0,0 +1,30 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2013 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II 64-Bit +# Version 13.0.0 Build 156 04/24/2013 SJ Full Version +# Date created = 17:31:57 April 12, 2019 +# +# -------------------------------------------------------------------------- # + +QUARTUS_VERSION = "13.0" +DATE = "17:31:57 April 12, 2019" + +# Revisions + +PROJECT_REVISION = "uart_sdram" diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/uart_sdram.qsf b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/uart_sdram.qsf new file mode 100644 index 0000000..904d70f --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/uart_sdram.qsf @@ -0,0 +1,175 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2013 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II 64-Bit +# Version 13.0.0 Build 156 04/24/2013 SJ Full Version +# Date created = 17:31:58 April 12, 2019 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# uart_sdram_assignment_defaults.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY "Cyclone IV E" +set_global_assignment -name DEVICE EP4CE15F23C8 +set_global_assignment -name TOP_LEVEL_ENTITY uart_sdram +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.0 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:31:57 APRIL 12, 2019" +set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" +set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 +set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (Verilog)" +set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation +set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top +set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V" + +set_location_assignment PIN_T22 -to sys_clk +set_location_assignment PIN_U20 -to sys_rst_n +set_location_assignment PIN_U1 -to tx +set_location_assignment PIN_V1 -to rx + +set_location_assignment PIN_E5 -to sdram_clk +set_location_assignment PIN_M1 -to sdram_cke +set_location_assignment PIN_A4 -to sdram_cs_n +set_location_assignment PIN_D6 -to sdram_ras_n +set_location_assignment PIN_B5 -to sdram_cas_n +set_location_assignment PIN_A5 -to sdram_we_n +set_location_assignment PIN_B4 -to sdram_ba[0] +set_location_assignment PIN_C4 -to sdram_ba[1] +set_location_assignment PIN_M2 -to sdram_addr[12] +set_location_assignment PIN_N1 -to sdram_addr[11] +set_location_assignment PIN_A3 -to sdram_addr[10] +set_location_assignment PIN_N2 -to sdram_addr[9] +set_location_assignment PIN_H1 -to sdram_addr[8] +set_location_assignment PIN_F2 -to sdram_addr[7] +set_location_assignment PIN_F1 -to sdram_addr[6] +set_location_assignment PIN_E1 -to sdram_addr[5] +set_location_assignment PIN_C2 -to sdram_addr[4] +set_location_assignment PIN_C1 -to sdram_addr[3] +set_location_assignment PIN_B2 -to sdram_addr[2] +set_location_assignment PIN_B1 -to sdram_addr[1] +set_location_assignment PIN_B3 -to sdram_addr[0] + +set_location_assignment PIN_J4 -to sdram_dq[15] +set_location_assignment PIN_J3 -to sdram_dq[14] +set_location_assignment PIN_H2 -to sdram_dq[13] +set_location_assignment PIN_G4 -to sdram_dq[12] +set_location_assignment PIN_E3 -to sdram_dq[11] +set_location_assignment PIN_D2 -to sdram_dq[10] +set_location_assignment PIN_C3 -to sdram_dq[9] +set_location_assignment PIN_J1 -to sdram_dq[8] +set_location_assignment PIN_B6 -to sdram_dq[7] +set_location_assignment PIN_A6 -to sdram_dq[6] +set_location_assignment PIN_C7 -to sdram_dq[5] +set_location_assignment PIN_A8 -to sdram_dq[4] +set_location_assignment PIN_B8 -to sdram_dq[3] +set_location_assignment PIN_C8 -to sdram_dq[2] +set_location_assignment PIN_A7 -to sdram_dq[1] +set_location_assignment PIN_B7 -to sdram_dq[0] + +set_location_assignment PIN_C6 -to sdram_dqm[0] +set_location_assignment PIN_J2 -to sdram_dqm[1] + +set_global_assignment -name USE_CONFIGURATION_DEVICE OFF +set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF +set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO" +set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise +set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall +set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise +set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall +set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS TEST_BENCH_MODE -section_id eda_simulation +set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH tb_sdram_top -section_id eda_simulation +set_global_assignment -name EDA_TEST_BENCH_NAME tb_uart_sdram -section_id eda_simulation +set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id tb_uart_sdram +set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "1 us" -section_id tb_uart_sdram +set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb_uart_sdram -section_id tb_uart_sdram +set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" +set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" +set_global_assignment -name VERILOG_FILE ../rtl/fifo_read.v +set_global_assignment -name VERILOG_FILE ../rtl/sdram/sdram_write.v +set_global_assignment -name VERILOG_FILE ../rtl/sdram/sdram_top.v +set_global_assignment -name VERILOG_FILE ../rtl/sdram/sdram_read.v +set_global_assignment -name VERILOG_FILE ../rtl/sdram/sdram_init.v +set_global_assignment -name VERILOG_FILE ../rtl/sdram/sdram_ctrl.v +set_global_assignment -name VERILOG_FILE ../rtl/sdram/sdram_arbit.v +set_global_assignment -name VERILOG_FILE ../rtl/sdram/sdram_a_ref.v +set_global_assignment -name VERILOG_FILE ../rtl/sdram/fifo_ctrl.v +set_global_assignment -name QIP_FILE ip_core/fifo_data/fifo_data.qip +set_global_assignment -name QIP_FILE ip_core/clk_gen/clk_gen.qip +set_global_assignment -name VERILOG_FILE ../rtl/uart_tx.v +set_global_assignment -name VERILOG_FILE ../rtl/uart_sdram.v +set_global_assignment -name VERILOG_FILE ../rtl/uart_rx.v +set_global_assignment -name QIP_FILE ip_core/read_fifo/read_fifo.qip +set_global_assignment -name EDA_TEST_BENCH_NAME tb_sdram_init -section_id eda_simulation +set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id tb_sdram_init +set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "1 us" -section_id tb_sdram_init +set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb_sdram_init -section_id tb_sdram_init +set_global_assignment -name ENABLE_SIGNALTAP OFF +set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp/stp1.stp +set_global_assignment -name SLD_FILE "E:/sources/sdram_test/uart_sdram/project/output_files/stp/stp1_auto_stripped.stp" +set_global_assignment -name EDA_TEST_BENCH_NAME tb_sdram_a_ref -section_id eda_simulation +set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id tb_sdram_a_ref +set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "1 us" -section_id tb_sdram_a_ref +set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb_sdram_a_ref -section_id tb_sdram_a_ref +set_global_assignment -name EDA_TEST_BENCH_NAME tb_sdram_write -section_id eda_simulation +set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id tb_sdram_write +set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "1 us" -section_id tb_sdram_write +set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb_sdram_write -section_id tb_sdram_write +set_global_assignment -name EDA_TEST_BENCH_NAME tb_sdram_read -section_id eda_simulation +set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id tb_sdram_read +set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "1 us" -section_id tb_sdram_read +set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb_sdram_read -section_id tb_sdram_read +set_global_assignment -name EDA_TEST_BENCH_NAME tb_sdram_ctrl -section_id eda_simulation +set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id tb_sdram_ctrl +set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "1 us" -section_id tb_sdram_ctrl +set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb_sdram_ctrl -section_id tb_sdram_ctrl +set_global_assignment -name EDA_TEST_BENCH_NAME tb_sdram_top -section_id eda_simulation +set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id tb_sdram_top +set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "1 us" -section_id tb_sdram_top +set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb_sdram_top -section_id tb_sdram_top +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_uart_sdram.v -section_id tb_uart_sdram +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/sdram_model_plus.v -section_id tb_uart_sdram +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_init/tb_sdram_init.v -section_id tb_sdram_init +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_init/sdram_model_plus.v -section_id tb_sdram_init +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_a_ref/tb_sdram_a_ref.v -section_id tb_sdram_a_ref +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_a_ref/sdram_model_plus.v -section_id tb_sdram_a_ref +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_write/tb_sdram_write.v -section_id tb_sdram_write +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_write/sdram_model_plus.v -section_id tb_sdram_write +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_read/tb_sdram_read.v -section_id tb_sdram_read +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_read/sdram_model_plus.v -section_id tb_sdram_read +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_ctrl/tb_sdram_ctrl.v -section_id tb_sdram_ctrl +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_ctrl/sdram_model_plus.v -section_id tb_sdram_ctrl +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_top/sdram_model_plus.v -section_id tb_sdram_top +set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_sdram_top/tb_sdram_top.v -section_id tb_sdram_top +set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/uart_sdram.qws b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/uart_sdram.qws new file mode 100644 index 0000000..d0b8df7 Binary files /dev/null and b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/project/uart_sdram.qws differ diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/fifo_read.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/fifo_read.v new file mode 100644 index 0000000..22e5aca --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/fifo_read.v @@ -0,0 +1,151 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : fifo_read +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鏁版嵁鍥炰紶缂撳瓨妯″潡 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module fifo_read +( + input wire sys_clk , //绯荤粺鏃堕挓锛岄鐜50MHz + input wire sys_rst_n , //澶嶄綅淇″彿,浣庣數骞虫湁鏁 + input wire [9:0] rd_fifo_num , //SDRAM涓fifo涓暟鎹釜鏁 + input wire [7:0] pi_data , //璇诲嚭鏁版嵁 + input wire [9:0] burst_num , //涓娆＄獊鍙戞暟鎹釜鏁 + + output reg read_en , //SDRAM涓fifo鐨勮浣胯兘 + output wire [7:0] tx_data , //杈撳嚭鏁版嵁 + output reg tx_flag //杈撳嚭鏁版嵁鏍囧織淇″彿 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// + +//parameter define +parameter BAUD_CNT_END = 13'd5207 , + BAUD_CNT_END_HALF = 13'd2603 ; +parameter CNT_WAIT_MAX = 24'd4_999_999 ; + +//wire define +wire [9:0] data_num ; //fifo涓暟鎹釜鏁 + +//reg define +reg read_en_dly ; +reg [12:0] baud_cnt ; +reg rd_en ; +reg rd_flag ; +reg [9:0] cnt_read ; +reg [3:0] bit_cnt ; +reg bit_flag ; + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// +//read_en:SDRAM涓fifo鐨勮浣胯兘 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + read_en <= 1'b0; + else if(rd_fifo_num == burst_num) + read_en <= 1'b1; + else if(data_num == burst_num - 2) + read_en <= 1'b0; + +//read_en_dly:SDRAM涓fifo鐨勮浣胯兘鎵撴媿 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + read_en_dly <= 1'b0; + else + read_en_dly <= read_en; + +//rd_flag:鍚憈x妯″潡鍙戦佹暟鎹娇鑳 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + rd_flag <= 1'b0; + else if(cnt_read == burst_num) + rd_flag <= 1'b0; + else if(data_num == burst_num) + rd_flag <= 1'b1; + +//baud_cnt:娉㈢壒鐜囪鏁板櫒璁℃暟浠0璁℃暟鍒癇AUD_CNT_END +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + baud_cnt <= 13'd0; + else if(baud_cnt == BAUD_CNT_END) + baud_cnt <= 13'd0; + else if(rd_flag == 1'b1) + baud_cnt <= baud_cnt + 1'b1; + +//bit_flag:bit璁℃暟鍣ㄨ鏁颁娇鑳 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + bit_flag <= 1'b0; + else if(baud_cnt == BAUD_CNT_END_HALF) + bit_flag <= 1'b1; + else + bit_flag <= 1'b0; + +//bit_cnt:bit璁℃暟鍣 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + bit_cnt <= 4'b0; + else if((bit_cnt == 4'd9) && (bit_flag == 1'b1)) + bit_cnt <= 4'b0; + else if(bit_flag == 1'b1) + bit_cnt <= bit_cnt + 1'b1; + +//rd_en:璇籪ifo鐨勮浣胯兘 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + rd_en <= 1'b0; + else if(bit_cnt == 4'd9 && bit_flag == 1'b1) + rd_en <= 1'b1; + else + rd_en <= 1'b0; + +//cnt_read:璇诲嚭鏁版嵁璁℃暟 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + cnt_read <= 10'd0; + else if(cnt_read == burst_num) + cnt_read <= 10'b0; + else if(rd_en == 1'b1) + cnt_read <= cnt_read + 1'b1; + else + cnt_read <= cnt_read; + +//tx_flag:璇诲嚭鏁版嵁鏍囧織淇″彿 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + tx_flag <= 1'b0; + else + tx_flag <= rd_en; + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// + +//-------------fifo_read_inst-------------- +read_fifo read_fifo_inst( + .clock (sys_clk ), //input clk + .data (pi_data ), //input [7 : 0] din + .wrreq (read_en_dly ), //input wr_en + .rdreq (rd_en ), //input rd_en + + .q (tx_data ), //output [7 : 0] dout + .usedw (data_num ) +); + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/fifo_ctrl.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/fifo_ctrl.v new file mode 100644 index 0000000..aae3f2b --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/fifo_ctrl.v @@ -0,0 +1,188 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : fifo_ctrl +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : FIFO鎺у埗妯″潡 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module fifo_ctrl +( + input wire sys_clk , //绯荤粺鏃堕挓 + input wire sys_rst_n , //澶嶄綅淇″彿 +//鍐檉ifo淇″彿 + input wire wr_fifo_wr_clk , //鍐橣IFO鍐欐椂閽 + input wire wr_fifo_wr_req , //鍐橣IFO鍐欒姹 + input wire [15:0] wr_fifo_wr_data , //鍐橣IFO鍐欐暟鎹 + input wire [23:0] sdram_wr_b_addr , //鍐橲DRAM棣栧湴鍧 + input wire [23:0] sdram_wr_e_addr , //鍐橲DRAM鏈湴鍧 + input wire [9:0] wr_burst_len , //鍐橲DRAM鏁版嵁绐佸彂闀垮害 + input wire wr_rst , //鍐欏浣嶄俊鍙 +//璇籪ifo淇″彿 + input wire rd_fifo_rd_clk , //璇籉IFO璇绘椂閽 + input wire rd_fifo_rd_req , //璇籉IFO璇昏姹 + input wire [23:0] sdram_rd_b_addr , //璇籗DRAM棣栧湴鍧 + input wire [23:0] sdram_rd_e_addr , //璇籗DRAM鏈湴鍧 + input wire [9:0] rd_burst_len , //璇籗DRAM鏁版嵁绐佸彂闀垮害 + input wire rd_rst , //璇诲浣嶄俊鍙 + output wire [15:0] rd_fifo_rd_data , //璇籉IFO璇绘暟鎹 + output wire [9:0] rd_fifo_num , //璇籪ifo涓殑鏁版嵁閲 + + input wire read_valid , //SDRAM璇讳娇鑳 + input wire init_end , //SDRAM鍒濆鍖栧畬鎴愭爣蹇 +//SDRAM鍐欎俊鍙 + input wire sdram_wr_ack , //SDRAM鍐欏搷搴 + output reg sdram_wr_req , //SDRAM鍐欒姹 + output reg [23:0] sdram_wr_addr , //SDRAM鍐欏湴鍧 + output wire [15:0] sdram_data_in , //鍐欏叆SDRAM鐨勬暟鎹 +//SDRAM璇讳俊鍙 + input wire sdram_rd_ack , //SDRAM璇荤浉搴 + input wire [15:0] sdram_data_out , //璇诲嚭SDRAM鏁版嵁 + output reg sdram_rd_req , //SDRAM璇昏姹 + output reg [23:0] sdram_rd_addr //SDRAM璇诲湴鍧 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// + +//wire define +wire wr_ack_fall ; //鍐欏搷搴斾俊鍙蜂笅闄嶆部 +wire rd_ack_fall ; //璇荤浉搴斾俊鍙蜂笅闄嶆部 +wire [9:0] wr_fifo_num ; //鍐檉ifo涓殑鏁版嵁閲 + +//reg define +reg wr_ack_dly ; //鍐欏搷搴旀墦鎷 +reg rd_ack_dly ; //璇诲搷搴旀墦鎷 + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// + +//wr_ack_dly:鍐欏搷搴斾俊鍙锋墦鎷 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + wr_ack_dly <= 1'b0; + else + wr_ack_dly <= sdram_wr_ack; + +//rd_ack_dly:璇诲搷搴斾俊鍙锋墦鎷 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + rd_ack_dly <= 1'b0; + else + rd_ack_dly <= sdram_rd_ack; + +//wr_ack_fall,rd_ack_fall:妫娴嬭鍐欏搷搴斾俊鍙蜂笅闄嶆部 +assign wr_ack_fall = (wr_ack_dly & ~sdram_wr_ack); +assign rd_ack_fall = (rd_ack_dly & ~sdram_rd_ack); + +//sdram_wr_addr:sdram鍐欏湴鍧 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + sdram_wr_addr <= 24'd0; + else if(wr_rst == 1'b1) + sdram_wr_addr <= sdram_wr_b_addr; + else if(wr_ack_fall == 1'b1) //涓娆＄獊鍙戝啓缁撴潫,鏇存敼鍐欏湴鍧 + begin + if(sdram_wr_addr < (sdram_wr_e_addr - wr_burst_len)) + //涓嶄娇鐢ㄤ箳涔撴搷浣,涓娆＄獊鍙戝啓缁撴潫,鏇存敼鍐欏湴鍧,鏈揪鍒版湯鍦板潃,鍐欏湴鍧绱姞 + sdram_wr_addr <= sdram_wr_addr + wr_burst_len; + else //涓嶄娇鐢ㄤ箳涔撴搷浣,鍒拌揪鏈湴鍧,鍥炲埌鍐欒捣濮嬪湴鍧 + sdram_wr_addr <= sdram_wr_b_addr; + end + +//sdram_rd_addr:sdram璇诲湴鍧 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + sdram_rd_addr <= 24'd0; + else if(rd_rst == 1'b1) + sdram_rd_addr <= sdram_rd_b_addr; + else if(rd_ack_fall == 1'b1) //涓娆＄獊鍙戣缁撴潫,鏇存敼璇诲湴鍧 + begin + if(sdram_rd_addr < (sdram_rd_e_addr - rd_burst_len)) + //璇诲湴鍧鏈揪鍒版湯鍦板潃,璇诲湴鍧绱姞 + sdram_rd_addr <= sdram_rd_addr + rd_burst_len; + else //鍒拌揪鏈湴鍧,鍥炲埌棣栧湴鍧 + sdram_rd_addr <= sdram_rd_b_addr; + end + +//sdram_wr_req,sdram_rd_req:璇诲啓璇锋眰淇″彿 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + begin + sdram_wr_req <= 1'b0; + sdram_rd_req <= 1'b0; + end + else if(init_end == 1'b1) //鍒濆鍖栧畬鎴愬悗鍝嶅簲璇诲啓璇锋眰 + begin //浼樺厛鎵ц鍐欐搷浣滐紝闃叉鍐欏叆SDRAM涓殑鏁版嵁涓㈠け + if(wr_fifo_num >= wr_burst_len) + begin //鍐橣IFO涓殑鏁版嵁閲忚揪鍒板啓绐佸彂闀垮害 + sdram_wr_req <= 1'b1; //鍐欒姹傛湁鏁 + sdram_rd_req <= 1'b0; + end + else if((rd_fifo_num < rd_burst_len) && (read_valid == 1'b1)) + begin //璇籉IFO涓殑鏁版嵁閲忓皬浜庤绐佸彂闀垮害,涓旇浣胯兘淇″彿鏈夋晥 + sdram_wr_req <= 1'b0; + sdram_rd_req <= 1'b1; //璇昏姹傛湁鏁 + end + else + begin + sdram_wr_req <= 1'b0; + sdram_rd_req <= 1'b0; + end + end + else + begin + sdram_wr_req <= 1'b0; + sdram_rd_req <= 1'b0; + end + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// + +//------------- wr_fifo_data ------------- +fifo_data wr_fifo_data( + //鐢ㄦ埛鎺ュ彛 + .wrclk (wr_fifo_wr_clk ), //鍐欐椂閽 + .wrreq (wr_fifo_wr_req ), //鍐欒姹 + .data (wr_fifo_wr_data), //鍐欐暟鎹 + //SDRAM鎺ュ彛 + .rdclk (sys_clk ), //璇绘椂閽 + .rdreq (sdram_wr_ack ), //璇昏姹 + .q (sdram_data_in ), //璇绘暟鎹 + + .rdusedw (wr_fifo_num ), //FIFO涓殑鏁版嵁閲 + .wrusedw ( ), + .aclr (~sys_rst_n || wr_rst) //娓呴浂淇″彿 + ); + +//------------- rd_fifo_data ------------- +fifo_data rd_fifo_data( + //sdram鎺ュ彛 + .wrclk (sys_clk ), //鍐欐椂閽 + .wrreq (sdram_rd_ack ), //鍐欒姹 + .data (sdram_data_out ), //鍐欐暟鎹 + //鐢ㄦ埛鎺ュ彛 + .rdclk (rd_fifo_rd_clk ), //璇绘椂閽 + .rdreq (rd_fifo_rd_req ), //璇昏姹 + .q (rd_fifo_rd_data), //璇绘暟鎹 + + .rdusedw ( ), + .wrusedw (rd_fifo_num ), //FIFO涓殑鏁版嵁閲 + .aclr (~sys_rst_n || rd_rst) //娓呴浂淇″彿 + ); + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_a_ref.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_a_ref.v new file mode 100644 index 0000000..3b35822 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_a_ref.v @@ -0,0 +1,208 @@ +`timescale 1ns/1ns +////////////////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : sdram_a_ref +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鑷姩鍒锋柊妯″潡 +// +// Revision :V1.1 +// Additional Comments: +// +// 瀹為獙骞冲彴:閲庣伀FPGA寮鍙戞澘 +// 鍏徃 :http://www.embedfire.com +// 璁哄潧 :http://www.firebbs.cn +// 娣樺疂 :https://fire-stm32.taobao.com +////////////////////////////////////////////////////////////////////////////////// + +module sdram_a_ref +( + input wire sys_clk , //绯荤粺鏃堕挓,棰戠巼100MHz + input wire sys_rst_n , //澶嶄綅淇″彿,浣庣數骞虫湁鏁 + input wire init_end , //鍒濆鍖栫粨鏉熶俊鍙 + input wire aref_en , //鑷姩鍒锋柊浣胯兘 + + output reg aref_req , //鑷姩鍒锋柊璇锋眰 + output reg [3:0] aref_cmd , //鑷姩鍒锋柊闃舵鍐欏叆sdram鐨勬寚浠,{cs_n,ras_n,cas_n,we_n} + output reg [1:0] aref_ba , //鑷姩鍒锋柊闃舵Bank鍦板潃 + output reg [12:0] aref_addr , //鍦板潃鏁版嵁,杈呭姪棰勫厖鐢垫搷浣,A12-A0,13浣嶅湴鍧 + output wire aref_end //鑷姩鍒锋柊缁撴潫鏍囧織 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// + +//parameter define +parameter CNT_REF_MAX = 10'd749 ; //鑷姩鍒锋柊绛夊緟鏃堕挓鏁(7.5us) +parameter TRP_CLK = 3'd2 , //棰勫厖鐢电瓑寰呭懆鏈 + TRC_CLK = 3'd7 ; //鑷姩鍒锋柊绛夊緟鍛ㄦ湡 +parameter P_CHARGE = 4'b0010 , //棰勫厖鐢垫寚浠 + A_REF = 4'b0001 , //鑷姩鍒锋柊鎸囦护 + NOP = 4'b0111 ; //绌烘搷浣滄寚浠 +parameter AREF_IDLE = 3'b000 , //鍒濆鐘舵,绛夊緟鑷姩鍒锋柊浣胯兘 + AREF_PCHA = 3'b001 , //棰勫厖鐢电姸鎬 + AREF_TRP = 3'b011 , //棰勫厖鐢电瓑寰 tRP + AUTO_REF = 3'b010 , //鑷姩鍒锋柊鐘舵 + AREF_TRF = 3'b100 , //鑷姩鍒锋柊绛夊緟 tRC + AREF_END = 3'b101 ; //鑷姩鍒锋柊缁撴潫 + +//wire define +wire trp_end ; //棰勫厖鐢电瓑寰呯粨鏉熸爣蹇 +wire trc_end ; //鑷姩鍒锋柊绛夊緟缁撴潫鏍囧織 +wire aref_ack ; //鑷姩鍒锋柊搴旂瓟淇″彿 + +//reg define +reg [9:0] cnt_aref ; //鑷姩鍒锋柊璁℃暟鍣 +reg [2:0] aref_state ; //SDRAM鑷姩鍒锋柊鐘舵 +reg [2:0] cnt_clk ; //鏃堕挓鍛ㄦ湡璁℃暟,璁板綍鑷埛鏂伴樁娈靛悇鐘舵佺瓑寰呮椂闂 +reg cnt_clk_rst ; //鏃堕挓鍛ㄦ湡璁℃暟澶嶄綅鏍囧織 +reg [1:0] cnt_aref_aref ; //鑷姩鍒锋柊娆℃暟璁℃暟鍣 + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// + +//cnt_ref:鍒锋柊璁℃暟鍣 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + cnt_aref <= 10'd0; + else if(cnt_aref >= CNT_REF_MAX) + cnt_aref <= 10'd0; + else if(init_end == 1'b1) + cnt_aref <= cnt_aref + 1'b1; + +//aref_req:鑷姩鍒锋柊璇锋眰 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + aref_req <= 1'b0; + else if(cnt_aref == (CNT_REF_MAX - 1'b1)) + aref_req <= 1'b1; + else if(aref_ack == 1'b1) + aref_req <= 1'b0; + +//aref_ack:鑷姩鍒锋柊搴旂瓟淇″彿 +assign aref_ack = (aref_state == AREF_PCHA ) ? 1'b1 : 1'b0; + +//aref_end:鑷姩鍒锋柊缁撴潫鏍囧織 +assign aref_end = (aref_state == AREF_END ) ? 1'b1 : 1'b0; + +//cnt_clk:鏃堕挓鍛ㄦ湡璁℃暟,璁板綍鍒濆鍖栧悇鐘舵佺瓑寰呮椂闂 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + cnt_clk <= 3'd0; + else if(cnt_clk_rst == 1'b1) + cnt_clk <= 3'd0; + else + cnt_clk <= cnt_clk + 1'b1; + +//trp_end,trc_end,tmrd_end:绛夊緟缁撴潫鏍囧織 +assign trp_end = ((aref_state == AREF_TRP) + && (cnt_clk == TRP_CLK )) ? 1'b1 : 1'b0; +assign trc_end = ((aref_state == AREF_TRF) + && (cnt_clk == TRC_CLK )) ? 1'b1 : 1'b0; + +//cnt_aref_aref:鍒濆鍖栬繃绋嬭嚜鍔ㄥ埛鏂版鏁拌鏁板櫒 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + cnt_aref_aref <= 2'd0; + else if(aref_state == AREF_IDLE) + cnt_aref_aref <= 2'd0; + else if(aref_state == AUTO_REF) + cnt_aref_aref <= cnt_aref_aref + 1'b1; + else + cnt_aref_aref <= cnt_aref_aref; + +//SDRAM鑷姩鍒锋柊鐘舵佹満 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + aref_state <= AREF_IDLE; + else + case(aref_state) + AREF_IDLE: + if((aref_en == 1'b1) && (init_end == 1'b1)) + aref_state <= AREF_PCHA; + else + aref_state <= aref_state; + AREF_PCHA: + aref_state <= AREF_TRP; + AREF_TRP: + if(trp_end == 1'b1) + aref_state <= AUTO_REF; + else + aref_state <= aref_state; + AUTO_REF: + aref_state <= AREF_TRF; + AREF_TRF: + if(trc_end == 1'b1) + if(cnt_aref_aref == 2'd2) + aref_state <= AREF_END; + else + aref_state <= AUTO_REF; + else + aref_state <= aref_state; + AREF_END: + aref_state <= AREF_IDLE; + default: + aref_state <= AREF_IDLE; + endcase + +//cnt_clk_rst:鏃堕挓鍛ㄦ湡璁℃暟澶嶄綅鏍囧織 +always@(*) + begin + case (aref_state) + AREF_IDLE: cnt_clk_rst <= 1'b1; //鏃堕挓鍛ㄦ湡璁℃暟鍣ㄦ竻闆 + AREF_TRP: cnt_clk_rst <= (trp_end == 1'b1) ? 1'b1 : 1'b0; + //绛夊緟缁撴潫鏍囧織鏈夋晥,璁℃暟鍣ㄦ竻闆 + AREF_TRF: cnt_clk_rst <= (trc_end == 1'b1) ? 1'b1 : 1'b0; + //绛夊緟缁撴潫鏍囧織鏈夋晥,璁℃暟鍣ㄦ竻闆 + AREF_END: cnt_clk_rst <= 1'b1; + default: cnt_clk_rst <= 1'b0; + endcase + end + +//SDRAM鎿嶄綔鎸囦护鎺у埗 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + begin + aref_cmd <= NOP; + aref_ba <= 2'b11; + aref_addr <= 13'h1fff; + end + else + case(aref_state) + AREF_IDLE,AREF_TRP,AREF_TRF: //鎵ц绌烘搷浣滄寚浠 + begin + aref_cmd <= NOP; + aref_ba <= 2'b11; + aref_addr <= 13'h1fff; + end + AREF_PCHA: //棰勫厖鐢垫寚浠 + begin + aref_cmd <= P_CHARGE; + aref_ba <= 2'b11; + aref_addr <= 13'h1fff; + end + AUTO_REF: //鑷姩鍒锋柊鎸囦护 + begin + aref_cmd <= A_REF; + aref_ba <= 2'b11; + aref_addr <= 13'h1fff; + end + AREF_END: //涓娆¤嚜鍔ㄥ埛鏂板畬鎴 + begin + aref_cmd <= NOP; + aref_ba <= 2'b11; + aref_addr <= 13'h1fff; + end + default: + begin + aref_cmd <= NOP; + aref_ba <= 2'b11; + aref_addr <= 13'h1fff; + end + endcase + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_arbit.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_arbit.v new file mode 100644 index 0000000..710b98d --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_arbit.v @@ -0,0 +1,180 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : sdram_arbit +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM浠茶妯″潡 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module sdram_arbit +( + input wire sys_clk , //绯荤粺鏃堕挓 + input wire sys_rst_n , //澶嶄綅淇″彿 +//sdram_init + input wire [3:0] init_cmd , //鍒濆鍖栭樁娈靛懡浠 + input wire init_end , //鍒濆鍖栫粨鏉熸爣蹇 + input wire [1:0] init_ba , //鍒濆鍖栭樁娈礏ank鍦板潃 + input wire [12:0] init_addr , //鍒濆鍖栭樁娈垫暟鎹湴鍧 +//sdram_auto_ref + input wire aref_req , //鑷埛鏂拌姹 + input wire aref_end , //鑷埛鏂扮粨鏉 + input wire [3:0] aref_cmd , //鑷埛鏂伴樁娈靛懡浠 + input wire [1:0] aref_ba , //鑷姩鍒锋柊闃舵Bank鍦板潃 + input wire [12:0] aref_addr , //鑷埛鏂伴樁娈垫暟鎹湴鍧 +//sdram_write + input wire wr_req , //鍐欐暟鎹姹 + input wire [1:0] wr_ba , //鍐欓樁娈礏ank鍦板潃 + input wire [15:0] wr_data , //鍐欏叆SDRAM鐨勬暟鎹 + input wire wr_end , //涓娆″啓缁撴潫淇″彿 + input wire [3:0] wr_cmd , //鍐欓樁娈靛懡浠 + input wire [12:0] wr_addr , //鍐欓樁娈垫暟鎹湴鍧 + input wire wr_sdram_en , +//sdram_read + input wire rd_req , //璇绘暟鎹姹 + input wire rd_end , //涓娆¤缁撴潫 + input wire [3:0] rd_cmd , //璇婚樁娈靛懡浠 + input wire [12:0] rd_addr , //璇婚樁娈垫暟鎹湴鍧 + input wire [1:0] rd_ba , //璇婚樁娈礏ank鍦板潃 + + output reg aref_en , //鑷埛鏂颁娇鑳 + output reg wr_en , //鍐欐暟鎹娇鑳 + output reg rd_en , //璇绘暟鎹娇鑳 + + output wire sdram_cke , //SDRAM鏃堕挓浣胯兘 + output wire sdram_cs_n , //SDRAM鐗囬変俊鍙 + output wire sdram_ras_n , //SDRAM琛屽湴鍧閫夐 + output wire sdram_cas_n , //SDRAM鍒楀湴鍧閫夐 + output wire sdram_we_n , //SDRAM鍐欎娇鑳 + output reg [1:0] sdram_ba , //SDRAM Bank鍦板潃 + output reg [12:0] sdram_addr , //SDRAM鍦板潃鎬荤嚎 + inout wire [15:0] sdram_dq //SDRAM鏁版嵁鎬荤嚎 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// + +//parameter define +parameter IDLE = 5'b0_0001 , //鍒濆鐘舵 + ARBIT = 5'b0_0010 , //浠茶鐘舵 + AREF = 5'b0_0100 , //鑷姩鍒锋柊鐘舵 + WRITE = 5'b0_1000 , //鍐欑姸鎬 + READ = 5'b1_0000 ; //璇荤姸鎬 +parameter CMD_NOP = 4'b0111 ; //绌烘搷浣滄寚浠 + +//reg define +reg [3:0] sdram_cmd ; //鍐欏叆SDRAM鍛戒护 +reg [4:0] state ; //鐘舵佹満鐘舵 + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// + +//state锛氱姸鎬佹満鐘舵 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + state <= IDLE; + else case(state) + IDLE: if(init_end == 1'b1) + state <= ARBIT; + else + state <= IDLE; + ARBIT:if(aref_req == 1'b1) + state <= AREF; + else if(wr_req == 1'b1) + state <= WRITE; + else if(rd_req == 1'b1) + state <= READ; + else + state <= ARBIT; + AREF: if(aref_end == 1'b1) + state <= ARBIT; + else + state <= AREF; + WRITE: if(wr_end == 1'b1) + state <= ARBIT; + else + state <= WRITE; + READ: if(rd_end == 1'b1) + state <= ARBIT; + else + state <= READ; + default:state <= IDLE; + endcase + +//aref_en锛氳嚜鍔ㄥ埛鏂颁娇鑳 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + aref_en <= 1'b0; + else if((state == ARBIT) && (aref_req == 1'b1)) + aref_en <= 1'b1; + else if(aref_end == 1'b1) + aref_en <= 1'b0; + +//wr_en锛氬啓鏁版嵁浣胯兘 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + wr_en <= 1'b0; + else if((state == ARBIT) && (aref_req == 1'b0) && (wr_req == 1'b1)) + wr_en <= 1'b1; + else if(wr_end == 1'b1) + wr_en <= 1'b0; + +//rd_en锛氳鏁版嵁浣胯兘 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + rd_en <= 1'b0; + else if((state == ARBIT) && (aref_req == 1'b0) && (rd_req == 1'b1)) + rd_en <= 1'b1; + else if(rd_end == 1'b1) + rd_en <= 1'b0; + +//sdram_cmd:鍐欏叆SDRAM鍛戒护;sdram_ba:SDRAM Bank鍦板潃;sdram_addr:SDRAM鍦板潃鎬荤嚎 +always@(*) + case(state) + IDLE: begin + sdram_cmd <= init_cmd; + sdram_ba <= init_ba; + sdram_addr <= init_addr; + end + AREF: begin + sdram_cmd <= aref_cmd; + sdram_ba <= aref_ba; + sdram_addr <= aref_addr; + end + WRITE: begin + sdram_cmd <= wr_cmd; + sdram_ba <= wr_ba; + sdram_addr <= wr_addr; + end + READ: begin + sdram_cmd <= rd_cmd; + sdram_ba <= rd_ba; + sdram_addr <= rd_addr; + end + default: begin + sdram_cmd <= CMD_NOP; + sdram_ba <= 2'b11; + sdram_addr <= 13'h1fff; + end + endcase + +//SDRAM鏃堕挓浣胯兘 +assign sdram_cke = 1'b1; +//SDRAM鏁版嵁鎬荤嚎 +assign sdram_dq = (wr_sdram_en == 1'b1) ? wr_data : 16'bz; +//鐗囬変俊鍙,琛屽湴鍧閫夐氫俊鍙,鍒楀湴鍧閫夐氫俊鍙,鍐欎娇鑳戒俊鍙 +assign {sdram_cs_n, sdram_ras_n, sdram_cas_n, sdram_we_n} = sdram_cmd; + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_ctrl.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_ctrl.v new file mode 100644 index 0000000..32b78b9 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_ctrl.v @@ -0,0 +1,195 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : sdram_ctrl +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鎺у埗妯″潡 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module sdram_ctrl +( + input wire sys_clk , //绯荤粺鏃堕挓 + input wire sys_rst_n , //澶嶄綅淇″彿锛屼綆鐢靛钩鏈夋晥 +//SDRAM鍐欑鍙 + input wire sdram_wr_req , //鍐橲DRAM璇锋眰淇″彿 + input wire [23:0] sdram_wr_addr , //SDRAM鍐欐搷浣滅殑鍦板潃 + input wire [9:0] wr_burst_len , //鍐檚dram鏃舵暟鎹獊鍙戦暱搴 + input wire [15:0] sdram_data_in , //鍐欏叆SDRAM鐨勬暟鎹 + output wire sdram_wr_ack , //鍐橲DRAM鍝嶅簲淇″彿 +//SDRAM璇荤鍙 + input wire sdram_rd_req , //璇籗DRAM璇锋眰淇″彿 + input wire [23:0] sdram_rd_addr , //SDRAM璇绘搷浣滅殑鍦板潃 + input wire [9:0] rd_burst_len , //璇籹dram鏃舵暟鎹獊鍙戦暱搴 + output wire [15:0] sdram_data_out , //浠嶴DRAM璇诲嚭鐨勬暟鎹 + output wire init_end , //SDRAM 鍒濆鍖栧畬鎴愭爣蹇 + output wire sdram_rd_ack , //璇籗DRAM鍝嶅簲淇″彿 +//FPGA涓嶴DRAM纭欢鎺ュ彛 + output wire sdram_cke , // SDRAM 鏃堕挓鏈夋晥淇″彿 + output wire sdram_cs_n , // SDRAM 鐗囬変俊鍙 + output wire sdram_ras_n , // SDRAM 琛屽湴鍧閫夐 + output wire sdram_cas_n , // SDRAM 鍒楀湴鍧閫夐 + output wire sdram_we_n , // SDRAM 鍐欎娇鑳 + output wire [1:0] sdram_ba , // SDRAM Bank鍦板潃 + output wire [12:0] sdram_addr , // SDRAM 鍦板潃鎬荤嚎 + inout wire [15:0] sdram_dq // SDRAM 鏁版嵁鎬荤嚎 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// + +//wire define +//sdram_init +wire [3:0] init_cmd ; //鍒濆鍖栭樁娈靛啓鍏dram鐨勬寚浠 +wire [1:0] init_ba ; //鍒濆鍖栭樁娈礏ank鍦板潃 +wire [12:0] init_addr ; //鍒濆鍖栭樁娈靛湴鍧鏁版嵁,杈呭姪棰勫厖鐢垫搷浣 +//sdram_a_ref +wire aref_req ; //鑷姩鍒锋柊璇锋眰 +wire aref_end ; //鑷姩鍒锋柊缁撴潫鏍囧織 +wire [3:0] aref_cmd ; //鑷姩鍒锋柊闃舵鍐欏叆sdram鐨勬寚浠 +wire [1:0] aref_ba ; //鑷姩鍒锋柊闃舵Bank鍦板潃 +wire [12:0] aref_addr ; //鍦板潃鏁版嵁,杈呭姪棰勫厖鐢垫搷浣 +wire aref_en ; //鑷姩鍒锋柊浣胯兘 +//sdram_write +wire wr_en ; //鍐欎娇鑳 +wire wr_end ; //涓娆″啓缁撴潫淇″彿 +wire [3:0] write_cmd ; //鍐欓樁娈靛懡浠 +wire [1:0] write_ba ; //鍐欐暟鎹樁娈礏ank鍦板潃 +wire [12:0] write_addr ; //鍐欓樁娈垫暟鎹湴鍧 +wire wr_sdram_en ; //SDRAM鍐欎娇鑳 +wire [15:0] wr_sdram_data; //鍐欏叆SDRAM鐨勬暟鎹 +//sdram_read +wire rd_en ; //璇讳娇鑳 +wire rd_end ; //涓娆＄獊鍙戣缁撴潫 +wire [3:0] read_cmd ; //璇绘暟鎹樁娈靛啓鍏dram鐨勬寚浠 +wire [1:0] read_ba ; //璇婚樁娈礏ank鍦板潃 +wire [12:0] read_addr ; //璇婚樁娈垫暟鎹湴鍧 + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// +//------------- sdram_init_inst ------------- +sdram_init sdram_init_inst +( + .sys_clk (sys_clk ), //绯荤粺鏃堕挓,棰戠巼100MHz + .sys_rst_n (sys_rst_n ), //澶嶄綅淇″彿,浣庣數骞虫湁鏁 + + .init_cmd (init_cmd ), //鍒濆鍖栭樁娈靛啓鍏dram鐨勬寚浠 + .init_ba (init_ba ), //鍒濆鍖栭樁娈礏ank鍦板潃 + .init_addr (init_addr ), //鍒濆鍖栭樁娈靛湴鍧鏁版嵁,杈呭姪棰勫厖鐢垫搷浣 + .init_end (init_end ) //鍒濆鍖栫粨鏉熶俊鍙 +); + +//------------- sdram_arbit_inst ------------- +sdram_arbit sdram_arbit_inst +( + .sys_clk (sys_clk ), //绯荤粺鏃堕挓 + .sys_rst_n (sys_rst_n ), //澶嶄綅淇″彿 +//sdram_init + .init_cmd (init_cmd ), //鍒濆鍖栭樁娈靛懡浠 + .init_end (init_end ), //鍒濆鍖栫粨鏉熸爣蹇 + .init_ba (init_ba ), //鍒濆鍖栭樁娈礏ank鍦板潃 + .init_addr (init_addr ), //鍒濆鍖栭樁娈垫暟鎹湴鍧 +//sdram_auto_ref + .aref_req (aref_req ), //鑷埛鏂拌姹 + .aref_end (aref_end ), //鑷埛鏂扮粨鏉 + .aref_cmd (aref_cmd ), //鑷埛鏂伴樁娈靛懡浠 + .aref_ba (aref_ba ), //鑷姩鍒锋柊闃舵Bank鍦板潃 + .aref_addr (aref_addr ), //鑷埛鏂伴樁娈垫暟鎹湴鍧 +//sdram_write + .wr_req (sdram_wr_req ), //鍐欐暟鎹姹 + .wr_end (wr_end ), //涓娆″啓缁撴潫淇″彿 + .wr_cmd (write_cmd ), //鍐欓樁娈靛懡浠 + .wr_ba (write_ba ), //鍐欓樁娈礏ank鍦板潃 + .wr_addr (write_addr ), //鍐欓樁娈垫暟鎹湴鍧 + .wr_sdram_en(wr_sdram_en ), //SDRAM鍐欎娇鑳 + .wr_data (wr_sdram_data ), //鍐欏叆SDRAM鐨勬暟鎹 +//sdram_read + .rd_req (sdram_rd_req ), //璇绘暟鎹姹 + .rd_end (rd_end ), //涓娆¤缁撴潫 + .rd_cmd (read_cmd ), //璇婚樁娈靛懡浠 + .rd_addr (read_addr ), //璇婚樁娈垫暟鎹湴鍧 + .rd_ba (read_ba ), //璇婚樁娈礏ank鍦板潃 + + .aref_en (aref_en ), //鑷埛鏂颁娇鑳 + .wr_en (wr_en ), //鍐欐暟鎹娇鑳 + .rd_en (rd_en ), //璇绘暟鎹娇鑳 + + .sdram_cke (sdram_cke ), //SDRAM鏃堕挓浣胯兘 + .sdram_cs_n (sdram_cs_n ), //SDRAM鐗囬変俊鍙 + .sdram_ras_n(sdram_ras_n ), //SDRAM琛屽湴鍧閫夐 + .sdram_cas_n(sdram_cas_n ), //SDRAM鍒楀湴鍧閫夐 + .sdram_we_n (sdram_we_n ), //SDRAM鍐欎娇鑳 + .sdram_ba (sdram_ba ), //SDRAM Bank鍦板潃 + .sdram_addr (sdram_addr ), //SDRAM鍦板潃鎬荤嚎 + .sdram_dq (sdram_dq ) //SDRAM鏁版嵁鎬荤嚎 +); + +//------------- sdram_a_ref_inst ------------- +sdram_a_ref sdram_a_ref_inst +( + .sys_clk (sys_clk ), //绯荤粺鏃堕挓,棰戠巼100MHz + .sys_rst_n (sys_rst_n ), //澶嶄綅淇″彿,浣庣數骞虫湁鏁 + .init_end (init_end ), //鍒濆鍖栫粨鏉熶俊鍙 + .aref_en (aref_en ), //鑷姩鍒锋柊浣胯兘 + + .aref_req (aref_req ), //鑷姩鍒锋柊璇锋眰 + .aref_cmd (aref_cmd ), //鑷姩鍒锋柊闃舵鍐欏叆sdram鐨勬寚浠 + .aref_ba (aref_ba ), //鑷姩鍒锋柊闃舵Bank鍦板潃 + .aref_addr (aref_addr ), //鍦板潃鏁版嵁,杈呭姪棰勫厖鐢垫搷浣 + .aref_end (aref_end ) //鑷姩鍒锋柊缁撴潫鏍囧織 +); + +//------------- sdram_write_inst ------------- +sdram_write sdram_write_inst +( + .sys_clk (sys_clk ), //绯荤粺鏃堕挓,棰戠巼100MHz + .sys_rst_n (sys_rst_n ), //澶嶄綅淇″彿,浣庣數骞虫湁鏁 + .init_end (init_end ), //鍒濆鍖栫粨鏉熶俊鍙 + .wr_en (wr_en ), //鍐欎娇鑳 + + .wr_addr (sdram_wr_addr ), //鍐橲DRAM鍦板潃 + .wr_data (sdram_data_in ), //寰呭啓鍏DRAM鐨勬暟鎹(鍐橣IFO浼犲叆) + .wr_burst_len (wr_burst_len ), //鍐欑獊鍙慡DRAM瀛楄妭鏁 + + .wr_ack (sdram_wr_ack ), //鍐橲DRAM鍝嶅簲淇″彿 + .wr_end (wr_end ), //涓娆＄獊鍙戝啓缁撴潫 + .write_cmd (write_cmd ), //鍐欐暟鎹樁娈靛啓鍏dram鐨勬寚浠 + .write_ba (write_ba ), //鍐欐暟鎹樁娈礏ank鍦板潃 + .write_addr (write_addr ), //鍦板潃鏁版嵁,杈呭姪棰勫厖鐢垫搷浣 + .wr_sdram_en (wr_sdram_en ), //鏁版嵁鎬荤嚎杈撳嚭浣胯兘 + .wr_sdram_data (wr_sdram_data ) //鍐欏叆SDRAM鐨勬暟鎹 +); + +//------------- sdram_read_inst ------------- +sdram_read sdram_read_inst +( + .sys_clk (sys_clk ), //绯荤粺鏃堕挓,棰戠巼100MHz + .sys_rst_n (sys_rst_n ), //澶嶄綅淇″彿,浣庣數骞虫湁鏁 + .init_end (init_end ), //鍒濆鍖栫粨鏉熶俊鍙 + .rd_en (rd_en ), //璇讳娇鑳 + + .rd_addr (sdram_rd_addr ), //璇籗DRAM鍦板潃 + .rd_data (sdram_dq ), //鑷猄DRAM涓鍑虹殑鏁版嵁 + .rd_burst_len (rd_burst_len ), //璇荤獊鍙慡DRAM瀛楄妭鏁 + + .rd_ack (sdram_rd_ack ), //璇籗DRAM鍝嶅簲淇″彿 + .rd_end (rd_end ), //涓娆＄獊鍙戣缁撴潫 + .read_cmd (read_cmd ), //璇绘暟鎹樁娈靛啓鍏dram鐨勬寚浠 + .read_ba (read_ba ), //璇绘暟鎹樁娈礏ank鍦板潃 + .read_addr (read_addr ), //鍦板潃鏁版嵁,杈呭姪棰勫厖鐢垫搷浣 + .rd_sdram_data (sdram_data_out ) //SDRAM璇诲嚭鐨勬暟鎹 +); + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_init.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_init.v new file mode 100644 index 0000000..9fc99f6 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_init.v @@ -0,0 +1,229 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : sdram_init +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鍒濆鍖栨ā鍧 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module sdram_init +( + input wire sys_clk , //绯荤粺鏃堕挓,棰戠巼100MHz + input wire sys_rst_n , //澶嶄綅淇″彿,浣庣數骞虫湁鏁 + + output reg [3:0] init_cmd , //鍒濆鍖栭樁娈靛啓鍏dram鐨勬寚浠,{cs_n,ras_n,cas_n,we_n} + output reg [1:0] init_ba , //鍒濆鍖栭樁娈礏ank鍦板潃 + output reg [12:0] init_addr , //鍒濆鍖栭樁娈靛湴鍧鏁版嵁,杈呭姪棰勫厖鐢垫搷浣 + //鍜岄厤缃ā寮忓瘎瀛樺櫒鎿嶄綔,A12-A0,鍏13浣 + output wire init_end //鍒濆鍖栫粨鏉熶俊鍙 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// + +// parameter define +parameter T_POWER = 15'd20_000 ; //涓婄數鍚庣瓑寰呮椂閽熸暟(200us) +//SDRAM鍒濆鍖栫敤鍒扮殑鎺у埗淇″彿鍛戒护 +parameter P_CHARGE = 4'b0010 , //棰勫厖鐢垫寚浠 + AUTO_REF = 4'b0001 , //鑷姩鍒锋柊鎸囦护 + NOP = 4'b0111 , //绌烘搷浣滄寚浠 + M_REG_SET = 4'b0000 ; //妯″紡瀵勫瓨鍣ㄨ缃寚浠 +//SDRAM鍒濆鍖栬繃绋嬪悇涓姸鎬 +parameter INIT_IDLE = 3'b000 , //鍒濆鐘舵 + INIT_PRE = 3'b001 , //棰勫厖鐢电姸鎬 + INIT_TRP = 3'b011 , //棰勫厖鐢电瓑寰 tRP + INIT_AR = 3'b010 , //鑷姩鍒锋柊 + INIT_TRF = 3'b100 , //鑷姩鍒锋柊绛夊緟 tRC + INIT_MRS = 3'b101 , //妯″紡瀵勫瓨鍣ㄨ缃 + INIT_TMRD = 3'b111 , //妯″紡瀵勫瓨鍣ㄨ缃瓑寰 tMRD + INIT_END = 3'b110 ; //鍒濆鍖栧畬鎴 +parameter TRP_CLK = 3'd2 , //棰勫厖鐢电瓑寰呭懆鏈,20ns + TRC_CLK = 3'd7 , //鑷姩鍒锋柊绛夊緟,70ns + TMRD_CLK = 3'd3 ; //妯″紡瀵勫瓨鍣ㄨ缃瓑寰呭懆鏈,30ns + +// wire define +wire wait_end ; //涓婄數鍚200us绛夊緟缁撴潫鏍囧織 +wire trp_end ; //棰勫厖鐢电瓑寰呯粨鏉熸爣蹇 +wire trc_end ; //鑷姩鍒锋柊绛夊緟缁撴潫鏍囧織 +wire tmrd_end ; //妯″紡瀵勫瓨鍣ㄨ缃瓑寰呯粨鏉熸爣蹇 + +// reg define +reg [14:0] cnt_200us ; //SDRAM涓婄數鍚200us绋冲畾鏈熻鏁板櫒 +reg [2:0] init_state ; //SDRAM鍒濆鍖栫姸鎬 +reg [2:0] cnt_clk ; //鏃堕挓鍛ㄦ湡璁℃暟,璁板綍鍒濆鍖栧悇鐘舵佺瓑寰呭懆鏈熸暟 +reg cnt_clk_rst ; //鏃堕挓鍛ㄦ湡璁℃暟澶嶄綅鏍囧織 +reg [3:0] cnt_init_aref ; //鍒濆鍖栬繃绋嬭嚜鍔ㄥ埛鏂版鏁拌鏁板櫒 + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// + +//cnt_200us:SDRAM涓婄數鍚200us绋冲畾鏈熻鏁板櫒 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + cnt_200us <= 15'd0; + else if(cnt_200us == T_POWER) + cnt_200us <= T_POWER; + else + cnt_200us <= cnt_200us + 1'b1; + +//wait_end:涓婄數鍚200us绛夊緟缁撴潫鏍囧織 +assign wait_end = (cnt_200us == (T_POWER - 1'b1)) ? 1'b1 : 1'b0; + +//init_end:SDRAM鍒濆鍖栧畬姣曚俊鍙 +assign init_end = (init_state == INIT_END) ? 1'b1 : 1'b0; + +//cnt_clk:鏃堕挓鍛ㄦ湡璁℃暟,璁板綍鍒濆鍖栧悇鐘舵佺瓑寰呮椂闂 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + cnt_clk <= 3'd0; + else if(cnt_clk_rst == 1'b1) + cnt_clk <= 3'd0; + else + cnt_clk <= cnt_clk + 1'b1; + +//cnt_init_aref:鍒濆鍖栬繃绋嬭嚜鍔ㄥ埛鏂版鏁拌鏁板櫒 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + cnt_init_aref <= 4'd0; + else if(init_state == INIT_IDLE) + cnt_init_aref <= 4'd0; + else if(init_state == INIT_AR) + cnt_init_aref <= cnt_init_aref + 1'b1; + else + cnt_init_aref <= cnt_init_aref; + +//trp_end,trc_end,tmrd_end:绛夊緟缁撴潫鏍囧織 +assign trp_end = ((init_state == INIT_TRP ) + && (cnt_clk == TRP_CLK )) ? 1'b1 : 1'b0; +assign trc_end = ((init_state == INIT_TRF ) + && (cnt_clk == TRC_CLK )) ? 1'b1 : 1'b0; +assign tmrd_end = ((init_state == INIT_TMRD) + && (cnt_clk == TMRD_CLK)) ? 1'b1 : 1'b0; + +//SDRAM鐨勫垵濮嬪寲鐘舵佹満 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + init_state <= INIT_IDLE; + else + case(init_state) + INIT_IDLE: //绯荤粺涓婄數鍚,鍦ㄥ垵濮嬬姸鎬佺瓑寰200us璺宠浆鍒伴鍏呯數鐘舵 + if(wait_end == 1'b1) + init_state <= INIT_PRE; + else + init_state <= init_state; + INIT_PRE: //棰勫厖鐢电姸鎬侊紝鐩存帴璺宠浆鍒伴鍏呯數绛夊緟鐘舵 + init_state <= INIT_TRP; + INIT_TRP: //棰勫厖鐢电瓑寰呯姸鎬,绛夊緟缁撴潫,璺宠浆鍒拌嚜鍔ㄥ埛鏂扮姸鎬 + if(trp_end == 1'b1) + init_state <= INIT_AR; + else + init_state <= init_state; + INIT_AR : //鑷姩鍒锋柊鐘舵,鐩存帴璺宠浆鍒拌嚜鍔ㄥ埛鏂扮瓑寰呯姸鎬 + init_state <= INIT_TRF; + INIT_TRF: //鑷姩鍒锋柊绛夊緟鐘舵,绛夊緟缁撴潫,鑷姩璺宠浆鍒版ā寮忓瘎瀛樺櫒璁剧疆鐘舵 + if(trc_end == 1'b1) + if(cnt_init_aref == 4'd8) + init_state <= INIT_MRS; + else + init_state <= INIT_AR; + else + init_state <= init_state; + INIT_MRS: //妯″紡瀵勫瓨鍣ㄨ缃姸鎬,鐩存帴璺宠浆鍒版ā寮忓瘎瀛樺櫒璁剧疆绛夊緟鐘舵 + init_state <= INIT_TMRD; + INIT_TMRD: //妯″紡瀵勫瓨鍣ㄨ缃瓑寰呯姸鎬,绛夊緟缁撴潫,璺冲埌鍒濆鍖栧畬鎴愮姸鎬 + if(tmrd_end == 1'b1) + init_state <= INIT_END; + else + init_state <= init_state; + INIT_END: //鍒濆鍖栧畬鎴愮姸鎬,淇濇寔姝ょ姸鎬 + init_state <= INIT_END; + default: init_state <= INIT_IDLE; + endcase + +//cnt_clk_rst:鏃堕挓鍛ㄦ湡璁℃暟澶嶄綅鏍囧織 +always@(*) + begin + case (init_state) + INIT_IDLE: cnt_clk_rst <= 1'b1; //鏃堕挓鍛ㄦ湡璁℃暟澶嶄綅淇″彿,楂樻湁鏁,鏃堕挓鍛ㄦ湡璁℃暟娓呴浂 + INIT_TRP: cnt_clk_rst <= (trp_end == 1'b1) ? 1'b1 : 1'b0; + //绛夊緟缁撴潫鏍囧織鏈夋晥,璁℃暟鍣ㄦ竻闆 + INIT_TRF: cnt_clk_rst <= (trc_end == 1'b1) ? 1'b1 : 1'b0; + //绛夊緟缁撴潫鏍囧織鏈夋晥,璁℃暟鍣ㄦ竻闆 + INIT_TMRD: cnt_clk_rst <= (tmrd_end == 1'b1) ? 1'b1 : 1'b0; + //绛夊緟缁撴潫鏍囧織鏈夋晥,璁℃暟鍣ㄦ竻闆 + INIT_END: cnt_clk_rst <= 1'b1; //鍒濆鍖栧畬鎴,璁℃暟鍣ㄦ竻闆 + default: cnt_clk_rst <= 1'b0; + endcase + end + +//SDRAM鎿嶄綔鎸囦护鎺у埗 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + begin + init_cmd <= NOP; + init_ba <= 2'b11; + init_addr <= 13'h1fff; + end + else + case(init_state) + INIT_IDLE,INIT_TRP,INIT_TRF,INIT_TMRD: //鎵ц绌烘搷浣滄寚浠 + begin + init_cmd <= NOP; + init_ba <= 2'b11; + init_addr <= 13'h1fff; + end + INIT_PRE: //棰勫厖鐢垫寚浠 + begin + init_cmd <= P_CHARGE; + init_ba <= 2'b11; + init_addr <= 13'h1fff; + end + INIT_AR: //鑷姩鍒锋柊鎸囦护 + begin + init_cmd <= AUTO_REF; + init_ba <= 2'b11; + init_addr <= 13'h1fff; + end + INIT_MRS: //妯″紡瀵勫瓨鍣ㄨ缃寚浠 + begin + init_cmd <= M_REG_SET; + init_ba <= 2'b00; + init_addr <= + { //鍦板潃杈呭姪閰嶇疆妯″紡瀵勫瓨鍣,鍙傛暟涓嶅悓,閰嶇疆鐨勬ā寮忎笉鍚 + 3'b000, //A12-A10:棰勭暀 + 1'b0, //A9=0:璇诲啓鏂瑰紡,0:绐佸彂璇&绐佸彂鍐,1:绐佸彂璇&鍗曞啓 + 2'b00, //{A8,A7}=00:鏍囧噯妯″紡,榛樿 + 3'b011, //{A6,A5,A4}=011:CAS娼滀紡鏈,010:2,011:3,鍏朵粬:淇濈暀 + 1'b0, //A3=0:绐佸彂浼犺緭鏂瑰紡,0:椤哄簭,1:闅旇 + 3'b111 //{A2,A1,A0}=111:绐佸彂闀垮害,000:鍗曞瓧鑺,001:2瀛楄妭 + //010:4瀛楄妭,011:8瀛楄妭,111:鏁撮〉,鍏朵粬:淇濈暀 + }; + end + INIT_END: //SDRAM鍒濆鍖栧畬鎴 + begin + init_cmd <= NOP; + init_ba <= 2'b11; + init_addr <= 13'h1fff; + end + default: + begin + init_cmd <= NOP; + init_ba <= 2'b11; + init_addr <= 13'h1fff; + end + endcase + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_read.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_read.v new file mode 100644 index 0000000..4dcb13f --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_read.v @@ -0,0 +1,225 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : sdram_read +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM璇绘暟鎹ā鍧 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module sdram_read +( + input wire sys_clk , //绯荤粺鏃堕挓,棰戠巼100MHz + input wire sys_rst_n , //澶嶄綅淇″彿,浣庣數骞虫湁鏁 + input wire init_end , //鍒濆鍖栫粨鏉熶俊鍙 + input wire rd_en , //璇讳娇鑳 + input wire [23:0] rd_addr , //璇籗DRAM鍦板潃 + input wire [15:0] rd_data , //鑷猄DRAM涓鍑虹殑鏁版嵁 + input wire [9:0] rd_burst_len , //璇荤獊鍙慡DRAM瀛楄妭鏁 + + output wire rd_ack , //璇籗DRAM鍝嶅簲淇″彿 + output wire rd_end , //涓娆＄獊鍙戣缁撴潫 + output reg [3:0] read_cmd , //璇绘暟鎹樁娈靛啓鍏dram鐨勬寚浠,{cs_n,ras_n,cas_n,we_n} + output reg [1:0] read_ba , //璇绘暟鎹樁娈礏ank鍦板潃 + output reg [12:0] read_addr , //鍦板潃鏁版嵁,杈呭姪棰勫厖鐢垫搷浣,琛屻佸垪鍦板潃,A12-A0,13浣嶅湴鍧 + output wire [15:0] rd_sdram_data //SDRAM璇诲嚭鐨勬暟鎹 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// + +//parameter define +parameter TRCD_CLK = 10'd2 , //婵娲荤瓑寰呭懆鏈 + TCL_CLK = 10'd3 , //娼滀紡鏈 + TRP_CLK = 10'd2 ; //棰勫厖鐢电瓑寰呭懆鏈 +parameter RD_IDLE = 4'b0000 , //绌洪棽 + RD_ACTIVE = 4'b0001 , //婵娲 + RD_TRCD = 4'b0011 , //婵娲荤瓑寰 + RD_READ = 4'b0010 , //璇绘搷浣 + RD_CL = 4'b0100 , //娼滀紡鏈 + RD_DATA = 4'b0101 , //璇绘暟鎹 + RD_PRE = 4'b0111 , //棰勫厖鐢 + RD_TRP = 4'b0110 , //棰勫厖鐢电瓑寰 + RD_END = 4'b1100 ; //涓娆＄獊鍙戣缁撴潫 +parameter NOP = 4'b0111 , //绌烘搷浣滄寚浠 + ACTIVE = 4'b0011 , //婵娲绘寚浠 + READ = 4'b0101 , //鏁版嵁璇绘寚浠 + B_STOP = 4'b0110 , //绐佸彂鍋滄鎸囦护 + P_CHARGE = 4'b0010 ; //棰勫厖鐢垫寚浠 + +//wire define +wire trcd_end ; //婵娲荤瓑寰呭懆鏈熺粨鏉 +wire trp_end ; //棰勫厖鐢电瓑寰呭懆鏈熺粨鏉 +wire tcl_end ; //娼滀紡鏈熺粨鏉熸爣蹇 +wire tread_end ; //绐佸彂璇荤粨鏉 +wire rdburst_end ; //璇荤獊鍙戠粓姝 + +//reg define +reg [3:0] read_state ; //SDRAM鍐欑姸鎬 +reg [9:0] cnt_clk ; //鏃堕挓鍛ㄦ湡璁℃暟,璁板綍鍒濆鍖栧悇鐘舵佺瓑寰呮椂闂 +reg cnt_clk_rst ; //鏃堕挓鍛ㄦ湡璁℃暟澶嶄綅鏍囧織 +reg [15:0] rd_data_reg ; + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// + +//rd_data_reg +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + rd_data_reg <= 16'd0; + else + rd_data_reg <= rd_data; + +//rd_end:涓娆＄獊鍙戣缁撴潫 +assign rd_end = (read_state == RD_END) ? 1'b1 : 1'b0; + +//rd_ack:璇籗DRAM鍝嶅簲淇″彿 +assign rd_ack = (read_state == RD_DATA) + && (cnt_clk >= 10'd1) + && (cnt_clk < (rd_burst_len + 2'd1)); + +//cnt_clk:鏃堕挓鍛ㄦ湡璁℃暟,璁板綍鍒濆鍖栧悇鐘舵佺瓑寰呮椂闂 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + cnt_clk <= 10'd0; + else if(cnt_clk_rst == 1'b1) + cnt_clk <= 10'd0; + else + cnt_clk <= cnt_clk + 1'b1; + +//trcd_end,trp_end,tcl_end,tread_end,rdburst_end:绛夊緟缁撴潫鏍囧織 +assign trcd_end = ((read_state == RD_TRCD) + && (cnt_clk == TRCD_CLK )) ? 1'b1 : 1'b0; //琛岄夐氬懆鏈熺粨鏉 +assign trp_end = ((read_state == RD_TRP ) + && (cnt_clk == TRP_CLK )) ? 1'b1 : 1'b0; //棰勫厖鐢垫湁鏁堝懆鏈熺粨鏉 +assign tcl_end = ((read_state == RD_CL ) + && (cnt_clk == TCL_CLK - 1 )) ? 1'b1 : 1'b0; //娼滀紡鏈熺粨鏉 +assign tread_end = ((read_state == RD_DATA) + && (cnt_clk == rd_burst_len + 2)) ? 1'b1 : 1'b0; //绐佸彂璇荤粨鏉 +assign rdburst_end = ((read_state == RD_DATA) + && (cnt_clk == rd_burst_len - 4)) ? 1'b1 : 1'b0; //璇荤獊鍙戠粓姝 + +//read_state:SDRAM鐨勫伐浣滅姸鎬佹満 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + read_state <= RD_IDLE; + else + case(read_state) + RD_IDLE: + if((rd_en ==1'b1) && (init_end == 1'b1)) + read_state <= RD_ACTIVE; + else + read_state <= RD_IDLE; + RD_ACTIVE: + read_state <= RD_TRCD; + RD_TRCD: + if(trcd_end == 1'b1) + read_state <= RD_READ; + else + read_state <= RD_TRCD; + RD_READ: + read_state <= RD_CL; + RD_CL: + read_state <= (tcl_end == 1'b1) ? RD_DATA : RD_CL; + RD_DATA: + read_state <= (tread_end == 1'b1) ? RD_PRE : RD_DATA; + RD_PRE: + read_state <= RD_TRP; + RD_TRP: + read_state <= (trp_end == 1'b1) ? RD_END : RD_TRP; + RD_END: + read_state <= RD_IDLE; + default: + read_state <= RD_IDLE; + endcase + +//璁℃暟鍣ㄦ帶鍒堕昏緫 +always@(*) + begin + case(read_state) + RD_IDLE: cnt_clk_rst <= 1'b1; + RD_TRCD: cnt_clk_rst <= (trcd_end == 1'b1) ? 1'b1 : 1'b0; + RD_READ: cnt_clk_rst <= 1'b1; + RD_CL: cnt_clk_rst <= (tcl_end == 1'b1) ? 1'b1 : 1'b0; + RD_DATA: cnt_clk_rst <= (tread_end == 1'b1) ? 1'b1 : 1'b0; + RD_TRP: cnt_clk_rst <= (trp_end == 1'b1) ? 1'b1 : 1'b0; + RD_END: cnt_clk_rst <= 1'b1; + default: cnt_clk_rst <= 1'b0; + endcase + end + +//SDRAM鎿嶄綔鎸囦护鎺у埗 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + begin + read_cmd <= NOP; + read_ba <= 2'b11; + read_addr <= 13'h1fff; + end + else + case(read_state) + RD_IDLE,RD_TRCD,RD_TRP: + begin + read_cmd <= NOP; + read_ba <= 2'b11; + read_addr <= 13'h1fff; + end + RD_ACTIVE: //婵娲绘寚浠 + begin + read_cmd <= ACTIVE; + read_ba <= rd_addr[23:22]; + read_addr <= rd_addr[21:9]; + end + RD_READ: //璇绘搷浣滄寚浠 + begin + read_cmd <= READ; + read_ba <= rd_addr[23:22]; + read_addr <= {4'b0000,rd_addr[8:0]}; + end + RD_DATA: //绐佸彂浼犺緭缁堟鎸囦护 + begin + if(rdburst_end == 1'b1) + read_cmd <= B_STOP; + else + begin + read_cmd <= NOP; + read_ba <= 2'b11; + read_addr <= 13'h1fff; + end + end + RD_PRE: //棰勫厖鐢垫寚浠 + begin + read_cmd <= P_CHARGE; + read_ba <= rd_addr[23:22]; + read_addr <= 13'h0400; + end + RD_END: + begin + read_cmd <= NOP; + read_ba <= 2'b11; + read_addr <= 13'h1fff; + end + default: + begin + read_cmd <= NOP; + read_ba <= 2'b11; + read_addr <= 13'h1fff; + end + endcase + +//rd_sdram_data:SDRAM璇诲嚭鐨勬暟鎹 +assign rd_sdram_data = (rd_ack == 1'b1) ? rd_data_reg : 16'b0; + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_top.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_top.v new file mode 100644 index 0000000..7b1655d --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_top.v @@ -0,0 +1,151 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : sdram_top +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鎺у埗鍣ㄩ《灞傛枃浠 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module sdram_top +( + input wire sys_clk , //绯荤粺鏃堕挓 + input wire clk_out , //鐩镐綅鍋忕Щ鏃堕挓 + input wire sys_rst_n , //澶嶄綅淇″彿,浣庢湁鏁 +//鍐橣IFO淇″彿 + input wire wr_fifo_wr_clk , //鍐橣IFO鍐欐椂閽 + input wire wr_fifo_wr_req , //鍐橣IFO鍐欒姹 + input wire [15:0] wr_fifo_wr_data , //鍐橣IFO鍐欐暟鎹 + input wire [23:0] sdram_wr_b_addr , //鍐橲DRAM棣栧湴鍧 + input wire [23:0] sdram_wr_e_addr , //鍐橲DRAM鏈湴鍧 + input wire [9:0] wr_burst_len , //鍐橲DRAM鏁版嵁绐佸彂闀垮害 + input wire wr_rst , //鍐欏浣嶄俊鍙 +//璇籉IFO淇″彿 + input wire rd_fifo_rd_clk , //璇籉IFO璇绘椂閽 + input wire rd_fifo_rd_req , //璇籉IFO璇昏姹 + input wire [23:0] sdram_rd_b_addr , //璇籗DRAM棣栧湴鍧 + input wire [23:0] sdram_rd_e_addr , //璇籗DRAM鏈湴鍧 + input wire [9:0] rd_burst_len , //璇籗DRAM鏁版嵁绐佸彂闀垮害 + input wire rd_rst , //璇诲浣嶄俊鍙 + output wire [15:0] rd_fifo_rd_data , //璇籉IFO璇绘暟鎹 + output wire [9:0] rd_fifo_num , //璇籪ifo涓殑鏁版嵁閲 + + input wire read_valid , //SDRAM璇讳娇鑳 + output wire init_end , //SDRAM鍒濆鍖栧畬鎴愭爣蹇 +//SDRAM鎺ュ彛淇″彿 + output wire sdram_clk , //SDRAM鑺墖鏃堕挓 + output wire sdram_cke , //SDRAM鏃堕挓鏈夋晥淇″彿 + output wire sdram_cs_n , //SDRAM鐗囬変俊鍙 + output wire sdram_ras_n , //SDRAM琛屽湴鍧閫夐氳剦鍐 + output wire sdram_cas_n , //SDRAM鍒楀湴鍧閫夐氳剦鍐 + output wire sdram_we_n , //SDRAM鍐欏厑璁镐綅 + output wire [1:0] sdram_ba , //SDRAM鐨凩-Bank鍦板潃绾 + output wire [12:0] sdram_addr , //SDRAM鍦板潃鎬荤嚎 + output wire [1:0] sdram_dqm , //SDRAM鏁版嵁鎺╃爜 + inout wire [15:0] sdram_dq //SDRAM鏁版嵁鎬荤嚎 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// + +//wire define +wire sdram_wr_req ; //sdram 鍐欒姹 +wire sdram_wr_ack ; //sdram 鍐欏搷搴 +wire [23:0] sdram_wr_addr ; //sdram 鍐欏湴鍧 +wire [15:0] sdram_data_in ; //鍐欏叆sdram涓殑鏁版嵁 + +wire sdram_rd_req ; //sdram 璇昏姹 +wire sdram_rd_ack ; //sdram 璇诲搷搴 +wire [23:0] sdram_rd_addr ; //sdram 璇诲湴鍧 +wire [15:0] sdram_data_out ; //浠巗dram涓鍑虹殑鏁版嵁 + +//sdram_clk:SDRAM鑺墖鏃堕挓 +assign sdram_clk = clk_out; +//sdram_dqm:SDRAM鏁版嵁鎺╃爜 +assign sdram_dqm = 2'b00; + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// + +//------------- fifo_ctrl_inst ------------- +fifo_ctrl fifo_ctrl_inst( + +//system signal + .sys_clk (sys_clk ), //SDRAM鎺у埗鏃堕挓 + .sys_rst_n (sys_rst_n ), //澶嶄綅淇″彿 +//write fifo signal + .wr_fifo_wr_clk (wr_fifo_wr_clk ), //鍐橣IFO鍐欐椂閽 + .wr_fifo_wr_req (wr_fifo_wr_req ), //鍐橣IFO鍐欒姹 + .wr_fifo_wr_data(wr_fifo_wr_data), //鍐橣IFO鍐欐暟鎹 + .sdram_wr_b_addr(sdram_wr_b_addr), //鍐橲DRAM棣栧湴鍧 + .sdram_wr_e_addr(sdram_wr_e_addr), //鍐橲DRAM鏈湴鍧 + .wr_burst_len (wr_burst_len ), //鍐橲DRAM鏁版嵁绐佸彂闀垮害 + .wr_rst (wr_rst ), //鍐欐竻闆朵俊鍙 +//read fifo signal + .rd_fifo_rd_clk (rd_fifo_rd_clk ), //璇籉IFO璇绘椂閽 + .rd_fifo_rd_req (rd_fifo_rd_req ), //璇籉IFO璇昏姹 + .rd_fifo_rd_data(rd_fifo_rd_data), //璇籉IFO璇绘暟鎹 + .rd_fifo_num (rd_fifo_num ), //璇籉IFO涓殑鏁版嵁閲 + .sdram_rd_b_addr(sdram_rd_b_addr), //璇籗DRAM棣栧湴鍧 + .sdram_rd_e_addr(sdram_rd_e_addr), //璇籗DRAM鏈湴鍧 + .rd_burst_len (rd_burst_len ), //璇籗DRAM鏁版嵁绐佸彂闀垮害 + .rd_rst (rd_rst ), //璇绘竻闆朵俊鍙 +//USER ctrl signal + .read_valid (read_valid ), //SDRAM璇讳娇鑳 + .init_end (init_end ), //SDRAM鍒濆鍖栧畬鎴愭爣蹇 +//SDRAM ctrl of write + .sdram_wr_ack (sdram_wr_ack ), //SDRAM鍐欏搷搴 + .sdram_wr_req (sdram_wr_req ), //SDRAM鍐欒姹 + .sdram_wr_addr (sdram_wr_addr ), //SDRAM鍐欏湴鍧 + .sdram_data_in (sdram_data_in ), //鍐欏叆SDRAM鐨勬暟鎹 +//SDRAM ctrl of read + .sdram_rd_ack (sdram_rd_ack ), //SDRAM璇昏姹 + .sdram_data_out (sdram_data_out ), //SDRAM璇诲搷搴 + .sdram_rd_req (sdram_rd_req ), //SDRAM璇诲湴鍧 + .sdram_rd_addr (sdram_rd_addr ) //璇诲嚭SDRAM鏁版嵁 + +); + +//------------- sdram_ctrl_inst ------------- +sdram_ctrl sdram_ctrl_inst( + + .sys_clk (sys_clk ), //绯荤粺鏃堕挓 + .sys_rst_n (sys_rst_n ), //澶嶄綅淇″彿锛屼綆鐢靛钩鏈夋晥 +//SDRAM 鎺у埗鍣ㄥ啓绔彛 + .sdram_wr_req (sdram_wr_req ), //鍐橲DRAM璇锋眰淇″彿 + .sdram_wr_addr (sdram_wr_addr ), //SDRAM鍐欐搷浣滅殑鍦板潃 + .wr_burst_len (wr_burst_len ), //鍐檚dram鏃舵暟鎹獊鍙戦暱搴 + .sdram_data_in (sdram_data_in ), //鍐欏叆SDRAM鐨勬暟鎹 + .sdram_wr_ack (sdram_wr_ack ), //鍐橲DRAM鍝嶅簲淇″彿 +//SDRAM 鎺у埗鍣ㄨ绔彛 + .sdram_rd_req (sdram_rd_req ), //璇籗DRAM璇锋眰淇″彿 + .sdram_rd_addr (sdram_rd_addr ), //SDRAM鍐欐搷浣滅殑鍦板潃 + .rd_burst_len (rd_burst_len ), //璇籹dram鏃舵暟鎹獊鍙戦暱搴 + .sdram_data_out (sdram_data_out ), //浠嶴DRAM璇诲嚭鐨勬暟鎹 + .init_end (init_end ), //SDRAM 鍒濆鍖栧畬鎴愭爣蹇 + .sdram_rd_ack (sdram_rd_ack ), //璇籗DRAM鍝嶅簲淇″彿 +//FPGA涓嶴DRAM纭欢鎺ュ彛 + .sdram_cke (sdram_cke ), // SDRAM 鏃堕挓鏈夋晥淇″彿 + .sdram_cs_n (sdram_cs_n ), // SDRAM 鐗囬変俊鍙 + .sdram_ras_n (sdram_ras_n ), // SDRAM 琛屽湴鍧閫夐氳剦鍐 + .sdram_cas_n (sdram_cas_n ), // SDRAM 鍒楀湴鍧閫夐氳剦鍐 + .sdram_we_n (sdram_we_n ), // SDRAM 鍐欏厑璁镐綅 + .sdram_ba (sdram_ba ), // SDRAM L-Bank鍦板潃绾 + .sdram_addr (sdram_addr ), // SDRAM 鍦板潃鎬荤嚎 + .sdram_dq (sdram_dq ) // SDRAM 鏁版嵁鎬荤嚎 + +); + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_write.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_write.v new file mode 100644 index 0000000..4febd1f --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/sdram/sdram_write.v @@ -0,0 +1,221 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : sdram_write +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鍐欐暟鎹ā鍧 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module sdram_write +( + input wire sys_clk , //绯荤粺鏃堕挓,棰戠巼100MHz + input wire sys_rst_n , //澶嶄綅淇″彿,浣庣數骞虫湁鏁 + input wire init_end , //鍒濆鍖栫粨鏉熶俊鍙 + input wire wr_en , //鍐欎娇鑳 + input wire [23:0] wr_addr , //鍐橲DRAM鍦板潃 + input wire [15:0] wr_data , //寰呭啓鍏DRAM鐨勬暟鎹(鍐橣IFO浼犲叆) + input wire [9:0] wr_burst_len , //鍐欑獊鍙慡DRAM瀛楄妭鏁 + + output wire wr_ack , //鍐橲DRAM鍝嶅簲淇″彿 + output wire wr_end , //涓娆＄獊鍙戝啓缁撴潫 + output reg [3:0] write_cmd , //鍐欐暟鎹樁娈靛啓鍏dram鐨勬寚浠,{cs_n,ras_n,cas_n,we_n} + output reg [1:0] write_ba , //鍐欐暟鎹樁娈礏ank鍦板潃 + output reg [12:0] write_addr , //鍦板潃鏁版嵁,杈呭姪棰勫厖鐢垫搷浣,琛屻佸垪鍦板潃,A12-A0,13浣嶅湴鍧 + output reg wr_sdram_en , //鏁版嵁鎬荤嚎杈撳嚭浣胯兘 + output wire [15:0] wr_sdram_data //鍐欏叆SDRAM鐨勬暟鎹 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// + +//parameter define +parameter TRCD_CLK = 10'd2 , //婵娲诲懆鏈 + TRP_CLK = 10'd2 ; //棰勫厖鐢靛懆鏈 +parameter WR_IDLE = 4'b0000 , //鍒濆鐘舵 + WR_ACTIVE = 4'b0001 , //婵娲 + WR_TRCD = 4'b0011 , //婵娲荤瓑寰 + WR_WRITE = 4'b0010 , //鍐欐搷浣 + WR_DATA = 4'b0100 , //鍐欐暟鎹 + WR_PRE = 4'b0101 , //棰勫厖鐢 + WR_TRP = 4'b0111 , //棰勫厖鐢电瓑寰 + WR_END = 4'b0110 ; //涓娆＄獊鍙戝啓缁撴潫 +parameter NOP = 4'b0111 , //绌烘搷浣滄寚浠 + ACTIVE = 4'b0011 , //婵娲绘寚浠 + WRITE = 4'b0100 , //鏁版嵁鍐欐寚浠 + B_STOP = 4'b0110 , //绐佸彂鍋滄鎸囦护 + P_CHARGE = 4'b0010 ; //棰勫厖鐢垫寚浠 + +//wire define +wire trcd_end ; //婵娲荤瓑寰呭懆鏈熺粨鏉 +wire twrite_end ; //绐佸彂鍐欑粨鏉 +wire trp_end ; //棰勫厖鐢垫湁鏁堝懆鏈熺粨鏉 + +//reg define +reg [3:0] write_state ; //SDRAM鍐欑姸鎬 +reg [9:0] cnt_clk ; //鏃堕挓鍛ㄦ湡璁℃暟,璁板綍鍐欐暟鎹樁娈靛悇鐘舵佺瓑寰呮椂闂 +reg cnt_clk_rst ; //鏃堕挓鍛ㄦ湡璁℃暟澶嶄綅鏍囧織 + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// + +//wr_end:涓娆＄獊鍙戝啓缁撴潫 +assign wr_end = (write_state == WR_END) ? 1'b1 : 1'b0; + +//wr_ack:鍐橲DRAM鍝嶅簲淇″彿 +assign wr_ack = ( write_state == WR_WRITE) + || ((write_state == WR_DATA) + && (cnt_clk <= (wr_burst_len - 2'd2))); + +//cnt_clk:鏃堕挓鍛ㄦ湡璁℃暟,璁板綍鍒濆鍖栧悇鐘舵佺瓑寰呮椂闂 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + cnt_clk <= 10'd0; + else if(cnt_clk_rst == 1'b1) + cnt_clk <= 10'd0; + else + cnt_clk <= cnt_clk + 1'b1; + +//trcd_end,twrite_end,trp_end:绛夊緟缁撴潫鏍囧織 +assign trcd_end = ((write_state == WR_TRCD) + &&(cnt_clk == TRCD_CLK )) ? 1'b1 : 1'b0; //婵娲诲懆鏈熺粨鏉 +assign twrite_end = ((write_state == WR_DATA) + &&(cnt_clk == wr_burst_len - 1)) ? 1'b1 : 1'b0; //绐佸彂鍐欑粨鏉 +assign trp_end = ((write_state == WR_TRP ) + &&(cnt_clk == TRP_CLK )) ? 1'b1 : 1'b0; //棰勫厖鐢电瓑寰呭懆鏈熺粨鏉 + +//write_state:SDRAM鐨勫伐浣滅姸鎬佹満 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + write_state <= WR_IDLE; + else + case(write_state) + WR_IDLE: + if((wr_en ==1'b1) && (init_end == 1'b1)) + write_state <= WR_ACTIVE; + else + write_state <= write_state; + WR_ACTIVE: + write_state <= WR_TRCD; + WR_TRCD: + if(trcd_end == 1'b1) + write_state <= WR_WRITE; + else + write_state <= write_state; + WR_WRITE: + write_state <= WR_DATA; + WR_DATA: + if(twrite_end == 1'b1) + write_state <= WR_PRE; + else + write_state <= write_state; + WR_PRE: + write_state <= WR_TRP; + WR_TRP: + if(trp_end == 1'b1) + write_state <= WR_END; + else + write_state <= write_state; + + WR_END: + write_state <= WR_IDLE; + default: + write_state <= WR_IDLE; + endcase + +//璁℃暟鍣ㄦ帶鍒堕昏緫 +always@(*) + begin + case(write_state) + WR_IDLE: cnt_clk_rst <= 1'b1; + WR_TRCD: cnt_clk_rst <= (trcd_end == 1'b1) ? 1'b1 : 1'b0; + WR_WRITE: cnt_clk_rst <= 1'b1; + WR_DATA: cnt_clk_rst <= (twrite_end == 1'b1) ? 1'b1 : 1'b0; + WR_TRP: cnt_clk_rst <= (trp_end == 1'b1) ? 1'b1 : 1'b0; + WR_END: cnt_clk_rst <= 1'b1; + default: cnt_clk_rst <= 1'b0; + endcase + end + +//SDRAM鎿嶄綔鎸囦护鎺у埗 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + begin + write_cmd <= NOP; + write_ba <= 2'b11; + write_addr <= 13'h1fff; + end + else + case(write_state) + WR_IDLE,WR_TRCD,WR_TRP: + begin + write_cmd <= NOP; + write_ba <= 2'b11; + write_addr <= 13'h1fff; + end + WR_ACTIVE: //婵娲绘寚浠 + begin + write_cmd <= ACTIVE; + write_ba <= wr_addr[23:22]; + write_addr <= wr_addr[21:9]; + end + WR_WRITE: //鍐欐搷浣滄寚浠 + begin + write_cmd <= WRITE; + write_ba <= wr_addr[23:22]; + write_addr <= {4'b0000,wr_addr[8:0]}; + end + WR_DATA: //绐佸彂浼犺緭缁堟鎸囦护 + begin + if(twrite_end == 1'b1) + write_cmd <= B_STOP; + else + begin + write_cmd <= NOP; + write_ba <= 2'b11; + write_addr <= 13'h1fff; + end + end + WR_PRE: //棰勫厖鐢垫寚浠 + begin + write_cmd <= P_CHARGE; + write_ba <= wr_addr[23:22]; + write_addr <= 13'h0400; + end + WR_END: + begin + write_cmd <= NOP; + write_ba <= 2'b11; + write_addr <= 13'h1fff; + end + default: + begin + write_cmd <= NOP; + write_ba <= 2'b11; + write_addr <= 13'h1fff; + end + endcase + +//wr_sdram_en:鏁版嵁鎬荤嚎杈撳嚭浣胯兘 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + wr_sdram_en <= 1'b0; + else + wr_sdram_en <= wr_ack; + +//wr_sdram_data:鍐欏叆SDRAM鐨勬暟鎹 +assign wr_sdram_data = (wr_sdram_en == 1'b1) ? wr_data : 16'd0; + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/uart_rx.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/uart_rx.v new file mode 100644 index 0000000..01bd165 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/uart_rx.v @@ -0,0 +1,154 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +//Create Date : 2019/06/12 +// Module Name : uart_rx +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module uart_rx +#( + parameter UART_BPS = 'd9600, //涓插彛娉㈢壒鐜 + parameter CLK_FREQ = 'd50_000_000 //鏃堕挓棰戠巼 +) +( + input wire sys_clk , //绯荤粺鏃堕挓50MHz + input wire sys_rst_n , //鍏ㄥ眬澶嶄綅 + input wire rx , //涓插彛鎺ユ敹鏁版嵁 + + output reg [7:0] po_data , //涓茶浆骞跺悗鐨8bit鏁版嵁 + output reg po_flag //涓茶浆骞跺悗鐨勬暟鎹湁鏁堟爣蹇椾俊鍙 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// +//localparam define +localparam BAUD_CNT_MAX = CLK_FREQ/UART_BPS ; + +//reg define +reg rx_reg1 ; +reg rx_reg2 ; +reg rx_reg3 ; +reg start_nedge ; +reg work_en ; +reg [12:0] baud_cnt ; +reg bit_flag ; +reg [3:0] bit_cnt ; +reg [7:0] rx_data ; +reg rx_flag ; + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// +//鎻掑叆涓ょ骇瀵勫瓨鍣ㄨ繘琛屾暟鎹悓姝ワ紝鐢ㄦ潵娑堥櫎浜氱ǔ鎬 +//rx_reg1:绗竴绾у瘎瀛樺櫒锛屽瘎瀛樺櫒绌洪棽鐘舵佸浣嶄负1 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + rx_reg1 <= 1'b1; + else + rx_reg1 <= rx; + +//rx_reg2:绗簩绾у瘎瀛樺櫒锛屽瘎瀛樺櫒绌洪棽鐘舵佸浣嶄负1 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + rx_reg2 <= 1'b1; + else + rx_reg2 <= rx_reg1; + +//rx_reg3:绗笁绾у瘎瀛樺櫒鍜岀浜岀骇瀵勫瓨鍣ㄥ叡鍚屾瀯鎴愪笅闄嶆部妫娴 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + rx_reg3 <= 1'b1; + else + rx_reg3 <= rx_reg2; + +//start_nedge:妫娴嬪埌涓嬮檷娌挎椂start_nedge浜х敓涓涓椂閽熺殑楂樼數骞 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + start_nedge <= 1'b0; + else if((~rx_reg2) && (rx_reg3)) + start_nedge <= 1'b1; + else + start_nedge <= 1'b0; + +//work_en:鎺ユ敹鏁版嵁宸ヤ綔浣胯兘淇″彿 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + work_en <= 1'b0; + else if(start_nedge == 1'b1) + work_en <= 1'b1; + else if((bit_cnt == 4'd8) && (bit_flag == 1'b1)) + work_en <= 1'b0; + +//baud_cnt:娉㈢壒鐜囪鏁板櫒璁℃暟锛屼粠0璁℃暟鍒癇AUD_CNT_MAX - 1 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + baud_cnt <= 13'b0; + else if((baud_cnt == BAUD_CNT_MAX - 1) || (work_en == 1'b0)) + baud_cnt <= 13'b0; + else if(work_en == 1'b1) + baud_cnt <= baud_cnt + 1'b1; + +//bit_flag:褰揵aud_cnt璁℃暟鍣ㄨ鏁板埌涓棿鏁版椂閲囨牱鐨勬暟鎹渶绋冲畾锛 +//姝ゆ椂鎷夐珮涓涓爣蹇椾俊鍙疯〃绀烘暟鎹彲浠ヨ鍙栬蛋 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + bit_flag <= 1'b0; + else if(baud_cnt == BAUD_CNT_MAX/2 - 1) + bit_flag <= 1'b1; + else + bit_flag <= 1'b0; + +//bit_cnt:鏈夋晥鏁版嵁涓暟璁℃暟鍣紝褰8涓湁鏁堟暟鎹紙涓嶅惈璧峰浣嶅拰鍋滄浣嶏級 +//閮芥帴鏀跺畬鎴愬悗璁℃暟鍣ㄦ竻闆 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + bit_cnt <= 4'b0; + else if((bit_cnt == 4'd8) && (bit_flag == 1'b1)) + bit_cnt <= 4'b0; + else if(bit_flag ==1'b1) + bit_cnt <= bit_cnt + 1'b1; + +//rx_data:杈撳叆鏁版嵁杩涜绉讳綅 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + rx_data <= 8'b0; + else if((bit_cnt >= 4'd1)&&(bit_cnt <= 4'd8)&&(bit_flag == 1'b1)) + rx_data <= {rx_reg3, rx_data[7:1]}; + +//rx_flag:杈撳叆鏁版嵁绉讳綅瀹屾垚鏃秗x_flag鎷夐珮涓涓椂閽熺殑楂樼數骞 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + rx_flag <= 1'b0; + else if((bit_cnt == 4'd8) && (bit_flag == 1'b1)) + rx_flag <= 1'b1; + else + rx_flag <= 1'b0; + +//po_data:杈撳嚭瀹屾暣鐨8浣嶆湁鏁堟暟鎹 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + po_data <= 8'b0; + else if(rx_flag == 1'b1) + po_data <= rx_data; + +//po_flag:杈撳嚭鏁版嵁鏈夋晥鏍囧織锛堟瘮rx_flag寤跺悗涓涓椂閽熷懆鏈燂紝涓轰簡鍜宲o_data鍚屾锛 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + po_flag <= 1'b0; + else + po_flag <= rx_flag; + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/uart_sdram.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/uart_sdram.v new file mode 100644 index 0000000..d50ebcb --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/uart_sdram.v @@ -0,0 +1,208 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : uart_sdram +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : uart_sdram椤跺眰妯″潡 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module uart_sdram +( + input wire sys_clk , //鏃堕挓淇″彿 + input wire sys_rst_n , //澶嶄綅淇″彿 + input wire rx , //涓插彛鎺ユ敹鏁版嵁 + + output wire tx , //涓插彛鍙戦佹暟鎹 + + output wire sdram_clk , //SDRAM 鑺墖鏃堕挓 + output wire sdram_cke , //SDRAM 鏃堕挓鏈夋晥 + output wire sdram_cs_n , //SDRAM 鐗囬 + output wire sdram_cas_n , //SDRAM 琛屾湁鏁 + output wire sdram_ras_n , //SDRAM 鍒楁湁鏁 + output wire sdram_we_n , //SDRAM 鍐欐湁鏁 + output wire [1:0] sdram_ba , //SDRAM Bank鍦板潃 + output wire [12:0] sdram_addr , //SDRAM 琛/鍒楀湴鍧 + output wire [1:0] sdram_dqm , //SDRAM 鏁版嵁鎺╃爜 + inout wire [15:0] sdram_dq //SDRAM 鏁版嵁 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// +//parameter define +parameter DATA_NUM = 24'd10 ; //鍐欏叆SDRAM鏁版嵁涓暟 +parameter WAIT_MAX = 16'd750 ; //绛夊緟璁℃暟鏈澶у +parameter UART_BPS = 14'd9600 , //姣旂壒鐜 + CLK_FREQ = 26'd50_000_000 ; //鏃堕挓棰戠巼 + +// wire define +//uart_rx +wire [ 7:0] rx_data ; //涓插彛鎺ユ敹妯″潡鎷兼帴鍚庣殑8浣嶆暟鎹 +wire rx_flag ; //鏁版嵁鏍囧織淇″彿 + +//fifo_read +wire [ 7:0] rfifo_wr_data ; //璇籪ifo鍙戠儹鍐欏叆鏁版嵁 +wire rfifo_wr_en ; //璇籪ifo鐨勫啓浣胯兘 +wire [ 7:0] rfifo_rd_data ; //璇籪ifo鐨勮鏁版嵁 +wire rfifo_rd_en ; //璇籪ifo鐨勮浣胯兘 +wire [9:0] rd_fifo_num ; //璇籪ifo涓殑鏁版嵁閲 + +//clk_gen +wire clk_50m ; +wire clk_100m ; +wire clk_100m_shift ; //pll浜х敓鏃堕挓 +wire locked ; //pll閿佸畾淇″彿 +wire rst_n ; //澶嶄綅淇″彿 + +//sdram_top_inst +reg [23:0] data_num ; //鍐欏叆SDRAM鏁版嵁涓暟璁℃暟 +reg read_valid ; //鏁版嵁璇讳娇鑳 +reg [15:0] cnt_wait ; //绛夊緟璁℃暟鍣 + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// +//rst_n:澶嶄綅淇″彿 +assign rst_n = sys_rst_n & locked; + +//data_num:鍐欏叆SDRAM鏁版嵁涓暟璁℃暟 +always@(posedge clk_50m or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + data_num <= 24'd0; + else if(read_valid == 1'b1) + data_num <= 24'd0; + else if(rx_flag == 1'b1) + data_num <= data_num + 1'b1; + else + data_num <= data_num; + +//cnt_wait:绛夊緟璁℃暟鍣 +always@(posedge clk_50m or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + cnt_wait <= 16'd0; + else if(cnt_wait == WAIT_MAX) + cnt_wait <= 16'd0; + else if(data_num == DATA_NUM) + cnt_wait <= cnt_wait + 1'b1; + +//read_valid:鏁版嵁璇讳娇鑳 +always@(posedge clk_50m or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + read_valid <= 1'b0; + else if(cnt_wait == WAIT_MAX) + read_valid <= 1'b1; + else if(rd_fifo_num == DATA_NUM) + read_valid <= 1'b0; + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// +//------------- clk_gen_inst ------------- +clk_gen clk_gen_inst ( + .inclk0 (sys_clk ), + .areset (~sys_rst_n ), + .c0 (clk_50m ), + .c1 (clk_100m ), + .c2 (clk_100m_shift ), + + .locked (locked ) +); + +//-------------uart_rx_inst------------- +uart_rx +#( + .UART_BPS (UART_BPS ), //涓插彛娉㈢壒鐜 + .CLK_FREQ (CLK_FREQ ) //鏃堕挓棰戠巼 +) +uart_rx_inst +( + .sys_clk (clk_50m ), //input sys_clk + .sys_rst_n (rst_n ), //input sys_rst_n + .rx (rx ), //input rx + + .po_data (rx_data ), //output [7:0] rx_data + .po_flag (rx_flag ) //output rx_flag +); + +//------------- sdram_top_inst ------------- +sdram_top sdram_top_inst +( + .sys_clk (clk_100m ), //sdram 鎺у埗鍣ㄥ弬鑰冩椂閽 + .clk_out (clk_100m_shift ), //鐢ㄤ簬杈撳嚭鐨勭浉浣嶅亸绉绘椂閽 + .sys_rst_n (rst_n ), //绯荤粺澶嶄綅 +//鐢ㄦ埛鍐欑鍙 + .wr_fifo_wr_clk (clk_50m ), //鍐欑鍙IFO: 鍐欐椂閽 + .wr_fifo_wr_req (rx_flag ), //鍐欑鍙IFO: 鍐欎娇鑳 + .wr_fifo_wr_data ({8'b0,rx_data} ), //鍐欑鍙IFO: 鍐欐暟鎹 + .sdram_wr_b_addr (24'd0 ), //鍐橲DRAM鐨勮捣濮嬪湴鍧 + .sdram_wr_e_addr (DATA_NUM ), //鍐橲DRAM鐨勭粨鏉熷湴鍧 + .wr_burst_len (DATA_NUM ), //鍐橲DRAM鏃剁殑鏁版嵁绐佸彂闀垮害 + .wr_rst ( ), //鍐欏浣 +//鐢ㄦ埛璇荤鍙 + .rd_fifo_rd_clk (clk_50m ), //璇荤鍙IFO: 璇绘椂閽 + .rd_fifo_rd_req (rfifo_wr_en ), //璇荤鍙IFO: 璇讳娇鑳 + .rd_fifo_rd_data (rfifo_wr_data ), //璇荤鍙IFO: 璇绘暟鎹 + .sdram_rd_b_addr (24'd0 ), //璇籗DRAM鐨勮捣濮嬪湴鍧 + .sdram_rd_e_addr (DATA_NUM ), //璇籗DRAM鐨勭粨鏉熷湴鍧 + .rd_burst_len (DATA_NUM ), //浠嶴DRAM涓鏁版嵁鏃剁殑绐佸彂闀垮害 + .rd_rst ( ), //璇诲浣 + .rd_fifo_num (rd_fifo_num ), //璇籪ifo涓殑鏁版嵁閲 +//鐢ㄦ埛鎺у埗绔彛 + .read_valid (read_valid ), //SDRAM 璇讳娇鑳 + .init_end ( ), //SDRAM 鍒濆鍖栧畬鎴愭爣蹇 +//SDRAM 鑺墖鎺ュ彛 + .sdram_clk (sdram_clk ), //SDRAM 鑺墖鏃堕挓 + .sdram_cke (sdram_cke ), //SDRAM 鏃堕挓鏈夋晥 + .sdram_cs_n (sdram_cs_n ), //SDRAM 鐗囬 + .sdram_ras_n (sdram_ras_n ), //SDRAM 琛屾湁鏁 + .sdram_cas_n (sdram_cas_n ), //SDRAM 鍒楁湁鏁 + .sdram_we_n (sdram_we_n ), //SDRAM 鍐欐湁鏁 + .sdram_ba (sdram_ba ), //SDRAM Bank鍦板潃 + .sdram_addr (sdram_addr ), //SDRAM 琛/鍒楀湴鍧 + .sdram_dq (sdram_dq ), //SDRAM 鏁版嵁 + .sdram_dqm (sdram_dqm ) //SDRAM 鏁版嵁鎺╃爜 +); + +//------------- fifo_read_inst -------------- +fifo_read fifo_read_inst +( + .sys_clk (clk_50m ), //input sys_clk + .sys_rst_n (sys_rst_n ), //input sys_rst_n + .rd_fifo_num (rd_fifo_num ), + .pi_data (rfifo_wr_data ), //input [7:0] pi_data + .burst_num (DATA_NUM ), + + .read_en (rfifo_wr_en ), //input pi_flag + .tx_data (rfifo_rd_data ), //output [7:0] tx_data + .tx_flag (rfifo_rd_en ) //output tx_flag + +); + +//-------------uart_tx_inst------------- +uart_tx +#( + .UART_BPS (UART_BPS ), //涓插彛娉㈢壒鐜 + .CLK_FREQ (CLK_FREQ ) //鏃堕挓棰戠巼 +) +uart_tx_inst +( + .sys_clk (sys_clk ), //input sys_clk + .sys_rst_n (sys_rst_n ), //input sys_rst_n + .pi_data (rfifo_rd_data ), //input [7:0] pi_data + .pi_flag (rfifo_rd_en ), //input pi_flag + + .tx (tx ) //output tx +); + +endmodule \ No newline at end of file diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/uart_tx.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/uart_tx.v new file mode 100644 index 0000000..9447945 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/rtl/uart_tx.v @@ -0,0 +1,104 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/06/12 +// Module Name : uart_tx +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module uart_tx +#( + parameter UART_BPS = 'd9600, //涓插彛娉㈢壒鐜 + parameter CLK_FREQ = 'd50_000_000 //鏃堕挓棰戠巼 +) +( + input wire sys_clk , //绯荤粺鏃堕挓50MHz + input wire sys_rst_n , //鍏ㄥ眬澶嶄綅 + input wire [7:0] pi_data , //妯″潡杈撳叆鐨8bit鏁版嵁 + input wire pi_flag , //骞惰鏁版嵁鏈夋晥鏍囧織淇″彿 + + output reg tx //涓茶浆骞跺悗鐨1bit鏁版嵁 +); + +//********************************************************************// +//****************** Parameter and Internal Signal *******************// +//********************************************************************// +//localparam define +localparam BAUD_CNT_MAX = CLK_FREQ/UART_BPS ; + +//reg define +reg [12:0] baud_cnt; +reg bit_flag; +reg [3:0] bit_cnt ; +reg work_en ; + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// +//work_en:鎺ユ敹鏁版嵁宸ヤ綔浣胯兘淇″彿 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + work_en <= 1'b0; + else if(pi_flag == 1'b1) + work_en <= 1'b1; + else if((bit_flag == 1'b1) && (bit_cnt == 4'd9)) + work_en <= 1'b0; + +//baud_cnt:娉㈢壒鐜囪鏁板櫒璁℃暟锛屼粠0璁℃暟鍒癇AUD_CNT_MAX - 1 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + baud_cnt <= 13'b0; + else if((baud_cnt == BAUD_CNT_MAX - 1) || (work_en == 1'b0)) + baud_cnt <= 13'b0; + else if(work_en == 1'b1) + baud_cnt <= baud_cnt + 1'b1; + +//bit_flag:褰揵aud_cnt璁℃暟鍣ㄨ鏁板埌1鏃惰bit_flag鎷夐珮涓涓椂閽熺殑楂樼數骞 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + bit_flag <= 1'b0; + else if(baud_cnt == 13'd1) + bit_flag <= 1'b1; + else + bit_flag <= 1'b0; + +//bit_cnt:鏁版嵁浣嶆暟涓暟璁℃暟锛10涓湁鏁堟暟鎹紙鍚捣濮嬩綅鍜屽仠姝綅锛夊埌鏉ュ悗璁℃暟鍣ㄦ竻闆 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + bit_cnt <= 4'b0; + else if((bit_flag == 1'b1) && (bit_cnt == 4'd9)) + bit_cnt <= 4'b0; + else if((bit_flag == 1'b1) && (work_en == 1'b1)) + bit_cnt <= bit_cnt + 1'b1; + +//tx:杈撳嚭鏁版嵁鍦ㄦ弧瓒硆s232鍗忚锛堣捣濮嬩綅涓0锛屽仠姝綅涓1锛夌殑鎯呭喌涓嬩竴浣嶄竴浣嶈緭鍑 +always@(posedge sys_clk or negedge sys_rst_n) + if(sys_rst_n == 1'b0) + tx <= 1'b1; //绌洪棽鐘舵佹椂涓洪珮鐢靛钩 + else if(bit_flag == 1'b1) + case(bit_cnt) + 0 : tx <= 1'b0; + 1 : tx <= pi_data[0]; + 2 : tx <= pi_data[1]; + 3 : tx <= pi_data[2]; + 4 : tx <= pi_data[3]; + 5 : tx <= pi_data[4]; + 6 : tx <= pi_data[5]; + 7 : tx <= pi_data[6]; + 8 : tx <= pi_data[7]; + 9 : tx <= 1'b1; + default : tx <= 1'b1; + endcase + +endmodule diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/sdram_model_plus.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/sdram_model_plus.v new file mode 100644 index 0000000..4e51287 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/sdram_model_plus.v @@ -0,0 +1,1131 @@ +/*************************************************************************************** +作者： 李晟 +2003-08-27 V0.1 李晟 + + 添加内存模块倒空功能，在外部需要创建事件：sdram_r ,本SDRAM的内容将会按Bank 顺序damp out 至文件 + sdram_data.txt 中 +×××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××*/ +//2004-03-04 陈乃奎 修改原程序中将BANK的数据转存入TXT文件的格式 +//2004-03-16 陈乃奎 修改SDRAM 的初始化数据 +//2004/04/06 陈乃奎 将SDRAM的操作命令以字符形式表示，以便用MODELSIM监视 +//2004/04/19 陈乃奎 修改参数 parameter tAC = 8; +//2010/09/17 罗瑶 修改sdram的大小，数据位宽，dqm宽度; +/**************************************************************************************** +* +* File Name: sdram_model.V +* Version: 0.0f +* Date: July 8th, 1999 +* Model: BUS Functional +* Simulator: Model Technology (PC version 5.2e PE) +* +* Dependencies: None +* +* Author: Son P. Huynh +* Email: sphuynh@micron.com +* Phone: (208) 368-3825 +* Company: Micron Technology, Inc. +* Model: sdram_model (1Meg x 16 x 4 Banks) +* +* Description: 64Mb SDRAM Verilog model +* +* Limitation: - Doesn't check for 4096 cycle refresh +* +* Note: - Set simulator resolution to "ps" accuracy +* - Set Debug = 0 to disable $display messages +* +* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY +* WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY +* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR +* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT. +* +* Copyright ?1998 Micron Semiconductor Products, Inc. +* All rights researved +* +* Rev Author Phone Date Changes +* ---- ---------------------------- ---------- --------------------------------------- +* 0.0f Son Huynh 208-368-3825 07/08/1999 - Fix tWR = 1 Clk + 7.5 ns (Auto) +* Micron Technology Inc. - Fix tWR = 15 ns (Manual) +* - Fix tRP (Autoprecharge to AutoRefresh) +* +* 0.0a Son Huynh 208-368-3825 05/13/1998 - First Release (from 64Mb rev 0.0e) +* Micron Technology Inc. +****************************************************************************************/ + +`timescale 1ns / 100ps + +module sdram_model_plus (Dq, Addr, Ba, Clk, Cke, Cs_n, Ras_n, Cas_n, We_n, Dqm,Debug); + + parameter addr_bits = 11; + parameter data_bits = 32; + parameter col_bits = 8; + parameter mem_sizes = 1048576*2-1;//1 Meg + + inout [data_bits - 1 : 0] Dq; + input [addr_bits - 1 : 0] Addr; + input [1 : 0] Ba; + input Clk; + input Cke; + input Cs_n; + input Ras_n; + input Cas_n; + input We_n; + input [3 : 0] Dqm; //高低各8bit + //added by xzli + input Debug; + + reg [data_bits - 1 : 0] Bank0 [0 : mem_sizes];//存储器类型数据 + reg [data_bits - 1 : 0] Bank1 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank2 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank3 [0 : mem_sizes]; + + reg [1 : 0] Bank_addr [0 : 3]; // Bank Address Pipeline + reg [col_bits - 1 : 0] Col_addr [0 : 3]; // Column Address Pipeline + reg [3 : 0] Command [0 : 3]; // Command Operation Pipeline + reg [3 : 0] Dqm_reg0, Dqm_reg1; // DQM Operation Pipeline + reg [addr_bits - 1 : 0] B0_row_addr, B1_row_addr, B2_row_addr, B3_row_addr; + + reg [addr_bits - 1 : 0] Mode_reg; + reg [data_bits - 1 : 0] Dq_reg, Dq_dqm; + reg [col_bits - 1 : 0] Col_temp, Burst_counter; + + reg Act_b0, Act_b1, Act_b2, Act_b3; // Bank Activate + reg Pc_b0, Pc_b1, Pc_b2, Pc_b3; // Bank Precharge + + reg [1 : 0] Bank_precharge [0 : 3]; // Precharge Command + reg A10_precharge [0 : 3]; // Addr[10] = 1 (All banks) + reg Auto_precharge [0 : 3]; // RW AutoPrecharge (Bank) + reg Read_precharge [0 : 3]; // R AutoPrecharge + reg Write_precharge [0 : 3]; // W AutoPrecharge + integer Count_precharge [0 : 3]; // RW AutoPrecharge (Counter) + reg RW_interrupt_read [0 : 3]; // RW Interrupt Read with Auto Precharge + reg RW_interrupt_write [0 : 3]; // RW Interrupt Write with Auto Precharge + + reg Data_in_enable; + reg Data_out_enable; + + reg [1 : 0] Bank, Previous_bank; + reg [addr_bits - 1 : 0] Row; + reg [col_bits - 1 : 0] Col, Col_brst; + + // Internal system clock + reg CkeZ, Sys_clk; + + reg [21:0] dd; + + // Commands Decode + wire Active_enable = ~Cs_n & ~Ras_n & Cas_n & We_n; + wire Aref_enable = ~Cs_n & ~Ras_n & ~Cas_n & We_n; + wire Burst_term = ~Cs_n & Ras_n & Cas_n & ~We_n; + wire Mode_reg_enable = ~Cs_n & ~Ras_n & ~Cas_n & ~We_n; + wire Prech_enable = ~Cs_n & ~Ras_n & Cas_n & ~We_n; + wire Read_enable = ~Cs_n & Ras_n & ~Cas_n & We_n; + wire Write_enable = ~Cs_n & Ras_n & ~Cas_n & ~We_n; + + // Burst Length Decode + wire Burst_length_1 = ~Mode_reg[2] & ~Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_2 = ~Mode_reg[2] & ~Mode_reg[1] & Mode_reg[0]; + wire Burst_length_4 = ~Mode_reg[2] & Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_8 = ~Mode_reg[2] & Mode_reg[1] & Mode_reg[0]; + + // CAS Latency Decode + wire Cas_latency_2 = ~Mode_reg[6] & Mode_reg[5] & ~Mode_reg[4]; + wire Cas_latency_3 = ~Mode_reg[6] & Mode_reg[5] & Mode_reg[4]; + + // Write Burst Mode + wire Write_burst_mode = Mode_reg[9]; + + wire Debug; // Debug messages : 1 = On; 0 = Off + wire Dq_chk = Sys_clk & Data_in_enable; // Check setup/hold time for DQ + + reg [31:0] mem_d; + + event sdram_r,sdram_w,compare; + + + + + assign Dq = Dq_reg; // DQ buffer + + // Commands Operation + `define ACT 0 + `define NOP 1 + `define READ 2 + `define READ_A 3 + `define WRITE 4 + `define WRITE_A 5 + `define PRECH 6 + `define A_REF 7 + `define BST 8 + `define LMR 9 + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// parameter tAC = 8; //test 6.5 +// parameter tHZ = 7.0; +// parameter tOH = 2.7; +// parameter tMRD = 2.0; // 2 Clk Cycles +// parameter tRAS = 44.0; +// parameter tRC = 66.0; +// parameter tRCD = 20.0; +// parameter tRP = 20.0; +// parameter tRRD = 15.0; +// parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) +// parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Parameters for -7 (PC143) and CAS Latency = 3 + parameter tAC = 6.5; //test 6.5 + parameter tHZ = 5.5; + parameter tOH = 2; + parameter tMRD = 2.0; // 2 Clk Cycles + parameter tRAS = 48.0; + parameter tRC = 70.0; + parameter tRCD = 20.0; + parameter tRP = 20.0; + parameter tRRD = 14.0; + parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) + parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Check variable + integer MRD_chk; + integer WR_counter [0 : 3]; + time WR_chk [0 : 3]; + time RC_chk, RRD_chk; + time RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3; + time RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3; + time RP_chk0, RP_chk1, RP_chk2, RP_chk3; + + integer test_file; + + //*****display the command of the sdram************************************** + + parameter Mode_Reg_Set =4'b0000; + parameter Auto_Refresh =4'b0001; + parameter Row_Active =4'b0011; + parameter Pre_Charge =4'b0010; + parameter PreCharge_All =4'b0010; + parameter Write =4'b0100; + parameter Write_Pre =4'b0100; + parameter Read =4'b0101; + parameter Read_Pre =4'b0101; + parameter Burst_Stop =4'b0110; + parameter Nop =4'b0111; + parameter Dsel =4'b1111; + + wire [3:0] sdram_control; + reg cke_temp; + reg [8*13:1] sdram_command; + + always@(posedge Clk) + cke_temp<=Cke; + + assign sdram_control={Cs_n,Ras_n,Cas_n,We_n}; + + always@(sdram_control or cke_temp) + begin + case(sdram_control) + Mode_Reg_Set: sdram_command<="Mode_Reg_Set"; + Auto_Refresh: sdram_command<="Auto_Refresh"; + Row_Active: sdram_command<="Row_Active"; + Pre_Charge: sdram_command<="Pre_Charge"; + Burst_Stop: sdram_command<="Burst_Stop"; + Dsel: sdram_command<="Dsel"; + + Write: if(cke_temp==1) + sdram_command<="Write"; + else + sdram_command<="Write_suspend"; + + Read: if(cke_temp==1) + sdram_command<="Read"; + else + sdram_command<="Read_suspend"; + + Nop: if(cke_temp==1) + sdram_command<="Nop"; + else + sdram_command<="Self_refresh"; + + default: sdram_command<="Power_down"; + endcase + end + + //***************************************************** + + initial + begin + //test_file=$fopen("test_file.txt"); + end + + initial + begin + Dq_reg = {data_bits{1'bz}}; + {Data_in_enable, Data_out_enable} = 0; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b0000; + {WR_chk[0], WR_chk[1], WR_chk[2], WR_chk[3]} = 0; + {WR_counter[0], WR_counter[1], WR_counter[2], WR_counter[3]} = 0; + {RW_interrupt_read[0], RW_interrupt_read[1], RW_interrupt_read[2], RW_interrupt_read[3]} = 0; + {RW_interrupt_write[0], RW_interrupt_write[1], RW_interrupt_write[2], RW_interrupt_write[3]} = 0; + {MRD_chk, RC_chk, RRD_chk} = 0; + {RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3} = 0; + {RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3} = 0; + {RP_chk0, RP_chk1, RP_chk2, RP_chk3} = 0; + $timeformat (-9, 0, " ns", 12); + //$readmemh("bank0.txt", Bank0); + //$readmemh("bank1.txt", Bank1); + //$readmemh("bank2.txt", Bank2); + //$readmemh("bank3.txt", Bank3); +/* + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + Bank0[dd]=dd[data_bits - 1 : 0]; + Bank1[dd]=dd[data_bits - 1 : 0]+1; + Bank2[dd]=dd[data_bits - 1 : 0]+2; + Bank3[dd]=dd[data_bits - 1 : 0]+3; + end +*/ + initial_sdram(0); + end + + task initial_sdram; + + input data_sign; + reg [3:0] data_sign; + + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + mem_d = {data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign}; + if(data_bits==16) + begin + Bank0[dd]=mem_d[15:0]; + Bank1[dd]=mem_d[15:0]; + Bank2[dd]=mem_d[15:0]; + Bank3[dd]=mem_d[15:0]; + end + else if(data_bits==32) + begin + Bank0[dd]=mem_d[31:0]; + Bank1[dd]=mem_d[31:0]; + Bank2[dd]=mem_d[31:0]; + Bank3[dd]=mem_d[31:0]; + end + end + + endtask + + // System clock generator + always + begin + @(posedge Clk) + begin + Sys_clk = CkeZ; + CkeZ = Cke; + end + @(negedge Clk) + begin + Sys_clk = 1'b0; + end + end + + always @ (posedge Sys_clk) begin + // Internal Commamd Pipelined + Command[0] = Command[1]; + Command[1] = Command[2]; + Command[2] = Command[3]; + Command[3] = `NOP; + + Col_addr[0] = Col_addr[1]; + Col_addr[1] = Col_addr[2]; + Col_addr[2] = Col_addr[3]; + Col_addr[3] = {col_bits{1'b0}}; + + Bank_addr[0] = Bank_addr[1]; + Bank_addr[1] = Bank_addr[2]; + Bank_addr[2] = Bank_addr[3]; + Bank_addr[3] = 2'b0; + + Bank_precharge[0] = Bank_precharge[1]; + Bank_precharge[1] = Bank_precharge[2]; + Bank_precharge[2] = Bank_precharge[3]; + Bank_precharge[3] = 2'b0; + + A10_precharge[0] = A10_precharge[1]; + A10_precharge[1] = A10_precharge[2]; + A10_precharge[2] = A10_precharge[3]; + A10_precharge[3] = 1'b0; + + // Dqm pipeline for Read + Dqm_reg0 = Dqm_reg1; + Dqm_reg1 = Dqm; + + // Read or Write with Auto Precharge Counter + if (Auto_precharge[0] == 1'b1) begin + Count_precharge[0] = Count_precharge[0] + 1; + end + if (Auto_precharge[1] == 1'b1) begin + Count_precharge[1] = Count_precharge[1] + 1; + end + if (Auto_precharge[2] == 1'b1) begin + Count_precharge[2] = Count_precharge[2] + 1; + end + if (Auto_precharge[3] == 1'b1) begin + Count_precharge[3] = Count_precharge[3] + 1; + end + + // tMRD Counter + MRD_chk = MRD_chk + 1; + + // tWR Counter for Write + WR_counter[0] = WR_counter[0] + 1; + WR_counter[1] = WR_counter[1] + 1; + WR_counter[2] = WR_counter[2] + 1; + WR_counter[3] = WR_counter[3] + 1; + + // Auto Refresh + if (Aref_enable == 1'b1) begin + if (Debug) $display ("at time %t AREF : Auto Refresh", $time); + // Auto Refresh to Auto Refresh + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Auto Refresh", $time); + end + // Precharge to Auto Refresh + if (($time - RP_chk0 < tRP || $time - RP_chk1 < tRP || $time - RP_chk2 < tRP || $time - RP_chk3 < tRP)&&Debug) begin + $display ("at time %t ERROR: tRP violation during Auto Refresh", $time); + end + // Precharge to Refresh + if (Pc_b0 == 1'b0 || Pc_b1 == 1'b0 || Pc_b2 == 1'b0 || Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: All banks must be Precharge before Auto Refresh", $time); + end + // Record Current tRC time + RC_chk = $time; + end + + // Load Mode Register + if (Mode_reg_enable == 1'b1) begin + // Decode CAS Latency, Burst Length, Burst Type, and Write Burst Mode + if (Pc_b0 == 1'b1 && Pc_b1 == 1'b1 && Pc_b2 == 1'b1 && Pc_b3 == 1'b1) begin + Mode_reg = Addr; + if (Debug) begin + $display ("at time %t LMR : Load Mode Register", $time); + // CAS Latency + if (Addr[6 : 4] == 3'b010) + $display (" CAS Latency = 2"); + else if (Addr[6 : 4] == 3'b011) + $display (" CAS Latency = 3"); + else + $display (" CAS Latency = Reserved"); + // Burst Length + if (Addr[2 : 0] == 3'b000) + $display (" Burst Length = 1"); + else if (Addr[2 : 0] == 3'b001) + $display (" Burst Length = 2"); + else if (Addr[2 : 0] == 3'b010) + $display (" Burst Length = 4"); + else if (Addr[2 : 0] == 3'b011) + $display (" Burst Length = 8"); + else if (Addr[3 : 0] == 4'b0111) + $display (" Burst Length = Full"); + else + $display (" Burst Length = Reserved"); + // Burst Type + if (Addr[3] == 1'b0) + $display (" Burst Type = Sequential"); + else if (Addr[3] == 1'b1) + $display (" Burst Type = Interleaved"); + else + $display (" Burst Type = Reserved"); + // Write Burst Mode + if (Addr[9] == 1'b0) + $display (" Write Burst Mode = Programmed Burst Length"); + else if (Addr[9] == 1'b1) + $display (" Write Burst Mode = Single Location Access"); + else + $display (" Write Burst Mode = Reserved"); + end + end else begin + $display ("at time %t ERROR: all banks must be Precharge before Load Mode Register", $time); + end + // REF to LMR + if ($time - RC_chk < tRC) begin + $display ("at time %t ERROR: tRC violation during Load Mode Register", $time); + end + // LMR to LMR + if (MRD_chk < tMRD) begin + $display ("at time %t ERROR: tMRD violation during Load Mode Register", $time); + end + MRD_chk = 0; + end + + // Active Block (Latch Bank Address and Row Address) + if (Active_enable == 1'b1) begin + if (Ba == 2'b00 && Pc_b0 == 1'b1) begin + {Act_b0, Pc_b0} = 2'b10; + B0_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk0 = $time; + RAS_chk0 = $time; + if (Debug) $display ("at time %t ACT : Bank = 0 Row = %d", $time, Addr); + // Precharge to Activate Bank 0 + if ($time - RP_chk0 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 0", $time); + end + end else if (Ba == 2'b01 && Pc_b1 == 1'b1) begin + {Act_b1, Pc_b1} = 2'b10; + B1_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk1 = $time; + RAS_chk1 = $time; + if (Debug) $display ("at time %t ACT : Bank = 1 Row = %d", $time, Addr); + // Precharge to Activate Bank 1 + if ($time - RP_chk1 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 1", $time); + end + end else if (Ba == 2'b10 && Pc_b2 == 1'b1) begin + {Act_b2, Pc_b2} = 2'b10; + B2_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk2 = $time; + RAS_chk2 = $time; + if (Debug) $display ("at time %t ACT : Bank = 2 Row = %d", $time, Addr); + // Precharge to Activate Bank 2 + if ($time - RP_chk2 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 2", $time); + end + end else if (Ba == 2'b11 && Pc_b3 == 1'b1) begin + {Act_b3, Pc_b3} = 2'b10; + B3_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk3 = $time; + RAS_chk3 = $time; + if (Debug) $display ("at time %t ACT : Bank = 3 Row = %d", $time, Addr); + // Precharge to Activate Bank 3 + if ($time - RP_chk3 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 3", $time); + end + end else if (Ba == 2'b00 && Pc_b0 == 1'b0) begin + $display ("at time %t ERROR: Bank 0 is not Precharged.", $time); + end else if (Ba == 2'b01 && Pc_b1 == 1'b0) begin + $display ("at time %t ERROR: Bank 1 is not Precharged.", $time); + end else if (Ba == 2'b10 && Pc_b2 == 1'b0) begin + $display ("at time %t ERROR: Bank 2 is not Precharged.", $time); + end else if (Ba == 2'b11 && Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: Bank 3 is not Precharged.", $time); + end + // Active Bank A to Active Bank B + if ((Previous_bank != Ba) && ($time - RRD_chk < tRRD)) begin + $display ("at time %t ERROR: tRRD violation during Activate bank = %d", $time, Ba); + end + // Load Mode Register to Active + if (MRD_chk < tMRD ) begin + $display ("at time %t ERROR: tMRD violation during Activate bank = %d", $time, Ba); + end + // Auto Refresh to Activate + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Activate bank = %d", $time, Ba); + end + // Record variables for checking violation + RRD_chk = $time; + Previous_bank = Ba; + end + + // Precharge Block + if (Prech_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b1111; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + RP_chk0 = $time; + RP_chk1 = $time; + RP_chk2 = $time; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = ALL",$time); + // Activate to Precharge all banks + if (($time - RAS_chk0 < tRAS) || ($time - RAS_chk1 < tRAS) || + ($time - RAS_chk2 < tRAS) || ($time - RAS_chk3 < tRAS)) begin + $display ("at time %t ERROR: tRAS violation during Precharge all bank", $time); + end + // tWR violation check for write + if (($time - WR_chk[0] < tWRp) || ($time - WR_chk[1] < tWRp) || + ($time - WR_chk[2] < tWRp) || ($time - WR_chk[3] < tWRp)) begin + $display ("at time %t ERROR: tWR violation during Precharge all bank", $time); + end + end else if (Addr[10] == 1'b0) begin + if (Ba == 2'b00) begin + {Pc_b0, Act_b0} = 2'b10; + RP_chk0 = $time; + if (Debug) $display ("at time %t PRE : Bank = 0",$time); + // Activate to Precharge Bank 0 + if ($time - RAS_chk0 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 0", $time); + end + end else if (Ba == 2'b01) begin + {Pc_b1, Act_b1} = 2'b10; + RP_chk1 = $time; + if (Debug) $display ("at time %t PRE : Bank = 1",$time); + // Activate to Precharge Bank 1 + if ($time - RAS_chk1 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 1", $time); + end + end else if (Ba == 2'b10) begin + {Pc_b2, Act_b2} = 2'b10; + RP_chk2 = $time; + if (Debug) $display ("at time %t PRE : Bank = 2",$time); + // Activate to Precharge Bank 2 + if ($time - RAS_chk2 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 2", $time); + end + end else if (Ba == 2'b11) begin + {Pc_b3, Act_b3} = 2'b10; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = 3",$time); + // Activate to Precharge Bank 3 + if ($time - RAS_chk3 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 3", $time); + end + end + // tWR violation check for write + if ($time - WR_chk[Ba] < tWRp) begin + $display ("at time %t ERROR: tWR violation during Precharge bank %d", $time, Ba); + end + end + // Terminate a Write Immediately (if same bank or all banks) + if (Data_in_enable == 1'b1 && (Bank == Ba || Addr[10] == 1'b1)) begin + Data_in_enable = 1'b0; + end + // Precharge Command Pipeline for Read + if (Cas_latency_3 == 1'b1) begin + Command[2] = `PRECH; + Bank_precharge[2] = Ba; + A10_precharge[2] = Addr[10]; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `PRECH; + Bank_precharge[1] = Ba; + A10_precharge[1] = Addr[10]; + end + end + + // Burst terminate + if (Burst_term == 1'b1) begin + // Terminate a Write Immediately + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + // Terminate a Read Depend on CAS Latency + if (Cas_latency_3 == 1'b1) begin + Command[2] = `BST; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `BST; + end + if (Debug) $display ("at time %t BST : Burst Terminate",$time); + end + + // Read, Write, Column Latch + if (Read_enable == 1'b1 || Write_enable == 1'b1) begin + // Check to see if bank is open (ACT) + if ((Ba == 2'b00 && Pc_b0 == 1'b1) || (Ba == 2'b01 && Pc_b1 == 1'b1) || + (Ba == 2'b10 && Pc_b2 == 1'b1) || (Ba == 2'b11 && Pc_b3 == 1'b1)) begin + $display("at time %t ERROR: Cannot Read or Write - Bank %d is not Activated", $time, Ba); + end + // Activate to Read or Write + if ((Ba == 2'b00) && ($time - RCD_chk0 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 0", $time); + if ((Ba == 2'b01) && ($time - RCD_chk1 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 1", $time); + if ((Ba == 2'b10) && ($time - RCD_chk2 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 2", $time); + if ((Ba == 2'b11) && ($time - RCD_chk3 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 3", $time); + // Read Command + if (Read_enable == 1'b1) begin + // CAS Latency pipeline + if (Cas_latency_3 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[2] = `READ_A; + end else begin + Command[2] = `READ; + end + Col_addr[2] = Addr; + Bank_addr[2] = Ba; + end else if (Cas_latency_2 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[1] = `READ_A; + end else begin + Command[1] = `READ; + end + Col_addr[1] = Addr; + Bank_addr[1] = Ba; + end + + // Read interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write Command + end else if (Write_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[0] = `WRITE_A; + end else begin + Command[0] = `WRITE; + end + Col_addr[0] = Addr; + Bank_addr[0] = Ba; + + // Write interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write interrupt Read (terminate Read immediately) + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + // Interrupting a Write with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Write_precharge[Bank] == 1'b1) begin + RW_interrupt_write[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Write Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Interrupting a Read with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Read_precharge[Bank] == 1'b1) begin + RW_interrupt_read[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Read Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Read or Write with Auto Precharge + if (Addr[10] == 1'b1) begin + Auto_precharge[Ba] = 1'b1; + Count_precharge[Ba] = 0; + if (Read_enable == 1'b1) begin + Read_precharge[Ba] = 1'b1; + end else if (Write_enable == 1'b1) begin + Write_precharge[Ba] = 1'b1; + end + end + end + + // Read with Auto Precharge Calculation + // The device start internal precharge: + // 1. CAS Latency - 1 cycles before last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + if ((Auto_precharge[0] == 1'b1) && (Read_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + ((Burst_length_1 == 1'b1 && Count_precharge[0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge[0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[0] >= 8))) || + (RW_interrupt_read[0] == 1'b1)) begin // Case 3 + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + Auto_precharge[0] = 1'b0; + Read_precharge[0] = 1'b0; + RW_interrupt_read[0] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + if ((Auto_precharge[1] == 1'b1) && (Read_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[1] >= 8))) || + (RW_interrupt_read[1] == 1'b1)) begin + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + Auto_precharge[1] = 1'b0; + Read_precharge[1] = 1'b0; + RW_interrupt_read[1] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + if ((Auto_precharge[2] == 1'b1) && (Read_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[2] >= 8))) || + (RW_interrupt_read[2] == 1'b1)) begin + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + Auto_precharge[2] = 1'b0; + Read_precharge[2] = 1'b0; + RW_interrupt_read[2] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + if ((Auto_precharge[3] == 1'b1) && (Read_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[3] >= 8))) || + (RW_interrupt_read[3] == 1'b1)) begin + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + Auto_precharge[3] = 1'b0; + Read_precharge[3] = 1'b0; + RW_interrupt_read[3] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + + // Internal Precharge or Bst + if (Command[0] == `PRECH) begin // Precharge terminate a read with same bank or all banks + if (Bank_precharge[0] == Bank || A10_precharge[0] == 1'b1) begin + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + end else if (Command[0] == `BST) begin // BST terminate a read to current bank + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + if (Data_out_enable == 1'b0) begin + Dq_reg <= #tOH {data_bits{1'bz}}; + end + + // Detect Read or Write command + if (Command[0] == `READ || Command[0] == `READ_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b0; + Data_out_enable = 1'b1; + end else if (Command[0] == `WRITE || Command[0] == `WRITE_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b1; + Data_out_enable = 1'b0; + end + + // DQ buffer (Driver/Receiver) + if (Data_in_enable == 1'b1) begin // Writing Data to Memory + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + // Dqm operation + if (Dqm[0] == 1'b0) Dq_dqm [ 7 : 0] = Dq [ 7 : 0]; + if (Dqm[1] == 1'b0) Dq_dqm [15 : 8] = Dq [15 : 8]; + //if (Dqm[2] == 1'b0) Dq_dqm [23 : 16] = Dq [23 : 16]; + // if (Dqm[3] == 1'b0) Dq_dqm [31 : 24] = Dq [31 : 24]; + // Write to memory + if (Bank == 2'b00) Bank0 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b01) Bank1 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b10) Bank2 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11) Bank3 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11 && Row==10'h3 && Col[7:4]==4'h4) + $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + //$fdisplay(test_file,"bank:%h row:%h col:%h write:%h",Bank,Row,Col,Dq_dqm); + // Output result + if (Dqm == 4'b1111) begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_dqm, Dqm); + // Record tWR time and reset counter + WR_chk [Bank] = $time; + WR_counter [Bank] = 0; + end + // Advance burst counter subroutine + #tHZ Burst; + end else if (Data_out_enable == 1'b1) begin // Reading Data from Memory + //$display("%h , %h, %h",Bank0,Row,Col); + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + + // Dqm operation + if (Dqm_reg0[0] == 1'b1) Dq_dqm [ 7 : 0] = 8'bz; + if (Dqm_reg0[1] == 1'b1) Dq_dqm [15 : 8] = 8'bz; + if (Dqm_reg0[2] == 1'b1) Dq_dqm [23 : 16] = 8'bz; + if (Dqm_reg0[3] == 1'b1) Dq_dqm [31 : 24] = 8'bz; + // Display result + Dq_reg [data_bits - 1 : 0] = #tAC Dq_dqm [data_bits - 1 : 0]; + if (Dqm_reg0 == 4'b1111) begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_reg, Dqm_reg0); + end + // Advance burst counter subroutine + Burst; + end + end + + // Write with Auto Precharge Calculation + // The device start internal precharge: + // 1. tWR Clock after last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + always @ (WR_counter[0]) begin + if ((Auto_precharge[0] == 1'b1) && (Write_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge [0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [0] >= 8))) || + (RW_interrupt_write[0] == 1'b1 && WR_counter[0] >= 2)) begin // Case 3 (stop count when interrupt) + Auto_precharge[0] = 1'b0; + Write_precharge[0] = 1'b0; + RW_interrupt_write[0] = 1'b0; + #tWRa; // Wait for tWR + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + end + always @ (WR_counter[1]) begin + if ((Auto_precharge[1] == 1'b1) && (Write_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [1] >= 8))) || + (RW_interrupt_write[1] == 1'b1 && WR_counter[1] >= 2)) begin + Auto_precharge[1] = 1'b0; + Write_precharge[1] = 1'b0; + RW_interrupt_write[1] = 1'b0; + #tWRa; // Wait for tWR + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + end + always @ (WR_counter[2]) begin + if ((Auto_precharge[2] == 1'b1) && (Write_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [2] >= 8))) || + (RW_interrupt_write[2] == 1'b1 && WR_counter[2] >= 2)) begin + Auto_precharge[2] = 1'b0; + Write_precharge[2] = 1'b0; + RW_interrupt_write[2] = 1'b0; + #tWRa; // Wait for tWR + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + end + always @ (WR_counter[3]) begin + if ((Auto_precharge[3] == 1'b1) && (Write_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [3] >= 8))) || + (RW_interrupt_write[3] == 1'b1 && WR_counter[3] >= 2)) begin + Auto_precharge[3] = 1'b0; + Write_precharge[3] = 1'b0; + RW_interrupt_write[3] = 1'b0; + #tWRa; // Wait for tWR + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + end + + task Burst; + begin + // Advance Burst Counter + Burst_counter = Burst_counter + 1; + + // Burst Type + if (Mode_reg[3] == 1'b0) begin // Sequential Burst + Col_temp = Col + 1; + end else if (Mode_reg[3] == 1'b1) begin // Interleaved Burst + Col_temp[2] = Burst_counter[2] ^ Col_brst[2]; + Col_temp[1] = Burst_counter[1] ^ Col_brst[1]; + Col_temp[0] = Burst_counter[0] ^ Col_brst[0]; + end + + // Burst Length + if (Burst_length_2) begin // Burst Length = 2 + Col [0] = Col_temp [0]; + end else if (Burst_length_4) begin // Burst Length = 4 + Col [1 : 0] = Col_temp [1 : 0]; + end else if (Burst_length_8) begin // Burst Length = 8 + Col [2 : 0] = Col_temp [2 : 0]; + end else begin // Burst Length = FULL + Col = Col_temp; + end + + // Burst Read Single Write + if (Write_burst_mode == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Data Counter + if (Burst_length_1 == 1'b1) begin + if (Burst_counter >= 1) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_2 == 1'b1) begin + if (Burst_counter >= 2) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_4 == 1'b1) begin + if (Burst_counter >= 4) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_8 == 1'b1) begin + if (Burst_counter >= 8) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end + end + endtask + + //**********************将SDRAM内的数据直接输出到外部文件*******************************// + +/* + integer sdram_data,ind; + + + always@(sdram_r) + begin + sdram_data=$fopen("sdram_data.txt"); + $display("Sdram dampout begin ",sdram_data); +// $fdisplay(sdram_data,"Bank0："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank0[ind]); +// $fdisplay(sdram_data,"Bank1："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank1[ind]); +// $fdisplay(sdram_data,"Bank2："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank2[ind]); +// $fdisplay(sdram_data,"Bank3："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank3[ind]); + + $fclose("sdram_data.txt"); + //->compare; + end +*/ + integer sdram_data,sdram_mem; + reg [23:0] aa,cc; + reg [18:0] bb,ee; + + always@(sdram_r) + begin + $display("Sdram dampout begin ",$realtime); + sdram_data=$fopen("sdram_data.txt"); + for(aa=0;aa<4*(mem_sizes+1);aa=aa+1) + begin + bb=aa[18:0]; + if(aa<=mem_sizes) + $fdisplay(sdram_data,"%0d %0h",aa,Bank0[bb]); + else if(aa<=2*mem_sizes+1) + $fdisplay(sdram_data,"%0d %0h",aa,Bank1[bb]); + else if(aa<=3*mem_sizes+2) + $fdisplay(sdram_data,"%0d %0h",aa,Bank2[bb]); + else + $fdisplay(sdram_data,"%0d %0h",aa,Bank3[bb]); + end + $fclose("sdram_data.txt"); + + sdram_mem=$fopen("sdram_mem.txt"); + for(cc=0;cc<4*(mem_sizes+1);cc=cc+1) + begin + ee=cc[18:0]; + if(cc<=mem_sizes) + $fdisplay(sdram_mem,"%0h",Bank0[ee]); + else if(cc<=2*mem_sizes+1) + $fdisplay(sdram_mem,"%0h",Bank1[ee]); + else if(cc<=3*mem_sizes+2) + $fdisplay(sdram_mem,"%0h",Bank2[ee]); + else + $fdisplay(sdram_mem,"%0h",Bank3[ee]); + end + $fclose("sdram_mem.txt"); + + end + + + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// specify +// specparam +//// tAH = 0.8, // Addr, Ba Hold Time +//// tAS = 1.5, // Addr, Ba Setup Time +//// tCH = 2.5, // Clock High-Level Width +//// tCL = 2.5, // Clock Low-Level Width +////// tCK = 10.0, // Clock Cycle Time 100mhz +////// tCK = 7.5, // Clock Cycle Time 133mhz +//// tCK = 7, // Clock Cycle Time 143mhz +//// tDH = 0.8, // Data-in Hold Time +//// tDS = 1.5, // Data-in Setup Time +//// tCKH = 0.8, // CKE Hold Time +//// tCKS = 1.5, // CKE Setup Time +//// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +//// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// tAH = 1, // Addr, Ba Hold Time +// tAS = 1.5, // Addr, Ba Setup Time +// tCH = 1, // Clock High-Level Width +// tCL = 3, // Clock Low-Level Width +//// tCK = 10.0, // Clock Cycle Time 100mhz +//// tCK = 7.5, // Clock Cycle Time 133mhz +// tCK = 7, // Clock Cycle Time 143mhz +// tDH = 1, // Data-in Hold Time +// tDS = 2, // Data-in Setup Time +// tCKH = 1, // CKE Hold Time +// tCKS = 2, // CKE Setup Time +// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// $width (posedge Clk, tCH); +// $width (negedge Clk, tCL); +// $period (negedge Clk, tCK); +// $period (posedge Clk, tCK); +// $setuphold(posedge Clk, Cke, tCKS, tCKH); +// $setuphold(posedge Clk, Cs_n, tCMS, tCMH); +// $setuphold(posedge Clk, Cas_n, tCMS, tCMH); +// $setuphold(posedge Clk, Ras_n, tCMS, tCMH); +// $setuphold(posedge Clk, We_n, tCMS, tCMH); +// $setuphold(posedge Clk, Addr, tAS, tAH); +// $setuphold(posedge Clk, Ba, tAS, tAH); +// $setuphold(posedge Clk, Dqm, tCMS, tCMH); +// $setuphold(posedge Dq_chk, Dq, tDS, tDH); +// endspecify + +endmodule + diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_a_ref/sdram_model_plus.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_a_ref/sdram_model_plus.v new file mode 100644 index 0000000..4e51287 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_a_ref/sdram_model_plus.v @@ -0,0 +1,1131 @@ +/*************************************************************************************** +作者： 李晟 +2003-08-27 V0.1 李晟 + + 添加内存模块倒空功能，在外部需要创建事件：sdram_r ,本SDRAM的内容将会按Bank 顺序damp out 至文件 + sdram_data.txt 中 +×××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××*/ +//2004-03-04 陈乃奎 修改原程序中将BANK的数据转存入TXT文件的格式 +//2004-03-16 陈乃奎 修改SDRAM 的初始化数据 +//2004/04/06 陈乃奎 将SDRAM的操作命令以字符形式表示，以便用MODELSIM监视 +//2004/04/19 陈乃奎 修改参数 parameter tAC = 8; +//2010/09/17 罗瑶 修改sdram的大小，数据位宽，dqm宽度; +/**************************************************************************************** +* +* File Name: sdram_model.V +* Version: 0.0f +* Date: July 8th, 1999 +* Model: BUS Functional +* Simulator: Model Technology (PC version 5.2e PE) +* +* Dependencies: None +* +* Author: Son P. Huynh +* Email: sphuynh@micron.com +* Phone: (208) 368-3825 +* Company: Micron Technology, Inc. +* Model: sdram_model (1Meg x 16 x 4 Banks) +* +* Description: 64Mb SDRAM Verilog model +* +* Limitation: - Doesn't check for 4096 cycle refresh +* +* Note: - Set simulator resolution to "ps" accuracy +* - Set Debug = 0 to disable $display messages +* +* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY +* WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY +* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR +* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT. +* +* Copyright ?1998 Micron Semiconductor Products, Inc. +* All rights researved +* +* Rev Author Phone Date Changes +* ---- ---------------------------- ---------- --------------------------------------- +* 0.0f Son Huynh 208-368-3825 07/08/1999 - Fix tWR = 1 Clk + 7.5 ns (Auto) +* Micron Technology Inc. - Fix tWR = 15 ns (Manual) +* - Fix tRP (Autoprecharge to AutoRefresh) +* +* 0.0a Son Huynh 208-368-3825 05/13/1998 - First Release (from 64Mb rev 0.0e) +* Micron Technology Inc. +****************************************************************************************/ + +`timescale 1ns / 100ps + +module sdram_model_plus (Dq, Addr, Ba, Clk, Cke, Cs_n, Ras_n, Cas_n, We_n, Dqm,Debug); + + parameter addr_bits = 11; + parameter data_bits = 32; + parameter col_bits = 8; + parameter mem_sizes = 1048576*2-1;//1 Meg + + inout [data_bits - 1 : 0] Dq; + input [addr_bits - 1 : 0] Addr; + input [1 : 0] Ba; + input Clk; + input Cke; + input Cs_n; + input Ras_n; + input Cas_n; + input We_n; + input [3 : 0] Dqm; //高低各8bit + //added by xzli + input Debug; + + reg [data_bits - 1 : 0] Bank0 [0 : mem_sizes];//存储器类型数据 + reg [data_bits - 1 : 0] Bank1 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank2 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank3 [0 : mem_sizes]; + + reg [1 : 0] Bank_addr [0 : 3]; // Bank Address Pipeline + reg [col_bits - 1 : 0] Col_addr [0 : 3]; // Column Address Pipeline + reg [3 : 0] Command [0 : 3]; // Command Operation Pipeline + reg [3 : 0] Dqm_reg0, Dqm_reg1; // DQM Operation Pipeline + reg [addr_bits - 1 : 0] B0_row_addr, B1_row_addr, B2_row_addr, B3_row_addr; + + reg [addr_bits - 1 : 0] Mode_reg; + reg [data_bits - 1 : 0] Dq_reg, Dq_dqm; + reg [col_bits - 1 : 0] Col_temp, Burst_counter; + + reg Act_b0, Act_b1, Act_b2, Act_b3; // Bank Activate + reg Pc_b0, Pc_b1, Pc_b2, Pc_b3; // Bank Precharge + + reg [1 : 0] Bank_precharge [0 : 3]; // Precharge Command + reg A10_precharge [0 : 3]; // Addr[10] = 1 (All banks) + reg Auto_precharge [0 : 3]; // RW AutoPrecharge (Bank) + reg Read_precharge [0 : 3]; // R AutoPrecharge + reg Write_precharge [0 : 3]; // W AutoPrecharge + integer Count_precharge [0 : 3]; // RW AutoPrecharge (Counter) + reg RW_interrupt_read [0 : 3]; // RW Interrupt Read with Auto Precharge + reg RW_interrupt_write [0 : 3]; // RW Interrupt Write with Auto Precharge + + reg Data_in_enable; + reg Data_out_enable; + + reg [1 : 0] Bank, Previous_bank; + reg [addr_bits - 1 : 0] Row; + reg [col_bits - 1 : 0] Col, Col_brst; + + // Internal system clock + reg CkeZ, Sys_clk; + + reg [21:0] dd; + + // Commands Decode + wire Active_enable = ~Cs_n & ~Ras_n & Cas_n & We_n; + wire Aref_enable = ~Cs_n & ~Ras_n & ~Cas_n & We_n; + wire Burst_term = ~Cs_n & Ras_n & Cas_n & ~We_n; + wire Mode_reg_enable = ~Cs_n & ~Ras_n & ~Cas_n & ~We_n; + wire Prech_enable = ~Cs_n & ~Ras_n & Cas_n & ~We_n; + wire Read_enable = ~Cs_n & Ras_n & ~Cas_n & We_n; + wire Write_enable = ~Cs_n & Ras_n & ~Cas_n & ~We_n; + + // Burst Length Decode + wire Burst_length_1 = ~Mode_reg[2] & ~Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_2 = ~Mode_reg[2] & ~Mode_reg[1] & Mode_reg[0]; + wire Burst_length_4 = ~Mode_reg[2] & Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_8 = ~Mode_reg[2] & Mode_reg[1] & Mode_reg[0]; + + // CAS Latency Decode + wire Cas_latency_2 = ~Mode_reg[6] & Mode_reg[5] & ~Mode_reg[4]; + wire Cas_latency_3 = ~Mode_reg[6] & Mode_reg[5] & Mode_reg[4]; + + // Write Burst Mode + wire Write_burst_mode = Mode_reg[9]; + + wire Debug; // Debug messages : 1 = On; 0 = Off + wire Dq_chk = Sys_clk & Data_in_enable; // Check setup/hold time for DQ + + reg [31:0] mem_d; + + event sdram_r,sdram_w,compare; + + + + + assign Dq = Dq_reg; // DQ buffer + + // Commands Operation + `define ACT 0 + `define NOP 1 + `define READ 2 + `define READ_A 3 + `define WRITE 4 + `define WRITE_A 5 + `define PRECH 6 + `define A_REF 7 + `define BST 8 + `define LMR 9 + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// parameter tAC = 8; //test 6.5 +// parameter tHZ = 7.0; +// parameter tOH = 2.7; +// parameter tMRD = 2.0; // 2 Clk Cycles +// parameter tRAS = 44.0; +// parameter tRC = 66.0; +// parameter tRCD = 20.0; +// parameter tRP = 20.0; +// parameter tRRD = 15.0; +// parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) +// parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Parameters for -7 (PC143) and CAS Latency = 3 + parameter tAC = 6.5; //test 6.5 + parameter tHZ = 5.5; + parameter tOH = 2; + parameter tMRD = 2.0; // 2 Clk Cycles + parameter tRAS = 48.0; + parameter tRC = 70.0; + parameter tRCD = 20.0; + parameter tRP = 20.0; + parameter tRRD = 14.0; + parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) + parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Check variable + integer MRD_chk; + integer WR_counter [0 : 3]; + time WR_chk [0 : 3]; + time RC_chk, RRD_chk; + time RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3; + time RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3; + time RP_chk0, RP_chk1, RP_chk2, RP_chk3; + + integer test_file; + + //*****display the command of the sdram************************************** + + parameter Mode_Reg_Set =4'b0000; + parameter Auto_Refresh =4'b0001; + parameter Row_Active =4'b0011; + parameter Pre_Charge =4'b0010; + parameter PreCharge_All =4'b0010; + parameter Write =4'b0100; + parameter Write_Pre =4'b0100; + parameter Read =4'b0101; + parameter Read_Pre =4'b0101; + parameter Burst_Stop =4'b0110; + parameter Nop =4'b0111; + parameter Dsel =4'b1111; + + wire [3:0] sdram_control; + reg cke_temp; + reg [8*13:1] sdram_command; + + always@(posedge Clk) + cke_temp<=Cke; + + assign sdram_control={Cs_n,Ras_n,Cas_n,We_n}; + + always@(sdram_control or cke_temp) + begin + case(sdram_control) + Mode_Reg_Set: sdram_command<="Mode_Reg_Set"; + Auto_Refresh: sdram_command<="Auto_Refresh"; + Row_Active: sdram_command<="Row_Active"; + Pre_Charge: sdram_command<="Pre_Charge"; + Burst_Stop: sdram_command<="Burst_Stop"; + Dsel: sdram_command<="Dsel"; + + Write: if(cke_temp==1) + sdram_command<="Write"; + else + sdram_command<="Write_suspend"; + + Read: if(cke_temp==1) + sdram_command<="Read"; + else + sdram_command<="Read_suspend"; + + Nop: if(cke_temp==1) + sdram_command<="Nop"; + else + sdram_command<="Self_refresh"; + + default: sdram_command<="Power_down"; + endcase + end + + //***************************************************** + + initial + begin + //test_file=$fopen("test_file.txt"); + end + + initial + begin + Dq_reg = {data_bits{1'bz}}; + {Data_in_enable, Data_out_enable} = 0; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b0000; + {WR_chk[0], WR_chk[1], WR_chk[2], WR_chk[3]} = 0; + {WR_counter[0], WR_counter[1], WR_counter[2], WR_counter[3]} = 0; + {RW_interrupt_read[0], RW_interrupt_read[1], RW_interrupt_read[2], RW_interrupt_read[3]} = 0; + {RW_interrupt_write[0], RW_interrupt_write[1], RW_interrupt_write[2], RW_interrupt_write[3]} = 0; + {MRD_chk, RC_chk, RRD_chk} = 0; + {RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3} = 0; + {RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3} = 0; + {RP_chk0, RP_chk1, RP_chk2, RP_chk3} = 0; + $timeformat (-9, 0, " ns", 12); + //$readmemh("bank0.txt", Bank0); + //$readmemh("bank1.txt", Bank1); + //$readmemh("bank2.txt", Bank2); + //$readmemh("bank3.txt", Bank3); +/* + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + Bank0[dd]=dd[data_bits - 1 : 0]; + Bank1[dd]=dd[data_bits - 1 : 0]+1; + Bank2[dd]=dd[data_bits - 1 : 0]+2; + Bank3[dd]=dd[data_bits - 1 : 0]+3; + end +*/ + initial_sdram(0); + end + + task initial_sdram; + + input data_sign; + reg [3:0] data_sign; + + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + mem_d = {data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign}; + if(data_bits==16) + begin + Bank0[dd]=mem_d[15:0]; + Bank1[dd]=mem_d[15:0]; + Bank2[dd]=mem_d[15:0]; + Bank3[dd]=mem_d[15:0]; + end + else if(data_bits==32) + begin + Bank0[dd]=mem_d[31:0]; + Bank1[dd]=mem_d[31:0]; + Bank2[dd]=mem_d[31:0]; + Bank3[dd]=mem_d[31:0]; + end + end + + endtask + + // System clock generator + always + begin + @(posedge Clk) + begin + Sys_clk = CkeZ; + CkeZ = Cke; + end + @(negedge Clk) + begin + Sys_clk = 1'b0; + end + end + + always @ (posedge Sys_clk) begin + // Internal Commamd Pipelined + Command[0] = Command[1]; + Command[1] = Command[2]; + Command[2] = Command[3]; + Command[3] = `NOP; + + Col_addr[0] = Col_addr[1]; + Col_addr[1] = Col_addr[2]; + Col_addr[2] = Col_addr[3]; + Col_addr[3] = {col_bits{1'b0}}; + + Bank_addr[0] = Bank_addr[1]; + Bank_addr[1] = Bank_addr[2]; + Bank_addr[2] = Bank_addr[3]; + Bank_addr[3] = 2'b0; + + Bank_precharge[0] = Bank_precharge[1]; + Bank_precharge[1] = Bank_precharge[2]; + Bank_precharge[2] = Bank_precharge[3]; + Bank_precharge[3] = 2'b0; + + A10_precharge[0] = A10_precharge[1]; + A10_precharge[1] = A10_precharge[2]; + A10_precharge[2] = A10_precharge[3]; + A10_precharge[3] = 1'b0; + + // Dqm pipeline for Read + Dqm_reg0 = Dqm_reg1; + Dqm_reg1 = Dqm; + + // Read or Write with Auto Precharge Counter + if (Auto_precharge[0] == 1'b1) begin + Count_precharge[0] = Count_precharge[0] + 1; + end + if (Auto_precharge[1] == 1'b1) begin + Count_precharge[1] = Count_precharge[1] + 1; + end + if (Auto_precharge[2] == 1'b1) begin + Count_precharge[2] = Count_precharge[2] + 1; + end + if (Auto_precharge[3] == 1'b1) begin + Count_precharge[3] = Count_precharge[3] + 1; + end + + // tMRD Counter + MRD_chk = MRD_chk + 1; + + // tWR Counter for Write + WR_counter[0] = WR_counter[0] + 1; + WR_counter[1] = WR_counter[1] + 1; + WR_counter[2] = WR_counter[2] + 1; + WR_counter[3] = WR_counter[3] + 1; + + // Auto Refresh + if (Aref_enable == 1'b1) begin + if (Debug) $display ("at time %t AREF : Auto Refresh", $time); + // Auto Refresh to Auto Refresh + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Auto Refresh", $time); + end + // Precharge to Auto Refresh + if (($time - RP_chk0 < tRP || $time - RP_chk1 < tRP || $time - RP_chk2 < tRP || $time - RP_chk3 < tRP)&&Debug) begin + $display ("at time %t ERROR: tRP violation during Auto Refresh", $time); + end + // Precharge to Refresh + if (Pc_b0 == 1'b0 || Pc_b1 == 1'b0 || Pc_b2 == 1'b0 || Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: All banks must be Precharge before Auto Refresh", $time); + end + // Record Current tRC time + RC_chk = $time; + end + + // Load Mode Register + if (Mode_reg_enable == 1'b1) begin + // Decode CAS Latency, Burst Length, Burst Type, and Write Burst Mode + if (Pc_b0 == 1'b1 && Pc_b1 == 1'b1 && Pc_b2 == 1'b1 && Pc_b3 == 1'b1) begin + Mode_reg = Addr; + if (Debug) begin + $display ("at time %t LMR : Load Mode Register", $time); + // CAS Latency + if (Addr[6 : 4] == 3'b010) + $display (" CAS Latency = 2"); + else if (Addr[6 : 4] == 3'b011) + $display (" CAS Latency = 3"); + else + $display (" CAS Latency = Reserved"); + // Burst Length + if (Addr[2 : 0] == 3'b000) + $display (" Burst Length = 1"); + else if (Addr[2 : 0] == 3'b001) + $display (" Burst Length = 2"); + else if (Addr[2 : 0] == 3'b010) + $display (" Burst Length = 4"); + else if (Addr[2 : 0] == 3'b011) + $display (" Burst Length = 8"); + else if (Addr[3 : 0] == 4'b0111) + $display (" Burst Length = Full"); + else + $display (" Burst Length = Reserved"); + // Burst Type + if (Addr[3] == 1'b0) + $display (" Burst Type = Sequential"); + else if (Addr[3] == 1'b1) + $display (" Burst Type = Interleaved"); + else + $display (" Burst Type = Reserved"); + // Write Burst Mode + if (Addr[9] == 1'b0) + $display (" Write Burst Mode = Programmed Burst Length"); + else if (Addr[9] == 1'b1) + $display (" Write Burst Mode = Single Location Access"); + else + $display (" Write Burst Mode = Reserved"); + end + end else begin + $display ("at time %t ERROR: all banks must be Precharge before Load Mode Register", $time); + end + // REF to LMR + if ($time - RC_chk < tRC) begin + $display ("at time %t ERROR: tRC violation during Load Mode Register", $time); + end + // LMR to LMR + if (MRD_chk < tMRD) begin + $display ("at time %t ERROR: tMRD violation during Load Mode Register", $time); + end + MRD_chk = 0; + end + + // Active Block (Latch Bank Address and Row Address) + if (Active_enable == 1'b1) begin + if (Ba == 2'b00 && Pc_b0 == 1'b1) begin + {Act_b0, Pc_b0} = 2'b10; + B0_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk0 = $time; + RAS_chk0 = $time; + if (Debug) $display ("at time %t ACT : Bank = 0 Row = %d", $time, Addr); + // Precharge to Activate Bank 0 + if ($time - RP_chk0 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 0", $time); + end + end else if (Ba == 2'b01 && Pc_b1 == 1'b1) begin + {Act_b1, Pc_b1} = 2'b10; + B1_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk1 = $time; + RAS_chk1 = $time; + if (Debug) $display ("at time %t ACT : Bank = 1 Row = %d", $time, Addr); + // Precharge to Activate Bank 1 + if ($time - RP_chk1 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 1", $time); + end + end else if (Ba == 2'b10 && Pc_b2 == 1'b1) begin + {Act_b2, Pc_b2} = 2'b10; + B2_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk2 = $time; + RAS_chk2 = $time; + if (Debug) $display ("at time %t ACT : Bank = 2 Row = %d", $time, Addr); + // Precharge to Activate Bank 2 + if ($time - RP_chk2 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 2", $time); + end + end else if (Ba == 2'b11 && Pc_b3 == 1'b1) begin + {Act_b3, Pc_b3} = 2'b10; + B3_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk3 = $time; + RAS_chk3 = $time; + if (Debug) $display ("at time %t ACT : Bank = 3 Row = %d", $time, Addr); + // Precharge to Activate Bank 3 + if ($time - RP_chk3 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 3", $time); + end + end else if (Ba == 2'b00 && Pc_b0 == 1'b0) begin + $display ("at time %t ERROR: Bank 0 is not Precharged.", $time); + end else if (Ba == 2'b01 && Pc_b1 == 1'b0) begin + $display ("at time %t ERROR: Bank 1 is not Precharged.", $time); + end else if (Ba == 2'b10 && Pc_b2 == 1'b0) begin + $display ("at time %t ERROR: Bank 2 is not Precharged.", $time); + end else if (Ba == 2'b11 && Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: Bank 3 is not Precharged.", $time); + end + // Active Bank A to Active Bank B + if ((Previous_bank != Ba) && ($time - RRD_chk < tRRD)) begin + $display ("at time %t ERROR: tRRD violation during Activate bank = %d", $time, Ba); + end + // Load Mode Register to Active + if (MRD_chk < tMRD ) begin + $display ("at time %t ERROR: tMRD violation during Activate bank = %d", $time, Ba); + end + // Auto Refresh to Activate + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Activate bank = %d", $time, Ba); + end + // Record variables for checking violation + RRD_chk = $time; + Previous_bank = Ba; + end + + // Precharge Block + if (Prech_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b1111; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + RP_chk0 = $time; + RP_chk1 = $time; + RP_chk2 = $time; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = ALL",$time); + // Activate to Precharge all banks + if (($time - RAS_chk0 < tRAS) || ($time - RAS_chk1 < tRAS) || + ($time - RAS_chk2 < tRAS) || ($time - RAS_chk3 < tRAS)) begin + $display ("at time %t ERROR: tRAS violation during Precharge all bank", $time); + end + // tWR violation check for write + if (($time - WR_chk[0] < tWRp) || ($time - WR_chk[1] < tWRp) || + ($time - WR_chk[2] < tWRp) || ($time - WR_chk[3] < tWRp)) begin + $display ("at time %t ERROR: tWR violation during Precharge all bank", $time); + end + end else if (Addr[10] == 1'b0) begin + if (Ba == 2'b00) begin + {Pc_b0, Act_b0} = 2'b10; + RP_chk0 = $time; + if (Debug) $display ("at time %t PRE : Bank = 0",$time); + // Activate to Precharge Bank 0 + if ($time - RAS_chk0 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 0", $time); + end + end else if (Ba == 2'b01) begin + {Pc_b1, Act_b1} = 2'b10; + RP_chk1 = $time; + if (Debug) $display ("at time %t PRE : Bank = 1",$time); + // Activate to Precharge Bank 1 + if ($time - RAS_chk1 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 1", $time); + end + end else if (Ba == 2'b10) begin + {Pc_b2, Act_b2} = 2'b10; + RP_chk2 = $time; + if (Debug) $display ("at time %t PRE : Bank = 2",$time); + // Activate to Precharge Bank 2 + if ($time - RAS_chk2 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 2", $time); + end + end else if (Ba == 2'b11) begin + {Pc_b3, Act_b3} = 2'b10; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = 3",$time); + // Activate to Precharge Bank 3 + if ($time - RAS_chk3 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 3", $time); + end + end + // tWR violation check for write + if ($time - WR_chk[Ba] < tWRp) begin + $display ("at time %t ERROR: tWR violation during Precharge bank %d", $time, Ba); + end + end + // Terminate a Write Immediately (if same bank or all banks) + if (Data_in_enable == 1'b1 && (Bank == Ba || Addr[10] == 1'b1)) begin + Data_in_enable = 1'b0; + end + // Precharge Command Pipeline for Read + if (Cas_latency_3 == 1'b1) begin + Command[2] = `PRECH; + Bank_precharge[2] = Ba; + A10_precharge[2] = Addr[10]; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `PRECH; + Bank_precharge[1] = Ba; + A10_precharge[1] = Addr[10]; + end + end + + // Burst terminate + if (Burst_term == 1'b1) begin + // Terminate a Write Immediately + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + // Terminate a Read Depend on CAS Latency + if (Cas_latency_3 == 1'b1) begin + Command[2] = `BST; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `BST; + end + if (Debug) $display ("at time %t BST : Burst Terminate",$time); + end + + // Read, Write, Column Latch + if (Read_enable == 1'b1 || Write_enable == 1'b1) begin + // Check to see if bank is open (ACT) + if ((Ba == 2'b00 && Pc_b0 == 1'b1) || (Ba == 2'b01 && Pc_b1 == 1'b1) || + (Ba == 2'b10 && Pc_b2 == 1'b1) || (Ba == 2'b11 && Pc_b3 == 1'b1)) begin + $display("at time %t ERROR: Cannot Read or Write - Bank %d is not Activated", $time, Ba); + end + // Activate to Read or Write + if ((Ba == 2'b00) && ($time - RCD_chk0 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 0", $time); + if ((Ba == 2'b01) && ($time - RCD_chk1 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 1", $time); + if ((Ba == 2'b10) && ($time - RCD_chk2 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 2", $time); + if ((Ba == 2'b11) && ($time - RCD_chk3 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 3", $time); + // Read Command + if (Read_enable == 1'b1) begin + // CAS Latency pipeline + if (Cas_latency_3 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[2] = `READ_A; + end else begin + Command[2] = `READ; + end + Col_addr[2] = Addr; + Bank_addr[2] = Ba; + end else if (Cas_latency_2 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[1] = `READ_A; + end else begin + Command[1] = `READ; + end + Col_addr[1] = Addr; + Bank_addr[1] = Ba; + end + + // Read interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write Command + end else if (Write_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[0] = `WRITE_A; + end else begin + Command[0] = `WRITE; + end + Col_addr[0] = Addr; + Bank_addr[0] = Ba; + + // Write interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write interrupt Read (terminate Read immediately) + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + // Interrupting a Write with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Write_precharge[Bank] == 1'b1) begin + RW_interrupt_write[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Write Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Interrupting a Read with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Read_precharge[Bank] == 1'b1) begin + RW_interrupt_read[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Read Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Read or Write with Auto Precharge + if (Addr[10] == 1'b1) begin + Auto_precharge[Ba] = 1'b1; + Count_precharge[Ba] = 0; + if (Read_enable == 1'b1) begin + Read_precharge[Ba] = 1'b1; + end else if (Write_enable == 1'b1) begin + Write_precharge[Ba] = 1'b1; + end + end + end + + // Read with Auto Precharge Calculation + // The device start internal precharge: + // 1. CAS Latency - 1 cycles before last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + if ((Auto_precharge[0] == 1'b1) && (Read_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + ((Burst_length_1 == 1'b1 && Count_precharge[0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge[0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[0] >= 8))) || + (RW_interrupt_read[0] == 1'b1)) begin // Case 3 + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + Auto_precharge[0] = 1'b0; + Read_precharge[0] = 1'b0; + RW_interrupt_read[0] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + if ((Auto_precharge[1] == 1'b1) && (Read_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[1] >= 8))) || + (RW_interrupt_read[1] == 1'b1)) begin + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + Auto_precharge[1] = 1'b0; + Read_precharge[1] = 1'b0; + RW_interrupt_read[1] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + if ((Auto_precharge[2] == 1'b1) && (Read_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[2] >= 8))) || + (RW_interrupt_read[2] == 1'b1)) begin + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + Auto_precharge[2] = 1'b0; + Read_precharge[2] = 1'b0; + RW_interrupt_read[2] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + if ((Auto_precharge[3] == 1'b1) && (Read_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[3] >= 8))) || + (RW_interrupt_read[3] == 1'b1)) begin + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + Auto_precharge[3] = 1'b0; + Read_precharge[3] = 1'b0; + RW_interrupt_read[3] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + + // Internal Precharge or Bst + if (Command[0] == `PRECH) begin // Precharge terminate a read with same bank or all banks + if (Bank_precharge[0] == Bank || A10_precharge[0] == 1'b1) begin + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + end else if (Command[0] == `BST) begin // BST terminate a read to current bank + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + if (Data_out_enable == 1'b0) begin + Dq_reg <= #tOH {data_bits{1'bz}}; + end + + // Detect Read or Write command + if (Command[0] == `READ || Command[0] == `READ_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b0; + Data_out_enable = 1'b1; + end else if (Command[0] == `WRITE || Command[0] == `WRITE_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b1; + Data_out_enable = 1'b0; + end + + // DQ buffer (Driver/Receiver) + if (Data_in_enable == 1'b1) begin // Writing Data to Memory + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + // Dqm operation + if (Dqm[0] == 1'b0) Dq_dqm [ 7 : 0] = Dq [ 7 : 0]; + if (Dqm[1] == 1'b0) Dq_dqm [15 : 8] = Dq [15 : 8]; + //if (Dqm[2] == 1'b0) Dq_dqm [23 : 16] = Dq [23 : 16]; + // if (Dqm[3] == 1'b0) Dq_dqm [31 : 24] = Dq [31 : 24]; + // Write to memory + if (Bank == 2'b00) Bank0 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b01) Bank1 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b10) Bank2 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11) Bank3 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11 && Row==10'h3 && Col[7:4]==4'h4) + $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + //$fdisplay(test_file,"bank:%h row:%h col:%h write:%h",Bank,Row,Col,Dq_dqm); + // Output result + if (Dqm == 4'b1111) begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_dqm, Dqm); + // Record tWR time and reset counter + WR_chk [Bank] = $time; + WR_counter [Bank] = 0; + end + // Advance burst counter subroutine + #tHZ Burst; + end else if (Data_out_enable == 1'b1) begin // Reading Data from Memory + //$display("%h , %h, %h",Bank0,Row,Col); + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + + // Dqm operation + if (Dqm_reg0[0] == 1'b1) Dq_dqm [ 7 : 0] = 8'bz; + if (Dqm_reg0[1] == 1'b1) Dq_dqm [15 : 8] = 8'bz; + if (Dqm_reg0[2] == 1'b1) Dq_dqm [23 : 16] = 8'bz; + if (Dqm_reg0[3] == 1'b1) Dq_dqm [31 : 24] = 8'bz; + // Display result + Dq_reg [data_bits - 1 : 0] = #tAC Dq_dqm [data_bits - 1 : 0]; + if (Dqm_reg0 == 4'b1111) begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_reg, Dqm_reg0); + end + // Advance burst counter subroutine + Burst; + end + end + + // Write with Auto Precharge Calculation + // The device start internal precharge: + // 1. tWR Clock after last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + always @ (WR_counter[0]) begin + if ((Auto_precharge[0] == 1'b1) && (Write_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge [0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [0] >= 8))) || + (RW_interrupt_write[0] == 1'b1 && WR_counter[0] >= 2)) begin // Case 3 (stop count when interrupt) + Auto_precharge[0] = 1'b0; + Write_precharge[0] = 1'b0; + RW_interrupt_write[0] = 1'b0; + #tWRa; // Wait for tWR + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + end + always @ (WR_counter[1]) begin + if ((Auto_precharge[1] == 1'b1) && (Write_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [1] >= 8))) || + (RW_interrupt_write[1] == 1'b1 && WR_counter[1] >= 2)) begin + Auto_precharge[1] = 1'b0; + Write_precharge[1] = 1'b0; + RW_interrupt_write[1] = 1'b0; + #tWRa; // Wait for tWR + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + end + always @ (WR_counter[2]) begin + if ((Auto_precharge[2] == 1'b1) && (Write_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [2] >= 8))) || + (RW_interrupt_write[2] == 1'b1 && WR_counter[2] >= 2)) begin + Auto_precharge[2] = 1'b0; + Write_precharge[2] = 1'b0; + RW_interrupt_write[2] = 1'b0; + #tWRa; // Wait for tWR + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + end + always @ (WR_counter[3]) begin + if ((Auto_precharge[3] == 1'b1) && (Write_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [3] >= 8))) || + (RW_interrupt_write[3] == 1'b1 && WR_counter[3] >= 2)) begin + Auto_precharge[3] = 1'b0; + Write_precharge[3] = 1'b0; + RW_interrupt_write[3] = 1'b0; + #tWRa; // Wait for tWR + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + end + + task Burst; + begin + // Advance Burst Counter + Burst_counter = Burst_counter + 1; + + // Burst Type + if (Mode_reg[3] == 1'b0) begin // Sequential Burst + Col_temp = Col + 1; + end else if (Mode_reg[3] == 1'b1) begin // Interleaved Burst + Col_temp[2] = Burst_counter[2] ^ Col_brst[2]; + Col_temp[1] = Burst_counter[1] ^ Col_brst[1]; + Col_temp[0] = Burst_counter[0] ^ Col_brst[0]; + end + + // Burst Length + if (Burst_length_2) begin // Burst Length = 2 + Col [0] = Col_temp [0]; + end else if (Burst_length_4) begin // Burst Length = 4 + Col [1 : 0] = Col_temp [1 : 0]; + end else if (Burst_length_8) begin // Burst Length = 8 + Col [2 : 0] = Col_temp [2 : 0]; + end else begin // Burst Length = FULL + Col = Col_temp; + end + + // Burst Read Single Write + if (Write_burst_mode == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Data Counter + if (Burst_length_1 == 1'b1) begin + if (Burst_counter >= 1) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_2 == 1'b1) begin + if (Burst_counter >= 2) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_4 == 1'b1) begin + if (Burst_counter >= 4) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_8 == 1'b1) begin + if (Burst_counter >= 8) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end + end + endtask + + //**********************将SDRAM内的数据直接输出到外部文件*******************************// + +/* + integer sdram_data,ind; + + + always@(sdram_r) + begin + sdram_data=$fopen("sdram_data.txt"); + $display("Sdram dampout begin ",sdram_data); +// $fdisplay(sdram_data,"Bank0："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank0[ind]); +// $fdisplay(sdram_data,"Bank1："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank1[ind]); +// $fdisplay(sdram_data,"Bank2："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank2[ind]); +// $fdisplay(sdram_data,"Bank3："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank3[ind]); + + $fclose("sdram_data.txt"); + //->compare; + end +*/ + integer sdram_data,sdram_mem; + reg [23:0] aa,cc; + reg [18:0] bb,ee; + + always@(sdram_r) + begin + $display("Sdram dampout begin ",$realtime); + sdram_data=$fopen("sdram_data.txt"); + for(aa=0;aa<4*(mem_sizes+1);aa=aa+1) + begin + bb=aa[18:0]; + if(aa<=mem_sizes) + $fdisplay(sdram_data,"%0d %0h",aa,Bank0[bb]); + else if(aa<=2*mem_sizes+1) + $fdisplay(sdram_data,"%0d %0h",aa,Bank1[bb]); + else if(aa<=3*mem_sizes+2) + $fdisplay(sdram_data,"%0d %0h",aa,Bank2[bb]); + else + $fdisplay(sdram_data,"%0d %0h",aa,Bank3[bb]); + end + $fclose("sdram_data.txt"); + + sdram_mem=$fopen("sdram_mem.txt"); + for(cc=0;cc<4*(mem_sizes+1);cc=cc+1) + begin + ee=cc[18:0]; + if(cc<=mem_sizes) + $fdisplay(sdram_mem,"%0h",Bank0[ee]); + else if(cc<=2*mem_sizes+1) + $fdisplay(sdram_mem,"%0h",Bank1[ee]); + else if(cc<=3*mem_sizes+2) + $fdisplay(sdram_mem,"%0h",Bank2[ee]); + else + $fdisplay(sdram_mem,"%0h",Bank3[ee]); + end + $fclose("sdram_mem.txt"); + + end + + + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// specify +// specparam +//// tAH = 0.8, // Addr, Ba Hold Time +//// tAS = 1.5, // Addr, Ba Setup Time +//// tCH = 2.5, // Clock High-Level Width +//// tCL = 2.5, // Clock Low-Level Width +////// tCK = 10.0, // Clock Cycle Time 100mhz +////// tCK = 7.5, // Clock Cycle Time 133mhz +//// tCK = 7, // Clock Cycle Time 143mhz +//// tDH = 0.8, // Data-in Hold Time +//// tDS = 1.5, // Data-in Setup Time +//// tCKH = 0.8, // CKE Hold Time +//// tCKS = 1.5, // CKE Setup Time +//// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +//// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// tAH = 1, // Addr, Ba Hold Time +// tAS = 1.5, // Addr, Ba Setup Time +// tCH = 1, // Clock High-Level Width +// tCL = 3, // Clock Low-Level Width +//// tCK = 10.0, // Clock Cycle Time 100mhz +//// tCK = 7.5, // Clock Cycle Time 133mhz +// tCK = 7, // Clock Cycle Time 143mhz +// tDH = 1, // Data-in Hold Time +// tDS = 2, // Data-in Setup Time +// tCKH = 1, // CKE Hold Time +// tCKS = 2, // CKE Setup Time +// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// $width (posedge Clk, tCH); +// $width (negedge Clk, tCL); +// $period (negedge Clk, tCK); +// $period (posedge Clk, tCK); +// $setuphold(posedge Clk, Cke, tCKS, tCKH); +// $setuphold(posedge Clk, Cs_n, tCMS, tCMH); +// $setuphold(posedge Clk, Cas_n, tCMS, tCMH); +// $setuphold(posedge Clk, Ras_n, tCMS, tCMH); +// $setuphold(posedge Clk, We_n, tCMS, tCMH); +// $setuphold(posedge Clk, Addr, tAS, tAH); +// $setuphold(posedge Clk, Ba, tAS, tAH); +// $setuphold(posedge Clk, Dqm, tCMS, tCMH); +// $setuphold(posedge Dq_chk, Dq, tDS, tDH); +// endspecify + +endmodule + diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_a_ref/tb_sdram_a_ref.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_a_ref/tb_sdram_a_ref.v new file mode 100644 index 0000000..a0fb5bf --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_a_ref/tb_sdram_a_ref.v @@ -0,0 +1,153 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : tb_sdram_a_ref +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鑷埛鏂版ā鍧椾豢鐪 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module tb_sdram_a_ref(); + +//********************************************************************// +//****************** Internal Signal and Defparam ********************// +//********************************************************************// + +//wire define +//sdram +wire [3:0] sdram_cmd ; //SDRAM鎿嶄綔鎸囦护 +wire [1:0] sdram_ba ; //SDRAM L-Bank鍦板潃 +wire [12:0] sdram_addr ; //SDRAM鍦板潃鎬荤嚎 +//clk_gen +wire clk_50m ; //PLL杈撳嚭50M鏃堕挓 +wire clk_100m ; //PLL杈撳嚭100M鏃堕挓 +wire clk_100m_shift ; //PLL杈撳嚭100M鏃堕挓,鐩镐綅鍋忕Щ-30deg +wire locked ; //PLL鏃堕挓閿佸畾淇″彿 +wire rst_n ; //澶嶄綅淇″彿,浣庢湁鏁 +//sdram_init +wire [3:0] init_cmd ; //鍒濆鍖栭樁娈垫寚浠 +wire [1:0] init_ba ; //鍒濆鍖栭樁娈礚-Bank鍦板潃 +wire [12:0] init_addr ; //鍒濆鍖栭樁娈靛湴鍧鎬荤嚎 +wire init_end ; //鍒濆鍖栧畬鎴愪俊鍙 +//sdram_a_ref +wire aref_req ; //鑷姩鍒锋柊璇锋眰 +wire aref_end ; //鑷姩鍒锋柊缁撴潫 +wire [3:0] aref_cmd ; //鑷姩鍒锋柊闃舵鎸囦护 +wire [1:0] aref_ba ; //鑷姩鍒锋柊闃舵L-Bank鍦板潃 +wire [12:0] aref_addr ; //鑷姩鍒锋柊闃舵鍦板潃鎬荤嚎 + +//reg define +reg sys_clk ; //绯荤粺鏃堕挓 +reg sys_rst_n ; //澶嶄綅淇″彿 +reg aref_en ; //鑷姩鍒锋柊浣胯兘 + +//defparam +//閲嶅畾涔変豢鐪熸ā鍨嬩腑鐨勭浉鍏冲弬鏁 +defparam sdram_model_plus_inst.addr_bits = 13; //鍦板潃浣嶅 +defparam sdram_model_plus_inst.data_bits = 16; //鏁版嵁浣嶅 +defparam sdram_model_plus_inst.col_bits = 9; //鍒楀湴鍧浣嶅 +defparam sdram_model_plus_inst.mem_sizes = 2*1024*1024; //L-Bank瀹归噺 + +//********************************************************************// +//**************************** Clk And Rst ***************************// +//********************************************************************// + +//鏃堕挓銆佸浣嶄俊鍙 +initial + begin + sys_clk = 1'b1 ; + sys_rst_n <= 1'b0 ; + #200 + sys_rst_n <= 1'b1 ; + end + +always #10 sys_clk = ~sys_clk; + +//rst_n:澶嶄綅淇″彿 +assign rst_n = sys_rst_n & locked; + +//aref_en:鑷姩鍒锋柊浣胯兘 +always@(posedge clk_100m or negedge rst_n) + if(rst_n == 1'b0) + aref_en <= 1'b0; + else if((init_end == 1'b1) && (aref_req == 1'b1)) + aref_en <= 1'b1; + else if(aref_end == 1'b1) + aref_en <= 1'b0; + +//sdram_cmd,sdram_ba,sdram_addr +assign sdram_cmd = (init_end == 1'b1) ? aref_cmd : init_cmd; +assign sdram_ba = (init_end == 1'b1) ? aref_ba : init_ba; +assign sdram_addr = (init_end == 1'b1) ? aref_addr : init_addr; + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// + +//------------- clk_gen_inst ------------- +clk_gen clk_gen_inst ( + .inclk0 (sys_clk ), + .areset (~sys_rst_n ), + .c0 (clk_50m ), + .c1 (clk_100m ), + .c2 (clk_100m_shift ), + + .locked (locked ) +); + +//------------- sdram_init_inst ------------- +sdram_init sdram_init_inst( + + .sys_clk (clk_100m ), + .sys_rst_n (rst_n ), + + .init_cmd (init_cmd ), + .init_ba (init_ba ), + .init_addr (init_addr ), + .init_end (init_end ) + +); + +//------------- sdram_a_ref_inst ------------- +sdram_a_ref sdram_a_ref_inst( + + .sys_clk (clk_100m ), + .sys_rst_n (rst_n ), + .init_end (init_end ), + .aref_en (aref_en ), + + .aref_req (aref_req ), + .aref_cmd (aref_cmd ), + .aref_ba (aref_ba ), + .aref_addr (aref_addr ), + .aref_end (aref_end ) + +); + +//-------------sdram_model_plus_inst------------- +sdram_model_plus sdram_model_plus_inst( + .Dq ( ), + .Addr (sdram_addr ), + .Ba (sdram_ba ), + .Clk (clk_100m_shift ), + .Cke (1'b1 ), + .Cs_n (sdram_cmd[3] ), + .Ras_n (sdram_cmd[2] ), + .Cas_n (sdram_cmd[1] ), + .We_n (sdram_cmd[0] ), + .Dqm (2'b0 ), + .Debug (1'b1 ) + +); + +endmodule \ No newline at end of file diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_ctrl/sdram_model_plus.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_ctrl/sdram_model_plus.v new file mode 100644 index 0000000..4e51287 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_ctrl/sdram_model_plus.v @@ -0,0 +1,1131 @@ +/*************************************************************************************** +作者： 李晟 +2003-08-27 V0.1 李晟 + + 添加内存模块倒空功能，在外部需要创建事件：sdram_r ,本SDRAM的内容将会按Bank 顺序damp out 至文件 + sdram_data.txt 中 +×××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××*/ +//2004-03-04 陈乃奎 修改原程序中将BANK的数据转存入TXT文件的格式 +//2004-03-16 陈乃奎 修改SDRAM 的初始化数据 +//2004/04/06 陈乃奎 将SDRAM的操作命令以字符形式表示，以便用MODELSIM监视 +//2004/04/19 陈乃奎 修改参数 parameter tAC = 8; +//2010/09/17 罗瑶 修改sdram的大小，数据位宽，dqm宽度; +/**************************************************************************************** +* +* File Name: sdram_model.V +* Version: 0.0f +* Date: July 8th, 1999 +* Model: BUS Functional +* Simulator: Model Technology (PC version 5.2e PE) +* +* Dependencies: None +* +* Author: Son P. Huynh +* Email: sphuynh@micron.com +* Phone: (208) 368-3825 +* Company: Micron Technology, Inc. +* Model: sdram_model (1Meg x 16 x 4 Banks) +* +* Description: 64Mb SDRAM Verilog model +* +* Limitation: - Doesn't check for 4096 cycle refresh +* +* Note: - Set simulator resolution to "ps" accuracy +* - Set Debug = 0 to disable $display messages +* +* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY +* WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY +* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR +* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT. +* +* Copyright ?1998 Micron Semiconductor Products, Inc. +* All rights researved +* +* Rev Author Phone Date Changes +* ---- ---------------------------- ---------- --------------------------------------- +* 0.0f Son Huynh 208-368-3825 07/08/1999 - Fix tWR = 1 Clk + 7.5 ns (Auto) +* Micron Technology Inc. - Fix tWR = 15 ns (Manual) +* - Fix tRP (Autoprecharge to AutoRefresh) +* +* 0.0a Son Huynh 208-368-3825 05/13/1998 - First Release (from 64Mb rev 0.0e) +* Micron Technology Inc. +****************************************************************************************/ + +`timescale 1ns / 100ps + +module sdram_model_plus (Dq, Addr, Ba, Clk, Cke, Cs_n, Ras_n, Cas_n, We_n, Dqm,Debug); + + parameter addr_bits = 11; + parameter data_bits = 32; + parameter col_bits = 8; + parameter mem_sizes = 1048576*2-1;//1 Meg + + inout [data_bits - 1 : 0] Dq; + input [addr_bits - 1 : 0] Addr; + input [1 : 0] Ba; + input Clk; + input Cke; + input Cs_n; + input Ras_n; + input Cas_n; + input We_n; + input [3 : 0] Dqm; //高低各8bit + //added by xzli + input Debug; + + reg [data_bits - 1 : 0] Bank0 [0 : mem_sizes];//存储器类型数据 + reg [data_bits - 1 : 0] Bank1 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank2 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank3 [0 : mem_sizes]; + + reg [1 : 0] Bank_addr [0 : 3]; // Bank Address Pipeline + reg [col_bits - 1 : 0] Col_addr [0 : 3]; // Column Address Pipeline + reg [3 : 0] Command [0 : 3]; // Command Operation Pipeline + reg [3 : 0] Dqm_reg0, Dqm_reg1; // DQM Operation Pipeline + reg [addr_bits - 1 : 0] B0_row_addr, B1_row_addr, B2_row_addr, B3_row_addr; + + reg [addr_bits - 1 : 0] Mode_reg; + reg [data_bits - 1 : 0] Dq_reg, Dq_dqm; + reg [col_bits - 1 : 0] Col_temp, Burst_counter; + + reg Act_b0, Act_b1, Act_b2, Act_b3; // Bank Activate + reg Pc_b0, Pc_b1, Pc_b2, Pc_b3; // Bank Precharge + + reg [1 : 0] Bank_precharge [0 : 3]; // Precharge Command + reg A10_precharge [0 : 3]; // Addr[10] = 1 (All banks) + reg Auto_precharge [0 : 3]; // RW AutoPrecharge (Bank) + reg Read_precharge [0 : 3]; // R AutoPrecharge + reg Write_precharge [0 : 3]; // W AutoPrecharge + integer Count_precharge [0 : 3]; // RW AutoPrecharge (Counter) + reg RW_interrupt_read [0 : 3]; // RW Interrupt Read with Auto Precharge + reg RW_interrupt_write [0 : 3]; // RW Interrupt Write with Auto Precharge + + reg Data_in_enable; + reg Data_out_enable; + + reg [1 : 0] Bank, Previous_bank; + reg [addr_bits - 1 : 0] Row; + reg [col_bits - 1 : 0] Col, Col_brst; + + // Internal system clock + reg CkeZ, Sys_clk; + + reg [21:0] dd; + + // Commands Decode + wire Active_enable = ~Cs_n & ~Ras_n & Cas_n & We_n; + wire Aref_enable = ~Cs_n & ~Ras_n & ~Cas_n & We_n; + wire Burst_term = ~Cs_n & Ras_n & Cas_n & ~We_n; + wire Mode_reg_enable = ~Cs_n & ~Ras_n & ~Cas_n & ~We_n; + wire Prech_enable = ~Cs_n & ~Ras_n & Cas_n & ~We_n; + wire Read_enable = ~Cs_n & Ras_n & ~Cas_n & We_n; + wire Write_enable = ~Cs_n & Ras_n & ~Cas_n & ~We_n; + + // Burst Length Decode + wire Burst_length_1 = ~Mode_reg[2] & ~Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_2 = ~Mode_reg[2] & ~Mode_reg[1] & Mode_reg[0]; + wire Burst_length_4 = ~Mode_reg[2] & Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_8 = ~Mode_reg[2] & Mode_reg[1] & Mode_reg[0]; + + // CAS Latency Decode + wire Cas_latency_2 = ~Mode_reg[6] & Mode_reg[5] & ~Mode_reg[4]; + wire Cas_latency_3 = ~Mode_reg[6] & Mode_reg[5] & Mode_reg[4]; + + // Write Burst Mode + wire Write_burst_mode = Mode_reg[9]; + + wire Debug; // Debug messages : 1 = On; 0 = Off + wire Dq_chk = Sys_clk & Data_in_enable; // Check setup/hold time for DQ + + reg [31:0] mem_d; + + event sdram_r,sdram_w,compare; + + + + + assign Dq = Dq_reg; // DQ buffer + + // Commands Operation + `define ACT 0 + `define NOP 1 + `define READ 2 + `define READ_A 3 + `define WRITE 4 + `define WRITE_A 5 + `define PRECH 6 + `define A_REF 7 + `define BST 8 + `define LMR 9 + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// parameter tAC = 8; //test 6.5 +// parameter tHZ = 7.0; +// parameter tOH = 2.7; +// parameter tMRD = 2.0; // 2 Clk Cycles +// parameter tRAS = 44.0; +// parameter tRC = 66.0; +// parameter tRCD = 20.0; +// parameter tRP = 20.0; +// parameter tRRD = 15.0; +// parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) +// parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Parameters for -7 (PC143) and CAS Latency = 3 + parameter tAC = 6.5; //test 6.5 + parameter tHZ = 5.5; + parameter tOH = 2; + parameter tMRD = 2.0; // 2 Clk Cycles + parameter tRAS = 48.0; + parameter tRC = 70.0; + parameter tRCD = 20.0; + parameter tRP = 20.0; + parameter tRRD = 14.0; + parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) + parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Check variable + integer MRD_chk; + integer WR_counter [0 : 3]; + time WR_chk [0 : 3]; + time RC_chk, RRD_chk; + time RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3; + time RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3; + time RP_chk0, RP_chk1, RP_chk2, RP_chk3; + + integer test_file; + + //*****display the command of the sdram************************************** + + parameter Mode_Reg_Set =4'b0000; + parameter Auto_Refresh =4'b0001; + parameter Row_Active =4'b0011; + parameter Pre_Charge =4'b0010; + parameter PreCharge_All =4'b0010; + parameter Write =4'b0100; + parameter Write_Pre =4'b0100; + parameter Read =4'b0101; + parameter Read_Pre =4'b0101; + parameter Burst_Stop =4'b0110; + parameter Nop =4'b0111; + parameter Dsel =4'b1111; + + wire [3:0] sdram_control; + reg cke_temp; + reg [8*13:1] sdram_command; + + always@(posedge Clk) + cke_temp<=Cke; + + assign sdram_control={Cs_n,Ras_n,Cas_n,We_n}; + + always@(sdram_control or cke_temp) + begin + case(sdram_control) + Mode_Reg_Set: sdram_command<="Mode_Reg_Set"; + Auto_Refresh: sdram_command<="Auto_Refresh"; + Row_Active: sdram_command<="Row_Active"; + Pre_Charge: sdram_command<="Pre_Charge"; + Burst_Stop: sdram_command<="Burst_Stop"; + Dsel: sdram_command<="Dsel"; + + Write: if(cke_temp==1) + sdram_command<="Write"; + else + sdram_command<="Write_suspend"; + + Read: if(cke_temp==1) + sdram_command<="Read"; + else + sdram_command<="Read_suspend"; + + Nop: if(cke_temp==1) + sdram_command<="Nop"; + else + sdram_command<="Self_refresh"; + + default: sdram_command<="Power_down"; + endcase + end + + //***************************************************** + + initial + begin + //test_file=$fopen("test_file.txt"); + end + + initial + begin + Dq_reg = {data_bits{1'bz}}; + {Data_in_enable, Data_out_enable} = 0; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b0000; + {WR_chk[0], WR_chk[1], WR_chk[2], WR_chk[3]} = 0; + {WR_counter[0], WR_counter[1], WR_counter[2], WR_counter[3]} = 0; + {RW_interrupt_read[0], RW_interrupt_read[1], RW_interrupt_read[2], RW_interrupt_read[3]} = 0; + {RW_interrupt_write[0], RW_interrupt_write[1], RW_interrupt_write[2], RW_interrupt_write[3]} = 0; + {MRD_chk, RC_chk, RRD_chk} = 0; + {RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3} = 0; + {RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3} = 0; + {RP_chk0, RP_chk1, RP_chk2, RP_chk3} = 0; + $timeformat (-9, 0, " ns", 12); + //$readmemh("bank0.txt", Bank0); + //$readmemh("bank1.txt", Bank1); + //$readmemh("bank2.txt", Bank2); + //$readmemh("bank3.txt", Bank3); +/* + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + Bank0[dd]=dd[data_bits - 1 : 0]; + Bank1[dd]=dd[data_bits - 1 : 0]+1; + Bank2[dd]=dd[data_bits - 1 : 0]+2; + Bank3[dd]=dd[data_bits - 1 : 0]+3; + end +*/ + initial_sdram(0); + end + + task initial_sdram; + + input data_sign; + reg [3:0] data_sign; + + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + mem_d = {data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign}; + if(data_bits==16) + begin + Bank0[dd]=mem_d[15:0]; + Bank1[dd]=mem_d[15:0]; + Bank2[dd]=mem_d[15:0]; + Bank3[dd]=mem_d[15:0]; + end + else if(data_bits==32) + begin + Bank0[dd]=mem_d[31:0]; + Bank1[dd]=mem_d[31:0]; + Bank2[dd]=mem_d[31:0]; + Bank3[dd]=mem_d[31:0]; + end + end + + endtask + + // System clock generator + always + begin + @(posedge Clk) + begin + Sys_clk = CkeZ; + CkeZ = Cke; + end + @(negedge Clk) + begin + Sys_clk = 1'b0; + end + end + + always @ (posedge Sys_clk) begin + // Internal Commamd Pipelined + Command[0] = Command[1]; + Command[1] = Command[2]; + Command[2] = Command[3]; + Command[3] = `NOP; + + Col_addr[0] = Col_addr[1]; + Col_addr[1] = Col_addr[2]; + Col_addr[2] = Col_addr[3]; + Col_addr[3] = {col_bits{1'b0}}; + + Bank_addr[0] = Bank_addr[1]; + Bank_addr[1] = Bank_addr[2]; + Bank_addr[2] = Bank_addr[3]; + Bank_addr[3] = 2'b0; + + Bank_precharge[0] = Bank_precharge[1]; + Bank_precharge[1] = Bank_precharge[2]; + Bank_precharge[2] = Bank_precharge[3]; + Bank_precharge[3] = 2'b0; + + A10_precharge[0] = A10_precharge[1]; + A10_precharge[1] = A10_precharge[2]; + A10_precharge[2] = A10_precharge[3]; + A10_precharge[3] = 1'b0; + + // Dqm pipeline for Read + Dqm_reg0 = Dqm_reg1; + Dqm_reg1 = Dqm; + + // Read or Write with Auto Precharge Counter + if (Auto_precharge[0] == 1'b1) begin + Count_precharge[0] = Count_precharge[0] + 1; + end + if (Auto_precharge[1] == 1'b1) begin + Count_precharge[1] = Count_precharge[1] + 1; + end + if (Auto_precharge[2] == 1'b1) begin + Count_precharge[2] = Count_precharge[2] + 1; + end + if (Auto_precharge[3] == 1'b1) begin + Count_precharge[3] = Count_precharge[3] + 1; + end + + // tMRD Counter + MRD_chk = MRD_chk + 1; + + // tWR Counter for Write + WR_counter[0] = WR_counter[0] + 1; + WR_counter[1] = WR_counter[1] + 1; + WR_counter[2] = WR_counter[2] + 1; + WR_counter[3] = WR_counter[3] + 1; + + // Auto Refresh + if (Aref_enable == 1'b1) begin + if (Debug) $display ("at time %t AREF : Auto Refresh", $time); + // Auto Refresh to Auto Refresh + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Auto Refresh", $time); + end + // Precharge to Auto Refresh + if (($time - RP_chk0 < tRP || $time - RP_chk1 < tRP || $time - RP_chk2 < tRP || $time - RP_chk3 < tRP)&&Debug) begin + $display ("at time %t ERROR: tRP violation during Auto Refresh", $time); + end + // Precharge to Refresh + if (Pc_b0 == 1'b0 || Pc_b1 == 1'b0 || Pc_b2 == 1'b0 || Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: All banks must be Precharge before Auto Refresh", $time); + end + // Record Current tRC time + RC_chk = $time; + end + + // Load Mode Register + if (Mode_reg_enable == 1'b1) begin + // Decode CAS Latency, Burst Length, Burst Type, and Write Burst Mode + if (Pc_b0 == 1'b1 && Pc_b1 == 1'b1 && Pc_b2 == 1'b1 && Pc_b3 == 1'b1) begin + Mode_reg = Addr; + if (Debug) begin + $display ("at time %t LMR : Load Mode Register", $time); + // CAS Latency + if (Addr[6 : 4] == 3'b010) + $display (" CAS Latency = 2"); + else if (Addr[6 : 4] == 3'b011) + $display (" CAS Latency = 3"); + else + $display (" CAS Latency = Reserved"); + // Burst Length + if (Addr[2 : 0] == 3'b000) + $display (" Burst Length = 1"); + else if (Addr[2 : 0] == 3'b001) + $display (" Burst Length = 2"); + else if (Addr[2 : 0] == 3'b010) + $display (" Burst Length = 4"); + else if (Addr[2 : 0] == 3'b011) + $display (" Burst Length = 8"); + else if (Addr[3 : 0] == 4'b0111) + $display (" Burst Length = Full"); + else + $display (" Burst Length = Reserved"); + // Burst Type + if (Addr[3] == 1'b0) + $display (" Burst Type = Sequential"); + else if (Addr[3] == 1'b1) + $display (" Burst Type = Interleaved"); + else + $display (" Burst Type = Reserved"); + // Write Burst Mode + if (Addr[9] == 1'b0) + $display (" Write Burst Mode = Programmed Burst Length"); + else if (Addr[9] == 1'b1) + $display (" Write Burst Mode = Single Location Access"); + else + $display (" Write Burst Mode = Reserved"); + end + end else begin + $display ("at time %t ERROR: all banks must be Precharge before Load Mode Register", $time); + end + // REF to LMR + if ($time - RC_chk < tRC) begin + $display ("at time %t ERROR: tRC violation during Load Mode Register", $time); + end + // LMR to LMR + if (MRD_chk < tMRD) begin + $display ("at time %t ERROR: tMRD violation during Load Mode Register", $time); + end + MRD_chk = 0; + end + + // Active Block (Latch Bank Address and Row Address) + if (Active_enable == 1'b1) begin + if (Ba == 2'b00 && Pc_b0 == 1'b1) begin + {Act_b0, Pc_b0} = 2'b10; + B0_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk0 = $time; + RAS_chk0 = $time; + if (Debug) $display ("at time %t ACT : Bank = 0 Row = %d", $time, Addr); + // Precharge to Activate Bank 0 + if ($time - RP_chk0 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 0", $time); + end + end else if (Ba == 2'b01 && Pc_b1 == 1'b1) begin + {Act_b1, Pc_b1} = 2'b10; + B1_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk1 = $time; + RAS_chk1 = $time; + if (Debug) $display ("at time %t ACT : Bank = 1 Row = %d", $time, Addr); + // Precharge to Activate Bank 1 + if ($time - RP_chk1 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 1", $time); + end + end else if (Ba == 2'b10 && Pc_b2 == 1'b1) begin + {Act_b2, Pc_b2} = 2'b10; + B2_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk2 = $time; + RAS_chk2 = $time; + if (Debug) $display ("at time %t ACT : Bank = 2 Row = %d", $time, Addr); + // Precharge to Activate Bank 2 + if ($time - RP_chk2 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 2", $time); + end + end else if (Ba == 2'b11 && Pc_b3 == 1'b1) begin + {Act_b3, Pc_b3} = 2'b10; + B3_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk3 = $time; + RAS_chk3 = $time; + if (Debug) $display ("at time %t ACT : Bank = 3 Row = %d", $time, Addr); + // Precharge to Activate Bank 3 + if ($time - RP_chk3 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 3", $time); + end + end else if (Ba == 2'b00 && Pc_b0 == 1'b0) begin + $display ("at time %t ERROR: Bank 0 is not Precharged.", $time); + end else if (Ba == 2'b01 && Pc_b1 == 1'b0) begin + $display ("at time %t ERROR: Bank 1 is not Precharged.", $time); + end else if (Ba == 2'b10 && Pc_b2 == 1'b0) begin + $display ("at time %t ERROR: Bank 2 is not Precharged.", $time); + end else if (Ba == 2'b11 && Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: Bank 3 is not Precharged.", $time); + end + // Active Bank A to Active Bank B + if ((Previous_bank != Ba) && ($time - RRD_chk < tRRD)) begin + $display ("at time %t ERROR: tRRD violation during Activate bank = %d", $time, Ba); + end + // Load Mode Register to Active + if (MRD_chk < tMRD ) begin + $display ("at time %t ERROR: tMRD violation during Activate bank = %d", $time, Ba); + end + // Auto Refresh to Activate + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Activate bank = %d", $time, Ba); + end + // Record variables for checking violation + RRD_chk = $time; + Previous_bank = Ba; + end + + // Precharge Block + if (Prech_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b1111; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + RP_chk0 = $time; + RP_chk1 = $time; + RP_chk2 = $time; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = ALL",$time); + // Activate to Precharge all banks + if (($time - RAS_chk0 < tRAS) || ($time - RAS_chk1 < tRAS) || + ($time - RAS_chk2 < tRAS) || ($time - RAS_chk3 < tRAS)) begin + $display ("at time %t ERROR: tRAS violation during Precharge all bank", $time); + end + // tWR violation check for write + if (($time - WR_chk[0] < tWRp) || ($time - WR_chk[1] < tWRp) || + ($time - WR_chk[2] < tWRp) || ($time - WR_chk[3] < tWRp)) begin + $display ("at time %t ERROR: tWR violation during Precharge all bank", $time); + end + end else if (Addr[10] == 1'b0) begin + if (Ba == 2'b00) begin + {Pc_b0, Act_b0} = 2'b10; + RP_chk0 = $time; + if (Debug) $display ("at time %t PRE : Bank = 0",$time); + // Activate to Precharge Bank 0 + if ($time - RAS_chk0 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 0", $time); + end + end else if (Ba == 2'b01) begin + {Pc_b1, Act_b1} = 2'b10; + RP_chk1 = $time; + if (Debug) $display ("at time %t PRE : Bank = 1",$time); + // Activate to Precharge Bank 1 + if ($time - RAS_chk1 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 1", $time); + end + end else if (Ba == 2'b10) begin + {Pc_b2, Act_b2} = 2'b10; + RP_chk2 = $time; + if (Debug) $display ("at time %t PRE : Bank = 2",$time); + // Activate to Precharge Bank 2 + if ($time - RAS_chk2 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 2", $time); + end + end else if (Ba == 2'b11) begin + {Pc_b3, Act_b3} = 2'b10; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = 3",$time); + // Activate to Precharge Bank 3 + if ($time - RAS_chk3 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 3", $time); + end + end + // tWR violation check for write + if ($time - WR_chk[Ba] < tWRp) begin + $display ("at time %t ERROR: tWR violation during Precharge bank %d", $time, Ba); + end + end + // Terminate a Write Immediately (if same bank or all banks) + if (Data_in_enable == 1'b1 && (Bank == Ba || Addr[10] == 1'b1)) begin + Data_in_enable = 1'b0; + end + // Precharge Command Pipeline for Read + if (Cas_latency_3 == 1'b1) begin + Command[2] = `PRECH; + Bank_precharge[2] = Ba; + A10_precharge[2] = Addr[10]; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `PRECH; + Bank_precharge[1] = Ba; + A10_precharge[1] = Addr[10]; + end + end + + // Burst terminate + if (Burst_term == 1'b1) begin + // Terminate a Write Immediately + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + // Terminate a Read Depend on CAS Latency + if (Cas_latency_3 == 1'b1) begin + Command[2] = `BST; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `BST; + end + if (Debug) $display ("at time %t BST : Burst Terminate",$time); + end + + // Read, Write, Column Latch + if (Read_enable == 1'b1 || Write_enable == 1'b1) begin + // Check to see if bank is open (ACT) + if ((Ba == 2'b00 && Pc_b0 == 1'b1) || (Ba == 2'b01 && Pc_b1 == 1'b1) || + (Ba == 2'b10 && Pc_b2 == 1'b1) || (Ba == 2'b11 && Pc_b3 == 1'b1)) begin + $display("at time %t ERROR: Cannot Read or Write - Bank %d is not Activated", $time, Ba); + end + // Activate to Read or Write + if ((Ba == 2'b00) && ($time - RCD_chk0 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 0", $time); + if ((Ba == 2'b01) && ($time - RCD_chk1 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 1", $time); + if ((Ba == 2'b10) && ($time - RCD_chk2 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 2", $time); + if ((Ba == 2'b11) && ($time - RCD_chk3 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 3", $time); + // Read Command + if (Read_enable == 1'b1) begin + // CAS Latency pipeline + if (Cas_latency_3 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[2] = `READ_A; + end else begin + Command[2] = `READ; + end + Col_addr[2] = Addr; + Bank_addr[2] = Ba; + end else if (Cas_latency_2 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[1] = `READ_A; + end else begin + Command[1] = `READ; + end + Col_addr[1] = Addr; + Bank_addr[1] = Ba; + end + + // Read interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write Command + end else if (Write_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[0] = `WRITE_A; + end else begin + Command[0] = `WRITE; + end + Col_addr[0] = Addr; + Bank_addr[0] = Ba; + + // Write interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write interrupt Read (terminate Read immediately) + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + // Interrupting a Write with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Write_precharge[Bank] == 1'b1) begin + RW_interrupt_write[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Write Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Interrupting a Read with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Read_precharge[Bank] == 1'b1) begin + RW_interrupt_read[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Read Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Read or Write with Auto Precharge + if (Addr[10] == 1'b1) begin + Auto_precharge[Ba] = 1'b1; + Count_precharge[Ba] = 0; + if (Read_enable == 1'b1) begin + Read_precharge[Ba] = 1'b1; + end else if (Write_enable == 1'b1) begin + Write_precharge[Ba] = 1'b1; + end + end + end + + // Read with Auto Precharge Calculation + // The device start internal precharge: + // 1. CAS Latency - 1 cycles before last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + if ((Auto_precharge[0] == 1'b1) && (Read_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + ((Burst_length_1 == 1'b1 && Count_precharge[0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge[0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[0] >= 8))) || + (RW_interrupt_read[0] == 1'b1)) begin // Case 3 + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + Auto_precharge[0] = 1'b0; + Read_precharge[0] = 1'b0; + RW_interrupt_read[0] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + if ((Auto_precharge[1] == 1'b1) && (Read_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[1] >= 8))) || + (RW_interrupt_read[1] == 1'b1)) begin + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + Auto_precharge[1] = 1'b0; + Read_precharge[1] = 1'b0; + RW_interrupt_read[1] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + if ((Auto_precharge[2] == 1'b1) && (Read_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[2] >= 8))) || + (RW_interrupt_read[2] == 1'b1)) begin + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + Auto_precharge[2] = 1'b0; + Read_precharge[2] = 1'b0; + RW_interrupt_read[2] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + if ((Auto_precharge[3] == 1'b1) && (Read_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[3] >= 8))) || + (RW_interrupt_read[3] == 1'b1)) begin + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + Auto_precharge[3] = 1'b0; + Read_precharge[3] = 1'b0; + RW_interrupt_read[3] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + + // Internal Precharge or Bst + if (Command[0] == `PRECH) begin // Precharge terminate a read with same bank or all banks + if (Bank_precharge[0] == Bank || A10_precharge[0] == 1'b1) begin + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + end else if (Command[0] == `BST) begin // BST terminate a read to current bank + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + if (Data_out_enable == 1'b0) begin + Dq_reg <= #tOH {data_bits{1'bz}}; + end + + // Detect Read or Write command + if (Command[0] == `READ || Command[0] == `READ_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b0; + Data_out_enable = 1'b1; + end else if (Command[0] == `WRITE || Command[0] == `WRITE_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b1; + Data_out_enable = 1'b0; + end + + // DQ buffer (Driver/Receiver) + if (Data_in_enable == 1'b1) begin // Writing Data to Memory + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + // Dqm operation + if (Dqm[0] == 1'b0) Dq_dqm [ 7 : 0] = Dq [ 7 : 0]; + if (Dqm[1] == 1'b0) Dq_dqm [15 : 8] = Dq [15 : 8]; + //if (Dqm[2] == 1'b0) Dq_dqm [23 : 16] = Dq [23 : 16]; + // if (Dqm[3] == 1'b0) Dq_dqm [31 : 24] = Dq [31 : 24]; + // Write to memory + if (Bank == 2'b00) Bank0 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b01) Bank1 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b10) Bank2 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11) Bank3 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11 && Row==10'h3 && Col[7:4]==4'h4) + $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + //$fdisplay(test_file,"bank:%h row:%h col:%h write:%h",Bank,Row,Col,Dq_dqm); + // Output result + if (Dqm == 4'b1111) begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_dqm, Dqm); + // Record tWR time and reset counter + WR_chk [Bank] = $time; + WR_counter [Bank] = 0; + end + // Advance burst counter subroutine + #tHZ Burst; + end else if (Data_out_enable == 1'b1) begin // Reading Data from Memory + //$display("%h , %h, %h",Bank0,Row,Col); + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + + // Dqm operation + if (Dqm_reg0[0] == 1'b1) Dq_dqm [ 7 : 0] = 8'bz; + if (Dqm_reg0[1] == 1'b1) Dq_dqm [15 : 8] = 8'bz; + if (Dqm_reg0[2] == 1'b1) Dq_dqm [23 : 16] = 8'bz; + if (Dqm_reg0[3] == 1'b1) Dq_dqm [31 : 24] = 8'bz; + // Display result + Dq_reg [data_bits - 1 : 0] = #tAC Dq_dqm [data_bits - 1 : 0]; + if (Dqm_reg0 == 4'b1111) begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_reg, Dqm_reg0); + end + // Advance burst counter subroutine + Burst; + end + end + + // Write with Auto Precharge Calculation + // The device start internal precharge: + // 1. tWR Clock after last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + always @ (WR_counter[0]) begin + if ((Auto_precharge[0] == 1'b1) && (Write_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge [0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [0] >= 8))) || + (RW_interrupt_write[0] == 1'b1 && WR_counter[0] >= 2)) begin // Case 3 (stop count when interrupt) + Auto_precharge[0] = 1'b0; + Write_precharge[0] = 1'b0; + RW_interrupt_write[0] = 1'b0; + #tWRa; // Wait for tWR + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + end + always @ (WR_counter[1]) begin + if ((Auto_precharge[1] == 1'b1) && (Write_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [1] >= 8))) || + (RW_interrupt_write[1] == 1'b1 && WR_counter[1] >= 2)) begin + Auto_precharge[1] = 1'b0; + Write_precharge[1] = 1'b0; + RW_interrupt_write[1] = 1'b0; + #tWRa; // Wait for tWR + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + end + always @ (WR_counter[2]) begin + if ((Auto_precharge[2] == 1'b1) && (Write_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [2] >= 8))) || + (RW_interrupt_write[2] == 1'b1 && WR_counter[2] >= 2)) begin + Auto_precharge[2] = 1'b0; + Write_precharge[2] = 1'b0; + RW_interrupt_write[2] = 1'b0; + #tWRa; // Wait for tWR + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + end + always @ (WR_counter[3]) begin + if ((Auto_precharge[3] == 1'b1) && (Write_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [3] >= 8))) || + (RW_interrupt_write[3] == 1'b1 && WR_counter[3] >= 2)) begin + Auto_precharge[3] = 1'b0; + Write_precharge[3] = 1'b0; + RW_interrupt_write[3] = 1'b0; + #tWRa; // Wait for tWR + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + end + + task Burst; + begin + // Advance Burst Counter + Burst_counter = Burst_counter + 1; + + // Burst Type + if (Mode_reg[3] == 1'b0) begin // Sequential Burst + Col_temp = Col + 1; + end else if (Mode_reg[3] == 1'b1) begin // Interleaved Burst + Col_temp[2] = Burst_counter[2] ^ Col_brst[2]; + Col_temp[1] = Burst_counter[1] ^ Col_brst[1]; + Col_temp[0] = Burst_counter[0] ^ Col_brst[0]; + end + + // Burst Length + if (Burst_length_2) begin // Burst Length = 2 + Col [0] = Col_temp [0]; + end else if (Burst_length_4) begin // Burst Length = 4 + Col [1 : 0] = Col_temp [1 : 0]; + end else if (Burst_length_8) begin // Burst Length = 8 + Col [2 : 0] = Col_temp [2 : 0]; + end else begin // Burst Length = FULL + Col = Col_temp; + end + + // Burst Read Single Write + if (Write_burst_mode == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Data Counter + if (Burst_length_1 == 1'b1) begin + if (Burst_counter >= 1) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_2 == 1'b1) begin + if (Burst_counter >= 2) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_4 == 1'b1) begin + if (Burst_counter >= 4) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_8 == 1'b1) begin + if (Burst_counter >= 8) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end + end + endtask + + //**********************将SDRAM内的数据直接输出到外部文件*******************************// + +/* + integer sdram_data,ind; + + + always@(sdram_r) + begin + sdram_data=$fopen("sdram_data.txt"); + $display("Sdram dampout begin ",sdram_data); +// $fdisplay(sdram_data,"Bank0："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank0[ind]); +// $fdisplay(sdram_data,"Bank1："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank1[ind]); +// $fdisplay(sdram_data,"Bank2："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank2[ind]); +// $fdisplay(sdram_data,"Bank3："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank3[ind]); + + $fclose("sdram_data.txt"); + //->compare; + end +*/ + integer sdram_data,sdram_mem; + reg [23:0] aa,cc; + reg [18:0] bb,ee; + + always@(sdram_r) + begin + $display("Sdram dampout begin ",$realtime); + sdram_data=$fopen("sdram_data.txt"); + for(aa=0;aa<4*(mem_sizes+1);aa=aa+1) + begin + bb=aa[18:0]; + if(aa<=mem_sizes) + $fdisplay(sdram_data,"%0d %0h",aa,Bank0[bb]); + else if(aa<=2*mem_sizes+1) + $fdisplay(sdram_data,"%0d %0h",aa,Bank1[bb]); + else if(aa<=3*mem_sizes+2) + $fdisplay(sdram_data,"%0d %0h",aa,Bank2[bb]); + else + $fdisplay(sdram_data,"%0d %0h",aa,Bank3[bb]); + end + $fclose("sdram_data.txt"); + + sdram_mem=$fopen("sdram_mem.txt"); + for(cc=0;cc<4*(mem_sizes+1);cc=cc+1) + begin + ee=cc[18:0]; + if(cc<=mem_sizes) + $fdisplay(sdram_mem,"%0h",Bank0[ee]); + else if(cc<=2*mem_sizes+1) + $fdisplay(sdram_mem,"%0h",Bank1[ee]); + else if(cc<=3*mem_sizes+2) + $fdisplay(sdram_mem,"%0h",Bank2[ee]); + else + $fdisplay(sdram_mem,"%0h",Bank3[ee]); + end + $fclose("sdram_mem.txt"); + + end + + + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// specify +// specparam +//// tAH = 0.8, // Addr, Ba Hold Time +//// tAS = 1.5, // Addr, Ba Setup Time +//// tCH = 2.5, // Clock High-Level Width +//// tCL = 2.5, // Clock Low-Level Width +////// tCK = 10.0, // Clock Cycle Time 100mhz +////// tCK = 7.5, // Clock Cycle Time 133mhz +//// tCK = 7, // Clock Cycle Time 143mhz +//// tDH = 0.8, // Data-in Hold Time +//// tDS = 1.5, // Data-in Setup Time +//// tCKH = 0.8, // CKE Hold Time +//// tCKS = 1.5, // CKE Setup Time +//// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +//// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// tAH = 1, // Addr, Ba Hold Time +// tAS = 1.5, // Addr, Ba Setup Time +// tCH = 1, // Clock High-Level Width +// tCL = 3, // Clock Low-Level Width +//// tCK = 10.0, // Clock Cycle Time 100mhz +//// tCK = 7.5, // Clock Cycle Time 133mhz +// tCK = 7, // Clock Cycle Time 143mhz +// tDH = 1, // Data-in Hold Time +// tDS = 2, // Data-in Setup Time +// tCKH = 1, // CKE Hold Time +// tCKS = 2, // CKE Setup Time +// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// $width (posedge Clk, tCH); +// $width (negedge Clk, tCL); +// $period (negedge Clk, tCK); +// $period (posedge Clk, tCK); +// $setuphold(posedge Clk, Cke, tCKS, tCKH); +// $setuphold(posedge Clk, Cs_n, tCMS, tCMH); +// $setuphold(posedge Clk, Cas_n, tCMS, tCMH); +// $setuphold(posedge Clk, Ras_n, tCMS, tCMH); +// $setuphold(posedge Clk, We_n, tCMS, tCMH); +// $setuphold(posedge Clk, Addr, tAS, tAH); +// $setuphold(posedge Clk, Ba, tAS, tAH); +// $setuphold(posedge Clk, Dqm, tCMS, tCMH); +// $setuphold(posedge Dq_chk, Dq, tDS, tDH); +// endspecify + +endmodule + diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_ctrl/tb_sdram_ctrl.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_ctrl/tb_sdram_ctrl.v new file mode 100644 index 0000000..5a1b6bf --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_ctrl/tb_sdram_ctrl.v @@ -0,0 +1,172 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : tb_sdram_ctrl +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鎺у埗妯″潡浠跨湡 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module tb_sdram_ctrl(); + +//********************************************************************// +//****************** Internal Signal and Defparam ********************// +//********************************************************************// + +//wire define +//clk_gen +wire clk_50m ; //PLL杈撳嚭50M鏃堕挓 +wire clk_100m ; //PLL杈撳嚭100M鏃堕挓 +wire clk_100m_shift ; //PLL杈撳嚭100M鏃堕挓,鐩镐綅鍋忕Щ-75deg +wire locked ; //PLL鏃堕挓閿佸畾淇″彿 +wire rst_n ; //澶嶄綅淇″彿,浣庢湁鏁 +//sdram +wire sdram_cke ; //SDRAM鏃堕挓浣胯兘淇″彿 +wire sdram_cs_n ; //SDRAM鐗囬変俊鍙 +wire sdram_ras_n ; //SDRAM琛岄夐氫俊鍙 +wire sdram_cas_n ; //SDRAM鍒楅夐淇″彿 +wire sdram_we_n ; //SDRAM鍐欎娇鑳戒俊鍙 +wire [1:0] sdram_ba ; //SDRAM L-Bank鍦板潃 +wire [12:0] sdram_addr ; //SDRAM鍦板潃鎬荤嚎 +wire [15:0] sdram_dq ; //SDRAM鏁版嵁鎬荤嚎 +//sdram_ctrl +wire init_end ; //鍒濆鍖栧畬鎴愪俊鍙 +wire sdram_wr_ack ; //鏁版嵁鍐欓樁娈靛啓鍝嶅簲 +wire sdram_rd_ack ; //鏁版嵁璇婚樁娈靛搷搴 + +//reg define +reg sys_clk ; //绯荤粺鏃堕挓 +reg sys_rst_n ; //澶嶄綅淇″彿 +reg wr_en ; //鍐欎娇鑳 +reg [15:0] wr_data_in ; //鍐欐暟鎹 +reg rd_en ; //璇讳娇鑳 + +//defparam +//閲嶅畾涔変豢鐪熸ā鍨嬩腑鐨勭浉鍏冲弬鏁 +defparam sdram_model_plus_inst.addr_bits = 13; //鍦板潃浣嶅 +defparam sdram_model_plus_inst.data_bits = 16; //鏁版嵁浣嶅 +defparam sdram_model_plus_inst.col_bits = 9; //鍒楀湴鍧浣嶅 +defparam sdram_model_plus_inst.mem_sizes = 2*1024*1024; //L-Bank瀹归噺 + +//閲嶅畾涔夎嚜鍔ㄥ埛鏂版ā鍧楄嚜鍔ㄥ埛鏂伴棿闅旀椂闂磋鏁版渶澶у +defparam sdram_ctrl_inst.sdram_a_ref_inst.CNT_REF_MAX = 39; + +//********************************************************************// +//**************************** Clk And Rst ***************************// +//********************************************************************// + +//鏃堕挓銆佸浣嶄俊鍙 +initial + begin + sys_clk = 1'b1 ; + sys_rst_n <= 1'b0 ; + #200 + sys_rst_n <= 1'b1 ; + end + +always #10 sys_clk = ~sys_clk; + +//rst_n:澶嶄綅淇″彿 +assign rst_n = sys_rst_n & locked; + +//wr_en锛氬啓鏁版嵁浣胯兘 +always@(posedge clk_100m or negedge rst_n) + if(rst_n == 1'b0) + wr_en <= 1'b1; + else if(wr_data_in == 10'd10) + wr_en <= 1'b0; + else + wr_en <= wr_en; + +//wr_data_in:鍐欐暟鎹 +always@(posedge clk_100m or negedge rst_n) + if(rst_n == 1'b0) + wr_data_in <= 16'd0; + else if(wr_data_in == 16'd10) + wr_data_in <= 16'd0; + else if(sdram_wr_ack == 1'b1) + wr_data_in <= wr_data_in + 1'b1; + else + wr_data_in <= wr_data_in; + +//rd_en:璇绘暟鎹娇鑳 +always@(posedge clk_100m or negedge rst_n) + if(rst_n == 1'b0) + rd_en <= 1'b0; + else if(wr_en == 1'b0) + rd_en <= 1'b1; + else + rd_en <= rd_en; + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// + +//------------- clk_gen_inst ------------- +clk_gen clk_gen_inst ( + .inclk0 (sys_clk ), + .areset (~sys_rst_n ), + .c0 (clk_50m ), + .c1 (clk_100m ), + .c2 (clk_100m_shift ), + + .locked (locked ) +); + +//------------- sdram_ctrl_inst ------------- +sdram_ctrl sdram_ctrl_inst( + + .sys_clk (clk_100m ), //绯荤粺鏃堕挓 + .sys_rst_n (rst_n ), //澶嶄綅淇″彿锛屼綆鐢靛钩鏈夋晥 +//SDRAM 鎺у埗鍣ㄥ啓绔彛 + .sdram_wr_req (wr_en ), //鍐橲DRAM璇锋眰淇″彿 + .sdram_wr_addr (24'h000_000 ), //SDRAM鍐欐搷浣滅殑鍦板潃 + .wr_burst_len (10'd10 ), //鍐檚dram鏃舵暟鎹獊鍙戦暱搴 + .sdram_data_in (wr_data_in ), //鍐欏叆SDRAM鐨勬暟鎹 + .sdram_wr_ack (sdram_wr_ack ), //鍐橲DRAM鍝嶅簲淇″彿 +//SDRAM 鎺у埗鍣ㄨ绔彛 + .sdram_rd_req (rd_en ), //璇籗DRAM璇锋眰淇″彿 + .sdram_rd_addr (24'h000_000 ), //SDRAM鍐欐搷浣滅殑鍦板潃 + .rd_burst_len (10'd10 ), //璇籹dram鏃舵暟鎹獊鍙戦暱搴 + .sdram_data_out (sdram_data_out ), //浠嶴DRAM璇诲嚭鐨勬暟鎹 + .init_end (init_end ), //SDRAM 鍒濆鍖栧畬鎴愭爣蹇 + .sdram_rd_ack (sdram_rd_ack ), //璇籗DRAM鍝嶅簲淇″彿 +//FPGA涓嶴DRAM纭欢鎺ュ彛 + .sdram_cke (sdram_cke ), // SDRAM 鏃堕挓鏈夋晥淇″彿 + .sdram_cs_n (sdram_cs_n ), // SDRAM 鐗囬変俊鍙 + .sdram_ras_n (sdram_ras_n ), // SDRAM 琛屽湴鍧閫夐氳剦鍐 + .sdram_cas_n (sdram_cas_n ), // SDRAM 鍒楀湴鍧閫夐氳剦鍐 + .sdram_we_n (sdram_we_n ), // SDRAM 鍐欏厑璁镐綅 + .sdram_ba (sdram_ba ), // SDRAM L-Bank鍦板潃绾 + .sdram_addr (sdram_addr ), // SDRAM 鍦板潃鎬荤嚎 + .sdram_dq (sdram_dq ) // SDRAM 鏁版嵁鎬荤嚎 + +); + +//-------------sdram_model_plus_inst------------- +sdram_model_plus sdram_model_plus_inst( + .Dq (sdram_dq ), + .Addr (sdram_addr ), + .Ba (sdram_ba ), + .Clk (clk_100m_shift ), + .Cke (sdram_cke ), + .Cs_n (sdram_cs_n ), + .Ras_n (sdram_ras_n ), + .Cas_n (sdram_cas_n ), + .We_n (sdram_we_n ), + .Dqm (2'b0 ), + .Debug (1'b1 ) + +); + +endmodule \ No newline at end of file diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_init/sdram_model_plus.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_init/sdram_model_plus.v new file mode 100644 index 0000000..4e51287 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_init/sdram_model_plus.v @@ -0,0 +1,1131 @@ +/*************************************************************************************** +作者： 李晟 +2003-08-27 V0.1 李晟 + + 添加内存模块倒空功能，在外部需要创建事件：sdram_r ,本SDRAM的内容将会按Bank 顺序damp out 至文件 + sdram_data.txt 中 +×××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××*/ +//2004-03-04 陈乃奎 修改原程序中将BANK的数据转存入TXT文件的格式 +//2004-03-16 陈乃奎 修改SDRAM 的初始化数据 +//2004/04/06 陈乃奎 将SDRAM的操作命令以字符形式表示，以便用MODELSIM监视 +//2004/04/19 陈乃奎 修改参数 parameter tAC = 8; +//2010/09/17 罗瑶 修改sdram的大小，数据位宽，dqm宽度; +/**************************************************************************************** +* +* File Name: sdram_model.V +* Version: 0.0f +* Date: July 8th, 1999 +* Model: BUS Functional +* Simulator: Model Technology (PC version 5.2e PE) +* +* Dependencies: None +* +* Author: Son P. Huynh +* Email: sphuynh@micron.com +* Phone: (208) 368-3825 +* Company: Micron Technology, Inc. +* Model: sdram_model (1Meg x 16 x 4 Banks) +* +* Description: 64Mb SDRAM Verilog model +* +* Limitation: - Doesn't check for 4096 cycle refresh +* +* Note: - Set simulator resolution to "ps" accuracy +* - Set Debug = 0 to disable $display messages +* +* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY +* WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY +* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR +* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT. +* +* Copyright ?1998 Micron Semiconductor Products, Inc. +* All rights researved +* +* Rev Author Phone Date Changes +* ---- ---------------------------- ---------- --------------------------------------- +* 0.0f Son Huynh 208-368-3825 07/08/1999 - Fix tWR = 1 Clk + 7.5 ns (Auto) +* Micron Technology Inc. - Fix tWR = 15 ns (Manual) +* - Fix tRP (Autoprecharge to AutoRefresh) +* +* 0.0a Son Huynh 208-368-3825 05/13/1998 - First Release (from 64Mb rev 0.0e) +* Micron Technology Inc. +****************************************************************************************/ + +`timescale 1ns / 100ps + +module sdram_model_plus (Dq, Addr, Ba, Clk, Cke, Cs_n, Ras_n, Cas_n, We_n, Dqm,Debug); + + parameter addr_bits = 11; + parameter data_bits = 32; + parameter col_bits = 8; + parameter mem_sizes = 1048576*2-1;//1 Meg + + inout [data_bits - 1 : 0] Dq; + input [addr_bits - 1 : 0] Addr; + input [1 : 0] Ba; + input Clk; + input Cke; + input Cs_n; + input Ras_n; + input Cas_n; + input We_n; + input [3 : 0] Dqm; //高低各8bit + //added by xzli + input Debug; + + reg [data_bits - 1 : 0] Bank0 [0 : mem_sizes];//存储器类型数据 + reg [data_bits - 1 : 0] Bank1 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank2 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank3 [0 : mem_sizes]; + + reg [1 : 0] Bank_addr [0 : 3]; // Bank Address Pipeline + reg [col_bits - 1 : 0] Col_addr [0 : 3]; // Column Address Pipeline + reg [3 : 0] Command [0 : 3]; // Command Operation Pipeline + reg [3 : 0] Dqm_reg0, Dqm_reg1; // DQM Operation Pipeline + reg [addr_bits - 1 : 0] B0_row_addr, B1_row_addr, B2_row_addr, B3_row_addr; + + reg [addr_bits - 1 : 0] Mode_reg; + reg [data_bits - 1 : 0] Dq_reg, Dq_dqm; + reg [col_bits - 1 : 0] Col_temp, Burst_counter; + + reg Act_b0, Act_b1, Act_b2, Act_b3; // Bank Activate + reg Pc_b0, Pc_b1, Pc_b2, Pc_b3; // Bank Precharge + + reg [1 : 0] Bank_precharge [0 : 3]; // Precharge Command + reg A10_precharge [0 : 3]; // Addr[10] = 1 (All banks) + reg Auto_precharge [0 : 3]; // RW AutoPrecharge (Bank) + reg Read_precharge [0 : 3]; // R AutoPrecharge + reg Write_precharge [0 : 3]; // W AutoPrecharge + integer Count_precharge [0 : 3]; // RW AutoPrecharge (Counter) + reg RW_interrupt_read [0 : 3]; // RW Interrupt Read with Auto Precharge + reg RW_interrupt_write [0 : 3]; // RW Interrupt Write with Auto Precharge + + reg Data_in_enable; + reg Data_out_enable; + + reg [1 : 0] Bank, Previous_bank; + reg [addr_bits - 1 : 0] Row; + reg [col_bits - 1 : 0] Col, Col_brst; + + // Internal system clock + reg CkeZ, Sys_clk; + + reg [21:0] dd; + + // Commands Decode + wire Active_enable = ~Cs_n & ~Ras_n & Cas_n & We_n; + wire Aref_enable = ~Cs_n & ~Ras_n & ~Cas_n & We_n; + wire Burst_term = ~Cs_n & Ras_n & Cas_n & ~We_n; + wire Mode_reg_enable = ~Cs_n & ~Ras_n & ~Cas_n & ~We_n; + wire Prech_enable = ~Cs_n & ~Ras_n & Cas_n & ~We_n; + wire Read_enable = ~Cs_n & Ras_n & ~Cas_n & We_n; + wire Write_enable = ~Cs_n & Ras_n & ~Cas_n & ~We_n; + + // Burst Length Decode + wire Burst_length_1 = ~Mode_reg[2] & ~Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_2 = ~Mode_reg[2] & ~Mode_reg[1] & Mode_reg[0]; + wire Burst_length_4 = ~Mode_reg[2] & Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_8 = ~Mode_reg[2] & Mode_reg[1] & Mode_reg[0]; + + // CAS Latency Decode + wire Cas_latency_2 = ~Mode_reg[6] & Mode_reg[5] & ~Mode_reg[4]; + wire Cas_latency_3 = ~Mode_reg[6] & Mode_reg[5] & Mode_reg[4]; + + // Write Burst Mode + wire Write_burst_mode = Mode_reg[9]; + + wire Debug; // Debug messages : 1 = On; 0 = Off + wire Dq_chk = Sys_clk & Data_in_enable; // Check setup/hold time for DQ + + reg [31:0] mem_d; + + event sdram_r,sdram_w,compare; + + + + + assign Dq = Dq_reg; // DQ buffer + + // Commands Operation + `define ACT 0 + `define NOP 1 + `define READ 2 + `define READ_A 3 + `define WRITE 4 + `define WRITE_A 5 + `define PRECH 6 + `define A_REF 7 + `define BST 8 + `define LMR 9 + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// parameter tAC = 8; //test 6.5 +// parameter tHZ = 7.0; +// parameter tOH = 2.7; +// parameter tMRD = 2.0; // 2 Clk Cycles +// parameter tRAS = 44.0; +// parameter tRC = 66.0; +// parameter tRCD = 20.0; +// parameter tRP = 20.0; +// parameter tRRD = 15.0; +// parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) +// parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Parameters for -7 (PC143) and CAS Latency = 3 + parameter tAC = 6.5; //test 6.5 + parameter tHZ = 5.5; + parameter tOH = 2; + parameter tMRD = 2.0; // 2 Clk Cycles + parameter tRAS = 48.0; + parameter tRC = 70.0; + parameter tRCD = 20.0; + parameter tRP = 20.0; + parameter tRRD = 14.0; + parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) + parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Check variable + integer MRD_chk; + integer WR_counter [0 : 3]; + time WR_chk [0 : 3]; + time RC_chk, RRD_chk; + time RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3; + time RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3; + time RP_chk0, RP_chk1, RP_chk2, RP_chk3; + + integer test_file; + + //*****display the command of the sdram************************************** + + parameter Mode_Reg_Set =4'b0000; + parameter Auto_Refresh =4'b0001; + parameter Row_Active =4'b0011; + parameter Pre_Charge =4'b0010; + parameter PreCharge_All =4'b0010; + parameter Write =4'b0100; + parameter Write_Pre =4'b0100; + parameter Read =4'b0101; + parameter Read_Pre =4'b0101; + parameter Burst_Stop =4'b0110; + parameter Nop =4'b0111; + parameter Dsel =4'b1111; + + wire [3:0] sdram_control; + reg cke_temp; + reg [8*13:1] sdram_command; + + always@(posedge Clk) + cke_temp<=Cke; + + assign sdram_control={Cs_n,Ras_n,Cas_n,We_n}; + + always@(sdram_control or cke_temp) + begin + case(sdram_control) + Mode_Reg_Set: sdram_command<="Mode_Reg_Set"; + Auto_Refresh: sdram_command<="Auto_Refresh"; + Row_Active: sdram_command<="Row_Active"; + Pre_Charge: sdram_command<="Pre_Charge"; + Burst_Stop: sdram_command<="Burst_Stop"; + Dsel: sdram_command<="Dsel"; + + Write: if(cke_temp==1) + sdram_command<="Write"; + else + sdram_command<="Write_suspend"; + + Read: if(cke_temp==1) + sdram_command<="Read"; + else + sdram_command<="Read_suspend"; + + Nop: if(cke_temp==1) + sdram_command<="Nop"; + else + sdram_command<="Self_refresh"; + + default: sdram_command<="Power_down"; + endcase + end + + //***************************************************** + + initial + begin + //test_file=$fopen("test_file.txt"); + end + + initial + begin + Dq_reg = {data_bits{1'bz}}; + {Data_in_enable, Data_out_enable} = 0; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b0000; + {WR_chk[0], WR_chk[1], WR_chk[2], WR_chk[3]} = 0; + {WR_counter[0], WR_counter[1], WR_counter[2], WR_counter[3]} = 0; + {RW_interrupt_read[0], RW_interrupt_read[1], RW_interrupt_read[2], RW_interrupt_read[3]} = 0; + {RW_interrupt_write[0], RW_interrupt_write[1], RW_interrupt_write[2], RW_interrupt_write[3]} = 0; + {MRD_chk, RC_chk, RRD_chk} = 0; + {RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3} = 0; + {RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3} = 0; + {RP_chk0, RP_chk1, RP_chk2, RP_chk3} = 0; + $timeformat (-9, 0, " ns", 12); + //$readmemh("bank0.txt", Bank0); + //$readmemh("bank1.txt", Bank1); + //$readmemh("bank2.txt", Bank2); + //$readmemh("bank3.txt", Bank3); +/* + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + Bank0[dd]=dd[data_bits - 1 : 0]; + Bank1[dd]=dd[data_bits - 1 : 0]+1; + Bank2[dd]=dd[data_bits - 1 : 0]+2; + Bank3[dd]=dd[data_bits - 1 : 0]+3; + end +*/ + initial_sdram(0); + end + + task initial_sdram; + + input data_sign; + reg [3:0] data_sign; + + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + mem_d = {data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign}; + if(data_bits==16) + begin + Bank0[dd]=mem_d[15:0]; + Bank1[dd]=mem_d[15:0]; + Bank2[dd]=mem_d[15:0]; + Bank3[dd]=mem_d[15:0]; + end + else if(data_bits==32) + begin + Bank0[dd]=mem_d[31:0]; + Bank1[dd]=mem_d[31:0]; + Bank2[dd]=mem_d[31:0]; + Bank3[dd]=mem_d[31:0]; + end + end + + endtask + + // System clock generator + always + begin + @(posedge Clk) + begin + Sys_clk = CkeZ; + CkeZ = Cke; + end + @(negedge Clk) + begin + Sys_clk = 1'b0; + end + end + + always @ (posedge Sys_clk) begin + // Internal Commamd Pipelined + Command[0] = Command[1]; + Command[1] = Command[2]; + Command[2] = Command[3]; + Command[3] = `NOP; + + Col_addr[0] = Col_addr[1]; + Col_addr[1] = Col_addr[2]; + Col_addr[2] = Col_addr[3]; + Col_addr[3] = {col_bits{1'b0}}; + + Bank_addr[0] = Bank_addr[1]; + Bank_addr[1] = Bank_addr[2]; + Bank_addr[2] = Bank_addr[3]; + Bank_addr[3] = 2'b0; + + Bank_precharge[0] = Bank_precharge[1]; + Bank_precharge[1] = Bank_precharge[2]; + Bank_precharge[2] = Bank_precharge[3]; + Bank_precharge[3] = 2'b0; + + A10_precharge[0] = A10_precharge[1]; + A10_precharge[1] = A10_precharge[2]; + A10_precharge[2] = A10_precharge[3]; + A10_precharge[3] = 1'b0; + + // Dqm pipeline for Read + Dqm_reg0 = Dqm_reg1; + Dqm_reg1 = Dqm; + + // Read or Write with Auto Precharge Counter + if (Auto_precharge[0] == 1'b1) begin + Count_precharge[0] = Count_precharge[0] + 1; + end + if (Auto_precharge[1] == 1'b1) begin + Count_precharge[1] = Count_precharge[1] + 1; + end + if (Auto_precharge[2] == 1'b1) begin + Count_precharge[2] = Count_precharge[2] + 1; + end + if (Auto_precharge[3] == 1'b1) begin + Count_precharge[3] = Count_precharge[3] + 1; + end + + // tMRD Counter + MRD_chk = MRD_chk + 1; + + // tWR Counter for Write + WR_counter[0] = WR_counter[0] + 1; + WR_counter[1] = WR_counter[1] + 1; + WR_counter[2] = WR_counter[2] + 1; + WR_counter[3] = WR_counter[3] + 1; + + // Auto Refresh + if (Aref_enable == 1'b1) begin + if (Debug) $display ("at time %t AREF : Auto Refresh", $time); + // Auto Refresh to Auto Refresh + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Auto Refresh", $time); + end + // Precharge to Auto Refresh + if (($time - RP_chk0 < tRP || $time - RP_chk1 < tRP || $time - RP_chk2 < tRP || $time - RP_chk3 < tRP)&&Debug) begin + $display ("at time %t ERROR: tRP violation during Auto Refresh", $time); + end + // Precharge to Refresh + if (Pc_b0 == 1'b0 || Pc_b1 == 1'b0 || Pc_b2 == 1'b0 || Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: All banks must be Precharge before Auto Refresh", $time); + end + // Record Current tRC time + RC_chk = $time; + end + + // Load Mode Register + if (Mode_reg_enable == 1'b1) begin + // Decode CAS Latency, Burst Length, Burst Type, and Write Burst Mode + if (Pc_b0 == 1'b1 && Pc_b1 == 1'b1 && Pc_b2 == 1'b1 && Pc_b3 == 1'b1) begin + Mode_reg = Addr; + if (Debug) begin + $display ("at time %t LMR : Load Mode Register", $time); + // CAS Latency + if (Addr[6 : 4] == 3'b010) + $display (" CAS Latency = 2"); + else if (Addr[6 : 4] == 3'b011) + $display (" CAS Latency = 3"); + else + $display (" CAS Latency = Reserved"); + // Burst Length + if (Addr[2 : 0] == 3'b000) + $display (" Burst Length = 1"); + else if (Addr[2 : 0] == 3'b001) + $display (" Burst Length = 2"); + else if (Addr[2 : 0] == 3'b010) + $display (" Burst Length = 4"); + else if (Addr[2 : 0] == 3'b011) + $display (" Burst Length = 8"); + else if (Addr[3 : 0] == 4'b0111) + $display (" Burst Length = Full"); + else + $display (" Burst Length = Reserved"); + // Burst Type + if (Addr[3] == 1'b0) + $display (" Burst Type = Sequential"); + else if (Addr[3] == 1'b1) + $display (" Burst Type = Interleaved"); + else + $display (" Burst Type = Reserved"); + // Write Burst Mode + if (Addr[9] == 1'b0) + $display (" Write Burst Mode = Programmed Burst Length"); + else if (Addr[9] == 1'b1) + $display (" Write Burst Mode = Single Location Access"); + else + $display (" Write Burst Mode = Reserved"); + end + end else begin + $display ("at time %t ERROR: all banks must be Precharge before Load Mode Register", $time); + end + // REF to LMR + if ($time - RC_chk < tRC) begin + $display ("at time %t ERROR: tRC violation during Load Mode Register", $time); + end + // LMR to LMR + if (MRD_chk < tMRD) begin + $display ("at time %t ERROR: tMRD violation during Load Mode Register", $time); + end + MRD_chk = 0; + end + + // Active Block (Latch Bank Address and Row Address) + if (Active_enable == 1'b1) begin + if (Ba == 2'b00 && Pc_b0 == 1'b1) begin + {Act_b0, Pc_b0} = 2'b10; + B0_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk0 = $time; + RAS_chk0 = $time; + if (Debug) $display ("at time %t ACT : Bank = 0 Row = %d", $time, Addr); + // Precharge to Activate Bank 0 + if ($time - RP_chk0 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 0", $time); + end + end else if (Ba == 2'b01 && Pc_b1 == 1'b1) begin + {Act_b1, Pc_b1} = 2'b10; + B1_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk1 = $time; + RAS_chk1 = $time; + if (Debug) $display ("at time %t ACT : Bank = 1 Row = %d", $time, Addr); + // Precharge to Activate Bank 1 + if ($time - RP_chk1 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 1", $time); + end + end else if (Ba == 2'b10 && Pc_b2 == 1'b1) begin + {Act_b2, Pc_b2} = 2'b10; + B2_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk2 = $time; + RAS_chk2 = $time; + if (Debug) $display ("at time %t ACT : Bank = 2 Row = %d", $time, Addr); + // Precharge to Activate Bank 2 + if ($time - RP_chk2 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 2", $time); + end + end else if (Ba == 2'b11 && Pc_b3 == 1'b1) begin + {Act_b3, Pc_b3} = 2'b10; + B3_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk3 = $time; + RAS_chk3 = $time; + if (Debug) $display ("at time %t ACT : Bank = 3 Row = %d", $time, Addr); + // Precharge to Activate Bank 3 + if ($time - RP_chk3 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 3", $time); + end + end else if (Ba == 2'b00 && Pc_b0 == 1'b0) begin + $display ("at time %t ERROR: Bank 0 is not Precharged.", $time); + end else if (Ba == 2'b01 && Pc_b1 == 1'b0) begin + $display ("at time %t ERROR: Bank 1 is not Precharged.", $time); + end else if (Ba == 2'b10 && Pc_b2 == 1'b0) begin + $display ("at time %t ERROR: Bank 2 is not Precharged.", $time); + end else if (Ba == 2'b11 && Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: Bank 3 is not Precharged.", $time); + end + // Active Bank A to Active Bank B + if ((Previous_bank != Ba) && ($time - RRD_chk < tRRD)) begin + $display ("at time %t ERROR: tRRD violation during Activate bank = %d", $time, Ba); + end + // Load Mode Register to Active + if (MRD_chk < tMRD ) begin + $display ("at time %t ERROR: tMRD violation during Activate bank = %d", $time, Ba); + end + // Auto Refresh to Activate + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Activate bank = %d", $time, Ba); + end + // Record variables for checking violation + RRD_chk = $time; + Previous_bank = Ba; + end + + // Precharge Block + if (Prech_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b1111; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + RP_chk0 = $time; + RP_chk1 = $time; + RP_chk2 = $time; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = ALL",$time); + // Activate to Precharge all banks + if (($time - RAS_chk0 < tRAS) || ($time - RAS_chk1 < tRAS) || + ($time - RAS_chk2 < tRAS) || ($time - RAS_chk3 < tRAS)) begin + $display ("at time %t ERROR: tRAS violation during Precharge all bank", $time); + end + // tWR violation check for write + if (($time - WR_chk[0] < tWRp) || ($time - WR_chk[1] < tWRp) || + ($time - WR_chk[2] < tWRp) || ($time - WR_chk[3] < tWRp)) begin + $display ("at time %t ERROR: tWR violation during Precharge all bank", $time); + end + end else if (Addr[10] == 1'b0) begin + if (Ba == 2'b00) begin + {Pc_b0, Act_b0} = 2'b10; + RP_chk0 = $time; + if (Debug) $display ("at time %t PRE : Bank = 0",$time); + // Activate to Precharge Bank 0 + if ($time - RAS_chk0 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 0", $time); + end + end else if (Ba == 2'b01) begin + {Pc_b1, Act_b1} = 2'b10; + RP_chk1 = $time; + if (Debug) $display ("at time %t PRE : Bank = 1",$time); + // Activate to Precharge Bank 1 + if ($time - RAS_chk1 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 1", $time); + end + end else if (Ba == 2'b10) begin + {Pc_b2, Act_b2} = 2'b10; + RP_chk2 = $time; + if (Debug) $display ("at time %t PRE : Bank = 2",$time); + // Activate to Precharge Bank 2 + if ($time - RAS_chk2 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 2", $time); + end + end else if (Ba == 2'b11) begin + {Pc_b3, Act_b3} = 2'b10; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = 3",$time); + // Activate to Precharge Bank 3 + if ($time - RAS_chk3 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 3", $time); + end + end + // tWR violation check for write + if ($time - WR_chk[Ba] < tWRp) begin + $display ("at time %t ERROR: tWR violation during Precharge bank %d", $time, Ba); + end + end + // Terminate a Write Immediately (if same bank or all banks) + if (Data_in_enable == 1'b1 && (Bank == Ba || Addr[10] == 1'b1)) begin + Data_in_enable = 1'b0; + end + // Precharge Command Pipeline for Read + if (Cas_latency_3 == 1'b1) begin + Command[2] = `PRECH; + Bank_precharge[2] = Ba; + A10_precharge[2] = Addr[10]; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `PRECH; + Bank_precharge[1] = Ba; + A10_precharge[1] = Addr[10]; + end + end + + // Burst terminate + if (Burst_term == 1'b1) begin + // Terminate a Write Immediately + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + // Terminate a Read Depend on CAS Latency + if (Cas_latency_3 == 1'b1) begin + Command[2] = `BST; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `BST; + end + if (Debug) $display ("at time %t BST : Burst Terminate",$time); + end + + // Read, Write, Column Latch + if (Read_enable == 1'b1 || Write_enable == 1'b1) begin + // Check to see if bank is open (ACT) + if ((Ba == 2'b00 && Pc_b0 == 1'b1) || (Ba == 2'b01 && Pc_b1 == 1'b1) || + (Ba == 2'b10 && Pc_b2 == 1'b1) || (Ba == 2'b11 && Pc_b3 == 1'b1)) begin + $display("at time %t ERROR: Cannot Read or Write - Bank %d is not Activated", $time, Ba); + end + // Activate to Read or Write + if ((Ba == 2'b00) && ($time - RCD_chk0 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 0", $time); + if ((Ba == 2'b01) && ($time - RCD_chk1 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 1", $time); + if ((Ba == 2'b10) && ($time - RCD_chk2 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 2", $time); + if ((Ba == 2'b11) && ($time - RCD_chk3 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 3", $time); + // Read Command + if (Read_enable == 1'b1) begin + // CAS Latency pipeline + if (Cas_latency_3 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[2] = `READ_A; + end else begin + Command[2] = `READ; + end + Col_addr[2] = Addr; + Bank_addr[2] = Ba; + end else if (Cas_latency_2 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[1] = `READ_A; + end else begin + Command[1] = `READ; + end + Col_addr[1] = Addr; + Bank_addr[1] = Ba; + end + + // Read interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write Command + end else if (Write_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[0] = `WRITE_A; + end else begin + Command[0] = `WRITE; + end + Col_addr[0] = Addr; + Bank_addr[0] = Ba; + + // Write interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write interrupt Read (terminate Read immediately) + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + // Interrupting a Write with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Write_precharge[Bank] == 1'b1) begin + RW_interrupt_write[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Write Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Interrupting a Read with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Read_precharge[Bank] == 1'b1) begin + RW_interrupt_read[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Read Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Read or Write with Auto Precharge + if (Addr[10] == 1'b1) begin + Auto_precharge[Ba] = 1'b1; + Count_precharge[Ba] = 0; + if (Read_enable == 1'b1) begin + Read_precharge[Ba] = 1'b1; + end else if (Write_enable == 1'b1) begin + Write_precharge[Ba] = 1'b1; + end + end + end + + // Read with Auto Precharge Calculation + // The device start internal precharge: + // 1. CAS Latency - 1 cycles before last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + if ((Auto_precharge[0] == 1'b1) && (Read_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + ((Burst_length_1 == 1'b1 && Count_precharge[0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge[0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[0] >= 8))) || + (RW_interrupt_read[0] == 1'b1)) begin // Case 3 + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + Auto_precharge[0] = 1'b0; + Read_precharge[0] = 1'b0; + RW_interrupt_read[0] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + if ((Auto_precharge[1] == 1'b1) && (Read_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[1] >= 8))) || + (RW_interrupt_read[1] == 1'b1)) begin + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + Auto_precharge[1] = 1'b0; + Read_precharge[1] = 1'b0; + RW_interrupt_read[1] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + if ((Auto_precharge[2] == 1'b1) && (Read_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[2] >= 8))) || + (RW_interrupt_read[2] == 1'b1)) begin + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + Auto_precharge[2] = 1'b0; + Read_precharge[2] = 1'b0; + RW_interrupt_read[2] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + if ((Auto_precharge[3] == 1'b1) && (Read_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[3] >= 8))) || + (RW_interrupt_read[3] == 1'b1)) begin + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + Auto_precharge[3] = 1'b0; + Read_precharge[3] = 1'b0; + RW_interrupt_read[3] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + + // Internal Precharge or Bst + if (Command[0] == `PRECH) begin // Precharge terminate a read with same bank or all banks + if (Bank_precharge[0] == Bank || A10_precharge[0] == 1'b1) begin + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + end else if (Command[0] == `BST) begin // BST terminate a read to current bank + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + if (Data_out_enable == 1'b0) begin + Dq_reg <= #tOH {data_bits{1'bz}}; + end + + // Detect Read or Write command + if (Command[0] == `READ || Command[0] == `READ_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b0; + Data_out_enable = 1'b1; + end else if (Command[0] == `WRITE || Command[0] == `WRITE_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b1; + Data_out_enable = 1'b0; + end + + // DQ buffer (Driver/Receiver) + if (Data_in_enable == 1'b1) begin // Writing Data to Memory + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + // Dqm operation + if (Dqm[0] == 1'b0) Dq_dqm [ 7 : 0] = Dq [ 7 : 0]; + if (Dqm[1] == 1'b0) Dq_dqm [15 : 8] = Dq [15 : 8]; + //if (Dqm[2] == 1'b0) Dq_dqm [23 : 16] = Dq [23 : 16]; + // if (Dqm[3] == 1'b0) Dq_dqm [31 : 24] = Dq [31 : 24]; + // Write to memory + if (Bank == 2'b00) Bank0 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b01) Bank1 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b10) Bank2 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11) Bank3 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11 && Row==10'h3 && Col[7:4]==4'h4) + $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + //$fdisplay(test_file,"bank:%h row:%h col:%h write:%h",Bank,Row,Col,Dq_dqm); + // Output result + if (Dqm == 4'b1111) begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_dqm, Dqm); + // Record tWR time and reset counter + WR_chk [Bank] = $time; + WR_counter [Bank] = 0; + end + // Advance burst counter subroutine + #tHZ Burst; + end else if (Data_out_enable == 1'b1) begin // Reading Data from Memory + //$display("%h , %h, %h",Bank0,Row,Col); + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + + // Dqm operation + if (Dqm_reg0[0] == 1'b1) Dq_dqm [ 7 : 0] = 8'bz; + if (Dqm_reg0[1] == 1'b1) Dq_dqm [15 : 8] = 8'bz; + if (Dqm_reg0[2] == 1'b1) Dq_dqm [23 : 16] = 8'bz; + if (Dqm_reg0[3] == 1'b1) Dq_dqm [31 : 24] = 8'bz; + // Display result + Dq_reg [data_bits - 1 : 0] = #tAC Dq_dqm [data_bits - 1 : 0]; + if (Dqm_reg0 == 4'b1111) begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_reg, Dqm_reg0); + end + // Advance burst counter subroutine + Burst; + end + end + + // Write with Auto Precharge Calculation + // The device start internal precharge: + // 1. tWR Clock after last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + always @ (WR_counter[0]) begin + if ((Auto_precharge[0] == 1'b1) && (Write_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge [0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [0] >= 8))) || + (RW_interrupt_write[0] == 1'b1 && WR_counter[0] >= 2)) begin // Case 3 (stop count when interrupt) + Auto_precharge[0] = 1'b0; + Write_precharge[0] = 1'b0; + RW_interrupt_write[0] = 1'b0; + #tWRa; // Wait for tWR + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + end + always @ (WR_counter[1]) begin + if ((Auto_precharge[1] == 1'b1) && (Write_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [1] >= 8))) || + (RW_interrupt_write[1] == 1'b1 && WR_counter[1] >= 2)) begin + Auto_precharge[1] = 1'b0; + Write_precharge[1] = 1'b0; + RW_interrupt_write[1] = 1'b0; + #tWRa; // Wait for tWR + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + end + always @ (WR_counter[2]) begin + if ((Auto_precharge[2] == 1'b1) && (Write_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [2] >= 8))) || + (RW_interrupt_write[2] == 1'b1 && WR_counter[2] >= 2)) begin + Auto_precharge[2] = 1'b0; + Write_precharge[2] = 1'b0; + RW_interrupt_write[2] = 1'b0; + #tWRa; // Wait for tWR + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + end + always @ (WR_counter[3]) begin + if ((Auto_precharge[3] == 1'b1) && (Write_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [3] >= 8))) || + (RW_interrupt_write[3] == 1'b1 && WR_counter[3] >= 2)) begin + Auto_precharge[3] = 1'b0; + Write_precharge[3] = 1'b0; + RW_interrupt_write[3] = 1'b0; + #tWRa; // Wait for tWR + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + end + + task Burst; + begin + // Advance Burst Counter + Burst_counter = Burst_counter + 1; + + // Burst Type + if (Mode_reg[3] == 1'b0) begin // Sequential Burst + Col_temp = Col + 1; + end else if (Mode_reg[3] == 1'b1) begin // Interleaved Burst + Col_temp[2] = Burst_counter[2] ^ Col_brst[2]; + Col_temp[1] = Burst_counter[1] ^ Col_brst[1]; + Col_temp[0] = Burst_counter[0] ^ Col_brst[0]; + end + + // Burst Length + if (Burst_length_2) begin // Burst Length = 2 + Col [0] = Col_temp [0]; + end else if (Burst_length_4) begin // Burst Length = 4 + Col [1 : 0] = Col_temp [1 : 0]; + end else if (Burst_length_8) begin // Burst Length = 8 + Col [2 : 0] = Col_temp [2 : 0]; + end else begin // Burst Length = FULL + Col = Col_temp; + end + + // Burst Read Single Write + if (Write_burst_mode == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Data Counter + if (Burst_length_1 == 1'b1) begin + if (Burst_counter >= 1) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_2 == 1'b1) begin + if (Burst_counter >= 2) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_4 == 1'b1) begin + if (Burst_counter >= 4) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_8 == 1'b1) begin + if (Burst_counter >= 8) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end + end + endtask + + //**********************将SDRAM内的数据直接输出到外部文件*******************************// + +/* + integer sdram_data,ind; + + + always@(sdram_r) + begin + sdram_data=$fopen("sdram_data.txt"); + $display("Sdram dampout begin ",sdram_data); +// $fdisplay(sdram_data,"Bank0："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank0[ind]); +// $fdisplay(sdram_data,"Bank1："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank1[ind]); +// $fdisplay(sdram_data,"Bank2："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank2[ind]); +// $fdisplay(sdram_data,"Bank3："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank3[ind]); + + $fclose("sdram_data.txt"); + //->compare; + end +*/ + integer sdram_data,sdram_mem; + reg [23:0] aa,cc; + reg [18:0] bb,ee; + + always@(sdram_r) + begin + $display("Sdram dampout begin ",$realtime); + sdram_data=$fopen("sdram_data.txt"); + for(aa=0;aa<4*(mem_sizes+1);aa=aa+1) + begin + bb=aa[18:0]; + if(aa<=mem_sizes) + $fdisplay(sdram_data,"%0d %0h",aa,Bank0[bb]); + else if(aa<=2*mem_sizes+1) + $fdisplay(sdram_data,"%0d %0h",aa,Bank1[bb]); + else if(aa<=3*mem_sizes+2) + $fdisplay(sdram_data,"%0d %0h",aa,Bank2[bb]); + else + $fdisplay(sdram_data,"%0d %0h",aa,Bank3[bb]); + end + $fclose("sdram_data.txt"); + + sdram_mem=$fopen("sdram_mem.txt"); + for(cc=0;cc<4*(mem_sizes+1);cc=cc+1) + begin + ee=cc[18:0]; + if(cc<=mem_sizes) + $fdisplay(sdram_mem,"%0h",Bank0[ee]); + else if(cc<=2*mem_sizes+1) + $fdisplay(sdram_mem,"%0h",Bank1[ee]); + else if(cc<=3*mem_sizes+2) + $fdisplay(sdram_mem,"%0h",Bank2[ee]); + else + $fdisplay(sdram_mem,"%0h",Bank3[ee]); + end + $fclose("sdram_mem.txt"); + + end + + + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// specify +// specparam +//// tAH = 0.8, // Addr, Ba Hold Time +//// tAS = 1.5, // Addr, Ba Setup Time +//// tCH = 2.5, // Clock High-Level Width +//// tCL = 2.5, // Clock Low-Level Width +////// tCK = 10.0, // Clock Cycle Time 100mhz +////// tCK = 7.5, // Clock Cycle Time 133mhz +//// tCK = 7, // Clock Cycle Time 143mhz +//// tDH = 0.8, // Data-in Hold Time +//// tDS = 1.5, // Data-in Setup Time +//// tCKH = 0.8, // CKE Hold Time +//// tCKS = 1.5, // CKE Setup Time +//// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +//// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// tAH = 1, // Addr, Ba Hold Time +// tAS = 1.5, // Addr, Ba Setup Time +// tCH = 1, // Clock High-Level Width +// tCL = 3, // Clock Low-Level Width +//// tCK = 10.0, // Clock Cycle Time 100mhz +//// tCK = 7.5, // Clock Cycle Time 133mhz +// tCK = 7, // Clock Cycle Time 143mhz +// tDH = 1, // Data-in Hold Time +// tDS = 2, // Data-in Setup Time +// tCKH = 1, // CKE Hold Time +// tCKS = 2, // CKE Setup Time +// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// $width (posedge Clk, tCH); +// $width (negedge Clk, tCL); +// $period (negedge Clk, tCK); +// $period (posedge Clk, tCK); +// $setuphold(posedge Clk, Cke, tCKS, tCKH); +// $setuphold(posedge Clk, Cs_n, tCMS, tCMH); +// $setuphold(posedge Clk, Cas_n, tCMS, tCMH); +// $setuphold(posedge Clk, Ras_n, tCMS, tCMH); +// $setuphold(posedge Clk, We_n, tCMS, tCMH); +// $setuphold(posedge Clk, Addr, tAS, tAH); +// $setuphold(posedge Clk, Ba, tAS, tAH); +// $setuphold(posedge Clk, Dqm, tCMS, tCMH); +// $setuphold(posedge Dq_chk, Dq, tDS, tDH); +// endspecify + +endmodule + diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_init/tb_sdram_init.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_init/tb_sdram_init.v new file mode 100644 index 0000000..8a1d976 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_init/tb_sdram_init.v @@ -0,0 +1,112 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : tb_sdram_init +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鍒濆鍖栨ā鍧椾豢鐪 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module tb_sdram_init(); + +//********************************************************************// +//****************** Internal Signal and Defparam ********************// +//********************************************************************// + +//wire define +//clk_gen +wire clk_50m ; //PLL杈撳嚭50M鏃堕挓 +wire clk_100m ; //PLL杈撳嚭100M鏃堕挓 +wire clk_100m_shift ; //PLL杈撳嚭100M鏃堕挓,鐩镐綅鍋忕Щ-30deg +wire locked ; //PLL鏃堕挓閿佸畾淇″彿 +wire rst_n ; //澶嶄綅淇″彿,浣庢湁鏁 +//sdram_init +wire [3:0] init_cmd ; //鍒濆鍖栭樁娈垫寚浠 +wire [1:0] init_ba ; //鍒濆鍖栭樁娈礚-Bank鍦板潃 +wire [12:0] init_addr ; //鍒濆鍖栭樁娈靛湴鍧鎬荤嚎 +wire init_end ; //鍒濆鍖栧畬鎴愪俊鍙 + +//reg define +reg sys_clk ; //绯荤粺鏃堕挓 +reg sys_rst_n ; //澶嶄綅淇″彿 + +//defparam +//閲嶅畾涔変豢鐪熸ā鍨嬩腑鐨勭浉鍏冲弬鏁 +defparam sdram_model_plus_inst.addr_bits = 13; //鍦板潃浣嶅 +defparam sdram_model_plus_inst.data_bits = 16; //鏁版嵁浣嶅 +defparam sdram_model_plus_inst.col_bits = 9; //鍒楀湴鍧浣嶅 +defparam sdram_model_plus_inst.mem_sizes = 2*1024*1024; //L-Bank瀹归噺 + +//********************************************************************// +//**************************** Clk And Rst ***************************// +//********************************************************************// + +//鏃堕挓銆佸浣嶄俊鍙 +initial + begin + sys_clk = 1'b1 ; + sys_rst_n <= 1'b0 ; + #200 + sys_rst_n <= 1'b1 ; + end + +always #10 sys_clk = ~sys_clk; + +//rst_n:澶嶄綅淇″彿 +assign rst_n = sys_rst_n & locked; + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// + +//------------- clk_gen_inst ------------- +clk_gen clk_gen_inst ( + .inclk0 (sys_clk ), + .areset (~sys_rst_n ), + .c0 (clk_50m ), + .c1 (clk_100m ), + .c2 (clk_100m_shift ), + + .locked (locked ) +); + +//------------- sdram_init_inst ------------- +sdram_init sdram_init_inst( + + .sys_clk (clk_100m ), + .sys_rst_n (rst_n ), + + .init_cmd (init_cmd ), + .init_ba (init_ba ), + .init_addr (init_addr ), + .init_end (init_end ) + +); + +//-------------sdram_model_plus_inst------------- +sdram_model_plus sdram_model_plus_inst( + .Dq ( ), + .Addr (init_addr ), + .Ba (init_ba ), + .Clk (clk_100m_shift ), + .Cke (1'b1 ), + .Cs_n (init_cmd[3] ), + .Ras_n (init_cmd[2] ), + .Cas_n (init_cmd[1] ), + .We_n (init_cmd[0] ), + .Dqm (2'b0 ), + .Debug (1'b1 ) + +); + +endmodule \ No newline at end of file diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_read/sdram_model_plus.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_read/sdram_model_plus.v new file mode 100644 index 0000000..4e51287 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_read/sdram_model_plus.v @@ -0,0 +1,1131 @@ +/*************************************************************************************** +作者： 李晟 +2003-08-27 V0.1 李晟 + + 添加内存模块倒空功能，在外部需要创建事件：sdram_r ,本SDRAM的内容将会按Bank 顺序damp out 至文件 + sdram_data.txt 中 +×××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××*/ +//2004-03-04 陈乃奎 修改原程序中将BANK的数据转存入TXT文件的格式 +//2004-03-16 陈乃奎 修改SDRAM 的初始化数据 +//2004/04/06 陈乃奎 将SDRAM的操作命令以字符形式表示，以便用MODELSIM监视 +//2004/04/19 陈乃奎 修改参数 parameter tAC = 8; +//2010/09/17 罗瑶 修改sdram的大小，数据位宽，dqm宽度; +/**************************************************************************************** +* +* File Name: sdram_model.V +* Version: 0.0f +* Date: July 8th, 1999 +* Model: BUS Functional +* Simulator: Model Technology (PC version 5.2e PE) +* +* Dependencies: None +* +* Author: Son P. Huynh +* Email: sphuynh@micron.com +* Phone: (208) 368-3825 +* Company: Micron Technology, Inc. +* Model: sdram_model (1Meg x 16 x 4 Banks) +* +* Description: 64Mb SDRAM Verilog model +* +* Limitation: - Doesn't check for 4096 cycle refresh +* +* Note: - Set simulator resolution to "ps" accuracy +* - Set Debug = 0 to disable $display messages +* +* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY +* WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY +* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR +* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT. +* +* Copyright ?1998 Micron Semiconductor Products, Inc. +* All rights researved +* +* Rev Author Phone Date Changes +* ---- ---------------------------- ---------- --------------------------------------- +* 0.0f Son Huynh 208-368-3825 07/08/1999 - Fix tWR = 1 Clk + 7.5 ns (Auto) +* Micron Technology Inc. - Fix tWR = 15 ns (Manual) +* - Fix tRP (Autoprecharge to AutoRefresh) +* +* 0.0a Son Huynh 208-368-3825 05/13/1998 - First Release (from 64Mb rev 0.0e) +* Micron Technology Inc. +****************************************************************************************/ + +`timescale 1ns / 100ps + +module sdram_model_plus (Dq, Addr, Ba, Clk, Cke, Cs_n, Ras_n, Cas_n, We_n, Dqm,Debug); + + parameter addr_bits = 11; + parameter data_bits = 32; + parameter col_bits = 8; + parameter mem_sizes = 1048576*2-1;//1 Meg + + inout [data_bits - 1 : 0] Dq; + input [addr_bits - 1 : 0] Addr; + input [1 : 0] Ba; + input Clk; + input Cke; + input Cs_n; + input Ras_n; + input Cas_n; + input We_n; + input [3 : 0] Dqm; //高低各8bit + //added by xzli + input Debug; + + reg [data_bits - 1 : 0] Bank0 [0 : mem_sizes];//存储器类型数据 + reg [data_bits - 1 : 0] Bank1 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank2 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank3 [0 : mem_sizes]; + + reg [1 : 0] Bank_addr [0 : 3]; // Bank Address Pipeline + reg [col_bits - 1 : 0] Col_addr [0 : 3]; // Column Address Pipeline + reg [3 : 0] Command [0 : 3]; // Command Operation Pipeline + reg [3 : 0] Dqm_reg0, Dqm_reg1; // DQM Operation Pipeline + reg [addr_bits - 1 : 0] B0_row_addr, B1_row_addr, B2_row_addr, B3_row_addr; + + reg [addr_bits - 1 : 0] Mode_reg; + reg [data_bits - 1 : 0] Dq_reg, Dq_dqm; + reg [col_bits - 1 : 0] Col_temp, Burst_counter; + + reg Act_b0, Act_b1, Act_b2, Act_b3; // Bank Activate + reg Pc_b0, Pc_b1, Pc_b2, Pc_b3; // Bank Precharge + + reg [1 : 0] Bank_precharge [0 : 3]; // Precharge Command + reg A10_precharge [0 : 3]; // Addr[10] = 1 (All banks) + reg Auto_precharge [0 : 3]; // RW AutoPrecharge (Bank) + reg Read_precharge [0 : 3]; // R AutoPrecharge + reg Write_precharge [0 : 3]; // W AutoPrecharge + integer Count_precharge [0 : 3]; // RW AutoPrecharge (Counter) + reg RW_interrupt_read [0 : 3]; // RW Interrupt Read with Auto Precharge + reg RW_interrupt_write [0 : 3]; // RW Interrupt Write with Auto Precharge + + reg Data_in_enable; + reg Data_out_enable; + + reg [1 : 0] Bank, Previous_bank; + reg [addr_bits - 1 : 0] Row; + reg [col_bits - 1 : 0] Col, Col_brst; + + // Internal system clock + reg CkeZ, Sys_clk; + + reg [21:0] dd; + + // Commands Decode + wire Active_enable = ~Cs_n & ~Ras_n & Cas_n & We_n; + wire Aref_enable = ~Cs_n & ~Ras_n & ~Cas_n & We_n; + wire Burst_term = ~Cs_n & Ras_n & Cas_n & ~We_n; + wire Mode_reg_enable = ~Cs_n & ~Ras_n & ~Cas_n & ~We_n; + wire Prech_enable = ~Cs_n & ~Ras_n & Cas_n & ~We_n; + wire Read_enable = ~Cs_n & Ras_n & ~Cas_n & We_n; + wire Write_enable = ~Cs_n & Ras_n & ~Cas_n & ~We_n; + + // Burst Length Decode + wire Burst_length_1 = ~Mode_reg[2] & ~Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_2 = ~Mode_reg[2] & ~Mode_reg[1] & Mode_reg[0]; + wire Burst_length_4 = ~Mode_reg[2] & Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_8 = ~Mode_reg[2] & Mode_reg[1] & Mode_reg[0]; + + // CAS Latency Decode + wire Cas_latency_2 = ~Mode_reg[6] & Mode_reg[5] & ~Mode_reg[4]; + wire Cas_latency_3 = ~Mode_reg[6] & Mode_reg[5] & Mode_reg[4]; + + // Write Burst Mode + wire Write_burst_mode = Mode_reg[9]; + + wire Debug; // Debug messages : 1 = On; 0 = Off + wire Dq_chk = Sys_clk & Data_in_enable; // Check setup/hold time for DQ + + reg [31:0] mem_d; + + event sdram_r,sdram_w,compare; + + + + + assign Dq = Dq_reg; // DQ buffer + + // Commands Operation + `define ACT 0 + `define NOP 1 + `define READ 2 + `define READ_A 3 + `define WRITE 4 + `define WRITE_A 5 + `define PRECH 6 + `define A_REF 7 + `define BST 8 + `define LMR 9 + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// parameter tAC = 8; //test 6.5 +// parameter tHZ = 7.0; +// parameter tOH = 2.7; +// parameter tMRD = 2.0; // 2 Clk Cycles +// parameter tRAS = 44.0; +// parameter tRC = 66.0; +// parameter tRCD = 20.0; +// parameter tRP = 20.0; +// parameter tRRD = 15.0; +// parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) +// parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Parameters for -7 (PC143) and CAS Latency = 3 + parameter tAC = 6.5; //test 6.5 + parameter tHZ = 5.5; + parameter tOH = 2; + parameter tMRD = 2.0; // 2 Clk Cycles + parameter tRAS = 48.0; + parameter tRC = 70.0; + parameter tRCD = 20.0; + parameter tRP = 20.0; + parameter tRRD = 14.0; + parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) + parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Check variable + integer MRD_chk; + integer WR_counter [0 : 3]; + time WR_chk [0 : 3]; + time RC_chk, RRD_chk; + time RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3; + time RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3; + time RP_chk0, RP_chk1, RP_chk2, RP_chk3; + + integer test_file; + + //*****display the command of the sdram************************************** + + parameter Mode_Reg_Set =4'b0000; + parameter Auto_Refresh =4'b0001; + parameter Row_Active =4'b0011; + parameter Pre_Charge =4'b0010; + parameter PreCharge_All =4'b0010; + parameter Write =4'b0100; + parameter Write_Pre =4'b0100; + parameter Read =4'b0101; + parameter Read_Pre =4'b0101; + parameter Burst_Stop =4'b0110; + parameter Nop =4'b0111; + parameter Dsel =4'b1111; + + wire [3:0] sdram_control; + reg cke_temp; + reg [8*13:1] sdram_command; + + always@(posedge Clk) + cke_temp<=Cke; + + assign sdram_control={Cs_n,Ras_n,Cas_n,We_n}; + + always@(sdram_control or cke_temp) + begin + case(sdram_control) + Mode_Reg_Set: sdram_command<="Mode_Reg_Set"; + Auto_Refresh: sdram_command<="Auto_Refresh"; + Row_Active: sdram_command<="Row_Active"; + Pre_Charge: sdram_command<="Pre_Charge"; + Burst_Stop: sdram_command<="Burst_Stop"; + Dsel: sdram_command<="Dsel"; + + Write: if(cke_temp==1) + sdram_command<="Write"; + else + sdram_command<="Write_suspend"; + + Read: if(cke_temp==1) + sdram_command<="Read"; + else + sdram_command<="Read_suspend"; + + Nop: if(cke_temp==1) + sdram_command<="Nop"; + else + sdram_command<="Self_refresh"; + + default: sdram_command<="Power_down"; + endcase + end + + //***************************************************** + + initial + begin + //test_file=$fopen("test_file.txt"); + end + + initial + begin + Dq_reg = {data_bits{1'bz}}; + {Data_in_enable, Data_out_enable} = 0; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b0000; + {WR_chk[0], WR_chk[1], WR_chk[2], WR_chk[3]} = 0; + {WR_counter[0], WR_counter[1], WR_counter[2], WR_counter[3]} = 0; + {RW_interrupt_read[0], RW_interrupt_read[1], RW_interrupt_read[2], RW_interrupt_read[3]} = 0; + {RW_interrupt_write[0], RW_interrupt_write[1], RW_interrupt_write[2], RW_interrupt_write[3]} = 0; + {MRD_chk, RC_chk, RRD_chk} = 0; + {RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3} = 0; + {RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3} = 0; + {RP_chk0, RP_chk1, RP_chk2, RP_chk3} = 0; + $timeformat (-9, 0, " ns", 12); + //$readmemh("bank0.txt", Bank0); + //$readmemh("bank1.txt", Bank1); + //$readmemh("bank2.txt", Bank2); + //$readmemh("bank3.txt", Bank3); +/* + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + Bank0[dd]=dd[data_bits - 1 : 0]; + Bank1[dd]=dd[data_bits - 1 : 0]+1; + Bank2[dd]=dd[data_bits - 1 : 0]+2; + Bank3[dd]=dd[data_bits - 1 : 0]+3; + end +*/ + initial_sdram(0); + end + + task initial_sdram; + + input data_sign; + reg [3:0] data_sign; + + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + mem_d = {data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign}; + if(data_bits==16) + begin + Bank0[dd]=mem_d[15:0]; + Bank1[dd]=mem_d[15:0]; + Bank2[dd]=mem_d[15:0]; + Bank3[dd]=mem_d[15:0]; + end + else if(data_bits==32) + begin + Bank0[dd]=mem_d[31:0]; + Bank1[dd]=mem_d[31:0]; + Bank2[dd]=mem_d[31:0]; + Bank3[dd]=mem_d[31:0]; + end + end + + endtask + + // System clock generator + always + begin + @(posedge Clk) + begin + Sys_clk = CkeZ; + CkeZ = Cke; + end + @(negedge Clk) + begin + Sys_clk = 1'b0; + end + end + + always @ (posedge Sys_clk) begin + // Internal Commamd Pipelined + Command[0] = Command[1]; + Command[1] = Command[2]; + Command[2] = Command[3]; + Command[3] = `NOP; + + Col_addr[0] = Col_addr[1]; + Col_addr[1] = Col_addr[2]; + Col_addr[2] = Col_addr[3]; + Col_addr[3] = {col_bits{1'b0}}; + + Bank_addr[0] = Bank_addr[1]; + Bank_addr[1] = Bank_addr[2]; + Bank_addr[2] = Bank_addr[3]; + Bank_addr[3] = 2'b0; + + Bank_precharge[0] = Bank_precharge[1]; + Bank_precharge[1] = Bank_precharge[2]; + Bank_precharge[2] = Bank_precharge[3]; + Bank_precharge[3] = 2'b0; + + A10_precharge[0] = A10_precharge[1]; + A10_precharge[1] = A10_precharge[2]; + A10_precharge[2] = A10_precharge[3]; + A10_precharge[3] = 1'b0; + + // Dqm pipeline for Read + Dqm_reg0 = Dqm_reg1; + Dqm_reg1 = Dqm; + + // Read or Write with Auto Precharge Counter + if (Auto_precharge[0] == 1'b1) begin + Count_precharge[0] = Count_precharge[0] + 1; + end + if (Auto_precharge[1] == 1'b1) begin + Count_precharge[1] = Count_precharge[1] + 1; + end + if (Auto_precharge[2] == 1'b1) begin + Count_precharge[2] = Count_precharge[2] + 1; + end + if (Auto_precharge[3] == 1'b1) begin + Count_precharge[3] = Count_precharge[3] + 1; + end + + // tMRD Counter + MRD_chk = MRD_chk + 1; + + // tWR Counter for Write + WR_counter[0] = WR_counter[0] + 1; + WR_counter[1] = WR_counter[1] + 1; + WR_counter[2] = WR_counter[2] + 1; + WR_counter[3] = WR_counter[3] + 1; + + // Auto Refresh + if (Aref_enable == 1'b1) begin + if (Debug) $display ("at time %t AREF : Auto Refresh", $time); + // Auto Refresh to Auto Refresh + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Auto Refresh", $time); + end + // Precharge to Auto Refresh + if (($time - RP_chk0 < tRP || $time - RP_chk1 < tRP || $time - RP_chk2 < tRP || $time - RP_chk3 < tRP)&&Debug) begin + $display ("at time %t ERROR: tRP violation during Auto Refresh", $time); + end + // Precharge to Refresh + if (Pc_b0 == 1'b0 || Pc_b1 == 1'b0 || Pc_b2 == 1'b0 || Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: All banks must be Precharge before Auto Refresh", $time); + end + // Record Current tRC time + RC_chk = $time; + end + + // Load Mode Register + if (Mode_reg_enable == 1'b1) begin + // Decode CAS Latency, Burst Length, Burst Type, and Write Burst Mode + if (Pc_b0 == 1'b1 && Pc_b1 == 1'b1 && Pc_b2 == 1'b1 && Pc_b3 == 1'b1) begin + Mode_reg = Addr; + if (Debug) begin + $display ("at time %t LMR : Load Mode Register", $time); + // CAS Latency + if (Addr[6 : 4] == 3'b010) + $display (" CAS Latency = 2"); + else if (Addr[6 : 4] == 3'b011) + $display (" CAS Latency = 3"); + else + $display (" CAS Latency = Reserved"); + // Burst Length + if (Addr[2 : 0] == 3'b000) + $display (" Burst Length = 1"); + else if (Addr[2 : 0] == 3'b001) + $display (" Burst Length = 2"); + else if (Addr[2 : 0] == 3'b010) + $display (" Burst Length = 4"); + else if (Addr[2 : 0] == 3'b011) + $display (" Burst Length = 8"); + else if (Addr[3 : 0] == 4'b0111) + $display (" Burst Length = Full"); + else + $display (" Burst Length = Reserved"); + // Burst Type + if (Addr[3] == 1'b0) + $display (" Burst Type = Sequential"); + else if (Addr[3] == 1'b1) + $display (" Burst Type = Interleaved"); + else + $display (" Burst Type = Reserved"); + // Write Burst Mode + if (Addr[9] == 1'b0) + $display (" Write Burst Mode = Programmed Burst Length"); + else if (Addr[9] == 1'b1) + $display (" Write Burst Mode = Single Location Access"); + else + $display (" Write Burst Mode = Reserved"); + end + end else begin + $display ("at time %t ERROR: all banks must be Precharge before Load Mode Register", $time); + end + // REF to LMR + if ($time - RC_chk < tRC) begin + $display ("at time %t ERROR: tRC violation during Load Mode Register", $time); + end + // LMR to LMR + if (MRD_chk < tMRD) begin + $display ("at time %t ERROR: tMRD violation during Load Mode Register", $time); + end + MRD_chk = 0; + end + + // Active Block (Latch Bank Address and Row Address) + if (Active_enable == 1'b1) begin + if (Ba == 2'b00 && Pc_b0 == 1'b1) begin + {Act_b0, Pc_b0} = 2'b10; + B0_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk0 = $time; + RAS_chk0 = $time; + if (Debug) $display ("at time %t ACT : Bank = 0 Row = %d", $time, Addr); + // Precharge to Activate Bank 0 + if ($time - RP_chk0 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 0", $time); + end + end else if (Ba == 2'b01 && Pc_b1 == 1'b1) begin + {Act_b1, Pc_b1} = 2'b10; + B1_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk1 = $time; + RAS_chk1 = $time; + if (Debug) $display ("at time %t ACT : Bank = 1 Row = %d", $time, Addr); + // Precharge to Activate Bank 1 + if ($time - RP_chk1 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 1", $time); + end + end else if (Ba == 2'b10 && Pc_b2 == 1'b1) begin + {Act_b2, Pc_b2} = 2'b10; + B2_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk2 = $time; + RAS_chk2 = $time; + if (Debug) $display ("at time %t ACT : Bank = 2 Row = %d", $time, Addr); + // Precharge to Activate Bank 2 + if ($time - RP_chk2 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 2", $time); + end + end else if (Ba == 2'b11 && Pc_b3 == 1'b1) begin + {Act_b3, Pc_b3} = 2'b10; + B3_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk3 = $time; + RAS_chk3 = $time; + if (Debug) $display ("at time %t ACT : Bank = 3 Row = %d", $time, Addr); + // Precharge to Activate Bank 3 + if ($time - RP_chk3 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 3", $time); + end + end else if (Ba == 2'b00 && Pc_b0 == 1'b0) begin + $display ("at time %t ERROR: Bank 0 is not Precharged.", $time); + end else if (Ba == 2'b01 && Pc_b1 == 1'b0) begin + $display ("at time %t ERROR: Bank 1 is not Precharged.", $time); + end else if (Ba == 2'b10 && Pc_b2 == 1'b0) begin + $display ("at time %t ERROR: Bank 2 is not Precharged.", $time); + end else if (Ba == 2'b11 && Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: Bank 3 is not Precharged.", $time); + end + // Active Bank A to Active Bank B + if ((Previous_bank != Ba) && ($time - RRD_chk < tRRD)) begin + $display ("at time %t ERROR: tRRD violation during Activate bank = %d", $time, Ba); + end + // Load Mode Register to Active + if (MRD_chk < tMRD ) begin + $display ("at time %t ERROR: tMRD violation during Activate bank = %d", $time, Ba); + end + // Auto Refresh to Activate + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Activate bank = %d", $time, Ba); + end + // Record variables for checking violation + RRD_chk = $time; + Previous_bank = Ba; + end + + // Precharge Block + if (Prech_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b1111; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + RP_chk0 = $time; + RP_chk1 = $time; + RP_chk2 = $time; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = ALL",$time); + // Activate to Precharge all banks + if (($time - RAS_chk0 < tRAS) || ($time - RAS_chk1 < tRAS) || + ($time - RAS_chk2 < tRAS) || ($time - RAS_chk3 < tRAS)) begin + $display ("at time %t ERROR: tRAS violation during Precharge all bank", $time); + end + // tWR violation check for write + if (($time - WR_chk[0] < tWRp) || ($time - WR_chk[1] < tWRp) || + ($time - WR_chk[2] < tWRp) || ($time - WR_chk[3] < tWRp)) begin + $display ("at time %t ERROR: tWR violation during Precharge all bank", $time); + end + end else if (Addr[10] == 1'b0) begin + if (Ba == 2'b00) begin + {Pc_b0, Act_b0} = 2'b10; + RP_chk0 = $time; + if (Debug) $display ("at time %t PRE : Bank = 0",$time); + // Activate to Precharge Bank 0 + if ($time - RAS_chk0 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 0", $time); + end + end else if (Ba == 2'b01) begin + {Pc_b1, Act_b1} = 2'b10; + RP_chk1 = $time; + if (Debug) $display ("at time %t PRE : Bank = 1",$time); + // Activate to Precharge Bank 1 + if ($time - RAS_chk1 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 1", $time); + end + end else if (Ba == 2'b10) begin + {Pc_b2, Act_b2} = 2'b10; + RP_chk2 = $time; + if (Debug) $display ("at time %t PRE : Bank = 2",$time); + // Activate to Precharge Bank 2 + if ($time - RAS_chk2 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 2", $time); + end + end else if (Ba == 2'b11) begin + {Pc_b3, Act_b3} = 2'b10; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = 3",$time); + // Activate to Precharge Bank 3 + if ($time - RAS_chk3 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 3", $time); + end + end + // tWR violation check for write + if ($time - WR_chk[Ba] < tWRp) begin + $display ("at time %t ERROR: tWR violation during Precharge bank %d", $time, Ba); + end + end + // Terminate a Write Immediately (if same bank or all banks) + if (Data_in_enable == 1'b1 && (Bank == Ba || Addr[10] == 1'b1)) begin + Data_in_enable = 1'b0; + end + // Precharge Command Pipeline for Read + if (Cas_latency_3 == 1'b1) begin + Command[2] = `PRECH; + Bank_precharge[2] = Ba; + A10_precharge[2] = Addr[10]; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `PRECH; + Bank_precharge[1] = Ba; + A10_precharge[1] = Addr[10]; + end + end + + // Burst terminate + if (Burst_term == 1'b1) begin + // Terminate a Write Immediately + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + // Terminate a Read Depend on CAS Latency + if (Cas_latency_3 == 1'b1) begin + Command[2] = `BST; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `BST; + end + if (Debug) $display ("at time %t BST : Burst Terminate",$time); + end + + // Read, Write, Column Latch + if (Read_enable == 1'b1 || Write_enable == 1'b1) begin + // Check to see if bank is open (ACT) + if ((Ba == 2'b00 && Pc_b0 == 1'b1) || (Ba == 2'b01 && Pc_b1 == 1'b1) || + (Ba == 2'b10 && Pc_b2 == 1'b1) || (Ba == 2'b11 && Pc_b3 == 1'b1)) begin + $display("at time %t ERROR: Cannot Read or Write - Bank %d is not Activated", $time, Ba); + end + // Activate to Read or Write + if ((Ba == 2'b00) && ($time - RCD_chk0 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 0", $time); + if ((Ba == 2'b01) && ($time - RCD_chk1 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 1", $time); + if ((Ba == 2'b10) && ($time - RCD_chk2 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 2", $time); + if ((Ba == 2'b11) && ($time - RCD_chk3 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 3", $time); + // Read Command + if (Read_enable == 1'b1) begin + // CAS Latency pipeline + if (Cas_latency_3 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[2] = `READ_A; + end else begin + Command[2] = `READ; + end + Col_addr[2] = Addr; + Bank_addr[2] = Ba; + end else if (Cas_latency_2 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[1] = `READ_A; + end else begin + Command[1] = `READ; + end + Col_addr[1] = Addr; + Bank_addr[1] = Ba; + end + + // Read interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write Command + end else if (Write_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[0] = `WRITE_A; + end else begin + Command[0] = `WRITE; + end + Col_addr[0] = Addr; + Bank_addr[0] = Ba; + + // Write interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write interrupt Read (terminate Read immediately) + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + // Interrupting a Write with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Write_precharge[Bank] == 1'b1) begin + RW_interrupt_write[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Write Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Interrupting a Read with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Read_precharge[Bank] == 1'b1) begin + RW_interrupt_read[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Read Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Read or Write with Auto Precharge + if (Addr[10] == 1'b1) begin + Auto_precharge[Ba] = 1'b1; + Count_precharge[Ba] = 0; + if (Read_enable == 1'b1) begin + Read_precharge[Ba] = 1'b1; + end else if (Write_enable == 1'b1) begin + Write_precharge[Ba] = 1'b1; + end + end + end + + // Read with Auto Precharge Calculation + // The device start internal precharge: + // 1. CAS Latency - 1 cycles before last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + if ((Auto_precharge[0] == 1'b1) && (Read_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + ((Burst_length_1 == 1'b1 && Count_precharge[0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge[0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[0] >= 8))) || + (RW_interrupt_read[0] == 1'b1)) begin // Case 3 + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + Auto_precharge[0] = 1'b0; + Read_precharge[0] = 1'b0; + RW_interrupt_read[0] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + if ((Auto_precharge[1] == 1'b1) && (Read_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[1] >= 8))) || + (RW_interrupt_read[1] == 1'b1)) begin + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + Auto_precharge[1] = 1'b0; + Read_precharge[1] = 1'b0; + RW_interrupt_read[1] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + if ((Auto_precharge[2] == 1'b1) && (Read_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[2] >= 8))) || + (RW_interrupt_read[2] == 1'b1)) begin + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + Auto_precharge[2] = 1'b0; + Read_precharge[2] = 1'b0; + RW_interrupt_read[2] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + if ((Auto_precharge[3] == 1'b1) && (Read_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[3] >= 8))) || + (RW_interrupt_read[3] == 1'b1)) begin + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + Auto_precharge[3] = 1'b0; + Read_precharge[3] = 1'b0; + RW_interrupt_read[3] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + + // Internal Precharge or Bst + if (Command[0] == `PRECH) begin // Precharge terminate a read with same bank or all banks + if (Bank_precharge[0] == Bank || A10_precharge[0] == 1'b1) begin + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + end else if (Command[0] == `BST) begin // BST terminate a read to current bank + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + if (Data_out_enable == 1'b0) begin + Dq_reg <= #tOH {data_bits{1'bz}}; + end + + // Detect Read or Write command + if (Command[0] == `READ || Command[0] == `READ_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b0; + Data_out_enable = 1'b1; + end else if (Command[0] == `WRITE || Command[0] == `WRITE_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b1; + Data_out_enable = 1'b0; + end + + // DQ buffer (Driver/Receiver) + if (Data_in_enable == 1'b1) begin // Writing Data to Memory + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + // Dqm operation + if (Dqm[0] == 1'b0) Dq_dqm [ 7 : 0] = Dq [ 7 : 0]; + if (Dqm[1] == 1'b0) Dq_dqm [15 : 8] = Dq [15 : 8]; + //if (Dqm[2] == 1'b0) Dq_dqm [23 : 16] = Dq [23 : 16]; + // if (Dqm[3] == 1'b0) Dq_dqm [31 : 24] = Dq [31 : 24]; + // Write to memory + if (Bank == 2'b00) Bank0 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b01) Bank1 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b10) Bank2 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11) Bank3 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11 && Row==10'h3 && Col[7:4]==4'h4) + $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + //$fdisplay(test_file,"bank:%h row:%h col:%h write:%h",Bank,Row,Col,Dq_dqm); + // Output result + if (Dqm == 4'b1111) begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_dqm, Dqm); + // Record tWR time and reset counter + WR_chk [Bank] = $time; + WR_counter [Bank] = 0; + end + // Advance burst counter subroutine + #tHZ Burst; + end else if (Data_out_enable == 1'b1) begin // Reading Data from Memory + //$display("%h , %h, %h",Bank0,Row,Col); + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + + // Dqm operation + if (Dqm_reg0[0] == 1'b1) Dq_dqm [ 7 : 0] = 8'bz; + if (Dqm_reg0[1] == 1'b1) Dq_dqm [15 : 8] = 8'bz; + if (Dqm_reg0[2] == 1'b1) Dq_dqm [23 : 16] = 8'bz; + if (Dqm_reg0[3] == 1'b1) Dq_dqm [31 : 24] = 8'bz; + // Display result + Dq_reg [data_bits - 1 : 0] = #tAC Dq_dqm [data_bits - 1 : 0]; + if (Dqm_reg0 == 4'b1111) begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_reg, Dqm_reg0); + end + // Advance burst counter subroutine + Burst; + end + end + + // Write with Auto Precharge Calculation + // The device start internal precharge: + // 1. tWR Clock after last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + always @ (WR_counter[0]) begin + if ((Auto_precharge[0] == 1'b1) && (Write_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge [0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [0] >= 8))) || + (RW_interrupt_write[0] == 1'b1 && WR_counter[0] >= 2)) begin // Case 3 (stop count when interrupt) + Auto_precharge[0] = 1'b0; + Write_precharge[0] = 1'b0; + RW_interrupt_write[0] = 1'b0; + #tWRa; // Wait for tWR + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + end + always @ (WR_counter[1]) begin + if ((Auto_precharge[1] == 1'b1) && (Write_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [1] >= 8))) || + (RW_interrupt_write[1] == 1'b1 && WR_counter[1] >= 2)) begin + Auto_precharge[1] = 1'b0; + Write_precharge[1] = 1'b0; + RW_interrupt_write[1] = 1'b0; + #tWRa; // Wait for tWR + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + end + always @ (WR_counter[2]) begin + if ((Auto_precharge[2] == 1'b1) && (Write_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [2] >= 8))) || + (RW_interrupt_write[2] == 1'b1 && WR_counter[2] >= 2)) begin + Auto_precharge[2] = 1'b0; + Write_precharge[2] = 1'b0; + RW_interrupt_write[2] = 1'b0; + #tWRa; // Wait for tWR + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + end + always @ (WR_counter[3]) begin + if ((Auto_precharge[3] == 1'b1) && (Write_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [3] >= 8))) || + (RW_interrupt_write[3] == 1'b1 && WR_counter[3] >= 2)) begin + Auto_precharge[3] = 1'b0; + Write_precharge[3] = 1'b0; + RW_interrupt_write[3] = 1'b0; + #tWRa; // Wait for tWR + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + end + + task Burst; + begin + // Advance Burst Counter + Burst_counter = Burst_counter + 1; + + // Burst Type + if (Mode_reg[3] == 1'b0) begin // Sequential Burst + Col_temp = Col + 1; + end else if (Mode_reg[3] == 1'b1) begin // Interleaved Burst + Col_temp[2] = Burst_counter[2] ^ Col_brst[2]; + Col_temp[1] = Burst_counter[1] ^ Col_brst[1]; + Col_temp[0] = Burst_counter[0] ^ Col_brst[0]; + end + + // Burst Length + if (Burst_length_2) begin // Burst Length = 2 + Col [0] = Col_temp [0]; + end else if (Burst_length_4) begin // Burst Length = 4 + Col [1 : 0] = Col_temp [1 : 0]; + end else if (Burst_length_8) begin // Burst Length = 8 + Col [2 : 0] = Col_temp [2 : 0]; + end else begin // Burst Length = FULL + Col = Col_temp; + end + + // Burst Read Single Write + if (Write_burst_mode == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Data Counter + if (Burst_length_1 == 1'b1) begin + if (Burst_counter >= 1) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_2 == 1'b1) begin + if (Burst_counter >= 2) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_4 == 1'b1) begin + if (Burst_counter >= 4) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_8 == 1'b1) begin + if (Burst_counter >= 8) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end + end + endtask + + //**********************将SDRAM内的数据直接输出到外部文件*******************************// + +/* + integer sdram_data,ind; + + + always@(sdram_r) + begin + sdram_data=$fopen("sdram_data.txt"); + $display("Sdram dampout begin ",sdram_data); +// $fdisplay(sdram_data,"Bank0："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank0[ind]); +// $fdisplay(sdram_data,"Bank1："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank1[ind]); +// $fdisplay(sdram_data,"Bank2："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank2[ind]); +// $fdisplay(sdram_data,"Bank3："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank3[ind]); + + $fclose("sdram_data.txt"); + //->compare; + end +*/ + integer sdram_data,sdram_mem; + reg [23:0] aa,cc; + reg [18:0] bb,ee; + + always@(sdram_r) + begin + $display("Sdram dampout begin ",$realtime); + sdram_data=$fopen("sdram_data.txt"); + for(aa=0;aa<4*(mem_sizes+1);aa=aa+1) + begin + bb=aa[18:0]; + if(aa<=mem_sizes) + $fdisplay(sdram_data,"%0d %0h",aa,Bank0[bb]); + else if(aa<=2*mem_sizes+1) + $fdisplay(sdram_data,"%0d %0h",aa,Bank1[bb]); + else if(aa<=3*mem_sizes+2) + $fdisplay(sdram_data,"%0d %0h",aa,Bank2[bb]); + else + $fdisplay(sdram_data,"%0d %0h",aa,Bank3[bb]); + end + $fclose("sdram_data.txt"); + + sdram_mem=$fopen("sdram_mem.txt"); + for(cc=0;cc<4*(mem_sizes+1);cc=cc+1) + begin + ee=cc[18:0]; + if(cc<=mem_sizes) + $fdisplay(sdram_mem,"%0h",Bank0[ee]); + else if(cc<=2*mem_sizes+1) + $fdisplay(sdram_mem,"%0h",Bank1[ee]); + else if(cc<=3*mem_sizes+2) + $fdisplay(sdram_mem,"%0h",Bank2[ee]); + else + $fdisplay(sdram_mem,"%0h",Bank3[ee]); + end + $fclose("sdram_mem.txt"); + + end + + + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// specify +// specparam +//// tAH = 0.8, // Addr, Ba Hold Time +//// tAS = 1.5, // Addr, Ba Setup Time +//// tCH = 2.5, // Clock High-Level Width +//// tCL = 2.5, // Clock Low-Level Width +////// tCK = 10.0, // Clock Cycle Time 100mhz +////// tCK = 7.5, // Clock Cycle Time 133mhz +//// tCK = 7, // Clock Cycle Time 143mhz +//// tDH = 0.8, // Data-in Hold Time +//// tDS = 1.5, // Data-in Setup Time +//// tCKH = 0.8, // CKE Hold Time +//// tCKS = 1.5, // CKE Setup Time +//// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +//// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// tAH = 1, // Addr, Ba Hold Time +// tAS = 1.5, // Addr, Ba Setup Time +// tCH = 1, // Clock High-Level Width +// tCL = 3, // Clock Low-Level Width +//// tCK = 10.0, // Clock Cycle Time 100mhz +//// tCK = 7.5, // Clock Cycle Time 133mhz +// tCK = 7, // Clock Cycle Time 143mhz +// tDH = 1, // Data-in Hold Time +// tDS = 2, // Data-in Setup Time +// tCKH = 1, // CKE Hold Time +// tCKS = 2, // CKE Setup Time +// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// $width (posedge Clk, tCH); +// $width (negedge Clk, tCL); +// $period (negedge Clk, tCK); +// $period (posedge Clk, tCK); +// $setuphold(posedge Clk, Cke, tCKS, tCKH); +// $setuphold(posedge Clk, Cs_n, tCMS, tCMH); +// $setuphold(posedge Clk, Cas_n, tCMS, tCMH); +// $setuphold(posedge Clk, Ras_n, tCMS, tCMH); +// $setuphold(posedge Clk, We_n, tCMS, tCMH); +// $setuphold(posedge Clk, Addr, tAS, tAH); +// $setuphold(posedge Clk, Ba, tAS, tAH); +// $setuphold(posedge Clk, Dqm, tCMS, tCMH); +// $setuphold(posedge Dq_chk, Dq, tDS, tDH); +// endspecify + +endmodule + diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_read/tb_sdram_read.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_read/tb_sdram_read.v new file mode 100644 index 0000000..1420491 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_read/tb_sdram_read.v @@ -0,0 +1,226 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : tb_sdram_read +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鏁版嵁璇绘ā鍧椾豢鐪 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module tb_sdram_read(); + +//********************************************************************// +//****************** Internal Signal and Defparam ********************// +//********************************************************************// + +//wire define +//clk_gen +wire clk_50m ; //PLL杈撳嚭50M鏃堕挓 +wire clk_100m ; //PLL杈撳嚭100M鏃堕挓 +wire clk_100m_shift ; //PLL杈撳嚭100M鏃堕挓,鐩镐綅鍋忕Щ-30deg +wire locked ; //PLL鏃堕挓閿佸畾淇″彿 +wire rst_n ; //澶嶄綅淇″彿,浣庢湁鏁 +//sdram_init +wire [3:0] init_cmd ; //鍒濆鍖栭樁娈垫寚浠 +wire [1:0] init_ba ; //鍒濆鍖栭樁娈礚-Bank鍦板潃 +wire [12:0] init_addr ; //鍒濆鍖栭樁娈靛湴鍧鎬荤嚎 +wire init_end ; //鍒濆鍖栧畬鎴愪俊鍙 +//sdram_write +wire [12:0] write_addr ; //鏁版嵁鍐欓樁娈靛湴鍧鎬荤嚎 +wire [1:0] write_ba ; //鏁版嵁鍐欓樁娈礚-Bank鍦板潃 +wire [3:0] write_cmd ; //鏁版嵁鍐欓樁娈垫寚浠 +wire [15:0] wr_sdram_data ; //鏁版嵁鍐欓樁娈靛啓鍏DRAM鏁版嵁 +wire wr_sdram_en ; //鏁版嵁鍐欓樁娈靛啓鏁版嵁鏈夋晥浣胯兘淇″彿 +wire wr_end ; //鏁版嵁鍐欓樁娈典竴娆＄獊鍙戝啓缁撴潫 +//sdram_read +wire [12:0] read_addr ; //鏁版嵁璇婚樁娈靛湴鍧鎬荤嚎 +wire [1:0] read_ba ; //鏁版嵁璇婚樁娈礚-Bank鍦板潃 +wire [3:0] read_cmd ; //鏁版嵁璇婚樁娈垫寚浠 +wire [15:0] sdram_data_out ; //鏁版嵁璇婚樁娈靛啓鍏DRAM鏁版嵁 +wire rd_end ; //鏁版嵁璇婚樁娈典竴娆＄獊鍙戝啓缁撴潫 +wire sdram_wr_ack ; //鏁版嵁鍐欓樁娈靛啓鍝嶅簲 +//sdram_addr +wire [12:0] sdram_addr ; //SDRAM鍦板潃鎬荤嚎 +wire [1:0] sdram_ba ; //SDRAML-Bank鍦板潃 +wire [3:0] sdram_cmd ; //SDRAM鎸囦护 +wire [15:0] sdram_dq ; //SDRAM鏁版嵁鎬荤嚎 + +wire [12:0] w_r_addr ; //鏁版嵁璇婚樁娈靛湴鍧鎬荤嚎 +wire [1:0] w_r_ba ; //鏁版嵁璇婚樁娈礚-Bank鍦板潃 +wire [3:0] w_r_cmd ; //鏁版嵁璇婚樁娈垫寚浠 + +//reg define +reg sys_clk ; //绯荤粺鏃堕挓 +reg sys_rst_n ; //澶嶄綅淇″彿 +reg wr_en ; //鍐欎娇鑳 +reg [15:0] wr_data_in ; //鍐欐暟鎹 +reg rd_en ; //璇讳娇鑳 + + +//defparam +//閲嶅畾涔変豢鐪熸ā鍨嬩腑鐨勭浉鍏冲弬鏁 +defparam sdram_model_plus_inst.addr_bits = 13; //鍦板潃浣嶅 +defparam sdram_model_plus_inst.data_bits = 16; //鏁版嵁浣嶅 +defparam sdram_model_plus_inst.col_bits = 9; //鍒楀湴鍧浣嶅 +defparam sdram_model_plus_inst.mem_sizes = 2*1024*1024; //L-Bank瀹归噺 + +//********************************************************************// +//**************************** Clk And Rst ***************************// +//********************************************************************// + +//鏃堕挓銆佸浣嶄俊鍙 +initial + begin + sys_clk = 1'b1 ; + sys_rst_n <= 1'b0 ; + #200 + sys_rst_n <= 1'b1 ; + end + +always #10 sys_clk = ~sys_clk; + +//rst_n:澶嶄綅淇″彿 +assign rst_n = sys_rst_n & locked; + +//wr_en锛氬啓鏁版嵁浣胯兘 +always@(posedge clk_100m or negedge rst_n) + if(rst_n == 1'b0) + wr_en <= 1'b1; + else if(wr_end == 1'b1) + wr_en <= 1'b0; + else + wr_en <= wr_en; + +//wr_data_in:鍐欐暟鎹 +always@(posedge clk_100m or negedge rst_n) + if(rst_n == 1'b0) + wr_data_in <= 16'd0; + else if(wr_data_in == 16'd10) + wr_data_in <= 16'd0; + else if(sdram_wr_ack == 1'b1) + wr_data_in <= wr_data_in + 1'b1; + else + wr_data_in <= wr_data_in; + +//rd_en:璇绘暟鎹娇鑳 +always@(posedge clk_100m or negedge rst_n) + if(rst_n == 1'b0) + rd_en <= 1'b0; + else if(rd_end == 1'b1) + rd_en <= 1'b0; + else if(wr_en == 1'b0) + rd_en <= 1'b1; + else + rd_en <= rd_en; + +//sdram_cmd,sdram_ba,sdram_addr +assign sdram_cmd = (init_end == 1'b1) ? w_r_cmd : init_cmd; +assign sdram_ba = (init_end == 1'b1) ? w_r_ba : init_ba; +assign sdram_addr = (init_end == 1'b1) ? w_r_addr : init_addr; + +//w_r_cmd,w_r_ba,w_r_addr +assign w_r_cmd = (wr_en == 1'b1) ? write_cmd : read_cmd; +assign w_r_ba = (wr_en == 1'b1) ? write_ba : read_ba; +assign w_r_addr = (wr_en == 1'b1) ? write_addr : read_addr; + +//wr_sdram_data +assign sdram_dq = (wr_sdram_en == 1'b1) ? wr_sdram_data : 16'hz; + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// + +//------------- clk_gen_inst ------------- +clk_gen clk_gen_inst ( + .inclk0 (sys_clk ), + .areset (~sys_rst_n ), + .c0 (clk_50m ), + .c1 (clk_100m ), + .c2 (clk_100m_shift ), + + .locked (locked ) +); + +//------------- sdram_init_inst ------------- +sdram_init sdram_init_inst( + + .sys_clk (clk_100m ), + .sys_rst_n (rst_n ), + + .init_cmd (init_cmd ), + .init_ba (init_ba ), + .init_addr (init_addr ), + .init_end (init_end ) + +); + +//------------- sdram_write_inst ------------- +sdram_write sdram_write_inst( + + .sys_clk (clk_100m ), + .sys_rst_n (rst_n ), + .init_end (init_end ), + .wr_en (wr_en ), + + .wr_addr (24'h000_000 ), + .wr_data (wr_data_in ), + .wr_burst_len (10'd10 ), + + .wr_ack (sdram_wr_ack ), + .wr_end (wr_end ), + .write_cmd (write_cmd ), + .write_ba (write_ba ), + .write_addr (write_addr ), + .wr_sdram_en (wr_sdram_en ), + .wr_sdram_data (wr_sdram_data ) + +); + +//------------- sdram_read_inst ------------- +sdram_read sdram_read_inst( + + .sys_clk (clk_100m ), + .sys_rst_n (rst_n ), + .init_end (init_end ), + .rd_en (rd_en ), + + .rd_addr (24'h000_000 ), + .rd_data (sdram_dq ), + .rd_burst_len (10'd10 ), + + .rd_ack ( ), + .rd_end (rd_end ), + .read_cmd (read_cmd ), + .read_ba (read_ba ), + .read_addr (read_addr ), + .rd_sdram_data (sdram_data_out ) + +); + +//-------------sdram_model_plus_inst------------- +sdram_model_plus sdram_model_plus_inst( + .Dq (sdram_dq ), + .Addr (sdram_addr ), + .Ba (sdram_ba ), + .Clk (clk_100m_shift ), + .Cke (1'b1 ), + .Cs_n (sdram_cmd[3] ), + .Ras_n (sdram_cmd[2] ), + .Cas_n (sdram_cmd[1] ), + .We_n (sdram_cmd[0] ), + .Dqm (2'b0 ), + .Debug (1'b1 ) + +); + +endmodule \ No newline at end of file diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_top/sdram_model_plus.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_top/sdram_model_plus.v new file mode 100644 index 0000000..4e51287 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_top/sdram_model_plus.v @@ -0,0 +1,1131 @@ +/*************************************************************************************** +作者： 李晟 +2003-08-27 V0.1 李晟 + + 添加内存模块倒空功能，在外部需要创建事件：sdram_r ,本SDRAM的内容将会按Bank 顺序damp out 至文件 + sdram_data.txt 中 +×××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××*/ +//2004-03-04 陈乃奎 修改原程序中将BANK的数据转存入TXT文件的格式 +//2004-03-16 陈乃奎 修改SDRAM 的初始化数据 +//2004/04/06 陈乃奎 将SDRAM的操作命令以字符形式表示，以便用MODELSIM监视 +//2004/04/19 陈乃奎 修改参数 parameter tAC = 8; +//2010/09/17 罗瑶 修改sdram的大小，数据位宽，dqm宽度; +/**************************************************************************************** +* +* File Name: sdram_model.V +* Version: 0.0f +* Date: July 8th, 1999 +* Model: BUS Functional +* Simulator: Model Technology (PC version 5.2e PE) +* +* Dependencies: None +* +* Author: Son P. Huynh +* Email: sphuynh@micron.com +* Phone: (208) 368-3825 +* Company: Micron Technology, Inc. +* Model: sdram_model (1Meg x 16 x 4 Banks) +* +* Description: 64Mb SDRAM Verilog model +* +* Limitation: - Doesn't check for 4096 cycle refresh +* +* Note: - Set simulator resolution to "ps" accuracy +* - Set Debug = 0 to disable $display messages +* +* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY +* WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY +* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR +* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT. +* +* Copyright ?1998 Micron Semiconductor Products, Inc. +* All rights researved +* +* Rev Author Phone Date Changes +* ---- ---------------------------- ---------- --------------------------------------- +* 0.0f Son Huynh 208-368-3825 07/08/1999 - Fix tWR = 1 Clk + 7.5 ns (Auto) +* Micron Technology Inc. - Fix tWR = 15 ns (Manual) +* - Fix tRP (Autoprecharge to AutoRefresh) +* +* 0.0a Son Huynh 208-368-3825 05/13/1998 - First Release (from 64Mb rev 0.0e) +* Micron Technology Inc. +****************************************************************************************/ + +`timescale 1ns / 100ps + +module sdram_model_plus (Dq, Addr, Ba, Clk, Cke, Cs_n, Ras_n, Cas_n, We_n, Dqm,Debug); + + parameter addr_bits = 11; + parameter data_bits = 32; + parameter col_bits = 8; + parameter mem_sizes = 1048576*2-1;//1 Meg + + inout [data_bits - 1 : 0] Dq; + input [addr_bits - 1 : 0] Addr; + input [1 : 0] Ba; + input Clk; + input Cke; + input Cs_n; + input Ras_n; + input Cas_n; + input We_n; + input [3 : 0] Dqm; //高低各8bit + //added by xzli + input Debug; + + reg [data_bits - 1 : 0] Bank0 [0 : mem_sizes];//存储器类型数据 + reg [data_bits - 1 : 0] Bank1 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank2 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank3 [0 : mem_sizes]; + + reg [1 : 0] Bank_addr [0 : 3]; // Bank Address Pipeline + reg [col_bits - 1 : 0] Col_addr [0 : 3]; // Column Address Pipeline + reg [3 : 0] Command [0 : 3]; // Command Operation Pipeline + reg [3 : 0] Dqm_reg0, Dqm_reg1; // DQM Operation Pipeline + reg [addr_bits - 1 : 0] B0_row_addr, B1_row_addr, B2_row_addr, B3_row_addr; + + reg [addr_bits - 1 : 0] Mode_reg; + reg [data_bits - 1 : 0] Dq_reg, Dq_dqm; + reg [col_bits - 1 : 0] Col_temp, Burst_counter; + + reg Act_b0, Act_b1, Act_b2, Act_b3; // Bank Activate + reg Pc_b0, Pc_b1, Pc_b2, Pc_b3; // Bank Precharge + + reg [1 : 0] Bank_precharge [0 : 3]; // Precharge Command + reg A10_precharge [0 : 3]; // Addr[10] = 1 (All banks) + reg Auto_precharge [0 : 3]; // RW AutoPrecharge (Bank) + reg Read_precharge [0 : 3]; // R AutoPrecharge + reg Write_precharge [0 : 3]; // W AutoPrecharge + integer Count_precharge [0 : 3]; // RW AutoPrecharge (Counter) + reg RW_interrupt_read [0 : 3]; // RW Interrupt Read with Auto Precharge + reg RW_interrupt_write [0 : 3]; // RW Interrupt Write with Auto Precharge + + reg Data_in_enable; + reg Data_out_enable; + + reg [1 : 0] Bank, Previous_bank; + reg [addr_bits - 1 : 0] Row; + reg [col_bits - 1 : 0] Col, Col_brst; + + // Internal system clock + reg CkeZ, Sys_clk; + + reg [21:0] dd; + + // Commands Decode + wire Active_enable = ~Cs_n & ~Ras_n & Cas_n & We_n; + wire Aref_enable = ~Cs_n & ~Ras_n & ~Cas_n & We_n; + wire Burst_term = ~Cs_n & Ras_n & Cas_n & ~We_n; + wire Mode_reg_enable = ~Cs_n & ~Ras_n & ~Cas_n & ~We_n; + wire Prech_enable = ~Cs_n & ~Ras_n & Cas_n & ~We_n; + wire Read_enable = ~Cs_n & Ras_n & ~Cas_n & We_n; + wire Write_enable = ~Cs_n & Ras_n & ~Cas_n & ~We_n; + + // Burst Length Decode + wire Burst_length_1 = ~Mode_reg[2] & ~Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_2 = ~Mode_reg[2] & ~Mode_reg[1] & Mode_reg[0]; + wire Burst_length_4 = ~Mode_reg[2] & Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_8 = ~Mode_reg[2] & Mode_reg[1] & Mode_reg[0]; + + // CAS Latency Decode + wire Cas_latency_2 = ~Mode_reg[6] & Mode_reg[5] & ~Mode_reg[4]; + wire Cas_latency_3 = ~Mode_reg[6] & Mode_reg[5] & Mode_reg[4]; + + // Write Burst Mode + wire Write_burst_mode = Mode_reg[9]; + + wire Debug; // Debug messages : 1 = On; 0 = Off + wire Dq_chk = Sys_clk & Data_in_enable; // Check setup/hold time for DQ + + reg [31:0] mem_d; + + event sdram_r,sdram_w,compare; + + + + + assign Dq = Dq_reg; // DQ buffer + + // Commands Operation + `define ACT 0 + `define NOP 1 + `define READ 2 + `define READ_A 3 + `define WRITE 4 + `define WRITE_A 5 + `define PRECH 6 + `define A_REF 7 + `define BST 8 + `define LMR 9 + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// parameter tAC = 8; //test 6.5 +// parameter tHZ = 7.0; +// parameter tOH = 2.7; +// parameter tMRD = 2.0; // 2 Clk Cycles +// parameter tRAS = 44.0; +// parameter tRC = 66.0; +// parameter tRCD = 20.0; +// parameter tRP = 20.0; +// parameter tRRD = 15.0; +// parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) +// parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Parameters for -7 (PC143) and CAS Latency = 3 + parameter tAC = 6.5; //test 6.5 + parameter tHZ = 5.5; + parameter tOH = 2; + parameter tMRD = 2.0; // 2 Clk Cycles + parameter tRAS = 48.0; + parameter tRC = 70.0; + parameter tRCD = 20.0; + parameter tRP = 20.0; + parameter tRRD = 14.0; + parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) + parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Check variable + integer MRD_chk; + integer WR_counter [0 : 3]; + time WR_chk [0 : 3]; + time RC_chk, RRD_chk; + time RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3; + time RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3; + time RP_chk0, RP_chk1, RP_chk2, RP_chk3; + + integer test_file; + + //*****display the command of the sdram************************************** + + parameter Mode_Reg_Set =4'b0000; + parameter Auto_Refresh =4'b0001; + parameter Row_Active =4'b0011; + parameter Pre_Charge =4'b0010; + parameter PreCharge_All =4'b0010; + parameter Write =4'b0100; + parameter Write_Pre =4'b0100; + parameter Read =4'b0101; + parameter Read_Pre =4'b0101; + parameter Burst_Stop =4'b0110; + parameter Nop =4'b0111; + parameter Dsel =4'b1111; + + wire [3:0] sdram_control; + reg cke_temp; + reg [8*13:1] sdram_command; + + always@(posedge Clk) + cke_temp<=Cke; + + assign sdram_control={Cs_n,Ras_n,Cas_n,We_n}; + + always@(sdram_control or cke_temp) + begin + case(sdram_control) + Mode_Reg_Set: sdram_command<="Mode_Reg_Set"; + Auto_Refresh: sdram_command<="Auto_Refresh"; + Row_Active: sdram_command<="Row_Active"; + Pre_Charge: sdram_command<="Pre_Charge"; + Burst_Stop: sdram_command<="Burst_Stop"; + Dsel: sdram_command<="Dsel"; + + Write: if(cke_temp==1) + sdram_command<="Write"; + else + sdram_command<="Write_suspend"; + + Read: if(cke_temp==1) + sdram_command<="Read"; + else + sdram_command<="Read_suspend"; + + Nop: if(cke_temp==1) + sdram_command<="Nop"; + else + sdram_command<="Self_refresh"; + + default: sdram_command<="Power_down"; + endcase + end + + //***************************************************** + + initial + begin + //test_file=$fopen("test_file.txt"); + end + + initial + begin + Dq_reg = {data_bits{1'bz}}; + {Data_in_enable, Data_out_enable} = 0; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b0000; + {WR_chk[0], WR_chk[1], WR_chk[2], WR_chk[3]} = 0; + {WR_counter[0], WR_counter[1], WR_counter[2], WR_counter[3]} = 0; + {RW_interrupt_read[0], RW_interrupt_read[1], RW_interrupt_read[2], RW_interrupt_read[3]} = 0; + {RW_interrupt_write[0], RW_interrupt_write[1], RW_interrupt_write[2], RW_interrupt_write[3]} = 0; + {MRD_chk, RC_chk, RRD_chk} = 0; + {RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3} = 0; + {RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3} = 0; + {RP_chk0, RP_chk1, RP_chk2, RP_chk3} = 0; + $timeformat (-9, 0, " ns", 12); + //$readmemh("bank0.txt", Bank0); + //$readmemh("bank1.txt", Bank1); + //$readmemh("bank2.txt", Bank2); + //$readmemh("bank3.txt", Bank3); +/* + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + Bank0[dd]=dd[data_bits - 1 : 0]; + Bank1[dd]=dd[data_bits - 1 : 0]+1; + Bank2[dd]=dd[data_bits - 1 : 0]+2; + Bank3[dd]=dd[data_bits - 1 : 0]+3; + end +*/ + initial_sdram(0); + end + + task initial_sdram; + + input data_sign; + reg [3:0] data_sign; + + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + mem_d = {data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign}; + if(data_bits==16) + begin + Bank0[dd]=mem_d[15:0]; + Bank1[dd]=mem_d[15:0]; + Bank2[dd]=mem_d[15:0]; + Bank3[dd]=mem_d[15:0]; + end + else if(data_bits==32) + begin + Bank0[dd]=mem_d[31:0]; + Bank1[dd]=mem_d[31:0]; + Bank2[dd]=mem_d[31:0]; + Bank3[dd]=mem_d[31:0]; + end + end + + endtask + + // System clock generator + always + begin + @(posedge Clk) + begin + Sys_clk = CkeZ; + CkeZ = Cke; + end + @(negedge Clk) + begin + Sys_clk = 1'b0; + end + end + + always @ (posedge Sys_clk) begin + // Internal Commamd Pipelined + Command[0] = Command[1]; + Command[1] = Command[2]; + Command[2] = Command[3]; + Command[3] = `NOP; + + Col_addr[0] = Col_addr[1]; + Col_addr[1] = Col_addr[2]; + Col_addr[2] = Col_addr[3]; + Col_addr[3] = {col_bits{1'b0}}; + + Bank_addr[0] = Bank_addr[1]; + Bank_addr[1] = Bank_addr[2]; + Bank_addr[2] = Bank_addr[3]; + Bank_addr[3] = 2'b0; + + Bank_precharge[0] = Bank_precharge[1]; + Bank_precharge[1] = Bank_precharge[2]; + Bank_precharge[2] = Bank_precharge[3]; + Bank_precharge[3] = 2'b0; + + A10_precharge[0] = A10_precharge[1]; + A10_precharge[1] = A10_precharge[2]; + A10_precharge[2] = A10_precharge[3]; + A10_precharge[3] = 1'b0; + + // Dqm pipeline for Read + Dqm_reg0 = Dqm_reg1; + Dqm_reg1 = Dqm; + + // Read or Write with Auto Precharge Counter + if (Auto_precharge[0] == 1'b1) begin + Count_precharge[0] = Count_precharge[0] + 1; + end + if (Auto_precharge[1] == 1'b1) begin + Count_precharge[1] = Count_precharge[1] + 1; + end + if (Auto_precharge[2] == 1'b1) begin + Count_precharge[2] = Count_precharge[2] + 1; + end + if (Auto_precharge[3] == 1'b1) begin + Count_precharge[3] = Count_precharge[3] + 1; + end + + // tMRD Counter + MRD_chk = MRD_chk + 1; + + // tWR Counter for Write + WR_counter[0] = WR_counter[0] + 1; + WR_counter[1] = WR_counter[1] + 1; + WR_counter[2] = WR_counter[2] + 1; + WR_counter[3] = WR_counter[3] + 1; + + // Auto Refresh + if (Aref_enable == 1'b1) begin + if (Debug) $display ("at time %t AREF : Auto Refresh", $time); + // Auto Refresh to Auto Refresh + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Auto Refresh", $time); + end + // Precharge to Auto Refresh + if (($time - RP_chk0 < tRP || $time - RP_chk1 < tRP || $time - RP_chk2 < tRP || $time - RP_chk3 < tRP)&&Debug) begin + $display ("at time %t ERROR: tRP violation during Auto Refresh", $time); + end + // Precharge to Refresh + if (Pc_b0 == 1'b0 || Pc_b1 == 1'b0 || Pc_b2 == 1'b0 || Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: All banks must be Precharge before Auto Refresh", $time); + end + // Record Current tRC time + RC_chk = $time; + end + + // Load Mode Register + if (Mode_reg_enable == 1'b1) begin + // Decode CAS Latency, Burst Length, Burst Type, and Write Burst Mode + if (Pc_b0 == 1'b1 && Pc_b1 == 1'b1 && Pc_b2 == 1'b1 && Pc_b3 == 1'b1) begin + Mode_reg = Addr; + if (Debug) begin + $display ("at time %t LMR : Load Mode Register", $time); + // CAS Latency + if (Addr[6 : 4] == 3'b010) + $display (" CAS Latency = 2"); + else if (Addr[6 : 4] == 3'b011) + $display (" CAS Latency = 3"); + else + $display (" CAS Latency = Reserved"); + // Burst Length + if (Addr[2 : 0] == 3'b000) + $display (" Burst Length = 1"); + else if (Addr[2 : 0] == 3'b001) + $display (" Burst Length = 2"); + else if (Addr[2 : 0] == 3'b010) + $display (" Burst Length = 4"); + else if (Addr[2 : 0] == 3'b011) + $display (" Burst Length = 8"); + else if (Addr[3 : 0] == 4'b0111) + $display (" Burst Length = Full"); + else + $display (" Burst Length = Reserved"); + // Burst Type + if (Addr[3] == 1'b0) + $display (" Burst Type = Sequential"); + else if (Addr[3] == 1'b1) + $display (" Burst Type = Interleaved"); + else + $display (" Burst Type = Reserved"); + // Write Burst Mode + if (Addr[9] == 1'b0) + $display (" Write Burst Mode = Programmed Burst Length"); + else if (Addr[9] == 1'b1) + $display (" Write Burst Mode = Single Location Access"); + else + $display (" Write Burst Mode = Reserved"); + end + end else begin + $display ("at time %t ERROR: all banks must be Precharge before Load Mode Register", $time); + end + // REF to LMR + if ($time - RC_chk < tRC) begin + $display ("at time %t ERROR: tRC violation during Load Mode Register", $time); + end + // LMR to LMR + if (MRD_chk < tMRD) begin + $display ("at time %t ERROR: tMRD violation during Load Mode Register", $time); + end + MRD_chk = 0; + end + + // Active Block (Latch Bank Address and Row Address) + if (Active_enable == 1'b1) begin + if (Ba == 2'b00 && Pc_b0 == 1'b1) begin + {Act_b0, Pc_b0} = 2'b10; + B0_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk0 = $time; + RAS_chk0 = $time; + if (Debug) $display ("at time %t ACT : Bank = 0 Row = %d", $time, Addr); + // Precharge to Activate Bank 0 + if ($time - RP_chk0 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 0", $time); + end + end else if (Ba == 2'b01 && Pc_b1 == 1'b1) begin + {Act_b1, Pc_b1} = 2'b10; + B1_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk1 = $time; + RAS_chk1 = $time; + if (Debug) $display ("at time %t ACT : Bank = 1 Row = %d", $time, Addr); + // Precharge to Activate Bank 1 + if ($time - RP_chk1 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 1", $time); + end + end else if (Ba == 2'b10 && Pc_b2 == 1'b1) begin + {Act_b2, Pc_b2} = 2'b10; + B2_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk2 = $time; + RAS_chk2 = $time; + if (Debug) $display ("at time %t ACT : Bank = 2 Row = %d", $time, Addr); + // Precharge to Activate Bank 2 + if ($time - RP_chk2 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 2", $time); + end + end else if (Ba == 2'b11 && Pc_b3 == 1'b1) begin + {Act_b3, Pc_b3} = 2'b10; + B3_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk3 = $time; + RAS_chk3 = $time; + if (Debug) $display ("at time %t ACT : Bank = 3 Row = %d", $time, Addr); + // Precharge to Activate Bank 3 + if ($time - RP_chk3 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 3", $time); + end + end else if (Ba == 2'b00 && Pc_b0 == 1'b0) begin + $display ("at time %t ERROR: Bank 0 is not Precharged.", $time); + end else if (Ba == 2'b01 && Pc_b1 == 1'b0) begin + $display ("at time %t ERROR: Bank 1 is not Precharged.", $time); + end else if (Ba == 2'b10 && Pc_b2 == 1'b0) begin + $display ("at time %t ERROR: Bank 2 is not Precharged.", $time); + end else if (Ba == 2'b11 && Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: Bank 3 is not Precharged.", $time); + end + // Active Bank A to Active Bank B + if ((Previous_bank != Ba) && ($time - RRD_chk < tRRD)) begin + $display ("at time %t ERROR: tRRD violation during Activate bank = %d", $time, Ba); + end + // Load Mode Register to Active + if (MRD_chk < tMRD ) begin + $display ("at time %t ERROR: tMRD violation during Activate bank = %d", $time, Ba); + end + // Auto Refresh to Activate + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Activate bank = %d", $time, Ba); + end + // Record variables for checking violation + RRD_chk = $time; + Previous_bank = Ba; + end + + // Precharge Block + if (Prech_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b1111; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + RP_chk0 = $time; + RP_chk1 = $time; + RP_chk2 = $time; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = ALL",$time); + // Activate to Precharge all banks + if (($time - RAS_chk0 < tRAS) || ($time - RAS_chk1 < tRAS) || + ($time - RAS_chk2 < tRAS) || ($time - RAS_chk3 < tRAS)) begin + $display ("at time %t ERROR: tRAS violation during Precharge all bank", $time); + end + // tWR violation check for write + if (($time - WR_chk[0] < tWRp) || ($time - WR_chk[1] < tWRp) || + ($time - WR_chk[2] < tWRp) || ($time - WR_chk[3] < tWRp)) begin + $display ("at time %t ERROR: tWR violation during Precharge all bank", $time); + end + end else if (Addr[10] == 1'b0) begin + if (Ba == 2'b00) begin + {Pc_b0, Act_b0} = 2'b10; + RP_chk0 = $time; + if (Debug) $display ("at time %t PRE : Bank = 0",$time); + // Activate to Precharge Bank 0 + if ($time - RAS_chk0 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 0", $time); + end + end else if (Ba == 2'b01) begin + {Pc_b1, Act_b1} = 2'b10; + RP_chk1 = $time; + if (Debug) $display ("at time %t PRE : Bank = 1",$time); + // Activate to Precharge Bank 1 + if ($time - RAS_chk1 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 1", $time); + end + end else if (Ba == 2'b10) begin + {Pc_b2, Act_b2} = 2'b10; + RP_chk2 = $time; + if (Debug) $display ("at time %t PRE : Bank = 2",$time); + // Activate to Precharge Bank 2 + if ($time - RAS_chk2 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 2", $time); + end + end else if (Ba == 2'b11) begin + {Pc_b3, Act_b3} = 2'b10; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = 3",$time); + // Activate to Precharge Bank 3 + if ($time - RAS_chk3 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 3", $time); + end + end + // tWR violation check for write + if ($time - WR_chk[Ba] < tWRp) begin + $display ("at time %t ERROR: tWR violation during Precharge bank %d", $time, Ba); + end + end + // Terminate a Write Immediately (if same bank or all banks) + if (Data_in_enable == 1'b1 && (Bank == Ba || Addr[10] == 1'b1)) begin + Data_in_enable = 1'b0; + end + // Precharge Command Pipeline for Read + if (Cas_latency_3 == 1'b1) begin + Command[2] = `PRECH; + Bank_precharge[2] = Ba; + A10_precharge[2] = Addr[10]; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `PRECH; + Bank_precharge[1] = Ba; + A10_precharge[1] = Addr[10]; + end + end + + // Burst terminate + if (Burst_term == 1'b1) begin + // Terminate a Write Immediately + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + // Terminate a Read Depend on CAS Latency + if (Cas_latency_3 == 1'b1) begin + Command[2] = `BST; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `BST; + end + if (Debug) $display ("at time %t BST : Burst Terminate",$time); + end + + // Read, Write, Column Latch + if (Read_enable == 1'b1 || Write_enable == 1'b1) begin + // Check to see if bank is open (ACT) + if ((Ba == 2'b00 && Pc_b0 == 1'b1) || (Ba == 2'b01 && Pc_b1 == 1'b1) || + (Ba == 2'b10 && Pc_b2 == 1'b1) || (Ba == 2'b11 && Pc_b3 == 1'b1)) begin + $display("at time %t ERROR: Cannot Read or Write - Bank %d is not Activated", $time, Ba); + end + // Activate to Read or Write + if ((Ba == 2'b00) && ($time - RCD_chk0 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 0", $time); + if ((Ba == 2'b01) && ($time - RCD_chk1 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 1", $time); + if ((Ba == 2'b10) && ($time - RCD_chk2 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 2", $time); + if ((Ba == 2'b11) && ($time - RCD_chk3 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 3", $time); + // Read Command + if (Read_enable == 1'b1) begin + // CAS Latency pipeline + if (Cas_latency_3 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[2] = `READ_A; + end else begin + Command[2] = `READ; + end + Col_addr[2] = Addr; + Bank_addr[2] = Ba; + end else if (Cas_latency_2 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[1] = `READ_A; + end else begin + Command[1] = `READ; + end + Col_addr[1] = Addr; + Bank_addr[1] = Ba; + end + + // Read interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write Command + end else if (Write_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[0] = `WRITE_A; + end else begin + Command[0] = `WRITE; + end + Col_addr[0] = Addr; + Bank_addr[0] = Ba; + + // Write interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write interrupt Read (terminate Read immediately) + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + // Interrupting a Write with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Write_precharge[Bank] == 1'b1) begin + RW_interrupt_write[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Write Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Interrupting a Read with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Read_precharge[Bank] == 1'b1) begin + RW_interrupt_read[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Read Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Read or Write with Auto Precharge + if (Addr[10] == 1'b1) begin + Auto_precharge[Ba] = 1'b1; + Count_precharge[Ba] = 0; + if (Read_enable == 1'b1) begin + Read_precharge[Ba] = 1'b1; + end else if (Write_enable == 1'b1) begin + Write_precharge[Ba] = 1'b1; + end + end + end + + // Read with Auto Precharge Calculation + // The device start internal precharge: + // 1. CAS Latency - 1 cycles before last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + if ((Auto_precharge[0] == 1'b1) && (Read_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + ((Burst_length_1 == 1'b1 && Count_precharge[0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge[0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[0] >= 8))) || + (RW_interrupt_read[0] == 1'b1)) begin // Case 3 + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + Auto_precharge[0] = 1'b0; + Read_precharge[0] = 1'b0; + RW_interrupt_read[0] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + if ((Auto_precharge[1] == 1'b1) && (Read_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[1] >= 8))) || + (RW_interrupt_read[1] == 1'b1)) begin + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + Auto_precharge[1] = 1'b0; + Read_precharge[1] = 1'b0; + RW_interrupt_read[1] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + if ((Auto_precharge[2] == 1'b1) && (Read_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[2] >= 8))) || + (RW_interrupt_read[2] == 1'b1)) begin + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + Auto_precharge[2] = 1'b0; + Read_precharge[2] = 1'b0; + RW_interrupt_read[2] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + if ((Auto_precharge[3] == 1'b1) && (Read_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[3] >= 8))) || + (RW_interrupt_read[3] == 1'b1)) begin + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + Auto_precharge[3] = 1'b0; + Read_precharge[3] = 1'b0; + RW_interrupt_read[3] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + + // Internal Precharge or Bst + if (Command[0] == `PRECH) begin // Precharge terminate a read with same bank or all banks + if (Bank_precharge[0] == Bank || A10_precharge[0] == 1'b1) begin + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + end else if (Command[0] == `BST) begin // BST terminate a read to current bank + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + if (Data_out_enable == 1'b0) begin + Dq_reg <= #tOH {data_bits{1'bz}}; + end + + // Detect Read or Write command + if (Command[0] == `READ || Command[0] == `READ_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b0; + Data_out_enable = 1'b1; + end else if (Command[0] == `WRITE || Command[0] == `WRITE_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b1; + Data_out_enable = 1'b0; + end + + // DQ buffer (Driver/Receiver) + if (Data_in_enable == 1'b1) begin // Writing Data to Memory + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + // Dqm operation + if (Dqm[0] == 1'b0) Dq_dqm [ 7 : 0] = Dq [ 7 : 0]; + if (Dqm[1] == 1'b0) Dq_dqm [15 : 8] = Dq [15 : 8]; + //if (Dqm[2] == 1'b0) Dq_dqm [23 : 16] = Dq [23 : 16]; + // if (Dqm[3] == 1'b0) Dq_dqm [31 : 24] = Dq [31 : 24]; + // Write to memory + if (Bank == 2'b00) Bank0 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b01) Bank1 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b10) Bank2 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11) Bank3 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11 && Row==10'h3 && Col[7:4]==4'h4) + $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + //$fdisplay(test_file,"bank:%h row:%h col:%h write:%h",Bank,Row,Col,Dq_dqm); + // Output result + if (Dqm == 4'b1111) begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_dqm, Dqm); + // Record tWR time and reset counter + WR_chk [Bank] = $time; + WR_counter [Bank] = 0; + end + // Advance burst counter subroutine + #tHZ Burst; + end else if (Data_out_enable == 1'b1) begin // Reading Data from Memory + //$display("%h , %h, %h",Bank0,Row,Col); + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + + // Dqm operation + if (Dqm_reg0[0] == 1'b1) Dq_dqm [ 7 : 0] = 8'bz; + if (Dqm_reg0[1] == 1'b1) Dq_dqm [15 : 8] = 8'bz; + if (Dqm_reg0[2] == 1'b1) Dq_dqm [23 : 16] = 8'bz; + if (Dqm_reg0[3] == 1'b1) Dq_dqm [31 : 24] = 8'bz; + // Display result + Dq_reg [data_bits - 1 : 0] = #tAC Dq_dqm [data_bits - 1 : 0]; + if (Dqm_reg0 == 4'b1111) begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_reg, Dqm_reg0); + end + // Advance burst counter subroutine + Burst; + end + end + + // Write with Auto Precharge Calculation + // The device start internal precharge: + // 1. tWR Clock after last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + always @ (WR_counter[0]) begin + if ((Auto_precharge[0] == 1'b1) && (Write_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge [0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [0] >= 8))) || + (RW_interrupt_write[0] == 1'b1 && WR_counter[0] >= 2)) begin // Case 3 (stop count when interrupt) + Auto_precharge[0] = 1'b0; + Write_precharge[0] = 1'b0; + RW_interrupt_write[0] = 1'b0; + #tWRa; // Wait for tWR + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + end + always @ (WR_counter[1]) begin + if ((Auto_precharge[1] == 1'b1) && (Write_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [1] >= 8))) || + (RW_interrupt_write[1] == 1'b1 && WR_counter[1] >= 2)) begin + Auto_precharge[1] = 1'b0; + Write_precharge[1] = 1'b0; + RW_interrupt_write[1] = 1'b0; + #tWRa; // Wait for tWR + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + end + always @ (WR_counter[2]) begin + if ((Auto_precharge[2] == 1'b1) && (Write_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [2] >= 8))) || + (RW_interrupt_write[2] == 1'b1 && WR_counter[2] >= 2)) begin + Auto_precharge[2] = 1'b0; + Write_precharge[2] = 1'b0; + RW_interrupt_write[2] = 1'b0; + #tWRa; // Wait for tWR + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + end + always @ (WR_counter[3]) begin + if ((Auto_precharge[3] == 1'b1) && (Write_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [3] >= 8))) || + (RW_interrupt_write[3] == 1'b1 && WR_counter[3] >= 2)) begin + Auto_precharge[3] = 1'b0; + Write_precharge[3] = 1'b0; + RW_interrupt_write[3] = 1'b0; + #tWRa; // Wait for tWR + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + end + + task Burst; + begin + // Advance Burst Counter + Burst_counter = Burst_counter + 1; + + // Burst Type + if (Mode_reg[3] == 1'b0) begin // Sequential Burst + Col_temp = Col + 1; + end else if (Mode_reg[3] == 1'b1) begin // Interleaved Burst + Col_temp[2] = Burst_counter[2] ^ Col_brst[2]; + Col_temp[1] = Burst_counter[1] ^ Col_brst[1]; + Col_temp[0] = Burst_counter[0] ^ Col_brst[0]; + end + + // Burst Length + if (Burst_length_2) begin // Burst Length = 2 + Col [0] = Col_temp [0]; + end else if (Burst_length_4) begin // Burst Length = 4 + Col [1 : 0] = Col_temp [1 : 0]; + end else if (Burst_length_8) begin // Burst Length = 8 + Col [2 : 0] = Col_temp [2 : 0]; + end else begin // Burst Length = FULL + Col = Col_temp; + end + + // Burst Read Single Write + if (Write_burst_mode == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Data Counter + if (Burst_length_1 == 1'b1) begin + if (Burst_counter >= 1) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_2 == 1'b1) begin + if (Burst_counter >= 2) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_4 == 1'b1) begin + if (Burst_counter >= 4) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_8 == 1'b1) begin + if (Burst_counter >= 8) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end + end + endtask + + //**********************将SDRAM内的数据直接输出到外部文件*******************************// + +/* + integer sdram_data,ind; + + + always@(sdram_r) + begin + sdram_data=$fopen("sdram_data.txt"); + $display("Sdram dampout begin ",sdram_data); +// $fdisplay(sdram_data,"Bank0："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank0[ind]); +// $fdisplay(sdram_data,"Bank1："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank1[ind]); +// $fdisplay(sdram_data,"Bank2："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank2[ind]); +// $fdisplay(sdram_data,"Bank3："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank3[ind]); + + $fclose("sdram_data.txt"); + //->compare; + end +*/ + integer sdram_data,sdram_mem; + reg [23:0] aa,cc; + reg [18:0] bb,ee; + + always@(sdram_r) + begin + $display("Sdram dampout begin ",$realtime); + sdram_data=$fopen("sdram_data.txt"); + for(aa=0;aa<4*(mem_sizes+1);aa=aa+1) + begin + bb=aa[18:0]; + if(aa<=mem_sizes) + $fdisplay(sdram_data,"%0d %0h",aa,Bank0[bb]); + else if(aa<=2*mem_sizes+1) + $fdisplay(sdram_data,"%0d %0h",aa,Bank1[bb]); + else if(aa<=3*mem_sizes+2) + $fdisplay(sdram_data,"%0d %0h",aa,Bank2[bb]); + else + $fdisplay(sdram_data,"%0d %0h",aa,Bank3[bb]); + end + $fclose("sdram_data.txt"); + + sdram_mem=$fopen("sdram_mem.txt"); + for(cc=0;cc<4*(mem_sizes+1);cc=cc+1) + begin + ee=cc[18:0]; + if(cc<=mem_sizes) + $fdisplay(sdram_mem,"%0h",Bank0[ee]); + else if(cc<=2*mem_sizes+1) + $fdisplay(sdram_mem,"%0h",Bank1[ee]); + else if(cc<=3*mem_sizes+2) + $fdisplay(sdram_mem,"%0h",Bank2[ee]); + else + $fdisplay(sdram_mem,"%0h",Bank3[ee]); + end + $fclose("sdram_mem.txt"); + + end + + + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// specify +// specparam +//// tAH = 0.8, // Addr, Ba Hold Time +//// tAS = 1.5, // Addr, Ba Setup Time +//// tCH = 2.5, // Clock High-Level Width +//// tCL = 2.5, // Clock Low-Level Width +////// tCK = 10.0, // Clock Cycle Time 100mhz +////// tCK = 7.5, // Clock Cycle Time 133mhz +//// tCK = 7, // Clock Cycle Time 143mhz +//// tDH = 0.8, // Data-in Hold Time +//// tDS = 1.5, // Data-in Setup Time +//// tCKH = 0.8, // CKE Hold Time +//// tCKS = 1.5, // CKE Setup Time +//// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +//// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// tAH = 1, // Addr, Ba Hold Time +// tAS = 1.5, // Addr, Ba Setup Time +// tCH = 1, // Clock High-Level Width +// tCL = 3, // Clock Low-Level Width +//// tCK = 10.0, // Clock Cycle Time 100mhz +//// tCK = 7.5, // Clock Cycle Time 133mhz +// tCK = 7, // Clock Cycle Time 143mhz +// tDH = 1, // Data-in Hold Time +// tDS = 2, // Data-in Setup Time +// tCKH = 1, // CKE Hold Time +// tCKS = 2, // CKE Setup Time +// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// $width (posedge Clk, tCH); +// $width (negedge Clk, tCL); +// $period (negedge Clk, tCK); +// $period (posedge Clk, tCK); +// $setuphold(posedge Clk, Cke, tCKS, tCKH); +// $setuphold(posedge Clk, Cs_n, tCMS, tCMH); +// $setuphold(posedge Clk, Cas_n, tCMS, tCMH); +// $setuphold(posedge Clk, Ras_n, tCMS, tCMH); +// $setuphold(posedge Clk, We_n, tCMS, tCMH); +// $setuphold(posedge Clk, Addr, tAS, tAH); +// $setuphold(posedge Clk, Ba, tAS, tAH); +// $setuphold(posedge Clk, Dqm, tCMS, tCMH); +// $setuphold(posedge Dq_chk, Dq, tDS, tDH); +// endspecify + +endmodule + diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_top/tb_sdram_top.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_top/tb_sdram_top.v new file mode 100644 index 0000000..c9a04b6 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_top/tb_sdram_top.v @@ -0,0 +1,231 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : tb_sdram_top +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鎺у埗鍣ㄩ《灞傛ā鍧椾豢鐪 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module tb_sdram_top(); + +//********************************************************************// +//****************** Internal Signal and Defparam ********************// +//********************************************************************// +//wire define +//clk_gen +wire clk_50m ; //PLL杈撳嚭50M鏃堕挓 +wire clk_100m ; //PLL杈撳嚭100M鏃堕挓 +wire clk_100m_shift ; //PLL杈撳嚭100M鏃堕挓,鐩镐綅鍋忕Щ-30deg +wire locked ; //PLL鏃堕挓閿佸畾淇″彿 +wire rst_n ; //澶嶄綅淇″彿,浣庢湁鏁 +//sdram +wire sdram_clk ; //SDRAM鏃堕挓 +wire sdram_cke ; //SDRAM鏃堕挓浣胯兘淇″彿 +wire sdram_cs_n ; //SDRAM鐗囬変俊鍙 +wire sdram_ras_n ; //SDRAM琛岄夐氫俊鍙 +wire sdram_cas_n ; //SDRAM鍒楅夐淇″彿 +wire sdram_we_n ; //SDRAM鍐欎娇鑳戒俊鍙 +wire [1:0] sdram_ba ; //SDRAM L-Bank鍦板潃 +wire [12:0] sdram_addr ; //SDRAM鍦板潃鎬荤嚎 +wire [15:0] sdram_dq ; //SDRAM鏁版嵁鎬荤嚎 +wire sdram_dqm ; //SDRAM鏁版嵁鎬荤嚎 +//sdram_ctrl +wire init_end ; //鍒濆鍖栧畬鎴愪俊鍙 +wire sdram_wr_ack ; //鏁版嵁鍐欓樁娈靛啓鍝嶅簲 +wire sdram_rd_ack ; //鏁版嵁璇婚樁娈靛搷搴 + +wire [9:0] rd_fifo_num ; //fifo_ctrl妯″潡涓fifo涓殑鏁版嵁閲 +wire [15:0] rfifo_rd_data ; //fifo_ctrl妯″潡涓fifo璇绘暟鎹 + +//reg define +reg sys_clk ; //绯荤粺鏃堕挓 +reg sys_rst_n ; //澶嶄綅淇″彿 +reg wr_en ; //鍐欎娇鑳 +reg wr_en_dly ; //鍐欎娇鑳芥墦鎷 +reg [15:0] wr_data_in ; //鍐欐暟鎹 +reg rd_en ; //璇讳娇鑳 +reg [2:0] cnt_wr_wait ; //鏁版嵁鍐欏叆闂撮殧璁℃暟 +reg [3:0] cnt_rd_data ; //璇诲嚭鏁版嵁璁℃暟 +reg wr_data_flag ; //fifo_ctrl妯″潡涓啓fifo鍐欎娇鑳 +reg read_valid ; //璇绘湁鏁堜俊鍙 + +//defparam +//閲嶅畾涔変豢鐪熸ā鍨嬩腑鐨勭浉鍏冲弬鏁 +defparam sdram_model_plus_inst.addr_bits = 13; //鍦板潃浣嶅 +defparam sdram_model_plus_inst.data_bits = 16; //鏁版嵁浣嶅 +defparam sdram_model_plus_inst.col_bits = 9; //鍒楀湴鍧浣嶅 +defparam sdram_model_plus_inst.mem_sizes = 2*1024*1024; //L-Bank瀹归噺 + +//閲嶅畾涔夎嚜鍔ㄥ埛鏂版ā鍧楄嚜鍔ㄥ埛鏂伴棿闅旀椂闂磋鏁版渶澶у +defparam sdram_top_inst.sdram_ctrl_inst.sdram_a_ref_inst.CNT_REF_MAX = 40; + +//********************************************************************// +//***************************** Main Code ****************************// +//********************************************************************// + +//鏃堕挓銆佸浣嶄俊鍙 +initial + begin + sys_clk = 1'b1 ; + sys_rst_n <= 1'b0 ; + #200 + sys_rst_n <= 1'b1 ; + end + +always #10 sys_clk = ~sys_clk; + +//rst_n:澶嶄綅淇″彿 +assign rst_n = sys_rst_n & locked; + +//wr_en:鍐欐暟鎹娇鑳 +always@(posedge clk_50m or negedge rst_n) + if(rst_n == 1'b0) + wr_en <= 1'b1; + else if(wr_data_in == 10'd10) + wr_en <= 1'b0; + else + wr_en <= wr_en; + +//cnt_wr_wait:鏁版嵁鍐欏叆闂撮殧璁℃暟 +always@(posedge clk_50m or negedge rst_n) + if(rst_n == 1'b0) + cnt_wr_wait <= 3'd0; + else if(wr_en == 1'b1) + cnt_wr_wait <= cnt_wr_wait + 1'b1; + else + cnt_wr_wait <= 3'd0; + +//wr_data_flag:fifo_ctrl妯″潡涓啓fifo鍐欎娇鑳 +always@(posedge clk_50m or negedge rst_n) + if(rst_n == 1'b0) + wr_data_flag <= 1'b0; + else if(cnt_wr_wait == 3'd7) + wr_data_flag <= 1'b1; + else + wr_data_flag <= 1'b0; + +//read_valid:鏁版嵁璇讳娇鑳 +always@(posedge clk_50m or negedge rst_n) + if(rst_n == 1'b0) + read_valid <= 1'b1; + else if(rd_fifo_num == 10'd10) + read_valid <= 1'b0; + +//wr_en_dly:鍐欐暟鎹娇鑳芥墦鎷 +always@(posedge clk_50m or negedge rst_n) + if(rst_n == 1'b0) + wr_en_dly <= 1'b0; + else + wr_en_dly <= wr_en; + +//wr_data_in:鍐欐暟鎹 +always@(posedge clk_50m or negedge rst_n) + if(rst_n == 1'b0) + wr_data_in <= 16'd0; + else if(cnt_wr_wait == 3'd7) + wr_data_in <= wr_data_in + 1'b1; + else + wr_data_in <= wr_data_in; + +//rd_en:璇绘暟鎹娇鑳 +always@(posedge clk_50m or negedge rst_n) + if(rst_n == 1'b0) + rd_en <= 1'b0; + else if(cnt_rd_data == 4'd9) + rd_en <= 1'd0; + else if((wr_en == 1'b0) && (rd_fifo_num == 10'd10)) + rd_en <= 1'b1; + else + rd_en <= rd_en; + +//cnt_rd_data:璇诲嚭鏁版嵁璁℃暟 +always@(posedge clk_50m or negedge rst_n) + if(rst_n == 1'b0) + cnt_rd_data <= 4'd0; + else if(rd_en == 1'b1) + cnt_rd_data <= cnt_rd_data + 1'b1; + else + cnt_rd_data <= 4'd0; + + + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// + +//------------- clk_gen_inst ------------- +clk_gen clk_gen_inst ( + .inclk0 (sys_clk ), + .areset (~sys_rst_n ), + .c0 (clk_50m ), + .c1 (clk_100m ), + .c2 (clk_100m_shift ), + + .locked (locked ) +); + +//------------- sdram_top_inst ------------- +sdram_top sdram_top_inst( + .sys_clk (clk_100m ), //sdram 鎺у埗鍣ㄥ弬鑰冩椂閽 + .clk_out (clk_100m_shift ), //鐢ㄤ簬杈撳嚭鐨勭浉浣嶅亸绉绘椂閽 + .sys_rst_n (rst_n ), //绯荤粺澶嶄綅 +//鐢ㄦ埛鍐欑鍙 + .wr_fifo_wr_clk (clk_50m ), //鍐欑鍙IFO: 鍐欐椂閽 + .wr_fifo_wr_req (wr_data_flag ), //鍐欑鍙IFO: 鍐欎娇鑳 + .wr_fifo_wr_data (wr_data_in ), //鍐欑鍙IFO: 鍐欐暟鎹 + .sdram_wr_b_addr (24'd0 ), //鍐橲DRAM鐨勯鍦板潃 + .sdram_wr_e_addr (24'd10 ), //鍐橲DRAM鐨勬湯鍦板潃 + .wr_burst_len (10'd10 ), //鍐橲DRAM鏃剁殑鏁版嵁绐佸彂闀垮害 + .wr_rst (~rst_n ), //鍐欏湴鍧澶嶄綅淇″彿 +//鐢ㄦ埛璇荤鍙 + .rd_fifo_rd_clk (clk_50m ), //璇荤鍙IFO: 璇绘椂閽 + .rd_fifo_rd_req (rd_en ), //璇荤鍙IFO: 璇讳娇鑳 + .rd_fifo_rd_data (rfifo_rd_data ), //璇荤鍙IFO: 璇绘暟鎹 + .sdram_rd_b_addr (24'd0 ), //璇籗DRAM鐨勯鍦板潃 + .sdram_rd_e_addr (24'd10 ), //璇籗DRAM鐨勬湯鍦板潃 + .rd_burst_len (10'd10 ), //浠嶴DRAM涓鏁版嵁鏃剁殑绐佸彂闀垮害 + .rd_rst (~rst_n ), //璇诲湴鍧澶嶄綅淇″彿 + .rd_fifo_num (rd_fifo_num ), //璇籪ifo涓殑鏁版嵁閲 +//鐢ㄦ埛鎺у埗绔彛 + .read_valid (read_valid ), //SDRAM 璇讳娇鑳 +//SDRAM 鑺墖鎺ュ彛 + .sdram_clk (sdram_clk ), //SDRAM 鑺墖鏃堕挓 + .sdram_cke (sdram_cke ), //SDRAM 鏃堕挓鏈夋晥 + .sdram_cs_n (sdram_cs_n ), //SDRAM 鐗囬 + .sdram_ras_n (sdram_ras_n ), //SDRAM 琛屾湁鏁 + .sdram_cas_n (sdram_cas_n ), //SDRAM 鍒楁湁鏁 + .sdram_we_n (sdram_we_n ), //SDRAM 鍐欐湁鏁 + .sdram_ba (sdram_ba ), //SDRAM Bank鍦板潃 + .sdram_addr (sdram_addr ), //SDRAM 琛/鍒楀湴鍧 + .sdram_dq (sdram_dq ), //SDRAM 鏁版嵁 + .sdram_dqm (sdram_dqm ) //SDRAM 鏁版嵁鎺╃爜 +); + +//-------------sdram_model_plus_inst------------- +sdram_model_plus sdram_model_plus_inst( + .Dq (sdram_dq ), + .Addr (sdram_addr ), + .Ba (sdram_ba ), + .Clk (sdram_clk ), + .Cke (sdram_cke ), + .Cs_n (sdram_cs_n ), + .Ras_n (sdram_ras_n ), + .Cas_n (sdram_cas_n ), + .We_n (sdram_we_n ), + .Dqm (2'b0 ), + .Debug (1'b1 ) + +); + +endmodule \ No newline at end of file diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_write/sdram_model_plus.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_write/sdram_model_plus.v new file mode 100644 index 0000000..4e51287 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_write/sdram_model_plus.v @@ -0,0 +1,1131 @@ +/*************************************************************************************** +作者： 李晟 +2003-08-27 V0.1 李晟 + + 添加内存模块倒空功能，在外部需要创建事件：sdram_r ,本SDRAM的内容将会按Bank 顺序damp out 至文件 + sdram_data.txt 中 +×××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××××*/ +//2004-03-04 陈乃奎 修改原程序中将BANK的数据转存入TXT文件的格式 +//2004-03-16 陈乃奎 修改SDRAM 的初始化数据 +//2004/04/06 陈乃奎 将SDRAM的操作命令以字符形式表示，以便用MODELSIM监视 +//2004/04/19 陈乃奎 修改参数 parameter tAC = 8; +//2010/09/17 罗瑶 修改sdram的大小，数据位宽，dqm宽度; +/**************************************************************************************** +* +* File Name: sdram_model.V +* Version: 0.0f +* Date: July 8th, 1999 +* Model: BUS Functional +* Simulator: Model Technology (PC version 5.2e PE) +* +* Dependencies: None +* +* Author: Son P. Huynh +* Email: sphuynh@micron.com +* Phone: (208) 368-3825 +* Company: Micron Technology, Inc. +* Model: sdram_model (1Meg x 16 x 4 Banks) +* +* Description: 64Mb SDRAM Verilog model +* +* Limitation: - Doesn't check for 4096 cycle refresh +* +* Note: - Set simulator resolution to "ps" accuracy +* - Set Debug = 0 to disable $display messages +* +* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY +* WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY +* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR +* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT. +* +* Copyright ?1998 Micron Semiconductor Products, Inc. +* All rights researved +* +* Rev Author Phone Date Changes +* ---- ---------------------------- ---------- --------------------------------------- +* 0.0f Son Huynh 208-368-3825 07/08/1999 - Fix tWR = 1 Clk + 7.5 ns (Auto) +* Micron Technology Inc. - Fix tWR = 15 ns (Manual) +* - Fix tRP (Autoprecharge to AutoRefresh) +* +* 0.0a Son Huynh 208-368-3825 05/13/1998 - First Release (from 64Mb rev 0.0e) +* Micron Technology Inc. +****************************************************************************************/ + +`timescale 1ns / 100ps + +module sdram_model_plus (Dq, Addr, Ba, Clk, Cke, Cs_n, Ras_n, Cas_n, We_n, Dqm,Debug); + + parameter addr_bits = 11; + parameter data_bits = 32; + parameter col_bits = 8; + parameter mem_sizes = 1048576*2-1;//1 Meg + + inout [data_bits - 1 : 0] Dq; + input [addr_bits - 1 : 0] Addr; + input [1 : 0] Ba; + input Clk; + input Cke; + input Cs_n; + input Ras_n; + input Cas_n; + input We_n; + input [3 : 0] Dqm; //高低各8bit + //added by xzli + input Debug; + + reg [data_bits - 1 : 0] Bank0 [0 : mem_sizes];//存储器类型数据 + reg [data_bits - 1 : 0] Bank1 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank2 [0 : mem_sizes]; + reg [data_bits - 1 : 0] Bank3 [0 : mem_sizes]; + + reg [1 : 0] Bank_addr [0 : 3]; // Bank Address Pipeline + reg [col_bits - 1 : 0] Col_addr [0 : 3]; // Column Address Pipeline + reg [3 : 0] Command [0 : 3]; // Command Operation Pipeline + reg [3 : 0] Dqm_reg0, Dqm_reg1; // DQM Operation Pipeline + reg [addr_bits - 1 : 0] B0_row_addr, B1_row_addr, B2_row_addr, B3_row_addr; + + reg [addr_bits - 1 : 0] Mode_reg; + reg [data_bits - 1 : 0] Dq_reg, Dq_dqm; + reg [col_bits - 1 : 0] Col_temp, Burst_counter; + + reg Act_b0, Act_b1, Act_b2, Act_b3; // Bank Activate + reg Pc_b0, Pc_b1, Pc_b2, Pc_b3; // Bank Precharge + + reg [1 : 0] Bank_precharge [0 : 3]; // Precharge Command + reg A10_precharge [0 : 3]; // Addr[10] = 1 (All banks) + reg Auto_precharge [0 : 3]; // RW AutoPrecharge (Bank) + reg Read_precharge [0 : 3]; // R AutoPrecharge + reg Write_precharge [0 : 3]; // W AutoPrecharge + integer Count_precharge [0 : 3]; // RW AutoPrecharge (Counter) + reg RW_interrupt_read [0 : 3]; // RW Interrupt Read with Auto Precharge + reg RW_interrupt_write [0 : 3]; // RW Interrupt Write with Auto Precharge + + reg Data_in_enable; + reg Data_out_enable; + + reg [1 : 0] Bank, Previous_bank; + reg [addr_bits - 1 : 0] Row; + reg [col_bits - 1 : 0] Col, Col_brst; + + // Internal system clock + reg CkeZ, Sys_clk; + + reg [21:0] dd; + + // Commands Decode + wire Active_enable = ~Cs_n & ~Ras_n & Cas_n & We_n; + wire Aref_enable = ~Cs_n & ~Ras_n & ~Cas_n & We_n; + wire Burst_term = ~Cs_n & Ras_n & Cas_n & ~We_n; + wire Mode_reg_enable = ~Cs_n & ~Ras_n & ~Cas_n & ~We_n; + wire Prech_enable = ~Cs_n & ~Ras_n & Cas_n & ~We_n; + wire Read_enable = ~Cs_n & Ras_n & ~Cas_n & We_n; + wire Write_enable = ~Cs_n & Ras_n & ~Cas_n & ~We_n; + + // Burst Length Decode + wire Burst_length_1 = ~Mode_reg[2] & ~Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_2 = ~Mode_reg[2] & ~Mode_reg[1] & Mode_reg[0]; + wire Burst_length_4 = ~Mode_reg[2] & Mode_reg[1] & ~Mode_reg[0]; + wire Burst_length_8 = ~Mode_reg[2] & Mode_reg[1] & Mode_reg[0]; + + // CAS Latency Decode + wire Cas_latency_2 = ~Mode_reg[6] & Mode_reg[5] & ~Mode_reg[4]; + wire Cas_latency_3 = ~Mode_reg[6] & Mode_reg[5] & Mode_reg[4]; + + // Write Burst Mode + wire Write_burst_mode = Mode_reg[9]; + + wire Debug; // Debug messages : 1 = On; 0 = Off + wire Dq_chk = Sys_clk & Data_in_enable; // Check setup/hold time for DQ + + reg [31:0] mem_d; + + event sdram_r,sdram_w,compare; + + + + + assign Dq = Dq_reg; // DQ buffer + + // Commands Operation + `define ACT 0 + `define NOP 1 + `define READ 2 + `define READ_A 3 + `define WRITE 4 + `define WRITE_A 5 + `define PRECH 6 + `define A_REF 7 + `define BST 8 + `define LMR 9 + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// parameter tAC = 8; //test 6.5 +// parameter tHZ = 7.0; +// parameter tOH = 2.7; +// parameter tMRD = 2.0; // 2 Clk Cycles +// parameter tRAS = 44.0; +// parameter tRC = 66.0; +// parameter tRCD = 20.0; +// parameter tRP = 20.0; +// parameter tRRD = 15.0; +// parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) +// parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Parameters for -7 (PC143) and CAS Latency = 3 + parameter tAC = 6.5; //test 6.5 + parameter tHZ = 5.5; + parameter tOH = 2; + parameter tMRD = 2.0; // 2 Clk Cycles + parameter tRAS = 48.0; + parameter tRC = 70.0; + parameter tRCD = 20.0; + parameter tRP = 20.0; + parameter tRRD = 14.0; + parameter tWRa = 7.5; // A2 Version - Auto precharge mode only (1 Clk + 7.5 ns) + parameter tWRp = 0.0; // A2 Version - Precharge mode only (15 ns) + + // Timing Check variable + integer MRD_chk; + integer WR_counter [0 : 3]; + time WR_chk [0 : 3]; + time RC_chk, RRD_chk; + time RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3; + time RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3; + time RP_chk0, RP_chk1, RP_chk2, RP_chk3; + + integer test_file; + + //*****display the command of the sdram************************************** + + parameter Mode_Reg_Set =4'b0000; + parameter Auto_Refresh =4'b0001; + parameter Row_Active =4'b0011; + parameter Pre_Charge =4'b0010; + parameter PreCharge_All =4'b0010; + parameter Write =4'b0100; + parameter Write_Pre =4'b0100; + parameter Read =4'b0101; + parameter Read_Pre =4'b0101; + parameter Burst_Stop =4'b0110; + parameter Nop =4'b0111; + parameter Dsel =4'b1111; + + wire [3:0] sdram_control; + reg cke_temp; + reg [8*13:1] sdram_command; + + always@(posedge Clk) + cke_temp<=Cke; + + assign sdram_control={Cs_n,Ras_n,Cas_n,We_n}; + + always@(sdram_control or cke_temp) + begin + case(sdram_control) + Mode_Reg_Set: sdram_command<="Mode_Reg_Set"; + Auto_Refresh: sdram_command<="Auto_Refresh"; + Row_Active: sdram_command<="Row_Active"; + Pre_Charge: sdram_command<="Pre_Charge"; + Burst_Stop: sdram_command<="Burst_Stop"; + Dsel: sdram_command<="Dsel"; + + Write: if(cke_temp==1) + sdram_command<="Write"; + else + sdram_command<="Write_suspend"; + + Read: if(cke_temp==1) + sdram_command<="Read"; + else + sdram_command<="Read_suspend"; + + Nop: if(cke_temp==1) + sdram_command<="Nop"; + else + sdram_command<="Self_refresh"; + + default: sdram_command<="Power_down"; + endcase + end + + //***************************************************** + + initial + begin + //test_file=$fopen("test_file.txt"); + end + + initial + begin + Dq_reg = {data_bits{1'bz}}; + {Data_in_enable, Data_out_enable} = 0; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b0000; + {WR_chk[0], WR_chk[1], WR_chk[2], WR_chk[3]} = 0; + {WR_counter[0], WR_counter[1], WR_counter[2], WR_counter[3]} = 0; + {RW_interrupt_read[0], RW_interrupt_read[1], RW_interrupt_read[2], RW_interrupt_read[3]} = 0; + {RW_interrupt_write[0], RW_interrupt_write[1], RW_interrupt_write[2], RW_interrupt_write[3]} = 0; + {MRD_chk, RC_chk, RRD_chk} = 0; + {RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3} = 0; + {RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3} = 0; + {RP_chk0, RP_chk1, RP_chk2, RP_chk3} = 0; + $timeformat (-9, 0, " ns", 12); + //$readmemh("bank0.txt", Bank0); + //$readmemh("bank1.txt", Bank1); + //$readmemh("bank2.txt", Bank2); + //$readmemh("bank3.txt", Bank3); +/* + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + Bank0[dd]=dd[data_bits - 1 : 0]; + Bank1[dd]=dd[data_bits - 1 : 0]+1; + Bank2[dd]=dd[data_bits - 1 : 0]+2; + Bank3[dd]=dd[data_bits - 1 : 0]+3; + end +*/ + initial_sdram(0); + end + + task initial_sdram; + + input data_sign; + reg [3:0] data_sign; + + for(dd=0;dd<=mem_sizes;dd=dd+1) + begin + mem_d = {data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign,data_sign}; + if(data_bits==16) + begin + Bank0[dd]=mem_d[15:0]; + Bank1[dd]=mem_d[15:0]; + Bank2[dd]=mem_d[15:0]; + Bank3[dd]=mem_d[15:0]; + end + else if(data_bits==32) + begin + Bank0[dd]=mem_d[31:0]; + Bank1[dd]=mem_d[31:0]; + Bank2[dd]=mem_d[31:0]; + Bank3[dd]=mem_d[31:0]; + end + end + + endtask + + // System clock generator + always + begin + @(posedge Clk) + begin + Sys_clk = CkeZ; + CkeZ = Cke; + end + @(negedge Clk) + begin + Sys_clk = 1'b0; + end + end + + always @ (posedge Sys_clk) begin + // Internal Commamd Pipelined + Command[0] = Command[1]; + Command[1] = Command[2]; + Command[2] = Command[3]; + Command[3] = `NOP; + + Col_addr[0] = Col_addr[1]; + Col_addr[1] = Col_addr[2]; + Col_addr[2] = Col_addr[3]; + Col_addr[3] = {col_bits{1'b0}}; + + Bank_addr[0] = Bank_addr[1]; + Bank_addr[1] = Bank_addr[2]; + Bank_addr[2] = Bank_addr[3]; + Bank_addr[3] = 2'b0; + + Bank_precharge[0] = Bank_precharge[1]; + Bank_precharge[1] = Bank_precharge[2]; + Bank_precharge[2] = Bank_precharge[3]; + Bank_precharge[3] = 2'b0; + + A10_precharge[0] = A10_precharge[1]; + A10_precharge[1] = A10_precharge[2]; + A10_precharge[2] = A10_precharge[3]; + A10_precharge[3] = 1'b0; + + // Dqm pipeline for Read + Dqm_reg0 = Dqm_reg1; + Dqm_reg1 = Dqm; + + // Read or Write with Auto Precharge Counter + if (Auto_precharge[0] == 1'b1) begin + Count_precharge[0] = Count_precharge[0] + 1; + end + if (Auto_precharge[1] == 1'b1) begin + Count_precharge[1] = Count_precharge[1] + 1; + end + if (Auto_precharge[2] == 1'b1) begin + Count_precharge[2] = Count_precharge[2] + 1; + end + if (Auto_precharge[3] == 1'b1) begin + Count_precharge[3] = Count_precharge[3] + 1; + end + + // tMRD Counter + MRD_chk = MRD_chk + 1; + + // tWR Counter for Write + WR_counter[0] = WR_counter[0] + 1; + WR_counter[1] = WR_counter[1] + 1; + WR_counter[2] = WR_counter[2] + 1; + WR_counter[3] = WR_counter[3] + 1; + + // Auto Refresh + if (Aref_enable == 1'b1) begin + if (Debug) $display ("at time %t AREF : Auto Refresh", $time); + // Auto Refresh to Auto Refresh + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Auto Refresh", $time); + end + // Precharge to Auto Refresh + if (($time - RP_chk0 < tRP || $time - RP_chk1 < tRP || $time - RP_chk2 < tRP || $time - RP_chk3 < tRP)&&Debug) begin + $display ("at time %t ERROR: tRP violation during Auto Refresh", $time); + end + // Precharge to Refresh + if (Pc_b0 == 1'b0 || Pc_b1 == 1'b0 || Pc_b2 == 1'b0 || Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: All banks must be Precharge before Auto Refresh", $time); + end + // Record Current tRC time + RC_chk = $time; + end + + // Load Mode Register + if (Mode_reg_enable == 1'b1) begin + // Decode CAS Latency, Burst Length, Burst Type, and Write Burst Mode + if (Pc_b0 == 1'b1 && Pc_b1 == 1'b1 && Pc_b2 == 1'b1 && Pc_b3 == 1'b1) begin + Mode_reg = Addr; + if (Debug) begin + $display ("at time %t LMR : Load Mode Register", $time); + // CAS Latency + if (Addr[6 : 4] == 3'b010) + $display (" CAS Latency = 2"); + else if (Addr[6 : 4] == 3'b011) + $display (" CAS Latency = 3"); + else + $display (" CAS Latency = Reserved"); + // Burst Length + if (Addr[2 : 0] == 3'b000) + $display (" Burst Length = 1"); + else if (Addr[2 : 0] == 3'b001) + $display (" Burst Length = 2"); + else if (Addr[2 : 0] == 3'b010) + $display (" Burst Length = 4"); + else if (Addr[2 : 0] == 3'b011) + $display (" Burst Length = 8"); + else if (Addr[3 : 0] == 4'b0111) + $display (" Burst Length = Full"); + else + $display (" Burst Length = Reserved"); + // Burst Type + if (Addr[3] == 1'b0) + $display (" Burst Type = Sequential"); + else if (Addr[3] == 1'b1) + $display (" Burst Type = Interleaved"); + else + $display (" Burst Type = Reserved"); + // Write Burst Mode + if (Addr[9] == 1'b0) + $display (" Write Burst Mode = Programmed Burst Length"); + else if (Addr[9] == 1'b1) + $display (" Write Burst Mode = Single Location Access"); + else + $display (" Write Burst Mode = Reserved"); + end + end else begin + $display ("at time %t ERROR: all banks must be Precharge before Load Mode Register", $time); + end + // REF to LMR + if ($time - RC_chk < tRC) begin + $display ("at time %t ERROR: tRC violation during Load Mode Register", $time); + end + // LMR to LMR + if (MRD_chk < tMRD) begin + $display ("at time %t ERROR: tMRD violation during Load Mode Register", $time); + end + MRD_chk = 0; + end + + // Active Block (Latch Bank Address and Row Address) + if (Active_enable == 1'b1) begin + if (Ba == 2'b00 && Pc_b0 == 1'b1) begin + {Act_b0, Pc_b0} = 2'b10; + B0_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk0 = $time; + RAS_chk0 = $time; + if (Debug) $display ("at time %t ACT : Bank = 0 Row = %d", $time, Addr); + // Precharge to Activate Bank 0 + if ($time - RP_chk0 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 0", $time); + end + end else if (Ba == 2'b01 && Pc_b1 == 1'b1) begin + {Act_b1, Pc_b1} = 2'b10; + B1_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk1 = $time; + RAS_chk1 = $time; + if (Debug) $display ("at time %t ACT : Bank = 1 Row = %d", $time, Addr); + // Precharge to Activate Bank 1 + if ($time - RP_chk1 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 1", $time); + end + end else if (Ba == 2'b10 && Pc_b2 == 1'b1) begin + {Act_b2, Pc_b2} = 2'b10; + B2_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk2 = $time; + RAS_chk2 = $time; + if (Debug) $display ("at time %t ACT : Bank = 2 Row = %d", $time, Addr); + // Precharge to Activate Bank 2 + if ($time - RP_chk2 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 2", $time); + end + end else if (Ba == 2'b11 && Pc_b3 == 1'b1) begin + {Act_b3, Pc_b3} = 2'b10; + B3_row_addr = Addr [addr_bits - 1 : 0]; + RCD_chk3 = $time; + RAS_chk3 = $time; + if (Debug) $display ("at time %t ACT : Bank = 3 Row = %d", $time, Addr); + // Precharge to Activate Bank 3 + if ($time - RP_chk3 < tRP) begin + $display ("at time %t ERROR: tRP violation during Activate bank 3", $time); + end + end else if (Ba == 2'b00 && Pc_b0 == 1'b0) begin + $display ("at time %t ERROR: Bank 0 is not Precharged.", $time); + end else if (Ba == 2'b01 && Pc_b1 == 1'b0) begin + $display ("at time %t ERROR: Bank 1 is not Precharged.", $time); + end else if (Ba == 2'b10 && Pc_b2 == 1'b0) begin + $display ("at time %t ERROR: Bank 2 is not Precharged.", $time); + end else if (Ba == 2'b11 && Pc_b3 == 1'b0) begin + $display ("at time %t ERROR: Bank 3 is not Precharged.", $time); + end + // Active Bank A to Active Bank B + if ((Previous_bank != Ba) && ($time - RRD_chk < tRRD)) begin + $display ("at time %t ERROR: tRRD violation during Activate bank = %d", $time, Ba); + end + // Load Mode Register to Active + if (MRD_chk < tMRD ) begin + $display ("at time %t ERROR: tMRD violation during Activate bank = %d", $time, Ba); + end + // Auto Refresh to Activate + if (($time - RC_chk < tRC)&&Debug) begin + $display ("at time %t ERROR: tRC violation during Activate bank = %d", $time, Ba); + end + // Record variables for checking violation + RRD_chk = $time; + Previous_bank = Ba; + end + + // Precharge Block + if (Prech_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + {Pc_b0, Pc_b1, Pc_b2, Pc_b3} = 4'b1111; + {Act_b0, Act_b1, Act_b2, Act_b3} = 4'b0000; + RP_chk0 = $time; + RP_chk1 = $time; + RP_chk2 = $time; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = ALL",$time); + // Activate to Precharge all banks + if (($time - RAS_chk0 < tRAS) || ($time - RAS_chk1 < tRAS) || + ($time - RAS_chk2 < tRAS) || ($time - RAS_chk3 < tRAS)) begin + $display ("at time %t ERROR: tRAS violation during Precharge all bank", $time); + end + // tWR violation check for write + if (($time - WR_chk[0] < tWRp) || ($time - WR_chk[1] < tWRp) || + ($time - WR_chk[2] < tWRp) || ($time - WR_chk[3] < tWRp)) begin + $display ("at time %t ERROR: tWR violation during Precharge all bank", $time); + end + end else if (Addr[10] == 1'b0) begin + if (Ba == 2'b00) begin + {Pc_b0, Act_b0} = 2'b10; + RP_chk0 = $time; + if (Debug) $display ("at time %t PRE : Bank = 0",$time); + // Activate to Precharge Bank 0 + if ($time - RAS_chk0 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 0", $time); + end + end else if (Ba == 2'b01) begin + {Pc_b1, Act_b1} = 2'b10; + RP_chk1 = $time; + if (Debug) $display ("at time %t PRE : Bank = 1",$time); + // Activate to Precharge Bank 1 + if ($time - RAS_chk1 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 1", $time); + end + end else if (Ba == 2'b10) begin + {Pc_b2, Act_b2} = 2'b10; + RP_chk2 = $time; + if (Debug) $display ("at time %t PRE : Bank = 2",$time); + // Activate to Precharge Bank 2 + if ($time - RAS_chk2 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 2", $time); + end + end else if (Ba == 2'b11) begin + {Pc_b3, Act_b3} = 2'b10; + RP_chk3 = $time; + if (Debug) $display ("at time %t PRE : Bank = 3",$time); + // Activate to Precharge Bank 3 + if ($time - RAS_chk3 < tRAS) begin + $display ("at time %t ERROR: tRAS violation during Precharge bank 3", $time); + end + end + // tWR violation check for write + if ($time - WR_chk[Ba] < tWRp) begin + $display ("at time %t ERROR: tWR violation during Precharge bank %d", $time, Ba); + end + end + // Terminate a Write Immediately (if same bank or all banks) + if (Data_in_enable == 1'b1 && (Bank == Ba || Addr[10] == 1'b1)) begin + Data_in_enable = 1'b0; + end + // Precharge Command Pipeline for Read + if (Cas_latency_3 == 1'b1) begin + Command[2] = `PRECH; + Bank_precharge[2] = Ba; + A10_precharge[2] = Addr[10]; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `PRECH; + Bank_precharge[1] = Ba; + A10_precharge[1] = Addr[10]; + end + end + + // Burst terminate + if (Burst_term == 1'b1) begin + // Terminate a Write Immediately + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + // Terminate a Read Depend on CAS Latency + if (Cas_latency_3 == 1'b1) begin + Command[2] = `BST; + end else if (Cas_latency_2 == 1'b1) begin + Command[1] = `BST; + end + if (Debug) $display ("at time %t BST : Burst Terminate",$time); + end + + // Read, Write, Column Latch + if (Read_enable == 1'b1 || Write_enable == 1'b1) begin + // Check to see if bank is open (ACT) + if ((Ba == 2'b00 && Pc_b0 == 1'b1) || (Ba == 2'b01 && Pc_b1 == 1'b1) || + (Ba == 2'b10 && Pc_b2 == 1'b1) || (Ba == 2'b11 && Pc_b3 == 1'b1)) begin + $display("at time %t ERROR: Cannot Read or Write - Bank %d is not Activated", $time, Ba); + end + // Activate to Read or Write + if ((Ba == 2'b00) && ($time - RCD_chk0 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 0", $time); + if ((Ba == 2'b01) && ($time - RCD_chk1 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 1", $time); + if ((Ba == 2'b10) && ($time - RCD_chk2 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 2", $time); + if ((Ba == 2'b11) && ($time - RCD_chk3 < tRCD)) + $display("at time %t ERROR: tRCD violation during Read or Write to Bank 3", $time); + // Read Command + if (Read_enable == 1'b1) begin + // CAS Latency pipeline + if (Cas_latency_3 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[2] = `READ_A; + end else begin + Command[2] = `READ; + end + Col_addr[2] = Addr; + Bank_addr[2] = Ba; + end else if (Cas_latency_2 == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[1] = `READ_A; + end else begin + Command[1] = `READ; + end + Col_addr[1] = Addr; + Bank_addr[1] = Ba; + end + + // Read interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write Command + end else if (Write_enable == 1'b1) begin + if (Addr[10] == 1'b1) begin + Command[0] = `WRITE_A; + end else begin + Command[0] = `WRITE; + end + Col_addr[0] = Addr; + Bank_addr[0] = Ba; + + // Write interrupt Write (terminate Write immediately) + if (Data_in_enable == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Write interrupt Read (terminate Read immediately) + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + // Interrupting a Write with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Write_precharge[Bank] == 1'b1) begin + RW_interrupt_write[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Write Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Interrupting a Read with Autoprecharge + if (Auto_precharge[Bank] == 1'b1 && Read_precharge[Bank] == 1'b1) begin + RW_interrupt_read[Bank] = 1'b1; + if (Debug) $display ("at time %t NOTE : Read/Write Bank %d interrupt Read Bank %d with Autoprecharge", $time, Ba, Bank); + end + + // Read or Write with Auto Precharge + if (Addr[10] == 1'b1) begin + Auto_precharge[Ba] = 1'b1; + Count_precharge[Ba] = 0; + if (Read_enable == 1'b1) begin + Read_precharge[Ba] = 1'b1; + end else if (Write_enable == 1'b1) begin + Write_precharge[Ba] = 1'b1; + end + end + end + + // Read with Auto Precharge Calculation + // The device start internal precharge: + // 1. CAS Latency - 1 cycles before last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + if ((Auto_precharge[0] == 1'b1) && (Read_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + ((Burst_length_1 == 1'b1 && Count_precharge[0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge[0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[0] >= 8))) || + (RW_interrupt_read[0] == 1'b1)) begin // Case 3 + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + Auto_precharge[0] = 1'b0; + Read_precharge[0] = 1'b0; + RW_interrupt_read[0] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + if ((Auto_precharge[1] == 1'b1) && (Read_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[1] >= 8))) || + (RW_interrupt_read[1] == 1'b1)) begin + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + Auto_precharge[1] = 1'b0; + Read_precharge[1] = 1'b0; + RW_interrupt_read[1] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + if ((Auto_precharge[2] == 1'b1) && (Read_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[2] >= 8))) || + (RW_interrupt_read[2] == 1'b1)) begin + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + Auto_precharge[2] = 1'b0; + Read_precharge[2] = 1'b0; + RW_interrupt_read[2] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + if ((Auto_precharge[3] == 1'b1) && (Read_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + ((Burst_length_1 == 1'b1 && Count_precharge[3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge[3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge[3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge[3] >= 8))) || + (RW_interrupt_read[3] == 1'b1)) begin + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + Auto_precharge[3] = 1'b0; + Read_precharge[3] = 1'b0; + RW_interrupt_read[3] = 1'b0; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + + // Internal Precharge or Bst + if (Command[0] == `PRECH) begin // Precharge terminate a read with same bank or all banks + if (Bank_precharge[0] == Bank || A10_precharge[0] == 1'b1) begin + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + end else if (Command[0] == `BST) begin // BST terminate a read to current bank + if (Data_out_enable == 1'b1) begin + Data_out_enable = 1'b0; + end + end + + if (Data_out_enable == 1'b0) begin + Dq_reg <= #tOH {data_bits{1'bz}}; + end + + // Detect Read or Write command + if (Command[0] == `READ || Command[0] == `READ_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b0; + Data_out_enable = 1'b1; + end else if (Command[0] == `WRITE || Command[0] == `WRITE_A) begin + Bank = Bank_addr[0]; + Col = Col_addr[0]; + Col_brst = Col_addr[0]; + if (Bank_addr[0] == 2'b00) begin + Row = B0_row_addr; + end else if (Bank_addr[0] == 2'b01) begin + Row = B1_row_addr; + end else if (Bank_addr[0] == 2'b10) begin + Row = B2_row_addr; + end else if (Bank_addr[0] == 2'b11) begin + Row = B3_row_addr; + end + Burst_counter = 0; + Data_in_enable = 1'b1; + Data_out_enable = 1'b0; + end + + // DQ buffer (Driver/Receiver) + if (Data_in_enable == 1'b1) begin // Writing Data to Memory + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + // Dqm operation + if (Dqm[0] == 1'b0) Dq_dqm [ 7 : 0] = Dq [ 7 : 0]; + if (Dqm[1] == 1'b0) Dq_dqm [15 : 8] = Dq [15 : 8]; + //if (Dqm[2] == 1'b0) Dq_dqm [23 : 16] = Dq [23 : 16]; + // if (Dqm[3] == 1'b0) Dq_dqm [31 : 24] = Dq [31 : 24]; + // Write to memory + if (Bank == 2'b00) Bank0 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b01) Bank1 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b10) Bank2 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11) Bank3 [{Row, Col}] = Dq_dqm [data_bits - 1 : 0]; + if (Bank == 2'b11 && Row==10'h3 && Col[7:4]==4'h4) + $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + //$fdisplay(test_file,"bank:%h row:%h col:%h write:%h",Bank,Row,Col,Dq_dqm); + // Output result + if (Dqm == 4'b1111) begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t WRITE: Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_dqm, Dqm); + // Record tWR time and reset counter + WR_chk [Bank] = $time; + WR_counter [Bank] = 0; + end + // Advance burst counter subroutine + #tHZ Burst; + end else if (Data_out_enable == 1'b1) begin // Reading Data from Memory + //$display("%h , %h, %h",Bank0,Row,Col); + // Array buffer + if (Bank == 2'b00) Dq_dqm [data_bits - 1 : 0] = Bank0 [{Row, Col}]; + if (Bank == 2'b01) Dq_dqm [data_bits - 1 : 0] = Bank1 [{Row, Col}]; + if (Bank == 2'b10) Dq_dqm [data_bits - 1 : 0] = Bank2 [{Row, Col}]; + if (Bank == 2'b11) Dq_dqm [data_bits - 1 : 0] = Bank3 [{Row, Col}]; + + // Dqm operation + if (Dqm_reg0[0] == 1'b1) Dq_dqm [ 7 : 0] = 8'bz; + if (Dqm_reg0[1] == 1'b1) Dq_dqm [15 : 8] = 8'bz; + if (Dqm_reg0[2] == 1'b1) Dq_dqm [23 : 16] = 8'bz; + if (Dqm_reg0[3] == 1'b1) Dq_dqm [31 : 24] = 8'bz; + // Display result + Dq_reg [data_bits - 1 : 0] = #tAC Dq_dqm [data_bits - 1 : 0]; + if (Dqm_reg0 == 4'b1111) begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = Hi-Z due to DQM", $time, Bank, Row, Col); + end else begin + if (Debug) $display("at time %t READ : Bank = %d Row = %d, Col = %d, Data = %d, Dqm = %b", $time, Bank, Row, Col, Dq_reg, Dqm_reg0); + end + // Advance burst counter subroutine + Burst; + end + end + + // Write with Auto Precharge Calculation + // The device start internal precharge: + // 1. tWR Clock after last burst + // and 2. Meet minimum tRAS requirement + // or 3. Interrupt by a Read or Write (with or without AutoPrecharge) + always @ (WR_counter[0]) begin + if ((Auto_precharge[0] == 1'b1) && (Write_precharge[0] == 1'b1)) begin + if ((($time - RAS_chk0 >= tRAS) && // Case 2 + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [0] >= 1) || // Case 1 + (Burst_length_2 == 1'b1 && Count_precharge [0] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [0] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [0] >= 8))) || + (RW_interrupt_write[0] == 1'b1 && WR_counter[0] >= 2)) begin // Case 3 (stop count when interrupt) + Auto_precharge[0] = 1'b0; + Write_precharge[0] = 1'b0; + RW_interrupt_write[0] = 1'b0; + #tWRa; // Wait for tWR + Pc_b0 = 1'b1; + Act_b0 = 1'b0; + RP_chk0 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 0", $time); + end + end + end + always @ (WR_counter[1]) begin + if ((Auto_precharge[1] == 1'b1) && (Write_precharge[1] == 1'b1)) begin + if ((($time - RAS_chk1 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [1] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [1] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [1] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [1] >= 8))) || + (RW_interrupt_write[1] == 1'b1 && WR_counter[1] >= 2)) begin + Auto_precharge[1] = 1'b0; + Write_precharge[1] = 1'b0; + RW_interrupt_write[1] = 1'b0; + #tWRa; // Wait for tWR + Pc_b1 = 1'b1; + Act_b1 = 1'b0; + RP_chk1 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 1", $time); + end + end + end + always @ (WR_counter[2]) begin + if ((Auto_precharge[2] == 1'b1) && (Write_precharge[2] == 1'b1)) begin + if ((($time - RAS_chk2 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [2] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [2] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [2] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [2] >= 8))) || + (RW_interrupt_write[2] == 1'b1 && WR_counter[2] >= 2)) begin + Auto_precharge[2] = 1'b0; + Write_precharge[2] = 1'b0; + RW_interrupt_write[2] = 1'b0; + #tWRa; // Wait for tWR + Pc_b2 = 1'b1; + Act_b2 = 1'b0; + RP_chk2 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 2", $time); + end + end + end + always @ (WR_counter[3]) begin + if ((Auto_precharge[3] == 1'b1) && (Write_precharge[3] == 1'b1)) begin + if ((($time - RAS_chk3 >= tRAS) && + (((Burst_length_1 == 1'b1 || Write_burst_mode == 1'b1) && Count_precharge [3] >= 1) || + (Burst_length_2 == 1'b1 && Count_precharge [3] >= 2) || + (Burst_length_4 == 1'b1 && Count_precharge [3] >= 4) || + (Burst_length_8 == 1'b1 && Count_precharge [3] >= 8))) || + (RW_interrupt_write[3] == 1'b1 && WR_counter[3] >= 2)) begin + Auto_precharge[3] = 1'b0; + Write_precharge[3] = 1'b0; + RW_interrupt_write[3] = 1'b0; + #tWRa; // Wait for tWR + Pc_b3 = 1'b1; + Act_b3 = 1'b0; + RP_chk3 = $time; + if (Debug) $display ("at time %t NOTE : Start Internal Auto Precharge for Bank 3", $time); + end + end + end + + task Burst; + begin + // Advance Burst Counter + Burst_counter = Burst_counter + 1; + + // Burst Type + if (Mode_reg[3] == 1'b0) begin // Sequential Burst + Col_temp = Col + 1; + end else if (Mode_reg[3] == 1'b1) begin // Interleaved Burst + Col_temp[2] = Burst_counter[2] ^ Col_brst[2]; + Col_temp[1] = Burst_counter[1] ^ Col_brst[1]; + Col_temp[0] = Burst_counter[0] ^ Col_brst[0]; + end + + // Burst Length + if (Burst_length_2) begin // Burst Length = 2 + Col [0] = Col_temp [0]; + end else if (Burst_length_4) begin // Burst Length = 4 + Col [1 : 0] = Col_temp [1 : 0]; + end else if (Burst_length_8) begin // Burst Length = 8 + Col [2 : 0] = Col_temp [2 : 0]; + end else begin // Burst Length = FULL + Col = Col_temp; + end + + // Burst Read Single Write + if (Write_burst_mode == 1'b1) begin + Data_in_enable = 1'b0; + end + + // Data Counter + if (Burst_length_1 == 1'b1) begin + if (Burst_counter >= 1) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_2 == 1'b1) begin + if (Burst_counter >= 2) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_4 == 1'b1) begin + if (Burst_counter >= 4) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end else if (Burst_length_8 == 1'b1) begin + if (Burst_counter >= 8) begin + Data_in_enable = 1'b0; + Data_out_enable = 1'b0; + end + end + end + endtask + + //**********************将SDRAM内的数据直接输出到外部文件*******************************// + +/* + integer sdram_data,ind; + + + always@(sdram_r) + begin + sdram_data=$fopen("sdram_data.txt"); + $display("Sdram dampout begin ",sdram_data); +// $fdisplay(sdram_data,"Bank0："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank0[ind]); +// $fdisplay(sdram_data,"Bank1："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank1[ind]); +// $fdisplay(sdram_data,"Bank2："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank2[ind]); +// $fdisplay(sdram_data,"Bank3："); + for(ind=0;ind<=mem_sizes;ind=ind+1) + $fdisplay(sdram_data,"%h %b",ind,Bank3[ind]); + + $fclose("sdram_data.txt"); + //->compare; + end +*/ + integer sdram_data,sdram_mem; + reg [23:0] aa,cc; + reg [18:0] bb,ee; + + always@(sdram_r) + begin + $display("Sdram dampout begin ",$realtime); + sdram_data=$fopen("sdram_data.txt"); + for(aa=0;aa<4*(mem_sizes+1);aa=aa+1) + begin + bb=aa[18:0]; + if(aa<=mem_sizes) + $fdisplay(sdram_data,"%0d %0h",aa,Bank0[bb]); + else if(aa<=2*mem_sizes+1) + $fdisplay(sdram_data,"%0d %0h",aa,Bank1[bb]); + else if(aa<=3*mem_sizes+2) + $fdisplay(sdram_data,"%0d %0h",aa,Bank2[bb]); + else + $fdisplay(sdram_data,"%0d %0h",aa,Bank3[bb]); + end + $fclose("sdram_data.txt"); + + sdram_mem=$fopen("sdram_mem.txt"); + for(cc=0;cc<4*(mem_sizes+1);cc=cc+1) + begin + ee=cc[18:0]; + if(cc<=mem_sizes) + $fdisplay(sdram_mem,"%0h",Bank0[ee]); + else if(cc<=2*mem_sizes+1) + $fdisplay(sdram_mem,"%0h",Bank1[ee]); + else if(cc<=3*mem_sizes+2) + $fdisplay(sdram_mem,"%0h",Bank2[ee]); + else + $fdisplay(sdram_mem,"%0h",Bank3[ee]); + end + $fclose("sdram_mem.txt"); + + end + + + +// // Timing Parameters for -75 (PC133) and CAS Latency = 2 +// specify +// specparam +//// tAH = 0.8, // Addr, Ba Hold Time +//// tAS = 1.5, // Addr, Ba Setup Time +//// tCH = 2.5, // Clock High-Level Width +//// tCL = 2.5, // Clock Low-Level Width +////// tCK = 10.0, // Clock Cycle Time 100mhz +////// tCK = 7.5, // Clock Cycle Time 133mhz +//// tCK = 7, // Clock Cycle Time 143mhz +//// tDH = 0.8, // Data-in Hold Time +//// tDS = 1.5, // Data-in Setup Time +//// tCKH = 0.8, // CKE Hold Time +//// tCKS = 1.5, // CKE Setup Time +//// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +//// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// tAH = 1, // Addr, Ba Hold Time +// tAS = 1.5, // Addr, Ba Setup Time +// tCH = 1, // Clock High-Level Width +// tCL = 3, // Clock Low-Level Width +//// tCK = 10.0, // Clock Cycle Time 100mhz +//// tCK = 7.5, // Clock Cycle Time 133mhz +// tCK = 7, // Clock Cycle Time 143mhz +// tDH = 1, // Data-in Hold Time +// tDS = 2, // Data-in Setup Time +// tCKH = 1, // CKE Hold Time +// tCKS = 2, // CKE Setup Time +// tCMH = 0.8, // CS#, RAS#, CAS#, WE#, DQM# Hold Time +// tCMS = 1.5; // CS#, RAS#, CAS#, WE#, DQM# Setup Time +// $width (posedge Clk, tCH); +// $width (negedge Clk, tCL); +// $period (negedge Clk, tCK); +// $period (posedge Clk, tCK); +// $setuphold(posedge Clk, Cke, tCKS, tCKH); +// $setuphold(posedge Clk, Cs_n, tCMS, tCMH); +// $setuphold(posedge Clk, Cas_n, tCMS, tCMH); +// $setuphold(posedge Clk, Ras_n, tCMS, tCMH); +// $setuphold(posedge Clk, We_n, tCMS, tCMH); +// $setuphold(posedge Clk, Addr, tAS, tAH); +// $setuphold(posedge Clk, Ba, tAS, tAH); +// $setuphold(posedge Clk, Dqm, tCMS, tCMH); +// $setuphold(posedge Dq_chk, Dq, tDS, tDH); +// endspecify + +endmodule + diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_write/tb_sdram_write.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_write/tb_sdram_write.v new file mode 100644 index 0000000..108f7ca --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_sdram_write/tb_sdram_write.v @@ -0,0 +1,178 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : tb_sdram_write +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : SDRAM鏁版嵁鍐欐ā鍧椾豢鐪 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module tb_sdram_write(); + +//********************************************************************// +//****************** Internal Signal and Defparam ********************// +//********************************************************************// + +//wire define +//clk_gen +wire clk_50m ; //PLL杈撳嚭50M鏃堕挓 +wire clk_100m ; //PLL杈撳嚭100M鏃堕挓 +wire clk_100m_shift ; //PLL杈撳嚭100M鏃堕挓,鐩镐綅鍋忕Щ-30deg +wire locked ; //PLL鏃堕挓閿佸畾淇″彿 +wire rst_n ; //澶嶄綅淇″彿,浣庢湁鏁 +//sdram_init +wire [3:0] init_cmd ; //鍒濆鍖栭樁娈垫寚浠 +wire [1:0] init_ba ; //鍒濆鍖栭樁娈礚-Bank鍦板潃 +wire [12:0] init_addr ; //鍒濆鍖栭樁娈靛湴鍧鎬荤嚎 +wire init_end ; //鍒濆鍖栧畬鎴愪俊鍙 +//sdram_write +wire [12:0] write_addr ; //鏁版嵁鍐欓樁娈靛湴鍧鎬荤嚎 +wire [1:0] write_ba ; //鏁版嵁鍐欓樁娈礚-Bank鍦板潃 +wire [3:0] write_cmd ; //鏁版嵁鍐欓樁娈垫寚浠 +wire [15:0] wr_sdram_data ; //鏁版嵁鍐欓樁娈靛啓鍏DRAM鏁版嵁 +wire wr_sdram_en ; //鏁版嵁鍐欓樁娈靛啓鏁版嵁鏈夋晥浣胯兘淇″彿 +wire wr_end ; //鏁版嵁鍐欓樁娈典竴娆＄獊鍙戝啓缁撴潫 +wire sdram_wr_ack ; //鏁版嵁鍐欓樁娈靛啓鍝嶅簲 +//sdram_addr +wire [12:0] sdram_addr ; //SDRAM鍦板潃鎬荤嚎 +wire [1:0] sdram_ba ; //SDRAML-Bank鍦板潃 +wire [3:0] sdram_cmd ; //SDRAM鎸囦护 +wire [15:0] sdram_dq ; //SDRAM鏁版嵁鎬荤嚎 +//reg define +reg sys_clk ; //绯荤粺鏃堕挓 +reg sys_rst_n ; //澶嶄綅淇″彿 +reg wr_en ; //鍐欎娇鑳 +reg [15:0] wr_data_in ; //鍐欐暟鎹 + +//defparam +//閲嶅畾涔変豢鐪熸ā鍨嬩腑鐨勭浉鍏冲弬鏁 +defparam sdram_model_plus_inst.addr_bits = 13; //鍦板潃浣嶅 +defparam sdram_model_plus_inst.data_bits = 16; //鏁版嵁浣嶅 +defparam sdram_model_plus_inst.col_bits = 9; //鍒楀湴鍧浣嶅 +defparam sdram_model_plus_inst.mem_sizes = 2*1024*1024; //L-Bank瀹归噺 + +//********************************************************************// +//**************************** Clk And Rst ***************************// +//********************************************************************// + +//鏃堕挓銆佸浣嶄俊鍙 +initial + begin + sys_clk = 1'b1 ; + sys_rst_n <= 1'b0 ; + #200 + sys_rst_n <= 1'b1 ; + end + +always #10 sys_clk = ~sys_clk; + +//rst_n:澶嶄綅淇″彿 +assign rst_n = sys_rst_n & locked; + +//wr_en锛氬啓鏁版嵁浣胯兘 +always@(posedge clk_100m or negedge rst_n) + if(rst_n == 1'b0) + wr_en <= 1'b0; + else if(wr_end == 1'b1) + wr_en <= 1'b0; + else if(init_end == 1'b1) + wr_en <= 1'b1; + else + wr_en <= wr_en; + +//wr_data_in:鍐欐暟鎹 +always@(posedge clk_100m or negedge rst_n) + if(rst_n == 1'b0) + wr_data_in <= 16'd0; + else if(wr_data_in == 16'd10) + wr_data_in <= 16'd0; + else if(sdram_wr_ack == 1'b1) + wr_data_in <= wr_data_in + 1'b1; + else + wr_data_in <= wr_data_in; + +//sdram_cmd,sdram_ba,sdram_addr +assign sdram_cmd = (init_end == 1'b1) ? write_cmd : init_cmd; +assign sdram_ba = (init_end == 1'b1) ? write_ba : init_ba; +assign sdram_addr = (init_end == 1'b1) ? write_addr : init_addr; + +//wr_sdram_data +assign sdram_dq = (wr_sdram_en == 1'b1) ? wr_sdram_data : 16'hz; + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// + +//------------- clk_gen_inst ------------- +clk_gen clk_gen_inst ( + .inclk0 (sys_clk ), + .areset (~sys_rst_n ), + .c0 (clk_50m ), + .c1 (clk_100m ), + .c2 (clk_100m_shift ), + + .locked (locked ) +); + +//------------- sdram_init_inst ------------- +sdram_init sdram_init_inst( + + .sys_clk (clk_100m ), + .sys_rst_n (rst_n ), + + .init_cmd (init_cmd ), + .init_ba (init_ba ), + .init_addr (init_addr ), + .init_end (init_end ) + +); + +//------------- sdram_write_inst ------------- +sdram_write sdram_write_inst( + + .sys_clk (clk_100m ), + .sys_rst_n (rst_n ), + .init_end (init_end ), + .wr_en (wr_en ), + + .wr_addr (24'h000_000 ), + .wr_data (wr_data_in ), + .wr_burst_len (10'd10 ), + + .wr_ack (sdram_wr_ack ), + .wr_end (wr_end ), + .write_cmd (write_cmd ), + .write_ba (write_ba ), + .write_addr (write_addr ), + .wr_sdram_en (wr_sdram_en ), + .wr_sdram_data (wr_sdram_data ) + +); + +//-------------sdram_model_plus_inst------------- +sdram_model_plus sdram_model_plus_inst( + .Dq (sdram_dq ), + .Addr (sdram_addr ), + .Ba (sdram_ba ), + .Clk (clk_100m_shift ), + .Cke (1'b1 ), + .Cs_n (sdram_cmd[3] ), + .Ras_n (sdram_cmd[2] ), + .Cas_n (sdram_cmd[1] ), + .We_n (sdram_cmd[0] ), + .Dqm (2'b0 ), + .Debug (1'b1 ) + +); + +endmodule \ No newline at end of file diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_uart_sdram.v b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_uart_sdram.v new file mode 100644 index 0000000..18133b2 --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/tb_uart_sdram.v @@ -0,0 +1,150 @@ +`timescale 1ns/1ns +//////////////////////////////////////////////////////////////////////// +// Author : EmbedFire +// Create Date : 2019/08/25 +// Module Name : tb_uart_sdram +// Project Name : uart_sdram +// Target Devices: Altera EP4CE10F17C8N +// Tool Versions : Quartus 13.0 +// Description : uart_sdram妯″潡浠跨湡鏂囦欢 +// +// Revision : V1.0 +// Additional Comments: +// +// 瀹為獙骞冲彴: 閲庣伀_寰侀擯ro_FPGA寮鍙戞澘 +// 鍏徃 : http://www.embedfire.com +// 璁哄潧 : http://www.firebbs.cn +// 娣樺疂 : https://fire-stm32.taobao.com +//////////////////////////////////////////////////////////////////////// + +module tb_uart_sdram(); + +//********************************************************************// +//****************** Internal Signal and Defparam ********************// +//********************************************************************// + +//wire define +wire tx ; +wire sdram_clk ; +wire sdram_cke ; +wire sdram_cs_n ; +wire sdram_cas_n ; +wire sdram_ras_n ; +wire sdram_we_n ; +wire [1:0] sdram_ba ; +wire [12:0] sdram_addr ; +wire [1:0] sdram_dqm ; +wire [15:0] sdram_dq ; + +//reg define +reg sys_clk ; +reg sys_rst_n ; +reg rx ; +reg [7:0] data_mem [9:0] ; //data_mem鏄竴涓瓨鍌ㄥ櫒锛岀浉褰撲簬涓涓猺am + +//********************************************************************// +//**************************** Clk And Rst ***************************// +//********************************************************************// + +//璇诲彇sim鏂囦欢澶逛笅闈㈢殑data.txt鏂囦欢锛屽苟鎶婅鍑虹殑鏁版嵁瀹氫箟涓篸ata_mem +initial + $readmemh("E:/sources/sdram_test/uart_sdram/sim/test_data.txt",data_mem); + +//鏃堕挓銆佸浣嶄俊鍙 +initial + begin + sys_clk = 1'b1 ; + sys_rst_n <= 1'b0 ; + #200 + sys_rst_n <= 1'b1 ; + end + +always #10 sys_clk = ~sys_clk; + + +initial + begin + rx <= 1'b1; + #200 + rx_byte(); + end + +task rx_byte(); + integer j; + for(j=0;j<10;j=j+1) + rx_bit(data_mem[j]); +endtask + +task rx_bit(input[7:0] data); //data鏄痙ata_mem[j]鐨勫笺 + integer i; + for(i=0;i<10;i=i+1) + begin + case(i) + 0: rx <= 1'b0 ; //璧峰浣 + 1: rx <= data[0]; + 2: rx <= data[1]; + 3: rx <= data[2]; + 4: rx <= data[3]; + 5: rx <= data[4]; + 6: rx <= data[5]; + 7: rx <= data[6]; + 8: rx <= data[7]; //涓婇潰8涓彂閫佺殑鏄暟鎹綅 + 9: rx <= 1'b1 ; //鍋滄浣 + endcase + #1040; //涓涓尝鐗规椂闂=ssys_clk鍛ㄦ湡*娉㈢壒璁℃暟鍣 + end +endtask + +//閲嶅畾涔塪efparam,鐢ㄤ簬淇敼鍙傛暟,缂╃煭浠跨湡鏃堕棿 +defparam uart_sdram_inst.uart_rx_inst.BAUD_CNT_END = 52; +defparam uart_sdram_inst.uart_rx_inst.BAUD_CNT_END_HALF = 26; +defparam uart_sdram_inst.uart_tx_inst.BAUD_CNT_END = 52; +defparam uart_sdram_inst.fifo_read_inst.BAUD_CNT_END_HALF = 26; +defparam uart_sdram_inst.fifo_read_inst.BAUD_CNT_END = 52; +defparam sdram_model_plus_inst.addr_bits = 13; +defparam sdram_model_plus_inst.data_bits = 16; +defparam sdram_model_plus_inst.col_bits = 9; +defparam sdram_model_plus_inst.mem_sizes = 2*1024*1024; + +//********************************************************************// +//*************************** Instantiation **************************// +//********************************************************************// + +//-------------uart_sdram_inst------------- +uart_sdram uart_sdram_inst( + + .sys_clk (sys_clk ), + .sys_rst_n (sys_rst_n ), + .rx (rx ), + + .tx (tx ), + + .sdram_clk (sdram_clk ), + .sdram_cke (sdram_cke ), + .sdram_cs_n (sdram_cs_n ), + .sdram_cas_n (sdram_cas_n ), + .sdram_ras_n (sdram_ras_n ), + .sdram_we_n (sdram_we_n ), + .sdram_ba (sdram_ba ), + .sdram_addr (sdram_addr ), + .sdram_dqm (sdram_dqm ), + .sdram_dq (sdram_dq ) + +); + +//-------------sdram_model_plus_inst------------- +sdram_model_plus sdram_model_plus_inst( + .Dq (sdram_dq ), + .Addr (sdram_addr ), + .Ba (sdram_ba ), + .Clk (sdram_clk ), + .Cke (sdram_cke ), + .Cs_n (sdram_cs_n ), + .Ras_n (sdram_ras_n ), + .Cas_n (sdram_cas_n ), + .We_n (sdram_we_n ), + .Dqm (sdram_dqm ), + .Debug (1'b1 ) +); + +endmodule \ No newline at end of file diff --git a/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/test_data.txt b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/test_data.txt new file mode 100644 index 0000000..f81cb6e --- /dev/null +++ b/smh-ac415-fpga/examples/08_uart_sdram/uart_sdram/sim/test_data.txt @@ -0,0 +1 @@ +01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 \ No newline at end of file diff --git "a/smh-ac415-fpga/examples/08_uart_sdram/\345\256\236\351\252\214\347\216\260\350\261\241.txt" "b/smh-ac415-fpga/examples/08_uart_sdram/\345\256\236\351\252\214\347\216\260\350\261\241.txt" new file mode 100644 index 0000000..165e40b --- /dev/null +++ "b/smh-ac415-fpga/examples/08_uart_sdram/\345\256\236\351\252\214\347\216\260\350\261\241.txt" @@ -0,0 +1,5 @@ +鐜拌薄锛氭妸usb鎻掑叆鐢佃剳锛岄鍏堝畨瑁卌h340涓插彛椹卞姩锛屾墦寮鏌愪釜涓插彛杞欢锛屾尝鐗圭巼閫夋嫨9600锛屾帴鏀跺彂閫佸潎閫夋嫨hex锛屽彂閫佹杈撳叆鈥00112233445566778899鈥濓紝鍗10涓瓧鑺傦紝鎺ユ敹妗嗕細鏄剧ず杩10涓瓧鑺傦紝姝や腑浼氬厛鎶婅繖10涓瓧鑺傚瓨鍏dram锛屽湪浠巗dram鍙栧嚭杩斿洖缁欎覆鍙ｆ樉绀哄嚭鏉ャ傛渚嬬▼鍙傝冮噹鐏玣pga渚嬬▼淇敼鑰屾潵銆傚叿浣撳彲鍙傝冮噹鐏暀绋嬨 + +娴嬭瘯锛氬彲浠ユ祴璇晄dram鏄惁姝ｅ父銆 + + -- cgit v1.2.3