From ae27963ed2af845b1ac4138fa414cc7dc1bc587d Mon Sep 17 00:00:00 2001 From: root Date: Sat, 15 Nov 2025 14:29:43 +0000 Subject: split up zynq7_wrapper --- fpga/hp_lcd_driver/zynq7.mk | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'fpga/hp_lcd_driver/zynq7.mk') diff --git a/fpga/hp_lcd_driver/zynq7.mk b/fpga/hp_lcd_driver/zynq7.mk index 05f5727..31afd86 100644 --- a/fpga/hp_lcd_driver/zynq7.mk +++ b/fpga/hp_lcd_driver/zynq7.mk @@ -7,7 +7,9 @@ IP= \ zynq7_ip/blk_mem_gen_1.tcl \ zynq7_ip/axi_bram_ctrl_0.tcl \ zynq7_ip/processing_system7_0.tcl \ - zynq7_ip/fifo_generator_0.tcl + zynq7_ip/fifo_generator_0.tcl \ + zynq7_ip/axi_uart16550_0.tcl \ + zynq7_ip/axi_crossbar_0.tcl BIT=${BUILD}/out/hp_lcd_driver.bit @@ -37,7 +39,10 @@ SRCS= ${IP} \ vram_artix7.vhdl \ zynq7_wrapper.vhdl \ fifo_to_axi.vhdl \ - vnc_serializer.vhdl + vnc_hw.vhdl \ + vnc_serializer.vhdl \ + fb_hw.vhdl \ + kbd_uarts.vhdl -- cgit v1.2.3