From 7f512741992ea4fb7d210a4b915b128b75f91675 Mon Sep 17 00:00:00 2001 From: root Date: Sun, 5 Oct 2025 17:30:19 +0100 Subject: sync, and alternate tmds_encoders --- fpga/ebaz4205/src/uboot-debug.patch | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 fpga/ebaz4205/src/uboot-debug.patch (limited to 'fpga/ebaz4205/src') diff --git a/fpga/ebaz4205/src/uboot-debug.patch b/fpga/ebaz4205/src/uboot-debug.patch new file mode 100644 index 0000000..b645fba --- /dev/null +++ b/fpga/ebaz4205/src/uboot-debug.patch @@ -0,0 +1,21 @@ +diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c +index e5f55771..489f71f5 100644 +--- a/arch/arm/mach-zynq/cpu.c ++++ b/arch/arm/mach-zynq/cpu.c +@@ -137,8 +137,16 @@ int print_cpuinfo(void) + if (version > (PCW_SILICON_VERSION_3 << 1)) + version += 1; + ++ ++ + printf("CPU: Zynq %s\n", zynq_fpga_descs[cpu_id].devicename); + printf("Silicon: v%d.%d\n", version >> 1, version & 1); ++ ++ zynq_slcr_unlock(); ++ version=readl(&slcr_base->ocm_cfg); ++ zynq_slcr_lock(); ++ ++ printf("SCLR_BASE=%p, &OCM_CFG=%p, OCM_CFG=0x%08x\n",slcr_base,&slcr_base->ocm_cfg,version); + return 0; + } + #endif -- cgit v1.2.3