From 3eee5c973d8373cf0735a6af1d818440b56dd4e2 Mon Sep 17 00:00:00 2001 From: Mike Stirling Date: Sat, 16 Jul 2011 19:05:29 +0100 Subject: Fixed SRAM routing logic --- bbc_micro_de1.qsf | 25 +++++++++++++++++-------- bbc_micro_de1.vhd | 18 ++++++++++++++++-- bbc_micro_de1_tb.vhd | 4 ++-- pll32.vhd | 16 ++++++++-------- 4 files changed, 43 insertions(+), 20 deletions(-) diff --git a/bbc_micro_de1.qsf b/bbc_micro_de1.qsf index 167ed1c..72b1ee2 100644 --- a/bbc_micro_de1.qsf +++ b/bbc_micro_de1.qsf @@ -46,12 +46,6 @@ set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id e set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7 -set_global_assignment -name VHDL_FILE vidproc.vhd -set_global_assignment -name VHDL_FILE mc6845.vhd -set_global_assignment -name VHDL_FILE T65/T65_Pack.vhd -set_global_assignment -name VHDL_FILE T65/T65.vhd -set_global_assignment -name VHDL_FILE T65/T65_ALU.vhd -set_global_assignment -name VHDL_FILE T65/T65_MCode.vhd set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 set_location_assignment PIN_A13 -to GPIO_0[0] @@ -499,5 +493,20 @@ set_location_assignment PIN_Y7 -to SRAM_LB_N set_location_assignment PIN_T8 -to SRAM_OE_N set_location_assignment PIN_W7 -to SRAM_UB_N set_location_assignment PIN_AA10 -to SRAM_WE_N -set_global_assignment -name USE_CONFIGURATION_DEVICE ON -set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH WEAK PULL-UP" \ No newline at end of file +set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH WEAK PULL-UP" +set_global_assignment -name VHDL_FILE seg7.vhd +set_global_assignment -name VHDL_FILE vidproc.vhd +set_global_assignment -name VHDL_FILE mc6845.vhd +set_global_assignment -name VHDL_FILE T65/T65_Pack.vhd +set_global_assignment -name VHDL_FILE T65/T65.vhd +set_global_assignment -name VHDL_FILE T65/T65_ALU.vhd +set_global_assignment -name VHDL_FILE T65/T65_MCode.vhd +set_global_assignment -name QIP_FILE os12.qip +set_global_assignment -name QIP_FILE pll32.qip +set_global_assignment -name VHDL_FILE bbc_micro_de1.vhd +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top +set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region" +set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region" +set_global_assignment -name VHDL_FILE bbc_micro_de1_tb.vhd +set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/bbc_micro_de1.vhd b/bbc_micro_de1.vhd index 78f18a4..d854582 100644 --- a/bbc_micro_de1.vhd +++ b/bbc_micro_de1.vhd @@ -316,6 +316,9 @@ signal adlc_enable : std_logic; -- 0xFEA0-FEBF (Econet) signal adc_enable : std_logic; -- 0xFEC0-FEDF signal tube_enable : std_logic; -- 0xFEE0-FEFF +-- Temporary hack +signal kblink_enable : std_logic; + begin ------------------------- -- COMPONENT INSTANCES @@ -441,6 +444,9 @@ begin io_jim <= '1' when cpu_a(15 downto 8) = "11111101" else '0'; io_sheila <= '1' when cpu_a(15 downto 8) = "11111110" else '0'; + -- Temporary hack for keyboard links + kblink_enable <= '1' when cpu_a(15 downto 0) = "0000001010001111" else '0'; + -- SHEILA address demux -- All the system peripherals are mapped into this page as follows: -- 0xFE00 - 0xFE07 = MC6845 CRTC @@ -500,6 +506,8 @@ begin when "101" => adlc_enable <= '1'; -- 0xFEA0 when "110" => adc_enable <= '1'; -- 0xFEC0 when "111" => tube_enable <= '1'; -- 0xFEE0 + when others => + null; end case; end if; end process; @@ -509,6 +517,7 @@ begin mos_d when mos_enable = '1' else "11111111" when rom_enable = '1' else crtc_do when crtc_enable = '1' else + SW(7 downto 0) when kblink_enable = '1' else SRAM_DQ(7 downto 0); -- SRAM bus @@ -532,7 +541,7 @@ begin SRAM_DQ(7 downto 0) <= (others => 'Z'); -- Register SRAM signals to outputs (clock must be at least 2x CPU clock) - if cpu_clken = '0' then + if vid_clken = '1' then -- Fetch data from previous CPU cycle SRAM_WE_N <= not ram_write; SRAM_ADDR <= "00" & cpu_a(15 downto 0); @@ -542,7 +551,7 @@ begin else -- Fetch data from previous display cycle SRAM_WE_N <= '1'; - SRAM_ADDR <= "001" & crtc_ma(11 downto 0) & crtc_ra(2 downto 0); + SRAM_ADDR <= "000" & crtc_ma(11 downto 0) & crtc_ra(2 downto 0); end if; end if; end process; @@ -553,6 +562,11 @@ begin g_in <= '0'; b_in <= '0'; + GPIO_0(0) <= crtc_clken; + GPIO_0(1) <= crtc_hsync; + GPIO_0(2) <= crtc_vsync; + GPIO_0(3) <= crtc_de; + -- CRTC drives video out (CSYNC on HSYNC output, VSYNC high) VGA_HS <= not (crtc_hsync xor crtc_vsync); VGA_VS <= '1'; diff --git a/bbc_micro_de1_tb.vhd b/bbc_micro_de1_tb.vhd index 39df39b..29a1cc3 100644 --- a/bbc_micro_de1_tb.vhd +++ b/bbc_micro_de1_tb.vhd @@ -150,7 +150,7 @@ signal gpio_0 : std_logic_vector(35 downto 0); signal gpio_1 : std_logic_vector(35 downto 0); signal n_reset : std_logic := '0'; -signal slow : std_logic := '0'; +signal n_slow : std_logic := '1'; type ram_t is array(0 to 65535) of std_logic_vector(15 downto 0); signal ram : ram_t; @@ -215,7 +215,7 @@ begin gpio_1 ); - sw <= n_reset & slow & "00000000"; + sw <= n_reset & n_slow & "00000101"; clock_50 <= not clock_50 after 10 ns; clock_27(0) <= not clock_27(0) after 18.5 ns; clock_27(1) <= not clock_27(1) after 18.5 ns; diff --git a/pll32.vhd b/pll32.vhd index 3c9f397..43df1aa 100644 --- a/pll32.vhd +++ b/pll32.vhd @@ -138,13 +138,13 @@ BEGIN altpll_component : altpll GENERIC MAP ( - clk0_divide_by => 25, + clk0_divide_by => 3, clk0_duty_cycle => 50, - clk0_multiply_by => 16, + clk0_multiply_by => 4, clk0_phase_shift => "0", compensate_clock => "CLK0", gate_lock_signal => "NO", - inclk0_input_frequency => 20000, + inclk0_input_frequency => 41666, intended_device_family => "Cyclone II", invalid_lock_multiplier => 5, lpm_hint => "CBX_MODULE_PREFIX=pll32", @@ -234,7 +234,7 @@ END SYN; -- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" -- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" -- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" --- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000" +-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "24.000" -- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" -- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" -- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" @@ -244,7 +244,7 @@ END SYN; -- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" -- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1" -- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" --- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "300.000" +-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "312.000" -- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" -- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" -- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" @@ -290,13 +290,13 @@ END SYN; -- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" -- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" -- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all --- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "25" +-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "3" -- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" --- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "16" +-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "4" -- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" -- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" -- Retrieval info: CONSTANT: GATE_LOCK_SIGNAL STRING "NO" --- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000" +-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "41666" -- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II" -- Retrieval info: CONSTANT: INVALID_LOCK_MULTIPLIER NUMERIC "5" -- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" -- cgit v1.2.3