From 737ac5be9743e37b80133706faf02e959e803459 Mon Sep 17 00:00:00 2001 From: inmarket Date: Mon, 28 Oct 2013 19:06:16 +1000 Subject: Create uGFX board directories which include example Makefiles. Currently only done for the Olimex-SAM7EX256 board. --- boards/base/Olimex-SAM7EX256-GE12/board.mk | 14 + .../Olimex-SAM7EX256-GE12/board_Nokia6610GE12.h | 195 ++++++++ boards/base/Olimex-SAM7EX256-GE12/readme.txt | 6 + boards/base/Olimex-SAM7EX256-GE8/board.mk | 14 + .../base/Olimex-SAM7EX256-GE8/board_Nokia6610GE8.h | 195 ++++++++ boards/base/Olimex-SAM7EX256-GE8/example/Makefile | 199 ++++++++ boards/base/Olimex-SAM7EX256-GE8/example/chconf.h | 542 +++++++++++++++++++++ boards/base/Olimex-SAM7EX256-GE8/example/halconf.h | 360 ++++++++++++++ boards/base/Olimex-SAM7EX256-GE8/example/linker.ld | 105 ++++ boards/base/Olimex-SAM7EX256-GE8/example/mcuconf.h | 71 +++ .../base/Olimex-SAM7EX256-GE8/example/readme.txt | 3 + boards/base/Olimex-SAM7EX256-GE8/gadc_lld_board.h | 29 ++ .../base/Olimex-SAM7EX256-GE8/gaudin_lld_board.h | 33 ++ .../Olimex-SAM7EX256-GE8/ginput_lld_dial_board.h | 30 ++ .../Olimex-SAM7EX256-GE8/ginput_lld_toggle_board.h | 40 ++ 15 files changed, 1836 insertions(+) create mode 100644 boards/base/Olimex-SAM7EX256-GE12/board.mk create mode 100644 boards/base/Olimex-SAM7EX256-GE12/board_Nokia6610GE12.h create mode 100644 boards/base/Olimex-SAM7EX256-GE12/readme.txt create mode 100644 boards/base/Olimex-SAM7EX256-GE8/board.mk create mode 100644 boards/base/Olimex-SAM7EX256-GE8/board_Nokia6610GE8.h create mode 100644 boards/base/Olimex-SAM7EX256-GE8/example/Makefile create mode 100644 boards/base/Olimex-SAM7EX256-GE8/example/chconf.h create mode 100644 boards/base/Olimex-SAM7EX256-GE8/example/halconf.h create mode 100644 boards/base/Olimex-SAM7EX256-GE8/example/linker.ld create mode 100644 boards/base/Olimex-SAM7EX256-GE8/example/mcuconf.h create mode 100644 boards/base/Olimex-SAM7EX256-GE8/example/readme.txt create mode 100644 boards/base/Olimex-SAM7EX256-GE8/gadc_lld_board.h create mode 100644 boards/base/Olimex-SAM7EX256-GE8/gaudin_lld_board.h create mode 100644 boards/base/Olimex-SAM7EX256-GE8/ginput_lld_dial_board.h create mode 100644 boards/base/Olimex-SAM7EX256-GE8/ginput_lld_toggle_board.h (limited to 'boards') diff --git a/boards/base/Olimex-SAM7EX256-GE12/board.mk b/boards/base/Olimex-SAM7EX256-GE12/board.mk new file mode 100644 index 00000000..5230b6b4 --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE12/board.mk @@ -0,0 +1,14 @@ +GFXINC += $(GFXLIB)/boards/base/Olimex-SAM7EX256-GE12 $(GFXLIB)/boards/base/Olimex-SAM7EX256-GE8 +GFXSRC += +GFXDEFS += -DGFX_USE_OS_CHIBIOS=TRUE + +#This board has a Nokia6610GE12 display +include $(GFXLIB)/drivers/gdisp/Nokia6610GE12/gdisp_lld.mk +#This board supports GADC via the AT91SAM7 driver +include $(GFXLIB)/drivers/gadc/AT91SAM7/gadc_lld.mk +#This board supports GINPUT dials via the GADC driver +include $(GFXLIB)/drivers/ginput/dial/GADC/ginput_lld.mk +#This board supports GINPUT toggles via the Pal driver +include $(GFXLIB)/drivers/ginput/toggle/Pal/ginput_lld.mk +#This board support GAUDIN via the GADC driver +include $(GFXLIB)/drivers/gaudin/gadc/gaudin_lld.mk diff --git a/boards/base/Olimex-SAM7EX256-GE12/board_Nokia6610GE12.h b/boards/base/Olimex-SAM7EX256-GE12/board_Nokia6610GE12.h new file mode 100644 index 00000000..feb1887e --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE12/board_Nokia6610GE12.h @@ -0,0 +1,195 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +/** + * @file boards/base/Olimex-SAM7EX256-GE12/board_Nokia6610GE12.h + * @brief GDISP Graphic Driver subsystem board interface for the Olimex SAM7-EX256 board. + */ + +#ifndef _GDISP_LLD_BOARD_H +#define _GDISP_LLD_BOARD_H + +/* + * Set various display properties. These properties mostly depend on the exact controller chip you get. + * The defaults should work for most controllers. + */ +//#define GDISP_GE8_BROKEN_CONTROLLER FALSE // Uncomment this out if you have a controller thats not window wrap broken. +//#define GDISP_SCREEN_HEIGHT 130 // The visible display height +//#define GDISP_SCREEN_WIDTH 130 // The visible display width +//#define GDISP_RAM_X_OFFSET 0 // The x offset of the visible area +//#define GDISP_RAM_Y_OFFSET 2 // The y offset of the visible area +//#define GDISP_SLEEP_SIZE 32 // The size of the sleep mode partial display +//#define GDISP_SLEEP_POS 50 // The position of the sleep mode partial display +//#define GDISP_INITIAL_CONTRAST 38 // The initial contrast percentage +//#define GDISP_INITIAL_BACKLIGHT 100 // The initial backlight percentage + +// For a multiple display configuration we would put all this in a structure and then +// set g->board to that structure. + +// ****************************************************** +// Pointers to AT91SAM7X256 peripheral data structures +// ****************************************************** +static volatile AT91PS_PIO pPIOA = AT91C_BASE_PIOA; +static volatile AT91PS_PIO pPIOB = AT91C_BASE_PIOB; +static volatile AT91PS_SPI pSPI = AT91C_BASE_SPI0; +static volatile AT91PS_PMC pPMC = AT91C_BASE_PMC; +static volatile AT91PS_PDC pPDC = AT91C_BASE_PDC_SPI0; + +/* The PWM backlight control is non-linear on this board. + * We pick values here that make it look a bit more linear. + */ +#define PWM_TOP_VALUE 500 +#define PWM_BOTTOM_VALUE 200 + +#define PWM_VALUE(x) (PWM_BOTTOM_VALUE+(PWM_TOP_VALUE-PWM_BOTTOM_VALUE)*(x)/100) + +/* PWM configuration structure. The LCD Backlight is on PWM1/PB20 ie PWM2/PIN1 in ChibiOS speak */ +static const PWMConfig pwmcfg = { + 1000000, /* 1 MHz PWM clock frequency. Ignored as we are using PWM_MCK_DIV_n */ + 1000, /* PWM period is 1000 cycles. */ + NULL, + { + {PWM_MCK_DIV_1 | PWM_OUTPUT_ACTIVE_HIGH | PWM_OUTPUT_PIN1 | PWM_DISABLEPULLUP_PIN1, NULL}, + }, +}; + +static bool_t pwmRunning = FALSE; + +/** + * @brief Initialise the board for the display. + * @notes Performs the following functions: + * 1. initialise the spi port used by your display + * 2. initialise the reset pin (initial state not-in-reset) + * 3. initialise the chip select pin (initial state not-active) + * 4. initialise the backlight pin (initial state back-light off) + * + * @notapi + */ +static inline void init_board(GDisplay *g) { + + // As we are not using multiple displays we set g->board to NULL as we don't use it. + g->board = 0; + + switch(g->controllerdisplay) { + case 0: // Set up for Display 0 + // ********************************************************************************************* + // InitSpi( ) + // + // Sets up SPI channel 0 for communications to Nokia 6610 LCD Display + // + // I/O ports used: PA2 = LCD Reset (set to low to reset) + // PA12 = LCD chip select (set to low to select the LCD chip) + // PA16 = SPI0_MISO Master In - Slave Out (not used in LCD interface) + // PA17 = SPI0_MOSI Master Out - Slave In pin (Serial Data to LCD slave) + // PA18 = SPI0_SPCK Serial Clock (to LCD slave) + // PB20 = backlight control (normally PWM control, 1 = full on) + // + // *********************************************************************************************} + + /* This code should really use the ChibiOS driver for these functions */ + + // Pin for backlight + pPIOB->PIO_CODR = PIOB_LCD_BL_MASK; // Set PB20 to LOW + pPIOB->PIO_OER = PIOB_LCD_BL_MASK; // Configure PB20 as output + + // Reset pin + pPIOA->PIO_SODR = PIOA_LCD_RESET_MASK; // Set PA2 to HIGH + pPIOA->PIO_OER = PIOA_LCD_RESET_MASK; // Configure PA2 as output + + // CS pin - this seems to be ignored + // pPIOA->PIO_SODR = 1<<12; // Set PA2 to HIGH + // pPIOA->PIO_OER = 1<<12; // Configure PA2 as output + + // Init SPI0 + // Disable the following pins from PIO control (will be used instead by the SPI0 peripheral) + // BIT12 = PA12 -> SPI0_NPCS0 chip select + // BIT16 = PA16 -> SPI0_MISO Master In - Slave Out (not used in LCD interface) + // BIT17 = PA17 -> SPI0_MOSI Master Out - Slave In pin (Serial Data to LCD slave) + // BIT18 = PA18 -> SPI0_SPCK Serial Clock (to LCD slave) + pPIOA->PIO_PDR = (1<<12) | (1<<16) | (1<<17) | (1<<18); + pPIOA->PIO_ASR = (1<<12) | (1<<16) | (1<<17) | (1<<18); + pPIOA->PIO_BSR = 0; + + //enable the clock of SPI + pPMC->PMC_PCER = 1 << AT91C_ID_SPI0; + + // Fixed mode + pSPI->SPI_CR = 0x81; //SPI Enable, Software reset + pSPI->SPI_CR = 0x01; //SPI Enable + pSPI->SPI_MR = 0xE0011; //Master mode, fixed select, disable decoder, PCS=1110 + pSPI->SPI_CSR[0] = 0x01010311; //9bit, CPOL=1, ClockPhase=0, SCLK = 48Mhz/3 = 16MHz + + /* Display backlight control at 100% */ + pwmRunning = FALSE; + palSetPad(IOPORT2, PIOB_LCD_BL); + break; + } +} + +static inline void post_init_board(GDisplay *g) { + (void) g; +} + +static inline void setpin_reset(GDisplay *g, bool_t state) { + (void) g; + if (state) + palClearPad(IOPORT1, PIOA_LCD_RESET); + else + palSetPad(IOPORT1, PIOA_LCD_RESET); +} + +static inline void set_backlight(GDisplay *g, uint8_t percent) { + (void) g; + if (percent == 100) { + /* Turn the pin on - No PWM */ + if (pwmRunning) { + pwmStop(&PWMD2); + pwmRunning = FALSE; + } + palSetPad(IOPORT2, PIOB_LCD_BL); + } else if (percent == 0) { + /* Turn the pin off - No PWM */ + if (pwmRunning) { + pwmStop(&PWMD2); + pwmRunning = FALSE; + } + palClearPad(IOPORT2, PIOB_LCD_BL); + } else { + /* Use the PWM */ + if (!pwmRunning) { + pwmStart(&PWMD2, &pwmcfg); + pwmRunning = TRUE; + } + pwmEnableChannel(&PWMD2, 0, PWM_VALUE(percent)); + } +} + +static inline void acquire_bus(GDisplay *g) { + (void) g; +} + +static inline void release_bus(GDisplay *g) { + (void) g; +} + +static inline void write_index(GDisplay *g, uint16_t index) { + (void) g; + // wait for the previous transfer to complete + while((pSPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0); + // send the command + pSPI->SPI_TDR = index & 0xFF; +} + +static inline void write_data(GDisplay *g, uint16_t data) { + (void) g; + // wait for the previous transfer to complete + while((pSPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0); + // send the data + pSPI->SPI_TDR = data | 0x0100; +} + +#endif /* _GDISP_LLD_BOARD_H */ diff --git a/boards/base/Olimex-SAM7EX256-GE12/readme.txt b/boards/base/Olimex-SAM7EX256-GE12/readme.txt new file mode 100644 index 00000000..b84e5575 --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE12/readme.txt @@ -0,0 +1,6 @@ +This is the same as the Olimex-SAM7EX256-GE8 board except that it uses the GE12 display controller +instead of the GE8 display controller. + +See the Olimex-SAM7EX256-GE8 board file directory for example Makefiles etc. +Don't forget to change the example Makefile to point the GFX board file to the GE12 instead of the GE8. + diff --git a/boards/base/Olimex-SAM7EX256-GE8/board.mk b/boards/base/Olimex-SAM7EX256-GE8/board.mk new file mode 100644 index 00000000..c11a0bbb --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/board.mk @@ -0,0 +1,14 @@ +GFXINC += $(GFXLIB)/boards/base/Olimex-SAM7EX256-GE8 +GFXSRC += +GFXDEFS += -DGFX_USE_OS_CHIBIOS=TRUE + +#This board has a Nokia6610GE8 display +include $(GFXLIB)/drivers/gdisp/Nokia6610GE8/gdisp_lld.mk +#This board supports GADC via the AT91SAM7 driver +include $(GFXLIB)/drivers/gadc/AT91SAM7/gadc_lld.mk +#This board supports GINPUT dials via the GADC driver +include $(GFXLIB)/drivers/ginput/dial/GADC/ginput_lld.mk +#This board supports GINPUT toggles via the Pal driver +include $(GFXLIB)/drivers/ginput/toggle/Pal/ginput_lld.mk +#This board support GAUDIN via the GADC driver +include $(GFXLIB)/drivers/gaudin/gadc/gaudin_lld.mk diff --git a/boards/base/Olimex-SAM7EX256-GE8/board_Nokia6610GE8.h b/boards/base/Olimex-SAM7EX256-GE8/board_Nokia6610GE8.h new file mode 100644 index 00000000..c88dbe74 --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/board_Nokia6610GE8.h @@ -0,0 +1,195 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +/** + * @file boards/base/Olimex-SAM7EX256-GE8/board_Nokia6610GE8.h + * @brief GDISP Graphic Driver subsystem board interface for the Olimex SAM7-EX256 board. + */ + +#ifndef _GDISP_LLD_BOARD_H +#define _GDISP_LLD_BOARD_H + +/* + * Set various display properties. These properties mostly depend on the exact controller chip you get. + * The defaults should work for most controllers. + */ +//#define GDISP_GE8_BROKEN_CONTROLLER FALSE // Uncomment this out if you have a controller thats not window wrap broken. +//#define GDISP_SCREEN_HEIGHT 130 // The visible display height +//#define GDISP_SCREEN_WIDTH 130 // The visible display width +//#define GDISP_RAM_X_OFFSET 0 // The x offset of the visible area +//#define GDISP_RAM_Y_OFFSET 2 // The y offset of the visible area +//#define GDISP_SLEEP_SIZE 32 // The size of the sleep mode partial display +//#define GDISP_SLEEP_POS 50 // The position of the sleep mode partial display +//#define GDISP_INITIAL_CONTRAST 38 // The initial contrast percentage +//#define GDISP_INITIAL_BACKLIGHT 100 // The initial backlight percentage + +// For a multiple display configuration we would put all this in a structure and then +// set g->board to that structure. + +// ****************************************************** +// Pointers to AT91SAM7X256 peripheral data structures +// ****************************************************** +static volatile AT91PS_PIO pPIOA = AT91C_BASE_PIOA; +static volatile AT91PS_PIO pPIOB = AT91C_BASE_PIOB; +static volatile AT91PS_SPI pSPI = AT91C_BASE_SPI0; +static volatile AT91PS_PMC pPMC = AT91C_BASE_PMC; +static volatile AT91PS_PDC pPDC = AT91C_BASE_PDC_SPI0; + +/* The PWM backlight control is non-linear on this board. + * We pick values here that make it look a bit more linear. + */ +#define PWM_TOP_VALUE 500 +#define PWM_BOTTOM_VALUE 200 + +#define PWM_VALUE(x) (PWM_BOTTOM_VALUE+(PWM_TOP_VALUE-PWM_BOTTOM_VALUE)*(x)/100) + +/* PWM configuration structure. The LCD Backlight is on PWM1/PB20 ie PWM2/PIN1 in ChibiOS speak */ +static const PWMConfig pwmcfg = { + 1000000, /* 1 MHz PWM clock frequency. Ignored as we are using PWM_MCK_DIV_n */ + 1000, /* PWM period is 1000 cycles. */ + NULL, + { + {PWM_MCK_DIV_1 | PWM_OUTPUT_ACTIVE_HIGH | PWM_OUTPUT_PIN1 | PWM_DISABLEPULLUP_PIN1, NULL}, + }, +}; + +static bool_t pwmRunning = FALSE; + +/** + * @brief Initialise the board for the display. + * @notes Performs the following functions: + * 1. initialise the spi port used by your display + * 2. initialise the reset pin (initial state not-in-reset) + * 3. initialise the chip select pin (initial state not-active) + * 4. initialise the backlight pin (initial state back-light off) + * + * @notapi + */ +static inline void init_board(GDisplay *g) { + + // As we are not using multiple displays we set g->board to NULL as we don't use it. + g->board = 0; + + switch(g->controllerdisplay) { + case 0: // Set up for Display 0 + // ********************************************************************************************* + // InitSpi( ) + // + // Sets up SPI channel 0 for communications to Nokia 6610 LCD Display + // + // I/O ports used: PA2 = LCD Reset (set to low to reset) + // PA12 = LCD chip select (set to low to select the LCD chip) + // PA16 = SPI0_MISO Master In - Slave Out (not used in LCD interface) + // PA17 = SPI0_MOSI Master Out - Slave In pin (Serial Data to LCD slave) + // PA18 = SPI0_SPCK Serial Clock (to LCD slave) + // PB20 = backlight control (normally PWM control, 1 = full on) + // + // *********************************************************************************************} + + /* This code should really use the ChibiOS driver for these functions */ + + // Pin for backlight + pPIOB->PIO_CODR = PIOB_LCD_BL_MASK; // Set PB20 to LOW + pPIOB->PIO_OER = PIOB_LCD_BL_MASK; // Configure PB20 as output + + // Reset pin + pPIOA->PIO_SODR = PIOA_LCD_RESET_MASK; // Set PA2 to HIGH + pPIOA->PIO_OER = PIOA_LCD_RESET_MASK; // Configure PA2 as output + + // CS pin - this seems to be ignored + // pPIOA->PIO_SODR = 1<<12; // Set PA2 to HIGH + // pPIOA->PIO_OER = 1<<12; // Configure PA2 as output + + // Init SPI0 + // Disable the following pins from PIO control (will be used instead by the SPI0 peripheral) + // BIT12 = PA12 -> SPI0_NPCS0 chip select + // BIT16 = PA16 -> SPI0_MISO Master In - Slave Out (not used in LCD interface) + // BIT17 = PA17 -> SPI0_MOSI Master Out - Slave In pin (Serial Data to LCD slave) + // BIT18 = PA18 -> SPI0_SPCK Serial Clock (to LCD slave) + pPIOA->PIO_PDR = (1<<12) | (1<<16) | (1<<17) | (1<<18); + pPIOA->PIO_ASR = (1<<12) | (1<<16) | (1<<17) | (1<<18); + pPIOA->PIO_BSR = 0; + + //enable the clock of SPI + pPMC->PMC_PCER = 1 << AT91C_ID_SPI0; + + // Fixed mode + pSPI->SPI_CR = 0x81; //SPI Enable, Software reset + pSPI->SPI_CR = 0x01; //SPI Enable + pSPI->SPI_MR = 0xE0011; //Master mode, fixed select, disable decoder, PCS=1110 + pSPI->SPI_CSR[0] = 0x01010311; //9bit, CPOL=1, ClockPhase=0, SCLK = 48Mhz/3 = 16MHz + + /* Display backlight control at 100% */ + pwmRunning = FALSE; + palSetPad(IOPORT2, PIOB_LCD_BL); + break; + } +} + +static inline void post_init_board(GDisplay *g) { + (void) g; +} + +static inline void setpin_reset(GDisplay *g, bool_t state) { + (void) g; + if (state) + palClearPad(IOPORT1, PIOA_LCD_RESET); + else + palSetPad(IOPORT1, PIOA_LCD_RESET); +} + +static inline void set_backlight(GDisplay *g, uint8_t percent) { + (void) g; + if (percent == 100) { + /* Turn the pin on - No PWM */ + if (pwmRunning) { + pwmStop(&PWMD2); + pwmRunning = FALSE; + } + palSetPad(IOPORT2, PIOB_LCD_BL); + } else if (percent == 0) { + /* Turn the pin off - No PWM */ + if (pwmRunning) { + pwmStop(&PWMD2); + pwmRunning = FALSE; + } + palClearPad(IOPORT2, PIOB_LCD_BL); + } else { + /* Use the PWM */ + if (!pwmRunning) { + pwmStart(&PWMD2, &pwmcfg); + pwmRunning = TRUE; + } + pwmEnableChannel(&PWMD2, 0, PWM_VALUE(percent)); + } +} + +static inline void acquire_bus(GDisplay *g) { + (void) g; +} + +static inline void release_bus(GDisplay *g) { + (void) g; +} + +static inline void write_index(GDisplay *g, uint16_t index) { + (void) g; + // wait for the previous transfer to complete + while((pSPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0); + // send the command + pSPI->SPI_TDR = index & 0xFF; +} + +static inline void write_data(GDisplay *g, uint16_t data) { + (void) g; + // wait for the previous transfer to complete + while((pSPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0); + // send the data + pSPI->SPI_TDR = data | 0x0100; +} + +#endif /* _GDISP_LLD_BOARD_H */ diff --git a/boards/base/Olimex-SAM7EX256-GE8/example/Makefile b/boards/base/Olimex-SAM7EX256-GE8/example/Makefile new file mode 100644 index 00000000..cff4e7ad --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/example/Makefile @@ -0,0 +1,199 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) +# USE_OPT = -O2 -ggdb -gstabs+ -fomit-frame-pointer -mabi=apcs-gnu + USE_OPT = -O0 -ggdb -gstabs+ -fomit-frame-pointer -mabi=apcs-gnu +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = no +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths for ChibiOS +CHIBIOS = ../ChibiOS +include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk +include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk + +# We define a non standard linker script here just to give us some more stack space +# LDSCRIPT= $(PORTLD)/AT91SAM7X256.ld +LDSCRIPT= linker.ld + +# Imported source files and paths for uGFX +GFXLIB = ../uGFX +include $(GFXLIB)/gfx.mk +include $(GFXLIB)/boards/base/Olimex-SAM7EX256-GE8/board.mk + +# Where is our source code - alter these for your project. +MYFILES = $(GFXLIB)/demos/modules/gdisp/basics +MYCSRC = $(MYFILES)/main.c + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(GFXSRC) \ + $(MYCSRC) + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(GFXINC) \ + $(MYFILES) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = arm7tdmi + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc -ggdb -gstabs+ +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = $(GFXDEFS) + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/boards/base/Olimex-SAM7EX256-GE8/example/chconf.h b/boards/base/Olimex-SAM7EX256-GE8/example/chconf.h new file mode 100644 index 00000000..6d012c3e --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/example/chconf.h @@ -0,0 +1,542 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + --- + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes ChibiOS/RT, without being obliged to provide + the source code for any proprietary components. See the file exception.txt + for full details of how and when the exception can be applied. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/boards/base/Olimex-SAM7EX256-GE8/example/halconf.h b/boards/base/Olimex-SAM7EX256-GE8/example/halconf.h new file mode 100644 index 00000000..db88d41b --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/example/halconf.h @@ -0,0 +1,360 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + --- + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes ChibiOS/RT, without being obliged to provide + the source code for any proprietary components. See the file exception.txt + for full details of how and when the exception can be applied. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#define PWM_USE_PWM1 FALSE +#define PWM_USE_PWM2 TRUE +#define PWM_USE_PWM3 FALSE +#define PWM_USE_PWM4 FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/boards/base/Olimex-SAM7EX256-GE8/example/linker.ld b/boards/base/Olimex-SAM7EX256-GE8/example/linker.ld new file mode 100644 index 00000000..c36a07a3 --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/example/linker.ld @@ -0,0 +1,105 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * AT91SAM7X256 memory setup. + */ +__und_stack_size__ = 0x0004; +__abt_stack_size__ = 0x0004; +__fiq_stack_size__ = 0x0010; +__irq_stack_size__ = 0x0080; +__svc_stack_size__ = 0x0004; +__sys_stack_size__ = 0x0400; +__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__; + +MEMORY +{ + flash : org = 0x100000, len = 256k + ram : org = 0x200020, len = 64k - 0x20 +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + *(.ctors) + *(.dtors) + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; +__main_thread_stack_base__ = __ram_end__ - __stacks_total_size__; diff --git a/boards/base/Olimex-SAM7EX256-GE8/example/mcuconf.h b/boards/base/Olimex-SAM7EX256-GE8/example/mcuconf.h new file mode 100644 index 00000000..a9a0fea7 --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/example/mcuconf.h @@ -0,0 +1,71 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + --- + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes ChibiOS/RT, without being obliged to provide + the source code for any proprietary components. See the file exception.txt + for full details of how and when the exception can be applied. +*/ + +/* + * AT91SAM7 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + */ + +/* + * ADC driver system settings. + */ + +/* + * CAN driver system settings. + */ + +/* + * MAC driver system settings. + */ +#define MAC_TRANSMIT_BUFFERS 2 +#define MAC_RECEIVE_BUFFERS 2 +#define MAC_BUFFERS_SIZE 1518 +#define EMAC_INTERRUPT_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 3) + +/* + * PWM driver system settings. + */ + +/* + * SERIAL driver system settings. + */ +#define USE_SAM7_USART0 TRUE +#define USE_SAM7_USART1 TRUE +#define SAM7_USART0_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2) +#define SAM7_USART1_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2) + +/* + * SPI driver system settings. + */ +#define USE_AT91SAM7_SPI FALSE +#define AT91SAM7_SPI_USE_SPI0 TRUE +#define AT91SAM7_SPI_USE_SPI1 FALSE +#define AT91SAM7_SPI0_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 1) +#define AT91SAM7_SPI1_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 1) diff --git a/boards/base/Olimex-SAM7EX256-GE8/example/readme.txt b/boards/base/Olimex-SAM7EX256-GE8/example/readme.txt new file mode 100644 index 00000000..a357dc52 --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/example/readme.txt @@ -0,0 +1,3 @@ +Copy these files into your own project directory and alter them to suite. + +In particular look at the MYFILES definition and the MYCSRC definition. \ No newline at end of file diff --git a/boards/base/Olimex-SAM7EX256-GE8/gadc_lld_board.h b/boards/base/Olimex-SAM7EX256-GE8/gadc_lld_board.h new file mode 100644 index 00000000..fef861e5 --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/gadc_lld_board.h @@ -0,0 +1,29 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +/** + * @file boards/base/Olimex-SAM7EX256-GE8/gadc_lld_board.h + * @brief GADC Driver config file. + */ + +#ifndef _GADC_LLD_BOARD_H +#define _GADC_LLD_BOARD_H + +#if GFX_USE_GADC + +/*===========================================================================*/ +/* Analogue devices on this board */ +/*===========================================================================*/ + +#define GADC_PHYSDEV_MICROPHONE 0x00000080 +#define GADC_PHYSDEV_DIAL 0x00000040 +#define GADC_PHYSDEV_TEMPERATURE 0x00000020 + +#endif /* GFX_USE_GADC */ + +#endif /* _GADC_LLD_BOARD_H */ + diff --git a/boards/base/Olimex-SAM7EX256-GE8/gaudin_lld_board.h b/boards/base/Olimex-SAM7EX256-GE8/gaudin_lld_board.h new file mode 100644 index 00000000..632f0659 --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/gaudin_lld_board.h @@ -0,0 +1,33 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +/** + * @file boards/base/Olimex-SAM7EX256-GE8/gaudin_lld_board.h + * @brief GAUDIN Driver board config file for the Olimex SAM7EX256 board + */ + +#ifndef _GAUDIN_LLD_BOARD_H +#define _GAUDIN_LLD_BOARD_H + +/*===========================================================================*/ +/* Audio inputs on this board */ +/*===========================================================================*/ + +#define GAUDIN_NUM_CHANNELS 1 + +/** + * The list of audio channels and their uses + */ +#define GAUDIN_MICROPHONE 0 + +#ifdef GAUDIN_LLD_IMPLEMENTATION + static uint32_t gaudin_lld_physdevs[GAUDIN_NUM_CHANNELS] = { + GADC_PHYSDEV_MICROPHONE, + }; +#endif + +#endif /* _GAUDIN_LLD_BOARD_H */ diff --git a/boards/base/Olimex-SAM7EX256-GE8/ginput_lld_dial_board.h b/boards/base/Olimex-SAM7EX256-GE8/ginput_lld_dial_board.h new file mode 100644 index 00000000..c0d3ab3f --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/ginput_lld_dial_board.h @@ -0,0 +1,30 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +/** + * @file boards/base/Olimex-SAM7EX256-GE8/ginput_lld_dial_board.h + * @brief GINPUT Dial Driver config file. + */ + +#ifndef _GINPUT_LLD_DIAL_BOARD_H +#define _GINPUT_LLD_DIAL_BOARD_H + +#if GFX_USE_GINPUT && GINPUT_NEED_DIAL + +/*===========================================================================*/ +/* Analogue devices on this board */ +/*===========================================================================*/ + +#define GINPUT_DIAL_NUM_PORTS 1 +#define GINPUT_DIAL_DEVICE0 GADC_PHYSDEV_DIAL +#define GINPUT_DIAL_POLL_PERIOD 200 +#define GINPUT_DIAL_CYCLE_POLL FALSE + +#endif /* GFX_USE_GINPUT && GINPUT_NEED_DIAL */ + +#endif /* _GINPUT_LLD_DIAL_BOARD_H */ + diff --git a/boards/base/Olimex-SAM7EX256-GE8/ginput_lld_toggle_board.h b/boards/base/Olimex-SAM7EX256-GE8/ginput_lld_toggle_board.h new file mode 100644 index 00000000..39e7837a --- /dev/null +++ b/boards/base/Olimex-SAM7EX256-GE8/ginput_lld_toggle_board.h @@ -0,0 +1,40 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +/** + * @file boards/base/Olimex-SAM7EX256-GE8/ginput_lld_toggle_board.h + * @brief GINPUT Toggle low level driver source for the ChibiOS PAL hardware on the Olimex SAM7EX256 board. + */ + +#ifndef _GDISP_LLD_TOGGLE_BOARD_H +#define _GDISP_LLD_TOGGLE_BOARD_H + +#define GINPUT_TOGGLE_NUM_PORTS 7 // The total number of toggle inputs +#define GINPUT_TOGGLE_CONFIG_ENTRIES 2 // The total number of GToggleConfig entries + +#define GINPUT_TOGGLE_SW1 0 // Switch 1 +#define GINPUT_TOGGLE_SW2 1 // Switch 2 +#define GINPUT_TOGGLE_LEFT 2 // Joystick Left +#define GINPUT_TOGGLE_DOWN 3 // Joystick Down +#define GINPUT_TOGGLE_UP 4 // Joystick Up +#define GINPUT_TOGGLE_RIGHT 5 // Joystick Right +#define GINPUT_TOGGLE_CENTER 6 // Joystick Center + +#define GINPUT_TOGGLE_DECLARE_STRUCTURE() \ + const GToggleConfig GInputToggleConfigTable[GINPUT_TOGGLE_CONFIG_ENTRIES] = { \ + {AT91C_BASE_PIOB, /* Switch 1 and Switch 2 */ \ + PIOB_SW1_MASK|PIOB_SW2_MASK, \ + PIOB_SW1_MASK|PIOB_SW2_MASK, \ + PAL_MODE_INPUT}, \ + {AT91C_BASE_PIOA, /* B1..4 Joystick */ \ + PIOA_B1_MASK|PIOA_B2_MASK|PIOA_B3_MASK|PIOA_B4_MASK|PIOA_B5_MASK, \ + PIOA_B1_MASK|PIOA_B2_MASK|PIOA_B3_MASK|PIOA_B4_MASK|PIOA_B5_MASK, \ + PAL_MODE_INPUT}, \ + } + +#endif /* _GDISP_LLD_TOGGLE_BOARD_H */ + -- cgit v1.2.3