From 205160aec0bace67836ee70e5bdaa85f4d7f10d5 Mon Sep 17 00:00:00 2001 From: inmarket Date: Wed, 25 Nov 2015 12:24:22 +1000 Subject: Change STM32F429i-Discovery board to use the general STM32LTDC driver. The special ILI9341 init code is now in the board file (it is board specific). The specific STM32F429i-Discovery driver is now gone --- boards/base/STM32F429i-Discovery/board.mk | 2 +- .../board_STM32F429iDiscovery.h | 130 -------------- boards/base/STM32F429i-Discovery/board_STM32LTDC.h | 199 +++++++++++++++++++++ boards/base/STM32F429i-Discovery/ili9341.h | 97 ++++++++++ boards/base/STM32F746-Discovery/board.mk | 2 +- .../STM32F746-Discovery/stm32f746g_raw32_ugfx.c | 1 - 6 files changed, 298 insertions(+), 133 deletions(-) delete mode 100644 boards/base/STM32F429i-Discovery/board_STM32F429iDiscovery.h create mode 100644 boards/base/STM32F429i-Discovery/board_STM32LTDC.h create mode 100644 boards/base/STM32F429i-Discovery/ili9341.h (limited to 'boards') diff --git a/boards/base/STM32F429i-Discovery/board.mk b/boards/base/STM32F429i-Discovery/board.mk index 09116393..cbf08097 100644 --- a/boards/base/STM32F429i-Discovery/board.mk +++ b/boards/base/STM32F429i-Discovery/board.mk @@ -3,5 +3,5 @@ GFXSRC += $(GFXLIB)/boards/base/STM32F429i-Discovery/stm32f429i_discovery_sdram $(GFXLIB)/boards/base/STM32F429i-Discovery/stm32f4xx_fmc.c GFXDEFS += -DGFX_USE_OS_CHIBIOS=TRUE -include $(GFXLIB)/drivers/gdisp/STM32F429iDiscovery/driver.mk +include $(GFXLIB)/drivers/gdisp/STM32LTDC/driver.mk include $(GFXLIB)/drivers/ginput/touch/STMPE811/driver.mk diff --git a/boards/base/STM32F429i-Discovery/board_STM32F429iDiscovery.h b/boards/base/STM32F429i-Discovery/board_STM32F429iDiscovery.h deleted file mode 100644 index cdea4b54..00000000 --- a/boards/base/STM32F429i-Discovery/board_STM32F429iDiscovery.h +++ /dev/null @@ -1,130 +0,0 @@ -/* - * This file is subject to the terms of the GFX License. If a copy of - * the license was not distributed with this file, you can obtain one at: - * - * http://ugfx.org/license.html - */ - -#ifndef _GDISP_LLD_BOARD_H -#define _GDISP_LLD_BOARD_H - -#include "stm32f4xx_fmc.h" -#include "stm32f429i_discovery_sdram.h" -#include - -#define SPI_PORT &SPID5 -#define DC_PORT GPIOD -#define DC_PIN GPIOD_LCD_WRX - -static const SPIConfig spi_cfg = { - NULL, - GPIOC, - GPIOC_SPI5_LCD_CS, - ((1 << 3) & SPI_CR1_BR) | SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR -}; - -static const ltdcConfig driverCfg = { - 240, 320, - 10, 2, - 20, 2, - 10, 4, - 0, - 0x000000, - { - (LLDCOLOR_TYPE *)SDRAM_BANK_ADDR, // frame - 240, 320, // width, height - 240 * LTDC_PIXELBYTES, // pitch - LTDC_PIXELFORMAT, // fmt - 0, 0, // x, y - 240, 320, // cx, cy - LTDC_COLOR_FUCHSIA, // defcolor - 0x980088, // keycolor - LTDC_BLEND_FIX1_FIX2, // blending - 0, // palette - 0, // palettelen - 0xFF, // alpha - LTDC_LEF_ENABLE // flags - }, - LTDC_UNUSED_LAYER_CONFIG -}; - -static GFXINLINE void init_board(GDisplay *g) { - - // As we are not using multiple displays we set g->board to NULL as we don't use it. - g->board = 0; - - switch(g->controllerdisplay) { - case 0: // Set up for Display 0 - palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); // UART_TX - palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); // UART_RX - palSetPadMode(GPIOF, GPIOF_LCD_DCX, PAL_MODE_ALTERNATE(5)); - palSetPadMode(GPIOF, GPIOF_LCD_DE, PAL_MODE_ALTERNATE(14)); - - #define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */ - #define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */ - #define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */ - #define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */ - #define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */ - #define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */ - - #define STM32_PLLSAIN_VALUE 192 - #define STM32_PLLSAIQ_VALUE 7 - #define STM32_PLLSAIR_VALUE 4 - #define STM32_PLLSAIR_POST STM32_SAIR_DIV4 - - /* PLLSAI activation.*/ - RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24); - RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST; - RCC->CR |= RCC_CR_PLLSAION; - - // Initialise the SDRAM - SDRAM_Init(); - - // Clear the SDRAM - memset((void *)SDRAM_BANK_ADDR, 0, 0x400000); - - spiStart(SPI_PORT, &spi_cfg); - break; - } -} - -static GFXINLINE void post_init_board(GDisplay *g) { - (void) g; -} - -static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) { - (void) g; - (void) percent; -} - -static GFXINLINE void acquire_bus(GDisplay *g) { - (void) g; - - spiSelect(SPI_PORT); -} - -static GFXINLINE void release_bus(GDisplay *g) { - (void) g; - - spiUnselect(SPI_PORT); -} - -static GFXINLINE void write_index(GDisplay *g, uint8_t index) { - static uint8_t sindex; - (void) g; - - palClearPad(DC_PORT, DC_PIN); - sindex = index; - spiSend(SPI_PORT, 1, &sindex); -} - -static GFXINLINE void write_data(GDisplay *g, uint8_t data) { - static uint8_t sdata; - (void) g; - - palSetPad(DC_PORT, DC_PIN); - sdata = data; - spiSend(SPI_PORT, 1, &sdata); -} - -#endif /* _GDISP_LLD_BOARD_H */ diff --git a/boards/base/STM32F429i-Discovery/board_STM32LTDC.h b/boards/base/STM32F429i-Discovery/board_STM32LTDC.h new file mode 100644 index 00000000..8cd3048d --- /dev/null +++ b/boards/base/STM32F429i-Discovery/board_STM32LTDC.h @@ -0,0 +1,199 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +#ifndef _GDISP_LLD_BOARD_H +#define _GDISP_LLD_BOARD_H + +#include "stm32f4xx_fmc.h" +#include "stm32f429i_discovery_sdram.h" +#include + +#define SPI_PORT &SPID5 +#define DC_PORT GPIOD +#define DC_PIN GPIOD_LCD_WRX + +static const SPIConfig spi_cfg = { + NULL, + GPIOC, + GPIOC_SPI5_LCD_CS, + ((1 << 3) & SPI_CR1_BR) | SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR +}; + +static const ltdcConfig driverCfg = { + 240, 320, + 10, 2, + 20, 2, + 10, 4, + 0, + 0x000000, + { + (LLDCOLOR_TYPE *)SDRAM_BANK_ADDR, // frame + 240, 320, // width, height + 240 * LTDC_PIXELBYTES, // pitch + LTDC_PIXELFORMAT, // fmt + 0, 0, // x, y + 240, 320, // cx, cy + LTDC_COLOR_FUCHSIA, // defcolor + 0x980088, // keycolor + LTDC_BLEND_FIX1_FIX2, // blending + 0, // palette + 0, // palettelen + 0xFF, // alpha + LTDC_LEF_ENABLE // flags + }, + LTDC_UNUSED_LAYER_CONFIG +}; + +#include "ili9341.h" + +static void acquire_bus(GDisplay *g) { + (void) g; + + spiSelect(SPI_PORT); +} + +static void release_bus(GDisplay *g) { + (void) g; + + spiUnselect(SPI_PORT); +} + +static void write_index(GDisplay *g, uint8_t index) { + static uint8_t sindex; + (void) g; + + palClearPad(DC_PORT, DC_PIN); + sindex = index; + spiSend(SPI_PORT, 1, &sindex); +} + +static void write_data(GDisplay *g, uint8_t data) { + static uint8_t sdata; + (void) g; + + palSetPad(DC_PORT, DC_PIN); + sdata = data; + spiSend(SPI_PORT, 1, &sdata); +} + +static void Init9341(GDisplay *g) { + #define REG_TYPEMASK 0xFF00 + #define REG_DATAMASK 0x00FF + + #define REG_DATA 0x0000 + #define REG_COMMAND 0x0100 + #define REG_DELAY 0x0200 + + static const uint16_t initdata[] = { + REG_COMMAND | ILI9341_CMD_RESET, + REG_DELAY | 5, + REG_COMMAND | ILI9341_CMD_DISPLAY_OFF, + REG_COMMAND | ILI9341_SET_FRAME_CTL_NORMAL, 0x00, 0x1B, + REG_COMMAND | ILI9341_SET_FUNCTION_CTL, 0x0A, 0xA2, + REG_COMMAND | ILI9341_SET_POWER_CTL_1, 0x10, + REG_COMMAND | ILI9341_SET_POWER_CTL_2, 0x10, + #if 1 + REG_COMMAND | ILI9341_SET_VCOM_CTL_1, 0x45, 0x15, + REG_COMMAND | ILI9341_SET_VCOM_CTL_2, 0x90, + #else + REG_COMMAND | ILI9341_SET_VCOM_CTL_1, 0x35, 0x3E, + REG_COMMAND | ILI9341_SET_VCOM_CTL_2, 0xBE, + #endif + REG_COMMAND | ILI9341_SET_MEM_ACS_CTL, 0xC8, + REG_COMMAND | ILI9341_SET_RGB_IF_SIG_CTL, 0xC2, + REG_COMMAND | ILI9341_SET_FUNCTION_CTL, 0x0A, 0xA7, 0x27, 0x04, + REG_COMMAND | ILI9341_SET_COL_ADDR, 0x00, 0x00, 0x00, 0xEF, + REG_COMMAND | ILI9341_SET_PAGE_ADDR, 0x00, 0x00, 0x01, 0x3F, + REG_COMMAND | ILI9341_SET_IF_CTL, 0x01, 0x00, 0x06, + REG_COMMAND | ILI9341_SET_GAMMA, 0x01, + REG_COMMAND | ILI9341_SET_PGAMMA, + #if 1 + 0x0F, 0x29, 0x24, 0x0C, 0x0E, 0x09, 0x4E, 0x78, + 0x3C, 0x09, 0x13, 0x05, 0x17, 0x11, 0x00, + #else + 0x1F, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87, + 0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00, + #endif + REG_COMMAND | ILI9341_SET_NGAMMA, + #if 1 + 0x00, 0x16, 0x1B, 0x04, 0x11, 0x07, 0x31, 0x33, + 0x42, 0x05, 0x0C, 0x0A, 0x28, 0x2F, 0x0F, + #else + 0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78, + 0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f, + #endif + REG_COMMAND | ILI9341_CMD_SLEEP_OFF, + REG_DELAY | 10, + REG_COMMAND | ILI9341_CMD_DISPLAY_ON, + REG_COMMAND | ILI9341_SET_MEM + }; + + const uint16_t *p; + + acquire_bus(g); + for(p = initdata; p < &initdata[sizeof(initdata)/sizeof(initdata[0])]; p++) { + switch(*p & REG_TYPEMASK) { + case REG_DATA: write_data(g, *p); break; + case REG_COMMAND: write_index(g, *p); break; + case REG_DELAY: gfxSleepMilliseconds(*p & 0xFF); break; + } + } + release_bus(g); +} + +static void init_board(GDisplay *g) { + + // As we are not using multiple displays we set g->board to NULL as we don't use it. + g->board = 0; + + switch(g->controllerdisplay) { + case 0: // Set up for Display 0 + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); // UART_TX + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); // UART_RX + palSetPadMode(GPIOF, GPIOF_LCD_DCX, PAL_MODE_ALTERNATE(5)); + palSetPadMode(GPIOF, GPIOF_LCD_DE, PAL_MODE_ALTERNATE(14)); + + #define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */ + #define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */ + #define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */ + #define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */ + #define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */ + #define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */ + + #define STM32_PLLSAIN_VALUE 192 + #define STM32_PLLSAIQ_VALUE 7 + #define STM32_PLLSAIR_VALUE 4 + #define STM32_PLLSAIR_POST STM32_SAIR_DIV4 + + /* PLLSAI activation.*/ + RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24); + RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST; + RCC->CR |= RCC_CR_PLLSAION; + + // Initialise the SDRAM + SDRAM_Init(); + + // Clear the SDRAM + memset((void *)SDRAM_BANK_ADDR, 0, 0x400000); + + spiStart(SPI_PORT, &spi_cfg); + + Init9341(g); + break; + } +} + +static GFXINLINE void post_init_board(GDisplay *g) { + (void) g; +} + +static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) { + (void) g; + (void) percent; +} + +#endif /* _GDISP_LLD_BOARD_H */ diff --git a/boards/base/STM32F429i-Discovery/ili9341.h b/boards/base/STM32F429i-Discovery/ili9341.h new file mode 100644 index 00000000..ae1620c0 --- /dev/null +++ b/boards/base/STM32F429i-Discovery/ili9341.h @@ -0,0 +1,97 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +#ifndef ILI9341_H +#define ILI9341_H + +// ILI9341 commands +#define ILI9341_CMD_NOP 0x00 /**< No operation.*/ +#define ILI9341_CMD_RESET 0x01 /**< Software reset.*/ +#define ILI9341_GET_ID_INFO 0x04 /**< Get ID information.*/ +#define ILI9341_GET_STATUS 0x09 /**< Get status.*/ +#define ILI9341_GET_PWR_MODE 0x0A /**< Get power mode.*/ +#define ILI9341_GET_MADCTL 0x0B /**< Get MADCTL.*/ +#define ILI9341_GET_PIX_FMT 0x0C /**< Get pixel format.*/ +#define ILI9341_GET_IMG_FMT 0x0D /**< Get image format.*/ +#define ILI9341_GET_SIG_MODE 0x0E /**< Get signal mode.*/ +#define ILI9341_GET_SELF_DIAG 0x0F /**< Get self-diagnostics.*/ +#define ILI9341_CMD_SLEEP_ON 0x10 /**< Enter sleep mode.*/ +#define ILI9341_CMD_SLEEP_OFF 0x11 /**< Exist sleep mode.*/ +#define ILI9341_CMD_PARTIAL_ON 0x12 /**< Enter partial mode.*/ +#define ILI9341_CMD_PARTIAL_OFF 0x13 /**< Exit partial mode.*/ +#define ILI9341_CMD_INVERT_ON 0x20 /**< Enter inverted mode.*/ +#define ILI9341_CMD_INVERT_OFF 0x21 /**< Exit inverted mode.*/ +#define ILI9341_SET_GAMMA 0x26 /**< Set gamma params.*/ +#define ILI9341_CMD_DISPLAY_OFF 0x28 /**< Disable display.*/ +#define ILI9341_CMD_DISPLAY_ON 0x29 /**< Enable display.*/ +#define ILI9341_SET_COL_ADDR 0x2A /**< Set column address.*/ +#define ILI9341_SET_PAGE_ADDR 0x2B /**< Set page address.*/ +#define ILI9341_SET_MEM 0x2C /**< Set memory.*/ +#define ILI9341_SET_COLOR 0x2D /**< Set color.*/ +#define ILI9341_GET_MEM 0x2E /**< Get memory.*/ +#define ILI9341_SET_PARTIAL_AREA 0x30 /**< Set partial area.*/ +#define ILI9341_SET_VSCROLL 0x33 /**< Set vertical scroll def.*/ +#define ILI9341_CMD_TEARING_ON 0x34 /**< Tearing line enabled.*/ +#define ILI9341_CMD_TEARING_OFF 0x35 /**< Tearing line disabled.*/ +#define ILI9341_SET_MEM_ACS_CTL 0x36 /**< Set mem access ctl.*/ +#define ILI9341_SET_VSCROLL_ADDR 0x37 /**< Set vscroll start addr.*/ +#define ILI9341_CMD_IDLE_OFF 0x38 /**< Exit idle mode.*/ +#define ILI9341_CMD_IDLE_ON 0x39 /**< Enter idle mode.*/ +#define ILI9341_SET_PIX_FMT 0x3A /**< Set pixel format.*/ +#define ILI9341_SET_MEM_CONT 0x3C /**< Set memory continue.*/ +#define ILI9341_GET_MEM_CONT 0x3E /**< Get memory continue.*/ +#define ILI9341_SET_TEAR_SCANLINE 0x44 /**< Set tearing scanline.*/ +#define ILI9341_GET_TEAR_SCANLINE 0x45 /**< Get tearing scanline.*/ +#define ILI9341_SET_BRIGHTNESS 0x51 /**< Set brightness.*/ +#define ILI9341_GET_BRIGHTNESS 0x52 /**< Get brightness.*/ +#define ILI9341_SET_DISPLAY_CTL 0x53 /**< Set display ctl.*/ +#define ILI9341_GET_DISPLAY_CTL 0x54 /**< Get display ctl.*/ +#define ILI9341_SET_CABC 0x55 /**< Set CABC.*/ +#define ILI9341_GET_CABC 0x56 /**< Get CABC.*/ +#define ILI9341_SET_CABC_MIN 0x5E /**< Set CABC min.*/ +#define ILI9341_GET_CABC_MIN 0x5F /**< Set CABC max.*/ +#define ILI9341_GET_ID1 0xDA /**< Get ID1.*/ +#define ILI9341_GET_ID2 0xDB /**< Get ID2.*/ +#define ILI9341_GET_ID3 0xDC /**< Get ID3.*/ + +// ILI9341 extended commands +#define ILI9341_SET_RGB_IF_SIG_CTL 0xB0 /**< RGB IF signal ctl.*/ +#define ILI9341_SET_FRAME_CTL_NORMAL 0xB1 /**< Set frame ctl (normal).*/ +#define ILI9341_SET_FRAME_CTL_IDLE 0xB2 /**< Set frame ctl (idle).*/ +#define ILI9341_SET_FRAME_CTL_PARTIAL 0xB3 /**< Set frame ctl (partial).*/ +#define ILI9341_SET_INVERSION_CTL 0xB4 /**< Set inversion ctl.*/ +#define ILI9341_SET_BLANKING_PORCH_CTL 0xB5 /**< Set blanking porch ctl.*/ +#define ILI9341_SET_FUNCTION_CTL 0xB6 /**< Set function ctl.*/ +#define ILI9341_SET_ENTRY_MODE 0xB7 /**< Set entry mode.*/ +#define ILI9341_SET_LIGHT_CTL_1 0xB8 /**< Set backlight ctl 1.*/ +#define ILI9341_SET_LIGHT_CTL_2 0xB9 /**< Set backlight ctl 2.*/ +#define ILI9341_SET_LIGHT_CTL_3 0xBA /**< Set backlight ctl 3.*/ +#define ILI9341_SET_LIGHT_CTL_4 0xBB /**< Set backlight ctl 4.*/ +#define ILI9341_SET_LIGHT_CTL_5 0xBC /**< Set backlight ctl 5.*/ +#define ILI9341_SET_LIGHT_CTL_7 0xBE /**< Set backlight ctl 7.*/ +#define ILI9341_SET_LIGHT_CTL_8 0xBF /**< Set backlight ctl 8.*/ +#define ILI9341_SET_POWER_CTL_1 0xC0 /**< Set power ctl 1.*/ +#define ILI9341_SET_POWER_CTL_2 0xC1 /**< Set power ctl 2.*/ +#define ILI9341_SET_VCOM_CTL_1 0xC5 /**< Set VCOM ctl 1.*/ +#define ILI9341_SET_VCOM_CTL_2 0xC6 /**< Set VCOM ctl 2.*/ +#define ILI9341_SET_NVMEM 0xD0 /**< Set NVMEM data.*/ +#define ILI9341_GET_NVMEM_KEY 0xD1 /**< Get NVMEM protect key.*/ +#define ILI9341_GET_NVMEM_STATUS 0xD2 /**< Get NVMEM status.*/ +#define ILI9341_GET_ID4 0xD3 /**< Get ID4.*/ +#define ILI9341_SET_PGAMMA 0xE0 /**< Set positive gamma.*/ +#define ILI9341_SET_NGAMMA 0xE1 /**< Set negative gamma.*/ +#define ILI9341_SET_DGAMMA_CTL_1 0xE2 /**< Set digital gamma ctl 1.*/ +#define ILI9341_SET_DGAMMA_CTL_2 0xE3 /**< Set digital gamma ctl 2.*/ +#define ILI9341_SET_IF_CTL 0xF6 /**< Set interface control.*/ + +// ILI9341 interface modes +#define ILI9341_IM_3LSI_1 0x5 /**< 3-line serial, mode 1.*/ +#define ILI9341_IM_3LSI_2 0xD /**< 3-line serial, mode 2.*/ +#define ILI9341_IM_4LSI_1 0x6 /**< 4-line serial, mode 1.*/ +#define ILI9341_IM_4LSI_2 0xE /**< 4-line serial, mode 2.*/ + +#endif /* ILI9341_H */ diff --git a/boards/base/STM32F746-Discovery/board.mk b/boards/base/STM32F746-Discovery/board.mk index a8ad0f1a..87bfcde3 100644 --- a/boards/base/STM32F746-Discovery/board.mk +++ b/boards/base/STM32F746-Discovery/board.mk @@ -15,7 +15,7 @@ ifeq ($(OPT_OS),raw32) $(GFXLIB)/boards/base/STM32F746-Discovery/stm32f746g_raw32_ugfx.c \ $(GFXLIB)/boards/base/STM32F746-Discovery/stm32f746g_raw32_system.c \ $(GFXLIB)/boards/base/STM32F746-Discovery/stm32f746g_raw32_interrupts.c - GFXDEFS += GFX_OS_EXTRA_INIT_FUNCTION=Raw32OSInit GFX_OS_INIT_NO_WARNING=TRUE + GFXDEFS += GFX_OS_PRE_INIT_FUNCTION=Raw32OSInit GFX_OS_INIT_NO_WARNING=TRUE GFXINC += $(CMSIS)/Device/ST/STM32F7xx/Include \ $(CMSIS)/Include \ $(STMHAL)/Inc diff --git a/boards/base/STM32F746-Discovery/stm32f746g_raw32_ugfx.c b/boards/base/STM32F746-Discovery/stm32f746g_raw32_ugfx.c index aaf3c391..2f6af0dd 100644 --- a/boards/base/STM32F746-Discovery/stm32f746g_raw32_ugfx.c +++ b/boards/base/STM32F746-Discovery/stm32f746g_raw32_ugfx.c @@ -16,7 +16,6 @@ #endif static void SystemClock_Config(void); -static void CPU_CACHE_Enable(void); void Raw32OSInit(void) { /* Enable the CPU Cache's */ -- cgit v1.2.3