From aeef03a83e59745f06d9b30a5dbbc4eea7170df5 Mon Sep 17 00:00:00 2001 From: inmarket Date: Sat, 24 Feb 2018 11:49:30 +1000 Subject: Updates to standard STM32LTDC based boards to ensure the LTDC clock is fully operational before continuing --- boards/base/STM32F746-Discovery/board_STM32LTDC.h | 1 + 1 file changed, 1 insertion(+) (limited to 'boards/base/STM32F746-Discovery') diff --git a/boards/base/STM32F746-Discovery/board_STM32LTDC.h b/boards/base/STM32F746-Discovery/board_STM32LTDC.h index 8ad0dfa4..55a322b6 100644 --- a/boards/base/STM32F746-Discovery/board_STM32LTDC.h +++ b/boards/base/STM32F746-Discovery/board_STM32LTDC.h @@ -450,6 +450,7 @@ static GFXINLINE void init_board(GDisplay *g) { RCC->PLLSAICFGR = ((STM32_PLLSAIP_VALUE/2-1)<<16) | (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24); RCC->DCKCFGR1 = (RCC->DCKCFGR1 & ~RCC_DCKCFGR1_PLLSAIDIVR) | STM32_PLLSAIR_POST; RCC->CR |= RCC_CR_PLLSAION; + while(!(RCC->CR & RCC_CR_PLLSAIRDY)); // wait for PLLSAI to lock #endif // Initialise the SDRAM -- cgit v1.2.3