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-rw-r--r--LUFA/ChangeLog.txt4
-rw-r--r--LUFA/Common/FunctionAttributes.h2
-rw-r--r--LUFA/Drivers/AT90USBXXX/SPI.h6
-rw-r--r--LUFA/Drivers/Board/Dataflash.h6
-rw-r--r--LUFA/Drivers/USB/LowLevel/Endpoint.h125
-rw-r--r--LUFA/Drivers/USB/LowLevel/Pipe.h165
-rw-r--r--LUFA/MigrationInformation.txt3
-rw-r--r--LUFA/Scheduler/Scheduler.h5
8 files changed, 179 insertions, 137 deletions
diff --git a/LUFA/ChangeLog.txt b/LUFA/ChangeLog.txt
index b89c6e8b9..f699507dd 100644
--- a/LUFA/ChangeLog.txt
+++ b/LUFA/ChangeLog.txt
@@ -8,7 +8,7 @@
*
* \section Sec_ChangeLogXXXXXX Version XXXXXX
*
- * - Added new BluetoothHost demo
+ * - Added new incomplete BluetoothHost demo
* - Changed AVRISP Programmer descriptors to use a newly allocated 0x204F PID value
* - Fixed MagStripe project configuration descriptor containing an unused (blank) endpoint descriptor
* - Incorporated makefile changes by Denver Gingerich to retain compatibility with stock (non-WinAVR) AVR-GCC installations
@@ -26,6 +26,8 @@
* - Changed stream wait timeout counter to be 16-bit, so that very long timeout periods can be set for correct communications with
* badly designed hosts or devices which greatly exceed the USB specification limits
* - Mass Storage Host demo now uses a USB_STREAM_TIMEOUT_MS of two seconds to maintain compatibility with poorly designed devices
+ * - Function attribute ATTR_ALWAYSINLINE renamed to ATTR_ALWAYS_INLINE to match other function attribute macro naming conventions
+ * - Added ATTR_ALWAYS_INLINE attribute to several key inlined library components, to ensure they are inlined in all circumstances
*
* \section Sec_ChangeLog090209 Version 090209
*
diff --git a/LUFA/Common/FunctionAttributes.h b/LUFA/Common/FunctionAttributes.h
index 16503bb55..daa6c4a26 100644
--- a/LUFA/Common/FunctionAttributes.h
+++ b/LUFA/Common/FunctionAttributes.h
@@ -84,7 +84,7 @@
/** Forces the compiler to inline the specified function. When applied, the given function will be
* inlined under all circumstances.
*/
- #define ATTR_ALWAYSINLINE __attribute__ ((always_inline))
+ #define ATTR_ALWAYS_INLINE __attribute__ ((always_inline))
/** Indicates that the specified function is pure, in that it has no side-effects other than global
* or parameter variable access.
diff --git a/LUFA/Drivers/AT90USBXXX/SPI.h b/LUFA/Drivers/AT90USBXXX/SPI.h
index 0b333a804..2cfa52322 100644
--- a/LUFA/Drivers/AT90USBXXX/SPI.h
+++ b/LUFA/Drivers/AT90USBXXX/SPI.h
@@ -98,7 +98,7 @@
*
* \return Response byte from the attached SPI device
*/
- static inline uint8_t SPI_TransferByte(const uint8_t Byte) ATTR_ALWAYSINLINE;
+ static inline uint8_t SPI_TransferByte(const uint8_t Byte) ATTR_ALWAYS_INLINE;
static inline uint8_t SPI_TransferByte(const uint8_t Byte)
{
SPDR = Byte;
@@ -111,7 +111,7 @@
*
* \param Byte Byte to send through the SPI interface
*/
- static inline void SPI_SendByte(const uint8_t Byte) ATTR_ALWAYSINLINE;
+ static inline void SPI_SendByte(const uint8_t Byte) ATTR_ALWAYS_INLINE;
static inline void SPI_SendByte(const uint8_t Byte)
{
SPDR = Byte;
@@ -123,7 +123,7 @@
*
* \return The response byte from the attached SPI device
*/
- static inline uint8_t SPI_ReceiveByte(void) ATTR_ALWAYSINLINE ATTR_WARN_UNUSED_RESULT;
+ static inline uint8_t SPI_ReceiveByte(void) ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT;
static inline uint8_t SPI_ReceiveByte(void)
{
SPDR = 0x00;
diff --git a/LUFA/Drivers/Board/Dataflash.h b/LUFA/Drivers/Board/Dataflash.h
index 08deb50d4..2b682d7c9 100644
--- a/LUFA/Drivers/Board/Dataflash.h
+++ b/LUFA/Drivers/Board/Dataflash.h
@@ -108,7 +108,7 @@
*
* \return Last response byte from the dataflash
*/
- static inline uint8_t Dataflash_TransferByte(const uint8_t Byte) ATTR_ALWAYSINLINE;
+ static inline uint8_t Dataflash_TransferByte(const uint8_t Byte) ATTR_ALWAYS_INLINE;
static inline uint8_t Dataflash_TransferByte(const uint8_t Byte)
{
return SPI_TransferByte(Byte);
@@ -118,7 +118,7 @@
*
* \param Byte of data to send to the dataflash
*/
- static inline void Dataflash_SendByte(const uint8_t Byte) ATTR_ALWAYSINLINE;
+ static inline void Dataflash_SendByte(const uint8_t Byte) ATTR_ALWAYS_INLINE;
static inline void Dataflash_SendByte(const uint8_t Byte)
{
SPI_SendByte(Byte);
@@ -128,7 +128,7 @@
*
* \return Last response byte from the dataflash
*/
- static inline uint8_t Dataflash_ReceiveByte(void) ATTR_ALWAYSINLINE ATTR_WARN_UNUSED_RESULT;
+ static inline uint8_t Dataflash_ReceiveByte(void) ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT;
static inline uint8_t Dataflash_ReceiveByte(void)
{
return SPI_ReceiveByte();
diff --git a/LUFA/Drivers/USB/LowLevel/Endpoint.h b/LUFA/Drivers/USB/LowLevel/Endpoint.h
index 5f3170416..d1ad1315a 100644
--- a/LUFA/Drivers/USB/LowLevel/Endpoint.h
+++ b/LUFA/Drivers/USB/LowLevel/Endpoint.h
@@ -58,69 +58,69 @@
/** Endpoint data direction mask for Endpoint_ConfigureEndpoint(). This indicates that the endpoint
* should be initialized in the OUT direction - i.e. data flows from host to device.
*/
- #define ENDPOINT_DIR_OUT 0
+ #define ENDPOINT_DIR_OUT (0 << EPDIR)
/** Endpoint data direction mask for Endpoint_ConfigureEndpoint(). This indicates that the endpoint
* should be initialized in the IN direction - i.e. data flows from device to host.
*/
- #define ENDPOINT_DIR_IN (1 << EPDIR)
+ #define ENDPOINT_DIR_IN (1 << EPDIR)
/** Mask for the bank mode selection for the Endpoint_ConfigureEndpoint() macro. This indicates
* that the endpoint should have one single bank, which requires less USB FIFO memory but results
* in slower transfers as only one USB device (the AVR or the host) can access the endpoint's
* bank at the one time.
*/
- #define ENDPOINT_BANK_SINGLE 0
+ #define ENDPOINT_BANK_SINGLE (0 << EPBK0)
/** Mask for the bank mode selection for the Endpoint_ConfigureEndpoint() macro. This indicates
* that the endpoint should have two banks, which requires more USB FIFO memory but results
* in faster transfers as one USB device (the AVR or the host) can access one bank while the other
* accesses the second bank.
*/
- #define ENDPOINT_BANK_DOUBLE (1 << EPBK0)
+ #define ENDPOINT_BANK_DOUBLE (1 << EPBK0)
/** Endpoint address for the default control endpoint, which always resides in address 0. This is
* defined for convenience to give more readable code when used with the endpoint macros.
*/
- #define ENDPOINT_CONTROLEP 0
+ #define ENDPOINT_CONTROLEP 0
/** Default size of the default control endpoint's bank, until altered by the Endpoint0Size value
* in the device descriptor. Not available if the FIXED_CONTROL_ENDPOINT_SIZE token is defined.
*/
#if (!defined(FIXED_CONTROL_ENDPOINT_SIZE) || defined(__DOXYGEN__))
- #define ENDPOINT_CONTROLEP_DEFAULT_SIZE 8
+ #define ENDPOINT_CONTROLEP_DEFAULT_SIZE 8
#endif
/** Endpoint number mask, for masking against endpoint addresses to retrieve the endpoint's
* numerical address in the device.
*/
- #define ENDPOINT_EPNUM_MASK 0b111
+ #define ENDPOINT_EPNUM_MASK 0b111
/** Endpoint bank size mask, for masking against endpoint addresses to retrieve the endpoint's
* bank size in the device.
*/
- #define ENDPOINT_EPSIZE_MASK 0x7FF
+ #define ENDPOINT_EPSIZE_MASK 0x7FF
/** Maximum size in bytes of a given endpoint.
*
* \param n Endpoint number, a value between 0 and (ENDPOINT_TOTAL_ENDPOINTS - 1)
*/
- #define ENDPOINT_MAX_SIZE(n) _ENDPOINT_GET_MAXSIZE(n)
+ #define ENDPOINT_MAX_SIZE(n) _ENDPOINT_GET_MAXSIZE(n)
/** Indicates if the given endpoint supports double banking.
*
* \param n Endpoint number, a value between 0 and (ENDPOINT_TOTAL_ENDPOINTS - 1)
*/
- #define ENDPOINT_DOUBLEBANK_SUPPORTED(n) _ENDPOINT_GET_DOUBLEBANK(n)
+ #define ENDPOINT_DOUBLEBANK_SUPPORTED(n) _ENDPOINT_GET_DOUBLEBANK(n)
#if defined(USB_FULL_CONTROLLER) || defined(USB_MODIFIED_FULL_CONTROLLER) || defined(__DOXYGEN__)
/** Total number of endpoints (including the default control endpoint at address 0) which may
* be used in the device. Different USB AVR models support different amounts of endpoints,
* this value reflects the maximum number of endpoints for the currently selected AVR model.
*/
- #define ENDPOINT_TOTAL_ENDPOINTS 7
+ #define ENDPOINT_TOTAL_ENDPOINTS 7
#else
- #define ENDPOINT_TOTAL_ENDPOINTS 5
+ #define ENDPOINT_TOTAL_ENDPOINTS 5
#endif
/** Interrupt definition for the endpoint SETUP interrupt (for CONTROL type endpoints). Should be
@@ -128,8 +128,13 @@
*
* This interrupt will fire if enabled on a CONTROL type endpoint if a new control packet is
* received from the host.
+ *
+ * \note This interrupt must be enabled and cleared on *each* endpoint which requires it (after the
+ * endpoint is selected), and will fire the common endpoint interrupt vector.
+ *
+ * \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.
*/
- #define ENDPOINT_INT_SETUP UEIENX, (1 << RXSTPE), UEINTX, (1 << RXSTPI)
+ #define ENDPOINT_INT_SETUP UEIENX, (1 << RXSTPE), UEINTX, (1 << RXSTPI)
/** Interrupt definition for the endpoint IN interrupt (for INTERRUPT type endpoints). Should be
* used with the USB_INT_* macros located in USBInterrupt.h.
@@ -137,8 +142,13 @@
* This interrupt will fire if enabled on an INTERRUPT type endpoint if a the endpoint interrupt
* period has elapsed and the endpoint is ready for a new packet to be written to its FIFO buffer
* (if required).
+ *
+ * \note This interrupt must be enabled and cleared on *each* endpoint which requires it (after the
+ * endpoint is selected), and will fire the common endpoint interrupt vector.
+ *
+ * \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.
*/
- #define ENDPOINT_INT_IN UEIENX, (1 << TXINE) , UEINTX, (1 << TXINI)
+ #define ENDPOINT_INT_IN UEIENX, (1 << TXINE) , UEINTX, (1 << TXINI)
/** Interrupt definition for the endpoint OUT interrupt (for INTERRUPT type endpoints). Should be
* used with the USB_INT_* macros located in USBInterrupt.h.
@@ -146,21 +156,26 @@
* This interrupt will fire if enabled on an INTERRUPT type endpoint if a the endpoint interrupt
* period has elapsed and the endpoint is ready for a packet from the host to be read from its
* FIFO buffer (if received).
+ *
+ * \note This interrupt must be enabled and cleared on *each* endpoint which requires it (after the
+ * endpoint is selected), and will fire the common endpoint interrupt vector.
+ *
+ * \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.
*/
- #define ENDPOINT_INT_OUT UEIENX, (1 << RXOUTE), UEINTX, (1 << RXOUTI)
+ #define ENDPOINT_INT_OUT UEIENX, (1 << RXOUTE), UEINTX, (1 << RXOUTI)
#if defined(USB_FULL_CONTROLLER) || defined(USB_MODIFIED_FULL_CONTROLLER) || defined(__DOXYGEN__)
/** Indicates the number of bytes currently stored in the current endpoint's selected bank. */
- #define Endpoint_BytesInEndpoint() UEBCX
+ #define Endpoint_BytesInEndpoint() UEBCX
#else
- #define Endpoint_BytesInEndpoint() UEBCLX
+ #define Endpoint_BytesInEndpoint() UEBCLX
#endif
/** Returns the endpoint address of the currently selected endpoint. This is typically used to save
* the currently selected endpoint number so that it can be restored after another endpoint has
* been manipulated.
*/
- #define Endpoint_GetCurrentEndpoint() (UENUM & ENDPOINT_EPNUM_MASK)
+ #define Endpoint_GetCurrentEndpoint() (UENUM & ENDPOINT_EPNUM_MASK)
/** Selects the given endpoint number. If the address from the device descriptors is used, the
* value should be masked with the ENDPOINT_EPNUM_MASK constant to extract only the endpoint
@@ -169,12 +184,12 @@
* Any endpoint operations which do not require the endpoint number to be indicated will operate on
* the currently selected endpoint.
*/
- #define Endpoint_SelectEndpoint(epnum) MACROS{ UENUM = epnum; }MACROE
+ #define Endpoint_SelectEndpoint(epnum) MACROS{ UENUM = epnum; }MACROE
/** Resets the endpoint bank FIFO. This clears all the endpoint banks and resets the USB controller's
* In and Out pointers to the bank's contents.
*/
- #define Endpoint_ResetFIFO(epnum) MACROS{ UERST = (1 << epnum); UERST = 0; }MACROE
+ #define Endpoint_ResetFIFO(epnum) MACROS{ UERST = (1 << epnum); UERST = 0; }MACROE
/** Enables the currently selected endpoint so that data can be sent and received through it to
* and from a host.
@@ -182,15 +197,15 @@
* \note Endpoints must first be configured properly rather than just being enabled via the
* Endpoint_ConfigureEndpoint() macro, which calls Endpoint_EnableEndpoint() automatically.
*/
- #define Endpoint_EnableEndpoint() MACROS{ UECONX |= (1 << EPEN); }MACROE
+ #define Endpoint_EnableEndpoint() MACROS{ UECONX |= (1 << EPEN); }MACROE
/** Disables the currently selected endpoint so that data cannot be sent and received through it
* to and from a host.
*/
- #define Endpoint_DisableEndpoint() MACROS{ UECONX &= ~(1 << EPEN); }MACROE
+ #define Endpoint_DisableEndpoint() MACROS{ UECONX &= ~(1 << EPEN); }MACROE
/** Returns true if the currently selected endpoint is enabled, false otherwise. */
- #define Endpoint_IsEnabled() ((UECONX & (1 << EPEN)) ? true : false)
+ #define Endpoint_IsEnabled() ((UECONX & (1 << EPEN)) ? true : false)
/** Returns true if the currently selected endpoint may be read from (if data is waiting in the endpoint
* bank and the endpoint is an OUT direction, or if the bank is not yet full if the endpoint is an
@@ -198,53 +213,53 @@
* the endpoint is an OUT direction and no packet has been received, or if the endpoint is an IN
* direction and the endpoint bank is full.
*/
- #define Endpoint_ReadWriteAllowed() ((UEINTX & (1 << RWAL)) ? true : false)
+ #define Endpoint_ReadWriteAllowed() ((UEINTX & (1 << RWAL)) ? true : false)
/** Returns true if the currently selected endpoint is configured, false otherwise. */
- #define Endpoint_IsConfigured() ((UESTA0X & (1 << CFGOK)) ? true : false)
+ #define Endpoint_IsConfigured() ((UESTA0X & (1 << CFGOK)) ? true : false)
/** Returns a mask indicating which INTERRUPT type endpoints have interrupted - i.e. their
* interrupt duration has elapsed. Which endpoints have interrupted can be determined by
* masking the return value against (1 << {Endpoint Number}).
*/
- #define Endpoint_GetEndpointInterrupts() UEINT
+ #define Endpoint_GetEndpointInterrupts() UEINT
/** Clears the endpoint interrupt flag. This clears the specified endpoint number's interrupt
* mask in the endpoint interrupt flag register.
*/
- #define Endpoint_ClearEndpointInterrupt(n) MACROS{ UEINT &= ~(1 << n); }MACROE
+ #define Endpoint_ClearEndpointInterrupt(n) MACROS{ UEINT &= ~(1 << n); }MACROE
/** Returns true if the specified endpoint number has interrupted (valid only for INTERRUPT type
* endpoints), false otherwise.
*/
- #define Endpoint_HasEndpointInterrupted(n) ((UEINT & (1 << n)) ? true : false)
+ #define Endpoint_HasEndpointInterrupted(n) ((UEINT & (1 << n)) ? true : false)
/** Clears the currently selected endpoint bank, and switches to the alternate bank if the currently
* selected endpoint is dual-banked. When cleared, this either frees the bank up for the next packet
* from the host (if the endpoint is of the OUT direction) or sends the packet contents to the host
* (if the endpoint is of the IN direction).
*/
- #define Endpoint_ClearCurrentBank() MACROS{ UEINTX &= ~(1 << FIFOCON); }MACROE
+ #define Endpoint_ClearCurrentBank() MACROS{ UEINTX &= ~(1 << FIFOCON); }MACROE
/** Returns true if the current CONTROL type endpoint is ready for an IN packet, false otherwise. */
- #define Endpoint_IsSetupINReady() ((UEINTX & (1 << TXINI)) ? true : false)
+ #define Endpoint_IsSetupINReady() ((UEINTX & (1 << TXINI)) ? true : false)
/** Returns true if the current CONTROL type endpoint is ready for an OUT packet, false otherwise. */
- #define Endpoint_IsSetupOUTReceived() ((UEINTX & (1 << RXOUTI)) ? true : false)
+ #define Endpoint_IsSetupOUTReceived() ((UEINTX & (1 << RXOUTI)) ? true : false)
/** Returns true if the current CONTROL type endpoint is ready for a SETUP packet, false otherwise. */
- #define Endpoint_IsSetupReceived() ((UEINTX & (1 << RXSTPI)) ? true : false)
+ #define Endpoint_IsSetupReceived() ((UEINTX & (1 << RXSTPI)) ? true : false)
/** Clears a received SETUP packet on the currently selected CONTROL type endpoint. */
- #define Endpoint_ClearSetupReceived() MACROS{ UEINTX &= ~(1 << RXSTPI); }MACROE
+ #define Endpoint_ClearSetupReceived() MACROS{ UEINTX &= ~(1 << RXSTPI); }MACROE
/** Sends an IN packet to the host on the currently selected CONTROL type endpoint. */
- #define Endpoint_ClearSetupIN() MACROS{ UEINTX &= ~(1 << TXINI); }MACROE
+ #define Endpoint_ClearSetupIN() MACROS{ UEINTX &= ~(1 << TXINI); }MACROE
/** Acknowedges an OUT packet to the host on the currently selected CONTROL type endpoint, freeing
* up the endpoint for the next packet.
*/
- #define Endpoint_ClearSetupOUT() MACROS{ UEINTX &= ~(1 << RXOUTI); }MACROE
+ #define Endpoint_ClearSetupOUT() MACROS{ UEINTX &= ~(1 << RXOUTI); }MACROE
/** Stalls the current endpoint, indicating to the host that a logical problem occured with the
* indicated endpoint and that the current transfer sequence should be aborted. This provides a
@@ -255,16 +270,16 @@
* is called, or the host issues a CLEAR FEATURE request to the device for the currently selected
* endpoint.
*/
- #define Endpoint_StallTransaction() MACROS{ UECONX |= (1 << STALLRQ); }MACROE
+ #define Endpoint_StallTransaction() MACROS{ UECONX |= (1 << STALLRQ); }MACROE
/** Clears the stall on the currently selected endpoint. */
- #define Endpoint_ClearStall() MACROS{ UECONX |= (1 << STALLRQC); }MACROE
+ #define Endpoint_ClearStall() MACROS{ UECONX |= (1 << STALLRQC); }MACROE
/** Returns true if the currently selected endpoint is stalled, false othewise. */
- #define Endpoint_IsStalled() ((UECONX & (1 << STALLRQ)) ? true : false)
+ #define Endpoint_IsStalled() ((UECONX & (1 << STALLRQ)) ? true : false)
/** Resets the data toggle of the currently selected endpoint. */
- #define Endpoint_ResetDataToggle() MACROS{ UECONX |= (1 << RSTDT); }MACROE
+ #define Endpoint_ResetDataToggle() MACROS{ UECONX |= (1 << RSTDT); }MACROE
/* Enums: */
/** Enum for the possible error return codes of the Endpoint_WaitUntilReady function */
@@ -311,19 +326,21 @@
/* Inline Functions: */
/** Reads one byte from the currently selected endpoint's bank, for OUT direction endpoints. */
- static inline uint8_t Endpoint_Read_Byte(void) ATTR_WARN_UNUSED_RESULT;
+ static inline uint8_t Endpoint_Read_Byte(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
static inline uint8_t Endpoint_Read_Byte(void)
{
return UEDATX;
}
/** Writes one byte from the currently selected endpoint's bank, for IN direction endpoints. */
+ static inline void Endpoint_Write_Byte(const uint8_t Byte) ATTR_ALWAYS_INLINE;
static inline void Endpoint_Write_Byte(const uint8_t Byte)
{
UEDATX = Byte;
}
/** Discards one byte from the currently selected endpoint's bank, for OUT direction endpoints. */
+ static inline void Endpoint_Discard_Byte(void) ATTR_ALWAYS_INLINE;
static inline void Endpoint_Discard_Byte(void)
{
uint8_t Dummy;
@@ -334,7 +351,7 @@
/** Reads two bytes from the currently selected endpoint's bank in little endian format, for OUT
* direction endpoints.
*/
- static inline uint16_t Endpoint_Read_Word_LE(void) ATTR_WARN_UNUSED_RESULT;
+ static inline uint16_t Endpoint_Read_Word_LE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
static inline uint16_t Endpoint_Read_Word_LE(void)
{
uint16_t Data;
@@ -348,7 +365,7 @@
/** Reads two bytes from the currently selected endpoint's bank in big endian format, for OUT
* direction endpoints.
*/
- static inline uint16_t Endpoint_Read_Word_BE(void) ATTR_WARN_UNUSED_RESULT;
+ static inline uint16_t Endpoint_Read_Word_BE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
static inline uint16_t Endpoint_Read_Word_BE(void)
{
uint16_t Data;
@@ -362,6 +379,7 @@
/** Writes two bytes to the currently selected endpoint's bank in little endian format, for IN
* direction endpoints.
*/
+ static inline void Endpoint_Write_Word_LE(const uint16_t Word) ATTR_ALWAYS_INLINE;
static inline void Endpoint_Write_Word_LE(const uint16_t Word)
{
UEDATX = (Word & 0xFF);
@@ -371,6 +389,7 @@
/** Writes two bytes to the currently selected endpoint's bank in big endian format, for IN
* direction endpoints.
*/
+ static inline void Endpoint_Write_Word_BE(const uint16_t Word) ATTR_ALWAYS_INLINE;
static inline void Endpoint_Write_Word_BE(const uint16_t Word)
{
UEDATX = (Word >> 8);
@@ -378,6 +397,7 @@
}
/** Discards two bytes from the currently selected endpoint's bank, for OUT direction endpoints. */
+ static inline void Endpoint_Discard_Word(void) ATTR_ALWAYS_INLINE;
static inline void Endpoint_Discard_Word(void)
{
uint8_t Dummy;
@@ -389,7 +409,7 @@
/** Reads four bytes from the currently selected endpoint's bank in little endian format, for OUT
* direction endpoints.
*/
- static inline uint32_t Endpoint_Read_DWord_LE(void) ATTR_WARN_UNUSED_RESULT;
+ static inline uint32_t Endpoint_Read_DWord_LE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
static inline uint32_t Endpoint_Read_DWord_LE(void)
{
union
@@ -409,7 +429,7 @@
/** Reads four bytes from the currently selected endpoint's bank in big endian format, for OUT
* direction endpoints.
*/
- static inline uint32_t Endpoint_Read_DWord_BE(void) ATTR_WARN_UNUSED_RESULT;
+ static inline uint32_t Endpoint_Read_DWord_BE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
static inline uint32_t Endpoint_Read_DWord_BE(void)
{
union
@@ -429,22 +449,29 @@
/** Writes four bytes to the currently selected endpoint's bank in little endian format, for IN
* direction endpoints.
*/
+ static inline void Endpoint_Write_DWord_LE(const uint32_t DWord) ATTR_ALWAYS_INLINE;
static inline void Endpoint_Write_DWord_LE(const uint32_t DWord)
{
- Endpoint_Write_Word_LE(DWord);
- Endpoint_Write_Word_LE(DWord >> 16);
+ UEDATX = (DWord & 0xFF);
+ UEDATX = (DWord >> 8);
+ UEDATX = (DWord >> 16);
+ UEDATX = (DWord >> 24);
}
/** Writes four bytes to the currently selected endpoint's bank in big endian format, for IN
* direction endpoints.
*/
+ static inline void Endpoint_Write_DWord_BE(const uint32_t DWord) ATTR_ALWAYS_INLINE;
static inline void Endpoint_Write_DWord_BE(const uint32_t DWord)
{
- Endpoint_Write_Word_BE(DWord >> 16);
- Endpoint_Write_Word_BE(DWord);
+ UEDATX = (DWord >> 24);
+ UEDATX = (DWord >> 16);
+ UEDATX = (DWord >> 8);
+ UEDATX = (DWord & 0xFF);
}
/** Discards four bytes from the currently selected endpoint's bank, for OUT direction endpoints. */
+ static inline void Endpoint_Discard_DWord(void) ATTR_ALWAYS_INLINE;
static inline void Endpoint_Discard_DWord(void)
{
uint8_t Dummy;
@@ -810,7 +837,7 @@
bool Endpoint_ConfigureEndpointStatic(const uint8_t Number, const uint8_t UECFG0XData, const uint8_t UECFG1XData);
/* Inline Functions: */
- static inline uint8_t Endpoint_BytesToEPSizeMask(const uint16_t Bytes) ATTR_WARN_UNUSED_RESULT ATTR_CONST ATTR_ALWAYSINLINE;
+ static inline uint8_t Endpoint_BytesToEPSizeMask(const uint16_t Bytes) ATTR_WARN_UNUSED_RESULT ATTR_CONST ATTR_ALWAYS_INLINE;
static inline uint8_t Endpoint_BytesToEPSizeMask(const uint16_t Bytes)
{
if (Bytes <= 8)
diff --git a/LUFA/Drivers/USB/LowLevel/Pipe.h b/LUFA/Drivers/USB/LowLevel/Pipe.h
index a1f28ccc2..f7d10bc1d 100644
--- a/LUFA/Drivers/USB/LowLevel/Pipe.h
+++ b/LUFA/Drivers/USB/LowLevel/Pipe.h
@@ -56,85 +56,85 @@
/* Public Interface - May be used in end-application: */
/* Macros: */
/** Mask for Pipe_GetErrorFlags(), indicating that a CRC error occurred in the pipe on the received data. */
- #define PIPE_ERRORFLAG_CRC16 (1 << 4)
+ #define PIPE_ERRORFLAG_CRC16 (1 << 4)
/** Mask for Pipe_GetErrorFlags(), indicating that a hardware timeout error occurred in the pipe. */
- #define PIPE_ERRORFLAG_TIMEOUT (1 << 3)
+ #define PIPE_ERRORFLAG_TIMEOUT (1 << 3)
/** Mask for Pipe_GetErrorFlags(), indicating that a hardware PID error occurred in the pipe. */
- #define PIPE_ERRORFLAG_PID (1 << 2)
+ #define PIPE_ERRORFLAG_PID (1 << 2)
/** Mask for Pipe_GetErrorFlags(), indicating that a hardware data PID error occurred in the pipe. */
- #define PIPE_ERRORFLAG_DATAPID (1 << 1)
+ #define PIPE_ERRORFLAG_DATAPID (1 << 1)
/** Mask for Pipe_GetErrorFlags(), indicating that a hardware data toggle error occurred in the pipe. */
- #define PIPE_ERRORFLAG_DATATGL (1 << 0)
+ #define PIPE_ERRORFLAG_DATATGL (1 << 0)
/** Token mask for Pipe_ConfigurePipe(). This sets the pipe as a SETUP token (for CONTROL type pipes),
* which will trigger a control request on the attached device when data is written to the pipe.
*/
- #define PIPE_TOKEN_SETUP (0b00 << PTOKEN0)
+ #define PIPE_TOKEN_SETUP (0b00 << PTOKEN0)
/** Token mask for Pipe_ConfigurePipe(). This sets the pipe as a IN token (for non-CONTROL type pipes),
* indicating that the pipe data will flow from device to host.
*/
- #define PIPE_TOKEN_IN (0b01 << PTOKEN0)
+ #define PIPE_TOKEN_IN (0b01 << PTOKEN0)
/** Token mask for Pipe_ConfigurePipe(). This sets the pipe as a IN token (for non-CONTROL type pipes),
* indicating that the pipe data will flow from host to device.
*/
- #define PIPE_TOKEN_OUT (0b10 << PTOKEN0)
+ #define PIPE_TOKEN_OUT (0b10 << PTOKEN0)
/** Mask for the bank mode selection for the Pipe_ConfigurePipe() macro. This indicates that the pipe
* should have one single bank, which requires less USB FIFO memory but results in slower transfers as
* only one USB device (the AVR or the attached device) can access the pipe's bank at the one time.
*/
- #define PIPE_BANK_SINGLE 0
+ #define PIPE_BANK_SINGLE (0 << EPBK0)
/** Mask for the bank mode selection for the Pipe_ConfigurePipe() macro. This indicates that the pipe
* should have two banks, which requires more USB FIFO memory but results in faster transfers as one
* USB device (the AVR or the attached device) can access one bank while the other accesses the second
* bank.
*/
- #define PIPE_BANK_DOUBLE (1 << EPBK0)
+ #define PIPE_BANK_DOUBLE (1 << EPBK0)
/** Pipe address for the default control pipe, which always resides in address 0. This is
* defined for convenience to give more readable code when used with the pipe macros.
*/
- #define PIPE_CONTROLPIPE 0
+ #define PIPE_CONTROLPIPE 0
/** Default size of the default control pipe's bank, until altered by the Endpoint0Size value
* in the device descriptor of the attached device.
*/
- #define PIPE_CONTROLPIPE_DEFAULT_SIZE 8
+ #define PIPE_CONTROLPIPE_DEFAULT_SIZE 8
/** Pipe number mask, for masking against pipe addresses to retrieve the pipe's numerical address
* in the device.
*/
- #define PIPE_PIPENUM_MASK 0x07
+ #define PIPE_PIPENUM_MASK 0x07
/** Total number of pipes (including the default control pipe at address 0) which may be used in
* the device. Different USB AVR models support different amounts of pipes, this value reflects
* the maximum number of pipes for the currently selected AVR model.
*/
- #define PIPE_TOTAL_PIPES 7
+ #define PIPE_TOTAL_PIPES 7
/** Size in bytes of the largest pipe bank size possible in the device. Not all banks on each AVR
* model supports the largest bank size possible on the device; different pipe numbers support
* different maximum bank sizes. This value reflects the largest possible bank of any pipe on the
* currently selected USB AVR model.
*/
- #define PIPE_MAX_SIZE 256
+ #define PIPE_MAX_SIZE 256
/** Endpoint number mask, for masking against endpoint addresses to retrieve the endpoint's
* numerical address in the attached device.
*/
- #define PIPE_EPNUM_MASK 0x07
+ #define PIPE_EPNUM_MASK 0x07
/** Endpoint bank size mask, for masking against endpoint addresses to retrieve the endpoint's
* bank size in the attached device.
*/
- #define PIPE_EPSIZE_MASK 0x7FF
+ #define PIPE_EPSIZE_MASK 0x7FF
/** Interrupt definition for the pipe IN interrupt (for INTERRUPT type pipes). Should be used with
* the USB_INT_* macros located in USBInterrupt.h.
@@ -143,12 +143,12 @@
* elapsed and the pipe is ready for the next packet from the attached device to be read out from its
* FIFO buffer (if received).
*
- * This interrupt must be enabled on *each* pipe which requires it (after the pipe is selected), and
- * will fire the common pipe interrupt vector.
+ * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe
+ * is selected), and will fire the common pipe interrupt vector.
*
* \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.
*/
- #define PIPE_INT_IN UPIENX, (1 << RXINE) , UPINTX, (1 << RXINI)
+ #define PIPE_INT_IN UPIENX, (1 << RXINE) , UPINTX, (1 << RXINI)
/** Interrupt definition for the pipe OUT interrupt (for INTERRUPT type pipes). Should be used with
* the USB_INT_* macros located in USBInterrupt.h.
@@ -157,11 +157,12 @@
* has elapsed and the pipe is ready for a packet to be written to the pipe's FIFO buffer and sent
* to the attached device (if required).
*
- * This interrupt must be enabled on *each* pipe which requires it (after the pipe is selected), and
- * will fire the common pipe interrupt vector.
+ * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe
+ * is selected), and will fire the common pipe interrupt vector.
*
- * \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector. */
- #define PIPE_INT_OUT UPIENX, (1 << TXOUTE), UPINTX, (1 << TXOUTI)
+ * \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.
+ */
+ #define PIPE_INT_OUT UPIENX, (1 << TXOUTE), UPINTX, (1 << TXOUTI)
/** Interrupt definition for the pipe SETUP bank ready interrupt (for CONTROL type pipes). Should be
* used with the USB_INT_* macros located in USBInterrupt.h.
@@ -169,12 +170,12 @@
* This interrupt will fire if enabled on an CONTROL type pipe when the pipe is ready for a new
* control request.
*
- * This interrupt must be enabled on *each* pipe which requires it (after the pipe is selected), and
- * will fire the common pipe interrupt vector.
+ * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe
+ * is selected), and will fire the common pipe interrupt vector.
*
* \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.
*/
- #define PIPE_INT_SETUP UPIENX, (1 << TXSTPE) , UPINTX, (1 << TXSTPI)
+ #define PIPE_INT_SETUP UPIENX, (1 << TXSTPE) , UPINTX, (1 << TXSTPI)
/** Interrupt definition for the pipe error interrupt. Should be used with the USB_INT_* macros
* located in USBInterrupt.h.
@@ -182,14 +183,14 @@
* This interrupt will fire if enabled on a particular pipe if an error occurs on that pipe, such
* as a CRC mismatch error.
*
- * This interrupt must be enabled on *each* pipe which requires it (after the pipe is selected), and
- * will fire the common pipe interrupt vector.
+ * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe
+ * is selected), and will fire the common pipe interrupt vector.
*
* \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.
*
* \see Pipe_GetErrorFlags() for more information on the pipe errors.
*/
- #define PIPE_INT_ERROR UPIENX, (1 << PERRE), UPINTX, (1 << PERRI)
+ #define PIPE_INT_ERROR UPIENX, (1 << PERRE), UPINTX, (1 << PERRI)
/** Interrupt definition for the pipe NAK received interrupt. Should be used with the USB_INT_* macros
* located in USBInterrupt.h.
@@ -197,14 +198,14 @@
* This interrupt will fire if enabled on a particular pipe if an attached device returns a NAK in
* response to a sent packet.
*
- * This interrupt must be enabled on *each* pipe which requires it (after the pipe is selected), and
- * will fire the common pipe interrupt vector.
+ * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe
+ * is selected), and will fire the common pipe interrupt vector.
*
* \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.
*
* \see Pipe_IsNAKReceived() for more information on pipe NAKs.
*/
- #define PIPE_INT_NAK UPIENX, (1 << NAKEDE), UPINTX, (1 << NAKEDI)
+ #define PIPE_INT_NAK UPIENX, (1 << NAKEDE), UPINTX, (1 << NAKEDI)
/** Interrupt definition for the pipe STALL received interrupt. Should be used with the USB_INT_* macros
* located in USBInterrupt.h.
@@ -212,28 +213,28 @@
* This interrupt will fire if enabled on a particular pipe if an attached device returns a STALL on the
* currently selected pipe. This will also fire if the pipe is an isochronous pipe and a CRC error occurs.
*
- * This interrupt must be enabled on *each* pipe which requires it (after the pipe is selected), and
- * will fire the common pipe interrupt vector.
+ * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe
+ * is selected), and will fire the common pipe interrupt vector.
*
* \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.
*/
- #define PIPE_INT_STALL UPIENX, (1 << RXSTALLE), UPINTX, (1 << RXSTALLI)
+ #define PIPE_INT_STALL UPIENX, (1 << RXSTALLE), UPINTX, (1 << RXSTALLI)
/** Indicates the number of bytes currently stored in the current pipe's selected bank. */
- #define Pipe_BytesInPipe() UPBCX
+ #define Pipe_BytesInPipe() UPBCX
/** Resets the desired pipe, including the pipe banks and flags. */
- #define Pipe_ResetPipe(pipenum) MACROS{ UPRST = (1 << pipenum); UPRST = 0; }MACROE
+ #define Pipe_ResetPipe(pipenum) MACROS{ UPRST = (1 << pipenum); UPRST = 0; }MACROE
/** Selects the given pipe number. Any pipe operations which do not require the pipe number to be
* indicated will operate on the currently selected pipe.
*/
- #define Pipe_SelectPipe(pipenum) MACROS{ UPNUM = pipenum; }MACROE
+ #define Pipe_SelectPipe(pipenum) MACROS{ UPNUM = pipenum; }MACROE
/** Returns the pipe address of the currently selected pipe. This is typically used to save the
* currently selected pipe number so that it can be restored after another pipe has been manipulated.
*/
- #define Pipe_GetCurrentPipe() (UPNUM & PIPE_PIPENUM_MASK)
+ #define Pipe_GetCurrentPipe() (UPNUM & PIPE_PIPENUM_MASK)
/** Enables the currently selected pipe so that data can be sent and received through it to and from
* an attached device.
@@ -241,78 +242,78 @@
* \note Pipes must first be configured properly rather than just being enabled via the
* Pipe_ConfigurePipe() macro, which calls Pipe_EnablePipe() automatically.
*/
- #define Pipe_EnablePipe() MACROS{ UPCONX |= (1 << PEN); }MACROE
+ #define Pipe_EnablePipe() MACROS{ UPCONX |= (1 << PEN); }MACROE
/** Disables the currently selected pipe so that data cannot be sent and received through it to and
* from an attached device.
*/
- #define Pipe_DisablePipe() MACROS{ UPCONX &= ~(1 << PEN); }MACROE
+ #define Pipe_DisablePipe() MACROS{ UPCONX &= ~(1 << PEN); }MACROE
/** Returns true if the currently selected pipe is enabled, false otherwise. */
- #define Pipe_IsEnabled() ((UPCONX & (1 << PEN)) ? true : false)
+ #define Pipe_IsEnabled() ((UPCONX & (1 << PEN)) ? true : false)
/** Sets the token for the currently selected endpoint to one of the tokens specified by the PIPE_TOKEN_*
* masks. This should only be used on CONTROL type endpoints, to allow for bidirectional transfer of
* data during control requests.
*/
- #define Pipe_SetToken(token) MACROS{ UPCFG0X = ((UPCFG0X & ~PIPE_TOKEN_MASK) | token); }MACROE
+ #define Pipe_SetToken(token) MACROS{ UPCFG0X = ((UPCFG0X & ~PIPE_TOKEN_MASK) | token); }MACROE
/** Configures the currently selected pipe to allow for an unlimited number of IN requests. */
- #define Pipe_SetInfiniteINRequests() MACROS{ UPCONX |= (1 << INMODE); }MACROE
+ #define Pipe_SetInfiniteINRequests() MACROS{ UPCONX |= (1 << INMODE); }MACROE
/** Configures the currently selected pipe to only allow the specified number of IN requests to be
* accepted by the pipe before it is automatically frozen.
*/
- #define Pipe_SetFiniteINRequests(n) MACROS{ UPCONX &= ~(1 << INMODE); UPINRQX = n; }MACROE
+ #define Pipe_SetFiniteINRequests(n) MACROS{ UPCONX &= ~(1 << INMODE); UPINRQX = n; }MACROE
/** Returns true if the currently selected pipe is configured, false otherwise. */
- #define Pipe_IsConfigured() ((UPSTAX & (1 << CFGOK)) ? true : false)
+ #define Pipe_IsConfigured() ((UPSTAX & (1 << CFGOK)) ? true : false)
/** Sets the period between interrupts for an INTERRUPT type pipe to a specified number of milliseconds. */
- #define Pipe_SetInterruptPeriod(ms) MACROS{ UPCFG2X = ms; }MACROE
+ #define Pipe_SetInterruptPeriod(ms) MACROS{ UPCFG2X = ms; }MACROE
/** Returns a mask indicating which pipe's interrupt periods have elapsed, indicating that the pipe should
* be serviced.
*/
- #define Pipe_GetPipeInterrupts() UPINT
+ #define Pipe_GetPipeInterrupts() UPINT
/** Clears the interrupt flag for the specified pipe number. */
- #define Pipe_ClearPipeInterrupt(n) MACROS{ UPINT &= ~(1 << n); }MACROE
+ #define Pipe_ClearPipeInterrupt(n) MACROS{ UPINT &= ~(1 << n); }MACROE
/** Returns true if the specified pipe's interrupt period has elapsed, false otherwise. */
- #define Pipe_HasPipeInterrupted(n) ((UPINT & (1 << n)) ? true : false)
+ #define Pipe_HasPipeInterrupted(n) ((UPINT & (1 << n)) ? true : false)
/** Clears the pipe bank, and switches to the alternate bank if the currently selected pipe is
* dual-banked. When cleared, this either frees the bank up for the next packet from the host
* (if the endpoint is of the OUT direction) or sends the packet contents to the host (if the
* pipe is of the IN direction).
*/
- #define Pipe_ClearCurrentBank() MACROS{ UPINTX &= ~(1 << FIFOCON); }MACROE
+ #define Pipe_ClearCurrentBank() MACROS{ UPINTX &= ~(1 << FIFOCON); }MACROE
/** Unfreezes the pipe, allowing it to communicate with an attached device. */
- #define Pipe_Unfreeze() MACROS{ UPCONX &= ~(1 << PFREEZE); }MACROE
+ #define Pipe_Unfreeze() MACROS{ UPCONX &= ~(1 << PFREEZE); }MACROE
/** Freezes the pipe, preventing it from communicating with an attached device. */
- #define Pipe_Freeze() MACROS{ UPCONX |= (1 << PFREEZE); }MACROE
+ #define Pipe_Freeze() MACROS{ UPCONX |= (1 << PFREEZE); }MACROE
/** Clears the master pipe error flag. */
- #define Pipe_ClearError() MACROS{ UPINTX &= ~(1 << PERRI); }MACROE
+ #define Pipe_ClearError() MACROS{ UPINTX &= ~(1 << PERRI); }MACROE
/** Returns true if the master pipe error flag is set for the currently selected pipe, indicating that
* some sort of hardware error has occurred on the pipe.
*
* \see Pipe_GetErrorFlags() macro for information on retreiving the exact error flag.
*/
- #define Pipe_IsError() ((UPINTX & (1 << PERRI)) ? true : false)
+ #define Pipe_IsError() ((UPINTX & (1 << PERRI)) ? true : false)
/** Clears all the currently selected pipe's hardware error flags, but does not clear the master error
* flag for the pipe. */
- #define Pipe_ClearErrorFlags() MACROS{ UPERRX = 0; }MACROE
+ #define Pipe_ClearErrorFlags() MACROS{ UPERRX = 0; }MACROE
/** Returns a mask of the hardware error flags which have occured on the currently selected pipe. This
* value can then be masked against the PIPE_ERRORFLAG_* masks to determine what error has occurred.
*/
- #define Pipe_GetErrorFlags() UPERRX
+ #define Pipe_GetErrorFlags() UPERRX
/** Returns true if the currently selected pipe may be read from (if data is waiting in the pipe
* bank and the pipe is an IN direction, or if the bank is not yet full if the pipe is an OUT
@@ -320,40 +321,40 @@
* is an IN direction and no packet has been received, or if the pipe is an OUT direction and the
* pipe bank is full.
*/
- #define Pipe_ReadWriteAllowed() ((UPINTX & (1 << RWAL)) ? true : false)
+ #define Pipe_ReadWriteAllowed() ((UPINTX & (1 << RWAL)) ? true : false)
/** Clears the flag indicating that a SETUP request has been sent to the attached device from the
* currently selected CONTROL type pipe.
*/
- #define Pipe_ClearSetupSent() MACROS{ UPINTX &= ~(1 << TXSTPI); }MACROE
+ #define Pipe_ClearSetupSent() MACROS{ UPINTX &= ~(1 << TXSTPI); }MACROE
/** Returns true if no SETUP request is currently being sent to the attached device, false otherwise. */
- #define Pipe_IsSetupSent() ((UPINTX & (1 << TXSTPI)) ? true : false)
+ #define Pipe_IsSetupSent() ((UPINTX & (1 << TXSTPI)) ? true : false)
/** Returns true if the currently selected pipe has been stalled by the attached device, false otherwise. */
- #define Pipe_IsStalled() ((UPINTX & (1 << RXSTALLI)) ? true : false)
+ #define Pipe_IsStalled() ((UPINTX & (1 << RXSTALLI)) ? true : false)
/** Clears the stall condition on the currently selected pipe. */
- #define Pipe_ClearStall() MACROS{ UPINTX &= ~(1 << RXSTALLI); }MACROE
+ #define Pipe_ClearStall() MACROS{ UPINTX &= ~(1 << RXSTALLI); }MACROE
/** Returns true if an IN request has been received on the currently selected CONTROL type pipe, false
* otherwise.
*/
- #define Pipe_IsSetupINReceived() ((UPINTX & (1 << RXINI)) ? true : false)
+ #define Pipe_IsSetupINReceived() ((UPINTX & (1 << RXINI)) ? true : false)
/** Returns true if the currently selected CONTROL type pipe is ready to send an OUT request, false
* otherwise.
*/
- #define Pipe_IsSetupOUTReady() ((UPINTX & (1 << TXOUTI)) ? true : false)
+ #define Pipe_IsSetupOUTReady() ((UPINTX & (1 << TXOUTI)) ? true : false)
/** Acknowedges the reception of a setup IN request from the attached device on the currently selected
* CONTROL type endpoint, allowing for the transmission of a setup OUT packet, or the reception of
* another setup IN packet.
*/
- #define Pipe_ClearSetupIN() MACROS{ UPINTX &= ~(1 << RXINI); UPINTX &= ~(1 << FIFOCON); }MACROE
+ #define Pipe_ClearSetupIN() MACROS{ UPINTX &= ~(1 << RXINI); UPINTX &= ~(1 << FIFOCON); }MACROE
/** Sends the currently selected CONTROL type pipe's contents to the device as a setup OUT packet. */
- #define Pipe_ClearSetupOUT() MACROS{ UPINTX &= ~(1 << TXOUTI); UPINTX &= ~(1 << FIFOCON); }MACROE
+ #define Pipe_ClearSetupOUT() MACROS{ UPINTX &= ~(1 << TXOUTI); UPINTX &= ~(1 << FIFOCON); }MACROE
/** Returns true if the device sent a NAK (Negative Acknowedge) in response to the last sent packet on
* the currently selected pipe. This ocurrs when the host sends a packet to the device, but the device
@@ -361,13 +362,13 @@
* received, it must be cleard using Pipe_ClearNAKReceived() before the previous (or any other) packet
* can be re-sent.
*/
- #define Pipe_IsNAKReceived() ((UPINTX & (1 << NAKEDI)) ? true : false)
+ #define Pipe_IsNAKReceived() ((UPINTX & (1 << NAKEDI)) ? true : false)
/** Clears the NAK condition on the currently selected pipe.
*
* \see Pipe_IsNAKReceived() for more details.
*/
- #define Pipe_ClearNAKReceived() MACROS{ UPINTX &= ~(1 << NAKEDI); }MACROE
+ #define Pipe_ClearNAKReceived() MACROS{ UPINTX &= ~(1 << NAKEDI); }MACROE
/* Enums: */
/** Enum for the possible error return codes of the Pipe_WaitUntilReady function */
@@ -401,19 +402,21 @@
/* Inline Functions: */
/** Reads one byte from the currently selected pipe's bank, for OUT direction pipes. */
- static inline uint8_t Pipe_Read_Byte(void) ATTR_WARN_UNUSED_RESULT;
+ static inline uint8_t Pipe_Read_Byte(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
static inline uint8_t Pipe_Read_Byte(void)
{
return UPDATX;
}
/** Writes one byte from the currently selected pipe's bank, for IN direction pipes. */
+ static inline void Pipe_Write_Byte(const uint8_t Byte) ATTR_ALWAYS_INLINE;
static inline void Pipe_Write_Byte(const uint8_t Byte)
{
UPDATX = Byte;
}
/** Discards one byte from the currently selected pipe's bank, for OUT direction pipes. */
+ static inline void Pipe_Discard_Byte(void) ATTR_ALWAYS_INLINE;
static inline void Pipe_Discard_Byte(void)
{
uint8_t Dummy;
@@ -424,7 +427,7 @@
/** Reads two bytes from the currently selected pipe's bank in little endian format, for OUT
* direction pipes.
*/
- static inline uint16_t Pipe_Read_Word_LE(void) ATTR_WARN_UNUSED_RESULT;
+ static inline uint16_t Pipe_Read_Word_LE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
static inline uint16_t Pipe_Read_Word_LE(void)
{
uint16_t Data;
@@ -438,7 +441,7 @@
/** Reads two bytes from the currently selected pipe's bank in big endian format, for OUT
* direction pipes.
*/
- static inline uint16_t Pipe_Read_Word_BE(void) ATTR_WARN_UNUSED_RESULT;
+ static inline uint16_t Pipe_Read_Word_BE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
static inline uint16_t Pipe_Read_Word_BE(void)
{
uint16_t Data;
@@ -452,6 +455,7 @@
/** Writes two bytes to the currently selected pipe's bank in little endian format, for IN
* direction pipes.
*/
+ static inline void Pipe_Write_Word_LE(const uint16_t Word) ATTR_ALWAYS_INLINE;
static inline void Pipe_Write_Word_LE(const uint16_t Word)
{
UPDATX = (Word & 0xFF);
@@ -461,6 +465,7 @@
/** Writes two bytes to the currently selected pipe's bank in big endian format, for IN
* direction pipes.
*/
+ static inline void Pipe_Write_Word_BE(const uint16_t Word) ATTR_ALWAYS_INLINE;
static inline void Pipe_Write_Word_BE(const uint16_t Word)
{
UPDATX = (Word >> 8);
@@ -468,6 +473,7 @@
}
/** Discards two bytes from the currently selected pipe's bank, for OUT direction pipes. */
+ static inline void Pipe_Ignore_Word(void) ATTR_ALWAYS_INLINE;
static inline void Pipe_Ignore_Word(void)
{
uint8_t Dummy;
@@ -479,7 +485,7 @@
/** Reads four bytes from the currently selected pipe's bank in little endian format, for OUT
* direction pipes.
*/
- static inline uint32_t Pipe_Read_DWord_LE(void) ATTR_WARN_UNUSED_RESULT;
+ static inline uint32_t Pipe_Read_DWord_LE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
static inline uint32_t Pipe_Read_DWord_LE(void)
{
union
@@ -499,7 +505,7 @@
/** Reads four bytes from the currently selected pipe's bank in big endian format, for OUT
* direction pipes.
*/
- static inline uint32_t Pipe_Read_DWord_BE(void) ATTR_WARN_UNUSED_RESULT;
+ static inline uint32_t Pipe_Read_DWord_BE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
static inline uint32_t Pipe_Read_DWord_BE(void)
{
union
@@ -519,6 +525,7 @@
/** Writes four bytes to the currently selected pipe's bank in little endian format, for IN
* direction pipes.
*/
+ static inline void Pipe_Write_DWord_LE(const uint32_t DWord) ATTR_ALWAYS_INLINE;
static inline void Pipe_Write_DWord_LE(const uint32_t DWord)
{
Pipe_Write_Word_LE(DWord);
@@ -527,7 +534,8 @@
/** Writes four bytes to the currently selected pipe's bank in big endian format, for IN
* direction pipes.
- */
+ */
+ static inline void Pipe_Write_DWord_BE(const uint32_t DWord) ATTR_ALWAYS_INLINE;
static inline void Pipe_Write_DWord_BE(const uint32_t DWord)
{
Pipe_Write_Word_BE(DWord >> 16);
@@ -535,6 +543,7 @@
}
/** Discards four bytes from the currently selected pipe's bank, for OUT direction pipes. */
+ static inline void Pipe_Ignore_DWord(void) ATTR_ALWAYS_INLINE;
static inline void Pipe_Ignore_DWord(void)
{
uint8_t Dummy;
@@ -754,14 +763,14 @@
/* Macros: */
#define PIPE_TOKEN_MASK (0x03 << PTOKEN0)
- #define Pipe_AllocateMemory() MACROS{ UPCFG1X |= (1 << ALLOC); }MACROE
- #define Pipe_DeallocateMemory() MACROS{ UPCFG1X &= ~(1 << ALLOC); }MACROE
+ #define Pipe_AllocateMemory() MACROS{ UPCFG1X |= (1 << ALLOC); }MACROE
+ #define Pipe_DeallocateMemory() MACROS{ UPCFG1X &= ~(1 << ALLOC); }MACROE
/* Function Prototypes: */
void Pipe_ClearPipes(void);
/* Inline Functions: */
- static inline uint8_t Pipe_BytesToEPSizeMask(uint16_t Bytes) ATTR_WARN_UNUSED_RESULT ATTR_CONST ATTR_ALWAYSINLINE;
+ static inline uint8_t Pipe_BytesToEPSizeMask(uint16_t Bytes) ATTR_WARN_UNUSED_RESULT ATTR_CONST ATTR_ALWAYS_INLINE;
static inline uint8_t Pipe_BytesToEPSizeMask(uint16_t Bytes)
{
if (Bytes <= 8)
diff --git a/LUFA/MigrationInformation.txt b/LUFA/MigrationInformation.txt
index cd23da332..ebfc364d0 100644
--- a/LUFA/MigrationInformation.txt
+++ b/LUFA/MigrationInformation.txt
@@ -21,6 +21,9 @@
* <b>Library Demos</b>
* - The USBtoSerial demo now discards all data when not connected to a host, rather than buffering it for later transmission.
*
+ * <b>Non-USB Library Components</b>
+ * - The ATTR_ALWAYSINLINE function attribute macro has been renamed to ATTR_ALWAYS_INLINE.
+ *
* \section Sec_Migration090209 Migrating from 081217 to 090209
*
* <b>Device Mode</b>
diff --git a/LUFA/Scheduler/Scheduler.h b/LUFA/Scheduler/Scheduler.h
index 39f94ef80..e536e7137 100644
--- a/LUFA/Scheduler/Scheduler.h
+++ b/LUFA/Scheduler/Scheduler.h
@@ -175,7 +175,7 @@
* \param DelayCounter Counter which is storing the starting tick count for a given delay.
*/
static inline void Scheduler_ResetDelay(SchedulerDelayCounter_t* const DelayCounter)
- ATTR_NON_NULL_PTR_ARG(1);
+ ATTR_NON_NULL_PTR_ARG(1) ATTR_ALWAYS_INLINE;
static inline void Scheduler_ResetDelay(SchedulerDelayCounter_t* const DelayCounter)
{
ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
@@ -229,12 +229,13 @@
#define MAX_DELAYCTR_COUNT 0xFFFF
/* Inline Functions: */
+ static inline void Scheduler_InitScheduler(const uint8_t TotalTasks) ATTR_ALWAYS_INLINE;
static inline void Scheduler_InitScheduler(const uint8_t TotalTasks)
{
Scheduler_TotalTasks = TotalTasks;
}
- static inline void Scheduler_GoSchedule(const uint8_t TotalTasks) ATTR_NO_RETURN;
+ static inline void Scheduler_GoSchedule(const uint8_t TotalTasks) ATTR_NO_RETURN ATTR_ALWAYS_INLINE;
static inline void Scheduler_GoSchedule(const uint8_t TotalTasks)
{
Scheduler_InitScheduler(TotalTasks);