From b624f32f944acdc59dcb130674c09090c5c404cb Mon Sep 17 00:00:00 2001
From: skullY <skullydazed@gmail.com>
Date: Fri, 30 Aug 2019 11:19:03 -0700
Subject: clang-format changes

---
 tmk_core/protocol/iwrap/wd.h | 134 ++++++++++++++++++++++---------------------
 1 file changed, 68 insertions(+), 66 deletions(-)

(limited to 'tmk_core/protocol/iwrap/wd.h')

diff --git a/tmk_core/protocol/iwrap/wd.h b/tmk_core/protocol/iwrap/wd.h
index 12395bf69..083d6d44d 100644
--- a/tmk_core/protocol/iwrap/wd.h
+++ b/tmk_core/protocol/iwrap/wd.h
@@ -61,55 +61,58 @@ cleared on every power up or reset, along with disabling the watchdog-
 
 */
 
-//reset registers to the same name (MCUCSR)
+// reset registers to the same name (MCUCSR)
 #if !defined(MCUCSR)
-#define MCUCSR                  MCUSR
+#    define MCUCSR MCUSR
 #endif
 
-//watchdog registers to the same name (WDTCSR)
+// watchdog registers to the same name (WDTCSR)
 #if !defined(WDTCSR)
-#define WDTCSR                  WDTCR
+#    define WDTCSR WDTCR
 #endif
 
-//if enhanced watchdog, define irq values, create disable macro
+// if enhanced watchdog, define irq values, create disable macro
 #if defined(WDIF)
-#define WD_IRQ                  0xC0
-#define WD_RST_IRQ              0xC8
-#define WD_DISABLE()            do{                       \
-                                    MCUCSR &= ~(1<<WDRF); \
-                                    WD_SET(WD_OFF);       \
-                                }while(0)
+#    define WD_IRQ 0xC0
+#    define WD_RST_IRQ 0xC8
+#    define WD_DISABLE()            \
+        do {                        \
+            MCUCSR &= ~(1 << WDRF); \
+            WD_SET(WD_OFF);         \
+        } while (0)
 #endif
 
-//all watchdogs
-#define WD_RST                  8
-#define WD_OFF                  0
-
-//prescale values
-#define WDTO_15MS               0
-#define WDTO_30MS               1
-#define WDTO_60MS               2
-#define WDTO_120MS              3
-#define WDTO_250MS              4
-#define WDTO_500MS              5
-#define WDTO_1S                 6
-#define WDTO_2S                 7
-
-//prescale values for avrs with WDP3
+// all watchdogs
+#define WD_RST 8
+#define WD_OFF 0
+
+// prescale values
+#define WDTO_15MS 0
+#define WDTO_30MS 1
+#define WDTO_60MS 2
+#define WDTO_120MS 3
+#define WDTO_250MS 4
+#define WDTO_500MS 5
+#define WDTO_1S 6
+#define WDTO_2S 7
+
+// prescale values for avrs with WDP3
 #if defined(WDP3)
-#define WDTO_4S                 0x20
-#define WDTO_8S                 0x21
+#    define WDTO_4S 0x20
+#    define WDTO_8S 0x21
 #endif
 
-//watchdog reset
-#define WDR()                   __asm__ __volatile__("wdr")
+// watchdog reset
+#define WDR() __asm__ __volatile__("wdr")
 
-//avr reset using watchdog
-#define WD_AVR_RESET()          do{                              \
-                                    __asm__ __volatile__("cli"); \
-                                    WD_SET_UNSAFE(WD_RST);       \
-                                    while(1);                    \
-                                }while(0)
+// avr reset using watchdog
+#define WD_AVR_RESET()               \
+    do {                             \
+        __asm__ __volatile__("cli"); \
+        WD_SET_UNSAFE(WD_RST);       \
+        while (1)                    \
+            ;                        \
+    } while (0)
 
 /*set the watchdog-
 1. save SREG
@@ -119,41 +122,40 @@ cleared on every power up or reset, along with disabling the watchdog-
 5. write watchdog value
 6. restore SREG (restoring irq status)
 */
-#define WD_SET(val,...)                                 \
-    __asm__ __volatile__(                               \
-        "in __tmp_reg__,__SREG__"           "\n\t"      \
-        "cli"                               "\n\t"      \
-        "wdr"                               "\n\t"      \
-        "sts %[wdreg],%[wden]"              "\n\t"      \
-        "sts %[wdreg],%[wdval]"             "\n\t"      \
-        "out __SREG__,__tmp_reg__"          "\n\t"      \
-        :                                               \
-        : [wdreg] "M" (&WDTCSR),                        \
-          [wden]  "r" ((uint8_t)(0x18)),                \
-          [wdval] "r" ((uint8_t)(val|(__VA_ARGS__+0)))  \
-        : "r0"                                          \
-)
+#define WD_SET(val, ...)                                                                                                            \
+    __asm__ __volatile__("in __tmp_reg__,__SREG__"                                                                                  \
+                         "\n\t"                                                                                                     \
+                         "cli"                                                                                                      \
+                         "\n\t"                                                                                                     \
+                         "wdr"                                                                                                      \
+                         "\n\t"                                                                                                     \
+                         "sts %[wdreg],%[wden]"                                                                                     \
+                         "\n\t"                                                                                                     \
+                         "sts %[wdreg],%[wdval]"                                                                                    \
+                         "\n\t"                                                                                                     \
+                         "out __SREG__,__tmp_reg__"                                                                                 \
+                         "\n\t"                                                                                                     \
+                         :                                                                                                          \
+                         : [ wdreg ] "M"(&WDTCSR), [ wden ] "r"((uint8_t)(0x18)), [ wdval ] "r"((uint8_t)(val | (__VA_ARGS__ + 0))) \
+                         : "r0")
 
 /*set the watchdog when I bit in SREG known to be clear-
 1. reset watchdog timer
 2. enable watchdog change
 5. write watchdog value
 */
-#define WD_SET_UNSAFE(val,...)                          \
-    __asm__ __volatile__(                               \
-        "wdr"                               "\n\t"      \
-        "sts %[wdreg],%[wden]"              "\n\t"      \
-        "sts %[wdreg],%[wdval]"             "\n\t"      \
-        :                                               \
-        : [wdreg] "M" (&WDTCSR),                        \
-          [wden]  "r" ((uint8_t)(0x18)),                \
-          [wdval] "r" ((uint8_t)(val|(__VA_ARGS__+0)))  \
-)
-
-
-//for compatibility with avr/wdt.h
-#define wdt_enable(val) WD_SET(WD_RST,val)
-#define wdt_disable()   WD_SET(WD_OFF)
-
+#define WD_SET_UNSAFE(val, ...)                  \
+    __asm__ __volatile__("wdr"                   \
+                         "\n\t"                  \
+                         "sts %[wdreg],%[wden]"  \
+                         "\n\t"                  \
+                         "sts %[wdreg],%[wdval]" \
+                         "\n\t"                  \
+                         :                       \
+                         : [ wdreg ] "M"(&WDTCSR), [ wden ] "r"((uint8_t)(0x18)), [ wdval ] "r"((uint8_t)(val | (__VA_ARGS__ + 0))))
+
+// for compatibility with avr/wdt.h
+#define wdt_enable(val) WD_SET(WD_RST, val)
+#define wdt_disable() WD_SET(WD_OFF)
 
 #endif /* _AVR_WD_H_ */
-- 
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