/*
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file test.h
* @brief Tests support header.
*
* @addtogroup test
* @{
*/
#ifndef _TEST_H_
#define _TEST_H_
/**
* @brief Delay inserted between test cases.
*/
#if !defined(DELAY_BETWEEN_TESTS) || defined(__DOXYGEN__)
#define DELAY_BETWEEN_TESTS 200
#endif
/**
* @brief If @p TRUE then benchmarks are not included.
*/
#if !defined(TEST_NO_BENCHMARKS) || defined(__DOXYGEN__)
#define TEST_NO_BENCHMARKS FALSE
#endif
#define MAX_THREADS 5
#define MAX_TOKENS 16
#if defined(CH_ARCHITECTURE_AVR) || defined(CH_ARCHITECTURE_MSP430)
#define THREADS_STACK_SIZE 48
#elif defined(CH_ARCHITECTURE_STM8)
#define THREADS_STACK_SIZE 64
#elif defined(CH_ARCHITECTURE_SIMIA32)
#define THREADS_STACK_SIZE 512
#else
#define THREADS_STACK_SIZE 128
#endif
#define WA_SIZE THD_WORKING_AREA_SIZE(THREADS_STACK_SIZE)
/**
* @brief Structure representing a test case.
*/
struct testcase {
const char *name; /**< @brief Test case name. */
void (*setup)(void); /**< @brief Test case preparation function. */
void (*teardown)(void); /**< @brief Test case clean up function. */
void (*execute)(void); /**< @brief Test case execution function. */
};
#ifndef __DOXYGEN__
union test_buffers {
struct {
THD_WORKING_AREA(T0, THREADS_STACK_SIZE);
THD_WORKING_AREA(T1, THREADS_STACK_SIZE);
THD_WORKING_AREA(T2, THREADS_STACK_SIZE);
THD_WORKING_AREA(T3, THREADS_STACK_SIZE);
THD_WORKING_AREA(T4, THREADS_STACK_SIZE);
} wa;
uint8_t buffer[WA_SIZE * 5];
};
#endif
extern bool test_global_fail;
#ifdef __cplusplus
extern "C" {
#endif
void TestThread(void *p);
void test_printn(uint32_t n);
void test_print(const char *msgp);
void test_println(const char *msgp);
void test_emit_token(char token);
bool _test_fail(unsigned point);
bool _test_assert(unsigned point, bool condition);
bool _test_assert_sequence(unsigned point, char *expected);
bool _test_assert_time_window(unsigned point, systime_t start, systime_t end);
void test_terminate_threads(void);
void test_wait_threads(void);
systime_t test_wait_tick(void);
void test_start_timer(unsigned ms);
#if CH_DBG_THREADS_PROFILING
void test_cpu_pulse(unsigned duration);
#endif
#if defined(WIN32)
void ChkIntSources(void);
#endif
#ifdef __cplusplus
}
#endif
/**
* @brief Test failure enforcement.
*/
#define test_fail(point) { \
_test_fail(point); \
return; \
}
/**
* @brief Test assertion.
*
* @param[in] point numeric assertion identifier
* @param[in] condition a boolean expression that must be verified to be true
* @param[in] msg failure message
*/
#define test_assert(point, condition, msg) { \
if (_test_assert(point, condition)) \
return; \
}
/**
* @brief Test assertion with lock.
*
* @param[in] point numeric assertion identifier
* @param[in] condition a boolean expression that must be verified to be true
* @param[in] msg failure message
*/
#define test_assert_lock(point, condition, msg) { \
chSysLock(); \
if (_test_assert(point, condition)) { \
chSysUnlock(); \
return; \
} \
chSysUnlock(); \
}
/**
* @brief Test sequence assertion.
*
* @param[in] point numeric assertion identifier
* @param[in] expected string to be matched with the tokens buffer
*/
#define test_assert_sequence(point, expected) { \
if (_test_assert_sequence(point, expected)) \
return; \
}
/**
* @brief Test time window assertion.
*
* @param[in] point numeric assertion identifier
* @param[in] start initial time in the window (included)
* @param[in] end final time in the window (not included)
*/
#define test_assert_time_window(point, start, end) { \
if (_test_assert_time_window(point, start, end)) \
return; \
}
#if !defined(__DOXYGEN__)
extern thread_t *threads[MAX_THREADS];
extern union test_buffers test;
extern void * ROMCONST wa[];
extern bool test_timer_done;
#endif
#endif /* _TEST_H_ */
/** @} */
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* STM32 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 15...0 Lowest...Highest.
*
* DMA priorities:
* 0...3 Lowest...Highest.
*/
/*
* HAL driver system settings.
*/
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSE
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 9
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV2
#define STM32_PPRE2 STM32_PPRE2_DIV2
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
/*
* ADC driver system settings.
*/
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
*/
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM5 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
/*
* ICU driver system settings.
*/
#define STM32_ICU_USE_TIM1 FALSE
#define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 FALSE
#define STM32_ICU_USE_TIM4 TRUE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
/*
* PWM driver system settings.
*/
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
/*
* SDC driver system settings.
*/
#define STM32_SDC_DATATIMEOUT 0x000FFFFF
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
/*
* SERIAL driver system settings.
*/
#define STM32_SERIAL_USE_USART1 TRUE
#define STM32_SERIAL_USE_USART2 TRUE
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
/*
* SPI driver system settings.
*/
#define STM32_SPI_USE_SPI1 TRUE
#define STM32_SPI_USE_SPI2 TRUE
#define STM32_SPI_USE_SPI3 FALSE
#define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1
#define STM32_SPI_SPI3_DMA_PRIORITY 1
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
#define STM32_UART_USE_USART2 TRUE
#define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
/*
* USB driver system settings.
*/
#define STM32_USB_USE_USB1 TRUE
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
#define STM32_USB_USB1_HP_IRQ_PRIORITY 6
#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
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