1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
|
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
MODULE ?chcoreasm_v6m
AAPCS INTERWORK, VFP_COMPATIBLE
PRESERVE8
/*
* Imports the Cortex-Mx parameters header and performs the same calculations
* done in chcore.h.
*/
#include "cmparams.h"
#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
EXTCTX_SIZE SET 32
CONTEXT_OFFSET SET 12
SCB_ICSR SET 0xE000ED04
SECTION .text:CODE:NOROOT(2)
EXTERN chThdExit
EXTERN chSchIsRescRequiredExI
EXTERN chSchDoRescheduleI
THUMB
/*
* Performs a context switch between two threads.
*/
PUBLIC _port_switch
_port_switch:
push {r4, r5, r6, r7, lr}
mov r4, r8
mov r5, r9
mov r6, r10
mov r7, r11
push {r4, r5, r6, r7}
mov r3, sp
str r3, [r1, #CONTEXT_OFFSET]
ldr r3, [r0, #CONTEXT_OFFSET]
mov sp, r3
pop {r4, r5, r6, r7}
mov r8, r4
mov r9, r5
mov r10, r6
mov r11, r7
pop {r4, r5, r6, r7, pc}
/*
* Start a thread by invoking its work function.
* If the work function returns @p chThdExit() is automatically invoked.
*/
PUBLIC _port_thread_start
_port_thread_start:
cpsie i
mov r0, r5
blx r4
bl chThdExit
/*
* NMI vector.
* The NMI vector is used for exception mode re-entering after a context
* switch.
*/
PUBLIC NMIVector
NMIVector:
mrs r3, PSP
adds r3, r3, #32
msr PSP, r3
cpsie i
bx lr
/*
* Post-IRQ switch code.
* Exception handlers return here for context switching.
*/
PUBLIC _port_switch_from_isr
_port_switch_from_isr:
bl chSchDoRescheduleI
movs r3, #128
lsls r3, r3, #24
ldr r2, =SCB_ICSR
str r3, [r2, #0]
_waitnmi:
b _waitnmi
/*
* Reschedule verification and setup after an IRQ.
*/
PUBLIC _port_irq_epilogue
_port_irq_epilogue:
push {r3, lr}
adds r0, r0, #15
beq stillnested
cpsid i
bl chSchIsRescRequiredExI
cmp r0, #0
bne doresch
cpsie i
stillnested
pop {r3, pc}
doresch
mrs r3, PSP
subs r3, r3, #32
msr PSP, r3
ldr r2, =_port_switch_from_isr
str r2, [r3, #24]
movs r2, #128
lsls r2, r2, #17
str r2, [r3, #28]
pop {r3, pc}
END
|
