/* * yosys -- Yosys Open SYnthesis Suite * * Copyright (C) 2012 Clifford Wolf * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * --- * * The internal logic cell simulation library. * * This verilog library contains simple simulation models for the internal * logic cells ($_NOT_ , $_AND_ , ...) that are generated by the default technology * mapper (see "techmap.v" in this directory) and expected by the "abc" pass. * */ module \$_BUF_ (A, Y); input A; output Y; assign Y = A; endmodule module \$_NOT_ (A, Y); input A; output Y; assign Y = ~A; endmodule module \$_AND_ (A, B, Y); input A, B; output Y; assign Y = A & B; endmodule module \$_NAND_ (A, B, Y); input A, B; output Y; assign Y = ~(A & B); endmodule module \$_OR_ (A, B, Y); input A, B; output Y; assign Y = A | B; endmodule module \$_NOR_ (A, B, Y); input A, B; output Y; assign Y = ~(A | B); endmodule module \$_XOR_ (A, B, Y); input A, B; output Y; assign Y = A ^ B; endmodule module \$_XNOR_ (A, B, Y); input A, B; output Y; assign Y = ~(A ^ B); endmodule module \$_MUX_ (A, B, S, Y); input A, B, S; output Y; assign Y = S ? B : A; endmodule module \$_MUX4_ (A, B, C, D, S, T, Y); input A, B, C, D, S, T; output Y; assign Y = T ? (S ? D : C) : (S ? B : A); endmodule module \$_MUX8_ (A, B, C, D, E, F, G, H, S, T, U, Y); input A, B, C, D, E, F, G, H, S, T, U; output Y; assign Y = U ? T ? (S ? H : G) : (S ? F : E) : T ? (S ? D : C) : (S ? B : A); endmodule module \$_MUX16_ (A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V, Y); input A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V; output Y; assign Y = V ? U ? T ? (S ? P : O) : (S ? N : M) : T ? (S ? L : K) : (S ? J : I) : U ? T ? (S ? H : G) : (S ? F : E) : T ? (S ? D : C) : (S ? B : A); endmodule module \$_AOI3_ (A, B, C, Y); input A, B, C; output Y; assign Y = ~((A & B) | C); endmodule module \$_OAI3_ (A, B, C, Y); input A, B, C; output Y; assign Y = ~((A | B) & C); endmodule module \$_AOI4_ (A, B, C, D, Y); input A, B, C, D; output Y; assign Y = ~((A & B) | (C & D)); endmodule module \$_OAI4_ (A, B, C, D, Y); input A, B, C, D; output Y; assign Y = ~((A | B) & (C | D)); endmodule module \$_SR_NN_ (S, R, Q); input S, R; output reg Q; always @(negedge S, negedge R) begin if (R == 0) Q <= 0; else if (S == 0) Q <= 1; end endmodule module \$_SR_NP_ (S, R, Q); input S, R; output reg Q; always @(negedge S, posedge R) begin if (R == 1) Q <= 0; else if (S == 0) Q <= 1; end endmodule module \$_SR_PN_ (S, R, Q); input S, R; output reg Q; always @(posedge S, negedge R) begin if (R == 0) Q <= 0; else if (S == 1) Q <= 1; end endmodule module \$_SR_PP_ (S, R, Q); input S, R; output reg Q; always @(posedge S, posedge R) begin if (R == 1) Q <= 0; else if (S == 1) Q <= 1; end endmodule module \$_DFF_N_ (D, Q, C); input D, C; output reg Q; always @(negedge C) begin Q <= D; end endmodule module \$_DFF_P_ (D, Q, C); input D, C; output reg Q; always @(posedge C) begin Q <= D; end endmodule module \$_DFFE_NN_ (D, Q, C, E); input D, C, E; output reg Q; always @(negedge C) begin if (!E) Q <= D; end endmodule module \$_DFFE_NP_ (D, Q, C, E); input D, C, E; output reg Q; always @(negedge C) begin if (E) Q <= D; end endmodule module \$_DFFE_PN_ (D, Q, C, E); input D, C, E; output reg Q; always @(posedge C) begin if (!E) Q <= D; end endmodule module \$_DFFE_PP_ (D, Q, C, E); input D, C, E; output reg Q; always @(posedge C) begin if (E) Q <= D; end endmodule module \$_DFF_NN0_ (D, Q, C, R); input D, C, R; output reg Q; always @(negedge C or negedge R) begin if (R == 0) Q <= 0; else Q <= D; end endmodule module \$_DFF_NN1_ (D, Q, C, R); input D, C, R; output reg Q; always @(negedge C or negedge R) begin if (R == 0) Q <= 1; else Q <= D; end endmodule module \$_DFF_NP0_ (D, Q, C, R); input D, C, R; output reg Q; always @(negedge C or posedge R) begin if (R == 1) Q <= 0; else Q <= D; end endmodule module \$_DFF_NP1_ (D, Q, C, R); input D, C, R; output reg Q; always @(negedge C or posedge R) begin if (R == 1) Q <= 1; else Q <= D; end endmodule module \$_DFF_PN0_ (D, Q, C, R); input D, C, R; output reg Q; always @(posedge C or negedge R) begin if (R == 0) Q <= 0; else Q <= D; end endmodule module \$_DFF_PN1_ (D, Q, C, R); input D, C, R; output reg Q; always @(posedge C or negedge R) begin if (R == 0) Q <= 1; else Q <= D; end endmodule module \$_DFF_PP0_ (D, Q, C, R); input D, C, R; output reg Q; always @(posedge C or posedge R) begin if (R == 1) Q <= 0; else Q <= D; end endmodule module \$_DFF_PP1_ (D, Q, C, R); input D, C, R; output reg Q; always @(posedge C or posedge R) begin if (R == 1) Q <= 1; else Q <= D; end endmodule module \$_DFFSR_NNN_ (C, S, R, D, Q); input C, S, R, D; output reg Q; always @(negedge C, negedge S, negedge R) begin if (R == 0) Q <= 0; else if (S == 0) Q <= 1; else Q <= D; end endmodule module \$_DFFSR_NNP_ (C, S, R, D, Q); input C, S, R, D; output reg Q; always @(negedge C, negedge S, posedge R) begin if (R == 1) Q <= 0; else if (S == 0) Q <= 1; else Q <= D; end endmodule module \$_DFFSR_NPN_ (C, S, R, D, Q); input C, S, R, D; output reg Q; always @(negedge C, posedge S, negedge R) begin if (R == 0) Q <= 0; else if (S == 1) Q <= 1; else Q <= D; end endmodule module \$_DFFSR_NPP_ (C, S, R, D, Q); input C, S, R, D; output reg Q; always @(negedge C, posedge S, posedge R) begin if (R == 1) Q <= 0; else if (S == 1) Q <= 1; else Q <= D; end endmodule module \$_DFFSR_PNN_ (C, S, R, D, Q); input C, S, R, D; output reg Q; always @(posedge C, negedge S, negedge R) begin if (R == 0) Q <= 0; else if (S == 0) Q <= 1; else Q <= D; end endmodule module \$_DFFSR_PNP_ (C, S, R, D, Q); input C, S, R, D; output reg Q; always @(posedge C, negedge S, posedge R) begin if (R == 1) Q <= 0; else if (S == 0) Q <= 1; else Q <= D; end endmodule module \$_DFFSR_PPN_ (C, S, R, D, Q); input C, S, R, D; output reg Q; always @(posedge C, posedge S, negedge R) begin if (R == 0) Q <= 0; else if (S == 1) Q <= 1; else Q <= D; end endmodule module \$_DFFSR_PPP_ (C, S, R, D, Q); input C, S, R, D; output reg Q; always @(posedge C, posedge S, posedge R) begin if (R == 1) Q <= 0; else if (S == 1) Q <= 1; else Q <= D; end endmodule module \$_DLATCH_N_ (E, D, Q); input E, D; output reg Q; always @* begin if (E == 0) Q <= D; end endmodule module \$_DLATCH_P_ (E, D, Q); input E, D; output reg Q; always @* begin if (E == 1) Q <= D; end endmodule module \$_DLATCHSR_NNN_ (E, S, R, D, Q); input E, S, R, D; output reg Q; always @* begin if (R == 0) Q <= 0; else if (S == 0) Q <= 1; else if (E == 0) Q <= D; end endmodule module \$_DLATCHSR_NNP_ (E, S, R, D, Q); input E, S, R, D; output reg Q; always @* begin if (R == 1) Q <= 0; else if (S == 0) Q <= 1; else if (E == 0) Q <= D; end endmodule module \$_DLATCHSR_NPN_ (E, S, R, D, Q); input E, S, R, D; output reg Q; always @* begin if (R == 0) Q <= 0; else if (S == 1) Q <= 1; else if (E == 0) Q <= D; end endmodule module \$_DLATCHSR_NPP_ (E, S, R, D, Q); input E, S, R, D; output reg Q; always @* begin if (R == 1) Q <= 0; else if (S == 1) Q <= 1; else if (E == 0) Q <= D; end endmodule module \$_DLATCHSR_PNN_ (E, S, R, D, Q); input E, S, R, D; output reg Q; always @* begin if (R == 0) Q <= 0; else if (S == 0) Q <= 1; else if (E == 1) Q <= D; end endmodule module \$_DLATCHSR_PNP_ (E, S, R, D, Q); input E, S, R, D; output reg Q; always @* begin if (R == 1) Q <= 0; else if (S == 0) Q <= 1; else if (E == 1) Q <= D; end endmodule module \$_DLATCHSR_PPN_ (E, S, R, D, Q); input E, S, R, D; output reg Q; always @* begin if (R == 0) Q <= 0; else if (S == 1) Q <= 1; else if (E == 1) Q <= D; end endmodule module \$_DLATCHSR_PPP_ (E, S, R, D, Q); input E, S, R, D; output reg Q; always @* begin if (R == 1) Q <= 0; else if (S == 1) Q <= 1; else if (E == 1) Q <= D; end endmodule 178' href='#n178'>178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251
/*
    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
                 2011,2012,2013 Giovanni Di Sirio.

    This file is part of ChibiOS/RT.

    ChibiOS/RT is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.

    ChibiOS/RT is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.
*/

/**
 * @file    chbsem.h
 * @brief   Binary semaphores structures and macros.
 *
 * @addtogroup binary_semaphores
 * @details Binary semaphores related APIs and services.
 *
 *          <h2>Operation mode</h2>
 *          Binary semaphores are implemented as a set of macros that use the
 *          existing counting semaphores primitives. The difference between
 *          counting and binary semaphores is that the counter of binary
 *          semaphores is not allowed to grow above the value 1. Repeated
 *          signal operation are ignored. A binary semaphore can thus have
 *          only two defined states:
 *          - <b>Taken</b>, when its counter has a value of zero or lower
 *            than zero. A negative number represent the number of threads
 *            queued on the binary semaphore.
 *          - <b>Not taken</b>, when its counter has a value of one.
 *          .
 *          Binary semaphores are different from mutexes because there is no
 *          the concept of ownership, a binary semaphore can be taken by a
 *          thread and signaled by another thread or an interrupt handler,
 *          mutexes can only be taken and released by the same thread. Another
 *          difference is that binary semaphores, unlike mutexes, do not
 *          implement the priority inheritance protocol.<br>
 *          In order to use the binary semaphores APIs the @p CH_USE_SEMAPHORES
 *          option must be enabled in @p chconf.h.
 * @{
 */

#ifndef _CHBSEM_H_
#define _CHBSEM_H_

#if CH_USE_SEMAPHORES || defined(__DOXYGEN__)

/**
 * @extends Semaphore
 *
 * @brief   Binary semaphore type.
 */
typedef struct  {
  Semaphore             bs_sem;
} BinarySemaphore;

/**
 * @brief   Data part of a static semaphore initializer.
 * @details This macro should be used when statically initializing a semaphore
 *          that is part of a bigger structure.
 *
 * @param[in] name      the name of the semaphore variable
 * @param[in] taken     the semaphore initial state
 */
#define _BSEMAPHORE_DATA(name, taken)                                       \
  {_SEMAPHORE_DATA(name.bs_sem, ((taken) ? 0 : 1))}

/**
 * @brief   Static semaphore initializer.
 * @details Statically initialized semaphores require no explicit
 *          initialization using @p chBSemInit().
 *
 * @param[in] name      the name of the semaphore variable
 * @param[in] taken     the semaphore initial state
 */
#define BSEMAPHORE_DECL(name, taken)                                        \
  BinarySemaphore name = _BSEMAPHORE_DATA(name, taken)

/**
 * @name    Macro Functions
 * @{
 */
/**
 * @brief   Initializes a binary semaphore.
 *
 * @param[out] bsp      pointer to a @p BinarySemaphore structure
 * @param[in] taken     initial state of the binary semaphore:
 *                      - @a FALSE, the initial state is not taken.
 *                      - @a TRUE, the initial state is taken.
 *                      .
 *
 * @init
 */
#define chBSemInit(bsp, taken) chSemInit(&(bsp)->bs_sem, (taken) ? 0 : 1)

/**
 * @brief   Wait operation on the binary semaphore.
 *
 * @param[in] bsp       pointer to a @p BinarySemaphore structure
 * @return              A message specifying how the invoking thread has been
 *                      released from the semaphore.
 * @retval RDY_OK       if the binary semaphore has been successfully taken.
 * @retval RDY_RESET    if the binary semaphore has been reset using
 *                      @p bsemReset().
 *
 * @api
 */
#define chBSemWait(bsp) chSemWait(&(bsp)->bs_sem)

/**
 * @brief   Wait operation on the binary semaphore.
 *
 * @param[in] bsp       pointer to a @p BinarySemaphore structure
 * @return              A message specifying how the invoking thread has been
 *                      released from the semaphore.
 * @retval RDY_OK       if the binary semaphore has been successfully taken.
 * @retval RDY_RESET    if the binary semaphore has been reset using
 *                      @p bsemReset().
 *
 * @sclass
 */
#define chBSemWaitS(bsp) chSemWaitS(&(bsp)->bs_sem)

/**
 * @brief   Wait operation on the binary semaphore.
 *
 * @param[in] bsp       pointer to a @p BinarySemaphore structure
 * @param[in] time      the number of ticks before the operation timeouts,
 *                      the following special values are allowed:
 *                      - @a TIME_IMMEDIATE immediate timeout.
 *                      - @a TIME_INFINITE no timeout.
 *                      .
 * @return              A message specifying how the invoking thread has been
 *                      released from the semaphore.
 * @retval RDY_OK       if the binary semaphore has been successfully taken.
 * @retval RDY_RESET    if the binary semaphore has been reset using
 *                      @p bsemReset().
 * @retval RDY_TIMEOUT  if the binary semaphore has not been signaled or reset
 *                      within the specified timeout.
 *
 * @api
 */
#define chBSemWaitTimeout(bsp, time) chSemWaitTimeout(&(bsp)->bs_sem, (time))

/**
 * @brief   Wait operation on the binary semaphore.
 *
 * @param[in] bsp       pointer to a @p BinarySemaphore structure
 * @param[in] time      the number of ticks before the operation timeouts,
 *                      the following special values are allowed:
 *                      - @a TIME_IMMEDIATE immediate timeout.
 *                      - @a TIME_INFINITE no timeout.
 *                      .
 * @return              A message specifying how the invoking thread has been
 *                      released from the semaphore.
 * @retval RDY_OK       if the binary semaphore has been successfully taken.
 * @retval RDY_RESET    if the binary semaphore has been reset using
 *                      @p bsemReset().
 * @retval RDY_TIMEOUT  if the binary semaphore has not been signaled or reset
 *                      within the specified timeout.
 *
 * @sclass
 */
#define chBSemWaitTimeoutS(bsp, time) chSemWaitTimeoutS(&(bsp)->bs_sem, (time))

/**
 * @brief   Reset operation on the binary semaphore.
 * @note    The released threads can recognize they were waked up by a reset
 *          rather than a signal because the @p bsemWait() will return
 *          @p RDY_RESET instead of @p RDY_OK.
 *
 * @param[in] bsp       pointer to a @p BinarySemaphore structure
 * @param[in] taken     new state of the binary semaphore
 *                      - @a FALSE, the new state is not taken.
 *                      - @a TRUE, the new state is taken.
 *                      .
 *
 * @api
 */
#define chBSemReset(bsp, taken) chSemReset(&(bsp)->bs_sem, (taken) ? 0 : 1)

/**
 * @brief   Reset operation on the binary semaphore.
 * @note    The released threads can recognize they were waked up by a reset
 *          rather than a signal because the @p bsemWait() will return
 *          @p RDY_RESET instead of @p RDY_OK.
 * @note    This function does not reschedule.
 *
 * @param[in] bsp       pointer to a @p BinarySemaphore structure
 * @param[in] taken     new state of the binary semaphore
 *                      - @a FALSE, the new state is not taken.
 *                      - @a TRUE, the new state is taken.
 *                      .
 *
 * @iclass
 */
#define chBSemResetI(bsp, taken) chSemResetI(&(bsp)->bs_sem, (taken) ? 0 : 1)

/**
 * @brief   Performs a signal operation on a binary semaphore.
 *
 * @param[in] bsp       pointer to a @p BinarySemaphore structure
 *
 * @api
 */
#define chBSemSignal(bsp) {                                                 \
  chSysLock();                                                              \
  chBSemSignalI((bsp));                                                     \
  chSchRescheduleS();                                                       \
  chSysUnlock();                                                            \
}

/**
 * @brief   Performs a signal operation on a binary semaphore.
 * @note    This function does not reschedule.
 *
 * @param[in] bsp       pointer to a @p BinarySemaphore structure
 *
 * @iclass
 */
#define chBSemSignalI(bsp) {                                                \
  if ((bsp)->bs_sem.s_cnt < 1)                                              \
    chSemSignalI(&(bsp)->bs_sem);                                           \
}

/**
 * @brief   Returns the binary semaphore current state.
 *
 * @param[in] bsp       pointer to a @p BinarySemaphore structure
 * @return              The binary semaphore current state.
 * @retval FALSE        if the binary semaphore is not taken.
 * @retval TRUE         if the binary semaphore is taken.
 *
 * @iclass
 */
#define chBSemGetStateI(bsp) ((bsp)->bs_sem.s_cnt > 0 ? FALSE : TRUE)
/** @} */

#endif /* CH_USE_SEMAPHORES */

#endif /* _CHBSEM_H_ */

/** @} */