/* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. ChibiOS/RT is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. ChibiOS/RT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see . */ /** * @defgroup STM32F4xx_DRIVERS STM32F4xx Drivers * @details This section describes all the supported drivers on the STM32F4xx * platform and the implementation details of the single drivers. * * @ingroup platforms */ /** * @defgroup STM32F4xx_HAL STM32F4xx Initialization Support * @details The STM32F4xx HAL support is responsible for system initialization. * * @section stm32f4xx_hal_1 Supported HW resources * - PLL1. * - PLL2. * - RCC. * - Flash. * . * @section stm32f4xx_hal_2 STM32F4xx HAL driver implementation features * - PLL startup and stabilization. * - Clock tree initialization. * - Clock source selection. * - Flash wait states initialization based on the selected clock options. * - SYSTICK initialization based on current clock and kernel required rate. * - DMA support initialization. * . * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_ADC STM32F4xx ADC Support * @details The STM32F4xx ADC driver supports the ADC peripherals using DMA * channels for maximum performance. * * @section stm32f4xx_adc_1 Supported HW resources * - ADC1. * - ADC2. * - ADC3. * - DMA2. * . * @section stm32f4xx_adc_2 STM32F4xx ADC driver implementation features * - Clock stop for reduced power usage when the driver is in stop state. * - Streaming conversion using DMA for maximum performance. * - Programmable ADC interrupt priority level. * - Programmable DMA bus priority for each DMA channel. * - Programmable DMA interrupt priority for each DMA channel. * - DMA and ADC errors detection. * . * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_EXT STM32F4xx EXT Support * @details The STM32F4xx EXT driver uses the EXTI peripheral. * * @section stm32f4xx_ext_1 Supported HW resources * - EXTI. * . * @section stm32f4xx_ext_2 STM32F4xx EXT driver implementation features * - Each EXTI channel can be independently enabled and programmed. * - Programmable EXTI interrupts priority level. * - Capability to work as event sources (WFE) rather than interrupt sources. * . * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_GPT STM32F4xx GPT Support * @details The STM32F4xx GPT driver uses the TIMx peripherals. * * @section stm32f4xx_gpt_1 Supported HW resources * - TIM1. * - TIM2. * - TIM3. * - TIM4. * - TIM5. * - TIM8. * . * @section stm32f4xx_gpt_2 STM32F4xx GPT driver implementation features * - Each timer can be independently enabled and programmed. Unused * peripherals are left in low power mode. * - Programmable TIMx interrupts priority level. * . * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_ICU STM32F4xx ICU Support * @details The STM32F4xx ICU driver uses the TIMx peripherals. * * @section stm32f4xx_icu_1 Supported HW resources * - TIM1. * - TIM2. * - TIM3. * - TIM4. * - TIM5. * - TIM8. * . * @section stm32f4xx_icu_2 STM32F4xx ICU driver implementation features * - Each timer can be independently enabled and programmed. Unused * peripherals are left in low power mode. * - Programmable TIMx interrupts priority level. * . * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_PAL STM32F4xx PAL Support * @details The STM32F4xx PAL driver uses the GPIO peripherals. * * @section stm32f4xx_pal_1 Supported HW resources * - GPIOA. * - GPIOB. * - GPIOC. * - GPIOD. * - GPIOE. * - GPIOF. * - GPIOG. * - GPIOH. * - GPIOI. * . * @section stm32f4xx_pal_2 STM32F4xx PAL driver implementation features * The PAL driver implementation fully supports the following hardware * capabilities: * - 16 bits wide ports. * - Atomic set/reset functions. * - Atomic set+reset function (atomic bus operations). * - Output latched regardless of the pad setting. * - Direct read of input pads regardless of the pad setting. * . * @section stm32f4xx_pal_3 Supported PAL setup modes * The STM32F4xx PAL driver supports the following I/O modes: * - @p PAL_MODE_RESET. * - @p PAL_MODE_UNCONNECTED. * - @p PAL_MODE_INPUT. * - @p PAL_MODE_INPUT_PULLUP. * - @p PAL_MODE_INPUT_PULLDOWN. * - @p PAL_MODE_INPUT_ANALOG. * - @p PAL_MODE_OUTPUT_PUSHPULL. * - @p PAL_MODE_OUTPUT_OPENDRAIN. * - @p PAL_MODE_ALTERNATE (non standard). * . * Any attempt to setup an invalid mode is ignored. * * @section stm32f4xx_pal_4 Suboptimal behavior * The STM32F4xx GPIO is less than optimal in several areas, the limitations * should be taken in account while using the PAL driver: * - Pad/port toggling operations are not atomic. * - Pad/group mode setup is not atomic. * . * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_PWM STM32F4xx PWM Support * @details The STM32F4xx PWM driver uses the TIMx peripherals. * * @section stm32f4xx_pwm_1 Supported HW resources * - TIM1. * - TIM2. * - TIM3. * - TIM4. * - TIM5. * - TIM8. * . * @section stm32f4xx_pwm_2 STM32F4xx PWM driver implementation features * - Each timer can be independently enabled and programmed. Unused * peripherals are left in low power mode. * - Four independent PWM channels per timer. * - Programmable TIMx interrupts priority level. * . * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_SERIAL STM32F4xx Serial Support * @details The STM32F4xx Serial driver uses the USART/UART peripherals in a * buffered, interrupt driven, implementation. * * @section stm32f4xx_serial_1 Supported HW resources * The serial driver can support any of the following hardware resources: * - USART1. * - USART2. * - USART3. * - UART4. * - UART5. * - USART6. * . * @section stm32f4xx_serial_2 STM32F4xx Serial driver implementation features * - Clock stop for reduced power usage when the driver is in stop state. * - Each UART/USART can be independently enabled and programmed. Unused * peripherals are left in low power mode. * - Fully interrupt driven. * - Programmable priority levels for each UART/USART. * . * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_SPI STM32F4xx SPI Support * @details The SPI driver supports the STM32F4xx SPI peripherals using DMA * channels for maximum performance. * * @section stm32f4xx_spi_1 Supported HW resources * - SPI1. * - SPI2. * - SPI3. * - DMA1. * - DMA2. * . * @section stm32f4xx_spi_2 STM32F4xx SPI driver implementation features * - Clock stop for reduced power usage when the driver is in stop state. * - Each SPI can be independently enabled and programmed. Unused * peripherals are left in low power mode. * - Programmable interrupt priority levels for each SPI. * - DMA is used for receiving and transmitting. * - Programmable DMA bus priority for each DMA channel. * - Programmable DMA interrupt priority for each DMA channel. * - Programmable DMA error hook. * . * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_UART STM32F4xx UART Support * @details The UART driver supports the STM32F4xx USART peripherals using DMA * channels for maximum performance. * * @section stm32f4xx_uart_1 Supported HW resources * The UART driver can support any of the following hardware resources: * - USART1. * - USART2. * - USART3. * - DMA1. * - DMA2. * . * @section stm32f4xx_uart_2 STM32F4xx UART driver implementation features * - Clock stop for reduced power usage when the driver is in stop state. * - Each UART/USART can be independently enabled and programmed. Unused * peripherals are left in low power mode. * - Programmable interrupt priority levels for each UART/USART. * - DMA is used for receiving and transmitting. * - Programmable DMA bus priority for each DMA channel. * - Programmable DMA interrupt priority for each DMA channel. * - Programmable DMA error hook. * . * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_PLATFORM_DRIVERS STM32F4xx Platform Drivers * @details Platform support drivers. Platform drivers do not implement HAL * standard driver templates, their role is to support platform * specific functionalities. * * @ingroup STM32F4xx_DRIVERS */ /** * @defgroup STM32F4xx_DMA STM32F4xx DMA Support * @details This DMA helper driver is used by the other drivers in order to * access the shared DMA resources in a consistent way. * * @section stm32f4xx_dma_1 Supported HW resources * The DMA driver can support any of the following hardware resources: * - DMA1. * - DMA2. * . * @section stm32f4xx_dma_2 STM32F4xx DMA driver implementation features * - Exports helper functions/macros to the other drivers that share the * DMA resource. * - Automatic DMA clock stop when not in use by any driver. * - DMA streams and interrupt vectors sharing among multiple drivers. * . * @ingroup STM32F4xx_PLATFORM_DRIVERS */ /** * @defgroup STM32F4xx_RCC STM32F4xx RCC Support * @details This RCC helper driver is used by the other drivers in order to * access the shared RCC resources in a consistent way. * * @section stm32f1xx_rcc_1 Supported HW resources * - RCC. * . * @section stm32f4xx_rcc_2 STM32F4xx RCC driver implementation features * - Peripherals reset. * - Peripherals clock enable. * - Periplerals clock disable. * . * @ingroup STM32F4xx_PLATFORM_DRIVERS */