/* ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. */ #ifndef MCUCONF_H #define MCUCONF_H /* * STM32L4xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole * driver is enabled in halconf.h. * * IRQ priorities: * 15...0 Lowest...Highest. * * DMA priorities: * 0...3 Lowest...Highest. */ /* ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. */ #ifndef MCUCONF_H #define MCUCONF_H #define STM32L4xx_MCUCONF #define STM32L4R5_MCUCONF /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_RANGE1 #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 #define STM32_HSI16_ENABLED FALSE #define STM32_HSI48_ENABLED FALSE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE #define STM32_LSE_ENABLED FALSE #define STM32_MSIPLL_ENABLED FALSE #define STM32_ADC_CLOCK_ENABLED TRUE #define STM32_USB_CLOCK_ENABLED TRUE #define STM32_SAI1_CLOCK_ENABLED TRUE #define STM32_SAI2_CLOCK_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M #define STM32_MSISRANGE STM32_MSISRANGE_4M #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_MSI #define STM32_PLLM_VALUE 1 #define STM32_PLLN_VALUE 60 #define STM32_PLLPDIV_VALUE 0 #define STM32_PLLP_VALUE 7 #define STM32_PLLQ_VALUE 4 #define STM32_PLLR_VALUE 2 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV1 #define STM32_PPRE2 STM32_PPRE2_DIV1 #define STM32_STOPWUCK STM32_STOPWUCK_MSI #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK #define STM32_PLLSAI1N_VALUE 72 #define STM32_PLLSAI1PDIV_VALUE 6 #define STM32_PLLSAI1P_VALUE 7 #define STM32_PLLSAI1Q_VALUE 6 #define STM32_PLLSAI1R_VALUE 6 #define STM32_PLLSAI2N_VALUE 72 #define STM32_PLLSAI2PDIV_VALUE 6 #define STM32_PLLSAI2P_VALUE 7 #define STM32_PLLSAI2Q_VALUE 6 #define STM32_PLLSAI2R_VALUE 6 /* * Peripherals clock sources. */ #define STM32_USART1SEL STM32_USART1SEL_SYSCLK #define STM32_USART2SEL STM32_USART2SEL_SYSCLK #define STM32_USART3SEL STM32_USART3SEL_SYSCLK #define STM32_UART4SEL STM32_UART4SEL_SYSCLK #define STM32_UART5SEL STM32_UART5SEL_SYSCLK #define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK #define STM32_I2C1SEL STM32_I2C1SEL_SYSCLK #define STM32_I2C2SEL STM32_I2C2SEL_SYSCLK #define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK #define STM32_I2C4SEL STM32_I2C4SEL_SYSCLK #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1 #define STM32_CLK48SEL STM32_CLK48SEL_PLL #define STM32_ADCSEL STM32_ADCSEL_SYSCLK #define STM32_DFSDMSEL STM32_DFSDMSEL_PCLK2 #define STM32_ADFSDMSEL STM32_ADFSDMSEL_SAI1CLK #define STM32_SAI1SEL STM32_SAI1SEL_OFF #define STM32_SAI2SEL STM32_SAI2SEL_OFF #define STM32_DSISEL STM32_DSISEL_DSIPHY #define STM32_SDMMC STM32_SDMMCSEL_48CLK #define STM32_OSPISEL STM32_OSPISEL_SYSCLK #define STM32_RTCSEL STM32_RTCSEL_LSI /* * IRQ system settings. */ #define STM32_IRQ_EXTI0_PRIORITY 6 #define STM32_IRQ_EXTI1_PRIORITY 6 #define STM32_IRQ_EXTI2_PRIORITY 6 #define STM32_IRQ_EXTI3_PRIORITY 6 #define STM32_IRQ_EXTI4_PRIORITY 6 #define STM32_IRQ_EXTI5_9_PRIORITY 6 #define STM32_IRQ_EXTI10_15_PRIORITY 6 #define STM32_IRQ_EXTI1635_38_PRIORITY 6 #define STM32_IRQ_EXTI18_PRIORITY 6 #define STM32_IRQ_EXTI19_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 15 /* * ADC driver system settings. */ /* * CAN driver system settings. */ /* * DAC driver system settings. */ /* * GPT driver system settings. */ /* * I2C driver system settings. */ /* * ICU driver system settings. */ /* * PWM driver system settings. */ /* * SDC driver system settings. */ /* * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_LPUART1 TRUE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 #define STM32_SERIAL_LPUART1_PRIORITY 12 /* * SPI driver system settings. */ /* * ST driver system settings. */ #define STM32_ST_IRQ_PRIORITY 8 #define STM32_ST_USE_TIMER 2 /* * UART driver system settings. */ /* * USB driver system settings. */ /* * WDG driver system settings. */ #define STM32_WDG_USE_IWDG FALSE /* * WSPI driver system settings. */ #endif /* MCUCONF_H */