/** ****************************************************************************** * @file stm32f10x_bkp.c * @author MCD Application Team * @version V3.1.0 * @date 06/19/2009 * @brief This file provides all the BKP firmware functions. ****************************************************************************** * @copy * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * *

© COPYRIGHT 2009 STMicroelectronics

*/ /* Includes ------------------------------------------------------------------*/ #include "stm32f10x_bkp.h" #include "stm32f10x_rcc.h" /** @addtogroup STM32F10x_StdPeriph_Driver * @{ */ /** @defgroup BKP * @brief BKP driver modules * @{ */ /** @defgroup BKP_Private_TypesDefinitions * @{ */ /** * @} */ /** @defgroup BKP_Private_Defines * @{ */ /* ------------ BKP registers bit address in the alias region --------------- */ #define BKP_OFFSET (BKP_BASE - PERIPH_BASE) /* --- CR Register ----*/ /* Alias word address of TPAL bit */ #define CR_OFFSET (BKP_OFFSET + 0x30) #define TPAL_BitNumber 0x01 #define CR_TPAL_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPAL_BitNumber * 4)) /* Alias word address of TPE bit */ #define TPE_BitNumber 0x00 #define CR_TPE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPE_BitNumber * 4)) /* --- CSR Register ---*/ /* Alias word address of TPIE bit */ #define CSR_OFFSET (BKP_OFFSET + 0x34) #define TPIE_BitNumber 0x02 #define CSR_TPIE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TPIE_BitNumber * 4)) /* Alias word address of TIF bit */ #define TIF_BitNumber 0x09 #define CSR_TIF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TIF_BitNumber * 4)) /* Alias word address of TEF bit */ #define TEF_BitNumber 0x08 #define CSR_TEF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEF_BitNumber * 4)) /* ---------------------- BKP registers bit mask ------------------------ */ /* RTCCR register bit mask */ #define RTCCR_CAL_Mask ((uint16_t)0xFF80) #define RTCCR_Mask ((uint16_t)0xFC7F) /* CSR register bit mask */ #define CSR_CTE_Set ((uint16_t)0x0001) #define CSR_CTI_Set ((uint16_t)0x0002) /** * @} */ /** @defgroup BKP_Private_Macros * @{ */ /** * @} */ /** @defgroup BKP_Private_Variables * @{ */ /** * @} */ /** @defgroup BKP_Private_FunctionPrototypes * @{ */ /** * @} */ /** @defgroup BKP_Private_Functions * @{ */ /** * @brief Deinitializes the BKP peripheral registers to their default reset values. * @param None * @retval None */ void BKP_DeInit(void) { RCC_BackupResetCmd(ENABLE); RCC_BackupResetCmd(DISABLE); } /** * @brief Configures the Tamper Pin active level. * @param BKP_TamperPinLevel: specifies the Tamper Pin active level. * This parameter can be one of the following values: * @arg BKP_TamperPinLevel_High: Tamper pin active on high level * @arg BKP_TamperPinLevel_Low: Tamper pin active on low level * @retval None */ void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel) { /* Check the parameters */ assert_param(IS_BKP_TAMPER_PIN_LEVEL(BKP_TamperPinLevel)); *(__IO uint32_t *) CR_TPAL_BB = BKP_TamperPinLevel; } /** * @brief Enables or disables the Tamper Pin activation. * @param NewState: new state of the Tamper Pin activation. * This parameter can be: ENABLE or DISABLE. * @retval None */ void BKP_TamperPinCmd(FunctionalState NewState) { /* Check the parameters */ assert_param(IS_FUNCTIONAL_STATE(NewState)); *(__IO uint32_t *) CR_TPE_BB = (uint32_t)NewState; } /** * @brief Enables or disables the Tamper Pin Interrupt. * @param NewState: new state of the Tamper Pin Interrupt. * This parameter can be: ENABLE or DISABLE. * @retval None */ void BKP_ITConfig(FunctionalState NewState) { /* Check the parameters */ assert_param(IS_FUNCTIONAL_STATE(NewState)); *(__IO uint32_t *) CSR_TPIE_BB = (uint32_t)NewState; } /** * @brief Select the RTC output source to output on the Tamper pin. * @param BKP_RTCOutputSource: specifies the RTC output source. * This parameter can be one of the following values: * @arg BKP_RTCOutputSource_None: no RTC output on the Tamper pin. * @arg BKP_RTCOutputSource_CalibClock: output the RTC clock with frequency * divided by 64 on the Tamper pin. * @arg BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse signal on * the Tamper pin. * @arg BKP_RTCOutputSource_Second: output the RTC Second pulse signal on * the Tamper pin. * @retval None */ void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource) { uint16_t tmpreg = 0; /* Check the parameters */ assert_param(IS_BKP_RTC_OUTPUT_SOURCE(BKP_RTCOutputSource)); tmpreg = BKP->RTCCR; /* Clear CCO, ASOE and ASOS bits */ tmpreg &= RTCCR_Mask; /* Set CCO, ASOE and ASOS bits according to BKP_RTCOutputSource value */ tmpreg |= BKP_RTCOutputSource; /* Store the new value */ BKP->RTCCR = tmpreg; } /** * @brief Sets RTC Clock Calibration value. * @param CalibrationValue: specifies the RTC Clock Calibration value. * This parameter must be a number between 0 and 0x7F. * @retval None */ void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue) { uint16_t tmpreg = 0; /* Check the parameters */ assert_param(IS_BKP_CALIBRATION_VALUE(CalibrationValue)); tmpreg = BKP->RTCCR; /* Clear CAL[6:0] bits */ tmpreg &= RTCCR_CAL_Mask; /* Set CAL[6:0] bits according to CalibrationValue value */ tmpreg |= CalibrationValue; /* Store the new value */ BKP->RTCCR = tmpreg; } /** * @brief Writes user data to the specified Data Backup Register. * @param BKP_DR: specifies the Data Backup Register. * This parameter can be BKP_DRx where x:[1, 42] * @param Data: data to write * @retval None */ void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data) { __IO uint32_t tmp = 0; /* Check the parameters */ assert_param(IS_BKP_DR(BKP_DR)); tmp = (uint32_t)BKP_BASE; tmp += BKP_DR; *(__IO uint32_t *) tmp = Data; } /** * @brief Reads data from the specified Data Backup Register. * @param BKP_DR: specifies the Data Backup Register. * This parameter can be BKP_DRx where x:[1, 42] * @retval The content of the specified Data Backup Register */ uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR) { __IO uint32_t tmp = 0; /* Check the parameters */ assert_param(IS_BKP_DR(BKP_DR)); tmp = (uint32_t)BKP_BASE; tmp += BKP_DR; return (*(__IO uint16_t *) tmp); } /** * @brief Checks whether the Tamper Pin Event flag is set or not. * @param None * @retval The new state of the Tamper Pin Event flag (SET or RESET). */ FlagStatus BKP_GetFlagStatus(void) { return (FlagStatus)(*(__IO uint32_t *) CSR_TEF_BB); } /** * @brief Clears Tamper Pin Event pending flag. * @param None * @retval None */ void BKP_ClearFlag(void) { /* Set CTE bit to clear Tamper Pin Event flag */ BKP->CSR |= CSR_CTE_Set; } /** * @brief Checks whether the Tamper Pin Interrupt has occurred or not. * @param None * @retval The new state of the Tamper Pin Interrupt (SET or RESET). */ ITStatus BKP_GetITStatus(void) { return (ITStatus)(*(__IO uint32_t *) CSR_TIF_BB); } /** * @brief Clears Tamper Pin Interrupt pending bit. * @param None * @retval None */ void BKP_ClearITPendingBit(void) { /* Set CTI bit to clear Tamper Pin Interrupt pending bit */ BKP->CSR |= CSR_CTI_Set; } /** * @} */ /** * @} */ /** * @} */ /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ > 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504