From c708f7d750f2190ff82075378965214c06437d8c Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Sat, 22 Sep 2018 15:27:12 +0000
Subject: USARTv2 made DMAMUX-aware.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12281 110e8d01-0319-4d1e-a829-52ad28d1bb01
---
 .../conf/mcuconf_stm32l496xx/mcuconf.h.ftl         |  4 ---
 .../conf/mcuconf_stm32l4r5xx/mcuconf.h.ftl         | 29 ++++++++++++++++++++++
 2 files changed, 29 insertions(+), 4 deletions(-)

(limited to 'tools')

diff --git a/tools/ftl/processors/conf/mcuconf_stm32l496xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32l496xx/mcuconf.h.ftl
index d307f57e6..6a0dd567a 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32l496xx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32l496xx/mcuconf.h.ftl
@@ -308,7 +308,6 @@
 #define STM32_UART_USE_USART3               ${doc.STM32_UART_USE_USART3!"FALSE"}
 #define STM32_UART_USE_UART4                ${doc.STM32_UART_USE_UART4!"FALSE"}
 #define STM32_UART_USE_UART5                ${doc.STM32_UART_USE_UART5!"FALSE"}
-#define STM32_UART_USE_LPUART1              ${doc.STM32_UART_USE_LPUART1!"FALSE"}
 #define STM32_UART_USART1_RX_DMA_STREAM     ${doc.STM32_UART_USART1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 7)"}
 #define STM32_UART_USART1_TX_DMA_STREAM     ${doc.STM32_UART_USART1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 6)"}
 #define STM32_UART_USART2_RX_DMA_STREAM     ${doc.STM32_UART_USART2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 6)"}
@@ -319,8 +318,6 @@
 #define STM32_UART_UART4_TX_DMA_STREAM      ${doc.STM32_UART_UART4_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 3)"}
 #define STM32_UART_UART5_RX_DMA_STREAM      ${doc.STM32_UART_UART5_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 2)"}
 #define STM32_UART_UART5_TX_DMA_STREAM      ${doc.STM32_UART_UART5_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 1)"}
-#define STM32_UART_LPUART1_RX_DMA_STREAM    ${doc.STM32_UART_LPUART1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 7)"}
-#define STM32_UART_LPUART1_TX_DMA_STREAM    ${doc.STM32_UART_LPUART1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 6)"}
 #define STM32_UART_USART1_IRQ_PRIORITY      ${doc.STM32_UART_USART1_IRQ_PRIORITY!"12"}
 #define STM32_UART_USART2_IRQ_PRIORITY      ${doc.STM32_UART_USART2_IRQ_PRIORITY!"12"}
 #define STM32_UART_USART3_IRQ_PRIORITY      ${doc.STM32_UART_USART3_IRQ_PRIORITY!"12"}
@@ -331,7 +328,6 @@
 #define STM32_UART_USART3_DMA_PRIORITY      ${doc.STM32_UART_USART3_DMA_PRIORITY!"0"}
 #define STM32_UART_UART4_DMA_PRIORITY       ${doc.STM32_UART_UART4_DMA_PRIORITY!"0"}
 #define STM32_UART_UART5_DMA_PRIORITY       ${doc.STM32_UART_UART5_DMA_PRIORITY!"0"}
-#define STM32_UART_LPUART1_DMA_PRIORITY     ${doc.STM32_UART_LPUART1_DMA_PRIORITY!"0"}
 #define STM32_UART_DMA_ERROR_HOOK(uartp)    ${doc.STM32_UART_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
 
 /*
diff --git a/tools/ftl/processors/conf/mcuconf_stm32l4r5xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32l4r5xx/mcuconf.h.ftl
index 424d8081c..74613ac59 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32l4r5xx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32l4r5xx/mcuconf.h.ftl
@@ -283,10 +283,39 @@
 /*
  * UART driver system settings.
  */
+#define STM32_UART_USE_USART1               ${doc.STM32_UART_USE_USART1!"FALSE"}
+#define STM32_UART_USE_USART2               ${doc.STM32_UART_USE_USART2!"FALSE"}
+#define STM32_UART_USE_USART3               ${doc.STM32_UART_USE_USART3!"FALSE"}
+#define STM32_UART_USE_UART4                ${doc.STM32_UART_USE_UART4!"FALSE"}
+#define STM32_UART_USE_UART5                ${doc.STM32_UART_USE_UART5!"FALSE"}
+#define STM32_UART_USART1_RX_DMA_CHANNEL    ${doc.STM32_UART_USART1_RX_DMA_CHANNEL!"13"}
+#define STM32_UART_USART1_TX_DMA_CHANNEL    ${doc.STM32_UART_USART1_TX_DMA_CHANNEL!"0"}
+#define STM32_UART_USART2_RX_DMA_CHANNEL    ${doc.STM32_UART_USART2_RX_DMA_CHANNEL!"1"}
+#define STM32_UART_USART2_TX_DMA_CHANNEL    ${doc.STM32_UART_USART2_TX_DMA_CHANNEL!"2"}
+#define STM32_UART_USART3_RX_DMA_CHANNEL    ${doc.STM32_UART_USART3_RX_DMA_CHANNEL!"3"}
+#define STM32_UART_USART3_TX_DMA_CHANNEL    ${doc.STM32_UART_USART3_TX_DMA_CHANNEL!"4"}
+#define STM32_UART_UART4_RX_DMA_CHANNEL     ${doc.STM32_UART_UART4_RX_DMA_CHANNEL!"5"}
+#define STM32_UART_UART4_TX_DMA_CHANNEL     ${doc.STM32_UART_UART4_TX_DMA_CHANNEL!"6"}
+#define STM32_UART_UART5_RX_DMA_CHANNEL     ${doc.STM32_UART_UART5_RX_DMA_CHANNEL!"7"}
+#define STM32_UART_UART5_TX_DMA_CHANNEL     ${doc.STM32_UART_UART5_TX_DMA_CHANNEL!"8"}
+#define STM32_UART_USART1_IRQ_PRIORITY      ${doc.STM32_UART_USART1_IRQ_PRIORITY!"12"}
+#define STM32_UART_USART2_IRQ_PRIORITY      ${doc.STM32_UART_USART2_IRQ_PRIORITY!"12"}
+#define STM32_UART_USART3_IRQ_PRIORITY      ${doc.STM32_UART_USART3_IRQ_PRIORITY!"12"}
+#define STM32_UART_UART4_IRQ_PRIORITY       ${doc.STM32_UART_UART4_IRQ_PRIORITY!"12"}
+#define STM32_UART_UART5_IRQ_PRIORITY       ${doc.STM32_UART_UART5_IRQ_PRIORITY!"12"}
+#define STM32_UART_USART1_DMA_PRIORITY      ${doc.STM32_UART_USART1_DMA_PRIORITY!"0"}
+#define STM32_UART_USART2_DMA_PRIORITY      ${doc.STM32_UART_USART2_DMA_PRIORITY!"0"}
+#define STM32_UART_USART3_DMA_PRIORITY      ${doc.STM32_UART_USART3_DMA_PRIORITY!"0"}
+#define STM32_UART_UART4_DMA_PRIORITY       ${doc.STM32_UART_UART4_DMA_PRIORITY!"0"}
+#define STM32_UART_UART5_DMA_PRIORITY       ${doc.STM32_UART_UART5_DMA_PRIORITY!"0"}
+#define STM32_UART_DMA_ERROR_HOOK(uartp)    ${doc.STM32_UART_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
 
 /*
  * USB driver system settings.
  */
+#define STM32_USB_USE_OTG1                  ${doc.STM32_USB_USE_OTG1!"FALSE"}
+#define STM32_USB_OTG1_IRQ_PRIORITY         ${doc.STM32_USB_OTG1_IRQ_PRIORITY!"14"}
+#define STM32_USB_OTG1_RX_FIFO_SIZE         ${doc.STM32_USB_OTG1_RX_FIFO_SIZE!"512"}
 
 /*
  * WDG driver system settings.
-- 
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