From 15fca876739fcd859f8b53b5eeb43820eb7feb37 Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Sun, 30 Dec 2018 13:29:58 +0000
Subject: H7 ADC demo working, not fully tested.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12496 110e8d01-0319-4d1e-a829-52ad28d1bb01
---
 testhal/STM32/multi/ADC/main.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

(limited to 'testhal')

diff --git a/testhal/STM32/multi/ADC/main.c b/testhal/STM32/multi/ADC/main.c
index 68d5f3130..5464bd7c5 100644
--- a/testhal/STM32/multi/ADC/main.c
+++ b/testhal/STM32/multi/ADC/main.c
@@ -16,6 +16,7 @@
 
 #include "ch.h"
 #include "hal.h"
+#include "ccportab.h"
 
 #include "portab.h"
 
@@ -26,8 +27,17 @@
 #define ADC_GRP1_BUF_DEPTH      1
 #define ADC_GRP2_BUF_DEPTH      64
 
-adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
-adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH];
+/* Buffers are allocated with size and address aligned to the cache
+   line size.*/
+#if CACHE_LINE_SIZE > 0
+CC_ALIGN(CACHE_LINE_SIZE)
+#endif
+adcsample_t samples1[CACHE_SIZE_ALIGN(adcsample_t, ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH)];
+
+#if CACHE_LINE_SIZE > 0
+CC_ALIGN(CACHE_LINE_SIZE)
+#endif
+adcsample_t samples2[CACHE_SIZE_ALIGN(adcsample_t, ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH)];
 
 /*
  * ADC streaming callback.
@@ -110,6 +120,7 @@ int main(void) {
 
   /* Performing a one-shot conversion on two channels.*/
   adcConvert(&PORTAB_ADC1, &portab_adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH);
+  cacheBufferInvalidate(samples1, sizeof (samples1) / sizeof (adcsample_t));
 
   /*
    * Normal main() thread activity, if the button is pressed then the
-- 
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